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Consider merging with SIMDe? #50
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Hi @mr-c I am appreciate. The current version of neon2rvv is far from stable yet. If I wish to do fast iteration, then staying in a independent repo would make things easier. And the current toolchain using in this repo is a weekly built release by myself. It would be great to know more details, and find a way to cooperate. However, in this moment has an independent repo may help me develop faster. |
The existing code will need to be adapted to the SIMDe way. For example, Line 160 in 84c6f94
would be added to https://github.com/simd-everywhere/simde/blob/c877fe596198b9df22d9cef7416e80ae30f0489c/simde/arm/neon/add.h#L486-L513 with something like #elif defined(SIMDE_RISCV64_RVV_NATIVE)
r_.vint8m1 = __riscv_vadd_vv_i8m1(a_.vint8m1, b_.vint8m1, 16); And would be tested by the existing test: But first we'd need to add the RVV native types to the #elif defined(SIMDE_RISCV64_RVV_NATIVE)
typedef vint8m1_t simde_int8x16_t; #elif defined(SIMDE_RISCV64_RVV_NATIVE)
vint8m1_t vint8m1; |
And that is great! We are ready for you when you are; no rush :-) |
Hey @mr-c I have finished about 90% of the intrinsics. I think I may be able to process some of the steps to merge to SIMDe. But in the meantime I will develop sse2rvv too. Do you think SIMDe needs that part? |
My another repo which solves the translation between see and rvv has covered around 35% of the intrinsics |
Hello @howjmay ; could you review simd-everywhere/simde#1130 and compare that with your approach? |
Let me try! That is a huge PR 😆 |
We'd love to have you participate!
Bonus, we already have lots of test cases and implementations for other archs and ISAs
simd-everywhere/simde#1087
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