From 45de24723f27657bc12334aeaaa85453c031af31 Mon Sep 17 00:00:00 2001 From: Jonathan Klimt Date: Fri, 15 Nov 2024 18:52:14 +0100 Subject: [PATCH] Fixup for ddac7f5: Added usize arithmetics for riscv64::VirtAddr --- src/arch/riscv64.rs | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/src/arch/riscv64.rs b/src/arch/riscv64.rs index daff565..ad9b659 100644 --- a/src/arch/riscv64.rs +++ b/src/arch/riscv64.rs @@ -134,6 +134,41 @@ impl From for VirtAddr { } } +#[cfg(target_pointer_width = "64")] +// if the target_pointer_width is 64, usize = u64 so we can safely add +impl core::ops::Add for VirtAddr { + type Output = Self; + #[inline] + fn add(self, rhs: usize) -> Self::Output { + VirtAddr::new(self.0 + rhs as u64) + } +} +#[cfg(target_pointer_width = "64")] +// if the target_pointer_width is 64, usize = u64 so we can safely add +impl core::ops::AddAssign for VirtAddr { + #[inline] + fn add_assign(&mut self, rhs: usize) { + *self = *self + rhs; + } +} +#[cfg(target_pointer_width = "64")] +// if the target_pointer_width is 64, usize = u64 so we can safely sub +impl core::ops::Sub for VirtAddr { + type Output = Self; + #[inline] + fn sub(self, rhs: usize) -> Self::Output { + VirtAddr::new(self.0.checked_sub(rhs as u64).unwrap()) + } +} +#[cfg(target_pointer_width = "64")] +// if the target_pointer_width is 64, usize = u64 so we can safely sub +impl core::ops::SubAssign for VirtAddr { + #[inline] + fn sub_assign(&mut self, rhs: usize) { + *self = *self - rhs; + } +} + #[cfg(target_pointer_width = "64")] // if the target_pointer_width is 64, usize = u64 so we can safely transform. impl From for PhysAddr {