diff --git a/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.fxc.hlsl index 5e3e12ec39b..2063d385dfb 100644 --- a/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID int tint_ftoi(float v) { return ((v < 2147483520.0f) ? ((v < -2147483648.0f) ? -2147483648 : int(v)) : 2147483647); diff --git a/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl index 017c41cd820..5ff9eb96a1b 100644 --- a/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/storage/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct main_inputs { uint idx : SV_GroupIndex; diff --git a/test/tint/buffer/storage/dynamic_index/write_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/dynamic_index/write_f16.wgsl.expected.fxc.hlsl index 333959fd33e..d00d23b05ce 100644 --- a/test/tint/buffer/storage/dynamic_index/write_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/dynamic_index/write_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer sb : register(u0); diff --git a/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.fxc.hlsl index ca76f0ed651..98399adaea2 100644 --- a/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID int tint_ftoi(float v) { return ((v < 2147483520.0f) ? ((v < -2147483648.0f) ? -2147483648 : int(v)) : 2147483647); diff --git a/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.ir.fxc.hlsl index d2650bea4dc..8371dfa340e 100644 --- a/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/storage/static_index/read_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { int scalar_i32; diff --git a/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.fxc.hlsl index 67933bd630e..e98447fd35b 100644 --- a/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { int scalar_i32; diff --git a/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.ir.fxc.hlsl index ce01c8acf33..8926e832115 100644 --- a/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/storage/static_index/write_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { int scalar_i32; diff --git a/test/tint/buffer/storage/types/array4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/array4_f16.wgsl.expected.fxc.hlsl index 3fee636d922..7b91e4e7e9f 100644 --- a/test/tint/buffer/storage/types/array4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/array4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/array4_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/storage/types/array4_f16.wgsl.expected.ir.fxc.hlsl index a4ff5bab748..2051fec28ef 100644 --- a/test/tint/buffer/storage/types/array4_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/storage/types/array4_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); diff --git a/test/tint/buffer/storage/types/mat2x2_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat2x2_f16.wgsl.expected.fxc.hlsl index 665e0a19fc4..16f4719614a 100644 --- a/test/tint/buffer/storage/types/mat2x2_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat2x2_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat2x3_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat2x3_f16.wgsl.expected.fxc.hlsl index f6acb246fe0..2f3907c0142 100644 --- a/test/tint/buffer/storage/types/mat2x3_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat2x3_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat2x4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat2x4_f16.wgsl.expected.fxc.hlsl index 6b2c2d82a76..ca7e4482e37 100644 --- a/test/tint/buffer/storage/types/mat2x4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat2x4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat3x2_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat3x2_f16.wgsl.expected.fxc.hlsl index d297f8ed1d4..c0553255fe8 100644 --- a/test/tint/buffer/storage/types/mat3x2_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat3x2_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat3x3_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat3x3_f16.wgsl.expected.fxc.hlsl index e047de7b69f..25c00784c0d 100644 --- a/test/tint/buffer/storage/types/mat3x3_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat3x3_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat3x4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat3x4_f16.wgsl.expected.fxc.hlsl index bc0a70732ed..caacfc2b6bc 100644 --- a/test/tint/buffer/storage/types/mat3x4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat3x4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat4x2_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat4x2_f16.wgsl.expected.fxc.hlsl index 7ba75dc2bd9..809a762222e 100644 --- a/test/tint/buffer/storage/types/mat4x2_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat4x2_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat4x3_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat4x3_f16.wgsl.expected.fxc.hlsl index 7ab90348ac3..980f977fe12 100644 --- a/test/tint/buffer/storage/types/mat4x3_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat4x3_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/mat4x4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/mat4x4_f16.wgsl.expected.fxc.hlsl index 31adef1ad68..39a5ca9ef1e 100644 --- a/test/tint/buffer/storage/types/mat4x4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/mat4x4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID ByteAddressBuffer tint_symbol : register(t0); RWByteAddressBuffer tint_symbol_1 : register(u1); diff --git a/test/tint/buffer/storage/types/struct_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/storage/types/struct_f16.wgsl.expected.fxc.hlsl index b7e5241b5c8..2f9b849c6c2 100644 --- a/test/tint/buffer/storage/types/struct_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/storage/types/struct_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { float16_t scalar_f16; diff --git a/test/tint/buffer/storage/types/struct_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/storage/types/struct_f16.wgsl.expected.ir.fxc.hlsl index 64e66315bd5..607c63a8c2c 100644 --- a/test/tint/buffer/storage/types/struct_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/storage/types/struct_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { float16_t scalar_f16; diff --git a/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.fxc.hlsl index d5874cdcf11..47671dd7e38 100644 --- a/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID int tint_ftoi(float v) { return ((v < 2147483520.0f) ? ((v < -2147483648.0f) ? -2147483648 : int(v)) : 2147483647); diff --git a/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl index 7811bc563a6..4721a81f87f 100644 --- a/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/dynamic_index/read_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct main_inputs { uint idx : SV_GroupIndex; diff --git a/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.fxc.hlsl index 461698f7bab..4a067518103 100644 --- a/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID int tint_ftoi(float v) { return ((v < 2147483520.0f) ? ((v < -2147483648.0f) ? -2147483648 : int(v)) : 2147483647); diff --git a/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.ir.fxc.hlsl index 2406bc7f64a..a74aec586dd 100644 --- a/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/static_index/read_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { int scalar_i32; diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 1cee9ba58dc..a0fb432d671 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index c6c728f956f..579f02105da 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl index c6a3cf9732e..c2b2db09b95 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl index 0e5c1c3bd90..bc641f7b97e 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl index a8cb80ff914..b4634b202b1 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl index 8baa3eb33fc..c979baa8104 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl index 1cfe1173ffe..7c6f7e1ae8a 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index 0f4e31dbb87..3717d9110a9 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 5d34a50dd8c..79196e93a51 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index d60e8df1706..a236c937c88 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl index 66099092b38..c387c275efb 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl index 5945e9bac12..6f5f3617bb3 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl index 0a58470036e..e29a5ec89cc 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl index 72c57645974..0c1cf33c74e 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl index 94866dc5d91..6f1f4f13439 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index c83fc3464ad..64554bafde4 100644 --- a/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 8685acc5ab0..546b35b1031 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index bfc16c94740..aed20db27a7 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl index 89916c98ecb..1639b51fa1b 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl index 097ffcae999..3486c1b35a5 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.ir.fxc.hlsl index 96469edafe4..6502fdea2fb 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_fn.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl index 45118fa004f..e593fc92973 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl index 2006cd5fd70..ed46fc141ee 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl index f23033f3c88..54f906f2aaa 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index efb68a1184f..3192088bb87 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 6658c388900..b23c8b134c6 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl index 0ffe6e7866e..8c1cff85d3e 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl index 1011abe1985..e6be377c546 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl index fbdb5f8053e..dca04ce4891 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_fn.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl index a1f2d285e7e..3301068586a 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl index 474e9c7cab3..44c2d2bf94d 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index 2d0ce53cc4c..68761df2b73 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w[4]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index bfae5303950..8a711c754b4 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 666c8ac2695..5e830ac10db 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_a : register(b0) { uint4 a[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl index b2c927d840b..b238328b481 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl index 039feeceb22..a7cd16d018f 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl index 5162cfa849d..b590e253864 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_fn.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl index 9f0d4ad1556..f2528896822 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl index 17895b32dc5..a07e08558c9 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[8]; diff --git a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index 26527efaaa7..5f428935aef 100644 --- a/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/array/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w[4]; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 4c6a1ac8a6c..ca98ab60873 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 9d9edf0b612..dc1ee6458f7 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -146,67 +146,67 @@ $B1: { # root ret } } -%32 = func(%start_byte_offset:u32):mat2x2 { +%24 = func(%start_byte_offset:u32):array { $B4: { - %65:u32 = div %start_byte_offset, 16u - %66:ptr, read> = access %a, %65 - %67:u32 = mod %start_byte_offset, 16u - %68:u32 = div %67, 4u - %69:vec4 = load %66 - %70:u32 = swizzle %69, z - %71:u32 = swizzle %69, x - %72:bool = eq %68, 2u - %73:u32 = hlsl.ternary %71, %70, %72 - %74:vec2 = bitcast %73 - %75:u32 = add 4u, %start_byte_offset - %76:u32 = div %75, 16u - %77:ptr, read> = access %a, %76 - %78:u32 = mod %75, 16u - %79:u32 = div %78, 4u - %80:vec4 = load %77 - %81:u32 = swizzle %80, z - %82:u32 = swizzle %80, x - %83:bool = eq %79, 2u - %84:u32 = hlsl.ternary %82, %81, %83 - %85:vec2 = bitcast %84 - %86:mat2x2 = construct %74, %85 - ret %86 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B5: { - %88:mat2x2 = call %32, %start_byte_offset_1 - %89:Inner = construct %88 - ret %89 - } -} -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B6: { %a_1:ptr, read_write> = var, array(Inner(mat2x2(vec2(0.0h)))) # %a_1: 'a' - loop [i: $B7, b: $B8, c: $B9] { # loop_1 - $B7: { # initializer - next_iteration 0u # -> $B8 + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B8 (%idx:u32): { # body - %93:bool = gte %idx, 4u - if %93 [t: $B10] { # if_1 - $B10: { # true + $B6 (%idx:u32): { # body + %67:bool = gte %idx, 4u + if %67 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %94:u32 = mul %idx, 64u - %95:u32 = add %start_byte_offset_2, %94 - %96:ptr = access %a_1, %idx - %97:Inner = call %28, %95 - store %96, %97 - continue # -> $B9 + %68:u32 = mul %idx, 64u + %69:u32 = add %start_byte_offset, %68 + %70:ptr = access %a_1, %idx + %71:Inner = call %28, %69 + store %70, %71 + continue # -> $B7 } - $B9: { # continuing - %98:u32 = add %idx, 1u - next_iteration %98 # -> $B8 + $B7: { # continuing + %72:u32 = add %idx, 1u + next_iteration %72 # -> $B6 } } - %99:array = load %a_1 + %73:array = load %a_1 + ret %73 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %75:mat2x2 = call %32, %start_byte_offset_1 + %76:Inner = construct %75 + ret %76 + } +} +%32 = func(%start_byte_offset_2:u32):mat2x2 { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %78:u32 = div %start_byte_offset_2, 16u + %79:ptr, read> = access %a, %78 + %80:u32 = mod %start_byte_offset_2, 16u + %81:u32 = div %80, 4u + %82:vec4 = load %79 + %83:u32 = swizzle %82, z + %84:u32 = swizzle %82, x + %85:bool = eq %81, 2u + %86:u32 = hlsl.ternary %84, %83, %85 + %87:vec2 = bitcast %86 + %88:u32 = add 4u, %start_byte_offset_2 + %89:u32 = div %88, 16u + %90:ptr, read> = access %a, %89 + %91:u32 = mod %88, 16u + %92:u32 = div %91, 4u + %93:vec4 = load %90 + %94:u32 = swizzle %93, z + %95:u32 = swizzle %93, x + %96:bool = eq %92, 2u + %97:u32 = hlsl.ternary %95, %94, %96 + %98:vec2 = bitcast %97 + %99:mat2x2 = construct %87, %98 ret %99 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 1eee8a26d92..93703b5fa28 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -146,104 +146,104 @@ $B1: { # root ret } } -%28 = func(%start_byte_offset:u32):Inner { +%18 = func(%start_byte_offset:u32):array { $B4: { - %65:mat2x2 = call %32, %start_byte_offset - %66:Inner = construct %65 - ret %66 - } -} -%32 = func(%start_byte_offset_1:u32):mat2x2 { # %start_byte_offset_1: 'start_byte_offset' - $B5: { - %68:u32 = div %start_byte_offset_1, 16u - %69:ptr, read> = access %a, %68 - %70:u32 = mod %start_byte_offset_1, 16u - %71:u32 = div %70, 4u - %72:vec4 = load %69 - %73:u32 = swizzle %72, z - %74:u32 = swizzle %72, x - %75:bool = eq %71, 2u - %76:u32 = hlsl.ternary %74, %73, %75 - %77:vec2 = bitcast %76 - %78:u32 = add 4u, %start_byte_offset_1 - %79:u32 = div %78, 16u - %80:ptr, read> = access %a, %79 - %81:u32 = mod %78, 16u - %82:u32 = div %81, 4u - %83:vec4 = load %80 - %84:u32 = swizzle %83, z - %85:u32 = swizzle %83, x - %86:bool = eq %82, 2u - %87:u32 = hlsl.ternary %85, %84, %86 - %88:vec2 = bitcast %87 - %89:mat2x2 = construct %77, %88 - ret %89 - } -} -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B6: { - %a_1:ptr, read_write> = var, array(Inner(mat2x2(vec2(0.0h)))) # %a_1: 'a' - loop [i: $B7, b: $B8, c: $B9] { # loop_1 - $B7: { # initializer - next_iteration 0u # -> $B8 + %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat2x2(vec2(0.0h)))))) # %a_1: 'a' + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B8 (%idx:u32): { # body - %93:bool = gte %idx, 4u - if %93 [t: $B10] { # if_1 - $B10: { # true + $B6 (%idx:u32): { # body + %67:bool = gte %idx, 4u + if %67 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %94:u32 = mul %idx, 64u - %95:u32 = add %start_byte_offset_2, %94 - %96:ptr = access %a_1, %idx - %97:Inner = call %28, %95 - store %96, %97 - continue # -> $B9 + %68:u32 = mul %idx, 256u + %69:u32 = add %start_byte_offset, %68 + %70:ptr = access %a_1, %idx + %71:Outer = call %21, %69 + store %70, %71 + continue # -> $B7 } - $B9: { # continuing - %98:u32 = add %idx, 1u - next_iteration %98 # -> $B8 + $B7: { # continuing + %72:u32 = add %idx, 1u + next_iteration %72 # -> $B6 } } - %99:array = load %a_1 - ret %99 + %73:array = load %a_1 + ret %73 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' - $B11: { - %101:array = call %24, %start_byte_offset_3 - %102:Outer = construct %101 - ret %102 +%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %75:array = call %24, %start_byte_offset_1 + %76:Outer = construct %75 + ret %76 } } -%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' - $B12: { - %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat2x2(vec2(0.0h)))))) # %a_2: 'a' - loop [i: $B13, b: $B14, c: $B15] { # loop_2 - $B13: { # initializer - next_iteration 0u # -> $B14 +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %a_2:ptr, read_write> = var, array(Inner(mat2x2(vec2(0.0h)))) # %a_2: 'a' + loop [i: $B11, b: $B12, c: $B13] { # loop_2 + $B11: { # initializer + next_iteration 0u # -> $B12 } - $B14 (%idx_1:u32): { # body - %106:bool = gte %idx_1, 4u - if %106 [t: $B16] { # if_2 - $B16: { # true + $B12 (%idx_1:u32): { # body + %80:bool = gte %idx_1, 4u + if %80 [t: $B14] { # if_2 + $B14: { # true exit_loop # loop_2 } } - %107:u32 = mul %idx_1, 256u - %108:u32 = add %start_byte_offset_4, %107 - %109:ptr = access %a_2, %idx_1 - %110:Outer = call %21, %108 - store %109, %110 - continue # -> $B15 + %81:u32 = mul %idx_1, 64u + %82:u32 = add %start_byte_offset_2, %81 + %83:ptr = access %a_2, %idx_1 + %84:Inner = call %28, %82 + store %83, %84 + continue # -> $B13 } - $B15: { # continuing - %111:u32 = add %idx_1, 1u - next_iteration %111 # -> $B14 + $B13: { # continuing + %85:u32 = add %idx_1, 1u + next_iteration %85 # -> $B12 } } - %112:array = load %a_2 + %86:array = load %a_2 + ret %86 + } +} +%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' + $B15: { + %88:mat2x2 = call %32, %start_byte_offset_3 + %89:Inner = construct %88 + ret %89 + } +} +%32 = func(%start_byte_offset_4:u32):mat2x2 { # %start_byte_offset_4: 'start_byte_offset' + $B16: { + %91:u32 = div %start_byte_offset_4, 16u + %92:ptr, read> = access %a, %91 + %93:u32 = mod %start_byte_offset_4, 16u + %94:u32 = div %93, 4u + %95:vec4 = load %92 + %96:u32 = swizzle %95, z + %97:u32 = swizzle %95, x + %98:bool = eq %94, 2u + %99:u32 = hlsl.ternary %97, %96, %98 + %100:vec2 = bitcast %99 + %101:u32 = add 4u, %start_byte_offset_4 + %102:u32 = div %101, 16u + %103:ptr, read> = access %a, %102 + %104:u32 = mod %101, 16u + %105:u32 = div %104, 4u + %106:vec4 = load %103 + %107:u32 = swizzle %106, z + %108:u32 = swizzle %106, x + %109:bool = eq %105, 2u + %110:u32 = hlsl.ternary %108, %107, %109 + %111:vec2 = bitcast %110 + %112:mat2x2 = construct %100, %111 ret %112 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 93b96b75658..f5cd4a50267 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl index 9a93f2f01a0..0482674c6d1 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl index f339c035503..dbfeee3e416 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl index 41f13f5af1c..778f9eb14aa 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl index b86afbe7321..f40fa8d2e41 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl index 28b92fabb03..7181722ffac 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index e6329e55750..d579f46e3d5 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -139,104 +139,104 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat2x2(vec2(0.0f)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %60:array = call %24, %start_byte_offset + %61:Outer = construct %60 + ret %61 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %a_1:ptr, read_write> = var, array(Inner(mat2x2(vec2(0.0f)))) # %a_1: 'a' + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %62:bool = gte %idx, 4u - if %62 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %65:bool = gte %idx, 4u + if %65 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %63:u32 = mul %idx, 256u - %64:u32 = add %start_byte_offset, %63 - %65:ptr = access %a_1, %idx - %66:Outer = call %21, %64 - store %65, %66 - continue # -> $B7 + %66:u32 = mul %idx, 64u + %67:u32 = add %start_byte_offset_1, %66 + %68:ptr = access %a_1, %idx + %69:Inner = call %28, %67 + store %68, %69 + continue # -> $B8 } - $B7: { # continuing - %67:u32 = add %idx, 1u - next_iteration %67 # -> $B6 + $B8: { # continuing + %70:u32 = add %idx, 1u + next_iteration %70 # -> $B7 } } - %68:array = load %a_1 - ret %68 - } -} -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %70:array = call %24, %start_byte_offset_1 - %71:Outer = construct %70 + %71:array = load %a_1 ret %71 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat2x2(vec2(0.0f)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %73:mat2x2 = call %32, %start_byte_offset_2 + %74:Inner = construct %73 + ret %74 + } +} +%32 = func(%start_byte_offset_3:u32):mat2x2 { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %76:u32 = div %start_byte_offset_3, 16u + %77:ptr, read> = access %a, %76 + %78:u32 = mod %start_byte_offset_3, 16u + %79:u32 = div %78, 4u + %80:vec4 = load %77 + %81:vec2 = swizzle %80, zw + %82:vec2 = swizzle %80, xy + %83:bool = eq %79, 2u + %84:vec2 = hlsl.ternary %82, %81, %83 + %85:vec2 = bitcast %84 + %86:u32 = add 8u, %start_byte_offset_3 + %87:u32 = div %86, 16u + %88:ptr, read> = access %a, %87 + %89:u32 = mod %86, 16u + %90:u32 = div %89, 4u + %91:vec4 = load %88 + %92:vec2 = swizzle %91, zw + %93:vec2 = swizzle %91, xy + %94:bool = eq %90, 2u + %95:vec2 = hlsl.ternary %93, %92, %94 + %96:vec2 = bitcast %95 + %97:mat2x2 = construct %85, %96 + ret %97 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat2x2(vec2(0.0f)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %75:bool = gte %idx_1, 4u - if %75 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %101:bool = gte %idx_1, 4u + if %101 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %76:u32 = mul %idx_1, 64u - %77:u32 = add %start_byte_offset_2, %76 - %78:ptr = access %a_2, %idx_1 - %79:Inner = call %28, %77 - store %78, %79 - continue # -> $B13 + %102:u32 = mul %idx_1, 256u + %103:u32 = add %start_byte_offset_4, %102 + %104:ptr = access %a_2, %idx_1 + %105:Outer = call %21, %103 + store %104, %105 + continue # -> $B15 } - $B13: { # continuing - %80:u32 = add %idx_1, 1u - next_iteration %80 # -> $B12 + $B15: { # continuing + %106:u32 = add %idx_1, 1u + next_iteration %106 # -> $B14 } } - %81:array = load %a_2 - ret %81 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %83:mat2x2 = call %32, %start_byte_offset_3 - %84:Inner = construct %83 - ret %84 - } -} -%32 = func(%start_byte_offset_4:u32):mat2x2 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %86:u32 = div %start_byte_offset_4, 16u - %87:ptr, read> = access %a, %86 - %88:u32 = mod %start_byte_offset_4, 16u - %89:u32 = div %88, 4u - %90:vec4 = load %87 - %91:vec2 = swizzle %90, zw - %92:vec2 = swizzle %90, xy - %93:bool = eq %89, 2u - %94:vec2 = hlsl.ternary %92, %91, %93 - %95:vec2 = bitcast %94 - %96:u32 = add 8u, %start_byte_offset_4 - %97:u32 = div %96, 16u - %98:ptr, read> = access %a, %97 - %99:u32 = mod %96, 16u - %100:u32 = div %99, 4u - %101:vec4 = load %98 - %102:vec2 = swizzle %101, zw - %103:vec2 = swizzle %101, xy - %104:bool = eq %100, 2u - %105:vec2 = hlsl.ternary %103, %102, %104 - %106:vec2 = bitcast %105 - %107:mat2x2 = construct %95, %106 + %107:array = load %a_2 ret %107 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 8e5667cca1f..278dc9fce3d 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -139,67 +139,67 @@ $B1: { # root ret } } -%28 = func(%start_byte_offset:u32):Inner { +%24 = func(%start_byte_offset:u32):array { $B4: { - %60:mat2x2 = call %32, %start_byte_offset - %61:Inner = construct %60 - ret %61 - } -} -%32 = func(%start_byte_offset_1:u32):mat2x2 { # %start_byte_offset_1: 'start_byte_offset' - $B5: { - %63:u32 = div %start_byte_offset_1, 16u - %64:ptr, read> = access %a, %63 - %65:u32 = mod %start_byte_offset_1, 16u - %66:u32 = div %65, 4u - %67:vec4 = load %64 - %68:vec2 = swizzle %67, zw - %69:vec2 = swizzle %67, xy - %70:bool = eq %66, 2u - %71:vec2 = hlsl.ternary %69, %68, %70 - %72:vec2 = bitcast %71 - %73:u32 = add 8u, %start_byte_offset_1 - %74:u32 = div %73, 16u - %75:ptr, read> = access %a, %74 - %76:u32 = mod %73, 16u - %77:u32 = div %76, 4u - %78:vec4 = load %75 - %79:vec2 = swizzle %78, zw - %80:vec2 = swizzle %78, xy - %81:bool = eq %77, 2u - %82:vec2 = hlsl.ternary %80, %79, %81 - %83:vec2 = bitcast %82 - %84:mat2x2 = construct %72, %83 - ret %84 - } -} -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B6: { %a_1:ptr, read_write> = var, array(Inner(mat2x2(vec2(0.0f)))) # %a_1: 'a' - loop [i: $B7, b: $B8, c: $B9] { # loop_1 - $B7: { # initializer - next_iteration 0u # -> $B8 + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B8 (%idx:u32): { # body - %88:bool = gte %idx, 4u - if %88 [t: $B10] { # if_1 - $B10: { # true + $B6 (%idx:u32): { # body + %62:bool = gte %idx, 4u + if %62 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %89:u32 = mul %idx, 64u - %90:u32 = add %start_byte_offset_2, %89 - %91:ptr = access %a_1, %idx - %92:Inner = call %28, %90 - store %91, %92 - continue # -> $B9 + %63:u32 = mul %idx, 64u + %64:u32 = add %start_byte_offset, %63 + %65:ptr = access %a_1, %idx + %66:Inner = call %28, %64 + store %65, %66 + continue # -> $B7 } - $B9: { # continuing - %93:u32 = add %idx, 1u - next_iteration %93 # -> $B8 + $B7: { # continuing + %67:u32 = add %idx, 1u + next_iteration %67 # -> $B6 } } - %94:array = load %a_1 + %68:array = load %a_1 + ret %68 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %70:mat2x2 = call %32, %start_byte_offset_1 + %71:Inner = construct %70 + ret %71 + } +} +%32 = func(%start_byte_offset_2:u32):mat2x2 { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %73:u32 = div %start_byte_offset_2, 16u + %74:ptr, read> = access %a, %73 + %75:u32 = mod %start_byte_offset_2, 16u + %76:u32 = div %75, 4u + %77:vec4 = load %74 + %78:vec2 = swizzle %77, zw + %79:vec2 = swizzle %77, xy + %80:bool = eq %76, 2u + %81:vec2 = hlsl.ternary %79, %78, %80 + %82:vec2 = bitcast %81 + %83:u32 = add 8u, %start_byte_offset_2 + %84:u32 = div %83, 16u + %85:ptr, read> = access %a, %84 + %86:u32 = mod %83, 16u + %87:u32 = div %86, 4u + %88:vec4 = load %85 + %89:vec2 = swizzle %88, zw + %90:vec2 = swizzle %88, xy + %91:bool = eq %87, 2u + %92:vec2 = hlsl.ternary %90, %89, %91 + %93:vec2 = bitcast %92 + %94:mat2x2 = construct %82, %93 ret %94 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 6fd523d5891..ca56c886d99 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index cfbd0623e9d..99306bce8c2 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -141,94 +141,94 @@ $B1: { # root ret } } -%21 = func(%start_byte_offset:u32):Outer { +%18 = func(%start_byte_offset:u32):array { $B4: { - %60:array = call %24, %start_byte_offset - %61:Outer = construct %60 - ret %61 - } -} -%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' - $B5: { - %a_1:ptr, read_write> = var, array(Inner(mat2x3(vec3(0.0h)))) # %a_1: 'a' - loop [i: $B6, b: $B7, c: $B8] { # loop_1 - $B6: { # initializer - next_iteration 0u # -> $B7 + %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat2x3(vec3(0.0h)))))) # %a_1: 'a' + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B7 (%idx:u32): { # body - %65:bool = gte %idx, 4u - if %65 [t: $B9] { # if_1 - $B9: { # true + $B6 (%idx:u32): { # body + %62:bool = gte %idx, 4u + if %62 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %66:u32 = mul %idx, 64u - %67:u32 = add %start_byte_offset_1, %66 - %68:ptr = access %a_1, %idx - %69:Inner = call %28, %67 - store %68, %69 - continue # -> $B8 + %63:u32 = mul %idx, 256u + %64:u32 = add %start_byte_offset, %63 + %65:ptr = access %a_1, %idx + %66:Outer = call %21, %64 + store %65, %66 + continue # -> $B7 } - $B8: { # continuing - %70:u32 = add %idx, 1u - next_iteration %70 # -> $B7 + $B7: { # continuing + %67:u32 = add %idx, 1u + next_iteration %67 # -> $B6 } } - %71:array = load %a_1 - ret %71 - } -} -%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' - $B10: { - %73:mat2x3 = call %32, %start_byte_offset_2 - %74:Inner = construct %73 - ret %74 + %68:array = load %a_1 + ret %68 } } -%32 = func(%start_byte_offset_3:u32):mat2x3 { # %start_byte_offset_3: 'start_byte_offset' - $B11: { - %76:u32 = div %start_byte_offset_3, 16u - %77:ptr, read> = access %a, %76 - %78:vec4 = load %77 - %79:vec4 = bitcast %78 - %80:vec3 = swizzle %79, xyz - %81:u32 = add 8u, %start_byte_offset_3 - %82:u32 = div %81, 16u - %83:ptr, read> = access %a, %82 - %84:vec4 = load %83 - %85:vec4 = bitcast %84 - %86:vec3 = swizzle %85, xyz - %87:mat2x3 = construct %80, %86 - ret %87 +%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %70:array = call %24, %start_byte_offset_1 + %71:Outer = construct %70 + ret %71 } } -%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' - $B12: { - %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat2x3(vec3(0.0h)))))) # %a_2: 'a' - loop [i: $B13, b: $B14, c: $B15] { # loop_2 - $B13: { # initializer - next_iteration 0u # -> $B14 +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %a_2:ptr, read_write> = var, array(Inner(mat2x3(vec3(0.0h)))) # %a_2: 'a' + loop [i: $B11, b: $B12, c: $B13] { # loop_2 + $B11: { # initializer + next_iteration 0u # -> $B12 } - $B14 (%idx_1:u32): { # body - %91:bool = gte %idx_1, 4u - if %91 [t: $B16] { # if_2 - $B16: { # true + $B12 (%idx_1:u32): { # body + %75:bool = gte %idx_1, 4u + if %75 [t: $B14] { # if_2 + $B14: { # true exit_loop # loop_2 } } - %92:u32 = mul %idx_1, 256u - %93:u32 = add %start_byte_offset_4, %92 - %94:ptr = access %a_2, %idx_1 - %95:Outer = call %21, %93 - store %94, %95 - continue # -> $B15 + %76:u32 = mul %idx_1, 64u + %77:u32 = add %start_byte_offset_2, %76 + %78:ptr = access %a_2, %idx_1 + %79:Inner = call %28, %77 + store %78, %79 + continue # -> $B13 } - $B15: { # continuing - %96:u32 = add %idx_1, 1u - next_iteration %96 # -> $B14 + $B13: { # continuing + %80:u32 = add %idx_1, 1u + next_iteration %80 # -> $B12 } } - %97:array = load %a_2 + %81:array = load %a_2 + ret %81 + } +} +%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' + $B15: { + %83:mat2x3 = call %32, %start_byte_offset_3 + %84:Inner = construct %83 + ret %84 + } +} +%32 = func(%start_byte_offset_4:u32):mat2x3 { # %start_byte_offset_4: 'start_byte_offset' + $B16: { + %86:u32 = div %start_byte_offset_4, 16u + %87:ptr, read> = access %a, %86 + %88:vec4 = load %87 + %89:vec4 = bitcast %88 + %90:vec3 = swizzle %89, xyz + %91:u32 = add 8u, %start_byte_offset_4 + %92:u32 = div %91, 16u + %93:ptr, read> = access %a, %92 + %94:vec4 = load %93 + %95:vec4 = bitcast %94 + %96:vec3 = swizzle %95, xyz + %97:mat2x3 = construct %90, %96 ret %97 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 99306bce8c2..cfbd0623e9d 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -141,94 +141,94 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat2x3(vec3(0.0h)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %60:array = call %24, %start_byte_offset + %61:Outer = construct %60 + ret %61 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %a_1:ptr, read_write> = var, array(Inner(mat2x3(vec3(0.0h)))) # %a_1: 'a' + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %62:bool = gte %idx, 4u - if %62 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %65:bool = gte %idx, 4u + if %65 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %63:u32 = mul %idx, 256u - %64:u32 = add %start_byte_offset, %63 - %65:ptr = access %a_1, %idx - %66:Outer = call %21, %64 - store %65, %66 - continue # -> $B7 + %66:u32 = mul %idx, 64u + %67:u32 = add %start_byte_offset_1, %66 + %68:ptr = access %a_1, %idx + %69:Inner = call %28, %67 + store %68, %69 + continue # -> $B8 } - $B7: { # continuing - %67:u32 = add %idx, 1u - next_iteration %67 # -> $B6 + $B8: { # continuing + %70:u32 = add %idx, 1u + next_iteration %70 # -> $B7 } } - %68:array = load %a_1 - ret %68 - } -} -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %70:array = call %24, %start_byte_offset_1 - %71:Outer = construct %70 + %71:array = load %a_1 ret %71 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat2x3(vec3(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %73:mat2x3 = call %32, %start_byte_offset_2 + %74:Inner = construct %73 + ret %74 + } +} +%32 = func(%start_byte_offset_3:u32):mat2x3 { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %76:u32 = div %start_byte_offset_3, 16u + %77:ptr, read> = access %a, %76 + %78:vec4 = load %77 + %79:vec4 = bitcast %78 + %80:vec3 = swizzle %79, xyz + %81:u32 = add 8u, %start_byte_offset_3 + %82:u32 = div %81, 16u + %83:ptr, read> = access %a, %82 + %84:vec4 = load %83 + %85:vec4 = bitcast %84 + %86:vec3 = swizzle %85, xyz + %87:mat2x3 = construct %80, %86 + ret %87 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat2x3(vec3(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %75:bool = gte %idx_1, 4u - if %75 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %91:bool = gte %idx_1, 4u + if %91 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %76:u32 = mul %idx_1, 64u - %77:u32 = add %start_byte_offset_2, %76 - %78:ptr = access %a_2, %idx_1 - %79:Inner = call %28, %77 - store %78, %79 - continue # -> $B13 + %92:u32 = mul %idx_1, 256u + %93:u32 = add %start_byte_offset_4, %92 + %94:ptr = access %a_2, %idx_1 + %95:Outer = call %21, %93 + store %94, %95 + continue # -> $B15 } - $B13: { # continuing - %80:u32 = add %idx_1, 1u - next_iteration %80 # -> $B12 + $B15: { # continuing + %96:u32 = add %idx_1, 1u + next_iteration %96 # -> $B14 } } - %81:array = load %a_2 - ret %81 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %83:mat2x3 = call %32, %start_byte_offset_3 - %84:Inner = construct %83 - ret %84 - } -} -%32 = func(%start_byte_offset_4:u32):mat2x3 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %86:u32 = div %start_byte_offset_4, 16u - %87:ptr, read> = access %a, %86 - %88:vec4 = load %87 - %89:vec4 = bitcast %88 - %90:vec3 = swizzle %89, xyz - %91:u32 = add 8u, %start_byte_offset_4 - %92:u32 = div %91, 16u - %93:ptr, read> = access %a, %92 - %94:vec4 = load %93 - %95:vec4 = bitcast %94 - %96:vec3 = swizzle %95, xyz - %97:mat2x3 = construct %90, %96 + %97:array = load %a_2 ret %97 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index b6423edb97e..fe98c7a03fa 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl index c953e93b4c8..7db81476dee 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl index a99eee983b4..42997e03f42 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl index 866150257d4..c9d9f9a3a92 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl index 68ec99b03ae..26c8e356371 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index 70b218410ca..776c61115cd 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index d0f862ec5ec..8e556b1c1b3 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -134,57 +134,57 @@ $B1: { # root ret } } -%24 = func(%start_byte_offset:u32):array { +%32 = func(%start_byte_offset:u32):mat2x3 { $B4: { + %55:u32 = div %start_byte_offset, 16u + %56:ptr, read> = access %a, %55 + %57:vec4 = load %56 + %58:vec3 = swizzle %57, xyz + %59:vec3 = bitcast %58 + %60:u32 = add 16u, %start_byte_offset + %61:u32 = div %60, 16u + %62:ptr, read> = access %a, %61 + %63:vec4 = load %62 + %64:vec3 = swizzle %63, xyz + %65:vec3 = bitcast %64 + %66:mat2x3 = construct %59, %65 + ret %66 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %68:mat2x3 = call %32, %start_byte_offset_1 + %69:Inner = construct %68 + ret %69 + } +} +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B6: { %a_1:ptr, read_write> = var, array(Inner(mat2x3(vec3(0.0f)))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + loop [i: $B7, b: $B8, c: $B9] { # loop_1 + $B7: { # initializer + next_iteration 0u # -> $B8 } - $B6 (%idx:u32): { # body - %57:bool = gte %idx, 4u - if %57 [t: $B8] { # if_1 - $B8: { # true + $B8 (%idx:u32): { # body + %73:bool = gte %idx, 4u + if %73 [t: $B10] { # if_1 + $B10: { # true exit_loop # loop_1 } } - %58:u32 = mul %idx, 64u - %59:u32 = add %start_byte_offset, %58 - %60:ptr = access %a_1, %idx - %61:Inner = call %28, %59 - store %60, %61 - continue # -> $B7 + %74:u32 = mul %idx, 64u + %75:u32 = add %start_byte_offset_2, %74 + %76:ptr = access %a_1, %idx + %77:Inner = call %28, %75 + store %76, %77 + continue # -> $B9 } - $B7: { # continuing - %62:u32 = add %idx, 1u - next_iteration %62 # -> $B6 + $B9: { # continuing + %78:u32 = add %idx, 1u + next_iteration %78 # -> $B8 } } - %63:array = load %a_1 - ret %63 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %65:mat2x3 = call %32, %start_byte_offset_1 - %66:Inner = construct %65 - ret %66 - } -} -%32 = func(%start_byte_offset_2:u32):mat2x3 { # %start_byte_offset_2: 'start_byte_offset' - $B10: { - %68:u32 = div %start_byte_offset_2, 16u - %69:ptr, read> = access %a, %68 - %70:vec4 = load %69 - %71:vec3 = swizzle %70, xyz - %72:vec3 = bitcast %71 - %73:u32 = add 16u, %start_byte_offset_2 - %74:u32 = div %73, 16u - %75:ptr, read> = access %a, %74 - %76:vec4 = load %75 - %77:vec3 = swizzle %76, xyz - %78:vec3 = bitcast %77 - %79:mat2x3 = construct %72, %78 + %79:array = load %a_1 ret %79 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index a8a5b94b5ed..3dc2146d704 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index ed26be74b2f..421f139d9e3 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -140,62 +140,62 @@ $B1: { # root ret } } -%32 = func(%start_byte_offset:u32):mat2x4 { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %59:u32 = div %start_byte_offset, 16u - %60:ptr, read> = access %a, %59 - %61:vec4 = load %60 - %62:vec4 = bitcast %61 - %63:u32 = add 8u, %start_byte_offset - %64:u32 = div %63, 16u - %65:ptr, read> = access %a, %64 - %66:vec4 = load %65 - %67:vec4 = bitcast %66 - %68:mat2x4 = construct %62, %67 - ret %68 + %59:array = call %24, %start_byte_offset + %60:Outer = construct %59 + ret %60 } } -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' $B5: { - %70:mat2x4 = call %32, %start_byte_offset_1 - %71:Inner = construct %70 - ret %71 - } -} -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B6: { %a_1:ptr, read_write> = var, array(Inner(mat2x4(vec4(0.0h)))) # %a_1: 'a' - loop [i: $B7, b: $B8, c: $B9] { # loop_1 - $B7: { # initializer - next_iteration 0u # -> $B8 + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B8 (%idx:u32): { # body - %75:bool = gte %idx, 4u - if %75 [t: $B10] { # if_1 - $B10: { # true + $B7 (%idx:u32): { # body + %64:bool = gte %idx, 4u + if %64 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %76:u32 = mul %idx, 64u - %77:u32 = add %start_byte_offset_2, %76 - %78:ptr = access %a_1, %idx - %79:Inner = call %28, %77 - store %78, %79 - continue # -> $B9 + %65:u32 = mul %idx, 64u + %66:u32 = add %start_byte_offset_1, %65 + %67:ptr = access %a_1, %idx + %68:Inner = call %28, %66 + store %67, %68 + continue # -> $B8 } - $B9: { # continuing - %80:u32 = add %idx, 1u - next_iteration %80 # -> $B8 + $B8: { # continuing + %69:u32 = add %idx, 1u + next_iteration %69 # -> $B7 } } - %81:array = load %a_1 - ret %81 + %70:array = load %a_1 + ret %70 + } +} +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %72:mat2x4 = call %32, %start_byte_offset_2 + %73:Inner = construct %72 + ret %73 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' +%32 = func(%start_byte_offset_3:u32):mat2x4 { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %83:array = call %24, %start_byte_offset_3 - %84:Outer = construct %83 + %75:u32 = div %start_byte_offset_3, 16u + %76:ptr, read> = access %a, %75 + %77:vec4 = load %76 + %78:vec4 = bitcast %77 + %79:u32 = add 8u, %start_byte_offset_3 + %80:u32 = div %79, 16u + %81:ptr, read> = access %a, %80 + %82:vec4 = load %81 + %83:vec4 = bitcast %82 + %84:mat2x4 = construct %78, %83 ret %84 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 164afa67b18..a2f9bf94b5e 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -140,9 +140,9 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%24 = func(%start_byte_offset:u32):array { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat2x4(vec4(0.0h)))))) # %a_1: 'a' + %a_1:ptr, read_write> = var, array(Inner(mat2x4(vec4(0.0h)))) # %a_1: 'a' loop [i: $B5, b: $B6, c: $B7] { # loop_1 $B5: { # initializer next_iteration 0u # -> $B6 @@ -154,10 +154,10 @@ $B1: { # root exit_loop # loop_1 } } - %62:u32 = mul %idx, 256u + %62:u32 = mul %idx, 64u %63:u32 = add %start_byte_offset, %62 - %64:ptr = access %a_1, %idx - %65:Outer = call %21, %63 + %64:ptr = access %a_1, %idx + %65:Inner = call %28, %63 store %64, %65 continue # -> $B7 } @@ -166,66 +166,66 @@ $B1: { # root next_iteration %66 # -> $B6 } } - %67:array = load %a_1 + %67:array = load %a_1 ret %67 } } -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' $B9: { - %69:array = call %24, %start_byte_offset_1 - %70:Outer = construct %69 + %69:mat2x4 = call %32, %start_byte_offset_1 + %70:Inner = construct %69 ret %70 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%32 = func(%start_byte_offset_2:u32):mat2x4 { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat2x4(vec4(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %72:u32 = div %start_byte_offset_2, 16u + %73:ptr, read> = access %a, %72 + %74:vec4 = load %73 + %75:vec4 = bitcast %74 + %76:u32 = add 8u, %start_byte_offset_2 + %77:u32 = div %76, 16u + %78:ptr, read> = access %a, %77 + %79:vec4 = load %78 + %80:vec4 = bitcast %79 + %81:mat2x4 = construct %75, %80 + ret %81 + } +} +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %83:array = call %24, %start_byte_offset_3 + %84:Outer = construct %83 + ret %84 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat2x4(vec4(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %74:bool = gte %idx_1, 4u - if %74 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %88:bool = gte %idx_1, 4u + if %88 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %75:u32 = mul %idx_1, 64u - %76:u32 = add %start_byte_offset_2, %75 - %77:ptr = access %a_2, %idx_1 - %78:Inner = call %28, %76 - store %77, %78 - continue # -> $B13 + %89:u32 = mul %idx_1, 256u + %90:u32 = add %start_byte_offset_4, %89 + %91:ptr = access %a_2, %idx_1 + %92:Outer = call %21, %90 + store %91, %92 + continue # -> $B15 } - $B13: { # continuing - %79:u32 = add %idx_1, 1u - next_iteration %79 # -> $B12 + $B15: { # continuing + %93:u32 = add %idx_1, 1u + next_iteration %93 # -> $B14 } } - %80:array = load %a_2 - ret %80 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %82:mat2x4 = call %32, %start_byte_offset_3 - %83:Inner = construct %82 - ret %83 - } -} -%32 = func(%start_byte_offset_4:u32):mat2x4 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %85:u32 = div %start_byte_offset_4, 16u - %86:ptr, read> = access %a, %85 - %87:vec4 = load %86 - %88:vec4 = bitcast %87 - %89:u32 = add 8u, %start_byte_offset_4 - %90:u32 = div %89, 16u - %91:ptr, read> = access %a, %90 - %92:vec4 = load %91 - %93:vec4 = bitcast %92 - %94:mat2x4 = construct %88, %93 + %94:array = load %a_2 ret %94 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 70790818566..f43b5841ee0 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl index d0a1e2aa7e9..6bd91b9d1bb 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl index 101e9f187f1..2abf7e6c50a 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl index 8a9cf8b233c..475d15d096c 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl index 7cac57d8528..b746123b720 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index a542fd9aa8e..01cdb088c7d 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index feda416201f..ee58aee6863 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -133,55 +133,55 @@ $B1: { # root ret } } -%32 = func(%start_byte_offset:u32):mat2x4 { +%24 = func(%start_byte_offset:u32):array { $B4: { - %54:u32 = div %start_byte_offset, 16u - %55:ptr, read> = access %a, %54 - %56:vec4 = load %55 - %57:vec4 = bitcast %56 - %58:u32 = add 16u, %start_byte_offset - %59:u32 = div %58, 16u - %60:ptr, read> = access %a, %59 - %61:vec4 = load %60 - %62:vec4 = bitcast %61 - %63:mat2x4 = construct %57, %62 - ret %63 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B5: { - %65:mat2x4 = call %32, %start_byte_offset_1 - %66:Inner = construct %65 - ret %66 - } -} -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B6: { %a_1:ptr, read_write> = var, array(Inner(mat2x4(vec4(0.0f)))) # %a_1: 'a' - loop [i: $B7, b: $B8, c: $B9] { # loop_1 - $B7: { # initializer - next_iteration 0u # -> $B8 + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B8 (%idx:u32): { # body - %70:bool = gte %idx, 4u - if %70 [t: $B10] { # if_1 - $B10: { # true + $B6 (%idx:u32): { # body + %56:bool = gte %idx, 4u + if %56 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %71:u32 = mul %idx, 64u - %72:u32 = add %start_byte_offset_2, %71 - %73:ptr = access %a_1, %idx - %74:Inner = call %28, %72 - store %73, %74 - continue # -> $B9 + %57:u32 = mul %idx, 64u + %58:u32 = add %start_byte_offset, %57 + %59:ptr = access %a_1, %idx + %60:Inner = call %28, %58 + store %59, %60 + continue # -> $B7 } - $B9: { # continuing - %75:u32 = add %idx, 1u - next_iteration %75 # -> $B8 + $B7: { # continuing + %61:u32 = add %idx, 1u + next_iteration %61 # -> $B6 } } - %76:array = load %a_1 + %62:array = load %a_1 + ret %62 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %64:mat2x4 = call %32, %start_byte_offset_1 + %65:Inner = construct %64 + ret %65 + } +} +%32 = func(%start_byte_offset_2:u32):mat2x4 { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %67:u32 = div %start_byte_offset_2, 16u + %68:ptr, read> = access %a, %67 + %69:vec4 = load %68 + %70:vec4 = bitcast %69 + %71:u32 = add 16u, %start_byte_offset_2 + %72:u32 = div %71, 16u + %73:ptr, read> = access %a, %72 + %74:vec4 = load %73 + %75:vec4 = bitcast %74 + %76:mat2x4 = construct %70, %75 ret %76 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index c9a8305a481..d4a0e76bacd 100644 --- a/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat2x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -133,62 +133,62 @@ $B1: { # root ret } } -%28 = func(%start_byte_offset:u32):Inner { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %54:mat2x4 = call %32, %start_byte_offset - %55:Inner = construct %54 + %54:array = call %24, %start_byte_offset + %55:Outer = construct %54 ret %55 } } -%32 = func(%start_byte_offset_1:u32):mat2x4 { # %start_byte_offset_1: 'start_byte_offset' +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' $B5: { - %57:u32 = div %start_byte_offset_1, 16u - %58:ptr, read> = access %a, %57 - %59:vec4 = load %58 - %60:vec4 = bitcast %59 - %61:u32 = add 16u, %start_byte_offset_1 - %62:u32 = div %61, 16u - %63:ptr, read> = access %a, %62 - %64:vec4 = load %63 - %65:vec4 = bitcast %64 - %66:mat2x4 = construct %60, %65 - ret %66 - } -} -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B6: { %a_1:ptr, read_write> = var, array(Inner(mat2x4(vec4(0.0f)))) # %a_1: 'a' - loop [i: $B7, b: $B8, c: $B9] { # loop_1 - $B7: { # initializer - next_iteration 0u # -> $B8 + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B8 (%idx:u32): { # body - %70:bool = gte %idx, 4u - if %70 [t: $B10] { # if_1 - $B10: { # true + $B7 (%idx:u32): { # body + %59:bool = gte %idx, 4u + if %59 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %71:u32 = mul %idx, 64u - %72:u32 = add %start_byte_offset_2, %71 - %73:ptr = access %a_1, %idx - %74:Inner = call %28, %72 - store %73, %74 - continue # -> $B9 + %60:u32 = mul %idx, 64u + %61:u32 = add %start_byte_offset_1, %60 + %62:ptr = access %a_1, %idx + %63:Inner = call %28, %61 + store %62, %63 + continue # -> $B8 } - $B9: { # continuing - %75:u32 = add %idx, 1u - next_iteration %75 # -> $B8 + $B8: { # continuing + %64:u32 = add %idx, 1u + next_iteration %64 # -> $B7 } } - %76:array = load %a_1 - ret %76 + %65:array = load %a_1 + ret %65 + } +} +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %67:mat2x4 = call %32, %start_byte_offset_2 + %68:Inner = construct %67 + ret %68 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' +%32 = func(%start_byte_offset_3:u32):mat2x4 { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %78:array = call %24, %start_byte_offset_3 - %79:Outer = construct %78 + %70:u32 = div %start_byte_offset_3, 16u + %71:ptr, read> = access %a, %70 + %72:vec4 = load %71 + %73:vec4 = bitcast %72 + %74:u32 = add 16u, %start_byte_offset_3 + %75:u32 = div %74, 16u + %76:ptr, read> = access %a, %75 + %77:vec4 = load %76 + %78:vec4 = bitcast %77 + %79:mat2x4 = construct %73, %78 ret %79 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 33d8d34b745..f4b542a2f32 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 37a49767f6e..3dbc5f6d311 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -146,9 +146,9 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%24 = func(%start_byte_offset:u32):array { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat3x2(vec2(0.0h)))))) # %a_1: 'a' + %a_1:ptr, read_write> = var, array(Inner(mat3x2(vec2(0.0h)))) # %a_1: 'a' loop [i: $B5, b: $B6, c: $B7] { # loop_1 $B5: { # initializer next_iteration 0u # -> $B6 @@ -160,10 +160,10 @@ $B1: { # root exit_loop # loop_1 } } - %68:u32 = mul %idx, 256u + %68:u32 = mul %idx, 64u %69:u32 = add %start_byte_offset, %68 - %70:ptr = access %a_1, %idx - %71:Outer = call %21, %69 + %70:ptr = access %a_1, %idx + %71:Inner = call %28, %69 store %70, %71 continue # -> $B7 } @@ -172,89 +172,89 @@ $B1: { # root next_iteration %72 # -> $B6 } } - %73:array = load %a_1 + %73:array = load %a_1 ret %73 } } -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' $B9: { - %75:array = call %24, %start_byte_offset_1 - %76:Outer = construct %75 + %75:mat3x2 = call %32, %start_byte_offset_1 + %76:Inner = construct %75 ret %76 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%32 = func(%start_byte_offset_2:u32):mat3x2 { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat3x2(vec2(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %78:u32 = div %start_byte_offset_2, 16u + %79:ptr, read> = access %a, %78 + %80:u32 = mod %start_byte_offset_2, 16u + %81:u32 = div %80, 4u + %82:vec4 = load %79 + %83:u32 = swizzle %82, z + %84:u32 = swizzle %82, x + %85:bool = eq %81, 2u + %86:u32 = hlsl.ternary %84, %83, %85 + %87:vec2 = bitcast %86 + %88:u32 = add 4u, %start_byte_offset_2 + %89:u32 = div %88, 16u + %90:ptr, read> = access %a, %89 + %91:u32 = mod %88, 16u + %92:u32 = div %91, 4u + %93:vec4 = load %90 + %94:u32 = swizzle %93, z + %95:u32 = swizzle %93, x + %96:bool = eq %92, 2u + %97:u32 = hlsl.ternary %95, %94, %96 + %98:vec2 = bitcast %97 + %99:u32 = add 8u, %start_byte_offset_2 + %100:u32 = div %99, 16u + %101:ptr, read> = access %a, %100 + %102:u32 = mod %99, 16u + %103:u32 = div %102, 4u + %104:vec4 = load %101 + %105:u32 = swizzle %104, z + %106:u32 = swizzle %104, x + %107:bool = eq %103, 2u + %108:u32 = hlsl.ternary %106, %105, %107 + %109:vec2 = bitcast %108 + %110:mat3x2 = construct %87, %98, %109 + ret %110 + } +} +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %112:array = call %24, %start_byte_offset_3 + %113:Outer = construct %112 + ret %113 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat3x2(vec2(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %80:bool = gte %idx_1, 4u - if %80 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %117:bool = gte %idx_1, 4u + if %117 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %81:u32 = mul %idx_1, 64u - %82:u32 = add %start_byte_offset_2, %81 - %83:ptr = access %a_2, %idx_1 - %84:Inner = call %28, %82 - store %83, %84 - continue # -> $B13 + %118:u32 = mul %idx_1, 256u + %119:u32 = add %start_byte_offset_4, %118 + %120:ptr = access %a_2, %idx_1 + %121:Outer = call %21, %119 + store %120, %121 + continue # -> $B15 } - $B13: { # continuing - %85:u32 = add %idx_1, 1u - next_iteration %85 # -> $B12 + $B15: { # continuing + %122:u32 = add %idx_1, 1u + next_iteration %122 # -> $B14 } } - %86:array = load %a_2 - ret %86 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %88:mat3x2 = call %32, %start_byte_offset_3 - %89:Inner = construct %88 - ret %89 - } -} -%32 = func(%start_byte_offset_4:u32):mat3x2 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %91:u32 = div %start_byte_offset_4, 16u - %92:ptr, read> = access %a, %91 - %93:u32 = mod %start_byte_offset_4, 16u - %94:u32 = div %93, 4u - %95:vec4 = load %92 - %96:u32 = swizzle %95, z - %97:u32 = swizzle %95, x - %98:bool = eq %94, 2u - %99:u32 = hlsl.ternary %97, %96, %98 - %100:vec2 = bitcast %99 - %101:u32 = add 4u, %start_byte_offset_4 - %102:u32 = div %101, 16u - %103:ptr, read> = access %a, %102 - %104:u32 = mod %101, 16u - %105:u32 = div %104, 4u - %106:vec4 = load %103 - %107:u32 = swizzle %106, z - %108:u32 = swizzle %106, x - %109:bool = eq %105, 2u - %110:u32 = hlsl.ternary %108, %107, %109 - %111:vec2 = bitcast %110 - %112:u32 = add 8u, %start_byte_offset_4 - %113:u32 = div %112, 16u - %114:ptr, read> = access %a, %113 - %115:u32 = mod %112, 16u - %116:u32 = div %115, 4u - %117:vec4 = load %114 - %118:u32 = swizzle %117, z - %119:u32 = swizzle %117, x - %120:bool = eq %116, 2u - %121:u32 = hlsl.ternary %119, %118, %120 - %122:vec2 = bitcast %121 - %123:mat3x2 = construct %100, %111, %122 + %123:array = load %a_2 ret %123 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 37a49767f6e..ac16a97cf01 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -146,115 +146,115 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat3x2(vec2(0.0h)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %65:array = call %24, %start_byte_offset + %66:Outer = construct %65 + ret %66 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %a_1:ptr, read_write> = var, array(Inner(mat3x2(vec2(0.0h)))) # %a_1: 'a' + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %67:bool = gte %idx, 4u - if %67 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %70:bool = gte %idx, 4u + if %70 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %68:u32 = mul %idx, 256u - %69:u32 = add %start_byte_offset, %68 - %70:ptr = access %a_1, %idx - %71:Outer = call %21, %69 - store %70, %71 - continue # -> $B7 + %71:u32 = mul %idx, 64u + %72:u32 = add %start_byte_offset_1, %71 + %73:ptr = access %a_1, %idx + %74:Inner = call %28, %72 + store %73, %74 + continue # -> $B8 } - $B7: { # continuing - %72:u32 = add %idx, 1u - next_iteration %72 # -> $B6 + $B8: { # continuing + %75:u32 = add %idx, 1u + next_iteration %75 # -> $B7 } } - %73:array = load %a_1 - ret %73 - } -} -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %75:array = call %24, %start_byte_offset_1 - %76:Outer = construct %75 + %76:array = load %a_1 ret %76 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat3x2(vec2(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %78:mat3x2 = call %32, %start_byte_offset_2 + %79:Inner = construct %78 + ret %79 + } +} +%32 = func(%start_byte_offset_3:u32):mat3x2 { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %81:u32 = div %start_byte_offset_3, 16u + %82:ptr, read> = access %a, %81 + %83:u32 = mod %start_byte_offset_3, 16u + %84:u32 = div %83, 4u + %85:vec4 = load %82 + %86:u32 = swizzle %85, z + %87:u32 = swizzle %85, x + %88:bool = eq %84, 2u + %89:u32 = hlsl.ternary %87, %86, %88 + %90:vec2 = bitcast %89 + %91:u32 = add 4u, %start_byte_offset_3 + %92:u32 = div %91, 16u + %93:ptr, read> = access %a, %92 + %94:u32 = mod %91, 16u + %95:u32 = div %94, 4u + %96:vec4 = load %93 + %97:u32 = swizzle %96, z + %98:u32 = swizzle %96, x + %99:bool = eq %95, 2u + %100:u32 = hlsl.ternary %98, %97, %99 + %101:vec2 = bitcast %100 + %102:u32 = add 8u, %start_byte_offset_3 + %103:u32 = div %102, 16u + %104:ptr, read> = access %a, %103 + %105:u32 = mod %102, 16u + %106:u32 = div %105, 4u + %107:vec4 = load %104 + %108:u32 = swizzle %107, z + %109:u32 = swizzle %107, x + %110:bool = eq %106, 2u + %111:u32 = hlsl.ternary %109, %108, %110 + %112:vec2 = bitcast %111 + %113:mat3x2 = construct %90, %101, %112 + ret %113 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat3x2(vec2(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %80:bool = gte %idx_1, 4u - if %80 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %117:bool = gte %idx_1, 4u + if %117 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %81:u32 = mul %idx_1, 64u - %82:u32 = add %start_byte_offset_2, %81 - %83:ptr = access %a_2, %idx_1 - %84:Inner = call %28, %82 - store %83, %84 - continue # -> $B13 + %118:u32 = mul %idx_1, 256u + %119:u32 = add %start_byte_offset_4, %118 + %120:ptr = access %a_2, %idx_1 + %121:Outer = call %21, %119 + store %120, %121 + continue # -> $B15 } - $B13: { # continuing - %85:u32 = add %idx_1, 1u - next_iteration %85 # -> $B12 + $B15: { # continuing + %122:u32 = add %idx_1, 1u + next_iteration %122 # -> $B14 } } - %86:array = load %a_2 - ret %86 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %88:mat3x2 = call %32, %start_byte_offset_3 - %89:Inner = construct %88 - ret %89 - } -} -%32 = func(%start_byte_offset_4:u32):mat3x2 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %91:u32 = div %start_byte_offset_4, 16u - %92:ptr, read> = access %a, %91 - %93:u32 = mod %start_byte_offset_4, 16u - %94:u32 = div %93, 4u - %95:vec4 = load %92 - %96:u32 = swizzle %95, z - %97:u32 = swizzle %95, x - %98:bool = eq %94, 2u - %99:u32 = hlsl.ternary %97, %96, %98 - %100:vec2 = bitcast %99 - %101:u32 = add 4u, %start_byte_offset_4 - %102:u32 = div %101, 16u - %103:ptr, read> = access %a, %102 - %104:u32 = mod %101, 16u - %105:u32 = div %104, 4u - %106:vec4 = load %103 - %107:u32 = swizzle %106, z - %108:u32 = swizzle %106, x - %109:bool = eq %105, 2u - %110:u32 = hlsl.ternary %108, %107, %109 - %111:vec2 = bitcast %110 - %112:u32 = add 8u, %start_byte_offset_4 - %113:u32 = div %112, 16u - %114:ptr, read> = access %a, %113 - %115:u32 = mod %112, 16u - %116:u32 = div %115, 4u - %117:vec4 = load %114 - %118:u32 = swizzle %117, z - %119:u32 = swizzle %117, x - %120:bool = eq %116, 2u - %121:u32 = hlsl.ternary %119, %118, %120 - %122:vec2 = bitcast %121 - %123:mat3x2 = construct %100, %111, %122 + %123:array = load %a_2 ret %123 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index efbc5020cb9..cd4407ec47b 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl index a77f078e6a0..28784263cb2 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl index 9ad8e1b35c1..63efbd5e2bf 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl index 689761cb627..9e253a6a873 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl index f5b999f2d1f..e9c39a8a46a 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl index fe382cae1d9..9ebd14180b1 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 56ec61a2db6..ce65b77a393 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -139,85 +139,85 @@ $B1: { # root ret } } -%21 = func(%start_byte_offset:u32):Outer { +%24 = func(%start_byte_offset:u32):array { $B4: { - %60:array = call %24, %start_byte_offset - %61:Outer = construct %60 - ret %61 - } -} -%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' - $B5: { %a_1:ptr, read_write> = var, array(Inner(mat3x2(vec2(0.0f)))) # %a_1: 'a' - loop [i: $B6, b: $B7, c: $B8] { # loop_1 - $B6: { # initializer - next_iteration 0u # -> $B7 + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B7 (%idx:u32): { # body - %65:bool = gte %idx, 4u - if %65 [t: $B9] { # if_1 - $B9: { # true + $B6 (%idx:u32): { # body + %62:bool = gte %idx, 4u + if %62 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %66:u32 = mul %idx, 64u - %67:u32 = add %start_byte_offset_1, %66 - %68:ptr = access %a_1, %idx - %69:Inner = call %28, %67 - store %68, %69 - continue # -> $B8 + %63:u32 = mul %idx, 64u + %64:u32 = add %start_byte_offset, %63 + %65:ptr = access %a_1, %idx + %66:Inner = call %28, %64 + store %65, %66 + continue # -> $B7 } - $B8: { # continuing - %70:u32 = add %idx, 1u - next_iteration %70 # -> $B7 + $B7: { # continuing + %67:u32 = add %idx, 1u + next_iteration %67 # -> $B6 } } - %71:array = load %a_1 + %68:array = load %a_1 + ret %68 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %70:mat3x2 = call %32, %start_byte_offset_1 + %71:Inner = construct %70 ret %71 } } -%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' +%32 = func(%start_byte_offset_2:u32):mat3x2 { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %73:mat3x2 = call %32, %start_byte_offset_2 - %74:Inner = construct %73 - ret %74 + %73:u32 = div %start_byte_offset_2, 16u + %74:ptr, read> = access %a, %73 + %75:u32 = mod %start_byte_offset_2, 16u + %76:u32 = div %75, 4u + %77:vec4 = load %74 + %78:vec2 = swizzle %77, zw + %79:vec2 = swizzle %77, xy + %80:bool = eq %76, 2u + %81:vec2 = hlsl.ternary %79, %78, %80 + %82:vec2 = bitcast %81 + %83:u32 = add 8u, %start_byte_offset_2 + %84:u32 = div %83, 16u + %85:ptr, read> = access %a, %84 + %86:u32 = mod %83, 16u + %87:u32 = div %86, 4u + %88:vec4 = load %85 + %89:vec2 = swizzle %88, zw + %90:vec2 = swizzle %88, xy + %91:bool = eq %87, 2u + %92:vec2 = hlsl.ternary %90, %89, %91 + %93:vec2 = bitcast %92 + %94:u32 = add 16u, %start_byte_offset_2 + %95:u32 = div %94, 16u + %96:ptr, read> = access %a, %95 + %97:u32 = mod %94, 16u + %98:u32 = div %97, 4u + %99:vec4 = load %96 + %100:vec2 = swizzle %99, zw + %101:vec2 = swizzle %99, xy + %102:bool = eq %98, 2u + %103:vec2 = hlsl.ternary %101, %100, %102 + %104:vec2 = bitcast %103 + %105:mat3x2 = construct %82, %93, %104 + ret %105 } } -%32 = func(%start_byte_offset_3:u32):mat3x2 { # %start_byte_offset_3: 'start_byte_offset' +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %76:u32 = div %start_byte_offset_3, 16u - %77:ptr, read> = access %a, %76 - %78:u32 = mod %start_byte_offset_3, 16u - %79:u32 = div %78, 4u - %80:vec4 = load %77 - %81:vec2 = swizzle %80, zw - %82:vec2 = swizzle %80, xy - %83:bool = eq %79, 2u - %84:vec2 = hlsl.ternary %82, %81, %83 - %85:vec2 = bitcast %84 - %86:u32 = add 8u, %start_byte_offset_3 - %87:u32 = div %86, 16u - %88:ptr, read> = access %a, %87 - %89:u32 = mod %86, 16u - %90:u32 = div %89, 4u - %91:vec4 = load %88 - %92:vec2 = swizzle %91, zw - %93:vec2 = swizzle %91, xy - %94:bool = eq %90, 2u - %95:vec2 = hlsl.ternary %93, %92, %94 - %96:vec2 = bitcast %95 - %97:u32 = add 16u, %start_byte_offset_3 - %98:u32 = div %97, 16u - %99:ptr, read> = access %a, %98 - %100:u32 = mod %97, 16u - %101:u32 = div %100, 4u - %102:vec4 = load %99 - %103:vec2 = swizzle %102, zw - %104:vec2 = swizzle %102, xy - %105:bool = eq %101, 2u - %106:vec2 = hlsl.ternary %104, %103, %105 - %107:vec2 = bitcast %106 - %108:mat3x2 = construct %85, %96, %107 + %107:array = call %24, %start_byte_offset_3 + %108:Outer = construct %107 ret %108 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 56ec61a2db6..6dd002387a9 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -139,85 +139,85 @@ $B1: { # root ret } } -%21 = func(%start_byte_offset:u32):Outer { +%32 = func(%start_byte_offset:u32):mat3x2 { $B4: { - %60:array = call %24, %start_byte_offset - %61:Outer = construct %60 - ret %61 + %60:u32 = div %start_byte_offset, 16u + %61:ptr, read> = access %a, %60 + %62:u32 = mod %start_byte_offset, 16u + %63:u32 = div %62, 4u + %64:vec4 = load %61 + %65:vec2 = swizzle %64, zw + %66:vec2 = swizzle %64, xy + %67:bool = eq %63, 2u + %68:vec2 = hlsl.ternary %66, %65, %67 + %69:vec2 = bitcast %68 + %70:u32 = add 8u, %start_byte_offset + %71:u32 = div %70, 16u + %72:ptr, read> = access %a, %71 + %73:u32 = mod %70, 16u + %74:u32 = div %73, 4u + %75:vec4 = load %72 + %76:vec2 = swizzle %75, zw + %77:vec2 = swizzle %75, xy + %78:bool = eq %74, 2u + %79:vec2 = hlsl.ternary %77, %76, %78 + %80:vec2 = bitcast %79 + %81:u32 = add 16u, %start_byte_offset + %82:u32 = div %81, 16u + %83:ptr, read> = access %a, %82 + %84:u32 = mod %81, 16u + %85:u32 = div %84, 4u + %86:vec4 = load %83 + %87:vec2 = swizzle %86, zw + %88:vec2 = swizzle %86, xy + %89:bool = eq %85, 2u + %90:vec2 = hlsl.ternary %88, %87, %89 + %91:vec2 = bitcast %90 + %92:mat3x2 = construct %69, %80, %91 + ret %92 } } -%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' $B5: { + %94:mat3x2 = call %32, %start_byte_offset_1 + %95:Inner = construct %94 + ret %95 + } +} +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B6: { %a_1:ptr, read_write> = var, array(Inner(mat3x2(vec2(0.0f)))) # %a_1: 'a' - loop [i: $B6, b: $B7, c: $B8] { # loop_1 - $B6: { # initializer - next_iteration 0u # -> $B7 + loop [i: $B7, b: $B8, c: $B9] { # loop_1 + $B7: { # initializer + next_iteration 0u # -> $B8 } - $B7 (%idx:u32): { # body - %65:bool = gte %idx, 4u - if %65 [t: $B9] { # if_1 - $B9: { # true + $B8 (%idx:u32): { # body + %99:bool = gte %idx, 4u + if %99 [t: $B10] { # if_1 + $B10: { # true exit_loop # loop_1 } } - %66:u32 = mul %idx, 64u - %67:u32 = add %start_byte_offset_1, %66 - %68:ptr = access %a_1, %idx - %69:Inner = call %28, %67 - store %68, %69 - continue # -> $B8 + %100:u32 = mul %idx, 64u + %101:u32 = add %start_byte_offset_2, %100 + %102:ptr = access %a_1, %idx + %103:Inner = call %28, %101 + store %102, %103 + continue # -> $B9 } - $B8: { # continuing - %70:u32 = add %idx, 1u - next_iteration %70 # -> $B7 + $B9: { # continuing + %104:u32 = add %idx, 1u + next_iteration %104 # -> $B8 } } - %71:array = load %a_1 - ret %71 - } -} -%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' - $B10: { - %73:mat3x2 = call %32, %start_byte_offset_2 - %74:Inner = construct %73 - ret %74 + %105:array = load %a_1 + ret %105 } } -%32 = func(%start_byte_offset_3:u32):mat3x2 { # %start_byte_offset_3: 'start_byte_offset' +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %76:u32 = div %start_byte_offset_3, 16u - %77:ptr, read> = access %a, %76 - %78:u32 = mod %start_byte_offset_3, 16u - %79:u32 = div %78, 4u - %80:vec4 = load %77 - %81:vec2 = swizzle %80, zw - %82:vec2 = swizzle %80, xy - %83:bool = eq %79, 2u - %84:vec2 = hlsl.ternary %82, %81, %83 - %85:vec2 = bitcast %84 - %86:u32 = add 8u, %start_byte_offset_3 - %87:u32 = div %86, 16u - %88:ptr, read> = access %a, %87 - %89:u32 = mod %86, 16u - %90:u32 = div %89, 4u - %91:vec4 = load %88 - %92:vec2 = swizzle %91, zw - %93:vec2 = swizzle %91, xy - %94:bool = eq %90, 2u - %95:vec2 = hlsl.ternary %93, %92, %94 - %96:vec2 = bitcast %95 - %97:u32 = add 16u, %start_byte_offset_3 - %98:u32 = div %97, 16u - %99:ptr, read> = access %a, %98 - %100:u32 = mod %97, 16u - %101:u32 = div %100, 4u - %102:vec4 = load %99 - %103:vec2 = swizzle %102, zw - %104:vec2 = swizzle %102, xy - %105:bool = eq %101, 2u - %106:vec2 = hlsl.ternary %104, %103, %105 - %107:vec2 = bitcast %106 - %108:mat3x2 = construct %85, %96, %107 + %107:array = call %24, %start_byte_offset_3 + %108:Outer = construct %107 ret %108 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 66e9a0d7dad..3373a1cea15 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 040fea09c1c..b7fdeb22aa4 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -141,100 +141,100 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat3x3(vec3(0.0h)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %60:array = call %24, %start_byte_offset + %61:Outer = construct %60 + ret %61 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %a_1:ptr, read_write> = var, array(Inner(mat3x3(vec3(0.0h)))) # %a_1: 'a' + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %62:bool = gte %idx, 4u - if %62 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %65:bool = gte %idx, 4u + if %65 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %63:u32 = mul %idx, 256u - %64:u32 = add %start_byte_offset, %63 - %65:ptr = access %a_1, %idx - %66:Outer = call %21, %64 - store %65, %66 - continue # -> $B7 + %66:u32 = mul %idx, 64u + %67:u32 = add %start_byte_offset_1, %66 + %68:ptr = access %a_1, %idx + %69:Inner = call %28, %67 + store %68, %69 + continue # -> $B8 } - $B7: { # continuing - %67:u32 = add %idx, 1u - next_iteration %67 # -> $B6 + $B8: { # continuing + %70:u32 = add %idx, 1u + next_iteration %70 # -> $B7 } } - %68:array = load %a_1 - ret %68 - } -} -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %70:array = call %24, %start_byte_offset_1 - %71:Outer = construct %70 + %71:array = load %a_1 ret %71 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat3x3(vec3(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %73:mat3x3 = call %32, %start_byte_offset_2 + %74:Inner = construct %73 + ret %74 + } +} +%32 = func(%start_byte_offset_3:u32):mat3x3 { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %76:u32 = div %start_byte_offset_3, 16u + %77:ptr, read> = access %a, %76 + %78:vec4 = load %77 + %79:vec4 = bitcast %78 + %80:vec3 = swizzle %79, xyz + %81:u32 = add 8u, %start_byte_offset_3 + %82:u32 = div %81, 16u + %83:ptr, read> = access %a, %82 + %84:vec4 = load %83 + %85:vec4 = bitcast %84 + %86:vec3 = swizzle %85, xyz + %87:u32 = add 16u, %start_byte_offset_3 + %88:u32 = div %87, 16u + %89:ptr, read> = access %a, %88 + %90:vec4 = load %89 + %91:vec4 = bitcast %90 + %92:vec3 = swizzle %91, xyz + %93:mat3x3 = construct %80, %86, %92 + ret %93 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat3x3(vec3(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %75:bool = gte %idx_1, 4u - if %75 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %97:bool = gte %idx_1, 4u + if %97 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %76:u32 = mul %idx_1, 64u - %77:u32 = add %start_byte_offset_2, %76 - %78:ptr = access %a_2, %idx_1 - %79:Inner = call %28, %77 - store %78, %79 - continue # -> $B13 + %98:u32 = mul %idx_1, 256u + %99:u32 = add %start_byte_offset_4, %98 + %100:ptr = access %a_2, %idx_1 + %101:Outer = call %21, %99 + store %100, %101 + continue # -> $B15 } - $B13: { # continuing - %80:u32 = add %idx_1, 1u - next_iteration %80 # -> $B12 + $B15: { # continuing + %102:u32 = add %idx_1, 1u + next_iteration %102 # -> $B14 } } - %81:array = load %a_2 - ret %81 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %83:mat3x3 = call %32, %start_byte_offset_3 - %84:Inner = construct %83 - ret %84 - } -} -%32 = func(%start_byte_offset_4:u32):mat3x3 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %86:u32 = div %start_byte_offset_4, 16u - %87:ptr, read> = access %a, %86 - %88:vec4 = load %87 - %89:vec4 = bitcast %88 - %90:vec3 = swizzle %89, xyz - %91:u32 = add 8u, %start_byte_offset_4 - %92:u32 = div %91, 16u - %93:ptr, read> = access %a, %92 - %94:vec4 = load %93 - %95:vec4 = bitcast %94 - %96:vec3 = swizzle %95, xyz - %97:u32 = add 16u, %start_byte_offset_4 - %98:u32 = div %97, 16u - %99:ptr, read> = access %a, %98 - %100:vec4 = load %99 - %101:vec4 = bitcast %100 - %102:vec3 = swizzle %101, xyz - %103:mat3x3 = construct %90, %96, %102 + %103:array = load %a_2 ret %103 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 6f5481e0312..040fea09c1c 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -141,100 +141,100 @@ $B1: { # root ret } } -%32 = func(%start_byte_offset:u32):mat3x3 { +%18 = func(%start_byte_offset:u32):array { $B4: { - %60:u32 = div %start_byte_offset, 16u - %61:ptr, read> = access %a, %60 - %62:vec4 = load %61 - %63:vec4 = bitcast %62 - %64:vec3 = swizzle %63, xyz - %65:u32 = add 8u, %start_byte_offset - %66:u32 = div %65, 16u - %67:ptr, read> = access %a, %66 - %68:vec4 = load %67 - %69:vec4 = bitcast %68 - %70:vec3 = swizzle %69, xyz - %71:u32 = add 16u, %start_byte_offset - %72:u32 = div %71, 16u - %73:ptr, read> = access %a, %72 - %74:vec4 = load %73 - %75:vec4 = bitcast %74 - %76:vec3 = swizzle %75, xyz - %77:mat3x3 = construct %64, %70, %76 - ret %77 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B5: { - %79:mat3x3 = call %32, %start_byte_offset_1 - %80:Inner = construct %79 - ret %80 - } -} -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B6: { - %a_1:ptr, read_write> = var, array(Inner(mat3x3(vec3(0.0h)))) # %a_1: 'a' - loop [i: $B7, b: $B8, c: $B9] { # loop_1 - $B7: { # initializer - next_iteration 0u # -> $B8 + %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat3x3(vec3(0.0h)))))) # %a_1: 'a' + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B8 (%idx:u32): { # body - %84:bool = gte %idx, 4u - if %84 [t: $B10] { # if_1 - $B10: { # true + $B6 (%idx:u32): { # body + %62:bool = gte %idx, 4u + if %62 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %85:u32 = mul %idx, 64u - %86:u32 = add %start_byte_offset_2, %85 - %87:ptr = access %a_1, %idx - %88:Inner = call %28, %86 - store %87, %88 - continue # -> $B9 + %63:u32 = mul %idx, 256u + %64:u32 = add %start_byte_offset, %63 + %65:ptr = access %a_1, %idx + %66:Outer = call %21, %64 + store %65, %66 + continue # -> $B7 } - $B9: { # continuing - %89:u32 = add %idx, 1u - next_iteration %89 # -> $B8 + $B7: { # continuing + %67:u32 = add %idx, 1u + next_iteration %67 # -> $B6 } } - %90:array = load %a_1 - ret %90 + %68:array = load %a_1 + ret %68 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' - $B11: { - %92:array = call %24, %start_byte_offset_3 - %93:Outer = construct %92 - ret %93 +%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %70:array = call %24, %start_byte_offset_1 + %71:Outer = construct %70 + ret %71 } } -%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' - $B12: { - %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat3x3(vec3(0.0h)))))) # %a_2: 'a' - loop [i: $B13, b: $B14, c: $B15] { # loop_2 - $B13: { # initializer - next_iteration 0u # -> $B14 +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B10: { + %a_2:ptr, read_write> = var, array(Inner(mat3x3(vec3(0.0h)))) # %a_2: 'a' + loop [i: $B11, b: $B12, c: $B13] { # loop_2 + $B11: { # initializer + next_iteration 0u # -> $B12 } - $B14 (%idx_1:u32): { # body - %97:bool = gte %idx_1, 4u - if %97 [t: $B16] { # if_2 - $B16: { # true + $B12 (%idx_1:u32): { # body + %75:bool = gte %idx_1, 4u + if %75 [t: $B14] { # if_2 + $B14: { # true exit_loop # loop_2 } } - %98:u32 = mul %idx_1, 256u - %99:u32 = add %start_byte_offset_4, %98 - %100:ptr = access %a_2, %idx_1 - %101:Outer = call %21, %99 - store %100, %101 - continue # -> $B15 + %76:u32 = mul %idx_1, 64u + %77:u32 = add %start_byte_offset_2, %76 + %78:ptr = access %a_2, %idx_1 + %79:Inner = call %28, %77 + store %78, %79 + continue # -> $B13 } - $B15: { # continuing - %102:u32 = add %idx_1, 1u - next_iteration %102 # -> $B14 + $B13: { # continuing + %80:u32 = add %idx_1, 1u + next_iteration %80 # -> $B12 } } - %103:array = load %a_2 + %81:array = load %a_2 + ret %81 + } +} +%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' + $B15: { + %83:mat3x3 = call %32, %start_byte_offset_3 + %84:Inner = construct %83 + ret %84 + } +} +%32 = func(%start_byte_offset_4:u32):mat3x3 { # %start_byte_offset_4: 'start_byte_offset' + $B16: { + %86:u32 = div %start_byte_offset_4, 16u + %87:ptr, read> = access %a, %86 + %88:vec4 = load %87 + %89:vec4 = bitcast %88 + %90:vec3 = swizzle %89, xyz + %91:u32 = add 8u, %start_byte_offset_4 + %92:u32 = div %91, 16u + %93:ptr, read> = access %a, %92 + %94:vec4 = load %93 + %95:vec4 = bitcast %94 + %96:vec3 = swizzle %95, xyz + %97:u32 = add 16u, %start_byte_offset_4 + %98:u32 = div %97, 16u + %99:ptr, read> = access %a, %98 + %100:vec4 = load %99 + %101:vec4 = bitcast %100 + %102:vec3 = swizzle %101, xyz + %103:mat3x3 = construct %90, %96, %102 ret %103 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 465bb7e4289..3c35a9734e7 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl index 0481692ea2b..2b41e1e0c8a 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl index 62da01f8a68..d667e29b9bc 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl index a4fcced9ca0..cdd696b4988 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl index 3f26110c027..827b432cb84 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index c03843ae07c..6dc2d658a6e 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 9c466719ac3..d40d68c2be6 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -134,9 +134,9 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%24 = func(%start_byte_offset:u32):array { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat3x3(vec3(0.0f)))))) # %a_1: 'a' + %a_1:ptr, read_write> = var, array(Inner(mat3x3(vec3(0.0f)))) # %a_1: 'a' loop [i: $B5, b: $B6, c: $B7] { # loop_1 $B5: { # initializer next_iteration 0u # -> $B6 @@ -148,10 +148,10 @@ $B1: { # root exit_loop # loop_1 } } - %58:u32 = mul %idx, 256u + %58:u32 = mul %idx, 64u %59:u32 = add %start_byte_offset, %58 - %60:ptr = access %a_1, %idx - %61:Outer = call %21, %59 + %60:ptr = access %a_1, %idx + %61:Inner = call %28, %59 store %60, %61 continue # -> $B7 } @@ -160,74 +160,74 @@ $B1: { # root next_iteration %62 # -> $B6 } } - %63:array = load %a_1 + %63:array = load %a_1 ret %63 } } -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' $B9: { - %65:array = call %24, %start_byte_offset_1 - %66:Outer = construct %65 + %65:mat3x3 = call %32, %start_byte_offset_1 + %66:Inner = construct %65 ret %66 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%32 = func(%start_byte_offset_2:u32):mat3x3 { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat3x3(vec3(0.0f)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %68:u32 = div %start_byte_offset_2, 16u + %69:ptr, read> = access %a, %68 + %70:vec4 = load %69 + %71:vec3 = swizzle %70, xyz + %72:vec3 = bitcast %71 + %73:u32 = add 16u, %start_byte_offset_2 + %74:u32 = div %73, 16u + %75:ptr, read> = access %a, %74 + %76:vec4 = load %75 + %77:vec3 = swizzle %76, xyz + %78:vec3 = bitcast %77 + %79:u32 = add 32u, %start_byte_offset_2 + %80:u32 = div %79, 16u + %81:ptr, read> = access %a, %80 + %82:vec4 = load %81 + %83:vec3 = swizzle %82, xyz + %84:vec3 = bitcast %83 + %85:mat3x3 = construct %72, %78, %84 + ret %85 + } +} +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %87:array = call %24, %start_byte_offset_3 + %88:Outer = construct %87 + ret %88 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat3x3(vec3(0.0f)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %70:bool = gte %idx_1, 4u - if %70 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %92:bool = gte %idx_1, 4u + if %92 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %71:u32 = mul %idx_1, 64u - %72:u32 = add %start_byte_offset_2, %71 - %73:ptr = access %a_2, %idx_1 - %74:Inner = call %28, %72 - store %73, %74 - continue # -> $B13 + %93:u32 = mul %idx_1, 256u + %94:u32 = add %start_byte_offset_4, %93 + %95:ptr = access %a_2, %idx_1 + %96:Outer = call %21, %94 + store %95, %96 + continue # -> $B15 } - $B13: { # continuing - %75:u32 = add %idx_1, 1u - next_iteration %75 # -> $B12 + $B15: { # continuing + %97:u32 = add %idx_1, 1u + next_iteration %97 # -> $B14 } } - %76:array = load %a_2 - ret %76 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %78:mat3x3 = call %32, %start_byte_offset_3 - %79:Inner = construct %78 - ret %79 - } -} -%32 = func(%start_byte_offset_4:u32):mat3x3 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %81:u32 = div %start_byte_offset_4, 16u - %82:ptr, read> = access %a, %81 - %83:vec4 = load %82 - %84:vec3 = swizzle %83, xyz - %85:vec3 = bitcast %84 - %86:u32 = add 16u, %start_byte_offset_4 - %87:u32 = div %86, 16u - %88:ptr, read> = access %a, %87 - %89:vec4 = load %88 - %90:vec3 = swizzle %89, xyz - %91:vec3 = bitcast %90 - %92:u32 = add 32u, %start_byte_offset_4 - %93:u32 = div %92, 16u - %94:ptr, read> = access %a, %93 - %95:vec4 = load %94 - %96:vec3 = swizzle %95, xyz - %97:vec3 = bitcast %96 - %98:mat3x3 = construct %85, %91, %97 + %98:array = load %a_2 ret %98 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 6b9f5736c81..a8c55d13998 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index e8cfa757bda..f23eccc094a 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -140,97 +140,97 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat3x4(vec4(0.0h)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %59:array = call %24, %start_byte_offset + %60:Outer = construct %59 + ret %60 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %a_1:ptr, read_write> = var, array(Inner(mat3x4(vec4(0.0h)))) # %a_1: 'a' + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %61:bool = gte %idx, 4u - if %61 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %64:bool = gte %idx, 4u + if %64 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %62:u32 = mul %idx, 256u - %63:u32 = add %start_byte_offset, %62 - %64:ptr = access %a_1, %idx - %65:Outer = call %21, %63 - store %64, %65 - continue # -> $B7 + %65:u32 = mul %idx, 64u + %66:u32 = add %start_byte_offset_1, %65 + %67:ptr = access %a_1, %idx + %68:Inner = call %28, %66 + store %67, %68 + continue # -> $B8 } - $B7: { # continuing - %66:u32 = add %idx, 1u - next_iteration %66 # -> $B6 + $B8: { # continuing + %69:u32 = add %idx, 1u + next_iteration %69 # -> $B7 } } - %67:array = load %a_1 - ret %67 - } -} -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %69:array = call %24, %start_byte_offset_1 - %70:Outer = construct %69 + %70:array = load %a_1 ret %70 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat3x4(vec4(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %72:mat3x4 = call %32, %start_byte_offset_2 + %73:Inner = construct %72 + ret %73 + } +} +%32 = func(%start_byte_offset_3:u32):mat3x4 { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %75:u32 = div %start_byte_offset_3, 16u + %76:ptr, read> = access %a, %75 + %77:vec4 = load %76 + %78:vec4 = bitcast %77 + %79:u32 = add 8u, %start_byte_offset_3 + %80:u32 = div %79, 16u + %81:ptr, read> = access %a, %80 + %82:vec4 = load %81 + %83:vec4 = bitcast %82 + %84:u32 = add 16u, %start_byte_offset_3 + %85:u32 = div %84, 16u + %86:ptr, read> = access %a, %85 + %87:vec4 = load %86 + %88:vec4 = bitcast %87 + %89:mat3x4 = construct %78, %83, %88 + ret %89 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat3x4(vec4(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %74:bool = gte %idx_1, 4u - if %74 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %93:bool = gte %idx_1, 4u + if %93 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %75:u32 = mul %idx_1, 64u - %76:u32 = add %start_byte_offset_2, %75 - %77:ptr = access %a_2, %idx_1 - %78:Inner = call %28, %76 - store %77, %78 - continue # -> $B13 + %94:u32 = mul %idx_1, 256u + %95:u32 = add %start_byte_offset_4, %94 + %96:ptr = access %a_2, %idx_1 + %97:Outer = call %21, %95 + store %96, %97 + continue # -> $B15 } - $B13: { # continuing - %79:u32 = add %idx_1, 1u - next_iteration %79 # -> $B12 + $B15: { # continuing + %98:u32 = add %idx_1, 1u + next_iteration %98 # -> $B14 } } - %80:array = load %a_2 - ret %80 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %82:mat3x4 = call %32, %start_byte_offset_3 - %83:Inner = construct %82 - ret %83 - } -} -%32 = func(%start_byte_offset_4:u32):mat3x4 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %85:u32 = div %start_byte_offset_4, 16u - %86:ptr, read> = access %a, %85 - %87:vec4 = load %86 - %88:vec4 = bitcast %87 - %89:u32 = add 8u, %start_byte_offset_4 - %90:u32 = div %89, 16u - %91:ptr, read> = access %a, %90 - %92:vec4 = load %91 - %93:vec4 = bitcast %92 - %94:u32 = add 16u, %start_byte_offset_4 - %95:u32 = div %94, 16u - %96:ptr, read> = access %a, %95 - %97:vec4 = load %96 - %98:vec4 = bitcast %97 - %99:mat3x4 = construct %88, %93, %98 + %99:array = load %a_2 ret %99 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index e8cfa757bda..9ea049d464a 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -140,97 +140,97 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%32 = func(%start_byte_offset:u32):mat3x4 { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat3x4(vec4(0.0h)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %59:u32 = div %start_byte_offset, 16u + %60:ptr, read> = access %a, %59 + %61:vec4 = load %60 + %62:vec4 = bitcast %61 + %63:u32 = add 8u, %start_byte_offset + %64:u32 = div %63, 16u + %65:ptr, read> = access %a, %64 + %66:vec4 = load %65 + %67:vec4 = bitcast %66 + %68:u32 = add 16u, %start_byte_offset + %69:u32 = div %68, 16u + %70:ptr, read> = access %a, %69 + %71:vec4 = load %70 + %72:vec4 = bitcast %71 + %73:mat3x4 = construct %62, %67, %72 + ret %73 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %75:mat3x4 = call %32, %start_byte_offset_1 + %76:Inner = construct %75 + ret %76 + } +} +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B6: { + %a_1:ptr, read_write> = var, array(Inner(mat3x4(vec4(0.0h)))) # %a_1: 'a' + loop [i: $B7, b: $B8, c: $B9] { # loop_1 + $B7: { # initializer + next_iteration 0u # -> $B8 } - $B6 (%idx:u32): { # body - %61:bool = gte %idx, 4u - if %61 [t: $B8] { # if_1 - $B8: { # true + $B8 (%idx:u32): { # body + %80:bool = gte %idx, 4u + if %80 [t: $B10] { # if_1 + $B10: { # true exit_loop # loop_1 } } - %62:u32 = mul %idx, 256u - %63:u32 = add %start_byte_offset, %62 - %64:ptr = access %a_1, %idx - %65:Outer = call %21, %63 - store %64, %65 - continue # -> $B7 + %81:u32 = mul %idx, 64u + %82:u32 = add %start_byte_offset_2, %81 + %83:ptr = access %a_1, %idx + %84:Inner = call %28, %82 + store %83, %84 + continue # -> $B9 } - $B7: { # continuing - %66:u32 = add %idx, 1u - next_iteration %66 # -> $B6 + $B9: { # continuing + %85:u32 = add %idx, 1u + next_iteration %85 # -> $B8 } } - %67:array = load %a_1 - ret %67 + %86:array = load %a_1 + ret %86 } } -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %69:array = call %24, %start_byte_offset_1 - %70:Outer = construct %69 - ret %70 +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %88:array = call %24, %start_byte_offset_3 + %89:Outer = construct %88 + ret %89 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' - $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat3x4(vec4(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat3x4(vec4(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %74:bool = gte %idx_1, 4u - if %74 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %93:bool = gte %idx_1, 4u + if %93 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %75:u32 = mul %idx_1, 64u - %76:u32 = add %start_byte_offset_2, %75 - %77:ptr = access %a_2, %idx_1 - %78:Inner = call %28, %76 - store %77, %78 - continue # -> $B13 + %94:u32 = mul %idx_1, 256u + %95:u32 = add %start_byte_offset_4, %94 + %96:ptr = access %a_2, %idx_1 + %97:Outer = call %21, %95 + store %96, %97 + continue # -> $B15 } - $B13: { # continuing - %79:u32 = add %idx_1, 1u - next_iteration %79 # -> $B12 + $B15: { # continuing + %98:u32 = add %idx_1, 1u + next_iteration %98 # -> $B14 } } - %80:array = load %a_2 - ret %80 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %82:mat3x4 = call %32, %start_byte_offset_3 - %83:Inner = construct %82 - ret %83 - } -} -%32 = func(%start_byte_offset_4:u32):mat3x4 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %85:u32 = div %start_byte_offset_4, 16u - %86:ptr, read> = access %a, %85 - %87:vec4 = load %86 - %88:vec4 = bitcast %87 - %89:u32 = add 8u, %start_byte_offset_4 - %90:u32 = div %89, 16u - %91:ptr, read> = access %a, %90 - %92:vec4 = load %91 - %93:vec4 = bitcast %92 - %94:u32 = add 16u, %start_byte_offset_4 - %95:u32 = div %94, 16u - %96:ptr, read> = access %a, %95 - %97:vec4 = load %96 - %98:vec4 = bitcast %97 - %99:mat3x4 = construct %88, %93, %98 + %99:array = load %a_2 ret %99 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 5dd4c8b89d6..2db471ec131 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl index a6c4dcef8f3..562f751069a 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl index ffc3ac039c5..c85075116b3 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl index 9c4f4330223..3a26bd91f3e 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl index 04434cb840c..7e68a019b53 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index 1531979497c..38aa59d85e7 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat3x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat3x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 4d658e7bc41..631a20b7453 100644 --- a/test/tint/buffer/uniform/std140/struct/mat3x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat3x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -133,67 +133,67 @@ $B1: { # root ret } } -%24 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { + %54:array = call %24, %start_byte_offset + %55:Outer = construct %54 + ret %55 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { %a_1:ptr, read_write> = var, array(Inner(mat3x4(vec4(0.0f)))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %56:bool = gte %idx, 4u - if %56 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %59:bool = gte %idx, 4u + if %59 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %57:u32 = mul %idx, 64u - %58:u32 = add %start_byte_offset, %57 - %59:ptr = access %a_1, %idx - %60:Inner = call %28, %58 - store %59, %60 - continue # -> $B7 + %60:u32 = mul %idx, 64u + %61:u32 = add %start_byte_offset_1, %60 + %62:ptr = access %a_1, %idx + %63:Inner = call %28, %61 + store %62, %63 + continue # -> $B8 } - $B7: { # continuing - %61:u32 = add %idx, 1u - next_iteration %61 # -> $B6 + $B8: { # continuing + %64:u32 = add %idx, 1u + next_iteration %64 # -> $B7 } } - %62:array = load %a_1 - ret %62 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %64:mat3x4 = call %32, %start_byte_offset_1 - %65:Inner = construct %64 + %65:array = load %a_1 ret %65 } } -%32 = func(%start_byte_offset_2:u32):mat3x4 { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %67:u32 = div %start_byte_offset_2, 16u - %68:ptr, read> = access %a, %67 - %69:vec4 = load %68 - %70:vec4 = bitcast %69 - %71:u32 = add 16u, %start_byte_offset_2 - %72:u32 = div %71, 16u - %73:ptr, read> = access %a, %72 - %74:vec4 = load %73 - %75:vec4 = bitcast %74 - %76:u32 = add 32u, %start_byte_offset_2 - %77:u32 = div %76, 16u - %78:ptr, read> = access %a, %77 - %79:vec4 = load %78 - %80:vec4 = bitcast %79 - %81:mat3x4 = construct %70, %75, %80 - ret %81 + %67:mat3x4 = call %32, %start_byte_offset_2 + %68:Inner = construct %67 + ret %68 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' +%32 = func(%start_byte_offset_3:u32):mat3x4 { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %83:array = call %24, %start_byte_offset_3 - %84:Outer = construct %83 + %70:u32 = div %start_byte_offset_3, 16u + %71:ptr, read> = access %a, %70 + %72:vec4 = load %71 + %73:vec4 = bitcast %72 + %74:u32 = add 16u, %start_byte_offset_3 + %75:u32 = div %74, 16u + %76:ptr, read> = access %a, %75 + %77:vec4 = load %76 + %78:vec4 = bitcast %77 + %79:u32 = add 32u, %start_byte_offset_3 + %80:u32 = div %79, 16u + %81:ptr, read> = access %a, %80 + %82:vec4 = load %81 + %83:vec4 = bitcast %82 + %84:mat3x4 = construct %73, %78, %83 ret %84 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 92950bd6a02..6e8a0a4c6dc 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 0e5afa854c9..074becf5e79 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -146,96 +146,96 @@ $B1: { # root ret } } -%21 = func(%start_byte_offset:u32):Outer { +%24 = func(%start_byte_offset:u32):array { $B4: { - %65:array = call %24, %start_byte_offset - %66:Outer = construct %65 - ret %66 - } -} -%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' - $B5: { %a_1:ptr, read_write> = var, array(Inner(mat4x2(vec2(0.0h)))) # %a_1: 'a' - loop [i: $B6, b: $B7, c: $B8] { # loop_1 - $B6: { # initializer - next_iteration 0u # -> $B7 + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B7 (%idx:u32): { # body - %70:bool = gte %idx, 4u - if %70 [t: $B9] { # if_1 - $B9: { # true + $B6 (%idx:u32): { # body + %67:bool = gte %idx, 4u + if %67 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %71:u32 = mul %idx, 64u - %72:u32 = add %start_byte_offset_1, %71 - %73:ptr = access %a_1, %idx - %74:Inner = call %28, %72 - store %73, %74 - continue # -> $B8 + %68:u32 = mul %idx, 64u + %69:u32 = add %start_byte_offset, %68 + %70:ptr = access %a_1, %idx + %71:Inner = call %28, %69 + store %70, %71 + continue # -> $B7 } - $B8: { # continuing - %75:u32 = add %idx, 1u - next_iteration %75 # -> $B7 + $B7: { # continuing + %72:u32 = add %idx, 1u + next_iteration %72 # -> $B6 } } - %76:array = load %a_1 + %73:array = load %a_1 + ret %73 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %75:mat4x2 = call %32, %start_byte_offset_1 + %76:Inner = construct %75 ret %76 } } -%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' +%32 = func(%start_byte_offset_2:u32):mat4x2 { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %78:mat4x2 = call %32, %start_byte_offset_2 - %79:Inner = construct %78 - ret %79 + %78:u32 = div %start_byte_offset_2, 16u + %79:ptr, read> = access %a, %78 + %80:u32 = mod %start_byte_offset_2, 16u + %81:u32 = div %80, 4u + %82:vec4 = load %79 + %83:u32 = swizzle %82, z + %84:u32 = swizzle %82, x + %85:bool = eq %81, 2u + %86:u32 = hlsl.ternary %84, %83, %85 + %87:vec2 = bitcast %86 + %88:u32 = add 4u, %start_byte_offset_2 + %89:u32 = div %88, 16u + %90:ptr, read> = access %a, %89 + %91:u32 = mod %88, 16u + %92:u32 = div %91, 4u + %93:vec4 = load %90 + %94:u32 = swizzle %93, z + %95:u32 = swizzle %93, x + %96:bool = eq %92, 2u + %97:u32 = hlsl.ternary %95, %94, %96 + %98:vec2 = bitcast %97 + %99:u32 = add 8u, %start_byte_offset_2 + %100:u32 = div %99, 16u + %101:ptr, read> = access %a, %100 + %102:u32 = mod %99, 16u + %103:u32 = div %102, 4u + %104:vec4 = load %101 + %105:u32 = swizzle %104, z + %106:u32 = swizzle %104, x + %107:bool = eq %103, 2u + %108:u32 = hlsl.ternary %106, %105, %107 + %109:vec2 = bitcast %108 + %110:u32 = add 12u, %start_byte_offset_2 + %111:u32 = div %110, 16u + %112:ptr, read> = access %a, %111 + %113:u32 = mod %110, 16u + %114:u32 = div %113, 4u + %115:vec4 = load %112 + %116:u32 = swizzle %115, z + %117:u32 = swizzle %115, x + %118:bool = eq %114, 2u + %119:u32 = hlsl.ternary %117, %116, %118 + %120:vec2 = bitcast %119 + %121:mat4x2 = construct %87, %98, %109, %120 + ret %121 } } -%32 = func(%start_byte_offset_3:u32):mat4x2 { # %start_byte_offset_3: 'start_byte_offset' +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %81:u32 = div %start_byte_offset_3, 16u - %82:ptr, read> = access %a, %81 - %83:u32 = mod %start_byte_offset_3, 16u - %84:u32 = div %83, 4u - %85:vec4 = load %82 - %86:u32 = swizzle %85, z - %87:u32 = swizzle %85, x - %88:bool = eq %84, 2u - %89:u32 = hlsl.ternary %87, %86, %88 - %90:vec2 = bitcast %89 - %91:u32 = add 4u, %start_byte_offset_3 - %92:u32 = div %91, 16u - %93:ptr, read> = access %a, %92 - %94:u32 = mod %91, 16u - %95:u32 = div %94, 4u - %96:vec4 = load %93 - %97:u32 = swizzle %96, z - %98:u32 = swizzle %96, x - %99:bool = eq %95, 2u - %100:u32 = hlsl.ternary %98, %97, %99 - %101:vec2 = bitcast %100 - %102:u32 = add 8u, %start_byte_offset_3 - %103:u32 = div %102, 16u - %104:ptr, read> = access %a, %103 - %105:u32 = mod %102, 16u - %106:u32 = div %105, 4u - %107:vec4 = load %104 - %108:u32 = swizzle %107, z - %109:u32 = swizzle %107, x - %110:bool = eq %106, 2u - %111:u32 = hlsl.ternary %109, %108, %110 - %112:vec2 = bitcast %111 - %113:u32 = add 12u, %start_byte_offset_3 - %114:u32 = div %113, 16u - %115:ptr, read> = access %a, %114 - %116:u32 = mod %113, 16u - %117:u32 = div %116, 4u - %118:vec4 = load %115 - %119:u32 = swizzle %118, z - %120:u32 = swizzle %118, x - %121:bool = eq %117, 2u - %122:u32 = hlsl.ternary %120, %119, %121 - %123:vec2 = bitcast %122 - %124:mat4x2 = construct %90, %101, %112, %123 + %123:array = call %24, %start_byte_offset_3 + %124:Outer = construct %123 ret %124 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 2b3413e528c..9456b4ddb71 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl index d4efbf6bbfd..1a995ab6746 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl index 3684f922063..e9bca2b3c34 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl index e8494c0ab20..df656863cfc 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl index d04bccc7d23..11588e3aeed 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl index 6cd65ea225c..cb7fc553edb 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index c3b99f4f905..fba081a8d4d 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -139,96 +139,96 @@ $B1: { # root ret } } -%21 = func(%start_byte_offset:u32):Outer { +%28 = func(%start_byte_offset:u32):Inner { $B4: { - %60:array = call %24, %start_byte_offset - %61:Outer = construct %60 + %60:mat4x2 = call %32, %start_byte_offset + %61:Inner = construct %60 ret %61 } } -%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' +%32 = func(%start_byte_offset_1:u32):mat4x2 { # %start_byte_offset_1: 'start_byte_offset' $B5: { + %63:u32 = div %start_byte_offset_1, 16u + %64:ptr, read> = access %a, %63 + %65:u32 = mod %start_byte_offset_1, 16u + %66:u32 = div %65, 4u + %67:vec4 = load %64 + %68:vec2 = swizzle %67, zw + %69:vec2 = swizzle %67, xy + %70:bool = eq %66, 2u + %71:vec2 = hlsl.ternary %69, %68, %70 + %72:vec2 = bitcast %71 + %73:u32 = add 8u, %start_byte_offset_1 + %74:u32 = div %73, 16u + %75:ptr, read> = access %a, %74 + %76:u32 = mod %73, 16u + %77:u32 = div %76, 4u + %78:vec4 = load %75 + %79:vec2 = swizzle %78, zw + %80:vec2 = swizzle %78, xy + %81:bool = eq %77, 2u + %82:vec2 = hlsl.ternary %80, %79, %81 + %83:vec2 = bitcast %82 + %84:u32 = add 16u, %start_byte_offset_1 + %85:u32 = div %84, 16u + %86:ptr, read> = access %a, %85 + %87:u32 = mod %84, 16u + %88:u32 = div %87, 4u + %89:vec4 = load %86 + %90:vec2 = swizzle %89, zw + %91:vec2 = swizzle %89, xy + %92:bool = eq %88, 2u + %93:vec2 = hlsl.ternary %91, %90, %92 + %94:vec2 = bitcast %93 + %95:u32 = add 24u, %start_byte_offset_1 + %96:u32 = div %95, 16u + %97:ptr, read> = access %a, %96 + %98:u32 = mod %95, 16u + %99:u32 = div %98, 4u + %100:vec4 = load %97 + %101:vec2 = swizzle %100, zw + %102:vec2 = swizzle %100, xy + %103:bool = eq %99, 2u + %104:vec2 = hlsl.ternary %102, %101, %103 + %105:vec2 = bitcast %104 + %106:mat4x2 = construct %72, %83, %94, %105 + ret %106 + } +} +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B6: { %a_1:ptr, read_write> = var, array(Inner(mat4x2(vec2(0.0f)))) # %a_1: 'a' - loop [i: $B6, b: $B7, c: $B8] { # loop_1 - $B6: { # initializer - next_iteration 0u # -> $B7 + loop [i: $B7, b: $B8, c: $B9] { # loop_1 + $B7: { # initializer + next_iteration 0u # -> $B8 } - $B7 (%idx:u32): { # body - %65:bool = gte %idx, 4u - if %65 [t: $B9] { # if_1 - $B9: { # true + $B8 (%idx:u32): { # body + %110:bool = gte %idx, 4u + if %110 [t: $B10] { # if_1 + $B10: { # true exit_loop # loop_1 } } - %66:u32 = mul %idx, 64u - %67:u32 = add %start_byte_offset_1, %66 - %68:ptr = access %a_1, %idx - %69:Inner = call %28, %67 - store %68, %69 - continue # -> $B8 + %111:u32 = mul %idx, 64u + %112:u32 = add %start_byte_offset_2, %111 + %113:ptr = access %a_1, %idx + %114:Inner = call %28, %112 + store %113, %114 + continue # -> $B9 } - $B8: { # continuing - %70:u32 = add %idx, 1u - next_iteration %70 # -> $B7 + $B9: { # continuing + %115:u32 = add %idx, 1u + next_iteration %115 # -> $B8 } } - %71:array = load %a_1 - ret %71 - } -} -%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' - $B10: { - %73:mat4x2 = call %32, %start_byte_offset_2 - %74:Inner = construct %73 - ret %74 + %116:array = load %a_1 + ret %116 } } -%32 = func(%start_byte_offset_3:u32):mat4x2 { # %start_byte_offset_3: 'start_byte_offset' +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %76:u32 = div %start_byte_offset_3, 16u - %77:ptr, read> = access %a, %76 - %78:u32 = mod %start_byte_offset_3, 16u - %79:u32 = div %78, 4u - %80:vec4 = load %77 - %81:vec2 = swizzle %80, zw - %82:vec2 = swizzle %80, xy - %83:bool = eq %79, 2u - %84:vec2 = hlsl.ternary %82, %81, %83 - %85:vec2 = bitcast %84 - %86:u32 = add 8u, %start_byte_offset_3 - %87:u32 = div %86, 16u - %88:ptr, read> = access %a, %87 - %89:u32 = mod %86, 16u - %90:u32 = div %89, 4u - %91:vec4 = load %88 - %92:vec2 = swizzle %91, zw - %93:vec2 = swizzle %91, xy - %94:bool = eq %90, 2u - %95:vec2 = hlsl.ternary %93, %92, %94 - %96:vec2 = bitcast %95 - %97:u32 = add 16u, %start_byte_offset_3 - %98:u32 = div %97, 16u - %99:ptr, read> = access %a, %98 - %100:u32 = mod %97, 16u - %101:u32 = div %100, 4u - %102:vec4 = load %99 - %103:vec2 = swizzle %102, zw - %104:vec2 = swizzle %102, xy - %105:bool = eq %101, 2u - %106:vec2 = hlsl.ternary %104, %103, %105 - %107:vec2 = bitcast %106 - %108:u32 = add 24u, %start_byte_offset_3 - %109:u32 = div %108, 16u - %110:ptr, read> = access %a, %109 - %111:u32 = mod %108, 16u - %112:u32 = div %111, 4u - %113:vec4 = load %110 - %114:vec2 = swizzle %113, zw - %115:vec2 = swizzle %113, xy - %116:bool = eq %112, 2u - %117:vec2 = hlsl.ternary %115, %114, %116 - %118:vec2 = bitcast %117 - %119:mat4x2 = construct %85, %96, %107, %118 + %118:array = call %24, %start_byte_offset_3 + %119:Outer = construct %118 ret %119 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 1ecb4d70a8b..fa3d49feea2 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x2_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -139,89 +139,89 @@ $B1: { # root ret } } -%24 = func(%start_byte_offset:u32):array { +%32 = func(%start_byte_offset:u32):mat4x2 { $B4: { + %60:u32 = div %start_byte_offset, 16u + %61:ptr, read> = access %a, %60 + %62:u32 = mod %start_byte_offset, 16u + %63:u32 = div %62, 4u + %64:vec4 = load %61 + %65:vec2 = swizzle %64, zw + %66:vec2 = swizzle %64, xy + %67:bool = eq %63, 2u + %68:vec2 = hlsl.ternary %66, %65, %67 + %69:vec2 = bitcast %68 + %70:u32 = add 8u, %start_byte_offset + %71:u32 = div %70, 16u + %72:ptr, read> = access %a, %71 + %73:u32 = mod %70, 16u + %74:u32 = div %73, 4u + %75:vec4 = load %72 + %76:vec2 = swizzle %75, zw + %77:vec2 = swizzle %75, xy + %78:bool = eq %74, 2u + %79:vec2 = hlsl.ternary %77, %76, %78 + %80:vec2 = bitcast %79 + %81:u32 = add 16u, %start_byte_offset + %82:u32 = div %81, 16u + %83:ptr, read> = access %a, %82 + %84:u32 = mod %81, 16u + %85:u32 = div %84, 4u + %86:vec4 = load %83 + %87:vec2 = swizzle %86, zw + %88:vec2 = swizzle %86, xy + %89:bool = eq %85, 2u + %90:vec2 = hlsl.ternary %88, %87, %89 + %91:vec2 = bitcast %90 + %92:u32 = add 24u, %start_byte_offset + %93:u32 = div %92, 16u + %94:ptr, read> = access %a, %93 + %95:u32 = mod %92, 16u + %96:u32 = div %95, 4u + %97:vec4 = load %94 + %98:vec2 = swizzle %97, zw + %99:vec2 = swizzle %97, xy + %100:bool = eq %96, 2u + %101:vec2 = hlsl.ternary %99, %98, %100 + %102:vec2 = bitcast %101 + %103:mat4x2 = construct %69, %80, %91, %102 + ret %103 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %105:mat4x2 = call %32, %start_byte_offset_1 + %106:Inner = construct %105 + ret %106 + } +} +%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' + $B6: { %a_1:ptr, read_write> = var, array(Inner(mat4x2(vec2(0.0f)))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + loop [i: $B7, b: $B8, c: $B9] { # loop_1 + $B7: { # initializer + next_iteration 0u # -> $B8 } - $B6 (%idx:u32): { # body - %62:bool = gte %idx, 4u - if %62 [t: $B8] { # if_1 - $B8: { # true + $B8 (%idx:u32): { # body + %110:bool = gte %idx, 4u + if %110 [t: $B10] { # if_1 + $B10: { # true exit_loop # loop_1 } } - %63:u32 = mul %idx, 64u - %64:u32 = add %start_byte_offset, %63 - %65:ptr = access %a_1, %idx - %66:Inner = call %28, %64 - store %65, %66 - continue # -> $B7 + %111:u32 = mul %idx, 64u + %112:u32 = add %start_byte_offset_2, %111 + %113:ptr = access %a_1, %idx + %114:Inner = call %28, %112 + store %113, %114 + continue # -> $B9 } - $B7: { # continuing - %67:u32 = add %idx, 1u - next_iteration %67 # -> $B6 + $B9: { # continuing + %115:u32 = add %idx, 1u + next_iteration %115 # -> $B8 } } - %68:array = load %a_1 - ret %68 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %70:mat4x2 = call %32, %start_byte_offset_1 - %71:Inner = construct %70 - ret %71 - } -} -%32 = func(%start_byte_offset_2:u32):mat4x2 { # %start_byte_offset_2: 'start_byte_offset' - $B10: { - %73:u32 = div %start_byte_offset_2, 16u - %74:ptr, read> = access %a, %73 - %75:u32 = mod %start_byte_offset_2, 16u - %76:u32 = div %75, 4u - %77:vec4 = load %74 - %78:vec2 = swizzle %77, zw - %79:vec2 = swizzle %77, xy - %80:bool = eq %76, 2u - %81:vec2 = hlsl.ternary %79, %78, %80 - %82:vec2 = bitcast %81 - %83:u32 = add 8u, %start_byte_offset_2 - %84:u32 = div %83, 16u - %85:ptr, read> = access %a, %84 - %86:u32 = mod %83, 16u - %87:u32 = div %86, 4u - %88:vec4 = load %85 - %89:vec2 = swizzle %88, zw - %90:vec2 = swizzle %88, xy - %91:bool = eq %87, 2u - %92:vec2 = hlsl.ternary %90, %89, %91 - %93:vec2 = bitcast %92 - %94:u32 = add 16u, %start_byte_offset_2 - %95:u32 = div %94, 16u - %96:ptr, read> = access %a, %95 - %97:u32 = mod %94, 16u - %98:u32 = div %97, 4u - %99:vec4 = load %96 - %100:vec2 = swizzle %99, zw - %101:vec2 = swizzle %99, xy - %102:bool = eq %98, 2u - %103:vec2 = hlsl.ternary %101, %100, %102 - %104:vec2 = bitcast %103 - %105:u32 = add 24u, %start_byte_offset_2 - %106:u32 = div %105, 16u - %107:ptr, read> = access %a, %106 - %108:u32 = mod %105, 16u - %109:u32 = div %108, 4u - %110:vec4 = load %107 - %111:vec2 = swizzle %110, zw - %112:vec2 = swizzle %110, xy - %113:bool = eq %109, 2u - %114:vec2 = hlsl.ternary %112, %111, %113 - %115:vec2 = bitcast %114 - %116:mat4x2 = construct %82, %93, %104, %115 + %116:array = load %a_1 ret %116 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 4a6e16023fb..47cbdac3cc7 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 0a6d6a6826d..a40d7b7a17e 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -141,76 +141,76 @@ $B1: { # root ret } } -%21 = func(%start_byte_offset:u32):Outer { +%24 = func(%start_byte_offset:u32):array { $B4: { - %60:array = call %24, %start_byte_offset - %61:Outer = construct %60 - ret %61 - } -} -%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' - $B5: { %a_1:ptr, read_write> = var, array(Inner(mat4x3(vec3(0.0h)))) # %a_1: 'a' - loop [i: $B6, b: $B7, c: $B8] { # loop_1 - $B6: { # initializer - next_iteration 0u # -> $B7 + loop [i: $B5, b: $B6, c: $B7] { # loop_1 + $B5: { # initializer + next_iteration 0u # -> $B6 } - $B7 (%idx:u32): { # body - %65:bool = gte %idx, 4u - if %65 [t: $B9] { # if_1 - $B9: { # true + $B6 (%idx:u32): { # body + %62:bool = gte %idx, 4u + if %62 [t: $B8] { # if_1 + $B8: { # true exit_loop # loop_1 } } - %66:u32 = mul %idx, 64u - %67:u32 = add %start_byte_offset_1, %66 - %68:ptr = access %a_1, %idx - %69:Inner = call %28, %67 - store %68, %69 - continue # -> $B8 + %63:u32 = mul %idx, 64u + %64:u32 = add %start_byte_offset, %63 + %65:ptr = access %a_1, %idx + %66:Inner = call %28, %64 + store %65, %66 + continue # -> $B7 } - $B8: { # continuing - %70:u32 = add %idx, 1u - next_iteration %70 # -> $B7 + $B7: { # continuing + %67:u32 = add %idx, 1u + next_iteration %67 # -> $B6 } } - %71:array = load %a_1 + %68:array = load %a_1 + ret %68 + } +} +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' + $B9: { + %70:mat4x3 = call %32, %start_byte_offset_1 + %71:Inner = construct %70 ret %71 } } -%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' +%32 = func(%start_byte_offset_2:u32):mat4x3 { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %73:mat4x3 = call %32, %start_byte_offset_2 - %74:Inner = construct %73 - ret %74 + %73:u32 = div %start_byte_offset_2, 16u + %74:ptr, read> = access %a, %73 + %75:vec4 = load %74 + %76:vec4 = bitcast %75 + %77:vec3 = swizzle %76, xyz + %78:u32 = add 8u, %start_byte_offset_2 + %79:u32 = div %78, 16u + %80:ptr, read> = access %a, %79 + %81:vec4 = load %80 + %82:vec4 = bitcast %81 + %83:vec3 = swizzle %82, xyz + %84:u32 = add 16u, %start_byte_offset_2 + %85:u32 = div %84, 16u + %86:ptr, read> = access %a, %85 + %87:vec4 = load %86 + %88:vec4 = bitcast %87 + %89:vec3 = swizzle %88, xyz + %90:u32 = add 24u, %start_byte_offset_2 + %91:u32 = div %90, 16u + %92:ptr, read> = access %a, %91 + %93:vec4 = load %92 + %94:vec4 = bitcast %93 + %95:vec3 = swizzle %94, xyz + %96:mat4x3 = construct %77, %83, %89, %95 + ret %96 } } -%32 = func(%start_byte_offset_3:u32):mat4x3 { # %start_byte_offset_3: 'start_byte_offset' +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %76:u32 = div %start_byte_offset_3, 16u - %77:ptr, read> = access %a, %76 - %78:vec4 = load %77 - %79:vec4 = bitcast %78 - %80:vec3 = swizzle %79, xyz - %81:u32 = add 8u, %start_byte_offset_3 - %82:u32 = div %81, 16u - %83:ptr, read> = access %a, %82 - %84:vec4 = load %83 - %85:vec4 = bitcast %84 - %86:vec3 = swizzle %85, xyz - %87:u32 = add 16u, %start_byte_offset_3 - %88:u32 = div %87, 16u - %89:ptr, read> = access %a, %88 - %90:vec4 = load %89 - %91:vec4 = bitcast %90 - %92:vec3 = swizzle %91, xyz - %93:u32 = add 24u, %start_byte_offset_3 - %94:u32 = div %93, 16u - %95:ptr, read> = access %a, %94 - %96:vec4 = load %95 - %97:vec4 = bitcast %96 - %98:vec3 = swizzle %97, xyz - %99:mat4x3 = construct %80, %86, %92, %98 + %98:array = call %24, %start_byte_offset_3 + %99:Outer = construct %98 ret %99 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 43b5578c9ff..0a6d6a6826d 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -141,106 +141,106 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat4x3(vec3(0.0h)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %60:array = call %24, %start_byte_offset + %61:Outer = construct %60 + ret %61 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %a_1:ptr, read_write> = var, array(Inner(mat4x3(vec3(0.0h)))) # %a_1: 'a' + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %62:bool = gte %idx, 4u - if %62 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %65:bool = gte %idx, 4u + if %65 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %63:u32 = mul %idx, 256u - %64:u32 = add %start_byte_offset, %63 - %65:ptr = access %a_1, %idx - %66:Outer = call %21, %64 - store %65, %66 - continue # -> $B7 + %66:u32 = mul %idx, 64u + %67:u32 = add %start_byte_offset_1, %66 + %68:ptr = access %a_1, %idx + %69:Inner = call %28, %67 + store %68, %69 + continue # -> $B8 } - $B7: { # continuing - %67:u32 = add %idx, 1u - next_iteration %67 # -> $B6 + $B8: { # continuing + %70:u32 = add %idx, 1u + next_iteration %70 # -> $B7 } } - %68:array = load %a_1 - ret %68 - } -} -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %70:array = call %24, %start_byte_offset_1 - %71:Outer = construct %70 + %71:array = load %a_1 ret %71 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat4x3(vec3(0.0h)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %73:mat4x3 = call %32, %start_byte_offset_2 + %74:Inner = construct %73 + ret %74 + } +} +%32 = func(%start_byte_offset_3:u32):mat4x3 { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %76:u32 = div %start_byte_offset_3, 16u + %77:ptr, read> = access %a, %76 + %78:vec4 = load %77 + %79:vec4 = bitcast %78 + %80:vec3 = swizzle %79, xyz + %81:u32 = add 8u, %start_byte_offset_3 + %82:u32 = div %81, 16u + %83:ptr, read> = access %a, %82 + %84:vec4 = load %83 + %85:vec4 = bitcast %84 + %86:vec3 = swizzle %85, xyz + %87:u32 = add 16u, %start_byte_offset_3 + %88:u32 = div %87, 16u + %89:ptr, read> = access %a, %88 + %90:vec4 = load %89 + %91:vec4 = bitcast %90 + %92:vec3 = swizzle %91, xyz + %93:u32 = add 24u, %start_byte_offset_3 + %94:u32 = div %93, 16u + %95:ptr, read> = access %a, %94 + %96:vec4 = load %95 + %97:vec4 = bitcast %96 + %98:vec3 = swizzle %97, xyz + %99:mat4x3 = construct %80, %86, %92, %98 + ret %99 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat4x3(vec3(0.0h)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %75:bool = gte %idx_1, 4u - if %75 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %103:bool = gte %idx_1, 4u + if %103 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %76:u32 = mul %idx_1, 64u - %77:u32 = add %start_byte_offset_2, %76 - %78:ptr = access %a_2, %idx_1 - %79:Inner = call %28, %77 - store %78, %79 - continue # -> $B13 + %104:u32 = mul %idx_1, 256u + %105:u32 = add %start_byte_offset_4, %104 + %106:ptr = access %a_2, %idx_1 + %107:Outer = call %21, %105 + store %106, %107 + continue # -> $B15 } - $B13: { # continuing - %80:u32 = add %idx_1, 1u - next_iteration %80 # -> $B12 + $B15: { # continuing + %108:u32 = add %idx_1, 1u + next_iteration %108 # -> $B14 } } - %81:array = load %a_2 - ret %81 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %83:mat4x3 = call %32, %start_byte_offset_3 - %84:Inner = construct %83 - ret %84 - } -} -%32 = func(%start_byte_offset_4:u32):mat4x3 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %86:u32 = div %start_byte_offset_4, 16u - %87:ptr, read> = access %a, %86 - %88:vec4 = load %87 - %89:vec4 = bitcast %88 - %90:vec3 = swizzle %89, xyz - %91:u32 = add 8u, %start_byte_offset_4 - %92:u32 = div %91, 16u - %93:ptr, read> = access %a, %92 - %94:vec4 = load %93 - %95:vec4 = bitcast %94 - %96:vec3 = swizzle %95, xyz - %97:u32 = add 16u, %start_byte_offset_4 - %98:u32 = div %97, 16u - %99:ptr, read> = access %a, %98 - %100:vec4 = load %99 - %101:vec4 = bitcast %100 - %102:vec3 = swizzle %101, xyz - %103:u32 = add 24u, %start_byte_offset_4 - %104:u32 = div %103, 16u - %105:ptr, read> = access %a, %104 - %106:vec4 = load %105 - %107:vec4 = bitcast %106 - %108:vec3 = swizzle %107, xyz - %109:mat4x3 = construct %90, %96, %102, %108 + %109:array = load %a_2 ret %109 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 0e9bb2f3163..fc116ae31f9 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl index 7f50803568d..d0b006994a9 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl index 5f006833310..eaea09cf7a7 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl index b2b2ff1a79d..385f0b52cd3 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl index 70e8861ec8b..7f960e1ef58 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index 03843acc90c..66501f32890 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index 2729b0dcc8f..f4f3c622062 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -134,76 +134,76 @@ $B1: { # root ret } } -%24 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { + %55:array = call %24, %start_byte_offset + %56:Outer = construct %55 + ret %56 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { %a_1:ptr, read_write> = var, array(Inner(mat4x3(vec3(0.0f)))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %57:bool = gte %idx, 4u - if %57 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %60:bool = gte %idx, 4u + if %60 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %58:u32 = mul %idx, 64u - %59:u32 = add %start_byte_offset, %58 - %60:ptr = access %a_1, %idx - %61:Inner = call %28, %59 - store %60, %61 - continue # -> $B7 + %61:u32 = mul %idx, 64u + %62:u32 = add %start_byte_offset_1, %61 + %63:ptr = access %a_1, %idx + %64:Inner = call %28, %62 + store %63, %64 + continue # -> $B8 } - $B7: { # continuing - %62:u32 = add %idx, 1u - next_iteration %62 # -> $B6 + $B8: { # continuing + %65:u32 = add %idx, 1u + next_iteration %65 # -> $B7 } } - %63:array = load %a_1 - ret %63 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %65:mat4x3 = call %32, %start_byte_offset_1 - %66:Inner = construct %65 + %66:array = load %a_1 ret %66 } } -%32 = func(%start_byte_offset_2:u32):mat4x3 { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %68:u32 = div %start_byte_offset_2, 16u - %69:ptr, read> = access %a, %68 - %70:vec4 = load %69 - %71:vec3 = swizzle %70, xyz - %72:vec3 = bitcast %71 - %73:u32 = add 16u, %start_byte_offset_2 - %74:u32 = div %73, 16u - %75:ptr, read> = access %a, %74 - %76:vec4 = load %75 - %77:vec3 = swizzle %76, xyz - %78:vec3 = bitcast %77 - %79:u32 = add 32u, %start_byte_offset_2 - %80:u32 = div %79, 16u - %81:ptr, read> = access %a, %80 - %82:vec4 = load %81 - %83:vec3 = swizzle %82, xyz - %84:vec3 = bitcast %83 - %85:u32 = add 48u, %start_byte_offset_2 - %86:u32 = div %85, 16u - %87:ptr, read> = access %a, %86 - %88:vec4 = load %87 - %89:vec3 = swizzle %88, xyz - %90:vec3 = bitcast %89 - %91:mat4x3 = construct %72, %78, %84, %90 - ret %91 + %68:mat4x3 = call %32, %start_byte_offset_2 + %69:Inner = construct %68 + ret %69 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' +%32 = func(%start_byte_offset_3:u32):mat4x3 { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %93:array = call %24, %start_byte_offset_3 - %94:Outer = construct %93 + %71:u32 = div %start_byte_offset_3, 16u + %72:ptr, read> = access %a, %71 + %73:vec4 = load %72 + %74:vec3 = swizzle %73, xyz + %75:vec3 = bitcast %74 + %76:u32 = add 16u, %start_byte_offset_3 + %77:u32 = div %76, 16u + %78:ptr, read> = access %a, %77 + %79:vec4 = load %78 + %80:vec3 = swizzle %79, xyz + %81:vec3 = bitcast %80 + %82:u32 = add 32u, %start_byte_offset_3 + %83:u32 = div %82, 16u + %84:ptr, read> = access %a, %83 + %85:vec4 = load %84 + %86:vec3 = swizzle %85, xyz + %87:vec3 = bitcast %86 + %88:u32 = add 48u, %start_byte_offset_3 + %89:u32 = div %88, 16u + %90:ptr, read> = access %a, %89 + %91:vec4 = load %90 + %92:vec3 = swizzle %91, xyz + %93:vec3 = bitcast %92 + %94:mat4x3 = construct %75, %81, %87, %93 ret %94 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 2729b0dcc8f..f4f3c622062 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x3_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -134,76 +134,76 @@ $B1: { # root ret } } -%24 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { + %55:array = call %24, %start_byte_offset + %56:Outer = construct %55 + ret %56 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { %a_1:ptr, read_write> = var, array(Inner(mat4x3(vec3(0.0f)))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %57:bool = gte %idx, 4u - if %57 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %60:bool = gte %idx, 4u + if %60 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %58:u32 = mul %idx, 64u - %59:u32 = add %start_byte_offset, %58 - %60:ptr = access %a_1, %idx - %61:Inner = call %28, %59 - store %60, %61 - continue # -> $B7 + %61:u32 = mul %idx, 64u + %62:u32 = add %start_byte_offset_1, %61 + %63:ptr = access %a_1, %idx + %64:Inner = call %28, %62 + store %63, %64 + continue # -> $B8 } - $B7: { # continuing - %62:u32 = add %idx, 1u - next_iteration %62 # -> $B6 + $B8: { # continuing + %65:u32 = add %idx, 1u + next_iteration %65 # -> $B7 } } - %63:array = load %a_1 - ret %63 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %65:mat4x3 = call %32, %start_byte_offset_1 - %66:Inner = construct %65 + %66:array = load %a_1 ret %66 } } -%32 = func(%start_byte_offset_2:u32):mat4x3 { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %68:u32 = div %start_byte_offset_2, 16u - %69:ptr, read> = access %a, %68 - %70:vec4 = load %69 - %71:vec3 = swizzle %70, xyz - %72:vec3 = bitcast %71 - %73:u32 = add 16u, %start_byte_offset_2 - %74:u32 = div %73, 16u - %75:ptr, read> = access %a, %74 - %76:vec4 = load %75 - %77:vec3 = swizzle %76, xyz - %78:vec3 = bitcast %77 - %79:u32 = add 32u, %start_byte_offset_2 - %80:u32 = div %79, 16u - %81:ptr, read> = access %a, %80 - %82:vec4 = load %81 - %83:vec3 = swizzle %82, xyz - %84:vec3 = bitcast %83 - %85:u32 = add 48u, %start_byte_offset_2 - %86:u32 = div %85, 16u - %87:ptr, read> = access %a, %86 - %88:vec4 = load %87 - %89:vec3 = swizzle %88, xyz - %90:vec3 = bitcast %89 - %91:mat4x3 = construct %72, %78, %84, %90 - ret %91 + %68:mat4x3 = call %32, %start_byte_offset_2 + %69:Inner = construct %68 + ret %69 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' +%32 = func(%start_byte_offset_3:u32):mat4x3 { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %93:array = call %24, %start_byte_offset_3 - %94:Outer = construct %93 + %71:u32 = div %start_byte_offset_3, 16u + %72:ptr, read> = access %a, %71 + %73:vec4 = load %72 + %74:vec3 = swizzle %73, xyz + %75:vec3 = bitcast %74 + %76:u32 = add 16u, %start_byte_offset_3 + %77:u32 = div %76, 16u + %78:ptr, read> = access %a, %77 + %79:vec4 = load %78 + %80:vec3 = swizzle %79, xyz + %81:vec3 = bitcast %80 + %82:u32 = add 32u, %start_byte_offset_3 + %83:u32 = div %82, 16u + %84:ptr, read> = access %a, %83 + %85:vec4 = load %84 + %86:vec3 = swizzle %85, xyz + %87:vec3 = bitcast %86 + %88:u32 = add 48u, %start_byte_offset_3 + %89:u32 = div %88, 16u + %90:ptr, read> = access %a, %89 + %91:vec4 = load %90 + %92:vec3 = swizzle %91, xyz + %93:vec3 = bitcast %92 + %94:mat4x3 = construct %75, %81, %87, %93 ret %94 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 8868106acce..c9b18a115e0 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index 5bbb7eb2fcd..5136fc75236 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -140,72 +140,72 @@ $B1: { # root ret } } -%24 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { + %59:array = call %24, %start_byte_offset + %60:Outer = construct %59 + ret %60 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { %a_1:ptr, read_write> = var, array(Inner(mat4x4(vec4(0.0h)))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %61:bool = gte %idx, 4u - if %61 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %64:bool = gte %idx, 4u + if %64 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %62:u32 = mul %idx, 64u - %63:u32 = add %start_byte_offset, %62 - %64:ptr = access %a_1, %idx - %65:Inner = call %28, %63 - store %64, %65 - continue # -> $B7 + %65:u32 = mul %idx, 64u + %66:u32 = add %start_byte_offset_1, %65 + %67:ptr = access %a_1, %idx + %68:Inner = call %28, %66 + store %67, %68 + continue # -> $B8 } - $B7: { # continuing - %66:u32 = add %idx, 1u - next_iteration %66 # -> $B6 + $B8: { # continuing + %69:u32 = add %idx, 1u + next_iteration %69 # -> $B7 } } - %67:array = load %a_1 - ret %67 - } -} -%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %69:mat4x4 = call %32, %start_byte_offset_1 - %70:Inner = construct %69 + %70:array = load %a_1 ret %70 } } -%32 = func(%start_byte_offset_2:u32):mat4x4 { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %72:u32 = div %start_byte_offset_2, 16u - %73:ptr, read> = access %a, %72 - %74:vec4 = load %73 - %75:vec4 = bitcast %74 - %76:u32 = add 8u, %start_byte_offset_2 - %77:u32 = div %76, 16u - %78:ptr, read> = access %a, %77 - %79:vec4 = load %78 - %80:vec4 = bitcast %79 - %81:u32 = add 16u, %start_byte_offset_2 - %82:u32 = div %81, 16u - %83:ptr, read> = access %a, %82 - %84:vec4 = load %83 - %85:vec4 = bitcast %84 - %86:u32 = add 24u, %start_byte_offset_2 - %87:u32 = div %86, 16u - %88:ptr, read> = access %a, %87 - %89:vec4 = load %88 - %90:vec4 = bitcast %89 - %91:mat4x4 = construct %75, %80, %85, %90 - ret %91 + %72:mat4x4 = call %32, %start_byte_offset_2 + %73:Inner = construct %72 + ret %73 } } -%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' +%32 = func(%start_byte_offset_3:u32):mat4x4 { # %start_byte_offset_3: 'start_byte_offset' $B11: { - %93:array = call %24, %start_byte_offset_3 - %94:Outer = construct %93 + %75:u32 = div %start_byte_offset_3, 16u + %76:ptr, read> = access %a, %75 + %77:vec4 = load %76 + %78:vec4 = bitcast %77 + %79:u32 = add 8u, %start_byte_offset_3 + %80:u32 = div %79, 16u + %81:ptr, read> = access %a, %80 + %82:vec4 = load %81 + %83:vec4 = bitcast %82 + %84:u32 = add 16u, %start_byte_offset_3 + %85:u32 = div %84, 16u + %86:ptr, read> = access %a, %85 + %87:vec4 = load %86 + %88:vec4 = bitcast %87 + %89:u32 = add 24u, %start_byte_offset_3 + %90:u32 = div %89, 16u + %91:ptr, read> = access %a, %90 + %92:vec4 = load %91 + %93:vec4 = bitcast %92 + %94:mat4x4 = construct %78, %83, %88, %93 ret %94 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index e782750d66a..a51e6fce904 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { matrix m; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl index 9b6b77fc33b..2126654d1a7 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[32]; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl index 480b67f01bc..1d17b87cb64 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl index 06011045165..25b924d72ce 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl index b8a71bf7fc4..1d452e027d4 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index 04262f0bf44..6ab7e9bcdb3 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { int before; diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl index dd5351fe24d..6dd889b01b5 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.dxc.hlsl @@ -133,9 +133,9 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%24 = func(%start_byte_offset:u32):array { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat4x4(vec4(0.0f)))))) # %a_1: 'a' + %a_1:ptr, read_write> = var, array(Inner(mat4x4(vec4(0.0f)))) # %a_1: 'a' loop [i: $B5, b: $B6, c: $B7] { # loop_1 $B5: { # initializer next_iteration 0u # -> $B6 @@ -147,10 +147,10 @@ $B1: { # root exit_loop # loop_1 } } - %57:u32 = mul %idx, 256u + %57:u32 = mul %idx, 64u %58:u32 = add %start_byte_offset, %57 - %59:ptr = access %a_1, %idx - %60:Outer = call %21, %58 + %59:ptr = access %a_1, %idx + %60:Inner = call %28, %58 store %59, %60 continue # -> $B7 } @@ -159,76 +159,76 @@ $B1: { # root next_iteration %61 # -> $B6 } } - %62:array = load %a_1 + %62:array = load %a_1 ret %62 } } -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' +%28 = func(%start_byte_offset_1:u32):Inner { # %start_byte_offset_1: 'start_byte_offset' $B9: { - %64:array = call %24, %start_byte_offset_1 - %65:Outer = construct %64 + %64:mat4x4 = call %32, %start_byte_offset_1 + %65:Inner = construct %64 ret %65 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%32 = func(%start_byte_offset_2:u32):mat4x4 { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat4x4(vec4(0.0f)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 + %67:u32 = div %start_byte_offset_2, 16u + %68:ptr, read> = access %a, %67 + %69:vec4 = load %68 + %70:vec4 = bitcast %69 + %71:u32 = add 16u, %start_byte_offset_2 + %72:u32 = div %71, 16u + %73:ptr, read> = access %a, %72 + %74:vec4 = load %73 + %75:vec4 = bitcast %74 + %76:u32 = add 32u, %start_byte_offset_2 + %77:u32 = div %76, 16u + %78:ptr, read> = access %a, %77 + %79:vec4 = load %78 + %80:vec4 = bitcast %79 + %81:u32 = add 48u, %start_byte_offset_2 + %82:u32 = div %81, 16u + %83:ptr, read> = access %a, %82 + %84:vec4 = load %83 + %85:vec4 = bitcast %84 + %86:mat4x4 = construct %70, %75, %80, %85 + ret %86 + } +} +%21 = func(%start_byte_offset_3:u32):Outer { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %88:array = call %24, %start_byte_offset_3 + %89:Outer = construct %88 + ret %89 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat4x4(vec4(0.0f)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 } - $B12 (%idx_1:u32): { # body - %69:bool = gte %idx_1, 4u - if %69 [t: $B14] { # if_2 - $B14: { # true + $B14 (%idx_1:u32): { # body + %93:bool = gte %idx_1, 4u + if %93 [t: $B16] { # if_2 + $B16: { # true exit_loop # loop_2 } } - %70:u32 = mul %idx_1, 64u - %71:u32 = add %start_byte_offset_2, %70 - %72:ptr = access %a_2, %idx_1 - %73:Inner = call %28, %71 - store %72, %73 - continue # -> $B13 + %94:u32 = mul %idx_1, 256u + %95:u32 = add %start_byte_offset_4, %94 + %96:ptr = access %a_2, %idx_1 + %97:Outer = call %21, %95 + store %96, %97 + continue # -> $B15 } - $B13: { # continuing - %74:u32 = add %idx_1, 1u - next_iteration %74 # -> $B12 + $B15: { # continuing + %98:u32 = add %idx_1, 1u + next_iteration %98 # -> $B14 } } - %75:array = load %a_2 - ret %75 - } -} -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %77:mat4x4 = call %32, %start_byte_offset_3 - %78:Inner = construct %77 - ret %78 - } -} -%32 = func(%start_byte_offset_4:u32):mat4x4 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %80:u32 = div %start_byte_offset_4, 16u - %81:ptr, read> = access %a, %80 - %82:vec4 = load %81 - %83:vec4 = bitcast %82 - %84:u32 = add 16u, %start_byte_offset_4 - %85:u32 = div %84, 16u - %86:ptr, read> = access %a, %85 - %87:vec4 = load %86 - %88:vec4 = bitcast %87 - %89:u32 = add 32u, %start_byte_offset_4 - %90:u32 = div %89, 16u - %91:ptr, read> = access %a, %90 - %92:vec4 = load %91 - %93:vec4 = bitcast %92 - %94:u32 = add 48u, %start_byte_offset_4 - %95:u32 = div %94, 16u - %96:ptr, read> = access %a, %95 - %97:vec4 = load %96 - %98:vec4 = bitcast %97 - %99:mat4x4 = construct %83, %88, %93, %98 + %99:array = load %a_2 ret %99 } } diff --git a/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl index dd5351fe24d..484df98b19b 100644 --- a/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/struct/mat4x4_f32/dynamic_index_via_ptr.wgsl.expected.ir.fxc.hlsl @@ -133,102 +133,102 @@ $B1: { # root ret } } -%18 = func(%start_byte_offset:u32):array { +%21 = func(%start_byte_offset:u32):Outer { $B4: { - %a_1:ptr, read_write> = var, array(Outer(array(Inner(mat4x4(vec4(0.0f)))))) # %a_1: 'a' - loop [i: $B5, b: $B6, c: $B7] { # loop_1 - $B5: { # initializer - next_iteration 0u # -> $B6 + %54:array = call %24, %start_byte_offset + %55:Outer = construct %54 + ret %55 + } +} +%24 = func(%start_byte_offset_1:u32):array { # %start_byte_offset_1: 'start_byte_offset' + $B5: { + %a_1:ptr, read_write> = var, array(Inner(mat4x4(vec4(0.0f)))) # %a_1: 'a' + loop [i: $B6, b: $B7, c: $B8] { # loop_1 + $B6: { # initializer + next_iteration 0u # -> $B7 } - $B6 (%idx:u32): { # body - %56:bool = gte %idx, 4u - if %56 [t: $B8] { # if_1 - $B8: { # true + $B7 (%idx:u32): { # body + %59:bool = gte %idx, 4u + if %59 [t: $B9] { # if_1 + $B9: { # true exit_loop # loop_1 } } - %57:u32 = mul %idx, 256u - %58:u32 = add %start_byte_offset, %57 - %59:ptr = access %a_1, %idx - %60:Outer = call %21, %58 - store %59, %60 - continue # -> $B7 + %60:u32 = mul %idx, 64u + %61:u32 = add %start_byte_offset_1, %60 + %62:ptr = access %a_1, %idx + %63:Inner = call %28, %61 + store %62, %63 + continue # -> $B8 } - $B7: { # continuing - %61:u32 = add %idx, 1u - next_iteration %61 # -> $B6 + $B8: { # continuing + %64:u32 = add %idx, 1u + next_iteration %64 # -> $B7 } } - %62:array = load %a_1 - ret %62 - } -} -%21 = func(%start_byte_offset_1:u32):Outer { # %start_byte_offset_1: 'start_byte_offset' - $B9: { - %64:array = call %24, %start_byte_offset_1 - %65:Outer = construct %64 + %65:array = load %a_1 ret %65 } } -%24 = func(%start_byte_offset_2:u32):array { # %start_byte_offset_2: 'start_byte_offset' +%28 = func(%start_byte_offset_2:u32):Inner { # %start_byte_offset_2: 'start_byte_offset' $B10: { - %a_2:ptr, read_write> = var, array(Inner(mat4x4(vec4(0.0f)))) # %a_2: 'a' - loop [i: $B11, b: $B12, c: $B13] { # loop_2 - $B11: { # initializer - next_iteration 0u # -> $B12 - } - $B12 (%idx_1:u32): { # body - %69:bool = gte %idx_1, 4u - if %69 [t: $B14] { # if_2 - $B14: { # true - exit_loop # loop_2 - } - } - %70:u32 = mul %idx_1, 64u - %71:u32 = add %start_byte_offset_2, %70 - %72:ptr = access %a_2, %idx_1 - %73:Inner = call %28, %71 - store %72, %73 - continue # -> $B13 - } - $B13: { # continuing - %74:u32 = add %idx_1, 1u - next_iteration %74 # -> $B12 - } - } - %75:array = load %a_2 - ret %75 + %67:mat4x4 = call %32, %start_byte_offset_2 + %68:Inner = construct %67 + ret %68 } } -%28 = func(%start_byte_offset_3:u32):Inner { # %start_byte_offset_3: 'start_byte_offset' - $B15: { - %77:mat4x4 = call %32, %start_byte_offset_3 - %78:Inner = construct %77 - ret %78 - } -} -%32 = func(%start_byte_offset_4:u32):mat4x4 { # %start_byte_offset_4: 'start_byte_offset' - $B16: { - %80:u32 = div %start_byte_offset_4, 16u +%32 = func(%start_byte_offset_3:u32):mat4x4 { # %start_byte_offset_3: 'start_byte_offset' + $B11: { + %70:u32 = div %start_byte_offset_3, 16u + %71:ptr, read> = access %a, %70 + %72:vec4 = load %71 + %73:vec4 = bitcast %72 + %74:u32 = add 16u, %start_byte_offset_3 + %75:u32 = div %74, 16u + %76:ptr, read> = access %a, %75 + %77:vec4 = load %76 + %78:vec4 = bitcast %77 + %79:u32 = add 32u, %start_byte_offset_3 + %80:u32 = div %79, 16u %81:ptr, read> = access %a, %80 %82:vec4 = load %81 %83:vec4 = bitcast %82 - %84:u32 = add 16u, %start_byte_offset_4 + %84:u32 = add 48u, %start_byte_offset_3 %85:u32 = div %84, 16u %86:ptr, read> = access %a, %85 %87:vec4 = load %86 %88:vec4 = bitcast %87 - %89:u32 = add 32u, %start_byte_offset_4 - %90:u32 = div %89, 16u - %91:ptr, read> = access %a, %90 - %92:vec4 = load %91 - %93:vec4 = bitcast %92 - %94:u32 = add 48u, %start_byte_offset_4 - %95:u32 = div %94, 16u - %96:ptr, read> = access %a, %95 - %97:vec4 = load %96 - %98:vec4 = bitcast %97 - %99:mat4x4 = construct %83, %88, %93, %98 + %89:mat4x4 = construct %73, %78, %83, %88 + ret %89 + } +} +%18 = func(%start_byte_offset_4:u32):array { # %start_byte_offset_4: 'start_byte_offset' + $B12: { + %a_2:ptr, read_write> = var, array(Outer(array(Inner(mat4x4(vec4(0.0f)))))) # %a_2: 'a' + loop [i: $B13, b: $B14, c: $B15] { # loop_2 + $B13: { # initializer + next_iteration 0u # -> $B14 + } + $B14 (%idx_1:u32): { # body + %93:bool = gte %idx_1, 4u + if %93 [t: $B16] { # if_2 + $B16: { # true + exit_loop # loop_2 + } + } + %94:u32 = mul %idx_1, 256u + %95:u32 = add %start_byte_offset_4, %94 + %96:ptr = access %a_2, %idx_1 + %97:Outer = call %21, %95 + store %96, %97 + continue # -> $B15 + } + $B15: { # continuing + %98:u32 = add %idx_1, 1u + next_iteration %98 # -> $B14 + } + } + %99:array = load %a_2 ret %99 } } diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 7aa8c4adf3b..5dcc3aff84a 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index b4805a090ab..9b9a5df2b93 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl index f9c696b2be6..7a72b1b37a1 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl index 16c2d072558..d22f2c23867 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl index 4106a315f88..b569dfc9e80 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl index 540741c54e7..24bbcc40d64 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl index a9bb80de03d..63eccb44275 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x2_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 8ba2eac4309..d1eef04edce 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 40f67bd0e3f..a3c205353b5 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl index 97f83d29f7d..9b9a1d003a0 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl index d2f6c8cfcb1..66472c1893b 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl index 09b6a412844..9ae8d7057af 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl index 619fad36f55..9d6f33b451c 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index 620759fa559..208c6f1f45c 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 282f7ffe521..488ffd2179b 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index fef4e58f660..f1b542dbaca 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl index ece7aca6a2a..da087799a24 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl index 757c253f65f..cbb814d6bfd 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl index 309a9cd4c29..f3581c3383a 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl index 88d588317c7..29f3aea9391 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index 8b925690e48..61bd042f34c 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat2x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index dddbacc8152..9c0e25fa102 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 6cef82a7f06..2787a0c8ac4 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl index 7b4c0b6bbe6..e70fa9eab96 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl index 60aba8cef38..f6d6c25f46d 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl index 85364a3b1f7..c635978b92d 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl index 18dec9a6761..9960c3ab68e 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl index 31f7adca6ca..64001a56b6b 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x2_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 0a0d5bef57d..60f1452f4ad 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index b300137cb33..1617ceaedcc 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl index fc706d0d9f8..8263c80f66a 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl index 27ba22bbee4..3f514ae0ac0 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl index 67e05f6091b..46ebdfd1cc4 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl index 9c8af75d355..58f0560849b 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index 5940389bba8..f5c28e900bd 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index eb12adebfac..d290bce2325 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 1e96176b5b6..4b6bfde3d01 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl index 8e0de544476..5439f4d6363 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl index 3ad4a25d41e..a68f2b69b5e 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl index 69aa14fa87c..8c75f15d89d 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl index 867871736a1..590a3cd3c38 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index 59da992eda4..c85a16c3126 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat3x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 11798e6d3d0..990cc33e277 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index 4ce9894a4d4..827bf4c11b1 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl index e4525d4e60e..42b52ac057b 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl index 88828deb7de..640f12eeb6a 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl index 238bd41208a..69d37fad23b 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl index 059f41787a7..16fb86b1351 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl index 0013ec33b98..fe553d5b064 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x2_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index 6ccecba8ea8..6cf4654d2eb 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index c576a342b49..20fe4dd007e 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl index fa925acce44..ddda4811968 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl index f58f8fbb350..5300d94321b 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl index c812aeceb68..a4ac2bf5075 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl index baeb2b8536d..8835069d0c7 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl index cb50c162631..852bf6d367c 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x3_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl index ea7a8a3ef36..13cafe1081e 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/dynamic_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl index e59e263756b..ea956fc68ad 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/static_index_via_ptr.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_m : register(b0) { uint4 m[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl index 5f1542646c8..e0677b81f76 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_builtin.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl index bde7d705f3c..623814d6547 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_fn.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl index 553331d3065..aa9d2f05c45 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_private.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl index 7a07b33d459..79935f0af89 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_storage.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl index 181a80bd2f8..e0b7b76b9d9 100644 --- a/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/std140/unnested/mat4x4_f16/to_workgroup.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared matrix w; diff --git a/test/tint/buffer/uniform/types/f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/f16.wgsl.expected.fxc.hlsl index 04aed8e9314..73e87c7f331 100644 --- a/test/tint/buffer/uniform/types/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/types/f16.wgsl.expected.ir.fxc.hlsl index 7a05d6863cd..06c45d8e7fb 100644 --- a/test/tint/buffer/uniform/types/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/types/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { diff --git a/test/tint/buffer/uniform/types/mat2x2_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat2x2_f16.wgsl.expected.fxc.hlsl index 34f22d15f73..2cd14684b6a 100644 --- a/test/tint/buffer/uniform/types/mat2x2_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat2x2_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/mat2x3_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat2x3_f16.wgsl.expected.fxc.hlsl index 98c7251f1ed..673cec089dd 100644 --- a/test/tint/buffer/uniform/types/mat2x3_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat2x3_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/mat2x4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat2x4_f16.wgsl.expected.fxc.hlsl index 42b91d81ee3..da61baa071f 100644 --- a/test/tint/buffer/uniform/types/mat2x4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat2x4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/mat3x2_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat3x2_f16.wgsl.expected.fxc.hlsl index 1795d1e651a..cf4733fa65a 100644 --- a/test/tint/buffer/uniform/types/mat3x2_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat3x2_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/mat3x3_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat3x3_f16.wgsl.expected.fxc.hlsl index 2b0b0432fff..61b69a589fd 100644 --- a/test/tint/buffer/uniform/types/mat3x3_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat3x3_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/types/mat3x4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat3x4_f16.wgsl.expected.fxc.hlsl index 7d44926f3ca..d5c818c2f76 100644 --- a/test/tint/buffer/uniform/types/mat3x4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat3x4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/types/mat4x2_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat4x2_f16.wgsl.expected.fxc.hlsl index 99d354c2922..b5a1367c105 100644 --- a/test/tint/buffer/uniform/types/mat4x2_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat4x2_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/mat4x3_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat4x3_f16.wgsl.expected.fxc.hlsl index cff0b51c575..9301e12e0cf 100644 --- a/test/tint/buffer/uniform/types/mat4x3_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat4x3_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/types/mat4x4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/mat4x4_f16.wgsl.expected.fxc.hlsl index fbaf96f030a..d783f15cfa2 100644 --- a/test/tint/buffer/uniform/types/mat4x4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/mat4x4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[2]; diff --git a/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.fxc.hlsl index 18a803004ea..f0d50d0a763 100644 --- a/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { float16_t scalar_f16; diff --git a/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.ir.fxc.hlsl index 4fec28af482..1ac5f412cac 100644 --- a/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/buffer/uniform/types/struct_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Inner { float16_t scalar_f16; diff --git a/test/tint/buffer/uniform/types/vec2_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/vec2_f16.wgsl.expected.fxc.hlsl index dbdfe9ab9b0..f878c7a39cd 100644 --- a/test/tint/buffer/uniform/types/vec2_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/vec2_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/vec3_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/vec3_f16.wgsl.expected.fxc.hlsl index 7a21cb324a8..a758ac2deb6 100644 --- a/test/tint/buffer/uniform/types/vec3_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/vec3_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/buffer/uniform/types/vec4_f16.wgsl.expected.fxc.hlsl b/test/tint/buffer/uniform/types/vec4_f16.wgsl.expected.fxc.hlsl index 601e1f75b29..96eb9262621 100644 --- a/test/tint/buffer/uniform/types/vec4_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/buffer/uniform/types/vec4_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_u : register(b0) { uint4 u[1]; diff --git a/test/tint/bug/chromium/1434271.wgsl.expected.fxc.hlsl b/test/tint/bug/chromium/1434271.wgsl.expected.fxc.hlsl index a62fa8b75bb..f51ee2cbd2f 100644 --- a/test/tint/bug/chromium/1434271.wgsl.expected.fxc.hlsl +++ b/test/tint/bug/chromium/1434271.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float tint_trunc(float param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/bug/chromium/1434271.wgsl.expected.ir.fxc.hlsl b/test/tint/bug/chromium/1434271.wgsl.expected.ir.fxc.hlsl index e1aea7a0427..71a3e28996e 100644 --- a/test/tint/bug/chromium/1434271.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/bug/chromium/1434271.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 position; diff --git a/test/tint/builtins/gen/literal/abs/421ca3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/abs/421ca3.wgsl.expected.fxc.hlsl index 81bda795a68..c5cbb79df2e 100644 --- a/test/tint/builtins/gen/literal/abs/421ca3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/abs/421ca3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/abs/538d29.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/abs/538d29.wgsl.expected.fxc.hlsl index 1ef55812d8d..4305adfce2b 100644 --- a/test/tint/builtins/gen/literal/abs/538d29.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/abs/538d29.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/abs/5ae4fe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/abs/5ae4fe.wgsl.expected.fxc.hlsl index a6b9e04e892..74c5cf8eb3f 100644 --- a/test/tint/builtins/gen/literal/abs/5ae4fe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/abs/5ae4fe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.fxc.hlsl index e04bf41e0f8..3d886a1b3da 100644 --- a/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.ir.fxc.hlsl index b682989c6e2..46dce309609 100644 --- a/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/abs/fd247f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/acos/004aff.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acos/004aff.wgsl.expected.fxc.hlsl index e36b9346b06..c08afc927a7 100644 --- a/test/tint/builtins/gen/literal/acos/004aff.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acos/004aff.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/acos/203628.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acos/203628.wgsl.expected.fxc.hlsl index 3538a92b75d..412eddf05ab 100644 --- a/test/tint/builtins/gen/literal/acos/203628.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acos/203628.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.fxc.hlsl index 2e9ed8d19f0..5370b56bb31 100644 --- a/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.ir.fxc.hlsl index b1884f847da..f2acaca2251 100644 --- a/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acos/303e3d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/acos/f47057.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acos/f47057.wgsl.expected.fxc.hlsl index c64f9d46f83..d67e5064e6f 100644 --- a/test/tint/builtins/gen/literal/acos/f47057.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acos/f47057.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/acosh/5f49d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acosh/5f49d8.wgsl.expected.fxc.hlsl index 3d1b6cb6c8f..d8f1a7e22ad 100644 --- a/test/tint/builtins/gen/literal/acosh/5f49d8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acosh/5f49d8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.fxc.hlsl index dfc2c8f43e9..697ce08ffdb 100644 --- a/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl index 8052719288f..62e10b930b6 100644 --- a/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/acosh/de60d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acosh/de60d8.wgsl.expected.fxc.hlsl index 597afbd1e0c..00452fe9086 100644 --- a/test/tint/builtins/gen/literal/acosh/de60d8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acosh/de60d8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/acosh/f56574.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/acosh/f56574.wgsl.expected.fxc.hlsl index f570816349e..2bbb849bff9 100644 --- a/test/tint/builtins/gen/literal/acosh/f56574.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/acosh/f56574.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.fxc.hlsl index 4f5ffc5a3b4..93235f4b295 100644 --- a/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.ir.fxc.hlsl index 5e3aa08650f..fb04909bf07 100644 --- a/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asin/11dfda.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/asin/2d8e29.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asin/2d8e29.wgsl.expected.fxc.hlsl index 57369c8110f..34cd48cd490 100644 --- a/test/tint/builtins/gen/literal/asin/2d8e29.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asin/2d8e29.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asin/3cfbd4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asin/3cfbd4.wgsl.expected.fxc.hlsl index 8f004e70932..bd816370254 100644 --- a/test/tint/builtins/gen/literal/asin/3cfbd4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asin/3cfbd4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asin/b4aced.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asin/b4aced.wgsl.expected.fxc.hlsl index 4e962a09280..a7c3eccea1f 100644 --- a/test/tint/builtins/gen/literal/asin/b4aced.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asin/b4aced.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.fxc.hlsl index 64e1e7e24d0..c59e0ea317c 100644 --- a/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.ir.fxc.hlsl index 866b66a736b..d3e76610e89 100644 --- a/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asinh/468a48.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/asinh/95ab2b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asinh/95ab2b.wgsl.expected.fxc.hlsl index c559e3c0189..bc7735f56ec 100644 --- a/test/tint/builtins/gen/literal/asinh/95ab2b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asinh/95ab2b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asinh/ad8f8b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asinh/ad8f8b.wgsl.expected.fxc.hlsl index f87689dd20f..fddac137cc1 100644 --- a/test/tint/builtins/gen/literal/asinh/ad8f8b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asinh/ad8f8b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/asinh/fb5e8c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/asinh/fb5e8c.wgsl.expected.fxc.hlsl index 5de02849724..b989a47fadf 100644 --- a/test/tint/builtins/gen/literal/asinh/fb5e8c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/asinh/fb5e8c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan/19faea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan/19faea.wgsl.expected.fxc.hlsl index 2df3c37e184..49e175eba54 100644 --- a/test/tint/builtins/gen/literal/atan/19faea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan/19faea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan/1e1764.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan/1e1764.wgsl.expected.fxc.hlsl index 48e1cda1215..7105b70c161 100644 --- a/test/tint/builtins/gen/literal/atan/1e1764.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan/1e1764.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan/a5f421.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan/a5f421.wgsl.expected.fxc.hlsl index 40b35eda544..ba8967f07bf 100644 --- a/test/tint/builtins/gen/literal/atan/a5f421.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan/a5f421.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.fxc.hlsl index e723a5531f4..5c8ff0cf696 100644 --- a/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.ir.fxc.hlsl index 194e3f0abc2..e723725aee1 100644 --- a/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan/a7ba61.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/atan2/21dfea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan2/21dfea.wgsl.expected.fxc.hlsl index 6d219660ab0..91de0b80462 100644 --- a/test/tint/builtins/gen/literal/atan2/21dfea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan2/21dfea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan2/93febc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan2/93febc.wgsl.expected.fxc.hlsl index 133a2b57a43..1fc425bb08d 100644 --- a/test/tint/builtins/gen/literal/atan2/93febc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan2/93febc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.fxc.hlsl index 7c75c828e9b..38a9bf4482f 100644 --- a/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.ir.fxc.hlsl index 6d59ffddb66..404b74a3f44 100644 --- a/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan2/ca698e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/atan2/d983ab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atan2/d983ab.wgsl.expected.fxc.hlsl index 992a0d5fc4e..e4a52ca0835 100644 --- a/test/tint/builtins/gen/literal/atan2/d983ab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atan2/d983ab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atanh/5bf88d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atanh/5bf88d.wgsl.expected.fxc.hlsl index db42fd1e101..7e64e48d5ae 100644 --- a/test/tint/builtins/gen/literal/atanh/5bf88d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atanh/5bf88d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.fxc.hlsl index bd87f10d6d9..93763846e6b 100644 --- a/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl index ddfe39a18dd..d5c4cc38c50 100644 --- a/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/atanh/e3b450.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atanh/e3b450.wgsl.expected.fxc.hlsl index f382917d36e..70d2e5761f0 100644 --- a/test/tint/builtins/gen/literal/atanh/e3b450.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atanh/e3b450.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/atanh/ec4b06.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/atanh/ec4b06.wgsl.expected.fxc.hlsl index 1f65c98926f..f51a34f3a3e 100644 --- a/test/tint/builtins/gen/literal/atanh/ec4b06.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/atanh/ec4b06.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.fxc.hlsl index fc53f62630e..54a735cdac2 100644 --- a/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.ir.fxc.hlsl index 12d9b938c34..b6a8f504dc2 100644 --- a/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/bitcast/436211.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/ceil/09bf52.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ceil/09bf52.wgsl.expected.fxc.hlsl index 137112a96fb..589d4de94d7 100644 --- a/test/tint/builtins/gen/literal/ceil/09bf52.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ceil/09bf52.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ceil/18c240.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ceil/18c240.wgsl.expected.fxc.hlsl index edba838538d..569eb233191 100644 --- a/test/tint/builtins/gen/literal/ceil/18c240.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ceil/18c240.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ceil/4bca2a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ceil/4bca2a.wgsl.expected.fxc.hlsl index 34919bada04..cae4c58f024 100644 --- a/test/tint/builtins/gen/literal/ceil/4bca2a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ceil/4bca2a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.fxc.hlsl index 9cf29c16793..e96e0f4d7f7 100644 --- a/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.ir.fxc.hlsl index 98f307e1bb0..6e64dc982ea 100644 --- a/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ceil/f3f889.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/clamp/235b29.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/clamp/235b29.wgsl.expected.fxc.hlsl index 4e1a40b13b2..71ba1f15229 100644 --- a/test/tint/builtins/gen/literal/clamp/235b29.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/clamp/235b29.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/clamp/2c251b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/clamp/2c251b.wgsl.expected.fxc.hlsl index f6558dc894e..d1f1872a626 100644 --- a/test/tint/builtins/gen/literal/clamp/2c251b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/clamp/2c251b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.fxc.hlsl index 7f4cbb10e00..3f4a6ab8ce5 100644 --- a/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.ir.fxc.hlsl index 865c53386a5..7e6f16cd50b 100644 --- a/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/clamp/553ffb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/clamp/b195eb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/clamp/b195eb.wgsl.expected.fxc.hlsl index 42b34a36414..6c1bc74dea5 100644 --- a/test/tint/builtins/gen/literal/clamp/b195eb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/clamp/b195eb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cos/0835a8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cos/0835a8.wgsl.expected.fxc.hlsl index 95e22c228a2..30c74a3c072 100644 --- a/test/tint/builtins/gen/literal/cos/0835a8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cos/0835a8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cos/0a89f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cos/0a89f7.wgsl.expected.fxc.hlsl index 7c34e198c69..ed1720e2475 100644 --- a/test/tint/builtins/gen/literal/cos/0a89f7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cos/0a89f7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cos/5bc2c6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cos/5bc2c6.wgsl.expected.fxc.hlsl index 874b13329a0..d915f75d8b1 100644 --- a/test/tint/builtins/gen/literal/cos/5bc2c6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cos/5bc2c6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.fxc.hlsl index c84dd59498a..33e70e53fb3 100644 --- a/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.ir.fxc.hlsl index 2404407e4ed..6680cae8be6 100644 --- a/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cos/fc047d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.fxc.hlsl index 4807d3355b8..b90fa442dc1 100644 --- a/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.ir.fxc.hlsl index 3f8c36b5748..cc3dd6f78d0 100644 --- a/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cosh/2ed778.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/cosh/3b7bbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cosh/3b7bbf.wgsl.expected.fxc.hlsl index 6d4c9353cf7..f5e44f16527 100644 --- a/test/tint/builtins/gen/literal/cosh/3b7bbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cosh/3b7bbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cosh/43b672.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cosh/43b672.wgsl.expected.fxc.hlsl index 83eb939c651..484584ea0e1 100644 --- a/test/tint/builtins/gen/literal/cosh/43b672.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cosh/43b672.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cosh/b1b8a0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cosh/b1b8a0.wgsl.expected.fxc.hlsl index 9398fd9a9b0..545d006a6e4 100644 --- a/test/tint/builtins/gen/literal/cosh/b1b8a0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cosh/b1b8a0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/cross/9857cb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/cross/9857cb.wgsl.expected.fxc.hlsl index afc5223a20d..bb3b1a264a6 100644 --- a/test/tint/builtins/gen/literal/cross/9857cb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/cross/9857cb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/degrees/3055d3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/degrees/3055d3.wgsl.expected.fxc.hlsl index fe7ff6f809c..23443e2671a 100644 --- a/test/tint/builtins/gen/literal/degrees/3055d3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/degrees/3055d3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.fxc.hlsl index 8d2ff4e5a03..5ec340585f8 100644 --- a/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.ir.fxc.hlsl index 4d1293355a2..8af93fbc111 100644 --- a/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/degrees/5e9805.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/degrees/dfe8f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/degrees/dfe8f4.wgsl.expected.fxc.hlsl index 545b0dbcf7f..ac6c862ba8e 100644 --- a/test/tint/builtins/gen/literal/degrees/dfe8f4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/degrees/dfe8f4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/degrees/f59715.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/degrees/f59715.wgsl.expected.fxc.hlsl index 415450f9dde..6789054d3ac 100644 --- a/test/tint/builtins/gen/literal/degrees/f59715.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/degrees/f59715.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.fxc.hlsl index 18024ce4a12..6b5719cabae 100644 --- a/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.ir.fxc.hlsl index 0c0274c3abf..9e40a94a938 100644 --- a/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/determinant/32bfde.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.fxc.hlsl index 368ecb33dc1..8dfef38bb91 100644 --- a/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl index 81715cce828..34540f65def 100644 --- a/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.fxc.hlsl index 0e2b643ef33..e5613e26bca 100644 --- a/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl index 8d16bdc3eca..70e4df84d55 100644 --- a/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.fxc.hlsl index e5f8a90db1f..cb68e3de8b7 100644 --- a/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.ir.fxc.hlsl index e3ffdc2289a..b50f6206cfd 100644 --- a/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/7272f3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.fxc.hlsl index 25be82bd2f7..4cb40882c98 100644 --- a/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.ir.fxc.hlsl index 954edcb0247..ce6d606bd72 100644 --- a/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/7d201f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.fxc.hlsl index 9c7a98f38d6..b930b4d0230 100644 --- a/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.ir.fxc.hlsl index 3773b43f600..f4f8d298c8a 100644 --- a/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/892a5d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.fxc.hlsl index 18cf699a9d1..5f55c133aed 100644 --- a/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.ir.fxc.hlsl index f7cf728f9c9..6ac41fdaa84 100644 --- a/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/distance/928fa0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.fxc.hlsl index 569d68892cb..538bbc2fc3b 100644 --- a/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.ir.fxc.hlsl index 6b678e2593b..15569a44005 100644 --- a/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/dot/8e40f1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.fxc.hlsl index cfd987aa6f2..e8b9a897463 100644 --- a/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.ir.fxc.hlsl index 3cf5fe6051a..7d57a5c4945 100644 --- a/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/dot/cd5a04.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.fxc.hlsl index fdf04e773e0..982ef222855 100644 --- a/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.ir.fxc.hlsl index 20edc8aa4b9..3261998f64a 100644 --- a/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/dot/d0d179.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/exp/13806d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp/13806d.wgsl.expected.fxc.hlsl index d61a9e7ccce..b98dcdbf7e5 100644 --- a/test/tint/builtins/gen/literal/exp/13806d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp/13806d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/exp/2e08e2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp/2e08e2.wgsl.expected.fxc.hlsl index f9a88f2bf29..ffac1a390a6 100644 --- a/test/tint/builtins/gen/literal/exp/2e08e2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp/2e08e2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/exp/611a87.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp/611a87.wgsl.expected.fxc.hlsl index f4ec157a4dc..9cda6a93b22 100644 --- a/test/tint/builtins/gen/literal/exp/611a87.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp/611a87.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.fxc.hlsl index e4b6a0b6bbe..bd46ef99830 100644 --- a/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.ir.fxc.hlsl index 7e0814b9baf..1ce812d361a 100644 --- a/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp/c18fe9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/exp2/151a4c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp2/151a4c.wgsl.expected.fxc.hlsl index b22711d49c3..9ef06bf711f 100644 --- a/test/tint/builtins/gen/literal/exp2/151a4c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp2/151a4c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/exp2/751377.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp2/751377.wgsl.expected.fxc.hlsl index eda4c8a2ba6..c5a013e4e5c 100644 --- a/test/tint/builtins/gen/literal/exp2/751377.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp2/751377.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.fxc.hlsl index 3fb9270bdd0..f42f85e158b 100644 --- a/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.ir.fxc.hlsl index 2fb51f2632d..56865146d1f 100644 --- a/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp2/b408e4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/exp2/ffa827.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/exp2/ffa827.wgsl.expected.fxc.hlsl index 93980202d02..3bb31be8321 100644 --- a/test/tint/builtins/gen/literal/exp2/ffa827.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/exp2/ffa827.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/faceForward/524986.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/faceForward/524986.wgsl.expected.fxc.hlsl index ef37a64000e..b03d3dcee31 100644 --- a/test/tint/builtins/gen/literal/faceForward/524986.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/faceForward/524986.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/faceForward/cc63dc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/faceForward/cc63dc.wgsl.expected.fxc.hlsl index 17ffd8828ea..67fc6bdd7e8 100644 --- a/test/tint/builtins/gen/literal/faceForward/cc63dc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/faceForward/cc63dc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/faceForward/fb0f2e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/faceForward/fb0f2e.wgsl.expected.fxc.hlsl index 88baa991324..317d8c28755 100644 --- a/test/tint/builtins/gen/literal/faceForward/fb0f2e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/faceForward/fb0f2e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/floor/3802c0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/floor/3802c0.wgsl.expected.fxc.hlsl index 6c4a158cf59..ac2c47d27f8 100644 --- a/test/tint/builtins/gen/literal/floor/3802c0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/floor/3802c0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/floor/84658c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/floor/84658c.wgsl.expected.fxc.hlsl index 2d05bc1c2b9..b3b3cc19087 100644 --- a/test/tint/builtins/gen/literal/floor/84658c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/floor/84658c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/floor/a2d31b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/floor/a2d31b.wgsl.expected.fxc.hlsl index 8547c535ba6..ed326be24fa 100644 --- a/test/tint/builtins/gen/literal/floor/a2d31b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/floor/a2d31b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.fxc.hlsl index a06f2ed882a..140855a8b00 100644 --- a/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.ir.fxc.hlsl index cd97f4c99b4..bf763a1eab3 100644 --- a/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/floor/b6e09c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/fma/ab7818.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fma/ab7818.wgsl.expected.fxc.hlsl index 61c5bf50fc7..b0301c6df49 100644 --- a/test/tint/builtins/gen/literal/fma/ab7818.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fma/ab7818.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fma/bf21b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fma/bf21b6.wgsl.expected.fxc.hlsl index 4cda2f7e085..cfd96b3039e 100644 --- a/test/tint/builtins/gen/literal/fma/bf21b6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fma/bf21b6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.fxc.hlsl index 4d10b7ab2fa..4d926cc88e8 100644 --- a/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.ir.fxc.hlsl index 8888f91e453..b4c0584a1e5 100644 --- a/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fma/c8abb3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/fma/e7abdc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fma/e7abdc.wgsl.expected.fxc.hlsl index 9f18a1431b0..3008b01014a 100644 --- a/test/tint/builtins/gen/literal/fma/e7abdc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fma/e7abdc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fract/181aa9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fract/181aa9.wgsl.expected.fxc.hlsl index 462aaaa0d6a..36152447119 100644 --- a/test/tint/builtins/gen/literal/fract/181aa9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fract/181aa9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fract/498c77.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fract/498c77.wgsl.expected.fxc.hlsl index 35a1d350491..2f9fbb8ab25 100644 --- a/test/tint/builtins/gen/literal/fract/498c77.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fract/498c77.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fract/958a1d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fract/958a1d.wgsl.expected.fxc.hlsl index b9d0dde60b8..99328db6927 100644 --- a/test/tint/builtins/gen/literal/fract/958a1d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fract/958a1d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.fxc.hlsl index bab16cee4d4..cfdedfdffb8 100644 --- a/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.ir.fxc.hlsl index 2a9b816d356..8e01ff10a00 100644 --- a/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/fract/eb38ce.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/frexp/3dd21e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/frexp/3dd21e.wgsl.expected.fxc.hlsl index 3ecef04e2fe..6c1c9cbebce 100644 --- a/test/tint/builtins/gen/literal/frexp/3dd21e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/frexp/3dd21e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_vec4_f16 { vector fract; diff --git a/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.fxc.hlsl index ab24917274e..105bde27898 100644 --- a/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.ir.fxc.hlsl index ff2e7e6adbe..ad4f6b75d18 100644 --- a/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/frexp/5257dd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/literal/frexp/5f47bf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/frexp/5f47bf.wgsl.expected.fxc.hlsl index 97807c39667..8a99f973da3 100644 --- a/test/tint/builtins/gen/literal/frexp/5f47bf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/frexp/5f47bf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_vec2_f16 { vector fract; diff --git a/test/tint/builtins/gen/literal/frexp/ae4a66.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/frexp/ae4a66.wgsl.expected.fxc.hlsl index 332a4924a2a..410ff69d39e 100644 --- a/test/tint/builtins/gen/literal/frexp/ae4a66.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/frexp/ae4a66.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_vec3_f16 { vector fract; diff --git a/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.fxc.hlsl index 584e210f3ce..cf24ed1c4b2 100644 --- a/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl index aab47a2f39c..2d073815bb9 100644 --- a/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl index c2a14c310f8..e9e69f9f3e7 100644 --- a/test/tint/builtins/gen/literal/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl index d09fc900901..80f5fcccbca 100644 --- a/test/tint/builtins/gen/literal/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl index f39f4d6c7c3..a8ee095df79 100644 --- a/test/tint/builtins/gen/literal/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.fxc.hlsl index 1418169a1ad..daf60d3a807 100644 --- a/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl index 2b89739a7a4..7c2b0bde92f 100644 --- a/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/ldexp/217a31.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/217a31.wgsl.expected.fxc.hlsl index c2fb78dc5cf..9b3437d8135 100644 --- a/test/tint/builtins/gen/literal/ldexp/217a31.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/217a31.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/3d90b4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/3d90b4.wgsl.expected.fxc.hlsl index 2ecd2a0b779..e1b37726b46 100644 --- a/test/tint/builtins/gen/literal/ldexp/3d90b4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/3d90b4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.fxc.hlsl index 8ab78448cba..738501fe738 100644 --- a/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl index 1885776efd3..1c6afb99fd3 100644 --- a/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/ldexp/7485ce.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/7485ce.wgsl.expected.fxc.hlsl index d1cb96984a2..b3fbc79442b 100644 --- a/test/tint/builtins/gen/literal/ldexp/7485ce.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/7485ce.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/7fa13c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/7fa13c.wgsl.expected.fxc.hlsl index e9f367076f2..ea56381f6cd 100644 --- a/test/tint/builtins/gen/literal/ldexp/7fa13c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/7fa13c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/8a0c2f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/8a0c2f.wgsl.expected.fxc.hlsl index f4cb0805f62..c2ada7aeb62 100644 --- a/test/tint/builtins/gen/literal/ldexp/8a0c2f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/8a0c2f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/ldexp/8e43e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/ldexp/8e43e9.wgsl.expected.fxc.hlsl index 0ddb07a57f3..545c4a923ce 100644 --- a/test/tint/builtins/gen/literal/ldexp/8e43e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/ldexp/8e43e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.fxc.hlsl index b147a0a1b95..96ef0413ef6 100644 --- a/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.ir.fxc.hlsl index cb571529fdd..ca84f41c4c0 100644 --- a/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/3f0e13.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.fxc.hlsl index 5c52a0a3d47..91e5b8538f3 100644 --- a/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.ir.fxc.hlsl index 102b5384bde..8310d3c80e9 100644 --- a/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/5b1a9b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.fxc.hlsl index ff94cb54e79..651a170db70 100644 --- a/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.ir.fxc.hlsl index 7ed7d71944a..58fa48bd5e3 100644 --- a/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/ba16d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.fxc.hlsl index dec1fd4c9d6..59ce66e527a 100644 --- a/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.ir.fxc.hlsl index c9004e7a57b..618873d2c06 100644 --- a/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/length/c158da.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/log/6ff86f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log/6ff86f.wgsl.expected.fxc.hlsl index a2340d4b4e9..b64c6d56591 100644 --- a/test/tint/builtins/gen/literal/log/6ff86f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log/6ff86f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/log/8f0e32.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log/8f0e32.wgsl.expected.fxc.hlsl index 76468da0790..0dfa95e3ac7 100644 --- a/test/tint/builtins/gen/literal/log/8f0e32.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log/8f0e32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.fxc.hlsl index f7043cded98..4fcf53457ef 100644 --- a/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.ir.fxc.hlsl index e66d5475b1a..b1fe6c35263 100644 --- a/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log/c9f489.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/log/cdbdc1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log/cdbdc1.wgsl.expected.fxc.hlsl index c019e7d12cd..01f2057bfc0 100644 --- a/test/tint/builtins/gen/literal/log/cdbdc1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log/cdbdc1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/log2/38b478.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log2/38b478.wgsl.expected.fxc.hlsl index db132b5ee7e..c035bd0d16f 100644 --- a/test/tint/builtins/gen/literal/log2/38b478.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log2/38b478.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/log2/776088.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log2/776088.wgsl.expected.fxc.hlsl index b6787a36f70..2930adaba0d 100644 --- a/test/tint/builtins/gen/literal/log2/776088.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log2/776088.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.fxc.hlsl index d97189df64b..c322e4fa9e1 100644 --- a/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.ir.fxc.hlsl index 571d261cf9d..4b1cb96615f 100644 --- a/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log2/8c10b3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/log2/fb9f0b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/log2/fb9f0b.wgsl.expected.fxc.hlsl index bf3b56659cb..49553c2601c 100644 --- a/test/tint/builtins/gen/literal/log2/fb9f0b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/log2/fb9f0b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.fxc.hlsl index 611b2f6dec9..118cc45f54f 100644 --- a/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.ir.fxc.hlsl index 81fafc506f2..2578ee0e723 100644 --- a/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/max/111ac0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/max/34956e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/max/34956e.wgsl.expected.fxc.hlsl index e59a3a26bb0..3f4612c0833 100644 --- a/test/tint/builtins/gen/literal/max/34956e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/max/34956e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/max/445169.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/max/445169.wgsl.expected.fxc.hlsl index f49a0763c62..55a53b7ab5f 100644 --- a/test/tint/builtins/gen/literal/max/445169.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/max/445169.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/max/e14f2b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/max/e14f2b.wgsl.expected.fxc.hlsl index ce42adfb1b3..f5e1c662b1b 100644 --- a/test/tint/builtins/gen/literal/max/e14f2b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/max/e14f2b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/min/7c710a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/min/7c710a.wgsl.expected.fxc.hlsl index e1faf6b41a5..9176db3afc0 100644 --- a/test/tint/builtins/gen/literal/min/7c710a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/min/7c710a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/min/ab0acd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/min/ab0acd.wgsl.expected.fxc.hlsl index 5bc27100d55..5568b3727cf 100644 --- a/test/tint/builtins/gen/literal/min/ab0acd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/min/ab0acd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.fxc.hlsl index ea7e9a99e7c..76c2a8ab41f 100644 --- a/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.ir.fxc.hlsl index 5fb2cb233ed..c6024c81cea 100644 --- a/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/min/ac84d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/min/e780f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/min/e780f9.wgsl.expected.fxc.hlsl index 201b737e182..b060e620907 100644 --- a/test/tint/builtins/gen/literal/min/e780f9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/min/e780f9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.fxc.hlsl index de157cfc519..3a6b70a5db3 100644 --- a/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.ir.fxc.hlsl index dd1f146bb82..774b74a3258 100644 --- a/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/38cbbb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/mix/63f2fd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/mix/63f2fd.wgsl.expected.fxc.hlsl index edd095b9ba4..a79d236f5ce 100644 --- a/test/tint/builtins/gen/literal/mix/63f2fd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/63f2fd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/mix/98ee3e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/mix/98ee3e.wgsl.expected.fxc.hlsl index 151b9d20fd7..a4cd9233c0e 100644 --- a/test/tint/builtins/gen/literal/mix/98ee3e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/98ee3e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/mix/c1aec6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/mix/c1aec6.wgsl.expected.fxc.hlsl index 2e96ba057ab..a0961aa5171 100644 --- a/test/tint/builtins/gen/literal/mix/c1aec6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/c1aec6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/mix/e46a83.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/mix/e46a83.wgsl.expected.fxc.hlsl index 90a313a2957..86c7cb7dff7 100644 --- a/test/tint/builtins/gen/literal/mix/e46a83.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/e46a83.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/mix/ee2468.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/mix/ee2468.wgsl.expected.fxc.hlsl index 62e5201f25c..d66a8c8b01e 100644 --- a/test/tint/builtins/gen/literal/mix/ee2468.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/ee2468.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/mix/f1a543.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/mix/f1a543.wgsl.expected.fxc.hlsl index 459064eabd8..71262ccfa42 100644 --- a/test/tint/builtins/gen/literal/mix/f1a543.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/mix/f1a543.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/modf/45005f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/modf/45005f.wgsl.expected.fxc.hlsl index a9c270422d9..e7bde71d34b 100644 --- a/test/tint/builtins/gen/literal/modf/45005f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/modf/45005f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_vec3_f16 { vector fract; diff --git a/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.fxc.hlsl index 978c9f057fa..0d8cc9ee972 100644 --- a/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl index c9946c5fc3a..5c29013fbe6 100644 --- a/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/literal/modf/995934.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/modf/995934.wgsl.expected.fxc.hlsl index 058f202313b..2159b8c0797 100644 --- a/test/tint/builtins/gen/literal/modf/995934.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/modf/995934.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_vec4_f16 { vector fract; diff --git a/test/tint/builtins/gen/literal/modf/a545b9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/modf/a545b9.wgsl.expected.fxc.hlsl index 6488fc901f0..5e76e56f16e 100644 --- a/test/tint/builtins/gen/literal/modf/a545b9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/modf/a545b9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_vec2_f16 { vector fract; diff --git a/test/tint/builtins/gen/literal/normalize/39d5ec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/normalize/39d5ec.wgsl.expected.fxc.hlsl index a323ebb8335..73e08994d38 100644 --- a/test/tint/builtins/gen/literal/normalize/39d5ec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/normalize/39d5ec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/normalize/7990f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/normalize/7990f3.wgsl.expected.fxc.hlsl index ebf76629571..98f002e2a8e 100644 --- a/test/tint/builtins/gen/literal/normalize/7990f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/normalize/7990f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/normalize/b8cb8d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/normalize/b8cb8d.wgsl.expected.fxc.hlsl index b6db92f34e5..6348a727f96 100644 --- a/test/tint/builtins/gen/literal/normalize/b8cb8d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/normalize/b8cb8d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/pow/4f33b2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/pow/4f33b2.wgsl.expected.fxc.hlsl index 1575a56a8f6..0a3ca500645 100644 --- a/test/tint/builtins/gen/literal/pow/4f33b2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/pow/4f33b2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.fxc.hlsl index 335384797d4..42cd5d5e79f 100644 --- a/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl index 9139461ebb9..03913e1261a 100644 --- a/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/pow/f37b25.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/pow/f37b25.wgsl.expected.fxc.hlsl index cf9c5ba7ab6..2a4721b3d0d 100644 --- a/test/tint/builtins/gen/literal/pow/f37b25.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/pow/f37b25.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/pow/fa5429.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/pow/fa5429.wgsl.expected.fxc.hlsl index bd2df481878..bf06bf7445d 100644 --- a/test/tint/builtins/gen/literal/pow/fa5429.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/pow/fa5429.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl index 91884b0478e..4de052d51b3 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl index bdb42d0d117..be68b97a51b 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl index 71c5cf50868..2e430dae821 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl index acf0b86dcbe..ccf64035094 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl index a86791b6590..1c53d78d0a9 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl index 6f902a891c9..098e3765895 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.fxc.hlsl index d07378c238a..716202b7076 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl index ae705684ac9..18e65c991a4 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.fxc.hlsl index 54b83b38112..b9c5901ba3b 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl index ddc0fcc13cf..47940736019 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl index b4c6c284656..09c4ee5564f 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl index 31eed63e3d6..a4f91335007 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl index 78f737122d9..99cb744c53e 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl index c1fdc949dcc..fbd05b0366a 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl index 13cba1e9c20..2b534d192be 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl index c9aa5cc593c..838d766cbaa 100644 --- a/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl index 2cb41372227..3013b3eca45 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl index c7de806f373..9e1e59486a1 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl index ad45547ce00..0830f2b95ef 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl index 8d2f244282b..90b2f46f19c 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl index d2c212bf026..14e53ab032a 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl index 26a5a9460ac..dde32e4d188 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl index 853b1a2c298..e97b189ad3e 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl index 50e5ef65e00..4360aadba92 100644 --- a/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.fxc.hlsl index 671d74f306a..5c1a641c2c3 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl index b43082125a9..069cd1e4e8f 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.fxc.hlsl index 565666de9d6..35081efd4d7 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl index da75c654f07..48cc7b2da94 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.fxc.hlsl index c552e49132a..c633c6da760 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl index 88c9de25b8a..7baad894b13 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.fxc.hlsl index 4fad162770e..e0f96957579 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl index 9b37b50bfa6..5138592426d 100644 --- a/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.fxc.hlsl index 5e74e3438e5..962ab3430b6 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl index 28bf0e5476b..54e0920bbb3 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl index e00d392bbe0..f5b7de53b27 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl index 521bb81ec03..3c0be542788 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.fxc.hlsl index be1a960c9fd..f58e9c43fe5 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl index 41b1f25b8d3..7b85982b1e3 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl index 57d07040b38..e36bf3d1332 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl index 5053364db26..8d5d5b2092f 100644 --- a/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.fxc.hlsl index 334ded0ffc8..4950bceebee 100644 --- a/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.ir.fxc.hlsl index c60e2ad78ce..6294152ef50 100644 --- a/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/radians/208fd9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/radians/44f20b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/radians/44f20b.wgsl.expected.fxc.hlsl index c2f9e079314..667dd46cbbb 100644 --- a/test/tint/builtins/gen/literal/radians/44f20b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/radians/44f20b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/radians/7ea4c7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/radians/7ea4c7.wgsl.expected.fxc.hlsl index 374fd624307..495df4b8f73 100644 --- a/test/tint/builtins/gen/literal/radians/7ea4c7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/radians/7ea4c7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/radians/fbacf0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/radians/fbacf0.wgsl.expected.fxc.hlsl index c78df4ff0e4..298bd80a5b1 100644 --- a/test/tint/builtins/gen/literal/radians/fbacf0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/radians/fbacf0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/reflect/310de5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/reflect/310de5.wgsl.expected.fxc.hlsl index 445175f0e97..b21f489f2fd 100644 --- a/test/tint/builtins/gen/literal/reflect/310de5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/reflect/310de5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/reflect/61ca21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/reflect/61ca21.wgsl.expected.fxc.hlsl index b2aad42521c..3a3b0b55682 100644 --- a/test/tint/builtins/gen/literal/reflect/61ca21.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/reflect/61ca21.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/reflect/bb15ac.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/reflect/bb15ac.wgsl.expected.fxc.hlsl index cceae41ddab..43f852ff836 100644 --- a/test/tint/builtins/gen/literal/reflect/bb15ac.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/reflect/bb15ac.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/refract/0594ba.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/refract/0594ba.wgsl.expected.fxc.hlsl index f7baa91b8d7..77521526bbf 100644 --- a/test/tint/builtins/gen/literal/refract/0594ba.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/refract/0594ba.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/refract/570cb3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/refract/570cb3.wgsl.expected.fxc.hlsl index 7630165db14..1d7a512674d 100644 --- a/test/tint/builtins/gen/literal/refract/570cb3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/refract/570cb3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/refract/8984af.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/refract/8984af.wgsl.expected.fxc.hlsl index 1113050502c..9564e700639 100644 --- a/test/tint/builtins/gen/literal/refract/8984af.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/refract/8984af.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.fxc.hlsl index 69080b2f0ce..69da4d2efcc 100644 --- a/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.ir.fxc.hlsl index d9ff951c3a6..cca00b7b2b0 100644 --- a/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/round/9078ef.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/round/d87e84.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/round/d87e84.wgsl.expected.fxc.hlsl index ea8d8191e6e..5a85b48d968 100644 --- a/test/tint/builtins/gen/literal/round/d87e84.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/round/d87e84.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/round/e1bba2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/round/e1bba2.wgsl.expected.fxc.hlsl index cb65cac201e..605a0cd44bb 100644 --- a/test/tint/builtins/gen/literal/round/e1bba2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/round/e1bba2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/round/f665b5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/round/f665b5.wgsl.expected.fxc.hlsl index a84e020ad7f..0efde499292 100644 --- a/test/tint/builtins/gen/literal/round/f665b5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/round/f665b5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/saturate/462535.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/saturate/462535.wgsl.expected.fxc.hlsl index e066735d177..69680edf3ef 100644 --- a/test/tint/builtins/gen/literal/saturate/462535.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/saturate/462535.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/saturate/cd2028.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/saturate/cd2028.wgsl.expected.fxc.hlsl index bdc8b5faaf8..db43df9ed4f 100644 --- a/test/tint/builtins/gen/literal/saturate/cd2028.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/saturate/cd2028.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/saturate/dcde71.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/saturate/dcde71.wgsl.expected.fxc.hlsl index 089a988e740..d12c371cfa2 100644 --- a/test/tint/builtins/gen/literal/saturate/dcde71.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/saturate/dcde71.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.fxc.hlsl index fb6862d4648..cffdcdcc781 100644 --- a/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.ir.fxc.hlsl index 06cf5d0ee5d..a4ed80acd1e 100644 --- a/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/saturate/e8df56.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.fxc.hlsl index 8eb3909b32f..8ffe700b172 100644 --- a/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.ir.fxc.hlsl index f692f03131e..ee324136e76 100644 --- a/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/10e73b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/select/1ada2a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/select/1ada2a.wgsl.expected.fxc.hlsl index ee26e64ae09..93dae522bd7 100644 --- a/test/tint/builtins/gen/literal/select/1ada2a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/1ada2a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/select/53d518.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/select/53d518.wgsl.expected.fxc.hlsl index ad12118a4ef..b61662aec63 100644 --- a/test/tint/builtins/gen/literal/select/53d518.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/53d518.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/select/830dd9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/select/830dd9.wgsl.expected.fxc.hlsl index 8bdb3f6e2fc..f8e8268e2f0 100644 --- a/test/tint/builtins/gen/literal/select/830dd9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/830dd9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/select/86f9bd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/select/86f9bd.wgsl.expected.fxc.hlsl index ff3a3cd90b3..2e5fddd888b 100644 --- a/test/tint/builtins/gen/literal/select/86f9bd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/86f9bd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/select/a081f1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/select/a081f1.wgsl.expected.fxc.hlsl index e7e0291d556..3b05564df06 100644 --- a/test/tint/builtins/gen/literal/select/a081f1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/a081f1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/select/ed7c13.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/select/ed7c13.wgsl.expected.fxc.hlsl index 54b4b250f75..a68b093f39a 100644 --- a/test/tint/builtins/gen/literal/select/ed7c13.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/select/ed7c13.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sign/160933.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sign/160933.wgsl.expected.fxc.hlsl index df5a18ef534..44c028f5a66 100644 --- a/test/tint/builtins/gen/literal/sign/160933.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sign/160933.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sign/5d283a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sign/5d283a.wgsl.expected.fxc.hlsl index 6e8fc40af03..6f91799dddf 100644 --- a/test/tint/builtins/gen/literal/sign/5d283a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sign/5d283a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.fxc.hlsl index fb9ddd05665..4852d0d6554 100644 --- a/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.ir.fxc.hlsl index 7bf47f4f746..c76c7fbbad7 100644 --- a/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sign/7c85ea.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/sign/ccdb3c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sign/ccdb3c.wgsl.expected.fxc.hlsl index 6d60a4e2b52..f6743d022ed 100644 --- a/test/tint/builtins/gen/literal/sign/ccdb3c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sign/ccdb3c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sin/2c903b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sin/2c903b.wgsl.expected.fxc.hlsl index eff305e1a3b..a0c4de308a4 100644 --- a/test/tint/builtins/gen/literal/sin/2c903b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sin/2c903b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sin/3cca11.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sin/3cca11.wgsl.expected.fxc.hlsl index 31fce32b823..10ce3e8a4da 100644 --- a/test/tint/builtins/gen/literal/sin/3cca11.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sin/3cca11.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sin/5c0712.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sin/5c0712.wgsl.expected.fxc.hlsl index 430416debf5..aae3fbd622f 100644 --- a/test/tint/builtins/gen/literal/sin/5c0712.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sin/5c0712.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.fxc.hlsl index 073c35253d2..fda237750ab 100644 --- a/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.ir.fxc.hlsl index ea9496ddef2..7a11dad94bf 100644 --- a/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sin/66a59f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/sinh/0908c1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sinh/0908c1.wgsl.expected.fxc.hlsl index 24c56cb31ac..21e73f7fea5 100644 --- a/test/tint/builtins/gen/literal/sinh/0908c1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sinh/0908c1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.fxc.hlsl index 844546dfe9c..d2db330b989 100644 --- a/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.ir.fxc.hlsl index 0311800c0f0..decefb3b442 100644 --- a/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sinh/69cce2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/sinh/924f19.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sinh/924f19.wgsl.expected.fxc.hlsl index e7096b8365d..d8c9ba36a52 100644 --- a/test/tint/builtins/gen/literal/sinh/924f19.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sinh/924f19.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sinh/ba7e25.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sinh/ba7e25.wgsl.expected.fxc.hlsl index a33d97f0545..f0d188ff9e5 100644 --- a/test/tint/builtins/gen/literal/sinh/ba7e25.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sinh/ba7e25.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/smoothstep/12c031.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/smoothstep/12c031.wgsl.expected.fxc.hlsl index 9d4da8dabf0..6c33284b91d 100644 --- a/test/tint/builtins/gen/literal/smoothstep/12c031.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/smoothstep/12c031.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.fxc.hlsl index 8b4fb15d14e..a72081dc1bb 100644 --- a/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl index 400e890ac91..9614cfa8704 100644 --- a/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/smoothstep/6e7a74.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/smoothstep/6e7a74.wgsl.expected.fxc.hlsl index 30957524438..a7edb5a05b5 100644 --- a/test/tint/builtins/gen/literal/smoothstep/6e7a74.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/smoothstep/6e7a74.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/smoothstep/c43ebd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/smoothstep/c43ebd.wgsl.expected.fxc.hlsl index 7481138ca60..299d5785487 100644 --- a/test/tint/builtins/gen/literal/smoothstep/c43ebd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/smoothstep/c43ebd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sqrt/803d1c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sqrt/803d1c.wgsl.expected.fxc.hlsl index 8467c2e2751..b6639e93e63 100644 --- a/test/tint/builtins/gen/literal/sqrt/803d1c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sqrt/803d1c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sqrt/895a0c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sqrt/895a0c.wgsl.expected.fxc.hlsl index ec61ffb9c6a..896d5584cdc 100644 --- a/test/tint/builtins/gen/literal/sqrt/895a0c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sqrt/895a0c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sqrt/d9ab4d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sqrt/d9ab4d.wgsl.expected.fxc.hlsl index 9c228f56af9..f7f8d9f08c4 100644 --- a/test/tint/builtins/gen/literal/sqrt/d9ab4d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sqrt/d9ab4d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.fxc.hlsl index bd1acf1ee85..6181a29d9ad 100644 --- a/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl index 32d428f3e77..fad360b730d 100644 --- a/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/step/07cb06.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/step/07cb06.wgsl.expected.fxc.hlsl index 1c52ffa23c0..c74d2ef059e 100644 --- a/test/tint/builtins/gen/literal/step/07cb06.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/step/07cb06.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.fxc.hlsl index 79017f468c5..6739d9ad28d 100644 --- a/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.ir.fxc.hlsl index 50483c53060..3852d43db6f 100644 --- a/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/step/630d07.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/step/baa320.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/step/baa320.wgsl.expected.fxc.hlsl index 39ae9d4a96f..a933727cf69 100644 --- a/test/tint/builtins/gen/literal/step/baa320.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/step/baa320.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/step/cc6b61.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/step/cc6b61.wgsl.expected.fxc.hlsl index 6c4240d7d63..92f0a77510d 100644 --- a/test/tint/builtins/gen/literal/step/cc6b61.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/step/cc6b61.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl index 1658c9c6432..d6d97e3b1db 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl index be793973c57..50fc74f227d 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl index dfed15713a6..2777a411ba6 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl index 2480cc4f667..738fb692cdc 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl index 9fd7572f18f..8038a67c788 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl index 1fa0038e86b..88a7f21cae2 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl index e76234e42a0..c32cd9dd7af 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl index 55143332869..454bdbdd9f3 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl index d2bb6fc3f3d..0f26cd51232 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl index 08657bab421..44a26c3b493 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl index a8205f83f23..cb98a5d2a41 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl index 520d60b8be1..e0cdcaa56c5 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl index 064f03cf6e4..092a89dabaa 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl index d36e861a662..1f0750ca426 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl index 2f5f88839cf..b723340a0c7 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl index 8939958c880..bea04c40f6a 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl index b6e0c713837..d632a3798a8 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl index 3761fb20efd..252509a3887 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl index 0fa271237a5..8a74310e93f 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl index 53da141da6f..f1053bda4e3 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl index a85f53ca902..cf53eb737f0 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl index fbc3d36a2b1..cb4fecd584f 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl index aec29158c08..2a60cadb4d3 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl index 0af6c062e59..4670df6cdd1 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl index 8ef914b7f50..c41c3051ea8 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl index f49a50d33a8..e9cc7e3d823 100644 --- a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.fxc.hlsl index ebfc1b7f503..0b08ad6a960 100644 --- a/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl index 648fc80f2ce..ab9f3149781 100644 --- a/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl index bf3f96a333a..6277f58833b 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl index fa63523747a..66011858dc9 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.fxc.hlsl index af1b9d6f8a7..0488b243e4c 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl index 323562a2439..d4a43260763 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl index cddd742f39d..50b7d572e9e 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl index bcc669e1703..c2c1a215480 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.fxc.hlsl index 053d9560d77..556d06a9e11 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl index c4befda2d42..149b0e851e4 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.fxc.hlsl index ee9819ac15e..6b6e3ef2de0 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl index 38625c1ca3c..232b1bceab7 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl index 8efd35e5dc1..465b0765cd4 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl index 162f06d0711..81e678a235a 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl index 2ef23e16042..a9eb9f9afb2 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl index 57d7596a873..24f08d191ef 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl index fe29ad3baea..649f8b64559 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl index 4afc3d45ded..eafa0c4f88e 100644 --- a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.fxc.hlsl index 125694991d6..9260d1644af 100644 --- a/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl index b77ce8913c4..d7c60e22139 100644 --- a/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl index 4d0abcc1412..6ccad34e1da 100644 --- a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl index dc760aed968..d5b0aff3d60 100644 --- a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl index 628f9e721b0..aef5fce4510 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl index edb05df1cb9..74c9e16a7c9 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl index ac53c34ce6e..523a1e7f5be 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl index 336958ece50..4d6bb9947ad 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl index f1b51acad0c..1ea1933b876 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl index 9a9f09e3e91..494f714fab3 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl index 3acffcc8354..c84215d57ee 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl index 9f7ebb34427..7dc274844bd 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl index 634d5e80507..8e329911c9b 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl index 84efacecc17..09c615c60fa 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl index 611631b23e9..59b554b9ddc 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl index 8ed9679ef2e..59bc65e8d4c 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl index a02b5ff18eb..633d235aef9 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl index 437f3a1dcde..b9a5b6bcd34 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl index 607fa19fe79..618885b059b 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl index b07128d7dcd..8a4cc509a7f 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl index 0e89caa09e1..9b198abe213 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl index d1ed5db0e9a..a51e9276180 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl index 4b7557d1ae4..793e0bfdd69 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl index 82036e8666f..fb4726657d4 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl index be18df71229..f3dedb60536 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl index 4412276155a..a8e26438948 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl index 570b8659cc0..b5973d18b35 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl index f93ae0744d0..d4e90d58394 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl index 1eeaf285320..e5e4b644e10 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl index e65ad96d8cb..95818c20854 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl index 6fd9a15aa7a..5ae9a456d7e 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl index f2cf9a38f07..d6c306cd656 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl index ffa9b0c21c2..957540a1a1a 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl index d3c52d1c321..f651e611d73 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl index 1941dfd1a2a..1ec00d2f4e7 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl index f284f919854..57b11cb81a9 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl index f3aee64562d..64d89a6df67 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl index e689b8aca16..d10c163e408 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl index 0d1af2edd8a..78e2db8f453 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl index e634bc57e86..e1485f208e7 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl index 8d18eada28e..57cb662f225 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl index 75d705f59be..45974b31dba 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl index 7c0cd70fe93..03047d75feb 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl index 6279ef55120..d7029d95a72 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl index db2b2699de7..a61053da013 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl index fa221fd0769..d6bed1142ad 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl index 915ba8dd499..9703179f977 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl index cefc3bc86fe..7b15322d4a0 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl index ea42a76ce13..f4cbee66ee7 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl index b4effccff32..ba0e9a1f32f 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl index ce3de5e6231..9ff1e37da48 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl index 9b621649167..7038684c762 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl index 1f9cbbda838..48dfacce1f4 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl index 28495649756..c78a2fa8969 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl index a801494525f..922b04133ee 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl index f684efbe555..4ccc2ee9551 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl index 5060ec44d9d..585d8dc53e2 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl index b3433d00482..70251e9a01a 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl index f19a0366a22..faab8f207bc 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl index 6e3931f4822..60617764c58 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl index dc55db4ad52..e5c9784b4e2 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl index 1dfb5243c48..3c44302264f 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl index d63d2ea11ae..16570ca4e6b 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl index 28faec2e7f9..00e7b9b74af 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl index 41b1850173d..1e2e100651c 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl index e2a440d2fa0..d69d05b7513 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl index f6edad8003d..b7047332e72 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl index 58bb77f0f98..42c3bd49f4d 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl index f79b6a7d0bd..574eb293431 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl index b74b1aececb..23237c30eb5 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl index 2ebfcd75b31..9089b4fe942 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl index fc8ff41c291..946ee594cf2 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl index 6f0f814bc42..a1547e89dc4 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl index 3c6d1e5dc08..ef234afb99e 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl index 3ec5b3d6d1a..3476e7471cf 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl index 4be98b1d763..6c0ed826aeb 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl index cee13c04ce7..b728b7dbbe3 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl index 2dc70295825..18a7fbf12ce 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl index b25ea5f76cd..2ee298eddd0 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl index 311efbdfb99..d5d7a017012 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl index 1315935908f..cc1da559e80 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl index dfa1ec208b2..8ee1f859c11 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl index b20e6ad18b5..1ada5adbd56 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl index b06f1d5f980..41c3904b423 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl index 8fb359a0a94..608993dd92b 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl index 9825a0f03ed..a5d3ce05bb7 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl index c38707db22c..4c4af495149 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl index 841863fead8..0b43d423005 100644 --- a/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.fxc.hlsl index 80991124e9f..96dacfce443 100644 --- a/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl index bae59fa6362..3ece0661de7 100644 --- a/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl index 3bc2dbdf34a..bdf3c908e00 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl index c51cb489b09..741bff92160 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl index 39d39034f1a..bf1f4188bf5 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl index 6d6b611ffda..e44ed737dff 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl index 9e51dee7698..ba6d35407e7 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl index f6d0970ef6c..78156bfb6d9 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl index 7385b83f7ec..8fedbd918e0 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl index eb820a7bc83..983c2514880 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl index 48c563476e7..42314b8bc32 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl index 06887039d64..818f1e44d44 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl index 7f2e5dc2a41..fc7c582334b 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl index ac5dc28377e..9aaa2d451ee 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl index a342066d942..e19a99fb8b0 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl index eae41afabca..1f87db345c4 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl index 0e2ab23d591..488347c2a1e 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl index 0a860a2c9a2..b75857f3f89 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl index 071f4cced0f..69575304442 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl index 991f84dacb1..63fab5f9678 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl index b6ba663d5b2..314c7a83478 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl index 2c088c9886c..08ac1fd9fe7 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl index c871e107d34..b80649c9c4c 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl index b815dd51477..adc97bbc532 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl index 97609ff271b..bc4e8d33b3f 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl index 4380aef4161..0a0d48cc5be 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl index 6ba491dd271..cdba60a4b70 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl index f7cb81b7c55..5621d616db0 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl index 14dc0725f78..2598338b73b 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl index 3195d5b239a..7118b326bb1 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl index de524913ace..2880697a091 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl index 3c490461979..8d65f131a99 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl index 5f5d83d55b7..71537f3544b 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl index 92b159148ca..6614ea970f9 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl index b9194bb05ff..e99827435ba 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl index 0ad57390adc..3d27570d706 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl index f184499532d..54f9a51f7ab 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl index 79c2c901c97..4167b5ffad3 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl index 79927bca4b5..d069ade246b 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl index b54ce8733af..e4613d37b61 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl index 02cd741bad6..41a4341e138 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl index feb931f229c..059706c9489 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl index 224b2cb0e52..5f4e541249f 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl index 8abb37cc358..c45fadf936f 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl index 4ba093d624d..7fcfd2f13e6 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl index 982f004ad2d..562d6674906 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl index de0015ee8ef..81245542b2a 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl index 00833d59313..efb8ee5c6e5 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl index 54a7864e3f6..a289cb0dae6 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl index 7a6af54c9d6..6348e119aa1 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl index f91e25d82a9..486c4fe5cbb 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl index 15747832e4e..f2f487e1df7 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl index 743fda24f96..bd1ac08b1fa 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl index e1e29af7f19..60a445f3d0a 100644 --- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.fxc.hlsl index 7f1f4e82daf..9c418fb9ea0 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl index 0d90e1841f8..d026c8b7409 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl index 6b3e6657c3a..c2e4aeb86f1 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl index 69d0740d31c..a47be0ba94d 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl index 7615c4107a2..9e3b633a8d8 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl index f445559f27e..cf9be8a8cdb 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.fxc.hlsl index 1f426000270..39cf96e8633 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl index 43046ad515c..597add3fb4b 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.fxc.hlsl index a44d824bf5a..019535f7108 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl index 6b566d9ecc5..3d152aae030 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/33e339.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/33e339.wgsl.expected.fxc.hlsl index ba26591eab1..ec9ac64baf7 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/33e339.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/33e339.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl index ce3382738e4..bfa59ede797 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl index 57e2e4f521b..9cbbbf2af2f 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.fxc.hlsl index 117a01df8c1..7d8312cc158 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl index d3b2bec90b3..2005117e45d 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.fxc.hlsl index 86ded5aec6a..ba662c1c02b 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl index a449bbc9bbf..47bc3ce15cc 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/7c934c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/7c934c.wgsl.expected.fxc.hlsl index 1de2eb59421..c74d2f2bdfa 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/7c934c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/7c934c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl index 739e95740bb..5e78b1dcf3e 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl index 8dc08f9fc0e..3bd0a303255 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.fxc.hlsl index 2705a35d6ae..91a4b49a74c 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl index 679d8ae8471..6b8b5cf847f 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl index 28d4006ff5f..1ab10099453 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl index f84df9cea03..6839c79b9ee 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl index 08cfef67d30..56e59893430 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl index cec0ecb9742..2af792cca88 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl index c2b3cd60d1a..5d5bfd687ec 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl index f071a01877f..f1b79776f24 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl index e3865a6f6c7..b33f4d1c49f 100644 --- a/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.fxc.hlsl index d22c7bba3eb..777767bcc96 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl index 18f6302515d..05741f4c9f5 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl index b27d0f045b8..11040876553 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl index 781585bbe81..af653938c01 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.fxc.hlsl index 8c848b025b2..ac991b0a8cb 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl index 9221817372a..42b661110f9 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.fxc.hlsl index 6d19dda81b2..994da1bee1d 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl index 9096a00aebf..8057280fe02 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.fxc.hlsl index ba056bbaee4..da55710ec8e 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl index b2e12957c75..2e9e4014a6d 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.fxc.hlsl index bdca2d78172..6d902a9b1d4 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl index 1728824be47..502e34a6e2a 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.fxc.hlsl index 74f0d07ce50..17a14c4da33 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl index 3b9032aa2ea..6c96eb5d767 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.fxc.hlsl index 2b1fec23503..20a8d93cf7e 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl index 2f8a52dd42f..e76d1015d35 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.fxc.hlsl index 66e51264bbb..102541003a1 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl index d2e5efa050c..530e0921446 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl index d792cf955a8..c15231d9cb8 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl index 1fa63d9731b..67da4bce76a 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl index af34e22259b..bba13004c84 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl index dda5e94fc80..9dbc4498757 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl index d17557dbd22..9d98a248c77 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl index 3f96c621ed5..c81a44b7f6a 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl index fd480ee1c9b..b97aa5fe138 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl index 5789f188268..70c932b8678 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl index f5743d476d6..cf82b587bf0 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl index 311d6d08be0..b5f8dabdec7 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMin/d85be6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMin/d85be6.wgsl.expected.fxc.hlsl index 43708f7993c..380341fea4f 100644 --- a/test/tint/builtins/gen/literal/subgroupMin/d85be6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMin/d85be6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl index 103202c68f6..0bd4710a641 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl index f022fce7508..60a84c2d604 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl index 52ffafda62a..f025bd8ac2b 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl index 21f3747b5a1..e81734a6f43 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl index edc35d0ea9c..5ca6fa3af04 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl index ac812c80db2..24193fc8ff9 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl index 2b86d8a49cf..e8ff025c368 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl index ec670020b7c..4726bad55b6 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl index b531447b9bc..fc53dbc5346 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl index df52263c678..1e747a601d1 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl index 09259757214..24164999da2 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl index ccf94aab52e..6011eaa8d00 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl index 80f6a4bf50c..334204aa765 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl index cecf8c700e4..413996a35f7 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl index 866fe424cda..42e81e4d086 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl index 2f2fe971fb3..ac7702ce28a 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl index 98e31cf9f28..0c3020f615e 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl index 1d6f0eb12ba..8e99ea6d6e4 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl index 5c62710f60c..391e79ab3b1 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl index 27f3f014414..46e0ca1b2df 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl index 0a338aed921..084c29598f9 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl index 9d16a9afd17..c68bc15b0c6 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl index 12d1e36d151..27e5958b857 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl index 06be382dadb..52e41ae4cc5 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl index 55fc76874e3..5c713e55f83 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl index 671318d6831..6c92a5f4200 100644 --- a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.fxc.hlsl index e1496d6b732..0935ae65a9b 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl index e4d04bf6810..63b5a93751b 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.fxc.hlsl index 7cdb4b8b91a..9ef8926f090 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl index 0cd309b2875..b63575b0ffe 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl index e2550c7bcf8..0055de71d37 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl index 944feadc781..302c450de24 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl index 44c1d9c9692..f464aade99c 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl index f6b9c07d1ea..4bea76f941a 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.fxc.hlsl index cf1bdc4de34..4f60675eae5 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl index a49902e93e3..4e63773d1b8 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl index 662cd4a48b1..f66a3dfdcd0 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl index 4b78fef3dd8..548b79a067e 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl index 89220899ef4..006e7ff5f23 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl index bb9fd244d7d..a8d3f23d202 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.fxc.hlsl index 69c166299ed..653dc736d32 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl index 38657bd5134..b300fae9d4c 100644 --- a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.fxc.hlsl index 459b385e009..8a5535bf565 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl index 5f30a5087a5..4c683ea2546 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl index 596121b1987..3b7b92ed8cd 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl index 165d7d70924..cb9def46e2f 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl index 894d6e6afa6..ee6a3af9923 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl index c17618f59b2..a1715787942 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl index 16b820d027d..5fab267759d 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl index 81ebb4c5c38..7441fa4de7c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.fxc.hlsl index 1f774d533b2..e4789bbdac2 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl index 57f4650c9a6..b6e814a8c2a 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl index 9f4180bbe1b..ac94d802197 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl index 35fded5f248..158a97c5d8c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl index 6b58ffd46db..5ce1897ca2c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl index dce5e6b2b0f..09d791042b7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl index a4936b16f1b..29ea3f35bf7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl index ca0d12eee44..981c26d22da 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl index 1b9160e206b..3e7f321c059 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl index 1d41f0e42f8..ce3bdd09a0f 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl index 6f834a91f6f..b441857ddc8 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl index fe3d0066949..f85ee4574e7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl index a42277662b3..f50e324b05e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl index 7358d27d86d..ab9f6a3ee1b 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/647034.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/647034.wgsl.expected.fxc.hlsl index 31cf270e85d..c531b82aef2 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/647034.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/647034.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl index 2158c43db9b..9f6fb4af238 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl index 1b41c3f3fc3..0b4dc8d8b1c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl index 4413ab85ae5..56f70210137 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl index 1f22b93e759..628a5e037e0 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl index 51d04c803b9..e459d4dd005 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl index 84e2ffecbf2..c590ed33114 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.fxc.hlsl index 4491bb30401..2c697f8d27a 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl index 8cb3dcdbf41..66b8f3c3860 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl index 63aecee3aad..006e6cafb30 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl index 837ce893f22..88173ef7970 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl index 752673459dc..956b0a53b3b 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl index 17afe334af6..be14518b884 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl index d3f7fa82c55..20800cfcd8e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl index 7ed07cf6aa8..f75816c4747 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl index c59c3f6c01b..186c75352fd 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl index ce9dcbe937d..43a93bd27f6 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl index 78d76a02356..9f91ab1bff3 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl index 85e366aa41a..60b9af3ad9c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl index c577e20f678..45061d7d0bf 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl index d7914319e4e..debca6028ac 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl index 6c0d14ba690..5fd82ef7c7d 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl index a80ee72212a..451f8dfbdb0 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl index 6888ae0a5cb..0b16c0ed240 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl index 9bafd4d0b17..e33cda19ab7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl index 8ba1dd956bf..7ebe292693e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl index 8ed6d65df9e..270deb750f0 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl index 098a2ff1f0e..b491a33c6da 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl index c3bd8623ff7..9899fced8e4 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl index b3194da6690..81381d18a57 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl index e607f60c87e..15b7b407cdb 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl index 40c2e2941fe..0e52f97acc7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl index c9c811d92aa..fb7b8569986 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl index e398efcf6c6..c92d9ec32e9 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl index 8fe6974825b..07758968663 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl index a6e7c53aad4..073f414b0eb 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl index e5d2a0a7d44..0c299276c5b 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl index ff360912996..c467d02a08a 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl index 0396d98c7fa..f2b9bb13929 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl index ffcbe969c25..c7fac2c2faa 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl index a336c92b41c..a4ccbbaaa53 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl index 724e9520e6d..25a869376ed 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl index ee48c727c94..3600c045ce7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl index 6bdb23ca763..548dd9cb0fd 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl index 79af4b420a2..b93bbfffdc5 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl index ff2fedf7232..5d70152318c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl index 7c2759a6d6b..8680b1d93e2 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl index b4fddb33ef6..7e6452861a5 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl index 1bc24031d1f..a674b27a08a 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl index 80a8f9ec707..cb74503760a 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl index 408f0247165..fd6f445c720 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl index 81b457bf7e0..f1ef0b22e8d 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl index c7fadce6f77..8d0242ef2c3 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl index 7dce4a441f1..77a2e63570d 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl index 91def5e9923..08119bd2daf 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl index 8e82b66e06a..3b6b207c229 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl index 77415646457..4aefd8066e4 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl index 52d8816b6fc..1599a59e221 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl index 64c54a9147a..ef500b2b0e0 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl index 97eb5363fab..239147a243e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl index 186827d326a..d183a17259f 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl index 0f5e8ca6a30..b7e78326cc3 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl index 136f350d821..457042b76ed 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl index 4f70e408a94..ca633a32d38 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl index 7990b593ed4..dc82921e5eb 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl index 35e3a709274..726ba43df5c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl index a9adeeaa33a..2e5e0b38a7b 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl index 88d865f4f87..61f35ad8b1f 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl index 0f6ea3d1f35..2ef6f99d3db 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl index 7dc412658bb..d57a9f05708 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl index 93626aeea81..ddfa3036688 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl index bb90acee111..80c8b1b371d 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl index 35b9004e08e..aa892562e19 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl index 0af41a689da..80a9267303e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl index 626a0f02b37..c10e95db1f3 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl index c8a4326ee57..a708c0eace2 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl index 7eb61f6ae72..bee813ec737 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl index 2d7e66c2846..f4669e8445e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl index 6f1e92e0763..a50e66aeb85 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl index 9338e4fa449..1b34acd6472 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl index e42ecc43d13..75caa711858 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl index 8dc104129ef..a99490fa37b 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl index c42798af81e..85898b52ac7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl index 8239f8e5999..84ceeca6a01 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl index 5ec7cfbaffd..9aaddef4980 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl index 0aaf11d1786..37c10524487 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl index 84b01e246e9..442012d9498 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl index 0f4db2088ac..899bea399d4 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl index d16f4c56fd3..a535ec6140b 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl index 7a4324b8912..60b8cc8a983 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl index acea8fa29b7..70d4849eec5 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl index 2ac918419cf..4f3b5a602cb 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl index 95c84201fe0..4ee144d74ea 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl index 2e547265bf4..1817dbfc108 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl index 97650e0145d..20f014dabe8 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl index 65bd0689ed2..f6ba2688834 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl index 79979e41bd0..401c6067640 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl index 80245fc6c39..0332fe74946 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl index daaf4543b6d..31a4f4dd648 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl index f5bc9363a97..18498ac877b 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl index 41118f509a5..ba2cd9f21d7 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl index a4631a4e79a..a1d151477d1 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl index 8036f12318f..f65b71775f6 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl index 00eb613e80d..c94c2e3c7a8 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl index 63f1e6807fa..dd87a9adb21 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl index d308c2cd859..0b65f4624c9 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl index ba4c52db796..4301000796e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl index 4e34cd4d5ee..0e3ef5e42da 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl index 4e2ed778d9d..86dd00e9fbb 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl index 8b52e4e8727..eb94f365eb3 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl index 26be8e0400d..f101c14a606 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl index 464ef8ef7fd..09aafb1191e 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl index d1c3fa1c5ea..27f8b617584 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl index eb3804f35d2..3efdca07e62 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl index 85f33772d56..97f875a68cd 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl index 48c37f95012..71a7d85ad25 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl index 5ba2f588d38..389caf33ed4 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl index 5f6d7c13229..6a3934768cb 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl index 4fd5c701887..57c2ce11090 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl index 60d49c012c6..a27ac4202f9 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl index 091561da1f9..17ef6975a4c 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl index abcd9f2690e..b3cc13c8454 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl index 74a9851fc9c..175c11bc333 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl index 796151a6244..285a2e4d656 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl index d729c497f16..5fdeaaab680 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl index eaa23826543..f4cfa05a33d 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl index 83afdaa35d1..b2765e079d4 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl index 822c400fbbe..ab80a2fe4dd 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl index f3f4336d34d..c09690d19be 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl index 877a96d8959..5eeef7f99ab 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl index 8bd8d6829ea..dc2b630e565 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl index 80b7489c465..d53187f6847 100644 --- a/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.fxc.hlsl index ec13e12ae85..88f18811892 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl index 4898cc3e98b..65b87c04161 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.fxc.hlsl index 6ad37ef05f5..75ab8005048 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl index 221e124b963..870c7fde054 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.fxc.hlsl index 72ee08643de..4d24cc10434 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl index 329e117b7ab..49bb209093a 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.fxc.hlsl index 6aeed1baefb..aedb447bd9a 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl index 2c3c469df2e..b01f759d7a0 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.fxc.hlsl index e503e7cd7a9..b920238bd6d 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl index 00896b3b005..094a5e50ad7 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl index 3395a270b27..63096b2e3e5 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl index 7172ff1d038..9d8e603d264 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl index 8d227be08f2..e95ebabb5a3 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl index 7362f50d934..1655d7b5d25 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl index 52de320b237..8cbb787160b 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl index 3c467449ebf..97e8f091f93 100644 --- a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tan/539e54.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tan/539e54.wgsl.expected.fxc.hlsl index 3943dcba723..df8f55e5722 100644 --- a/test/tint/builtins/gen/literal/tan/539e54.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tan/539e54.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tan/9f7c9c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tan/9f7c9c.wgsl.expected.fxc.hlsl index 83177bcd553..2ed5f08ea7f 100644 --- a/test/tint/builtins/gen/literal/tan/9f7c9c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tan/9f7c9c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.fxc.hlsl index 1bb270e3fe5..c30c59113c2 100644 --- a/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.ir.fxc.hlsl index ccf1fb9d5da..c15a7d5d61d 100644 --- a/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tan/d4d491.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/tan/db0456.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tan/db0456.wgsl.expected.fxc.hlsl index 8c54b9d3891..8bf1f31bb4a 100644 --- a/test/tint/builtins/gen/literal/tan/db0456.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tan/db0456.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tanh/06a4fe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tanh/06a4fe.wgsl.expected.fxc.hlsl index 81809b8d9c9..5415b3c1f4e 100644 --- a/test/tint/builtins/gen/literal/tanh/06a4fe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tanh/06a4fe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.fxc.hlsl index a070237a2ce..52192fa6022 100644 --- a/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.ir.fxc.hlsl index 1ce47b2e191..64f2d4100ae 100644 --- a/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tanh/5b19af.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/tanh/6d105a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tanh/6d105a.wgsl.expected.fxc.hlsl index 53c5df6802e..ce7b3d9c308 100644 --- a/test/tint/builtins/gen/literal/tanh/6d105a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tanh/6d105a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/tanh/e8efb3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/tanh/e8efb3.wgsl.expected.fxc.hlsl index f760f8fc420..81ba6bd5426 100644 --- a/test/tint/builtins/gen/literal/tanh/e8efb3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/tanh/e8efb3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/06794e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/06794e.wgsl.expected.fxc.hlsl index f71e67e5def..ae92a03e137 100644 --- a/test/tint/builtins/gen/literal/transpose/06794e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/06794e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/5edd96.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/5edd96.wgsl.expected.fxc.hlsl index 0bf504f7b87..b34a1fdd302 100644 --- a/test/tint/builtins/gen/literal/transpose/5edd96.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/5edd96.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/5f36bf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/5f36bf.wgsl.expected.fxc.hlsl index 909f8ea0307..b369d1594ff 100644 --- a/test/tint/builtins/gen/literal/transpose/5f36bf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/5f36bf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/7be8b2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/7be8b2.wgsl.expected.fxc.hlsl index eb84188bdb9..690965a93b6 100644 --- a/test/tint/builtins/gen/literal/transpose/7be8b2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/7be8b2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/844869.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/844869.wgsl.expected.fxc.hlsl index 28b9886a5f5..0aa0f10d383 100644 --- a/test/tint/builtins/gen/literal/transpose/844869.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/844869.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/8c06ce.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/8c06ce.wgsl.expected.fxc.hlsl index 2b5cdaabe42..1eac782dc5c 100644 --- a/test/tint/builtins/gen/literal/transpose/8c06ce.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/8c06ce.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/b9ad1f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/b9ad1f.wgsl.expected.fxc.hlsl index 71559e9b6b7..a5551850902 100644 --- a/test/tint/builtins/gen/literal/transpose/b9ad1f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/b9ad1f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/d6faec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/d6faec.wgsl.expected.fxc.hlsl index 61cc16e2ea5..dc0acccaeec 100644 --- a/test/tint/builtins/gen/literal/transpose/d6faec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/d6faec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/transpose/faeb05.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/transpose/faeb05.wgsl.expected.fxc.hlsl index 95e54da65c8..d1eca5bbed4 100644 --- a/test/tint/builtins/gen/literal/transpose/faeb05.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/transpose/faeb05.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/trunc/103ab8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/trunc/103ab8.wgsl.expected.fxc.hlsl index 9b01e41cace..26ff91e9ccf 100644 --- a/test/tint/builtins/gen/literal/trunc/103ab8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/trunc/103ab8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/trunc/a56109.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/trunc/a56109.wgsl.expected.fxc.hlsl index b319da4a584..7a9ba651949 100644 --- a/test/tint/builtins/gen/literal/trunc/a56109.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/trunc/a56109.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.fxc.hlsl index 5d35fcce9dd..1a1c5f6b645 100644 --- a/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl index 51aeeced309..c71453d0f75 100644 --- a/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/literal/trunc/ce7c17.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/trunc/ce7c17.wgsl.expected.fxc.hlsl index 7460b9feae9..2e1a0a59b95 100644 --- a/test/tint/builtins/gen/literal/trunc/ce7c17.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/trunc/ce7c17.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl index 00bb70b9e32..e62bc19d5d2 100644 --- a/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared float16_t arg_0; diff --git a/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl index 33bdee42a83..6282752866f 100644 --- a/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/literal/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct compute_main_inputs { uint tint_local_index : SV_GroupIndex; diff --git a/test/tint/builtins/gen/var/abs/421ca3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/abs/421ca3.wgsl.expected.fxc.hlsl index cf4b7324699..0464f6e7099 100644 --- a/test/tint/builtins/gen/var/abs/421ca3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/abs/421ca3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/abs/538d29.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/abs/538d29.wgsl.expected.fxc.hlsl index 2077d6e5396..9e0814838ac 100644 --- a/test/tint/builtins/gen/var/abs/538d29.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/abs/538d29.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/abs/5ae4fe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/abs/5ae4fe.wgsl.expected.fxc.hlsl index d1da6adb3e4..9b4c1dc482e 100644 --- a/test/tint/builtins/gen/var/abs/5ae4fe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/abs/5ae4fe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.fxc.hlsl index f1cbde4390c..dbe90b2f031 100644 --- a/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.ir.fxc.hlsl index daf6b46e678..cfd6a41b4f5 100644 --- a/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/abs/fd247f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/acos/004aff.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acos/004aff.wgsl.expected.fxc.hlsl index a9c4e52127c..a47392dd3ed 100644 --- a/test/tint/builtins/gen/var/acos/004aff.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acos/004aff.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/acos/203628.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acos/203628.wgsl.expected.fxc.hlsl index 74ad9fe5976..b5f0cb8952d 100644 --- a/test/tint/builtins/gen/var/acos/203628.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acos/203628.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.fxc.hlsl index f32a373d292..d801806d38d 100644 --- a/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.ir.fxc.hlsl index 06f38dbed9b..058e1049221 100644 --- a/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/acos/303e3d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/acos/f47057.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acos/f47057.wgsl.expected.fxc.hlsl index 43a05dea60b..e86c26e83cb 100644 --- a/test/tint/builtins/gen/var/acos/f47057.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acos/f47057.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/acosh/5f49d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acosh/5f49d8.wgsl.expected.fxc.hlsl index 432f85fb1ff..504e48dbc5b 100644 --- a/test/tint/builtins/gen/var/acosh/5f49d8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acosh/5f49d8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_acosh(vector x) { return log((x + sqrt(((x * x) - float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.fxc.hlsl index 1e04049b3b3..2f065a0c761 100644 --- a/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_acosh(float16_t x) { return log((x + sqrt(((x * x) - float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl index 85ffb1e8f4b..980958212a8 100644 --- a/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/acosh/a37dfe.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/acosh/de60d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acosh/de60d8.wgsl.expected.fxc.hlsl index 02425a04017..252f5f59984 100644 --- a/test/tint/builtins/gen/var/acosh/de60d8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acosh/de60d8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_acosh(vector x) { return log((x + sqrt(((x * x) - float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/acosh/f56574.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/acosh/f56574.wgsl.expected.fxc.hlsl index 68433f657eb..9d255bb9826 100644 --- a/test/tint/builtins/gen/var/acosh/f56574.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/acosh/f56574.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_acosh(vector x) { return log((x + sqrt(((x * x) - float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.fxc.hlsl index 3373e1861f9..eb7a5a5f267 100644 --- a/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.ir.fxc.hlsl index 908b48c8c01..ef7c70ed6e9 100644 --- a/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/asin/11dfda.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/asin/2d8e29.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asin/2d8e29.wgsl.expected.fxc.hlsl index 3a90b4b7bde..e75088d2cf9 100644 --- a/test/tint/builtins/gen/var/asin/2d8e29.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asin/2d8e29.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/asin/3cfbd4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asin/3cfbd4.wgsl.expected.fxc.hlsl index 2cfae68265e..2c6fa50702e 100644 --- a/test/tint/builtins/gen/var/asin/3cfbd4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asin/3cfbd4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/asin/b4aced.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asin/b4aced.wgsl.expected.fxc.hlsl index 0e6e9b57968..9408f254f40 100644 --- a/test/tint/builtins/gen/var/asin/b4aced.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asin/b4aced.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.fxc.hlsl index ae082ccb3aa..3a65d6d3ede 100644 --- a/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_sinh(float16_t x) { return log((x + sqrt(((x * x) + float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.ir.fxc.hlsl index 98723528ea5..1dc60821387 100644 --- a/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/asinh/468a48.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/asinh/95ab2b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asinh/95ab2b.wgsl.expected.fxc.hlsl index dd66aa2027b..9f1852614d9 100644 --- a/test/tint/builtins/gen/var/asinh/95ab2b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asinh/95ab2b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_sinh(vector x) { return log((x + sqrt(((x * x) + float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/asinh/ad8f8b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asinh/ad8f8b.wgsl.expected.fxc.hlsl index a393f01f822..17a4a757823 100644 --- a/test/tint/builtins/gen/var/asinh/ad8f8b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asinh/ad8f8b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_sinh(vector x) { return log((x + sqrt(((x * x) + float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/asinh/fb5e8c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/asinh/fb5e8c.wgsl.expected.fxc.hlsl index 0c6c3caceb2..e6f6e81d359 100644 --- a/test/tint/builtins/gen/var/asinh/fb5e8c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/asinh/fb5e8c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_sinh(vector x) { return log((x + sqrt(((x * x) + float16_t(1.0h))))); diff --git a/test/tint/builtins/gen/var/atan/19faea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan/19faea.wgsl.expected.fxc.hlsl index 84cb33dc2a7..9f2fda4e004 100644 --- a/test/tint/builtins/gen/var/atan/19faea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan/19faea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atan/1e1764.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan/1e1764.wgsl.expected.fxc.hlsl index 0bffdb9a0a3..b6c1cb59b1a 100644 --- a/test/tint/builtins/gen/var/atan/1e1764.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan/1e1764.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atan/a5f421.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan/a5f421.wgsl.expected.fxc.hlsl index 411feeb68b1..42c23783637 100644 --- a/test/tint/builtins/gen/var/atan/a5f421.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan/a5f421.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.fxc.hlsl index 14a6557c3e2..5602a665db5 100644 --- a/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.ir.fxc.hlsl index a6b9caff0bb..167b773d51a 100644 --- a/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan/a7ba61.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/atan2/21dfea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan2/21dfea.wgsl.expected.fxc.hlsl index 42adc1f3d0c..05c85bacdd7 100644 --- a/test/tint/builtins/gen/var/atan2/21dfea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan2/21dfea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atan2/93febc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan2/93febc.wgsl.expected.fxc.hlsl index 82432d3f2e1..cfbf9dbff20 100644 --- a/test/tint/builtins/gen/var/atan2/93febc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan2/93febc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.fxc.hlsl index 26021420df2..5dbf88d825c 100644 --- a/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.ir.fxc.hlsl index fff1a79a89d..8beccb2f210 100644 --- a/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan2/ca698e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/atan2/d983ab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atan2/d983ab.wgsl.expected.fxc.hlsl index 795650dc444..ab73a0ecb33 100644 --- a/test/tint/builtins/gen/var/atan2/d983ab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atan2/d983ab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/atanh/5bf88d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atanh/5bf88d.wgsl.expected.fxc.hlsl index 1a5f72fe0d6..2ad6b0deb6d 100644 --- a/test/tint/builtins/gen/var/atanh/5bf88d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atanh/5bf88d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_atanh(vector x) { return (log(((float16_t(1.0h) + x) / (float16_t(1.0h) - x))) * float16_t(0.5h)); diff --git a/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.fxc.hlsl index 99cdb30423e..79d3fd2eaf6 100644 --- a/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_atanh(float16_t x) { return (log(((float16_t(1.0h) + x) / (float16_t(1.0h) - x))) * float16_t(0.5h)); diff --git a/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl index c5b05c8f7a5..23b372c988a 100644 --- a/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/atanh/d2d8cd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/atanh/e3b450.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atanh/e3b450.wgsl.expected.fxc.hlsl index bc252368d84..42d8eee6c70 100644 --- a/test/tint/builtins/gen/var/atanh/e3b450.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atanh/e3b450.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_atanh(vector x) { return (log(((float16_t(1.0h) + x) / (float16_t(1.0h) - x))) * float16_t(0.5h)); diff --git a/test/tint/builtins/gen/var/atanh/ec4b06.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/atanh/ec4b06.wgsl.expected.fxc.hlsl index a3c77128384..1957996dca4 100644 --- a/test/tint/builtins/gen/var/atanh/ec4b06.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/atanh/ec4b06.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_atanh(vector x) { return (log(((float16_t(1.0h) + x) / (float16_t(1.0h) - x))) * float16_t(0.5h)); diff --git a/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.fxc.hlsl index a657d66afea..19d88390a3a 100644 --- a/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.ir.fxc.hlsl index 92f6d1885b0..cc0671c9f4c 100644 --- a/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/bitcast/436211.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/ceil/09bf52.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ceil/09bf52.wgsl.expected.fxc.hlsl index c23e1b303c1..5e42fcec037 100644 --- a/test/tint/builtins/gen/var/ceil/09bf52.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ceil/09bf52.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ceil/18c240.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ceil/18c240.wgsl.expected.fxc.hlsl index e552f160a17..0ce72ecc6b4 100644 --- a/test/tint/builtins/gen/var/ceil/18c240.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ceil/18c240.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ceil/4bca2a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ceil/4bca2a.wgsl.expected.fxc.hlsl index 6d6e3daf456..1809dbdff49 100644 --- a/test/tint/builtins/gen/var/ceil/4bca2a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ceil/4bca2a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.fxc.hlsl index 0479d2ff4ee..9b542ba53ae 100644 --- a/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.ir.fxc.hlsl index ace41d115db..03c370654e8 100644 --- a/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/ceil/f3f889.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/clamp/235b29.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/clamp/235b29.wgsl.expected.fxc.hlsl index c61988580b2..8c5496f08a5 100644 --- a/test/tint/builtins/gen/var/clamp/235b29.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/clamp/235b29.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/clamp/2c251b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/clamp/2c251b.wgsl.expected.fxc.hlsl index 92a455908ab..84833609c5f 100644 --- a/test/tint/builtins/gen/var/clamp/2c251b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/clamp/2c251b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.fxc.hlsl index 25dc5dfe0a4..08140061774 100644 --- a/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.ir.fxc.hlsl index 07c84c6c173..c716fd9a953 100644 --- a/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/clamp/553ffb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/clamp/b195eb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/clamp/b195eb.wgsl.expected.fxc.hlsl index c4931f2389e..3aad059308f 100644 --- a/test/tint/builtins/gen/var/clamp/b195eb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/clamp/b195eb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cos/0835a8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cos/0835a8.wgsl.expected.fxc.hlsl index ebecd1d3e79..6c7b2870b4d 100644 --- a/test/tint/builtins/gen/var/cos/0835a8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cos/0835a8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cos/0a89f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cos/0a89f7.wgsl.expected.fxc.hlsl index 7371fca73a8..9c63ccf4184 100644 --- a/test/tint/builtins/gen/var/cos/0a89f7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cos/0a89f7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cos/5bc2c6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cos/5bc2c6.wgsl.expected.fxc.hlsl index 6b79ec2ae9b..77c93fdf7d5 100644 --- a/test/tint/builtins/gen/var/cos/5bc2c6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cos/5bc2c6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.fxc.hlsl index 870d87007cc..7f6cc035e31 100644 --- a/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.ir.fxc.hlsl index 88347eecde5..b3374b093f2 100644 --- a/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/cos/fc047d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.fxc.hlsl index 6dfc1d4aab1..cf27ac8b030 100644 --- a/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.ir.fxc.hlsl index a2019a8795d..51e7d1af585 100644 --- a/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/cosh/2ed778.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/cosh/3b7bbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cosh/3b7bbf.wgsl.expected.fxc.hlsl index 6ee28290029..7558b6839a1 100644 --- a/test/tint/builtins/gen/var/cosh/3b7bbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cosh/3b7bbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cosh/43b672.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cosh/43b672.wgsl.expected.fxc.hlsl index a3100aefd67..cd3fc541da7 100644 --- a/test/tint/builtins/gen/var/cosh/43b672.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cosh/43b672.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cosh/b1b8a0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cosh/b1b8a0.wgsl.expected.fxc.hlsl index 3190b3bd88e..717b61c3c50 100644 --- a/test/tint/builtins/gen/var/cosh/b1b8a0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cosh/b1b8a0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/cross/9857cb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/cross/9857cb.wgsl.expected.fxc.hlsl index b6d9a083441..8d3abd75dc4 100644 --- a/test/tint/builtins/gen/var/cross/9857cb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/cross/9857cb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/degrees/3055d3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/degrees/3055d3.wgsl.expected.fxc.hlsl index 1115ac303ab..3b0f8791f54 100644 --- a/test/tint/builtins/gen/var/degrees/3055d3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/degrees/3055d3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_degrees(vector param_0) { return param_0 * 57.29577951308232286465; diff --git a/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.fxc.hlsl index 452053502ed..c34e5c60180 100644 --- a/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_degrees(float16_t param_0) { return param_0 * 57.29577951308232286465; diff --git a/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.ir.fxc.hlsl index 075f8a6ebba..6d60ef90420 100644 --- a/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/degrees/5e9805.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/degrees/dfe8f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/degrees/dfe8f4.wgsl.expected.fxc.hlsl index 20b4c496ac0..235120a3241 100644 --- a/test/tint/builtins/gen/var/degrees/dfe8f4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/degrees/dfe8f4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_degrees(vector param_0) { return param_0 * 57.29577951308232286465; diff --git a/test/tint/builtins/gen/var/degrees/f59715.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/degrees/f59715.wgsl.expected.fxc.hlsl index d160f13e6f0..90645555b7a 100644 --- a/test/tint/builtins/gen/var/degrees/f59715.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/degrees/f59715.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_degrees(vector param_0) { return param_0 * 57.29577951308232286465; diff --git a/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.fxc.hlsl index 90f4d675d28..24034831582 100644 --- a/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.ir.fxc.hlsl index 1cfa7a37ae6..bc714294c3b 100644 --- a/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/determinant/32bfde.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.fxc.hlsl index 4b1a5584702..b2c587ae25b 100644 --- a/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl index cb04638d671..5041c709ba0 100644 --- a/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/determinant/d7c86f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.fxc.hlsl index e00885cd8f9..1c583bc8b0d 100644 --- a/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl index 9bc7b917667..3422069b3d0 100644 --- a/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/determinant/fc12a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.fxc.hlsl index cac205c42c8..48d6c73a283 100644 --- a/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.ir.fxc.hlsl index a81f12dc259..29376c4b48f 100644 --- a/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/7272f3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.fxc.hlsl index dec3b72ae39..8e9d2609917 100644 --- a/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.ir.fxc.hlsl index 3e14848ea27..715a3ed5619 100644 --- a/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/7d201f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.fxc.hlsl index 37abd41e7c1..d3705499a5e 100644 --- a/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.ir.fxc.hlsl index 02432bb3464..d9d95f8c1d1 100644 --- a/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/892a5d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.fxc.hlsl index 61c839d67b4..8c65196185d 100644 --- a/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.ir.fxc.hlsl index 4509494ad7d..98349689fd1 100644 --- a/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/distance/928fa0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.fxc.hlsl index 0ea7ccd3320..0139a50ee7c 100644 --- a/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.ir.fxc.hlsl index 92865775890..9b1330bdf1b 100644 --- a/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/dot/8e40f1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.fxc.hlsl index c7bc5f798df..ad146132990 100644 --- a/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.ir.fxc.hlsl index 071507beda4..dad7931c29f 100644 --- a/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/dot/cd5a04.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.fxc.hlsl index 3625f5d936a..814edc9c012 100644 --- a/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.ir.fxc.hlsl index 6907fa41cdf..fb5a1d46575 100644 --- a/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/dot/d0d179.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/exp/13806d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp/13806d.wgsl.expected.fxc.hlsl index 0e32e1bdd5c..fd4182b838b 100644 --- a/test/tint/builtins/gen/var/exp/13806d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp/13806d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/exp/2e08e2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp/2e08e2.wgsl.expected.fxc.hlsl index f20905afc52..972d510e1fb 100644 --- a/test/tint/builtins/gen/var/exp/2e08e2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp/2e08e2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/exp/611a87.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp/611a87.wgsl.expected.fxc.hlsl index 6c9c9c41146..a9425c3cc8c 100644 --- a/test/tint/builtins/gen/var/exp/611a87.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp/611a87.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.fxc.hlsl index c369f887461..a303ec11395 100644 --- a/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.ir.fxc.hlsl index 5c619792477..3704db205f8 100644 --- a/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp/c18fe9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/exp2/151a4c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp2/151a4c.wgsl.expected.fxc.hlsl index 40192bb5825..0e769d1a45d 100644 --- a/test/tint/builtins/gen/var/exp2/151a4c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp2/151a4c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/exp2/751377.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp2/751377.wgsl.expected.fxc.hlsl index 10bcb85c2e2..eebf20c8bd8 100644 --- a/test/tint/builtins/gen/var/exp2/751377.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp2/751377.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.fxc.hlsl index 01fa0ceb5bf..fb01b994971 100644 --- a/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.ir.fxc.hlsl index 1f0381e2388..7c0b221d256 100644 --- a/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp2/b408e4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/exp2/ffa827.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/exp2/ffa827.wgsl.expected.fxc.hlsl index 74ffb96215a..fb3216b43ce 100644 --- a/test/tint/builtins/gen/var/exp2/ffa827.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/exp2/ffa827.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/faceForward/524986.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/faceForward/524986.wgsl.expected.fxc.hlsl index bfb07065ea8..1b071fd0f9e 100644 --- a/test/tint/builtins/gen/var/faceForward/524986.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/faceForward/524986.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/faceForward/cc63dc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/faceForward/cc63dc.wgsl.expected.fxc.hlsl index dc58d19dba7..931d65c1e3a 100644 --- a/test/tint/builtins/gen/var/faceForward/cc63dc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/faceForward/cc63dc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/faceForward/fb0f2e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/faceForward/fb0f2e.wgsl.expected.fxc.hlsl index a1977a4e0e1..b31894fa539 100644 --- a/test/tint/builtins/gen/var/faceForward/fb0f2e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/faceForward/fb0f2e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/floor/3802c0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/floor/3802c0.wgsl.expected.fxc.hlsl index d84f935116a..9903dee3291 100644 --- a/test/tint/builtins/gen/var/floor/3802c0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/floor/3802c0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/floor/84658c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/floor/84658c.wgsl.expected.fxc.hlsl index 933a620cba6..0ecdbdf9566 100644 --- a/test/tint/builtins/gen/var/floor/84658c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/floor/84658c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/floor/a2d31b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/floor/a2d31b.wgsl.expected.fxc.hlsl index 4dbd651b3be..52d24021292 100644 --- a/test/tint/builtins/gen/var/floor/a2d31b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/floor/a2d31b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.fxc.hlsl index 33f29382419..5a3a2647a12 100644 --- a/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.ir.fxc.hlsl index 8dc56e73fd0..184df26df95 100644 --- a/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/floor/b6e09c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/fma/ab7818.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fma/ab7818.wgsl.expected.fxc.hlsl index 0607b3f2f25..27f8f23b4be 100644 --- a/test/tint/builtins/gen/var/fma/ab7818.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fma/ab7818.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fma/bf21b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fma/bf21b6.wgsl.expected.fxc.hlsl index 6f7b3ce0740..8cc4b2755ac 100644 --- a/test/tint/builtins/gen/var/fma/bf21b6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fma/bf21b6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.fxc.hlsl index 3b9749b5da0..a5b65c0bd2f 100644 --- a/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.ir.fxc.hlsl index 7f5cff44837..9f5a23fd29f 100644 --- a/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/fma/c8abb3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/fma/e7abdc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fma/e7abdc.wgsl.expected.fxc.hlsl index ad89bc7dd8e..167a47ea788 100644 --- a/test/tint/builtins/gen/var/fma/e7abdc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fma/e7abdc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fract/181aa9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fract/181aa9.wgsl.expected.fxc.hlsl index 808714a7119..75afeb42ef3 100644 --- a/test/tint/builtins/gen/var/fract/181aa9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fract/181aa9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fract/498c77.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fract/498c77.wgsl.expected.fxc.hlsl index 20981745040..983d7afc1ed 100644 --- a/test/tint/builtins/gen/var/fract/498c77.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fract/498c77.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fract/958a1d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fract/958a1d.wgsl.expected.fxc.hlsl index 58646447f5e..8fb8eaddb3d 100644 --- a/test/tint/builtins/gen/var/fract/958a1d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fract/958a1d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.fxc.hlsl index d4b453fbe84..bd631a00f75 100644 --- a/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.ir.fxc.hlsl index ebf5fa184ca..6a5905ad71a 100644 --- a/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/fract/eb38ce.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/frexp/3dd21e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/frexp/3dd21e.wgsl.expected.fxc.hlsl index 445acee7fab..0072d512c37 100644 --- a/test/tint/builtins/gen/var/frexp/3dd21e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/frexp/3dd21e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_vec4_f16 { vector fract; diff --git a/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.fxc.hlsl index 99d0be1286b..df74cbd9cd2 100644 --- a/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.ir.fxc.hlsl index febc0d7fd93..2d8df5f7f2c 100644 --- a/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/frexp/5257dd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/var/frexp/5f47bf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/frexp/5f47bf.wgsl.expected.fxc.hlsl index c1f2af52b88..6681ca1a5c8 100644 --- a/test/tint/builtins/gen/var/frexp/5f47bf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/frexp/5f47bf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_vec2_f16 { vector fract; diff --git a/test/tint/builtins/gen/var/frexp/ae4a66.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/frexp/ae4a66.wgsl.expected.fxc.hlsl index e61827320f7..fe7f6576e5d 100644 --- a/test/tint/builtins/gen/var/frexp/ae4a66.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/frexp/ae4a66.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct frexp_result_vec3_f16 { vector fract; diff --git a/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.fxc.hlsl index 6e017653ace..c2f73d63091 100644 --- a/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl index c5d9afc2872..d8aa8eafe44 100644 --- a/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/inverseSqrt/440300.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl index 1177135bb3e..0e72477a9f7 100644 --- a/test/tint/builtins/gen/var/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/inverseSqrt/5f51f8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl index a3d08b99bfa..12d449f794e 100644 --- a/test/tint/builtins/gen/var/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/inverseSqrt/b85ebd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl index e927bf05ec7..874e9bd486c 100644 --- a/test/tint/builtins/gen/var/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/inverseSqrt/cbdc70.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.fxc.hlsl index 3a2efeff010..48fc3ec0a5d 100644 --- a/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl index 511675d771f..12d6b4efa78 100644 --- a/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/082c1f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/ldexp/217a31.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/217a31.wgsl.expected.fxc.hlsl index 8d07b295bd4..c3c20ccfe64 100644 --- a/test/tint/builtins/gen/var/ldexp/217a31.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/217a31.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/3d90b4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/3d90b4.wgsl.expected.fxc.hlsl index 259f89c61a9..9e22562d8a9 100644 --- a/test/tint/builtins/gen/var/ldexp/3d90b4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/3d90b4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.fxc.hlsl index da577b97e74..80b7ddfed82 100644 --- a/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl index fe7a7ac8066..11173fd34f1 100644 --- a/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/624e0c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/ldexp/7485ce.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/7485ce.wgsl.expected.fxc.hlsl index df3d9344362..6f255826d4a 100644 --- a/test/tint/builtins/gen/var/ldexp/7485ce.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/7485ce.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/7fa13c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/7fa13c.wgsl.expected.fxc.hlsl index 9c824aa2a00..6e66a419113 100644 --- a/test/tint/builtins/gen/var/ldexp/7fa13c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/7fa13c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/8a0c2f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/8a0c2f.wgsl.expected.fxc.hlsl index 40e02b94bd8..2053486b2b8 100644 --- a/test/tint/builtins/gen/var/ldexp/8a0c2f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/8a0c2f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/ldexp/8e43e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/ldexp/8e43e9.wgsl.expected.fxc.hlsl index 81be82cf460..dd877df55b3 100644 --- a/test/tint/builtins/gen/var/ldexp/8e43e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/ldexp/8e43e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.fxc.hlsl index 9a96c77adb1..083eee3f04b 100644 --- a/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.ir.fxc.hlsl index d2a269770bd..182d32b93e3 100644 --- a/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/3f0e13.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.fxc.hlsl index be5dac20550..e73fab77e03 100644 --- a/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.ir.fxc.hlsl index 14ee0804656..af7d25274d6 100644 --- a/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/5b1a9b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.fxc.hlsl index 5daa75e2c81..a62d1332cdd 100644 --- a/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.ir.fxc.hlsl index 513dc1a6e2a..b78a1e4b1ad 100644 --- a/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/ba16d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/length/c158da.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/length/c158da.wgsl.expected.fxc.hlsl index d42985e13e2..905ddd3cd02 100644 --- a/test/tint/builtins/gen/var/length/c158da.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/c158da.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/length/c158da.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/length/c158da.wgsl.expected.ir.fxc.hlsl index 615a2064729..cdba9afcd79 100644 --- a/test/tint/builtins/gen/var/length/c158da.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/length/c158da.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/log/6ff86f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log/6ff86f.wgsl.expected.fxc.hlsl index 71732f15031..8d3a40378de 100644 --- a/test/tint/builtins/gen/var/log/6ff86f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log/6ff86f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/log/8f0e32.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log/8f0e32.wgsl.expected.fxc.hlsl index 8687487703d..45a8ba677d5 100644 --- a/test/tint/builtins/gen/var/log/8f0e32.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log/8f0e32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.fxc.hlsl index 0cb9ccea42d..c81deb06635 100644 --- a/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.ir.fxc.hlsl index fa1e3abbf5e..6e1d5b45e83 100644 --- a/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/log/c9f489.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/log/cdbdc1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log/cdbdc1.wgsl.expected.fxc.hlsl index 813b418acf6..ddfa17db2f2 100644 --- a/test/tint/builtins/gen/var/log/cdbdc1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log/cdbdc1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/log2/38b478.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log2/38b478.wgsl.expected.fxc.hlsl index dc8d7af0984..3f2953a02fb 100644 --- a/test/tint/builtins/gen/var/log2/38b478.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log2/38b478.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/log2/776088.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log2/776088.wgsl.expected.fxc.hlsl index 3acccc0bfa0..26223386ef2 100644 --- a/test/tint/builtins/gen/var/log2/776088.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log2/776088.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.fxc.hlsl index faaffc54d15..51038ddea4f 100644 --- a/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.ir.fxc.hlsl index 71c3edefc39..88f661227d8 100644 --- a/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/log2/8c10b3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/log2/fb9f0b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/log2/fb9f0b.wgsl.expected.fxc.hlsl index 5349fdc7d70..5b4a327941e 100644 --- a/test/tint/builtins/gen/var/log2/fb9f0b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/log2/fb9f0b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.fxc.hlsl index 9b3d303cc4f..b16a7aad0fd 100644 --- a/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.ir.fxc.hlsl index 2ca823ed33b..653506616d1 100644 --- a/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/max/111ac0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/max/34956e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/max/34956e.wgsl.expected.fxc.hlsl index 888c743679b..9737182e4a1 100644 --- a/test/tint/builtins/gen/var/max/34956e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/max/34956e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/max/445169.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/max/445169.wgsl.expected.fxc.hlsl index 83077bf5fd6..a0e1c2a89d3 100644 --- a/test/tint/builtins/gen/var/max/445169.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/max/445169.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/max/e14f2b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/max/e14f2b.wgsl.expected.fxc.hlsl index 0db4267137a..becfdaba275 100644 --- a/test/tint/builtins/gen/var/max/e14f2b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/max/e14f2b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.fxc.hlsl index 7ef28246e87..9dda173e6cf 100644 --- a/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.fxc.hlsl index c7553844be4..7ea4f70517f 100644 --- a/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.fxc.hlsl index 888e763271a..e06a03c992e 100644 --- a/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.ir.fxc.hlsl index 28eed300e0f..e72d20b5c60 100644 --- a/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.fxc.hlsl index 9e3cef6fa77..b766cecc6f4 100644 --- a/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.fxc.hlsl index 5718f901f09..e9072123ecf 100644 --- a/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.ir.fxc.hlsl index 6ce890a903c..cfdcbdcf2b0 100644 --- a/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/38cbbb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/mix/63f2fd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/mix/63f2fd.wgsl.expected.fxc.hlsl index d9cc8a90b57..25dde56bc9a 100644 --- a/test/tint/builtins/gen/var/mix/63f2fd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/63f2fd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/mix/98ee3e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/mix/98ee3e.wgsl.expected.fxc.hlsl index 55fc7a3f618..b414ab447ee 100644 --- a/test/tint/builtins/gen/var/mix/98ee3e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/98ee3e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/mix/c1aec6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/mix/c1aec6.wgsl.expected.fxc.hlsl index 1f40225a31c..b7d5018868a 100644 --- a/test/tint/builtins/gen/var/mix/c1aec6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/c1aec6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/mix/e46a83.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/mix/e46a83.wgsl.expected.fxc.hlsl index 3232c2f4827..f5ac0c6251d 100644 --- a/test/tint/builtins/gen/var/mix/e46a83.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/e46a83.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/mix/ee2468.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/mix/ee2468.wgsl.expected.fxc.hlsl index 297ed7ddfbe..0bf9e3e06ea 100644 --- a/test/tint/builtins/gen/var/mix/ee2468.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/ee2468.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/mix/f1a543.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/mix/f1a543.wgsl.expected.fxc.hlsl index 4f38a1f3a30..6c9c57cbbb6 100644 --- a/test/tint/builtins/gen/var/mix/f1a543.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/mix/f1a543.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/modf/45005f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/modf/45005f.wgsl.expected.fxc.hlsl index 769c4f94586..730600238ee 100644 --- a/test/tint/builtins/gen/var/modf/45005f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/modf/45005f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_vec3_f16 { vector fract; diff --git a/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.fxc.hlsl index 6f43da3e5ad..f533493fcc7 100644 --- a/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl index 6027fb29c2e..a6a2ac963f5 100644 --- a/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/modf/8dbbbf.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_f16 { float16_t fract; diff --git a/test/tint/builtins/gen/var/modf/995934.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/modf/995934.wgsl.expected.fxc.hlsl index 1c297e79b43..d35f117405d 100644 --- a/test/tint/builtins/gen/var/modf/995934.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/modf/995934.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_vec4_f16 { vector fract; diff --git a/test/tint/builtins/gen/var/modf/a545b9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/modf/a545b9.wgsl.expected.fxc.hlsl index 786ab40cf1e..873886884e0 100644 --- a/test/tint/builtins/gen/var/modf/a545b9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/modf/a545b9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct modf_result_vec2_f16 { vector fract; diff --git a/test/tint/builtins/gen/var/normalize/39d5ec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/normalize/39d5ec.wgsl.expected.fxc.hlsl index e8a164e2101..e33cf3e790b 100644 --- a/test/tint/builtins/gen/var/normalize/39d5ec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/normalize/39d5ec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/normalize/7990f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/normalize/7990f3.wgsl.expected.fxc.hlsl index b78ef2e7996..791e0809d46 100644 --- a/test/tint/builtins/gen/var/normalize/7990f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/normalize/7990f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/normalize/b8cb8d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/normalize/b8cb8d.wgsl.expected.fxc.hlsl index 07f5a49624b..9789a253598 100644 --- a/test/tint/builtins/gen/var/normalize/b8cb8d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/normalize/b8cb8d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/pow/4f33b2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/pow/4f33b2.wgsl.expected.fxc.hlsl index f22b5e535ab..d398f755cad 100644 --- a/test/tint/builtins/gen/var/pow/4f33b2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/pow/4f33b2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.fxc.hlsl index 8a92e98eecf..f2211801e2a 100644 --- a/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl index 4d96a62a2dc..ca5eaf06d84 100644 --- a/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/pow/ce9ef5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/pow/f37b25.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/pow/f37b25.wgsl.expected.fxc.hlsl index 3eb8bdbc0a0..a8b47c85585 100644 --- a/test/tint/builtins/gen/var/pow/f37b25.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/pow/f37b25.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/pow/fa5429.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/pow/fa5429.wgsl.expected.fxc.hlsl index 592c486c764..c1b54160de4 100644 --- a/test/tint/builtins/gen/var/pow/fa5429.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/pow/fa5429.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl index 54b0dae8e3c..6d88af2f0dd 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl index 7512679e837..d823bf3545a 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/0464d1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl index d55d378024e..5e1f17e11ec 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl index cfa51f3132b..07975ed29dd 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/3c3824.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl index 19d501e7331..30cb457905c 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl index 692f89e970b..c9cfb9d4b23 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/4d9898.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.fxc.hlsl index 0668af435d0..1dd2d8548e5 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl index a020bf868b3..4cc2ad1f95a 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/78129b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.fxc.hlsl index 77b91660c9a..60dffd8c3b7 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl index 08f79d3e5ec..896a6b7316a 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/796753.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl index 6ffd6301ba8..e89037465dc 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl index 2bb58e52d95..63f9858bfce 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/cebc6a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl index 28c24afff77..72470fe7a37 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl index 21af57b7ff3..8e09fb78472 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/e7c301.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl index 615effbcb64..b37d959bd3f 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl index 6574fdb2755..c172f32ccfc 100644 --- a/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadBroadcast/ef7d5d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl index a9d5cd419b7..1b29a93f64c 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl index 9f73f251ab1..ff84e198e48 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/15ac75.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl index 8693073cbd3..a0057348050 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl index 5fc2ab0582b..2b9a4450a92 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/2be5e7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl index f15951e84c9..e6b00f11f66 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl index 3a3240acd94..386df6e832b 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/af19a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl index 693f167a627..615026a2b68 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl index 2223a991528..c6f85a3ad4c 100644 --- a/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapDiagonal/e4bec8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.fxc.hlsl index 91300a62a5a..ca8959073ea 100644 --- a/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl index 19dbacc6e04..6490b338199 100644 --- a/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/02834c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.fxc.hlsl index 27370a20b4a..ca3eff2d3f5 100644 --- a/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl index fe3a72f89b1..4f90712b861 100644 --- a/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/a4e103.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.fxc.hlsl index c8a40170765..5766e33f85b 100644 --- a/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl index cb5961958a9..16c7bc07c30 100644 --- a/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/bc2013.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.fxc.hlsl index 5cc4de46c96..9b14eb80b9e 100644 --- a/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl index 85b6efbbc9e..e0eb7d6cd8b 100644 --- a/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapX/d60cec.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.fxc.hlsl index 3a3ff86a524..c38ffcbb095 100644 --- a/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl index 41c87111a4b..43a32fbf948 100644 --- a/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/264908.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl index c109bfae586..62c697a2fc9 100644 --- a/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl index dde866363c3..490a734994f 100644 --- a/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/5b2e67.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.fxc.hlsl index baa49ddc2a4..bd8f54f3e25 100644 --- a/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl index d3bebe629bd..b027b51e1b5 100644 --- a/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/9277e9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl index 9857a12c9dd..d20cd0e22c8 100644 --- a/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl index 46f1bcc7b16..fe87502b050 100644 --- a/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/quadSwapY/a50fcb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.fxc.hlsl index 2c3300f45dc..3e405574938 100644 --- a/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_radians(float16_t param_0) { return param_0 * 0.01745329251994329547; diff --git a/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.ir.fxc.hlsl index 7ea9aaa5a90..5fe0e3d29a4 100644 --- a/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/radians/208fd9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/radians/44f20b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/radians/44f20b.wgsl.expected.fxc.hlsl index a1298b648d0..3ebf1aea2f7 100644 --- a/test/tint/builtins/gen/var/radians/44f20b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/radians/44f20b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_radians(vector param_0) { return param_0 * 0.01745329251994329547; diff --git a/test/tint/builtins/gen/var/radians/7ea4c7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/radians/7ea4c7.wgsl.expected.fxc.hlsl index cc5d76a60c7..cc2cf4a112d 100644 --- a/test/tint/builtins/gen/var/radians/7ea4c7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/radians/7ea4c7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_radians(vector param_0) { return param_0 * 0.01745329251994329547; diff --git a/test/tint/builtins/gen/var/radians/fbacf0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/radians/fbacf0.wgsl.expected.fxc.hlsl index 1f700231db8..4c13d37bf01 100644 --- a/test/tint/builtins/gen/var/radians/fbacf0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/radians/fbacf0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_radians(vector param_0) { return param_0 * 0.01745329251994329547; diff --git a/test/tint/builtins/gen/var/reflect/310de5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/reflect/310de5.wgsl.expected.fxc.hlsl index ec2d44f5f6e..2dde299c3e5 100644 --- a/test/tint/builtins/gen/var/reflect/310de5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/reflect/310de5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/reflect/61ca21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/reflect/61ca21.wgsl.expected.fxc.hlsl index d8b64d593a3..6271d23f6b7 100644 --- a/test/tint/builtins/gen/var/reflect/61ca21.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/reflect/61ca21.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/reflect/bb15ac.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/reflect/bb15ac.wgsl.expected.fxc.hlsl index 58eb41d14cc..b0c14c3ae5d 100644 --- a/test/tint/builtins/gen/var/reflect/bb15ac.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/reflect/bb15ac.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/refract/0594ba.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/refract/0594ba.wgsl.expected.fxc.hlsl index e953c00eab8..74c362313a3 100644 --- a/test/tint/builtins/gen/var/refract/0594ba.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/refract/0594ba.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/refract/570cb3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/refract/570cb3.wgsl.expected.fxc.hlsl index b4d924a3990..a7e9045afd2 100644 --- a/test/tint/builtins/gen/var/refract/570cb3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/refract/570cb3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/refract/8984af.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/refract/8984af.wgsl.expected.fxc.hlsl index 0c6d0b056a9..611c8eb9b3a 100644 --- a/test/tint/builtins/gen/var/refract/8984af.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/refract/8984af.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.fxc.hlsl index 6c2ae7df761..f82114f66da 100644 --- a/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.ir.fxc.hlsl index 1ceff3e3d9b..1d3ac2a83e5 100644 --- a/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/round/9078ef.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/round/d87e84.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/round/d87e84.wgsl.expected.fxc.hlsl index e82d3411f9c..1ba988765bf 100644 --- a/test/tint/builtins/gen/var/round/d87e84.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/round/d87e84.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/round/e1bba2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/round/e1bba2.wgsl.expected.fxc.hlsl index 4009ae808b7..8fee229821b 100644 --- a/test/tint/builtins/gen/var/round/e1bba2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/round/e1bba2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/round/f665b5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/round/f665b5.wgsl.expected.fxc.hlsl index 0263fcb575f..82b57dfcff0 100644 --- a/test/tint/builtins/gen/var/round/f665b5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/round/f665b5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/saturate/462535.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/saturate/462535.wgsl.expected.fxc.hlsl index 4658d0e50e7..3dc66f5ffe4 100644 --- a/test/tint/builtins/gen/var/saturate/462535.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/saturate/462535.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/saturate/cd2028.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/saturate/cd2028.wgsl.expected.fxc.hlsl index b8afc4d04bb..dec6df16fa3 100644 --- a/test/tint/builtins/gen/var/saturate/cd2028.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/saturate/cd2028.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/saturate/dcde71.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/saturate/dcde71.wgsl.expected.fxc.hlsl index f5f0d9aa2cf..3b2a92e0646 100644 --- a/test/tint/builtins/gen/var/saturate/dcde71.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/saturate/dcde71.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.fxc.hlsl index 8313f8847f5..c5c31df08b8 100644 --- a/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.ir.fxc.hlsl index e1fa3a81399..1fa60e9a418 100644 --- a/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/saturate/e8df56.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.fxc.hlsl index e24ce37c5a4..ecefb37486f 100644 --- a/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.ir.fxc.hlsl index 0e018dc8f1d..773c516dfcc 100644 --- a/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/10e73b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/select/1ada2a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/select/1ada2a.wgsl.expected.fxc.hlsl index 0384e626595..6006720a3ac 100644 --- a/test/tint/builtins/gen/var/select/1ada2a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/1ada2a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/select/53d518.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/select/53d518.wgsl.expected.fxc.hlsl index a253effa66f..a028534b8dc 100644 --- a/test/tint/builtins/gen/var/select/53d518.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/53d518.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/select/830dd9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/select/830dd9.wgsl.expected.fxc.hlsl index 6173e61ecf6..bda51f77ffe 100644 --- a/test/tint/builtins/gen/var/select/830dd9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/830dd9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/select/86f9bd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/select/86f9bd.wgsl.expected.fxc.hlsl index 50dc007f98b..e09dc1c17ef 100644 --- a/test/tint/builtins/gen/var/select/86f9bd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/86f9bd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/select/a081f1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/select/a081f1.wgsl.expected.fxc.hlsl index 2ef147a9a58..96d660c9308 100644 --- a/test/tint/builtins/gen/var/select/a081f1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/a081f1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/select/ed7c13.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/select/ed7c13.wgsl.expected.fxc.hlsl index 4143a283088..64f18e88c77 100644 --- a/test/tint/builtins/gen/var/select/ed7c13.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/select/ed7c13.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sign/160933.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sign/160933.wgsl.expected.fxc.hlsl index 6e4770565e7..ae611f82d6a 100644 --- a/test/tint/builtins/gen/var/sign/160933.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sign/160933.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sign/5d283a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sign/5d283a.wgsl.expected.fxc.hlsl index 99f50329034..eff8aa350c8 100644 --- a/test/tint/builtins/gen/var/sign/5d283a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sign/5d283a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.fxc.hlsl index 67ea3249836..3acdb6bd670 100644 --- a/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.ir.fxc.hlsl index 8c42a6fb5e5..baf4d450720 100644 --- a/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/sign/7c85ea.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/sign/ccdb3c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sign/ccdb3c.wgsl.expected.fxc.hlsl index ed0492c00bc..da3d4867e36 100644 --- a/test/tint/builtins/gen/var/sign/ccdb3c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sign/ccdb3c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sin/2c903b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sin/2c903b.wgsl.expected.fxc.hlsl index fed93308af2..9b34d7630e1 100644 --- a/test/tint/builtins/gen/var/sin/2c903b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sin/2c903b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sin/3cca11.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sin/3cca11.wgsl.expected.fxc.hlsl index 5d9e9f156f6..8ea2147d9f3 100644 --- a/test/tint/builtins/gen/var/sin/3cca11.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sin/3cca11.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sin/5c0712.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sin/5c0712.wgsl.expected.fxc.hlsl index be8411018bd..67b5576ce98 100644 --- a/test/tint/builtins/gen/var/sin/5c0712.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sin/5c0712.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.fxc.hlsl index 2f0d13b5ad0..77ee7eddba9 100644 --- a/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.ir.fxc.hlsl index e4dd8412020..d9ce5650bfc 100644 --- a/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/sin/66a59f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/sinh/0908c1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sinh/0908c1.wgsl.expected.fxc.hlsl index 54d3b97a3e2..7e272c501c8 100644 --- a/test/tint/builtins/gen/var/sinh/0908c1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sinh/0908c1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.fxc.hlsl index 9f89d2a1b94..acfda880939 100644 --- a/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.ir.fxc.hlsl index 864ebbc3a62..1640c72d07e 100644 --- a/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/sinh/69cce2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/sinh/924f19.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sinh/924f19.wgsl.expected.fxc.hlsl index 7bfcad8af77..de06f6071f9 100644 --- a/test/tint/builtins/gen/var/sinh/924f19.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sinh/924f19.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sinh/ba7e25.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sinh/ba7e25.wgsl.expected.fxc.hlsl index cb3bcbf298d..abfc24f56cd 100644 --- a/test/tint/builtins/gen/var/sinh/ba7e25.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sinh/ba7e25.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/smoothstep/12c031.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/smoothstep/12c031.wgsl.expected.fxc.hlsl index 9976bc8fb18..fe64b150946 100644 --- a/test/tint/builtins/gen/var/smoothstep/12c031.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/smoothstep/12c031.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.fxc.hlsl index d2ae6262b87..a44162c34e1 100644 --- a/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl index 773ee15b4c3..149815d48a2 100644 --- a/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/smoothstep/586e12.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/smoothstep/6e7a74.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/smoothstep/6e7a74.wgsl.expected.fxc.hlsl index fcebffd371e..e9016e3bd49 100644 --- a/test/tint/builtins/gen/var/smoothstep/6e7a74.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/smoothstep/6e7a74.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/smoothstep/c43ebd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/smoothstep/c43ebd.wgsl.expected.fxc.hlsl index 08ee88f4097..ad8236cc11e 100644 --- a/test/tint/builtins/gen/var/smoothstep/c43ebd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/smoothstep/c43ebd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sqrt/803d1c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sqrt/803d1c.wgsl.expected.fxc.hlsl index 06f1794b08a..fd356e82d93 100644 --- a/test/tint/builtins/gen/var/sqrt/803d1c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sqrt/803d1c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sqrt/895a0c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sqrt/895a0c.wgsl.expected.fxc.hlsl index 2884fe87690..2d2326a30c2 100644 --- a/test/tint/builtins/gen/var/sqrt/895a0c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sqrt/895a0c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sqrt/d9ab4d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sqrt/d9ab4d.wgsl.expected.fxc.hlsl index 5e1a4b392d9..1e296cd2a17 100644 --- a/test/tint/builtins/gen/var/sqrt/d9ab4d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sqrt/d9ab4d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.fxc.hlsl index a21afec9cc3..1c3d4fc9b29 100644 --- a/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl index 376fe1f2ce6..0fb2324e532 100644 --- a/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/sqrt/ec33e9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/step/07cb06.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/step/07cb06.wgsl.expected.fxc.hlsl index 445c7d0eb4b..98792b4f9ee 100644 --- a/test/tint/builtins/gen/var/step/07cb06.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/step/07cb06.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/step/630d07.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/step/630d07.wgsl.expected.fxc.hlsl index 703212a0c36..8e849e51773 100644 --- a/test/tint/builtins/gen/var/step/630d07.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/step/630d07.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/step/630d07.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/step/630d07.wgsl.expected.ir.fxc.hlsl index 479c0dc45ac..77d13fa4a7e 100644 --- a/test/tint/builtins/gen/var/step/630d07.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/step/630d07.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/step/baa320.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/step/baa320.wgsl.expected.fxc.hlsl index b8334f6c95b..7dc173b936f 100644 --- a/test/tint/builtins/gen/var/step/baa320.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/step/baa320.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/step/cc6b61.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/step/cc6b61.wgsl.expected.fxc.hlsl index 29263e5f8d9..f393d35118d 100644 --- a/test/tint/builtins/gen/var/step/cc6b61.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/step/cc6b61.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl index d6b45a07014..9144dec960e 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl index 26dec00b87d..989e8edc2dd 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl index 89c15a75afa..c0b83846f6d 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl index ff86a07bd1c..d8356642170 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl index 19d8c544e0b..69854d689bd 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl index 95ccc69b833..782ffde80bf 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl index 66337a27a1e..40ba5aa1678 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl index d3e1f70aa28..c644fe3cdcb 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl index 671a31b535b..45993bc0eaf 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl index 366cbb93efe..42f87c36f1f 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl index 4680e7adae9..5433faee8d7 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl index bdd75f22904..c2ac0ba62b6 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl index 04ac337bc4a..0cd8ec17aa0 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl index c38f5ccfdc2..3028cd9678b 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl index 60637847d14..850dc46f574 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl index 641094b7cad..52eaf19399e 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl index d90af5f451e..761bc91db3a 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl index 0d47152d312..a530b0d7628 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl index bf7fbf4b9b0..b790a2826e6 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl index 6aeb5c9ae64..c0b9760ed6a 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl index fb85d6c49c8..61c403528b5 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl index 9a37e129b0e..e50b7727729 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl index 0d77d289a99..84fa6c15ece 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl index 09979dffbef..70b1ff75a35 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl index e9521ad85be..e733acf194b 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl index e46cba0bf1f..fcc38d9a51d 100644 --- a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.fxc.hlsl index 2b22e528a05..3be8ca0034f 100644 --- a/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl index a05f131944c..089e3cc7ea9 100644 --- a/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAll/c962bd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl index 1427ea7cc4d..fb6a280c14c 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl index 5e5ebbb16e3..55a90e7f173 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.fxc.hlsl index 9319a019103..5d6be686466 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl index ad9f90d0d6c..ab2a2f0c162 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl index ccb69c3419d..b03d7dcb060 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl index 7b56d5ac48f..1a7899f72cc 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.fxc.hlsl index 1a2a193a969..30f32d97311 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl index a1aa7fbafc2..0d3a1c17d3e 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.fxc.hlsl index f7baab440fa..2faaccd8f7a 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl index 069f6263968..8cac2c5d2a9 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl index 0c5ed4baee2..fca2bcbdfe6 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl index 5db3ec04290..d125ee2e844 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl index e217265caf0..14f2de14ab9 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl index ca0d0828383..ad3b6d249c4 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl index fdb6b56997f..983c2b6d0d4 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl index 43670da6f83..02753376324 100644 --- a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.fxc.hlsl index bca4294a5e8..73a2e2e09d0 100644 --- a/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl index 602389ab0d2..daa43bae584 100644 --- a/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupAny/cddda0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl index f0f411491bf..3624fb40a2f 100644 --- a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl index 38bdef399a8..dd8f0d48ece 100644 --- a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl index edefe1e7119..80c96666600 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/02f329.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl index e4555ee16b6..fe47d452720 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl index 0412ce5ce1d..c9a072f639d 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl index 82a5121d838..8a078ed13d0 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl index 47d42d72e21..1636d041a37 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl index 088436b8a38..5676c704293 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl index 55105818650..a6742b5b282 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl index 1c8d17c4702..0b6d1072f14 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl index 3b2d5c56da3..ddd091d61d5 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl index 2ec79233bfb..6f77804c7f2 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl index 5c8f35828f8..fa2c717e6ce 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/2b59c9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl index b3faaa77ad2..456e418ca74 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl index 17be70d10e1..ac227899150 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/34ae44.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl index 4f8d4fed46d..023633a138f 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl index 9353f4f4c2d..aa77cebdeeb 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl index 0c17427bf06..e163e26ad93 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl index 82a9d64e0c6..0bb3ea8f653 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl index baefc044619..ddd61b131f1 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl index b95908aebed..708ebe70cde 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/49de94.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl index cb4471f0e72..ed6c363bb68 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl index ccc0d1e696b..2a9588ecd0d 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl index d907f9d4214..acda8acd950 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl index 62cf0689e81..6d4f18174af 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl index 746519ed9c4..96c2cf9db45 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl index ab998b17ed0..bdc43b1c0cb 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/6290a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl index 37060536525..18ed1d26291 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl index 1c8eb24b770..fd1a349e899 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/719ad6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl index c6b39c608f2..50608f9f14d 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl index 7ed03660fe5..942e02e3698 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/727609.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl index 5782c8c546a..74b770f0fbb 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl index 91db7367f92..bbb04228dd1 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/838c78.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl index 645e8f24066..52dc32b14ff 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl index e39e56be5a5..0ec7b9c4cd3 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/867093.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl index 541632686f8..475c6e1ef5d 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl index c34981ea83c..ee6027ce09a 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/8855b2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl index 866a8df1baa..01410d31195 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl index fd9c0c3013f..034ef09cf83 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl index 9d913e8eb37..6ec7e3be693 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl index 5b75252bb28..54798324a59 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/9ccdca.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl index 656f1eb9da2..a83826b05ff 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl index 4565310f830..aa52ebbf939 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/a279d7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl index 32398521089..7f2a02fe001 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/a3b3e5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl index e12a311d1ae..11e1ae4f67a 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl index 49eaa1fbe48..e2a317e4c6f 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl index a0bfda825de..e4ba0ae2990 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl index 577102660b5..bdcdc62cda6 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl index 2808b6dead0..f53ec37337a 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl index a7253947c98..874826b2fb8 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/cd7aa1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl index f69dbb8efab..2241ef476bb 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl index 7ccfb39685b..fa9fbbef4ac 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl index 86103a0fa0f..d160c8305b4 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/e4dd1a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl index 5d682d399c7..ec7e2cf889e 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl index 0f4e95d5fcf..4b7297d4888 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl index 31b36651fa5..089720379e2 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl index 958283fe0db..bbdb61916d5 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcast/fa6810.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl index 09dbd8b35d6..33a5cf30c8f 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl index c186a503492..66cb5a071a0 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/0538e1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl index 30ccdec21d0..9cdd5818775 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/0e58ec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl index 04b81d45c6d..e2799a33526 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl index 5e7c773b0f4..17f1f470530 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/151e52.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl index b43966e7dc3..08613cf3ad2 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl index cdc4745a730..2b5192dea7f 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/1d9530.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl index 62ddb68b870..ed37cccf018 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl index b422c588bc6..b34b0699b86 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5c6962.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl index 7a544be7d8f..97a7fd5f5bd 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl index 716672dcdf7..ba7403cae65 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/5e5b6f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl index 0c648ad6bbd..0d29bf2d6ea 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl index 32e6ac102ec..553fd7f81aa 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/612d6f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl index 823b4a5ebea..de11fb04460 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl index ec4782a1f07..e84d2cf72f9 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/61f177.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl index c509eb25c16..707cda3d0e3 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl index 2ba60a562bb..bdcf93b9a86 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/6945f6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl index 2c19b81217d..1823ae89b53 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/705aad.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl index 025f62f6eb3..d0eb1d53c99 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl index 7a9b6ccc891..f41173c7b03 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/85b351.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl index 0033f87faac..e0e8ecea6df 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl index 508e001dd70..573303d4600 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/8ae580.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl index d0ae2fc3a64..8ae30ca71cc 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl index cbad69a92fd..f0e01a6ead0 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9a1bdc.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl index 9bd9805fab4..34fce9db1bb 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl index fc05500239f..339bfaf46b6 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/9dccee.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl index e9dc91499b5..52d52f2532b 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/a11307.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl index e0798c88b22..a08a43d136d 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl index 76673d61cc2..83a26a00631 100644 --- a/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupBroadcastFirst/e820d4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.fxc.hlsl index 80991124e9f..96dacfce443 100644 --- a/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl index bae59fa6362..3ece0661de7 100644 --- a/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupElect/3943d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl index f4b149e24e5..a500f9329ea 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl index c576e273496..e71f1986648 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl index 6caef9977f8..73c7755d995 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl index d0c7920743c..e40e06adddf 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl index a35b80998cf..6d021cccccd 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl index 64ad66cf039..2e037f91076 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl index 966bf7a19a6..c7973fbfb20 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl index ba5613cd8f2..815a895c5ce 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl index 25c377b8f71..12c29d511f3 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl index 985b14da432..ab224e1af93 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl index 7bab63c17ec..af4c999616c 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl index ae212eb9da0..ea3b14c1047 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl index 39176cdbea8..4bdcfeef2e9 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl index 70a30c9cefe..68555807b8a 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl index 58b12c75e96..c4356cfd5ef 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl index 3c8d2ec5ad1..d0843a9ad6f 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl index aed1d5922c6..f75434258be 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl index 4882a2f29fd..94f7e6427d0 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl index 392b3110292..317bc3a9c9b 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl index 8aac764d33f..3d8abbabac1 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl index 89e6ec2ff5d..3c78b403e46 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl index 336a7c46a42..274f31e7fe5 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl index cda1420706f..3a87063e8b6 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl index 7252ef63233..0d965f91d0d 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl index f012235832a..26b13c362ae 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl index aaecc94fd23..d7ee8ae52f1 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl index 74f28e130dd..b35a9393289 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl index ce57899b8df..c56002302f4 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl index 04ed7af15bc..0d26badd3ba 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl index baa062b19ac..e48264f8c6a 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl index 8a34b44752e..10a60cb7f2d 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl index 0485ece3424..acdc9b4fe73 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl index 8ba7791b76e..dac911bc6be 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl index b6fe3aa51cf..25bf647c0a8 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl index b678e348cf7..696bb7a7cd6 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl index 2726d99ccef..d0ce10bf9aa 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl index 4517a6e0795..6604ff3aece 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl index 628809dea64..d3c456abfb7 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl index 181fc9f9e8e..d7a87e2e349 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl index aa09a8b77a3..cdd5656f120 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl index 060417c29c4..a359a3e1d0f 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl index 4db033ea1c1..300ecce0840 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl index b983f337888..f7f217ede72 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl index 02a87feebec..e1264725a28 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl index d37c711e3a6..3ba12ac521d 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl index 64d3a4f2dec..f5bd38d7349 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl index f1f71980ee1..f12d59f7e08 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl index 3a33e44c669..fe61ed20a28 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl index 1a21a7c01a7..3d6fea9cebb 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl index 938c78ff06b..836a8ad5cda 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl index 905e279b5aa..b9946a45217 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl index 2a5ccec7edd..4fc5e00d0ea 100644 --- a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.fxc.hlsl index fa19b553e61..95443aea071 100644 --- a/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl index 17ebf0ca0f1..99b635dfc78 100644 --- a/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/0b0375.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl index 8dea34e8198..41b6e0b7699 100644 --- a/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl index d18602d8ee2..b5f42af444b 100644 --- a/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/15ccbf.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl index 1987c7f13d1..2722c7319df 100644 --- a/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl index 47dd9cc5601..bec7947491a 100644 --- a/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/1a1a5f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.fxc.hlsl index bd91c8fa2de..d4db8a47e4b 100644 --- a/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl index 20432df15b6..0bd28ae601f 100644 --- a/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/1fc846.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.fxc.hlsl index 69f2de3865f..8b83a225820 100644 --- a/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl index 0fd97869fd4..172c1cd8181 100644 --- a/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/23f502.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/33e339.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/33e339.wgsl.expected.fxc.hlsl index dee6c6b6329..34a338a2373 100644 --- a/test/tint/builtins/gen/var/subgroupMax/33e339.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/33e339.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl index b1a617efcbb..a698e0f4087 100644 --- a/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl index 4d167f60a93..1eca4a06939 100644 --- a/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/4ea90e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.fxc.hlsl index dae911271ed..fcea455239d 100644 --- a/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl index 0527ff4a8f5..4e134644442 100644 --- a/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/5611a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.fxc.hlsl index 7763a9feb57..c36010a5212 100644 --- a/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl index 8ee2f0a92a6..a55c3381246 100644 --- a/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/6c913e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/7c934c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/7c934c.wgsl.expected.fxc.hlsl index 0803855351b..2fbf6d144de 100644 --- a/test/tint/builtins/gen/var/subgroupMax/7c934c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/7c934c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl index 7266fe87223..f463277ab9e 100644 --- a/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl index 6b275f49225..56e18c9e320 100644 --- a/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/7e81ea.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.fxc.hlsl index 9c63946b045..6e7eee3cf09 100644 --- a/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl index 4b34697f399..6914c24a049 100644 --- a/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/932164.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl index c090833c866..ef8bf780ba4 100644 --- a/test/tint/builtins/gen/var/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/a3afe3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl index 63a5a3a4d69..bdb137870ee 100644 --- a/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl index 425f43e9c4c..6dd6c1140fa 100644 --- a/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/a3d5f7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl index eb6ded5bed5..b8e54de9f25 100644 --- a/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl index e334b8b6806..b6522fbf01e 100644 --- a/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/b58cbf.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl index aef19edb931..470cfd72857 100644 --- a/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl index a054f8e7c05..48074457e17 100644 --- a/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMax/b8fb0e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.fxc.hlsl index 525a527b990..567a70e0713 100644 --- a/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl index c38cb691ce3..30e59e63ded 100644 --- a/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/030ad6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl index a3dc6668a39..e706f7fb573 100644 --- a/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl index 2264282cc33..00e0bc651f6 100644 --- a/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/0bc13a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.fxc.hlsl index 3a0a55c0bf8..50e6fdbbb16 100644 --- a/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl index 69d1341f350..cec6e2c944b 100644 --- a/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/1de104.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.fxc.hlsl index e9863b89ce7..ebcc5504535 100644 --- a/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl index a297c6ba531..8fdae5fb628 100644 --- a/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/2493ab.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.fxc.hlsl index 805a045021d..bfc4c37e091 100644 --- a/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl index 852c117322f..7e9bd088f43 100644 --- a/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/2d8828.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.fxc.hlsl index 62c538c5145..75ac32749ff 100644 --- a/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl index 072b6299b85..89057ab207e 100644 --- a/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/337a21.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.fxc.hlsl index 1359ddb3b80..ab1a65172b1 100644 --- a/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl index a78f2997439..ef4f301be74 100644 --- a/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/7def0a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.fxc.hlsl index 436a1332cd2..720d61f324b 100644 --- a/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl index 5fc9d2313a9..59a156496ca 100644 --- a/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/82ef23.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.fxc.hlsl index 93c6839914f..c6369d7930f 100644 --- a/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl index 0e37c6e8ac1..9a67a49a5b4 100644 --- a/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/836960.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl index 8cf6b2af899..5a522113f11 100644 --- a/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl index e8ed3601c10..c5cd3c9ad89 100644 --- a/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/8bb8c1.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl index bfbf48a848a..bd0f2807d7b 100644 --- a/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl index 4a35dae3842..4a5ca3a2f47 100644 --- a/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/8ffadc.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl index c9ba71515d6..5271ed00e85 100644 --- a/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl index 4dfd836d245..c28404c8f3f 100644 --- a/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/a96a2e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl index 99fdfa69061..7ef264b4c30 100644 --- a/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl index 34ccc3c24b6..ee0401c5d47 100644 --- a/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/bbd9b0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl index aedbc18de23..0006b8fc4a4 100644 --- a/test/tint/builtins/gen/var/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/c6da7c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl index 6e5a040db02..14227121c01 100644 --- a/test/tint/builtins/gen/var/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/cd3b9d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMin/d85be6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMin/d85be6.wgsl.expected.fxc.hlsl index c6bd2cb77cd..4c11cbb3302 100644 --- a/test/tint/builtins/gen/var/subgroupMin/d85be6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMin/d85be6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl index 73dd34c6ddc..818156a6cf8 100644 --- a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl index e45b2efe28e..f72e51cdbfe 100644 --- a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl index b6dc42bff97..60cb3b94bc6 100644 --- a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl index e9959b27a32..e9f61832d1d 100644 --- a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl index c6c0de55494..50832adfeaa 100644 --- a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl index 11f1dbb9b9d..a134de330fe 100644 --- a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl index 0713a74fe39..4de3bb93499 100644 --- a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl index 9b649725c36..5e467657923 100644 --- a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl index d3cb331904b..a2fcf76162f 100644 --- a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl index 726aaad0360..f8e9772e176 100644 --- a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl index 803b17c886a..2d2fbe050c0 100644 --- a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl index a6cbf0e1856..a96026aeeb0 100644 --- a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl index 9b15386bae5..7ff5f30497a 100644 --- a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl index 8a28c262b0a..da22ec3f836 100644 --- a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl index bac695a5b7f..e0078d7bb4e 100644 --- a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl index 2233a21acf3..1454d7d6ec6 100644 --- a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl index 2e6c03f47e7..e7628299348 100644 --- a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl index 12ac3455ca6..b8bda3afd27 100644 --- a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl index 4ffd7ffb7f4..76281d43269 100644 --- a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl index 3a57bae30f0..3f21c2970fc 100644 --- a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl index 347a7974f3b..554b36d6f8d 100644 --- a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl index 952c74707ed..a40e61eb1df 100644 --- a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl index 294af91148a..28f17330942 100644 --- a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl index dfd405695a1..8928ea07d37 100644 --- a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl index bd3acf1cb74..900dcc69c84 100644 --- a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl index dcc700d7b96..3545a8a28c2 100644 --- a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.fxc.hlsl index 117d6b8474d..0298f429540 100644 --- a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl index cb73be926ba..898cdbe5973 100644 --- a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.fxc.hlsl index 809e8665f6f..3e86e07fef8 100644 --- a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl index 1308569f9dd..0c9a6412f7f 100644 --- a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl index 6c10e80f649..70552e8e0d6 100644 --- a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl index 628b3b0ca41..5bec8128683 100644 --- a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl index dea393e0b6b..07310025d7b 100644 --- a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl index ee2aadeba6f..498af75eb5f 100644 --- a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.fxc.hlsl index 36e01293a16..070988719d8 100644 --- a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl index da194efcf41..55543dfb53d 100644 --- a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl index 3f9fb716bea..203f774a5ba 100644 --- a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl index b2071295951..2cc6f129bce 100644 --- a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl index 649a27e3c79..44d2af28937 100644 --- a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl index 26c8bf16992..d0d0c909d6e 100644 --- a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.fxc.hlsl index 1200714a30b..becb51efe80 100644 --- a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl index d34a6e8a483..138aea8ef3a 100644 --- a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.fxc.hlsl index 4e831111f0a..90aab8dd871 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl index 45fa2334995..3f8cf2b61b5 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/030422.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl index 175615a68d1..3d25753184c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl index 61502b08dfb..2327b93cd6f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/1f664c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl index c56b3c98411..59bd417c6c7 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl index 74e71a3c6eb..66b86a3d60e 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/21f083.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl index 737962c78d2..804e5970eae 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl index a518e023dee..cdb1060e4c9 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/2ee993.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.fxc.hlsl index 36bcf54922f..2c238da39e8 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl index ba1808720f3..ea0e4798b2d 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/323416.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl index ea943fb40c2..dd6390a09ec 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl index 8cde19e182f..de9939042f5 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/4752bd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl index 30c1f6ab56a..2522092e2b7 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl index 3791333d74e..354b89b2ee1 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/4cbb69.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl index 0d5c236fd08..3cec31831ba 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl index 1aef6735a97..db4611df6f6 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/4f5711.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl index ecd4467c67f..51a15b1e518 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl index 446cf9e9876..53cde1102dc 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/54f328.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl index 6060aeda77d..280e7dbb548 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl index adcd65f7f8a..aef9f043a7d 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/5dfeab.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl index e82ae051d5e..12b3e4d4804 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl index fa89570185a..be2e4321611 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/5ef5a2.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/647034.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/647034.wgsl.expected.fxc.hlsl index 6de636caf47..ce383dd1c32 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/647034.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/647034.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl index 409b3f79348..a58231cb9c7 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/7ba2d5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl index 0bf2e1f12de..4294d1d8028 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl index 9f6c7b3d072..5e637f5c708 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/7c5d64.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl index ae9e85468ed..7da7fe200c0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl index d5619b4e7b8..a4196c34c2c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/7d7b1e.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl index 1bd777624c1..b9d553acce0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/821df9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.fxc.hlsl index 85b2cc09e98..04da868261d 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl index dab4561de16..ea567a5f5f0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/824702.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl index 1e8df251eb4..e284feac85d 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl index 29b63d74599..487270c8f59 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/84f261.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl index 20d6df7ddc9..554c6eeade0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl index 6b477b76575..65613a513d1 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/85587b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl index ac6cf158f6f..7efaaf694cf 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl index 49eb9332c24..ce34f728af5 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/8890a5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl index afbbd84bc13..167be9b54e4 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl index 86b69b17b64..64680f7d365 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/8bfbcd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl index 8150c1527d4..9e1d27dae4c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/8c3fd2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl index 71606d296e4..c5758341312 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/aa1d5c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl index 169179c2649..3d58b927c81 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl index 77644bd9ff2..e89dfa16afe 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/b0f28d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl index 85bb20c389a..d9ac2306d71 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl index 07f4ea32a70..f818e27ada1 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/b4bbb7.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl index 3495aab96ce..b9f98e85dad 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl index 092c5ed753e..c9dd94366f7 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/bbb06c.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl index 0a677efe3a4..2ef53007b15 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl index 95407ef2cb7..75d75a130de 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/d4a772.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl index e16abe8c1f9..6da53c0a60b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl index 17f9735dde5..2a5847a15bb 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/d9ff67.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl index c8701a89702..eb8de4814df 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl index 1b5ff85cb5d..1da9d4c6479 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/e13c81.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl index 072160d1854..f43bb85016e 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl index 975899ff4f7..bba96731467 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/e854d5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl index 16460b565b8..481f38ff882 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl index deef41462c9..9d53956ee99 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/f194f5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl index d395a3381e1..41b5238375c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffle/fb4ab9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl index 8e3e9cefe83..6463af0d4f9 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl index 923da2dae1c..b2bf2257599 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/10eb45.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl index b1d00138128..b667f8092e8 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl index 2e9c4aec282..c5a394d9cb7 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/1b530f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl index fc9b521f483..a5856e8ba00 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl index 233ca66af19..d6ffb5c9d2c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/257ff0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl index cd227733665..5cd87b121ba 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl index 789d32d96e0..633073c1c96 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/313d9b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl index bb2f189792b..6eef3d1a91c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl index eed7ee837aa..3f6f0bb31a9 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/57b1e8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl index 1804033ae29..3058d6c6899 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl index 6e98ca3517e..6d47f2d0664 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/5d8b9f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl index 288f8fe6d68..bdca525939f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl index 9e384a8b235..3b9c63add42 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/63fdb0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl index 70a3b1c9616..7baf7d9cf43 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl index 5e1aa1b44ee..a7f2154452f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/642789.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl index 1b18b06d6a6..9a0e5b70b70 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl index c47c47b7e32..5f32d8bee45 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/7a0cf5.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl index 00e3a2eae0b..7393804e9a8 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl index 0c6443b2ffe..852282d58ea 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/7f8886.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl index 807351caf5e..8a53b39ca94 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl index 22dd7f5efd6..c68b9b1254b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/9c6714.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl index ce272e4551e..f83243c4e9c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl index 525eca34cfe..e4924198822 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/b41899.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl index 66942d22616..07d0f4625c3 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl index 3ec640f6383..44409ad5163 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/c9f1c4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl index d5ca6b5baca..60fe881399b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl index bd173c8cf90..4c7aedb794f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/d269eb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl index fe353339b24..6eb611a69d1 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl index f1ec7bf3db6..7deef8a0649 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/d46304.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl index b10899141e2..26c0bb8bc30 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl index 48748d0b408..f6e14741240 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleDown/d90c2f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl index ebae8dd7c30..a6a2c8dcfe0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl index 52fb6454174..9d20d16e5b3 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/0990cd.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl index 96a21a2ea48..96ea7ef960c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl index c3aa209a5be..93d196a4a90 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/1bb93f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl index aed960215db..1e741358dfd 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl index c71198e9eae..81fddb1a574 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/23c7ca.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl index fd84f519220..440f5fa018c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl index 4666003ed2b..98ec4e58978 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/3242a6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl index d261abfbbf8..7342175dcf4 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl index 6e1a960e7ea..131a266766c 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/33d495.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl index 83ac3df3d37..7938b9e76a0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl index e228e770a2d..7914d1c8ab0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/3e609f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl index 3b3877161de..4c05935fef0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl index dd1159e2f54..050c7d2f97a 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/58de69.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl index 4a5d27afcae..057cc007a3f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl index 6887ede5583..b769c9cc8b4 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/868e52.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl index ad07e9f4d02..4d543014b7e 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl index 6232765a6f9..d58d6b222f8 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/87c9d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl index 76b6a4b1f15..afec358bdaa 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl index 2b146b79ed4..f8178d0a587 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/88eb07.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl index 69b0d6e3914..4fd9526ae52 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl index 498166d7c63..498bef823cc 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/8a63f3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl index 6f697b5b0d8..ad58012319a 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl index 643ef1d219e..aff028bc246 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/a2075a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl index 36b1ba5f184..035b0607cf8 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl index 60eab5d9fe0..54acaa8842d 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/abaea0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl index 354c5031777..f4471e7fd28 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl index ca05d4827a1..727d1f46d2f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/b58804.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl index bdbd3efe683..c4be8ccdf77 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl index f3f2405f693..29940cc682e 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/bbf7f4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl index 7cb796cdbcd..7c9b4408a56 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl index 3a4c159f5f5..af245c03d4f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleUp/db5bcb.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl index 80f54d044a8..4bf0039f071 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl index 5e0bf0a28bb..9a94674495e 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/071aa0.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl index 199cea57e69..37a57da5495 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl index 76f347d71c4..20116f06660 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/08f588.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl index aa3e60e66d0..bef5b2bc7e0 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl index 3be3d2dcc68..8ad640714da 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/1d36b6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl index e9dc5a64d4d..772235200aa 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl index 7ffeddb638e..177cc660e38 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/1e247f.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl index 286e6c1d24b..f522f0b4147 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl index 2d2e33b0d5a..65ebb9db52e 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/1f2590.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl index b4da6c8c7de..56ba1b88889 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl index c2ccafc8b45..7ad66823142 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/2e033d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl index 92b0fd38f64..761de6acc8b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl index 6c7e482ae57..6b657d1bae3 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/445e83.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl index 34dd46c0108..57b0b806f8b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl index e582fcf82f9..5bc0e56e841 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/7435fe.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl index e226653f2be..2574a58cd6f 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl index 9116e0a8da4..dc6a216afec 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/80b6e9.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl index ef0f052d64b..a8678f3d24b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl index 3c1fbb70b83..0c60e2207a8 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/9f945a.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl index ef223f9ab9f..585bca8d073 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl index c74de45f6db..8d933914f3e 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/bdddba.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl index 729d4dc2b1d..19ee7dd3dc6 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl index 1dce61bea67..331758f751b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/c88290.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl index 7088580653d..f8db090d016 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl index 432c633b749..789786e2447 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/caa816.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl index 3815a5d06af..5cd5b936aac 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl index 4fc12be1d34..ec872004148 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/d224ab.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl index 3334164ce46..3d1eb77423b 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl index 3826eca765e..bdff43c3962 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/e3c10b.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl index e4eb083f597..a0ba5165d36 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl index c7df296becf..d3d57d6e0d1 100644 --- a/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupShuffleXor/f7b453.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.fxc.hlsl index 1600601712a..cb16318f8e2 100644 --- a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl index 07c82d0e327..9301decdec0 100644 --- a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.fxc.hlsl index 137e8f82014..1adcfb81be4 100644 --- a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl index 7ead307ccd0..3fd5453fbed 100644 --- a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.fxc.hlsl index 773ebb9fb20..a1645e2e991 100644 --- a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl index 6371152691c..600be1f47b5 100644 --- a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.fxc.hlsl index 021eda7a5bb..a1c6a95dddd 100644 --- a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl index ec77a4080a6..47834bf65c1 100644 --- a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.fxc.hlsl index f337d50849f..eddd0df902d 100644 --- a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl index aa6c020182c..e78d0556fd4 100644 --- a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl index 859c839560e..d9e5d64209e 100644 --- a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl index e33e51d2ecf..c92dc350d03 100644 --- a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl index 8e7c93275b8..864d5667bdb 100644 --- a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl index 9cac0d9df95..39e8a1b580d 100644 --- a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl index c547480854c..9f924416c5e 100644 --- a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl index 47416c87b61..721f0890747 100644 --- a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tan/539e54.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tan/539e54.wgsl.expected.fxc.hlsl index ff3c11e5f3a..e70819867cc 100644 --- a/test/tint/builtins/gen/var/tan/539e54.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tan/539e54.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tan/9f7c9c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tan/9f7c9c.wgsl.expected.fxc.hlsl index f1da47f1432..da4875b4848 100644 --- a/test/tint/builtins/gen/var/tan/9f7c9c.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tan/9f7c9c.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.fxc.hlsl index e9c049c3b2f..cd49832bc3d 100644 --- a/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.ir.fxc.hlsl index 6a832478b4c..e7cd30f809e 100644 --- a/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/tan/d4d491.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/tan/db0456.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tan/db0456.wgsl.expected.fxc.hlsl index d3ad8758cf7..a9522d33035 100644 --- a/test/tint/builtins/gen/var/tan/db0456.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tan/db0456.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tanh/06a4fe.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tanh/06a4fe.wgsl.expected.fxc.hlsl index 0875a63c83e..5a76d1d7ef5 100644 --- a/test/tint/builtins/gen/var/tanh/06a4fe.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tanh/06a4fe.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.fxc.hlsl index 400bec337a5..09caba34903 100644 --- a/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.ir.fxc.hlsl index b76cf2816b9..9612caf85c9 100644 --- a/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/tanh/5b19af.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/tanh/6d105a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tanh/6d105a.wgsl.expected.fxc.hlsl index d86ff938abc..daff85af7a6 100644 --- a/test/tint/builtins/gen/var/tanh/6d105a.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tanh/6d105a.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/tanh/e8efb3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/tanh/e8efb3.wgsl.expected.fxc.hlsl index 18956af1564..d29f4e73f95 100644 --- a/test/tint/builtins/gen/var/tanh/e8efb3.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/tanh/e8efb3.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/06794e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/06794e.wgsl.expected.fxc.hlsl index b425f0d86ed..a3c94331536 100644 --- a/test/tint/builtins/gen/var/transpose/06794e.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/06794e.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/5edd96.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/5edd96.wgsl.expected.fxc.hlsl index 3581466a3fa..34f45490a68 100644 --- a/test/tint/builtins/gen/var/transpose/5edd96.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/5edd96.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/5f36bf.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/5f36bf.wgsl.expected.fxc.hlsl index c63c678626e..0e94621afef 100644 --- a/test/tint/builtins/gen/var/transpose/5f36bf.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/5f36bf.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/7be8b2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/7be8b2.wgsl.expected.fxc.hlsl index f788ddc96fb..fecba881ba0 100644 --- a/test/tint/builtins/gen/var/transpose/7be8b2.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/7be8b2.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/844869.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/844869.wgsl.expected.fxc.hlsl index 25db8f1e332..8e2cdc207e8 100644 --- a/test/tint/builtins/gen/var/transpose/844869.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/844869.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/8c06ce.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/8c06ce.wgsl.expected.fxc.hlsl index 7ee93fec3ef..8578975af6c 100644 --- a/test/tint/builtins/gen/var/transpose/8c06ce.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/8c06ce.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/b9ad1f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/b9ad1f.wgsl.expected.fxc.hlsl index f72a47bf5ec..12a30893c0b 100644 --- a/test/tint/builtins/gen/var/transpose/b9ad1f.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/b9ad1f.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/d6faec.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/d6faec.wgsl.expected.fxc.hlsl index 9f820393cf5..6fcb168dfc2 100644 --- a/test/tint/builtins/gen/var/transpose/d6faec.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/d6faec.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/transpose/faeb05.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/transpose/faeb05.wgsl.expected.fxc.hlsl index d33197e1804..382ecd5e5a3 100644 --- a/test/tint/builtins/gen/var/transpose/faeb05.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/transpose/faeb05.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer prevent_dce : register(u0); diff --git a/test/tint/builtins/gen/var/trunc/103ab8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/trunc/103ab8.wgsl.expected.fxc.hlsl index a6b3f03f6e8..1b61aca53cc 100644 --- a/test/tint/builtins/gen/var/trunc/103ab8.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/trunc/103ab8.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/builtins/gen/var/trunc/a56109.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/trunc/a56109.wgsl.expected.fxc.hlsl index 438a8458cd4..ace86514766 100644 --- a/test/tint/builtins/gen/var/trunc/a56109.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/trunc/a56109.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.fxc.hlsl index 9d63308c5e5..09e9dec6135 100644 --- a/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_trunc(float16_t param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl index 353eb803a20..46cec6e3625 100644 --- a/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/trunc/cc2b0d.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutput { float4 pos; diff --git a/test/tint/builtins/gen/var/trunc/ce7c17.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/trunc/ce7c17.wgsl.expected.fxc.hlsl index 501b4e5b79a..a2e75496095 100644 --- a/test/tint/builtins/gen/var/trunc/ce7c17.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/trunc/ce7c17.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl index 00bb70b9e32..e62bc19d5d2 100644 --- a/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl +++ b/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID groupshared float16_t arg_0; diff --git a/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl b/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl index 33bdee42a83..6282752866f 100644 --- a/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/builtins/gen/var/workgroupUniformLoad/e07d08.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct compute_main_inputs { uint tint_local_index : SV_GroupIndex; diff --git a/test/tint/expressions/binary/add/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/add/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl index 2f3e67810af..e8ba581a090 100644 --- a/test/tint/expressions/binary/add/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/add/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 6427e5fa029..d822e25562e 100644 --- a/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index 1be6542694e..0120b628c96 100644 --- a/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/add/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.fxc.hlsl index aeecd55e7d8..c0c60780e7a 100644 --- a/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index bcd4c9a4eaf..d8340ad00fb 100644 --- a/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/add/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/add/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/add/vec3-scalar/f16.wgsl.expected.fxc.hlsl index 6fb1c54dad4..5d4fdc0c87e 100644 --- a/test/tint/expressions/binary/add/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/add/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/add/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/add/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 92fe9357583..ce19184aa00 100644 --- a/test/tint/expressions/binary/add/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/add/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 242b92d6b6f..7af4a13b72f 100644 --- a/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index 1f177aa8b1d..00af6aa81b8 100644 --- a/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.fxc.hlsl index 8f0e6f847c7..daad7eff5d2 100644 --- a/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index fd7bd799ced..65d794c946b 100644 --- a/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div/vec3-scalar/f16.wgsl.expected.fxc.hlsl index 068be5c770d..4b8233a2a2f 100644 --- a/test/tint/expressions/binary/div/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 4b28a3ffdb5..1f6f38e2033 100644 --- a/test/tint/expressions/binary/div/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 249c0fb5465..6ba2b206568 100644 --- a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index 730f88fb41d..cf81d14ff73 100644 --- a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.fxc.hlsl index 21010837f3e..1b9c75e4afe 100644 --- a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index 08e321f57e8..0f3385808e3 100644 --- a/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_constant/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div_by_zero/by_constant/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_constant/vec3-scalar/f16.wgsl.expected.fxc.hlsl index 1f7f02bae94..97a4c7330c9 100644 --- a/test/tint/expressions/binary/div_by_zero/by_constant/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_constant/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 99e4c40cdb4..885c85aa879 100644 --- a/test/tint/expressions/binary/div_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 4076a2a34ae..a7532e01043 100644 --- a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index cc00b9f38fe..2258c52286a 100644 --- a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.fxc.hlsl index ae01ab74b3d..61879950daa 100644 --- a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index dc877a6b295..cd8b18deb63 100644 --- a/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_expression/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div_by_zero/by_expression/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_expression/vec3-scalar/f16.wgsl.expected.fxc.hlsl index 17dc8e04412..68f08dc24b1 100644 --- a/test/tint/expressions/binary/div_by_zero/by_expression/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_expression/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 11d37671643..2549b6a5a9e 100644 --- a/test/tint/expressions/binary/div_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 249c0fb5465..6ba2b206568 100644 --- a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index 730f88fb41d..cf81d14ff73 100644 --- a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.fxc.hlsl index 21010837f3e..1b9c75e4afe 100644 --- a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index 08e321f57e8..0f3385808e3 100644 --- a/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_identifier/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-scalar/f16.wgsl.expected.fxc.hlsl index 1f7f02bae94..97a4c7330c9 100644 --- a/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 99e4c40cdb4..885c85aa879 100644 --- a/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/div_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 6cffe3524f5..ecbf0af97dc 100644 --- a/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_trunc(float16_t param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index 17b22e9dd9a..7fae6425e00 100644 --- a/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/mod/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.fxc.hlsl index 66ae02b35f2..1730513e29c 100644 --- a/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index 227fb2cf247..124c1cb5f43 100644 --- a/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/mod/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/mod/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod/vec3-scalar/f16.wgsl.expected.fxc.hlsl index 7e9370ac35a..d1d79a1eb1c 100644 --- a/test/tint/expressions/binary/mod/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 86acaee30a7..60bf7910716 100644 --- a/test/tint/expressions/binary/mod/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 373fd7f0cf6..829123d2039 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_trunc(float16_t param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index 029bb037482..9726228ce57 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_constant/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/mod_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl index c4c1e8396d7..d2cdc8844a4 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_constant/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 77bbb7f1eb7..e26c06bf6c6 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_trunc(float16_t param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index e709407cbfe..4dbd3063d09 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_expression/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/mod_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl index d80961c4938..ca3a7789f79 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_expression/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 373fd7f0cf6..829123d2039 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t tint_trunc(float16_t param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index 867c4ee0fe4..32d28a0861a 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_identifier/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/mod_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mod_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl index c4c1e8396d7..d2cdc8844a4 100644 --- a/test/tint/expressions/binary/mod_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mod_by_zero/by_identifier/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID vector tint_trunc(vector param_0) { return param_0 < 0 ? ceil(param_0) : floor(param_0); diff --git a/test/tint/expressions/binary/mul/mat2x4-mat4x2/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/mat2x4-mat4x2/f16.wgsl.expected.fxc.hlsl index 7197724c4d3..b26819cf144 100644 --- a/test/tint/expressions/binary/mul/mat2x4-mat4x2/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/mat2x4-mat4x2/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/mul/mat3x2-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/mat3x2-vec3/f16.wgsl.expected.fxc.hlsl index 8c727a63294..484376bc14f 100644 --- a/test/tint/expressions/binary/mul/mat3x2-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/mat3x2-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_data : register(b0) { uint4 data[2]; diff --git a/test/tint/expressions/binary/mul/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl index 1541969c96a..e12c413c049 100644 --- a/test/tint/expressions/binary/mul/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/mul/mat3x3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/mat3x3-vec3/f16.wgsl.expected.fxc.hlsl index 379f8e1fe65..e4acc0aa83f 100644 --- a/test/tint/expressions/binary/mul/mat3x3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/mat3x3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_data : register(b0) { uint4 data[2]; diff --git a/test/tint/expressions/binary/mul/mat4x2-mat2x4/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/mat4x2-mat2x4/f16.wgsl.expected.fxc.hlsl index 6c780dafe12..b3596fd3b9a 100644 --- a/test/tint/expressions/binary/mul/mat4x2-mat2x4/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/mat4x2-mat2x4/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 02860a34ac0..4f835b9dabc 100644 --- a/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index b39c02e0d6e..64390bf69d7 100644 --- a/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/mul/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.fxc.hlsl index 18e1d48625b..e53b8a97f0b 100644 --- a/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index 7ec03a171aa..197dc096105 100644 --- a/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/mul/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/mul/vec3-mat3x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/vec3-mat3x3/f16.wgsl.expected.fxc.hlsl index c5a6e76ffb7..2b915bd1211 100644 --- a/test/tint/expressions/binary/mul/vec3-mat3x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/vec3-mat3x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_data : register(b0) { uint4 data[2]; diff --git a/test/tint/expressions/binary/mul/vec3-mat4x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/vec3-mat4x3/f16.wgsl.expected.fxc.hlsl index ba51d38de7f..2a0fb27bc7d 100644 --- a/test/tint/expressions/binary/mul/vec3-mat4x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/vec3-mat4x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID cbuffer cbuffer_data : register(b0) { uint4 data[3]; diff --git a/test/tint/expressions/binary/mul/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/vec3-scalar/f16.wgsl.expected.fxc.hlsl index 4ca6a74539e..9e077961742 100644 --- a/test/tint/expressions/binary/mul/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/mul/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/mul/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 1ebb7939a8f..c845825062e 100644 --- a/test/tint/expressions/binary/mul/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/mul/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/sub/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/sub/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl index 669f920d60d..c8ac494e221 100644 --- a/test/tint/expressions/binary/sub/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/sub/mat3x3-mat3x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.fxc.hlsl index 7c4df0d9b28..82fb75fbc04 100644 --- a/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl index fd7e527d580..da3eeeb3d41 100644 --- a/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/sub/scalar-scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.fxc.hlsl index 6d36d726527..6894ea62cc3 100644 --- a/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl index 78618f5b414..462ebd18755 100644 --- a/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/binary/sub/scalar-vec3/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/binary/sub/vec3-scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/sub/vec3-scalar/f16.wgsl.expected.fxc.hlsl index d030ea49316..6ac09a7464b 100644 --- a/test/tint/expressions/binary/sub/vec3-scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/sub/vec3-scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/binary/sub/vec3-vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/binary/sub/vec3-vec3/f16.wgsl.expected.fxc.hlsl index 8551961fb5e..d378d2df948 100644 --- a/test/tint/expressions/binary/sub/vec3-vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/binary/sub/vec3-vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.fxc.hlsl index 55fe4a82c09..bc9542454df 100644 --- a/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl index 01c5ae9d6cb..9d2108e8182 100644 --- a/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/bitcast/const/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.fxc.hlsl index 9cbfda1431c..b7784273582 100644 --- a/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void f() { diff --git a/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl index 1f40118d437..6e00162d1cd 100644 --- a/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/bitcast/let/16bit/f16-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] diff --git a/test/tint/expressions/splat/call/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/splat/call/f16.wgsl.expected.fxc.hlsl index 1142c99759d..47452246f29 100644 --- a/test/tint/expressions/splat/call/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/splat/call/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/splat/call/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/splat/call/f16.wgsl.expected.ir.fxc.hlsl index 315fadc479d..89a74035a75 100644 --- a/test/tint/expressions/splat/call/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/splat/call/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID float16_t get_f16() { diff --git a/test/tint/expressions/splat/expression/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/splat/expression/f16.wgsl.expected.fxc.hlsl index 90b27ef6ac6..0fc45496257 100644 --- a/test/tint/expressions/splat/expression/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/splat/expression/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/splat/immediate/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/splat/immediate/f16.wgsl.expected.fxc.hlsl index 32b8e7c75a6..84830c2913f 100644 --- a/test/tint/expressions/splat/immediate/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/splat/immediate/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/splat/var/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/splat/var/f16.wgsl.expected.fxc.hlsl index df92d7ed063..672c77346a5 100644 --- a/test/tint/expressions/splat/var/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/splat/var/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/splat/var/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/splat/var/f16.wgsl.expected.ir.fxc.hlsl index c34846a8940..2a6e2637c01 100644 --- a/test/tint/expressions/splat/var/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/splat/var/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID void f() { diff --git a/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.fxc.hlsl index 43969466e7d..745f29e6710 100644 --- a/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.ir.fxc.hlsl index 034ed322518..552e3a07ba2 100644 --- a/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/splat/with_swizzle/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID void f() { diff --git a/test/tint/expressions/swizzle/read/packed_vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/swizzle/read/packed_vec3/f16.wgsl.expected.fxc.hlsl index ff1092864be..c4201b0e77c 100644 --- a/test/tint/expressions/swizzle/read/packed_vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/swizzle/read/packed_vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/swizzle/read/vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/swizzle/read/vec3/f16.wgsl.expected.fxc.hlsl index 4a24658769c..c2035d9ece1 100644 --- a/test/tint/expressions/swizzle/read/vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/swizzle/read/vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/swizzle/write/vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/swizzle/write/vec3/f16.wgsl.expected.fxc.hlsl index 26fc8bde9ab..4f2ee1065a0 100644 --- a/test/tint/expressions/swizzle/write/vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/swizzle/write/vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.fxc.hlsl index 23803de5ea9..598b9caf181 100644 --- a/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl index 450bf4a1e4f..3bf083bccc6 100644 --- a/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat2x2/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x2/function/f32-f16.wgsl.expected.fxc.hlsl index 76005378707..cc8cb5a97e9 100644 --- a/test/tint/expressions/type_conv/mat2x2/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x2/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x2/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x2/literal/f32-f16.wgsl.expected.fxc.hlsl index 3c8fa1971b9..95517cd4b7f 100644 --- a/test/tint/expressions/type_conv/mat2x2/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x2/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x2/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x2/var/f16-f32.wgsl.expected.fxc.hlsl index 3c2322fe3bb..a44fa927af5 100644 --- a/test/tint/expressions/type_conv/mat2x2/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x2/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x2/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x2/var/f32-f16.wgsl.expected.fxc.hlsl index 8dacad1b7e0..a4179c6d632 100644 --- a/test/tint/expressions/type_conv/mat2x2/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x2/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.fxc.hlsl index 83e13507195..10705edeef2 100644 --- a/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl index 7eaddce77c7..a67eff6cfeb 100644 --- a/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat2x3/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x3/function/f32-f16.wgsl.expected.fxc.hlsl index 2aee3672f91..c3059e2e3e0 100644 --- a/test/tint/expressions/type_conv/mat2x3/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x3/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x3/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x3/literal/f32-f16.wgsl.expected.fxc.hlsl index 8baf684b52c..70ae3922682 100644 --- a/test/tint/expressions/type_conv/mat2x3/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x3/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x3/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x3/var/f16-f32.wgsl.expected.fxc.hlsl index f1ebc2df77f..83a0330735e 100644 --- a/test/tint/expressions/type_conv/mat2x3/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x3/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x3/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x3/var/f32-f16.wgsl.expected.fxc.hlsl index 0ab60b9a0df..eeeba0957a1 100644 --- a/test/tint/expressions/type_conv/mat2x3/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x3/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.fxc.hlsl index f004a30851c..613b3e72bee 100644 --- a/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl index 931d0f45f97..3ca165d86f9 100644 --- a/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat2x4/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x4/function/f32-f16.wgsl.expected.fxc.hlsl index e06fe1b9c3e..4872c9b837a 100644 --- a/test/tint/expressions/type_conv/mat2x4/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x4/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x4/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x4/literal/f32-f16.wgsl.expected.fxc.hlsl index 66932d0cd16..7f9a8f582b9 100644 --- a/test/tint/expressions/type_conv/mat2x4/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x4/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x4/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x4/var/f16-f32.wgsl.expected.fxc.hlsl index b904d535211..33bdf796cef 100644 --- a/test/tint/expressions/type_conv/mat2x4/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x4/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat2x4/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat2x4/var/f32-f16.wgsl.expected.fxc.hlsl index 753fc2780e2..43d2e722fdf 100644 --- a/test/tint/expressions/type_conv/mat2x4/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat2x4/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.fxc.hlsl index ed31a45fcdc..cb8e705b65f 100644 --- a/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl index f3807e95b24..be48b7a533c 100644 --- a/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat3x2/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x2/function/f32-f16.wgsl.expected.fxc.hlsl index 2adbd429b6c..a936e015cd6 100644 --- a/test/tint/expressions/type_conv/mat3x2/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x2/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x2/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x2/literal/f32-f16.wgsl.expected.fxc.hlsl index e37f400905a..d35d0e2531b 100644 --- a/test/tint/expressions/type_conv/mat3x2/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x2/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x2/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x2/var/f16-f32.wgsl.expected.fxc.hlsl index faabbfba2ae..fc7a72a50db 100644 --- a/test/tint/expressions/type_conv/mat3x2/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x2/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x2/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x2/var/f32-f16.wgsl.expected.fxc.hlsl index 916876c9010..dafb5b5edbf 100644 --- a/test/tint/expressions/type_conv/mat3x2/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x2/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.fxc.hlsl index 5310e750ed0..4143ef52323 100644 --- a/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl index 70544ea0c62..45194168500 100644 --- a/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat3x3/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x3/function/f32-f16.wgsl.expected.fxc.hlsl index 23095552cd0..ce003ae95ca 100644 --- a/test/tint/expressions/type_conv/mat3x3/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x3/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x3/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x3/literal/f32-f16.wgsl.expected.fxc.hlsl index 0f10d33b769..699c5749ff3 100644 --- a/test/tint/expressions/type_conv/mat3x3/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x3/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x3/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x3/var/f16-f32.wgsl.expected.fxc.hlsl index d046eac048f..0def91362ac 100644 --- a/test/tint/expressions/type_conv/mat3x3/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x3/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x3/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x3/var/f32-f16.wgsl.expected.fxc.hlsl index 2ca7c5b5440..8e3da49cc24 100644 --- a/test/tint/expressions/type_conv/mat3x3/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x3/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.fxc.hlsl index 25b4a75be52..cfacaf7152c 100644 --- a/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl index f231051301b..f56209af475 100644 --- a/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat3x4/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x4/function/f32-f16.wgsl.expected.fxc.hlsl index b70a173256b..20e4a5d1f06 100644 --- a/test/tint/expressions/type_conv/mat3x4/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x4/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x4/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x4/literal/f32-f16.wgsl.expected.fxc.hlsl index 8f16fde6937..6f8a9655f7f 100644 --- a/test/tint/expressions/type_conv/mat3x4/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x4/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x4/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x4/var/f16-f32.wgsl.expected.fxc.hlsl index 47a79348291..a3a5c5a73cf 100644 --- a/test/tint/expressions/type_conv/mat3x4/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x4/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat3x4/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat3x4/var/f32-f16.wgsl.expected.fxc.hlsl index 63d86c7f608..e269ee17065 100644 --- a/test/tint/expressions/type_conv/mat3x4/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat3x4/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.fxc.hlsl index 74f9a80e089..2a140816749 100644 --- a/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl index e7e60afa575..db8f111651c 100644 --- a/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x2/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat4x2/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x2/function/f32-f16.wgsl.expected.fxc.hlsl index 8f1a3aff829..49f5467dcf9 100644 --- a/test/tint/expressions/type_conv/mat4x2/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x2/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x2/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x2/literal/f32-f16.wgsl.expected.fxc.hlsl index 33ef15870e7..b002a78b7a7 100644 --- a/test/tint/expressions/type_conv/mat4x2/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x2/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x2/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x2/var/f16-f32.wgsl.expected.fxc.hlsl index 55e2c0991ba..94f5f3df2ca 100644 --- a/test/tint/expressions/type_conv/mat4x2/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x2/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x2/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x2/var/f32-f16.wgsl.expected.fxc.hlsl index 2a4aa767736..8a68a6b7976 100644 --- a/test/tint/expressions/type_conv/mat4x2/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x2/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.fxc.hlsl index f0703d9c451..b392d32abc2 100644 --- a/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl index dd2ad50af54..a84c33f7124 100644 --- a/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x3/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat4x3/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x3/function/f32-f16.wgsl.expected.fxc.hlsl index 06c0bea6974..6069ab4614e 100644 --- a/test/tint/expressions/type_conv/mat4x3/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x3/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x3/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x3/literal/f32-f16.wgsl.expected.fxc.hlsl index 197ded25412..d079b31d1cc 100644 --- a/test/tint/expressions/type_conv/mat4x3/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x3/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x3/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x3/var/f16-f32.wgsl.expected.fxc.hlsl index 30486512bcf..eaf793fe2c9 100644 --- a/test/tint/expressions/type_conv/mat4x3/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x3/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x3/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x3/var/f32-f16.wgsl.expected.fxc.hlsl index e3dbcdb50c2..7cd0395aefe 100644 --- a/test/tint/expressions/type_conv/mat4x3/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x3/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.fxc.hlsl index 75f067c7ec9..8900d6f8635 100644 --- a/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl index 37259e8770c..ac068107ef2 100644 --- a/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x4/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/mat4x4/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x4/function/f32-f16.wgsl.expected.fxc.hlsl index 942d99bdd64..897a04211a8 100644 --- a/test/tint/expressions/type_conv/mat4x4/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x4/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x4/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x4/literal/f32-f16.wgsl.expected.fxc.hlsl index 5ba2c64ef36..2eb805450bf 100644 --- a/test/tint/expressions/type_conv/mat4x4/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x4/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x4/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x4/var/f16-f32.wgsl.expected.fxc.hlsl index 26bde15790a..791deeb886c 100644 --- a/test/tint/expressions/type_conv/mat4x4/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x4/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/mat4x4/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/mat4x4/var/f32-f16.wgsl.expected.fxc.hlsl index 0c678ec63a7..a1d41798926 100644 --- a/test/tint/expressions/type_conv/mat4x4/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/mat4x4/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.fxc.hlsl index 0f1b3fd0968..fcb10a4f68a 100644 --- a/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.ir.fxc.hlsl index 6c33d046307..7b83ae89927 100644 --- a/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/bool-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static bool t = false; diff --git a/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.fxc.hlsl index 912348989f4..54b461e377e 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.ir.fxc.hlsl index caf6f86af07..30cba90921f 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-bool.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.fxc.hlsl index 4893fceb52e..ff254e8df70 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.ir.fxc.hlsl index d53e2a4e3ab..00dec774962 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.fxc.hlsl index b710a3953d9..4fb2eea6c51 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.ir.fxc.hlsl index 1bac843a80c..38772fc6d9b 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-i32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.fxc.hlsl index 5c629aa0a14..d9248084fb6 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.ir.fxc.hlsl index bb1103b8c99..9c6c2f39f6c 100644 --- a/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f16-u32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.fxc.hlsl index f0809ab6517..f8399a95585 100644 --- a/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.ir.fxc.hlsl index 8e09129f0ae..18e2201949f 100644 --- a/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/f32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float t = 0.0f; diff --git a/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.fxc.hlsl index 7affc00ca61..0e6af093a28 100644 --- a/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.ir.fxc.hlsl index 6d144ac834a..71e37881877 100644 --- a/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/i32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static int t = 0; diff --git a/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.fxc.hlsl index 9525c64ce5a..73b851c85d5 100644 --- a/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.ir.fxc.hlsl index 808ae22f63a..592e3de844a 100644 --- a/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/function/u32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static uint t = 0u; diff --git a/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.fxc.hlsl index 1a820f9dc4e..2c80881ab88 100644 --- a/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.ir.fxc.hlsl index 1b5b8014e66..23b343a0b26 100644 --- a/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/bool-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.fxc.hlsl index 1a820f9dc4e..2c80881ab88 100644 --- a/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.ir.fxc.hlsl index 1b5b8014e66..23b343a0b26 100644 --- a/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/f32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.fxc.hlsl index 1a820f9dc4e..2c80881ab88 100644 --- a/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.ir.fxc.hlsl index 1b5b8014e66..23b343a0b26 100644 --- a/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/i32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.fxc.hlsl index 1a820f9dc4e..2c80881ab88 100644 --- a/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.ir.fxc.hlsl index 1b5b8014e66..23b343a0b26 100644 --- a/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/literal/u32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.fxc.hlsl index 5da923ec76c..0360ce12b39 100644 --- a/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.ir.fxc.hlsl index 88e0f64628a..054e2cf97b2 100644 --- a/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/bool-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static bool u = true; diff --git a/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.fxc.hlsl index 650aebb7827..c1528cce4ad 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.ir.fxc.hlsl index 9b3c8f6fd1a..3f8055d9546 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-bool.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.fxc.hlsl index a176c7555d9..6a77819f6bb 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.ir.fxc.hlsl index 6223ed5aada..e28bdabc938 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.fxc.hlsl index 7b31d038ad2..ccab4426ccf 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.ir.fxc.hlsl index 1094d4bca24..3bdf3aa715e 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-i32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.fxc.hlsl index 96cff3a1b4c..08efffea852 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.ir.fxc.hlsl index 59ef375ded2..264b66f3a60 100644 --- a/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f16-u32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t u = float16_t(1.0h); diff --git a/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.fxc.hlsl index 434c1941669..710d28ffc57 100644 --- a/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.ir.fxc.hlsl index bee6afd8a15..40222d7d9f1 100644 --- a/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/f32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float u = 1.0f; diff --git a/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.fxc.hlsl index 58fd9ed7ec3..4fd5bae852a 100644 --- a/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.ir.fxc.hlsl index 3fb5c48dd49..5909c6db204 100644 --- a/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/i32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static int u = 1; diff --git a/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.fxc.hlsl index ed35ee37bd9..5ff2fee3b82 100644 --- a/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.ir.fxc.hlsl index 7bed4728efc..d59fedc68d6 100644 --- a/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/scalar/var/u32-f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static uint u = 1u; diff --git a/test/tint/expressions/type_conv/vec2/function/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/bool-f16.wgsl.expected.fxc.hlsl index dfe78e0ba5b..2b4f03409d9 100644 --- a/test/tint/expressions/type_conv/vec2/function/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.fxc.hlsl index b8d83023072..9fb0a2bf8b0 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.ir.fxc.hlsl index b65c9cfcd31..84c7dae1336 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-bool.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.fxc.hlsl index 86803284cb7..0b594383bb7 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.ir.fxc.hlsl index b728de01c01..93cacaa9cca 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.fxc.hlsl index 4ff8e9ae3ba..c4751c3384e 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.ir.fxc.hlsl index 4999c62ccbc..828b7545096 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-i32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.fxc.hlsl index 1fe8817d937..9412b32e2f8 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.ir.fxc.hlsl index 469f0d27531..e3283bb732d 100644 --- a/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f16-u32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec2/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/f32-f16.wgsl.expected.fxc.hlsl index adc82f42105..f1bd69eaa1c 100644 --- a/test/tint/expressions/type_conv/vec2/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/function/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/i32-f16.wgsl.expected.fxc.hlsl index 81530208309..1cdb0db4833 100644 --- a/test/tint/expressions/type_conv/vec2/function/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/function/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/function/u32-f16.wgsl.expected.fxc.hlsl index a0e4fa0c8c2..3ea973ba0be 100644 --- a/test/tint/expressions/type_conv/vec2/function/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/function/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/literal/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/literal/bool-f16.wgsl.expected.fxc.hlsl index 3a220a41459..3fc4fedc9bc 100644 --- a/test/tint/expressions/type_conv/vec2/literal/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/literal/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/literal/f32-f16.wgsl.expected.fxc.hlsl index 3a220a41459..3fc4fedc9bc 100644 --- a/test/tint/expressions/type_conv/vec2/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/literal/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/literal/i32-f16.wgsl.expected.fxc.hlsl index 3a220a41459..3fc4fedc9bc 100644 --- a/test/tint/expressions/type_conv/vec2/literal/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/literal/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/literal/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/literal/u32-f16.wgsl.expected.fxc.hlsl index 3a220a41459..3fc4fedc9bc 100644 --- a/test/tint/expressions/type_conv/vec2/literal/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/literal/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/bool-f16.wgsl.expected.fxc.hlsl index 9821ef5157f..451d606aa7a 100644 --- a/test/tint/expressions/type_conv/vec2/var/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/f16-bool.wgsl.expected.fxc.hlsl index ddb6fcc3195..3c1cdf55bde 100644 --- a/test/tint/expressions/type_conv/vec2/var/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/f16-f32.wgsl.expected.fxc.hlsl index 68cd6f4351f..fd1909b3a05 100644 --- a/test/tint/expressions/type_conv/vec2/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/f16-i32.wgsl.expected.fxc.hlsl index 05806580514..2d81b9b33cc 100644 --- a/test/tint/expressions/type_conv/vec2/var/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/f16-u32.wgsl.expected.fxc.hlsl index 933142055a2..3aedecab4db 100644 --- a/test/tint/expressions/type_conv/vec2/var/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/f32-f16.wgsl.expected.fxc.hlsl index e51225f279f..7708332205e 100644 --- a/test/tint/expressions/type_conv/vec2/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/i32-f16.wgsl.expected.fxc.hlsl index 4c3604538bc..f77d2496972 100644 --- a/test/tint/expressions/type_conv/vec2/var/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec2/var/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec2/var/u32-f16.wgsl.expected.fxc.hlsl index 673eec90c7b..abaa9edb823 100644 --- a/test/tint/expressions/type_conv/vec2/var/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec2/var/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/bool-f16.wgsl.expected.fxc.hlsl index b18dd8d02ff..622de1a937e 100644 --- a/test/tint/expressions/type_conv/vec3/function/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.fxc.hlsl index ac35987a6b8..0cb57d95580 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.ir.fxc.hlsl index a1ce2603bf0..7415ca79e37 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-bool.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.fxc.hlsl index b82303f9b65..cfb4f99bba2 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.ir.fxc.hlsl index 4ff6bb955a6..6aeb2987a31 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.fxc.hlsl index 0bbc183e6ce..a38021b3deb 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.ir.fxc.hlsl index 0d65c848003..c83efa6fe1d 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-i32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.fxc.hlsl index 32bd9be4838..00d00e0f352 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.ir.fxc.hlsl index 9dcceabe7a0..e3c08f4731e 100644 --- a/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f16-u32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec3/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/f32-f16.wgsl.expected.fxc.hlsl index 0cd6f2db102..78a35ef3a2e 100644 --- a/test/tint/expressions/type_conv/vec3/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/i32-f16.wgsl.expected.fxc.hlsl index c4f55317c76..b3acefe6ea9 100644 --- a/test/tint/expressions/type_conv/vec3/function/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/function/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/function/u32-f16.wgsl.expected.fxc.hlsl index a829faf1def..7137929fe67 100644 --- a/test/tint/expressions/type_conv/vec3/function/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/function/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/literal/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/literal/bool-f16.wgsl.expected.fxc.hlsl index a99d3ae540c..d28a3320603 100644 --- a/test/tint/expressions/type_conv/vec3/literal/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/literal/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/literal/f32-f16.wgsl.expected.fxc.hlsl index a99d3ae540c..d28a3320603 100644 --- a/test/tint/expressions/type_conv/vec3/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/literal/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/literal/i32-f16.wgsl.expected.fxc.hlsl index a99d3ae540c..d28a3320603 100644 --- a/test/tint/expressions/type_conv/vec3/literal/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/literal/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/literal/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/literal/u32-f16.wgsl.expected.fxc.hlsl index a99d3ae540c..d28a3320603 100644 --- a/test/tint/expressions/type_conv/vec3/literal/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/literal/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/bool-f16.wgsl.expected.fxc.hlsl index 7a5e87ca4db..3c36f1dd8e4 100644 --- a/test/tint/expressions/type_conv/vec3/var/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/f16-bool.wgsl.expected.fxc.hlsl index 27f65ef12e8..adb9053b2d9 100644 --- a/test/tint/expressions/type_conv/vec3/var/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/f16-f32.wgsl.expected.fxc.hlsl index bdd54162f05..70e8d39805e 100644 --- a/test/tint/expressions/type_conv/vec3/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/f16-i32.wgsl.expected.fxc.hlsl index 071e623a8f9..95521f945dc 100644 --- a/test/tint/expressions/type_conv/vec3/var/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/f16-u32.wgsl.expected.fxc.hlsl index 6d1aecd4815..e287b203b24 100644 --- a/test/tint/expressions/type_conv/vec3/var/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/f32-f16.wgsl.expected.fxc.hlsl index f0a6cafbcfe..d1eef358236 100644 --- a/test/tint/expressions/type_conv/vec3/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/i32-f16.wgsl.expected.fxc.hlsl index 4cd3718b345..83b6c7a9e22 100644 --- a/test/tint/expressions/type_conv/vec3/var/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec3/var/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec3/var/u32-f16.wgsl.expected.fxc.hlsl index 8eee6a88f04..f03e33ef949 100644 --- a/test/tint/expressions/type_conv/vec3/var/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec3/var/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/bool-f16.wgsl.expected.fxc.hlsl index c18b010e7ab..df6a4c9af2a 100644 --- a/test/tint/expressions/type_conv/vec4/function/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.fxc.hlsl index 2ecdf26e152..e04346a546e 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.ir.fxc.hlsl index 94e3a2d3b3b..d8ef34854d9 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-bool.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.fxc.hlsl index b7500cc53a1..c14c5ae95f5 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.ir.fxc.hlsl index d0c0125a08b..85ec23a0ece 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-f32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.fxc.hlsl index 5f5dae633a9..efa0f6b766b 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.ir.fxc.hlsl index 0eea7aca766..4b12d42bc77 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-i32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.fxc.hlsl index e4d91ebb679..fe981816778 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.ir.fxc.hlsl index 55039df3f2f..a5cc8b4d877 100644 --- a/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f16-u32.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static float16_t t = float16_t(0.0h); diff --git a/test/tint/expressions/type_conv/vec4/function/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/f32-f16.wgsl.expected.fxc.hlsl index a1207b3b3af..0dc26beef24 100644 --- a/test/tint/expressions/type_conv/vec4/function/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/i32-f16.wgsl.expected.fxc.hlsl index e5eef2d0d8c..4e42ee37298 100644 --- a/test/tint/expressions/type_conv/vec4/function/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/function/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/function/u32-f16.wgsl.expected.fxc.hlsl index 9da927d9efc..1eb3fea1323 100644 --- a/test/tint/expressions/type_conv/vec4/function/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/function/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/literal/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/literal/bool-f16.wgsl.expected.fxc.hlsl index f09307673de..d95d9f37a58 100644 --- a/test/tint/expressions/type_conv/vec4/literal/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/literal/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/literal/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/literal/f32-f16.wgsl.expected.fxc.hlsl index f09307673de..d95d9f37a58 100644 --- a/test/tint/expressions/type_conv/vec4/literal/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/literal/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/literal/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/literal/i32-f16.wgsl.expected.fxc.hlsl index f09307673de..d95d9f37a58 100644 --- a/test/tint/expressions/type_conv/vec4/literal/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/literal/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/literal/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/literal/u32-f16.wgsl.expected.fxc.hlsl index f09307673de..d95d9f37a58 100644 --- a/test/tint/expressions/type_conv/vec4/literal/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/literal/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/bool-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/bool-f16.wgsl.expected.fxc.hlsl index c4334041d40..519e357fcdc 100644 --- a/test/tint/expressions/type_conv/vec4/var/bool-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/bool-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/f16-bool.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/f16-bool.wgsl.expected.fxc.hlsl index fad7125e8dd..0cdcfe32fa9 100644 --- a/test/tint/expressions/type_conv/vec4/var/f16-bool.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/f16-bool.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/f16-f32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/f16-f32.wgsl.expected.fxc.hlsl index a7311b96637..19666b98864 100644 --- a/test/tint/expressions/type_conv/vec4/var/f16-f32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/f16-f32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/f16-i32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/f16-i32.wgsl.expected.fxc.hlsl index 8365f618604..7f5c294fce8 100644 --- a/test/tint/expressions/type_conv/vec4/var/f16-i32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/f16-i32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/f16-u32.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/f16-u32.wgsl.expected.fxc.hlsl index 19947b1bc73..e4bfab28a07 100644 --- a/test/tint/expressions/type_conv/vec4/var/f16-u32.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/f16-u32.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/f32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/f32-f16.wgsl.expected.fxc.hlsl index 63ef07163f5..474564c552c 100644 --- a/test/tint/expressions/type_conv/vec4/var/f32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/f32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/i32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/i32-f16.wgsl.expected.fxc.hlsl index d0a81ecb721..d1643f391d3 100644 --- a/test/tint/expressions/type_conv/vec4/var/i32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/i32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_conv/vec4/var/u32-f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_conv/vec4/var/u32-f16.wgsl.expected.fxc.hlsl index 9e83746807d..e2b6f4afecd 100644 --- a/test/tint/expressions/type_conv/vec4/var/u32-f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_conv/vec4/var/u32-f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_ctor/mat2x2/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/explicit/identity/f16.wgsl.expected.fxc.hlsl index 1d4c87e31a5..b28baa9c3c0 100644 --- a/test/tint/expressions/type_ctor/mat2x2/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl index 0101d17d631..bc4cdbee39a 100644 --- a/test/tint/expressions/type_ctor/mat2x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl index 0101d17d631..bc4cdbee39a 100644 --- a/test/tint/expressions/type_ctor/mat2x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x2/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/inferred/identity/f16.wgsl.expected.fxc.hlsl index 1d4c87e31a5..b28baa9c3c0 100644 --- a/test/tint/expressions/type_ctor/mat2x2/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl index 0101d17d631..bc4cdbee39a 100644 --- a/test/tint/expressions/type_ctor/mat2x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl index 0101d17d631..bc4cdbee39a 100644 --- a/test/tint/expressions/type_ctor/mat2x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x2/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/load/f16.wgsl.expected.fxc.hlsl index bfa83668b8f..1a14015e6e8 100644 --- a/test/tint/expressions/type_ctor/mat2x2/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x2/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x2/zero/f16.wgsl.expected.fxc.hlsl index 7ae3dc8e23c..404f3e9135a 100644 --- a/test/tint/expressions/type_ctor/mat2x2/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x2/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xx, (float16_t(0.0h)).xx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/explicit/identity/f16.wgsl.expected.fxc.hlsl index 738c753e180..53dac773f79 100644 --- a/test/tint/expressions/type_ctor/mat2x3/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl index abdf23df00c..79ccf65b66c 100644 --- a/test/tint/expressions/type_ctor/mat2x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl index abdf23df00c..79ccf65b66c 100644 --- a/test/tint/expressions/type_ctor/mat2x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/inferred/identity/f16.wgsl.expected.fxc.hlsl index 738c753e180..53dac773f79 100644 --- a/test/tint/expressions/type_ctor/mat2x3/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl index abdf23df00c..79ccf65b66c 100644 --- a/test/tint/expressions/type_ctor/mat2x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl index abdf23df00c..79ccf65b66c 100644 --- a/test/tint/expressions/type_ctor/mat2x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/load/f16.wgsl.expected.fxc.hlsl index 41af0a30b39..22add3af426 100644 --- a/test/tint/expressions/type_ctor/mat2x3/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x3/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x3/zero/f16.wgsl.expected.fxc.hlsl index 2329f9ec763..61df481b60d 100644 --- a/test/tint/expressions/type_ctor/mat2x3/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x3/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xxx, (float16_t(0.0h)).xxx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/explicit/identity/f16.wgsl.expected.fxc.hlsl index 9d2a14e8fc7..20bf7340fc9 100644 --- a/test/tint/expressions/type_ctor/mat2x4/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl index 74bd86f6f16..811596cd0b4 100644 --- a/test/tint/expressions/type_ctor/mat2x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl index 74bd86f6f16..811596cd0b4 100644 --- a/test/tint/expressions/type_ctor/mat2x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/inferred/identity/f16.wgsl.expected.fxc.hlsl index 9d2a14e8fc7..20bf7340fc9 100644 --- a/test/tint/expressions/type_ctor/mat2x4/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl index 74bd86f6f16..811596cd0b4 100644 --- a/test/tint/expressions/type_ctor/mat2x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl index 74bd86f6f16..811596cd0b4 100644 --- a/test/tint/expressions/type_ctor/mat2x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/load/f16.wgsl.expected.fxc.hlsl index a8e0139e9a6..c704c3a52e7 100644 --- a/test/tint/expressions/type_ctor/mat2x4/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat2x4/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat2x4/zero/f16.wgsl.expected.fxc.hlsl index 042ac58e808..2bed74bd27d 100644 --- a/test/tint/expressions/type_ctor/mat2x4/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat2x4/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xxxx, (float16_t(0.0h)).xxxx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/explicit/identity/f16.wgsl.expected.fxc.hlsl index 26580b437b0..0d8cd65e543 100644 --- a/test/tint/expressions/type_ctor/mat3x2/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl index 757cf849567..728c6c1a0df 100644 --- a/test/tint/expressions/type_ctor/mat3x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl index 757cf849567..728c6c1a0df 100644 --- a/test/tint/expressions/type_ctor/mat3x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/inferred/identity/f16.wgsl.expected.fxc.hlsl index 26580b437b0..0d8cd65e543 100644 --- a/test/tint/expressions/type_ctor/mat3x2/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl index 757cf849567..728c6c1a0df 100644 --- a/test/tint/expressions/type_ctor/mat3x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl index 757cf849567..728c6c1a0df 100644 --- a/test/tint/expressions/type_ctor/mat3x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/load/f16.wgsl.expected.fxc.hlsl index ed4226bbd1f..4d19940761f 100644 --- a/test/tint/expressions/type_ctor/mat3x2/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x2/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x2/zero/f16.wgsl.expected.fxc.hlsl index 4efb2d6fce7..03100c14da8 100644 --- a/test/tint/expressions/type_ctor/mat3x2/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x2/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xx, (float16_t(0.0h)).xx, (float16_t(0.0h)).xx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/explicit/identity/f16.wgsl.expected.fxc.hlsl index 1fc7f79194b..a1bde619b87 100644 --- a/test/tint/expressions/type_ctor/mat3x3/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl index c6356af8ef6..03c6cfaef5d 100644 --- a/test/tint/expressions/type_ctor/mat3x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl index c6356af8ef6..03c6cfaef5d 100644 --- a/test/tint/expressions/type_ctor/mat3x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/inferred/identity/f16.wgsl.expected.fxc.hlsl index 1fc7f79194b..a1bde619b87 100644 --- a/test/tint/expressions/type_ctor/mat3x3/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl index c6356af8ef6..03c6cfaef5d 100644 --- a/test/tint/expressions/type_ctor/mat3x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl index c6356af8ef6..03c6cfaef5d 100644 --- a/test/tint/expressions/type_ctor/mat3x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/load/f16.wgsl.expected.fxc.hlsl index a96cbd4fc1b..03b33adbf03 100644 --- a/test/tint/expressions/type_ctor/mat3x3/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x3/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x3/zero/f16.wgsl.expected.fxc.hlsl index 5bc0d66ad10..588c5b094bb 100644 --- a/test/tint/expressions/type_ctor/mat3x3/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x3/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xxx, (float16_t(0.0h)).xxx, (float16_t(0.0h)).xxx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/explicit/identity/f16.wgsl.expected.fxc.hlsl index 0f6cddd677e..94d461f049d 100644 --- a/test/tint/expressions/type_ctor/mat3x4/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl index 2817e449937..27d1973b2cf 100644 --- a/test/tint/expressions/type_ctor/mat3x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl index 2817e449937..27d1973b2cf 100644 --- a/test/tint/expressions/type_ctor/mat3x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/inferred/identity/f16.wgsl.expected.fxc.hlsl index 0f6cddd677e..94d461f049d 100644 --- a/test/tint/expressions/type_ctor/mat3x4/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl index 2817e449937..27d1973b2cf 100644 --- a/test/tint/expressions/type_ctor/mat3x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl index 2817e449937..27d1973b2cf 100644 --- a/test/tint/expressions/type_ctor/mat3x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/load/f16.wgsl.expected.fxc.hlsl index b3fc3a574b3..568db4c7bfb 100644 --- a/test/tint/expressions/type_ctor/mat3x4/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat3x4/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat3x4/zero/f16.wgsl.expected.fxc.hlsl index d783d8c93dd..45bfdd6f79a 100644 --- a/test/tint/expressions/type_ctor/mat3x4/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat3x4/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xxxx, (float16_t(0.0h)).xxxx, (float16_t(0.0h)).xxxx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/explicit/identity/f16.wgsl.expected.fxc.hlsl index 6a4961d1034..caf8fecf71f 100644 --- a/test/tint/expressions/type_ctor/mat4x2/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl index 5b5979a1360..e915b0c05ee 100644 --- a/test/tint/expressions/type_ctor/mat4x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl index 5b5979a1360..e915b0c05ee 100644 --- a/test/tint/expressions/type_ctor/mat4x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/inferred/identity/f16.wgsl.expected.fxc.hlsl index 6a4961d1034..caf8fecf71f 100644 --- a/test/tint/expressions/type_ctor/mat4x2/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl index 5b5979a1360..e915b0c05ee 100644 --- a/test/tint/expressions/type_ctor/mat4x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl index 5b5979a1360..e915b0c05ee 100644 --- a/test/tint/expressions/type_ctor/mat4x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h)), vector(float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/load/f16.wgsl.expected.fxc.hlsl index c3323f8aed8..86886c8ee9b 100644 --- a/test/tint/expressions/type_ctor/mat4x2/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x2/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x2/zero/f16.wgsl.expected.fxc.hlsl index 06943511dca..5593cdbbada 100644 --- a/test/tint/expressions/type_ctor/mat4x2/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x2/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xx, (float16_t(0.0h)).xx, (float16_t(0.0h)).xx, (float16_t(0.0h)).xx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/explicit/identity/f16.wgsl.expected.fxc.hlsl index e64af070f06..2b4cfce2e3d 100644 --- a/test/tint/expressions/type_ctor/mat4x3/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h)), vector(float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl index dd39ef33ad7..deb8f3ab611 100644 --- a/test/tint/expressions/type_ctor/mat4x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h)), vector(float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl index dd39ef33ad7..deb8f3ab611 100644 --- a/test/tint/expressions/type_ctor/mat4x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h)), vector(float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/inferred/identity/f16.wgsl.expected.fxc.hlsl index e64af070f06..2b4cfce2e3d 100644 --- a/test/tint/expressions/type_ctor/mat4x3/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h)), vector(float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl index dd39ef33ad7..deb8f3ab611 100644 --- a/test/tint/expressions/type_ctor/mat4x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h)), vector(float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl index dd39ef33ad7..deb8f3ab611 100644 --- a/test/tint/expressions/type_ctor/mat4x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h)), vector(float16_t(3.0h), float16_t(4.0h), float16_t(5.0h)), vector(float16_t(6.0h), float16_t(7.0h), float16_t(8.0h)), vector(float16_t(9.0h), float16_t(10.0h), float16_t(11.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/load/f16.wgsl.expected.fxc.hlsl index 0ff52e329c0..2225ac71f92 100644 --- a/test/tint/expressions/type_ctor/mat4x3/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x3/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x3/zero/f16.wgsl.expected.fxc.hlsl index 97b2f4c79e1..53cba59760b 100644 --- a/test/tint/expressions/type_ctor/mat4x3/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x3/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xxx, (float16_t(0.0h)).xxx, (float16_t(0.0h)).xxx, (float16_t(0.0h)).xxx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/explicit/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/explicit/identity/f16.wgsl.expected.fxc.hlsl index 6f1be94d7b7..253fef63f3c 100644 --- a/test/tint/expressions/type_ctor/mat4x4/explicit/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/explicit/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h)), vector(float16_t(12.0h), float16_t(13.0h), float16_t(14.0h), float16_t(15.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl index b5425f8585f..24e93f69d86 100644 --- a/test/tint/expressions/type_ctor/mat4x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/explicit/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h)), vector(float16_t(12.0h), float16_t(13.0h), float16_t(14.0h), float16_t(15.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl index b5425f8585f..24e93f69d86 100644 --- a/test/tint/expressions/type_ctor/mat4x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/explicit/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h)), vector(float16_t(12.0h), float16_t(13.0h), float16_t(14.0h), float16_t(15.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/inferred/identity/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/inferred/identity/f16.wgsl.expected.fxc.hlsl index 6f1be94d7b7..253fef63f3c 100644 --- a/test/tint/expressions/type_ctor/mat4x4/inferred/identity/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/inferred/identity/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h)), vector(float16_t(12.0h), float16_t(13.0h), float16_t(14.0h), float16_t(15.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl index b5425f8585f..24e93f69d86 100644 --- a/test/tint/expressions/type_ctor/mat4x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/inferred/scalars/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h)), vector(float16_t(12.0h), float16_t(13.0h), float16_t(14.0h), float16_t(15.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl index b5425f8585f..24e93f69d86 100644 --- a/test/tint/expressions/type_ctor/mat4x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/inferred/vectors/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix(vector(float16_t(0.0h), float16_t(1.0h), float16_t(2.0h), float16_t(3.0h)), vector(float16_t(4.0h), float16_t(5.0h), float16_t(6.0h), float16_t(7.0h)), vector(float16_t(8.0h), float16_t(9.0h), float16_t(10.0h), float16_t(11.0h)), vector(float16_t(12.0h), float16_t(13.0h), float16_t(14.0h), float16_t(15.0h))); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/load/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/load/f16.wgsl.expected.fxc.hlsl index 5902263edbd..e30fadf277e 100644 --- a/test/tint/expressions/type_ctor/mat4x4/load/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/load/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/mat4x4/zero/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/mat4x4/zero/f16.wgsl.expected.fxc.hlsl index ccd0fae1bf5..c69406431ab 100644 --- a/test/tint/expressions/type_ctor/mat4x4/zero/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/mat4x4/zero/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID static matrix m = matrix((float16_t(0.0h)).xxxx, (float16_t(0.0h)).xxxx, (float16_t(0.0h)).xxxx, (float16_t(0.0h)).xxxx); RWByteAddressBuffer tint_symbol : register(u0); diff --git a/test/tint/expressions/type_ctor/vec2/explicit/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/vec2/explicit/f16.wgsl.expected.fxc.hlsl index 1b3d879c47a..c5b39496cea 100644 --- a/test/tint/expressions/type_ctor/vec2/explicit/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/vec2/explicit/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_ctor/vec2/inferred/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/vec2/inferred/f16.wgsl.expected.fxc.hlsl index 1b3d879c47a..c5b39496cea 100644 --- a/test/tint/expressions/type_ctor/vec2/inferred/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/vec2/inferred/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_ctor/vec3/explicit/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/vec3/explicit/f16.wgsl.expected.fxc.hlsl index 26f0d8e8066..1da7ea912d7 100644 --- a/test/tint/expressions/type_ctor/vec3/explicit/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/vec3/explicit/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_ctor/vec3/inferred/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/vec3/inferred/f16.wgsl.expected.fxc.hlsl index 26f0d8e8066..1da7ea912d7 100644 --- a/test/tint/expressions/type_ctor/vec3/inferred/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/vec3/inferred/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_ctor/vec4/explicit/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/vec4/explicit/f16.wgsl.expected.fxc.hlsl index cb68bb362d3..68f9ab00a51 100644 --- a/test/tint/expressions/type_ctor/vec4/explicit/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/vec4/explicit/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/type_ctor/vec4/inferred/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/type_ctor/vec4/inferred/f16.wgsl.expected.fxc.hlsl index cb68bb362d3..68f9ab00a51 100644 --- a/test/tint/expressions/type_ctor/vec4/inferred/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/type_ctor/vec4/inferred/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/array/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/array/f16.wgsl.expected.fxc.hlsl index 1397b37bfad..f22d594f498 100644 --- a/test/tint/expressions/zero_init/array/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/array/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/array/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/zero_init/array/f16.wgsl.expected.ir.fxc.hlsl index 54a88677ae0..b539f6c9156 100644 --- a/test/tint/expressions/zero_init/array/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/zero_init/array/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID void f() { diff --git a/test/tint/expressions/zero_init/mat2x2/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat2x2/f16.wgsl.expected.fxc.hlsl index ffbbbbb692d..d43a390106f 100644 --- a/test/tint/expressions/zero_init/mat2x2/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat2x2/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat2x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat2x3/f16.wgsl.expected.fxc.hlsl index ef215db84c0..9829dc708f4 100644 --- a/test/tint/expressions/zero_init/mat2x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat2x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat2x4/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat2x4/f16.wgsl.expected.fxc.hlsl index 775e2b089a3..16c609d317d 100644 --- a/test/tint/expressions/zero_init/mat2x4/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat2x4/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat3x2/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat3x2/f16.wgsl.expected.fxc.hlsl index 6e2bb95234d..9e3c453874b 100644 --- a/test/tint/expressions/zero_init/mat3x2/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat3x2/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat3x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat3x3/f16.wgsl.expected.fxc.hlsl index 74f2c19154b..dedb58f7c71 100644 --- a/test/tint/expressions/zero_init/mat3x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat3x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat3x4/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat3x4/f16.wgsl.expected.fxc.hlsl index f79d42f0259..f7f51ab6cc0 100644 --- a/test/tint/expressions/zero_init/mat3x4/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat3x4/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat4x2/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat4x2/f16.wgsl.expected.fxc.hlsl index 8aa2d3db125..67b147cae3e 100644 --- a/test/tint/expressions/zero_init/mat4x2/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat4x2/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat4x3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat4x3/f16.wgsl.expected.fxc.hlsl index ba82e800e97..a350540982f 100644 --- a/test/tint/expressions/zero_init/mat4x3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat4x3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/mat4x4/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/mat4x4/f16.wgsl.expected.fxc.hlsl index 7563a047545..a14312560d2 100644 --- a/test/tint/expressions/zero_init/mat4x4/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/mat4x4/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.fxc.hlsl index c092f5fcfc2..aa9f42b8eac 100644 --- a/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.ir.fxc.hlsl b/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.ir.fxc.hlsl index 90b1ed08ec0..0e05561800f 100644 --- a/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/expressions/zero_init/scalar/f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID void f() { diff --git a/test/tint/expressions/zero_init/vec2/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/vec2/f16.wgsl.expected.fxc.hlsl index ac9aa37084e..2f78cdd12db 100644 --- a/test/tint/expressions/zero_init/vec2/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/vec2/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/vec3/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/vec3/f16.wgsl.expected.fxc.hlsl index 21a155c1a46..ecff9862a24 100644 --- a/test/tint/expressions/zero_init/vec3/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/vec3/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/expressions/zero_init/vec4/f16.wgsl.expected.fxc.hlsl b/test/tint/expressions/zero_init/vec4/f16.wgsl.expected.fxc.hlsl index 942db7f4a95..3e91f563e47 100644 --- a/test/tint/expressions/zero_init/vec4/f16.wgsl.expected.fxc.hlsl +++ b/test/tint/expressions/zero_init/vec4/f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID [numthreads(1, 1, 1)] void unused_entry_point() { diff --git a/test/tint/types/functions/shader_io/compute_subgroup_builtins.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/compute_subgroup_builtins.wgsl.expected.fxc.hlsl index 2adc1346db6..fd48baf21e2 100644 --- a/test/tint/types/functions/shader_io/compute_subgroup_builtins.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/compute_subgroup_builtins.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer output : register(u0); diff --git a/test/tint/types/functions/shader_io/compute_subgroup_builtins_struct.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/compute_subgroup_builtins_struct.wgsl.expected.fxc.hlsl index d945e043c3d..e37064bc317 100644 --- a/test/tint/types/functions/shader_io/compute_subgroup_builtins_struct.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/compute_subgroup_builtins_struct.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID RWByteAddressBuffer output : register(u0); diff --git a/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.fxc.hlsl index 3520dd1fcd1..ca98930c989 100644 --- a/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Outputs { float16_t a; diff --git a/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.ir.fxc.hlsl index 1ef58e8859e..90c0ffede82 100644 --- a/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_f16_io_polyfill.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Outputs { float16_t a; diff --git a/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.fxc.hlsl index 99c5ae93761..e40c2f15fc3 100644 --- a/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct tint_symbol_1 { nointerpolation int loc0 : TEXCOORD0; diff --git a/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.ir.fxc.hlsl index b7dc31134a8..4ccdee2dc15 100644 --- a/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_input_locations_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct main_inputs { nointerpolation int loc0 : TEXCOORD0; diff --git a/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.fxc.hlsl index 0f88a3efefd..e1d05b45976 100644 --- a/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct FragmentInputs { int loc0; diff --git a/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl index d6d7c4c5236..3778ed990bb 100644 --- a/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct FragmentInputs { int loc0; diff --git a/test/tint/types/functions/shader_io/fragment_input_mixed_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_input_mixed_f16.wgsl.expected.fxc.hlsl index 47b6fc56338..cf8e8324103 100644 --- a/test/tint/types/functions/shader_io/fragment_input_mixed_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_input_mixed_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct FragmentInputs0 { float4 position; diff --git a/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.fxc.hlsl index f920bb74a53..f0b69277203 100644 --- a/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct tint_symbol { int value : SV_Target0; diff --git a/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.ir.fxc.hlsl index f1eaa7ad54b..2388bfde6fa 100644 --- a/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_output_locations_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct main0_outputs { int tint_symbol : SV_Target0; diff --git a/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.fxc.hlsl index d4767c3bc38..6e8deec5679 100644 --- a/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct FragmentOutputs { int loc0; diff --git a/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl index 604e6c3f4e4..bf897bb39f1 100644 --- a/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct FragmentOutputs { int loc0; diff --git a/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.fxc.hlsl index 5800416615c..cb76b4f66d7 100644 --- a/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct FragmentOutputs { int loc0; diff --git a/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.ir.fxc.hlsl index d3d48dcdb28..9a87f7cbe1d 100644 --- a/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/fragment_output_mixed_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct FragmentOutputs { int loc0; diff --git a/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.fxc.hlsl index 44b63076ebf..a80ba0438ce 100644 --- a/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Interface { float col1; diff --git a/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.ir.fxc.hlsl index 9dcfbbc7403..61591c473c7 100644 --- a/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/shared_struct_different_stages_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct Interface { float col1; diff --git a/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.fxc.hlsl index 563334e3fb8..20b0254d2c8 100644 --- a/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { float f; diff --git a/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.ir.fxc.hlsl index e93552efe45..29a16e9fb88 100644 --- a/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/shared_struct_storage_buffer_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct S { float f; diff --git a/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.fxc.hlsl index 410dd58a75c..ebe121372e9 100644 --- a/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct tint_symbol_1 { int loc0 : TEXCOORD0; diff --git a/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.ir.fxc.hlsl index accb4d6629a..f4609ae4580 100644 --- a/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/vertex_input_locations_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct main_outputs { float4 tint_symbol : SV_Position; diff --git a/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.fxc.hlsl index 28d3bf7f106..40cf2c3bebb 100644 --- a/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexInputs { int loc0; diff --git a/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl index b465e87b014..491812858cc 100644 --- a/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/vertex_input_locations_struct_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexInputs { int loc0; diff --git a/test/tint/types/functions/shader_io/vertex_input_mixed_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/vertex_input_mixed_f16.wgsl.expected.fxc.hlsl index 5f237576bc0..feab7f2ab34 100644 --- a/test/tint/types/functions/shader_io/vertex_input_mixed_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/vertex_input_mixed_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexInputs0 { uint vertex_index; diff --git a/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.fxc.hlsl b/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.fxc.hlsl index c1ea5694835..af7b18e1b6f 100644 --- a/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.fxc.hlsl +++ b/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutputs { int loc0; diff --git a/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl b/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl index 07347baf515..eb55256df3e 100644 --- a/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl +++ b/test/tint/types/functions/shader_io/vertex_output_locations_struct_f16.wgsl.expected.ir.fxc.hlsl @@ -1,4 +1,4 @@ -SKIP: FAILED +SKIP: INVALID struct VertexOutputs { int loc0;