From dbb19da5c088a2a0f02ca598406eaa685ec64bb8 Mon Sep 17 00:00:00 2001
From: Brad Theilman <bradtheilman@gmail.com>
Date: Wed, 3 Oct 2018 11:26:39 -0700
Subject: [PATCH] Added port:site for intan64 rigs, Also changed variable names
 to be more meaningful

---
 klusta_pipeline/maps.py | 52 ++++++++++++++++++++++++++++++++++-------
 1 file changed, 44 insertions(+), 8 deletions(-)

diff --git a/klusta_pipeline/maps.py b/klusta_pipeline/maps.py
index 6b639c4..cc3089c 100644
--- a/klusta_pipeline/maps.py
+++ b/klusta_pipeline/maps.py
@@ -5,17 +5,18 @@ def apply_adapter(a_port_site, adapter):
     '''
     a_port_site: a dictionary with port: site (mapping channels in a headstage to ports in a recording system)
     adapter: n_site x 2 numpy array
-            col 0: site in headstage end
-            col 1: site in porbe end
+            col 0: probe site
+            col 1: adapter channel
     retunrs: new dictionary with port: mapped_site, where mapped_site is the probe site that connects to that channel instead of site
     '''
-    new_port_site = {port : adapter[adapter[:, 1] == site][0, 0] for port, site in a_port_site.iteritems()}
+    new_port_site = {port : adapter[adapter[:, 1] == site][0, 0] for port, site in a_port_site.items()}
     return new_port_site
 
+# Probe to Headstage adapter maps
 # n_site x 2 numpy array
-# col 0: site in headstage end
-# col 1: site in porbe end
-site_headstage = {
+# col 0: Probe site
+# col 1: Adapter channel
+probe_site_to_adapter_channel = {
     'A32-HST32V': np.transpose(np.array([[11, 9, 7, 5, 3, 2, 6, 8, 10, 12,
                       1, 4, 13, 14, 15, 16, 
                       26, 24, 20, 19, 18, 17, 
@@ -28,6 +29,40 @@ def apply_adapter(a_port_site, adapter):
 
 # dictionary yields port:site
 port_site = {
+    'intan64-32': {     # Using 64 channel intan headstage
+        'Port_16': 16,  # with 32 channel probe
+        'Port_18': 15,
+        'Port_20': 14,
+        'Port_22': 13,
+        'Port_24': 12,
+        'Port_26': 11,
+        'Port_28': 10,
+        'Port_30': 9,
+        'Port_32': 8,
+        'Port_34': 7,
+        'Port_36': 6,
+        'Port_38': 5,
+        'Port_40': 4,
+        'Port_42': 3,
+        'Port_44': 2,
+        'Port_46': 1,
+        'Port_17': 32,
+        'Port_19': 31,
+        'Port_21': 30,
+        'Port_23': 29,
+        'Port_25': 28,
+        'Port_27': 27,
+        'Port_29': 26,
+        'Port_31': 25,
+        'Port_33': 24,
+        'Port_35': 23,
+        'Port_37': 22,
+        'Port_39': 21,
+        'Port_41': 20,
+        'Port_43': 19,
+        'Port_45': 18,
+        'Port_47': 17,
+    },
     'paukstis32': {
         'Port_1': 15,
         'Port_2': 6,
@@ -128,5 +163,6 @@ def apply_adapter(a_port_site, adapter):
 burung32_No_Adapter = {'Port_%d' % (i+1+16) : i+1 for i in range(32)} 
 
 # Buring system with the A32 adapter for neuronexus probes
-port_site['burung32-A32-HST32V'] = apply_adapter(burung32_No_Adapter, site_headstage['A32-HST32V'])
-port_site['burung32'] = port_site['burung32-A32-HST32V']
\ No newline at end of file
+port_site['burung32-A32-HST32V'] = apply_adapter(burung32_No_Adapter, probe_site_to_adapter_channel['A32-HST32V'])
+port_site['burung32'] = port_site['burung32-A32-HST32V']
+port_site['intan64-32-A32-HST32V'] = apply_adapter(port_site['intan64-32'], probe_site_to_adapter_channel['A32-HST32V'])