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Mismatch between branch 2022.1 and its Development Target Platform #9
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I update my xrt and the shell of u280 solved this problem |
@xtfan Can you share your
Run result:
|
Hi,I also encounter this error. I change the size of the buffer in the host.cpp to get rid of this error. |
@xtfan Thanks! May I ask exactly how you changed the size? I tried increasing the buffer size by 2x or more, but this didn't help the situation. |
@lomotos10 When I change the DATA_SIZE to be 6250000, the error is gone. But I don't know the negative impact of this change. |
@xtfan Thank you, now |
@lomotos10 I have no any 100G NIC or switch for experiment so I just connect two U280 directly that run the same iperf_krnl. It seems that each FPGA card can send and receive packages from each other according to the debug ila. But I can't determine whether each of them is working correctly. Actually, I have tried corundum project (opensource) as a 100G NIC. However, the corundum failed to establish link with the 100G cmac in this project. Until now, I still can't run iperf on the server to test the iperf_krnl due to the lack of 100G NIC. |
I'm using U250 with Vitis 2022.2 and I encounter this same error. Is there a way to fix this error. Using U280 give the same error. |
When I contacted the developers by mail I was redirected to the https://github.com/fpgasystems/fpga-network-stack project because that project is being maintained, unlike this one. |
I tried building the project on the new
vitis_2022_1
branch targeting U280, and it resulted in the following error onmake all
:There seems to be a mismatch between the Vitis and DTP versions specified in the README. (Vitis 2022.1, DTP xilinx_u280_xdma_201920_3)
Maybe the README needs an update, or is there a way that I can make the build work?
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