-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathStartup.s
347 lines (329 loc) · 15.8 KB
/
Startup.s
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
; <<< Use Configuration Wizard in Context Menu >>>
;******************************************************************************
;
; Startup.s - Startup code for Stellaris.
;
; Copyright (c) 2011 Texas Instruments Incorporated. All rights reserved.
; Software License Agreement
;
; Texas Instruments (TI) is supplying this software for use solely and
; exclusively on TI's microcontroller products. The software is owned by
; TI and/or its suppliers, and is protected under applicable copyright
; laws. You may not combine this software with "viral" open-source
; software in order to form a larger program.
;
; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
; DAMAGES, FOR ANY REASON WHATSOEVER.
;
; This is part of revision 7860 of the Stellaris Peripheral Driver Library.
;
;******************************************************************************
;******************************************************************************
;
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Stack EQU 0x00002000
;******************************************************************************
;
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Heap EQU 0x00002000
;******************************************************************************
;
; Allocate space for the stack.
;
;******************************************************************************
AREA STACK, NOINIT, READWRITE, ALIGN=3
StackMem
SPACE Stack
__initial_sp
;******************************************************************************
;
; Allocate space for the heap.
;
;******************************************************************************
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
HeapMem
SPACE Heap
__heap_limit
;******************************************************************************
;
; Indicate that the code in this file preserves 8-byte alignment of the stack.
;
;******************************************************************************
PRESERVE8
;******************************************************************************
;
; Place code into the reset code section.
;
;******************************************************************************
AREA RESET, CODE, READONLY
THUMB
EXTERN reg_int_handler
EXTERN UART5Intcsb
EXTERN GPIO_INT_E
EXTERN UART0IntHandler
EXTERN Timer0IntHandler
;******************************************************************************
;
; The vector table.
;
;******************************************************************************
EXPORT __Vectors
__Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NmiSR ; NMI Handler
DCD FaultISR ; Hard Fault Handler
DCD IntDefaultHandler ; MPU Fault Handler
DCD IntDefaultHandler ; Bus Fault Handler
DCD IntDefaultHandler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD IntDefaultHandler ; SVCall handler
DCD IntDefaultHandler ; Debug monitor handler
DCD 0 ; Reserved
DCD IntDefaultHandler ; PendSV Handler
DCD IntDefaultHandler ; SysTick Handler
DCD IntDefaultHandler ; GPIO Port A
DCD IntDefaultHandler ; GPIO Port B
DCD IntDefaultHandler ; GPIO Port C
DCD IntDefaultHandler ; GPIO Port D
DCD GPIO_INT_E ; GPIO Port E
DCD UART0IntHandler ; UART0 Rx and Tx
DCD IntDefaultHandler ; UART1 Rx and Tx
DCD IntDefaultHandler ; SSI0 Rx and Tx
DCD IntDefaultHandler ; I2C0 Master and Slave
DCD IntDefaultHandler ; PWM Fault
DCD IntDefaultHandler ; PWM Generator 0
DCD IntDefaultHandler ; PWM Generator 1
DCD IntDefaultHandler ; PWM Generator 2
DCD IntDefaultHandler ; Quadrature Encoder 0
DCD IntDefaultHandler ; ADC Sequence 0
DCD IntDefaultHandler ; ADC Sequence 1
DCD IntDefaultHandler ; ADC Sequence 2
DCD IntDefaultHandler ; ADC Sequence 3
DCD IntDefaultHandler ; Watchdog timer
DCD Timer0IntHandler ; Timer 0 subtimer A
DCD IntDefaultHandler ; Timer 0 subtimer B
DCD IntDefaultHandler ; Timer 1 subtimer A
DCD IntDefaultHandler ; Timer 1 subtimer B
DCD IntDefaultHandler ; Timer 2 subtimer A
DCD IntDefaultHandler ; Timer 2 subtimer B
DCD IntDefaultHandler ; Analog Comparator 0
DCD IntDefaultHandler ; Analog Comparator 1
DCD IntDefaultHandler ; Analog Comparator 2
DCD IntDefaultHandler ; System Control (PLL, OSC, BO)
DCD IntDefaultHandler ; FLASH Control
DCD reg_int_handler ; GPIO Port F
DCD IntDefaultHandler ; GPIO Port G
DCD IntDefaultHandler ; GPIO Port H
DCD IntDefaultHandler ; UART2 Rx and Tx
DCD IntDefaultHandler ; SSI1 Rx and Tx
DCD IntDefaultHandler ; Timer 3 subtimer A
DCD IntDefaultHandler ; Timer 3 subtimer B
DCD IntDefaultHandler ; I2C1 Master and Slave
DCD IntDefaultHandler ; Quadrature Encoder 1
DCD IntDefaultHandler ; CAN0
DCD IntDefaultHandler ; CAN1
DCD IntDefaultHandler ; CAN2
DCD IntDefaultHandler ; Ethernet
DCD IntDefaultHandler ; Hibernate
DCD IntDefaultHandler ; USB0
DCD IntDefaultHandler ; PWM Generator 3
DCD IntDefaultHandler ; uDMA Software Transfer
DCD IntDefaultHandler ; uDMA Error
DCD IntDefaultHandler ; ADC1 Sequence 0
DCD IntDefaultHandler ; ADC1 Sequence 1
DCD IntDefaultHandler ; ADC1 Sequence 2
DCD IntDefaultHandler ; ADC1 Sequence 3
DCD IntDefaultHandler ; I2S0
DCD IntDefaultHandler ; External Bus Interface 0
DCD IntDefaultHandler ; GPIO Port J
DCD IntDefaultHandler ; GPIO Port K
DCD IntDefaultHandler ; GPIO Port L
DCD IntDefaultHandler ; SSI2 Rx and Tx
DCD IntDefaultHandler ; SSI3 Rx and Tx
DCD IntDefaultHandler ; UART3 Rx and Tx
DCD IntDefaultHandler ; UART4 Rx and Tx
DCD UART5Intcsb ; UART5 Rx and Tx
DCD IntDefaultHandler ; UART6 Rx and Tx
DCD IntDefaultHandler ; UART7 Rx and Tx
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD IntDefaultHandler ; I2C2 Master and Slave
DCD IntDefaultHandler ; I2C3 Master and Slave
DCD IntDefaultHandler ; Timer 4 subtimer A
DCD IntDefaultHandler ; Timer 4 subtimer B
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD IntDefaultHandler ; Timer 5 subtimer A
DCD IntDefaultHandler ; Timer 5 subtimer B
DCD IntDefaultHandler ; Wide Timer 0 subtimer A
DCD IntDefaultHandler ; Wide Timer 0 subtimer B
DCD IntDefaultHandler ; Wide Timer 1 subtimer A
DCD IntDefaultHandler ; Wide Timer 1 subtimer B
DCD IntDefaultHandler ; Wide Timer 2 subtimer A
DCD IntDefaultHandler ; Wide Timer 2 subtimer B
DCD IntDefaultHandler ; Wide Timer 3 subtimer A
DCD IntDefaultHandler ; Wide Timer 3 subtimer B
DCD IntDefaultHandler ; Wide Timer 4 subtimer A
DCD IntDefaultHandler ; Wide Timer 4 subtimer B
DCD IntDefaultHandler ; Wide Timer 5 subtimer A
DCD IntDefaultHandler ; Wide Timer 5 subtimer B
DCD IntDefaultHandler ; FPU
DCD IntDefaultHandler ; PECI 0
DCD IntDefaultHandler ; LPC 0
DCD IntDefaultHandler ; I2C4 Master and Slave
DCD IntDefaultHandler ; I2C5 Master and Slave
DCD IntDefaultHandler ; GPIO Port M
DCD IntDefaultHandler ; GPIO Port N
DCD IntDefaultHandler ; Quadrature Encoder 2
DCD IntDefaultHandler ; Fan 0
DCD 0 ; Reserved
DCD IntDefaultHandler ; GPIO Port P (Summary or P0)
DCD IntDefaultHandler ; GPIO Port P1
DCD IntDefaultHandler ; GPIO Port P2
DCD IntDefaultHandler ; GPIO Port P3
DCD IntDefaultHandler ; GPIO Port P4
DCD IntDefaultHandler ; GPIO Port P5
DCD IntDefaultHandler ; GPIO Port P6
DCD IntDefaultHandler ; GPIO Port P7
DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0)
DCD IntDefaultHandler ; GPIO Port Q1
DCD IntDefaultHandler ; GPIO Port Q2
DCD IntDefaultHandler ; GPIO Port Q3
DCD IntDefaultHandler ; GPIO Port Q4
DCD IntDefaultHandler ; GPIO Port Q5
DCD IntDefaultHandler ; GPIO Port Q6
DCD IntDefaultHandler ; GPIO Port Q7
DCD IntDefaultHandler ; GPIO Port R
DCD IntDefaultHandler ; GPIO Port S
DCD IntDefaultHandler ; PWM 1 Generator 0
DCD IntDefaultHandler ; PWM 1 Generator 1
DCD IntDefaultHandler ; PWM 1 Generator 2
DCD IntDefaultHandler ; PWM 1 Generator 3
DCD IntDefaultHandler ; PWM 1 Fault
;******************************************************************************
;
; This is the code that gets called when the processor first starts execution
; following a reset event.
;
;******************************************************************************
EXPORT Reset_Handler
Reset_Handler
;
; Call the C library enty point that handles startup. This will copy
; the .data section initializers from flash to SRAM and zero fill the
; .bss section.
;
IMPORT __main
IF {CPU} = "Cortex-M4.fp"
LDR R0, =0xE000ED88 ; Enable CP10,CP11
LDR R1,[R0]
ORR R1,R1,#(0xF << 20)
STR R1,[R0]
ENDIF
B __main
;******************************************************************************
;
; This is the code that gets called when the processor receives a NMI. This
; simply enters an infinite loop, preserving the system state for examination
; by a debugger.
;
;******************************************************************************
NmiSR
B NmiSR
;******************************************************************************
;
; This is the code that gets called when the processor receives a fault
; interrupt. This simply enters an infinite loop, preserving the system state
; for examination by a debugger.
;
;******************************************************************************
FaultISR
B FaultISR
;******************************************************************************
;
; This is the code that gets called when the processor receives an unexpected
; interrupt. This simply enters an infinite loop, preserving the system state
; for examination by a debugger.
;
;******************************************************************************
IntDefaultHandler
B IntDefaultHandler
;******************************************************************************
;
; Make sure the end of this section is aligned.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Some code in the normal code section for initializing the heap and stack.
;
;******************************************************************************
AREA |.text|, CODE, READONLY
;******************************************************************************
;
; The function expected of the C library startup code for defining the stack
; and heap memory locations. For the C library version of the startup code,
; provide this function so that the C library initialization code can find out
; the location of the stack and heap.
;
;******************************************************************************
IF :DEF: __MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, =HeapMem
LDR R1, =(StackMem + Stack)
LDR R2, =(HeapMem + Heap)
LDR R3, =StackMem
BX LR
ENDIF
;******************************************************************************
;
; Make sure the end of this section is aligned.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Tell the assembler that we're done.
;
;******************************************************************************
END