From 24efbddc24763045796d65df99819f0092cc017a Mon Sep 17 00:00:00 2001 From: "pre-commit-ci-lite[bot]" <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com> Date: Tue, 24 Sep 2024 15:37:12 +0000 Subject: [PATCH] ci(pre-commit): Apply automatic fixes --- cores/esp32/Esp.cpp | 2 +- cores/esp32/esp32-hal-cpu.c | 2 +- cores/esp32/esp32-hal-i2c-slave.c | 770 +++++++++--------- cores/esp32/esp32-hal-ledc.c | 2 +- cores/esp32/esp32-hal-spi.c | 31 +- cores/esp32/esp32-hal-touch.c | 16 +- cores/esp32/esp32-hal-uart.c | 24 +- .../BLE/examples/BLE5_extended_scan/ci.json | 4 +- .../examples/BLE5_multi_advertising/ci.json | 5 +- .../BLE5_periodic_advertising/ci.json | 5 +- .../BLE/examples/BLE5_periodic_sync/ci.json | 7 +- libraries/BLE/examples/Beacon_Scanner/ci.json | 7 +- libraries/BLE/examples/Client/ci.json | 5 +- libraries/BLE/examples/Notify/ci.json | 5 +- 14 files changed, 444 insertions(+), 441 deletions(-) diff --git a/cores/esp32/Esp.cpp b/cores/esp32/Esp.cpp index 75414f58999..6a6ed11e463 100644 --- a/cores/esp32/Esp.cpp +++ b/cores/esp32/Esp.cpp @@ -366,7 +366,7 @@ FlashMode_t EspClass::getFlashChipMode(void) { } return (FM_DOUT); } -#endif // if !defined(CONFIG_IDF_TARGET_ESP32P4) +#endif // if !defined(CONFIG_IDF_TARGET_ESP32P4) uint32_t EspClass::magicFlashChipSize(uint8_t byte) { /* diff --git a/cores/esp32/esp32-hal-cpu.c b/cores/esp32/esp32-hal-cpu.c index 9f87cf73ae7..f0a30b50afc 100644 --- a/cores/esp32/esp32-hal-cpu.c +++ b/cores/esp32/esp32-hal-cpu.c @@ -268,7 +268,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) { #ifdef CONFIG_IDF_TARGET_ESP32P4 : "17.5M"), #else - : "8M")), + : "8M")), #endif conf.source_freq_mhz, conf.div, conf.freq_mhz, apb ); diff --git a/cores/esp32/esp32-hal-i2c-slave.c b/cores/esp32/esp32-hal-i2c-slave.c index 2f4531b2512..14da815455b 100644 --- a/cores/esp32/esp32-hal-i2c-slave.c +++ b/cores/esp32/esp32-hal-i2c-slave.c @@ -74,7 +74,7 @@ #define I2C_SCL_IDX(p) I2CEXT0_SCL_OUT_IDX #define I2C_SDA_IDX(p) I2CEXT0_SDA_OUT_IDX #endif -#endif // ifdef CONFIG_IDF_TARGET_ESP32P4 +#endif // ifdef CONFIG_IDF_TARGET_ESP32P4 #if CONFIG_IDF_TARGET_ESP32 #define I2C_TXFIFO_WM_INT_ENA I2C_TXFIFO_EMPTY_INT_ENA @@ -368,148 +368,148 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t } else { ret = esp_intr_alloc(ETS_I2C_EXT1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle); #endif -#endif // !defined(CONFIG_IDF_TARGET_ESP32P4) +#endif // !defined(CONFIG_IDF_TARGET_ESP32P4) #ifdef CONFIG_IDF_TARGET_ESP32P4 - if (i2c->num == 0) { - ret = esp_intr_alloc(ETS_I2C0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle); + if (i2c->num == 0) { + ret = esp_intr_alloc(ETS_I2C0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle); #if SOC_I2C_NUM > 1 - } else { - ret = esp_intr_alloc(ETS_I2C1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle); + } else { + ret = esp_intr_alloc(ETS_I2C1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle); #endif -#endif // #ifdef CONFIG_IDF_TARGET_ESP32P4 - } +#endif // #ifdef CONFIG_IDF_TARGET_ESP32P4 + } - if (ret != ESP_OK) { - log_e("install interrupt handler Failed=%d", ret); - goto fail; + if (ret != ESP_OK) { + log_e("install interrupt handler Failed=%d", ret); + goto fail; + } } - } - i2c_ll_txfifo_rst(i2c->dev); - i2c_ll_rxfifo_rst(i2c->dev); - i2c_ll_slave_enable_rx_it(i2c->dev); - i2c_ll_set_stretch(i2c->dev, 0x3FF); - i2c_ll_update(i2c->dev); - if (!perimanSetPinBus(sda, ESP32_BUS_TYPE_I2C_SLAVE_SDA, (void *)(i2c->num + 1), i2c->num, -1) - || !perimanSetPinBus(scl, ESP32_BUS_TYPE_I2C_SLAVE_SCL, (void *)(i2c->num + 1), i2c->num, -1)) { - i2cSlaveDetachBus((void *)(i2c->num + 1)); - ret = ESP_FAIL; - } - I2C_SLAVE_MUTEX_UNLOCK(); - return ret; + i2c_ll_txfifo_rst(i2c->dev); + i2c_ll_rxfifo_rst(i2c->dev); + i2c_ll_slave_enable_rx_it(i2c->dev); + i2c_ll_set_stretch(i2c->dev, 0x3FF); + i2c_ll_update(i2c->dev); + if (!perimanSetPinBus(sda, ESP32_BUS_TYPE_I2C_SLAVE_SDA, (void *)(i2c->num + 1), i2c->num, -1) + || !perimanSetPinBus(scl, ESP32_BUS_TYPE_I2C_SLAVE_SCL, (void *)(i2c->num + 1), i2c->num, -1)) { + i2cSlaveDetachBus((void *)(i2c->num + 1)); + ret = ESP_FAIL; + } + I2C_SLAVE_MUTEX_UNLOCK(); + return ret; fail: - i2c_slave_free_resources(i2c); - I2C_SLAVE_MUTEX_UNLOCK(); - return ret; -} - -esp_err_t i2cSlaveDeinit(uint8_t num) { - if (num >= SOC_HP_I2C_NUM) { - log_e("Invalid port num: %u", num); - return ESP_ERR_INVALID_ARG; + i2c_slave_free_resources(i2c); + I2C_SLAVE_MUTEX_UNLOCK(); + return ret; } - i2c_slave_struct_t *i2c = &_i2c_bus_array[num]; + esp_err_t i2cSlaveDeinit(uint8_t num) { + if (num >= SOC_HP_I2C_NUM) { + log_e("Invalid port num: %u", num); + return ESP_ERR_INVALID_ARG; + } + + i2c_slave_struct_t *i2c = &_i2c_bus_array[num]; #if !CONFIG_DISABLE_HAL_LOCKS - if (!i2c->lock) { - log_e("Lock is not initialized! Did you call i2c_slave_init()?"); - return ESP_ERR_NO_MEM; - } + if (!i2c->lock) { + log_e("Lock is not initialized! Did you call i2c_slave_init()?"); + return ESP_ERR_NO_MEM; + } #endif - I2C_SLAVE_MUTEX_LOCK(); - int scl = i2c->scl; - int sda = i2c->sda; - i2c_slave_free_resources(i2c); - perimanClearPinBus(scl); - perimanClearPinBus(sda); - I2C_SLAVE_MUTEX_UNLOCK(); - return ESP_OK; -} - -size_t i2cSlaveWrite(uint8_t num, const uint8_t *buf, uint32_t len, uint32_t timeout_ms) { - if (num >= SOC_HP_I2C_NUM) { - log_e("Invalid port num: %u", num); - return 0; - } - uint32_t to_queue = 0, to_fifo = 0; - i2c_slave_struct_t *i2c = &_i2c_bus_array[num]; + I2C_SLAVE_MUTEX_LOCK(); + int scl = i2c->scl; + int sda = i2c->sda; + i2c_slave_free_resources(i2c); + perimanClearPinBus(scl); + perimanClearPinBus(sda); + I2C_SLAVE_MUTEX_UNLOCK(); + return ESP_OK; + } + + size_t i2cSlaveWrite(uint8_t num, const uint8_t *buf, uint32_t len, uint32_t timeout_ms) { + if (num >= SOC_HP_I2C_NUM) { + log_e("Invalid port num: %u", num); + return 0; + } + uint32_t to_queue = 0, to_fifo = 0; + i2c_slave_struct_t *i2c = &_i2c_bus_array[num]; #if !CONFIG_DISABLE_HAL_LOCKS - if (!i2c->lock) { - log_e("Lock is not initialized! Did you call i2c_slave_init()?"); - return ESP_ERR_NO_MEM; - } + if (!i2c->lock) { + log_e("Lock is not initialized! Did you call i2c_slave_init()?"); + return ESP_ERR_NO_MEM; + } #endif - if (!i2c->tx_queue) { - return 0; - } - I2C_SLAVE_MUTEX_LOCK(); + if (!i2c->tx_queue) { + return 0; + } + I2C_SLAVE_MUTEX_LOCK(); #if CONFIG_IDF_TARGET_ESP32 - i2c_ll_slave_disable_tx_it(i2c->dev); - uint32_t txfifo_len = 0; - i2c_ll_get_txfifo_len(i2c->dev, &txfifo_len); - if (txfifo_len < SOC_I2C_FIFO_LEN) { - i2c_ll_txfifo_rst(i2c->dev); - } + i2c_ll_slave_disable_tx_it(i2c->dev); + uint32_t txfifo_len = 0; + i2c_ll_get_txfifo_len(i2c->dev, &txfifo_len); + if (txfifo_len < SOC_I2C_FIFO_LEN) { + i2c_ll_txfifo_rst(i2c->dev); + } #endif - i2c_ll_get_txfifo_len(i2c->dev, &to_fifo); - if (to_fifo) { - if (len < to_fifo) { - to_fifo = len; - } - i2c_ll_write_txfifo(i2c->dev, (uint8_t *)buf, to_fifo); - buf += to_fifo; - len -= to_fifo; - //reset tx_queue - xQueueReset(i2c->tx_queue); - //write the rest of the bytes to the queue - if (len) { - to_queue = uxQueueSpacesAvailable(i2c->tx_queue); - if (len < to_queue) { - to_queue = len; + i2c_ll_get_txfifo_len(i2c->dev, &to_fifo); + if (to_fifo) { + if (len < to_fifo) { + to_fifo = len; } - for (size_t i = 0; i < to_queue; i++) { - if (xQueueSend(i2c->tx_queue, &buf[i], timeout_ms / portTICK_PERIOD_MS) != pdTRUE) { - xQueueReset(i2c->tx_queue); - to_queue = 0; - break; + i2c_ll_write_txfifo(i2c->dev, (uint8_t *)buf, to_fifo); + buf += to_fifo; + len -= to_fifo; + //reset tx_queue + xQueueReset(i2c->tx_queue); + //write the rest of the bytes to the queue + if (len) { + to_queue = uxQueueSpacesAvailable(i2c->tx_queue); + if (len < to_queue) { + to_queue = len; + } + for (size_t i = 0; i < to_queue; i++) { + if (xQueueSend(i2c->tx_queue, &buf[i], timeout_ms / portTICK_PERIOD_MS) != pdTRUE) { + xQueueReset(i2c->tx_queue); + to_queue = 0; + break; + } + } + //no need to enable TX_EMPTY if tx_queue is empty + if (to_queue) { + i2c_ll_slave_enable_tx_it(i2c->dev); } - } - //no need to enable TX_EMPTY if tx_queue is empty - if (to_queue) { - i2c_ll_slave_enable_tx_it(i2c->dev); } } + I2C_SLAVE_MUTEX_UNLOCK(); + return to_queue + to_fifo; } - I2C_SLAVE_MUTEX_UNLOCK(); - return to_queue + to_fifo; -} -//===================================================================================================================== -//-------------------------------------- Private Functions ------------------------------------------------------------ -//===================================================================================================================== + //===================================================================================================================== + //-------------------------------------- Private Functions ------------------------------------------------------------ + //===================================================================================================================== -static void i2c_slave_free_resources(i2c_slave_struct_t *i2c) { - i2c_slave_detach_gpio(i2c); - i2c_ll_set_slave_addr(i2c->dev, 0, false); - i2c_ll_disable_intr_mask(i2c->dev, I2C_LL_INTR_MASK); - i2c_ll_clear_intr_mask(i2c->dev, I2C_LL_INTR_MASK); + static void i2c_slave_free_resources(i2c_slave_struct_t * i2c) { + i2c_slave_detach_gpio(i2c); + i2c_ll_set_slave_addr(i2c->dev, 0, false); + i2c_ll_disable_intr_mask(i2c->dev, I2C_LL_INTR_MASK); + i2c_ll_clear_intr_mask(i2c->dev, I2C_LL_INTR_MASK); - if (i2c->intr_handle) { - esp_intr_free(i2c->intr_handle); - i2c->intr_handle = NULL; - } + if (i2c->intr_handle) { + esp_intr_free(i2c->intr_handle); + i2c->intr_handle = NULL; + } - if (i2c->task_handle) { - vTaskDelete(i2c->task_handle); - i2c->task_handle = NULL; - } + if (i2c->task_handle) { + vTaskDelete(i2c->task_handle); + i2c->task_handle = NULL; + } #if I2C_SLAVE_USE_RX_QUEUE - if (i2c->rx_queue) { - vQueueDelete(i2c->rx_queue); - i2c->rx_queue = NULL; - } + if (i2c->rx_queue) { + vQueueDelete(i2c->rx_queue); + i2c->rx_queue = NULL; + } #else if (i2c->rx_ring_buf) { vRingbufferDelete(i2c->rx_ring_buf); @@ -517,202 +517,202 @@ static void i2c_slave_free_resources(i2c_slave_struct_t *i2c) { } #endif - if (i2c->tx_queue) { - vQueueDelete(i2c->tx_queue); - i2c->tx_queue = NULL; - } - - if (i2c->event_queue) { - vQueueDelete(i2c->event_queue); - i2c->event_queue = NULL; - } + if (i2c->tx_queue) { + vQueueDelete(i2c->tx_queue); + i2c->tx_queue = NULL; + } - i2c->rx_data_count = 0; -} + if (i2c->event_queue) { + vQueueDelete(i2c->event_queue); + i2c->event_queue = NULL; + } -static bool i2c_slave_set_frequency(i2c_slave_struct_t *i2c, uint32_t clk_speed) { - if (i2c == NULL) { - log_e("no control buffer"); - return false; - } - if (clk_speed > 1100000UL) { - clk_speed = 1100000UL; + i2c->rx_data_count = 0; } - // Adjust Fifo thresholds based on frequency - uint32_t a = (clk_speed / 50000L) + 2; - log_d("Fifo thresholds: rx_fifo_full = %d, tx_fifo_empty = %d", SOC_I2C_FIFO_LEN - a, a); + static bool i2c_slave_set_frequency(i2c_slave_struct_t * i2c, uint32_t clk_speed) { + if (i2c == NULL) { + log_e("no control buffer"); + return false; + } + if (clk_speed > 1100000UL) { + clk_speed = 1100000UL; + } + + // Adjust Fifo thresholds based on frequency + uint32_t a = (clk_speed / 50000L) + 2; + log_d("Fifo thresholds: rx_fifo_full = %d, tx_fifo_empty = %d", SOC_I2C_FIFO_LEN - a, a); - i2c_hal_clk_config_t clk_cal; + i2c_hal_clk_config_t clk_cal; #if SOC_I2C_SUPPORT_APB - i2c_ll_master_cal_bus_clk(APB_CLK_FREQ, clk_speed, &clk_cal); - I2C_CLOCK_SRC_ATOMIC() { - i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_APB); /*!< I2C source clock from APB, 80M*/ - } + i2c_ll_master_cal_bus_clk(APB_CLK_FREQ, clk_speed, &clk_cal); + I2C_CLOCK_SRC_ATOMIC() { + i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_APB); /*!< I2C source clock from APB, 80M*/ + } #elif SOC_I2C_SUPPORT_XTAL i2c_ll_master_cal_bus_clk(XTAL_CLK_FREQ, clk_speed, &clk_cal); I2C_CLOCK_SRC_ATOMIC() { i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_XTAL); /*!< I2C source clock from XTAL, 40M */ } #endif - i2c_ll_set_txfifo_empty_thr(i2c->dev, a); - i2c_ll_set_rxfifo_full_thr(i2c->dev, SOC_I2C_FIFO_LEN - a); - i2c_ll_master_set_bus_timing(i2c->dev, &clk_cal); - i2c_ll_master_set_filter(i2c->dev, 3); - return true; -} + i2c_ll_set_txfifo_empty_thr(i2c->dev, a); + i2c_ll_set_rxfifo_full_thr(i2c->dev, SOC_I2C_FIFO_LEN - a); + i2c_ll_master_set_bus_timing(i2c->dev, &clk_cal); + i2c_ll_master_set_filter(i2c->dev, 3); + return true; + } -static void i2c_slave_delay_us(uint64_t us) { - uint64_t m = esp_timer_get_time(); - if (us) { - uint64_t e = (m + us); - if (m > e) { //overflow - while ((uint64_t)esp_timer_get_time() > e); + static void i2c_slave_delay_us(uint64_t us) { + uint64_t m = esp_timer_get_time(); + if (us) { + uint64_t e = (m + us); + if (m > e) { //overflow + while ((uint64_t)esp_timer_get_time() > e); + } + while ((uint64_t)esp_timer_get_time() < e); } - while ((uint64_t)esp_timer_get_time() < e); } -} -static void i2c_slave_gpio_mode(int8_t pin, gpio_mode_t mode) { - gpio_config_t conf = { - .pin_bit_mask = 1LL << pin, .mode = mode, .pull_up_en = GPIO_PULLUP_ENABLE, .pull_down_en = GPIO_PULLDOWN_DISABLE, .intr_type = GPIO_INTR_DISABLE - }; - gpio_config(&conf); -} + static void i2c_slave_gpio_mode(int8_t pin, gpio_mode_t mode) { + gpio_config_t conf = { + .pin_bit_mask = 1LL << pin, .mode = mode, .pull_up_en = GPIO_PULLUP_ENABLE, .pull_down_en = GPIO_PULLDOWN_DISABLE, .intr_type = GPIO_INTR_DISABLE + }; + gpio_config(&conf); + } -static bool i2c_slave_check_line_state(int8_t sda, int8_t scl) { - if (sda < 0 || scl < 0) { - return false; //return false since there is nothing to do - } - // if the bus is not 'clear' try the cycling SCL until SDA goes High or 9 cycles - gpio_set_level(sda, 1); - gpio_set_level(scl, 1); - i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD); - i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD); - gpio_set_level(scl, 1); - - if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state - log_w("invalid state sda(%d)=%d, scl(%d)=%d", sda, gpio_get_level(sda), scl, gpio_get_level(scl)); - for (uint8_t a = 0; a < 9; a++) { - i2c_slave_delay_us(5); - if (gpio_get_level(sda) && gpio_get_level(scl)) { // bus recovered - log_w("Recovered after %d Cycles", a); - gpio_set_level(sda, 0); // start + static bool i2c_slave_check_line_state(int8_t sda, int8_t scl) { + if (sda < 0 || scl < 0) { + return false; //return false since there is nothing to do + } + // if the bus is not 'clear' try the cycling SCL until SDA goes High or 9 cycles + gpio_set_level(sda, 1); + gpio_set_level(scl, 1); + i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD); + i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT | GPIO_MODE_DEF_OD); + gpio_set_level(scl, 1); + + if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state + log_w("invalid state sda(%d)=%d, scl(%d)=%d", sda, gpio_get_level(sda), scl, gpio_get_level(scl)); + for (uint8_t a = 0; a < 9; a++) { i2c_slave_delay_us(5); - for (uint8_t a = 0; a < 9; a++) { - gpio_set_level(scl, 1); + if (gpio_get_level(sda) && gpio_get_level(scl)) { // bus recovered + log_w("Recovered after %d Cycles", a); + gpio_set_level(sda, 0); // start i2c_slave_delay_us(5); - gpio_set_level(scl, 0); + for (uint8_t a = 0; a < 9; a++) { + gpio_set_level(scl, 1); + i2c_slave_delay_us(5); + gpio_set_level(scl, 0); + i2c_slave_delay_us(5); + } + gpio_set_level(scl, 1); i2c_slave_delay_us(5); + gpio_set_level(sda, 1); // stop + break; } - gpio_set_level(scl, 1); + gpio_set_level(scl, 0); i2c_slave_delay_us(5); - gpio_set_level(sda, 1); // stop - break; + gpio_set_level(scl, 1); } - gpio_set_level(scl, 0); - i2c_slave_delay_us(5); - gpio_set_level(scl, 1); } - } - if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state - log_e("Bus Invalid State, Can't init sda=%d, scl=%d", gpio_get_level(sda), gpio_get_level(scl)); - return false; // bus is busy - } - return true; -} - -static bool i2c_slave_attach_gpio(i2c_slave_struct_t *i2c, int8_t sda, int8_t scl) { - if (i2c == NULL) { - log_e("no control block"); - return false; + if (!gpio_get_level(sda) || !gpio_get_level(scl)) { // bus in busy state + log_e("Bus Invalid State, Can't init sda=%d, scl=%d", gpio_get_level(sda), gpio_get_level(scl)); + return false; // bus is busy + } + return true; } - if ((sda < 0) || (scl < 0)) { - log_e("bad pins sda=%d, scl=%d", sda, scl); - return false; - } + static bool i2c_slave_attach_gpio(i2c_slave_struct_t * i2c, int8_t sda, int8_t scl) { + if (i2c == NULL) { + log_e("no control block"); + return false; + } - i2c->scl = scl; - gpio_set_level(scl, 1); - i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT_OUTPUT_OD); - gpio_matrix_out(scl, I2C_SCL_IDX(i2c->num), false, false); - gpio_matrix_in(scl, I2C_SCL_IDX(i2c->num), false); + if ((sda < 0) || (scl < 0)) { + log_e("bad pins sda=%d, scl=%d", sda, scl); + return false; + } - i2c->sda = sda; - gpio_set_level(sda, 1); - i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT_OUTPUT_OD); - gpio_matrix_out(sda, I2C_SDA_IDX(i2c->num), false, false); - gpio_matrix_in(sda, I2C_SDA_IDX(i2c->num), false); + i2c->scl = scl; + gpio_set_level(scl, 1); + i2c_slave_gpio_mode(scl, GPIO_MODE_INPUT_OUTPUT_OD); + gpio_matrix_out(scl, I2C_SCL_IDX(i2c->num), false, false); + gpio_matrix_in(scl, I2C_SCL_IDX(i2c->num), false); - return true; -} + i2c->sda = sda; + gpio_set_level(sda, 1); + i2c_slave_gpio_mode(sda, GPIO_MODE_INPUT_OUTPUT_OD); + gpio_matrix_out(sda, I2C_SDA_IDX(i2c->num), false, false); + gpio_matrix_in(sda, I2C_SDA_IDX(i2c->num), false); -static bool i2c_slave_detach_gpio(i2c_slave_struct_t *i2c) { - if (i2c == NULL) { - log_e("no control Block"); - return false; - } - if (i2c->scl >= 0) { - gpio_matrix_out(i2c->scl, 0x100, false, false); - gpio_matrix_in(0x30, I2C_SCL_IDX(i2c->num), false); - i2c_slave_gpio_mode(i2c->scl, GPIO_MODE_INPUT); - i2c->scl = -1; // un attached - } - if (i2c->sda >= 0) { - gpio_matrix_out(i2c->sda, 0x100, false, false); - gpio_matrix_in(0x30, I2C_SDA_IDX(i2c->num), false); - i2c_slave_gpio_mode(i2c->sda, GPIO_MODE_INPUT); - i2c->sda = -1; // un attached + return true; } - return true; -} -static bool i2c_slave_send_event(i2c_slave_struct_t *i2c, i2c_slave_queue_event_t *event) { - bool pxHigherPriorityTaskWoken = false; - if (i2c->event_queue) { - if (xQueueSendFromISR(i2c->event_queue, event, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) { - //log_e("event_queue_full"); + static bool i2c_slave_detach_gpio(i2c_slave_struct_t * i2c) { + if (i2c == NULL) { + log_e("no control Block"); + return false; } + if (i2c->scl >= 0) { + gpio_matrix_out(i2c->scl, 0x100, false, false); + gpio_matrix_in(0x30, I2C_SCL_IDX(i2c->num), false); + i2c_slave_gpio_mode(i2c->scl, GPIO_MODE_INPUT); + i2c->scl = -1; // un attached + } + if (i2c->sda >= 0) { + gpio_matrix_out(i2c->sda, 0x100, false, false); + gpio_matrix_in(0x30, I2C_SDA_IDX(i2c->num), false); + i2c_slave_gpio_mode(i2c->sda, GPIO_MODE_INPUT); + i2c->sda = -1; // un attached + } + return true; } - return pxHigherPriorityTaskWoken; -} -static bool i2c_slave_handle_tx_fifo_empty(i2c_slave_struct_t *i2c) { - bool pxHigherPriorityTaskWoken = false; - uint32_t d = 0, moveCnt = 0; - i2c_ll_get_txfifo_len(i2c->dev, &moveCnt); - while (moveCnt > 0) { // read tx queue until Fifo is full or queue is empty - if (xQueueReceiveFromISR(i2c->tx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) == pdTRUE) { - i2c_ll_write_txfifo(i2c->dev, (uint8_t *)&d, 1); - moveCnt--; - } else { - i2c_ll_slave_disable_tx_it(i2c->dev); - break; + static bool i2c_slave_send_event(i2c_slave_struct_t * i2c, i2c_slave_queue_event_t * event) { + bool pxHigherPriorityTaskWoken = false; + if (i2c->event_queue) { + if (xQueueSendFromISR(i2c->event_queue, event, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) { + //log_e("event_queue_full"); + } } + return pxHigherPriorityTaskWoken; + } + + static bool i2c_slave_handle_tx_fifo_empty(i2c_slave_struct_t * i2c) { + bool pxHigherPriorityTaskWoken = false; + uint32_t d = 0, moveCnt = 0; + i2c_ll_get_txfifo_len(i2c->dev, &moveCnt); + while (moveCnt > 0) { // read tx queue until Fifo is full or queue is empty + if (xQueueReceiveFromISR(i2c->tx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) == pdTRUE) { + i2c_ll_write_txfifo(i2c->dev, (uint8_t *)&d, 1); + moveCnt--; + } else { + i2c_ll_slave_disable_tx_it(i2c->dev); + break; + } + } + return pxHigherPriorityTaskWoken; } - return pxHigherPriorityTaskWoken; -} -static bool i2c_slave_handle_rx_fifo_full(i2c_slave_struct_t *i2c, uint32_t len) { + static bool i2c_slave_handle_rx_fifo_full(i2c_slave_struct_t * i2c, uint32_t len) { #if I2C_SLAVE_USE_RX_QUEUE - uint32_t d = 0; + uint32_t d = 0; #else uint8_t data[SOC_I2C_FIFO_LEN]; #endif - bool pxHigherPriorityTaskWoken = false; + bool pxHigherPriorityTaskWoken = false; #if I2C_SLAVE_USE_RX_QUEUE - while (len > 0) { - i2c_ll_read_rxfifo(i2c->dev, (uint8_t *)&d, 1); - if (xQueueSendFromISR(i2c->rx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) { - log_e("rx_queue_full"); - } else { - i2c->rx_data_count++; - } - if (--len == 0) { - len = i2c_ll_get_rxfifo_cnt(i2c->dev); - } + while (len > 0) { + i2c_ll_read_rxfifo(i2c->dev, (uint8_t *)&d, 1); + if (xQueueSendFromISR(i2c->rx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) != pdTRUE) { + log_e("rx_queue_full"); + } else { + i2c->rx_data_count++; + } + if (--len == 0) { + len = i2c_ll_get_rxfifo_cnt(i2c->dev); + } #else if (len) { i2c_ll_read_rxfifo(i2c->dev, data, len); @@ -722,109 +722,109 @@ static bool i2c_slave_handle_rx_fifo_full(i2c_slave_struct_t *i2c, uint32_t len) i2c->rx_data_count += len; } #endif + } + return pxHigherPriorityTaskWoken; } - return pxHigherPriorityTaskWoken; -} -static void i2c_slave_isr_handler(void *arg) { - bool pxHigherPriorityTaskWoken = false; - i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)arg; // recover data + static void i2c_slave_isr_handler(void *arg) { + bool pxHigherPriorityTaskWoken = false; + i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)arg; // recover data - uint32_t activeInt = 0; - i2c_ll_get_intr_mask(i2c->dev, &activeInt); - i2c_ll_clear_intr_mask(i2c->dev, activeInt); - uint32_t rx_fifo_len = 0; - i2c_ll_get_rxfifo_cnt(i2c->dev, &rx_fifo_len); - bool slave_rw = i2c_ll_slave_rw(i2c->dev); + uint32_t activeInt = 0; + i2c_ll_get_intr_mask(i2c->dev, &activeInt); + i2c_ll_clear_intr_mask(i2c->dev, activeInt); + uint32_t rx_fifo_len = 0; + i2c_ll_get_rxfifo_cnt(i2c->dev, &rx_fifo_len); + bool slave_rw = i2c_ll_slave_rw(i2c->dev); - if (activeInt & I2C_RXFIFO_WM_INT_ENA) { // RX FiFo Full - pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); - i2c_ll_slave_enable_rx_it(i2c->dev); //is this necessary? - } - - if (activeInt & I2C_TRANS_COMPLETE_INT_ENA) { // STOP - if (rx_fifo_len) { //READ RX FIFO + if (activeInt & I2C_RXFIFO_WM_INT_ENA) { // RX FiFo Full pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); + i2c_ll_slave_enable_rx_it(i2c->dev); //is this necessary? } - if (i2c->rx_data_count) { //WRITE or RepeatedStart - //SEND RX Event - i2c_slave_queue_event_t event; - event.event = I2C_SLAVE_EVT_RX; - event.stop = !slave_rw; - event.param = i2c->rx_data_count; - pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event); - //Zero RX count - i2c->rx_data_count = 0; - } - if (slave_rw) { // READ -#if CONFIG_IDF_TARGET_ESP32 - if (i2c->dev->status_reg.scl_main_state_last == 6) { - //SEND TX Event + + if (activeInt & I2C_TRANS_COMPLETE_INT_ENA) { // STOP + if (rx_fifo_len) { //READ RX FIFO + pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); + } + if (i2c->rx_data_count) { //WRITE or RepeatedStart + //SEND RX Event i2c_slave_queue_event_t event; - event.event = I2C_SLAVE_EVT_TX; + event.event = I2C_SLAVE_EVT_RX; + event.stop = !slave_rw; + event.param = i2c->rx_data_count; pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event); + //Zero RX count + i2c->rx_data_count = 0; } + if (slave_rw) { // READ +#if CONFIG_IDF_TARGET_ESP32 + if (i2c->dev->status_reg.scl_main_state_last == 6) { + //SEND TX Event + i2c_slave_queue_event_t event; + event.event = I2C_SLAVE_EVT_TX; + pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event); + } #else //reset TX data i2c_ll_txfifo_rst(i2c->dev); uint8_t d; while (xQueueReceiveFromISR(i2c->tx_queue, &d, (BaseType_t *const)&pxHigherPriorityTaskWoken) == pdTRUE); //flush partial write #endif + } } - } #ifndef CONFIG_IDF_TARGET_ESP32 - if (activeInt & I2C_SLAVE_STRETCH_INT_ENA) { // STRETCH - i2c_stretch_cause_t cause = i2c_ll_stretch_cause(i2c->dev); - if (cause == I2C_STRETCH_CAUSE_MASTER_READ) { - //on C3 RX data disappears with repeated start, so we need to get it here - if (rx_fifo_len) { + if (activeInt & I2C_SLAVE_STRETCH_INT_ENA) { // STRETCH + i2c_stretch_cause_t cause = i2c_ll_stretch_cause(i2c->dev); + if (cause == I2C_STRETCH_CAUSE_MASTER_READ) { + //on C3 RX data disappears with repeated start, so we need to get it here + if (rx_fifo_len) { + pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); + } + //SEND TX Event + i2c_slave_queue_event_t event; + event.event = I2C_SLAVE_EVT_TX; + pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event); + //will clear after execution + } else if (cause == I2C_STRETCH_CAUSE_TX_FIFO_EMPTY) { + pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c); + i2c_ll_stretch_clr(i2c->dev); + } else if (cause == I2C_STRETCH_CAUSE_RX_FIFO_FULL) { pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); + i2c_ll_stretch_clr(i2c->dev); } - //SEND TX Event - i2c_slave_queue_event_t event; - event.event = I2C_SLAVE_EVT_TX; - pxHigherPriorityTaskWoken |= i2c_slave_send_event(i2c, &event); - //will clear after execution - } else if (cause == I2C_STRETCH_CAUSE_TX_FIFO_EMPTY) { - pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c); - i2c_ll_stretch_clr(i2c->dev); - } else if (cause == I2C_STRETCH_CAUSE_RX_FIFO_FULL) { - pxHigherPriorityTaskWoken |= i2c_slave_handle_rx_fifo_full(i2c, rx_fifo_len); - i2c_ll_stretch_clr(i2c->dev); } - } #endif - if (activeInt & I2C_TXFIFO_WM_INT_ENA) { // TX FiFo Empty - pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c); - } + if (activeInt & I2C_TXFIFO_WM_INT_ENA) { // TX FiFo Empty + pxHigherPriorityTaskWoken |= i2c_slave_handle_tx_fifo_empty(i2c); + } - if (pxHigherPriorityTaskWoken) { - portYIELD_FROM_ISR(); + if (pxHigherPriorityTaskWoken) { + portYIELD_FROM_ISR(); + } } -} -static size_t i2c_slave_read_rx(i2c_slave_struct_t *i2c, uint8_t *data, size_t len) { - if (!len) { - return 0; - } -#if I2C_SLAVE_USE_RX_QUEUE - uint8_t d = 0; - BaseType_t res = pdTRUE; - for (size_t i = 0; i < len; i++) { - if (data) { - res = xQueueReceive(i2c->rx_queue, &data[i], 0); - } else { - res = xQueueReceive(i2c->rx_queue, &d, 0); + static size_t i2c_slave_read_rx(i2c_slave_struct_t * i2c, uint8_t * data, size_t len) { + if (!len) { + return 0; } - if (res != pdTRUE) { - log_e("Read Queue(%u) Failed", i); - len = i; - break; +#if I2C_SLAVE_USE_RX_QUEUE + uint8_t d = 0; + BaseType_t res = pdTRUE; + for (size_t i = 0; i < len; i++) { + if (data) { + res = xQueueReceive(i2c->rx_queue, &data[i], 0); + } else { + res = xQueueReceive(i2c->rx_queue, &d, 0); + } + if (res != pdTRUE) { + log_e("Read Queue(%u) Failed", i); + len = i; + break; + } } - } - return (data) ? len : 0; + return (data) ? len : 0; #else size_t dlen = 0, to_read = len, so_far = 0, available = 0; uint8_t *rx_data = NULL; @@ -851,55 +851,55 @@ static size_t i2c_slave_read_rx(i2c_slave_struct_t *i2c, uint8_t *data, size_t l } return (data) ? so_far : 0; #endif -} - -static void i2c_slave_task(void *pv_args) { - i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)pv_args; - i2c_slave_queue_event_t event; - size_t len = 0; - bool stop = false; - uint8_t *data = NULL; - for (;;) { - if (xQueueReceive(i2c->event_queue, &event, portMAX_DELAY) == pdTRUE) { - // Write - if (event.event == I2C_SLAVE_EVT_RX) { - len = event.param; - stop = event.stop; - data = (len > 0) ? (uint8_t *)malloc(len) : NULL; - - if (len && data == NULL) { - log_e("Malloc (%u) Failed", len); - } - len = i2c_slave_read_rx(i2c, data, len); - if (i2c->receive_callback) { - i2c->receive_callback(i2c->num, data, len, stop, i2c->arg); - } - free(data); + } - // Read - } else if (event.event == I2C_SLAVE_EVT_TX) { - if (i2c->request_callback) { - i2c->request_callback(i2c->num, i2c->arg); + static void i2c_slave_task(void *pv_args) { + i2c_slave_struct_t *i2c = (i2c_slave_struct_t *)pv_args; + i2c_slave_queue_event_t event; + size_t len = 0; + bool stop = false; + uint8_t *data = NULL; + for (;;) { + if (xQueueReceive(i2c->event_queue, &event, portMAX_DELAY) == pdTRUE) { + // Write + if (event.event == I2C_SLAVE_EVT_RX) { + len = event.param; + stop = event.stop; + data = (len > 0) ? (uint8_t *)malloc(len) : NULL; + + if (len && data == NULL) { + log_e("Malloc (%u) Failed", len); + } + len = i2c_slave_read_rx(i2c, data, len); + if (i2c->receive_callback) { + i2c->receive_callback(i2c->num, data, len, stop, i2c->arg); + } + free(data); + + // Read + } else if (event.event == I2C_SLAVE_EVT_TX) { + if (i2c->request_callback) { + i2c->request_callback(i2c->num, i2c->arg); + } + i2c_ll_stretch_clr(i2c->dev); } - i2c_ll_stretch_clr(i2c->dev); } } + vTaskDelete(NULL); } - vTaskDelete(NULL); -} -static bool i2cSlaveDetachBus(void *bus_i2c_num) { - uint8_t num = (int)bus_i2c_num - 1; - i2c_slave_struct_t *i2c = &_i2c_bus_array[num]; - if (i2c->scl == -1 && i2c->sda == -1) { + static bool i2cSlaveDetachBus(void *bus_i2c_num) { + uint8_t num = (int)bus_i2c_num - 1; + i2c_slave_struct_t *i2c = &_i2c_bus_array[num]; + if (i2c->scl == -1 && i2c->sda == -1) { + return true; + } + esp_err_t err = i2cSlaveDeinit(num); + if (err != ESP_OK) { + log_e("i2cSlaveDeinit failed with error: %d", err); + return false; + } return true; } - esp_err_t err = i2cSlaveDeinit(num); - if (err != ESP_OK) { - log_e("i2cSlaveDeinit failed with error: %d", err); - return false; - } - return true; -} #endif /* SOC_I2C_SUPPORT_SLAVE */ diff --git a/cores/esp32/esp32-hal-ledc.c b/cores/esp32/esp32-hal-ledc.c index 4ec35e2f8a5..0a3ec5a60c7 100644 --- a/cores/esp32/esp32-hal-ledc.c +++ b/cores/esp32/esp32-hal-ledc.c @@ -332,7 +332,7 @@ bool ledcOutputInvert(uint8_t pin, bool out_invert) { #else esp_rom_gpio_connect_out_signal(pin, LEDC_LS_SIG_OUT0_IDX + ((bus->channel) % 8), out_invert, 0); #endif -#endif // ifdef CONFIG_IDF_TARGET_ESP32P4 +#endif // ifdef CONFIG_IDF_TARGET_ESP32P4 return true; } return false; diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c index aa4ef3b3c25..8c8ce0b7705 100644 --- a/cores/esp32/esp32-hal-spi.c +++ b/cores/esp32/esp32-hal-spi.c @@ -103,26 +103,21 @@ struct spi_struct_t { #elif CONFIG_IDF_TARGET_ESP32P4 // ESP32P4 -#define SPI_COUNT (2) // SPI2 and SPI3. SPI0 and SPI1 are reserved for flash and PSRAM +#define SPI_COUNT (2) // SPI2 and SPI3. SPI0 and SPI1 are reserved for flash and PSRAM #define SPI_CLK_IDX(p) ((p == 0) ? SPI2_CK_PAD_OUT_IDX : ((p == 1) ? SPI3_CK_PAD_OUT_IDX : 0)) #define SPI_MISO_IDX(p) ((p == 0) ? SPI2_Q_PAD_OUT_IDX : ((p == 1) ? SPI3_QO_PAD_OUT_IDX : 0)) #define SPI_MOSI_IDX(p) ((p == 0) ? SPI2_D_PAD_IN_IDX : ((p == 1) ? SPI3_D_PAD_IN_IDX : 0)) -#define SPI_HSPI_SS_IDX(n) ((n == 0) ? SPI3_CS_PAD_OUT_IDX : \ - ((n == 1) ? SPI3_CS1_PAD_OUT_IDX : \ - ((n == 2) ? SPI3_CS2_PAD_OUT_IDX : \ - 0))) +#define SPI_HSPI_SS_IDX(n) ((n == 0) ? SPI3_CS_PAD_OUT_IDX : ((n == 1) ? SPI3_CS1_PAD_OUT_IDX : ((n == 2) ? SPI3_CS2_PAD_OUT_IDX : 0))) -#define SPI_FSPI_SS_IDX(n) ((n == 0) ? SPI2_CS_PAD_OUT_IDX : \ - ((n == 1) ? SPI2_CS1_PAD_OUT_IDX : \ - ((n == 2) ? SPI2_CS2_PAD_OUT_IDX : \ - ((n == 3) ? SPI2_CS3_PAD_OUT_IDX : \ - ((n == 4) ? SPI2_CS4_PAD_OUT_IDX : \ - ((n == 5) ? SPI2_CS5_PAD_OUT_IDX : \ - 0)))))) +#define SPI_FSPI_SS_IDX(n) \ + ((n == 0) ? SPI2_CS_PAD_OUT_IDX \ + : ((n == 1) ? SPI2_CS1_PAD_OUT_IDX \ + : ((n == 2) ? SPI2_CS2_PAD_OUT_IDX \ + : ((n == 3) ? SPI2_CS3_PAD_OUT_IDX : ((n == 4) ? SPI2_CS4_PAD_OUT_IDX : ((n == 5) ? SPI2_CS5_PAD_OUT_IDX : 0)))))) -#define SPI_SS_IDX(p, n) ((p == 0) ? SPI_FSPI_SS_IDX(n) : ((p == 1) ? SPI_HSPI_SS_IDX(n) : 0)) +#define SPI_SS_IDX(p, n) ((p == 0) ? SPI_FSPI_SS_IDX(n) : ((p == 1) ? SPI_HSPI_SS_IDX(n) : 0)) #elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 // ESP32C3 @@ -153,15 +148,13 @@ struct spi_struct_t { #if CONFIG_DISABLE_HAL_LOCKS #define SPI_MUTEX_LOCK() #define SPI_MUTEX_UNLOCK() -+ -static spi_t _spi_bus_array[] = { ++ static spi_t _spi_bus_array[] = { #if CONFIG_IDF_TARGET_ESP32S2 {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 0, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 1, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 2, -1, -1, -1, -1} #elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4 - {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}, - {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1, -1, -1, -1, -1} + {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1, -1, -1, -1, -1} #elif CONFIG_IDF_TARGET_ESP32C2 {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1} #elif CONFIG_IDF_TARGET_ESP32C3 @@ -187,8 +180,7 @@ static spi_t _spi_bus_array[] = { {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 1, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 2, -1, -1, -1, -1} #elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4 - {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1}, - {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 1, -1, -1, -1, -1} + {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 1, -1, -1, -1, -1} #elif CONFIG_IDF_TARGET_ESP32C2 {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1} #elif CONFIG_IDF_TARGET_ESP32C3 @@ -1622,4 +1614,3 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq) { } #endif /* SOC_GPSPI_SUPPORTED */ - diff --git a/cores/esp32/esp32-hal-touch.c b/cores/esp32/esp32-hal-touch.c index 40a917b544d..4c0ed92656c 100644 --- a/cores/esp32/esp32-hal-touch.c +++ b/cores/esp32/esp32-hal-touch.c @@ -26,7 +26,7 @@ Internal Private Touch Data Structure and Functions */ -#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 +#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 static uint16_t __touchSleepCycles = 0x1000; static uint16_t __touchMeasureCycles = 0x1000; #elif SOC_TOUCH_SENSOR_VERSION == 2 // ESP32S2, ESP32S3 @@ -55,7 +55,7 @@ static bool initialized = false; static bool channels_initialized[SOC_TOUCH_SENSOR_NUM] = {false}; static void ARDUINO_ISR_ATTR __touchISR(void *arg) { -#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 +#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 uint32_t pad_intr = touch_pad_get_status(); //clear interrupt touch_pad_clear_status(); @@ -97,7 +97,7 @@ static void ARDUINO_ISR_ATTR __touchISR(void *arg) { static void __touchSetCycles(uint16_t measure, uint16_t sleep) { __touchSleepCycles = sleep; __touchMeasureCycles = measure; -#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 +#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 touch_pad_set_measurement_clock_cycles(measure); #elif SOC_TOUCH_SENSOR_VERSION == 2 // ESP32S2, ESP32S3 touch_pad_set_charge_discharge_times(measure); @@ -127,7 +127,7 @@ static void __touchInit() { esp_err_t err = ESP_OK; -#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 +#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 err = touch_pad_init(); if (err != ESP_OK) { goto err; @@ -147,7 +147,7 @@ static void __touchInit() { if (err != ESP_OK) { goto err; } - touch_pad_intr_enable(); // returns ESP_OK + touch_pad_intr_enable(); // returns ESP_OK #elif SOC_TOUCH_SENSOR_VERSION == 2 // ESP32S2, ESP32S3 err = touch_pad_init(); if (err != ESP_OK) { @@ -183,11 +183,11 @@ static void __touchChannelInit(int pad) { return; } -#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 +#if SOC_TOUCH_SENSOR_VERSION == 1 // ESP32 // Initial no Threshold and setup __touchInterruptHandlers[pad].fn = NULL; touch_pad_config(pad, TOUCH_PAD_THRESHOLD_MAX); // returns ESP_OK -#elif SOC_TOUCH_SENSOR_VERSION == 2 // ESP32S2, ESP32S3 +#elif SOC_TOUCH_SENSOR_VERSION == 2 // ESP32S2, ESP32S3 // Initial no Threshold and setup __touchInterruptHandlers[pad].fn = NULL; touch_pad_config(pad); // returns ESP_OK @@ -274,7 +274,7 @@ static void __touchDettachInterrupt(uint8_t pin) { External Public Touch API Functions */ -#if SOC_TOUCH_SENSOR_VERSION == 1 // Only for ESP32 SoC +#if SOC_TOUCH_SENSOR_VERSION == 1 // Only for ESP32 SoC void touchInterruptSetThresholdDirection(bool mustbeLower) { if (mustbeLower) { touch_pad_set_trigger_mode(TOUCH_TRIGGER_BELOW); diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c index 37e1b238d73..82c9d8808d0 100644 --- a/cores/esp32/esp32-hal-uart.c +++ b/cores/esp32/esp32-hal-uart.c @@ -1106,16 +1106,18 @@ unsigned long uartDetectBaudrate(uart_t *uart) { // gets the right TX or RX SIGNAL, based on the UART number from gpio_sig_map.h #ifdef CONFIG_IDF_TARGET_ESP32P4 -#define UART_TX_SIGNAL(uartNumber) (uartNumber == UART_NUM_0 ? UART0_TXD_PAD_OUT_IDX \ - : (uartNumber == UART_NUM_1 ? UART1_TXD_PAD_OUT_IDX \ - : (uartNumber == UART_NUM_2 ? UART2_TXD_PAD_OUT_IDX \ - : (uartNumber == UART_NUM_3 ? UART3_TXD_PAD_OUT_IDX \ - : UART4_TXD_PAD_OUT_IDX)))) -#define UART_RX_SIGNAL(uartNumber) (uartNumber == UART_NUM_0 ? UART0_RXD_PAD_IN_IDX \ - : (uartNumber == UART_NUM_1 ? UART1_RXD_PAD_IN_IDX \ - : (uartNumber == UART_NUM_2 ? UART2_RXD_PAD_IN_IDX \ - : (uartNumber == UART_NUM_3 ? UART3_RXD_PAD_IN_IDX \ - : UART4_RXD_PAD_IN_IDX)))) +#define UART_TX_SIGNAL(uartNumber) \ + (uartNumber == UART_NUM_0 \ + ? UART0_TXD_PAD_OUT_IDX \ + : (uartNumber == UART_NUM_1 \ + ? UART1_TXD_PAD_OUT_IDX \ + : (uartNumber == UART_NUM_2 ? UART2_TXD_PAD_OUT_IDX : (uartNumber == UART_NUM_3 ? UART3_TXD_PAD_OUT_IDX : UART4_TXD_PAD_OUT_IDX)))) +#define UART_RX_SIGNAL(uartNumber) \ + (uartNumber == UART_NUM_0 \ + ? UART0_RXD_PAD_IN_IDX \ + : (uartNumber == UART_NUM_1 \ + ? UART1_RXD_PAD_IN_IDX \ + : (uartNumber == UART_NUM_2 ? UART2_RXD_PAD_IN_IDX : (uartNumber == UART_NUM_3 ? UART3_RXD_PAD_IN_IDX : UART4_RXD_PAD_IN_IDX)))) #else #if SOC_UART_HP_NUM > 2 #define UART_TX_SIGNAL(uartNumber) (uartNumber == UART_NUM_0 ? U0TXD_OUT_IDX : (uartNumber == UART_NUM_1 ? U1TXD_OUT_IDX : U2TXD_OUT_IDX)) @@ -1124,7 +1126,7 @@ unsigned long uartDetectBaudrate(uart_t *uart) { #define UART_TX_SIGNAL(uartNumber) (uartNumber == UART_NUM_0 ? U0TXD_OUT_IDX : U1TXD_OUT_IDX) #define UART_RX_SIGNAL(uartNumber) (uartNumber == UART_NUM_0 ? U0RXD_IN_IDX : U1RXD_IN_IDX) #endif -#endif // ifdef CONFIG_IDF_TARGET_ESP32P4 +#endif // ifdef CONFIG_IDF_TARGET_ESP32P4 /* This function internally binds defined UARTs TX signal with defined RX pin of any UART (same or different). diff --git a/libraries/BLE/examples/BLE5_extended_scan/ci.json b/libraries/BLE/examples/BLE5_extended_scan/ci.json index 67455e96584..e97e4cf7fea 100644 --- a/libraries/BLE/examples/BLE5_extended_scan/ci.json +++ b/libraries/BLE/examples/BLE5_extended_scan/ci.json @@ -1,7 +1,7 @@ { "targets": { "esp32": false, - "esp32s2": false, - "esp32p4": false + "esp32p4": false, + "esp32s2": false } } diff --git a/libraries/BLE/examples/BLE5_multi_advertising/ci.json b/libraries/BLE/examples/BLE5_multi_advertising/ci.json index 67455e96584..fc9f75986fe 100644 --- a/libraries/BLE/examples/BLE5_multi_advertising/ci.json +++ b/libraries/BLE/examples/BLE5_multi_advertising/ci.json @@ -1,7 +1,6 @@ { "targets": { - "esp32": false, - "esp32s2": false, - "esp32p4": false + "esp32p4": false, + "esp32s2": false } } diff --git a/libraries/BLE/examples/BLE5_periodic_advertising/ci.json b/libraries/BLE/examples/BLE5_periodic_advertising/ci.json index 67455e96584..a034e239a3f 100644 --- a/libraries/BLE/examples/BLE5_periodic_advertising/ci.json +++ b/libraries/BLE/examples/BLE5_periodic_advertising/ci.json @@ -1,7 +1,10 @@ { "targets": { "esp32": false, + "esp32c2": false, + "esp32c3": false, + "esp32p4": false, "esp32s2": false, - "esp32p4": false + "esp32s3": false } } diff --git a/libraries/BLE/examples/BLE5_periodic_sync/ci.json b/libraries/BLE/examples/BLE5_periodic_sync/ci.json index 67455e96584..715becda6cb 100644 --- a/libraries/BLE/examples/BLE5_periodic_sync/ci.json +++ b/libraries/BLE/examples/BLE5_periodic_sync/ci.json @@ -1,7 +1,10 @@ { "targets": { "esp32": false, - "esp32s2": false, - "esp32p4": false + "esp32c3": false, + "esp32c6": false, + "esp32h2": false, + "esp32p4": false, + "esp32s2": false } } diff --git a/libraries/BLE/examples/Beacon_Scanner/ci.json b/libraries/BLE/examples/Beacon_Scanner/ci.json index cde395625ee..ee810400be6 100644 --- a/libraries/BLE/examples/Beacon_Scanner/ci.json +++ b/libraries/BLE/examples/Beacon_Scanner/ci.json @@ -1,6 +1,9 @@ { "targets": { - "esp32s2": false, - "esp32p4": false + "esp32c3": false, + "esp32c6": false, + "esp32h2": false, + "esp32p4": false, + "esp32s2": false } } diff --git a/libraries/BLE/examples/Client/ci.json b/libraries/BLE/examples/Client/ci.json index cde395625ee..eb6596c4a37 100644 --- a/libraries/BLE/examples/Client/ci.json +++ b/libraries/BLE/examples/Client/ci.json @@ -1,6 +1,7 @@ { "targets": { - "esp32s2": false, - "esp32p4": false + "esp32c3": false, + "esp32p4": false, + "esp32s2": false } } diff --git a/libraries/BLE/examples/Notify/ci.json b/libraries/BLE/examples/Notify/ci.json index cde395625ee..156dda6560c 100644 --- a/libraries/BLE/examples/Notify/ci.json +++ b/libraries/BLE/examples/Notify/ci.json @@ -1,6 +1,7 @@ { "targets": { - "esp32s2": false, - "esp32p4": false + "esp32h2": false, + "esp32p4": false, + "esp32s2": false } }