diff --git a/docs/news.d/559.breaking.rst b/docs/news.d/559.breaking.rst new file mode 100644 index 000000000..638655110 --- /dev/null +++ b/docs/news.d/559.breaking.rst @@ -0,0 +1,4 @@ +HDL builtins are not compiled by default. +To preserve the functionality, the run script is now required to explicitly use methods +:meth:`add_vhdl_builtins() ` or +:meth:`add_verilog_builtins() `. diff --git a/docs/news.d/764.breaking.rst b/docs/news.d/764.breaking.rst new file mode 100644 index 000000000..638655110 --- /dev/null +++ b/docs/news.d/764.breaking.rst @@ -0,0 +1,4 @@ +HDL builtins are not compiled by default. +To preserve the functionality, the run script is now required to explicitly use methods +:meth:`add_vhdl_builtins() ` or +:meth:`add_verilog_builtins() `. diff --git a/docs/news.d/764.doc.rst b/docs/news.d/764.doc.rst new file mode 100644 index 000000000..5f1c259f6 --- /dev/null +++ b/docs/news.d/764.doc.rst @@ -0,0 +1 @@ +Rename 'VHDL Libraries' to :ref:`hdl_libraries`. Add section :ref:`Guides `. diff --git a/docs/news.d/777.breaking.rst b/docs/news.d/777.breaking.rst new file mode 100644 index 000000000..638655110 --- /dev/null +++ b/docs/news.d/777.breaking.rst @@ -0,0 +1,4 @@ +HDL builtins are not compiled by default. +To preserve the functionality, the run script is now required to explicitly use methods +:meth:`add_vhdl_builtins() ` or +:meth:`add_verilog_builtins() `.