diff --git a/llvm/test/CodeGen/X86/opt-shuff-tstore.ll b/llvm/test/CodeGen/X86/opt-shuff-tstore.ll index 0a2d4e9ba9fe83..c331f8ffb3694d 100644 --- a/llvm/test/CodeGen/X86/opt-shuff-tstore.ll +++ b/llvm/test/CodeGen/X86/opt-shuff-tstore.ll @@ -1,37 +1,46 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse4.1 | FileCheck %s -; CHECK: func_4_8 ; A single memory write -; CHECK: movd -; CHECK-NEXT: ret define void @func_4_8(<4 x i8> %param, ptr %p) { +; CHECK-LABEL: func_4_8: +; CHECK: # %bb.0: +; CHECK-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; CHECK-NEXT: movd %xmm0, (%rdi) +; CHECK-NEXT: retq %r = add <4 x i8> %param, store <4 x i8> %r, ptr %p ret void } -; CHECK: func_4_16 -; CHECK: movq -; CHECK-NEXT: ret define void @func_4_16(<4 x i16> %param, ptr %p) { +; CHECK-LABEL: func_4_16: +; CHECK: # %bb.0: +; CHECK-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; CHECK-NEXT: movq %xmm0, (%rdi) +; CHECK-NEXT: retq %r = add <4 x i16> %param, store <4 x i16> %r, ptr %p ret void } -; CHECK: func_8_8 -; CHECK: movq -; CHECK-NEXT: ret define void @func_8_8(<8 x i8> %param, ptr %p) { +; CHECK-LABEL: func_8_8: +; CHECK: # %bb.0: +; CHECK-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; CHECK-NEXT: movq %xmm0, (%rdi) +; CHECK-NEXT: retq %r = add <8 x i8> %param, store <8 x i8> %r, ptr %p ret void } -; CHECK: func_2_32 -; CHECK: movq -; CHECK-NEXT: ret define void @func_2_32(<2 x i32> %param, ptr %p) { +; CHECK-LABEL: func_2_32: +; CHECK: # %bb.0: +; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; CHECK-NEXT: movq %xmm0, (%rdi) +; CHECK-NEXT: retq %r = add <2 x i32> %param, store <2 x i32> %r, ptr %p ret void