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[LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (
llvm#113697) Currently it's very difficult to improve the cost model for tail-folded loops because as soon as you add a VPInstruction::computeCost function that adds the costs of instructions such as VPInstruction::ActiveLaneMask and VPInstruction::ExplicitVectorLength the assert in LoopVectorizationPlanner::computeBestVF fails for some tests. This is because the VF chosen by the legacy cost model doesn't match the vplan cost model. See PR llvm#90191. This assert is currently making it difficult to improve the cost model. Hopefully we will be in a position to remove the assert soon, however in order to do that we have to fix up a whole bunch of tests that rely upon the legacy cost model output. I've tried my best to update these tests to use vplan output instead. There is still work needed for the VF=1 case because the vplan cost model is not printed out in this case. I've not attempted to fix those in this patch.
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47 changes: 26 additions & 21 deletions
47
llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
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Original file line number | Diff line number | Diff line change |
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@@ -1,54 +1,59 @@ | ||
; REQUIRES: asserts | ||
; RUN: opt -mtriple=aarch64 -mattr=+sve \ | ||
; RUN: -force-target-instruction-cost=1 -passes=loop-vectorize -S -debug-only=loop-vectorize < %s 2>&1 \ | ||
; RUN: | FileCheck %s --check-prefixes=GENERIC,VF-VSCALE4 | ||
; RUN: | FileCheck %s --check-prefixes=GENERIC,VF-VSCALE16 | ||
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; RUN: opt -mtriple=aarch64 -mattr=+sve -mcpu=generic \ | ||
; RUN: -force-target-instruction-cost=1 -passes=loop-vectorize -S -debug-only=loop-vectorize < %s 2>&1 \ | ||
; RUN: | FileCheck %s --check-prefixes=GENERIC,VF-VSCALE4 | ||
; RUN: | FileCheck %s --check-prefixes=GENERIC,VF-VSCALE16 | ||
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; RUN: opt -mtriple=aarch64 -mcpu=neoverse-v1 \ | ||
; RUN: -force-target-instruction-cost=1 -passes=loop-vectorize -S -debug-only=loop-vectorize < %s 2>&1 \ | ||
; RUN: | FileCheck %s --check-prefixes=NEOVERSE-V1,VF-VSCALE4 | ||
; RUN: | FileCheck %s --check-prefixes=NEOVERSE-V1,VF-VSCALE16 | ||
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; RUN: opt -mtriple=aarch64 -mcpu=neoverse-n2 \ | ||
; RUN: -force-target-instruction-cost=1 -passes=loop-vectorize -S -debug-only=loop-vectorize < %s 2>&1 \ | ||
; RUN: | FileCheck %s --check-prefixes=NEOVERSE-N2,VF-VSCALE4 | ||
; RUN: | FileCheck %s --check-prefixes=NEOVERSE-N2,VF-VSCALE16 | ||
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; RUN: opt -mtriple=aarch64 -mcpu=neoverse-n2 \ | ||
; RUN: opt -mtriple=aarch64 -mcpu=neoverse-v2 \ | ||
; RUN: -force-target-instruction-cost=1 -passes=loop-vectorize -S -debug-only=loop-vectorize < %s 2>&1 \ | ||
; RUN: | FileCheck %s --check-prefixes=NEOVERSE-N2,VF-VSCALE4 | ||
; RUN: | FileCheck %s --check-prefixes=NEOVERSE-V2,VF-16 | ||
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; GENERIC: Cost for VF vscale x 2: 11 (Estimated cost per lane: 2.8) | ||
; GENERIC: Cost for VF vscale x 4: 11 (Estimated cost per lane: 1.4) | ||
; GENERIC: LV: Selecting VF: vscale x 16 | ||
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; GENERIC: LV: Vector loop of width vscale x 2 costs: 3 (assuming a minimum vscale of 2). | ||
; GENERIC: LV: Vector loop of width vscale x 4 costs: 1 (assuming a minimum vscale of 2). | ||
; NEOVERSE-V1: Cost for VF vscale x 2: 11 (Estimated cost per lane: 2.8) | ||
; NEOVERSE-V1: Cost for VF vscale x 4: 11 (Estimated cost per lane: 1.4) | ||
; NEOVERSE-V1: LV: Selecting VF: vscale x 16 | ||
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; NEOVERSE-V1: LV: Vector loop of width vscale x 2 costs: 3 (assuming a minimum vscale of 2). | ||
; NEOVERSE-V1: LV: Vector loop of width vscale x 4 costs: 1 (assuming a minimum vscale of 2). | ||
; NEOVERSE-N2: Cost for VF vscale x 2: 11 (Estimated cost per lane: 5.5) | ||
; NEOVERSE-N2: Cost for VF vscale x 4: 11 (Estimated cost per lane: 2.8) | ||
; NEOVERSE-N2: LV: Selecting VF: vscale x 16 | ||
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; NEOVERSE-N2: LV: Vector loop of width vscale x 2 costs: 6 (assuming a minimum vscale of 1). | ||
; NEOVERSE-N2: LV: Vector loop of width vscale x 4 costs: 3 (assuming a minimum vscale of 1). | ||
; NEOVERSE-V2: Cost for VF vscale x 2: 11 (Estimated cost per lane: 5.5) | ||
; NEOVERSE-V2: Cost for VF vscale x 4: 11 (Estimated cost per lane: 2.8) | ||
; NEOVERSE-V2: LV: Selecting VF: 16 | ||
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; VF-4: <4 x i32> | ||
; VF-VSCALE4: <16 x i32> | ||
; VF-16: <16 x i8> | ||
; VF-VSCALE16: <vscale x 16 x i8> | ||
define void @test0(ptr %a, ptr %b, ptr %c) #0 { | ||
entry: | ||
br label %loop | ||
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loop: | ||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] | ||
%arrayidx = getelementptr inbounds i32, ptr %c, i64 %iv | ||
%0 = load i32, ptr %arrayidx, align 4 | ||
%arrayidx = getelementptr inbounds i8, ptr %c, i64 %iv | ||
%0 = load i8, ptr %arrayidx, align 4 | ||
%arrayidx2 = getelementptr inbounds i8, ptr %b, i64 %iv | ||
%1 = load i8, ptr %arrayidx2, align 4 | ||
%zext = zext i8 %1 to i32 | ||
%add = add nsw i32 %zext, %0 | ||
%arrayidx5 = getelementptr inbounds i32, ptr %a, i64 %iv | ||
store i32 %add, ptr %arrayidx5, align 4 | ||
%add = add nsw i8 %0, %1 | ||
%arrayidx5 = getelementptr inbounds i8, ptr %a, i64 %iv | ||
store i8 %add, ptr %arrayidx5, align 4 | ||
%iv.next = add nuw nsw i64 %iv, 1 | ||
%exitcond.not = icmp eq i64 %iv.next, 1024 | ||
br i1 %exitcond.not, label %exit, label %loop | ||
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exit: | ||
ret void | ||
} | ||
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