diff --git a/STM32/cores/arduino/avr/pgmspace.h b/STM32/cores/arduino/avr/pgmspace.h
index 9b344c9b..b1679f5f 100644
--- a/STM32/cores/arduino/avr/pgmspace.h
+++ b/STM32/cores/arduino/avr/pgmspace.h
@@ -41,4 +41,24 @@ typedef uint32_t prog_uint32_t;
 #define pgm_read_dword_far(addr) pgm_read_dword(addr)
 #define pgm_read_float_far(addr) pgm_read_float(addr)
 
+#define memcmp_P      memcmp
+#define memccpy_P     memccpy
+#define memmem_P      memmem
+#define memcpy_P      memcpy
+#define strcpy_P      strcpy
+#define strncpy_P     strncpy
+#define strcat_P      strcat
+#define strncat_P     strncat
+#define strcmp_P      strcmp
+#define strncmp_P     strncmp
+#define strcasecmp_P  strcasecmp
+#define strncasecmp_P strncasecmp
+#define strlen_P      strlen
+#define strnlen_P     strnlen
+#define strstr_P      strstr
+#define printf_P      printf
+#define sprintf_P     sprintf
+#define snprintf_P    snprintf
+#define vsnprintf_P   vsnprintf
+
 #endif
diff --git a/STM32/cores/arduino/usb/usbd_core.c b/STM32/cores/arduino/usb/usbd_core.c
index ff3ed446..e92153a8 100644
--- a/STM32/cores/arduino/usb/usbd_core.c
+++ b/STM32/cores/arduino/usb/usbd_core.c
@@ -28,6 +28,9 @@
 /* Includes ------------------------------------------------------------------*/
 #include "usbd_core.h"
 
+//Handle Vendor Commands on EP0
+__weak void VendorCommand(USBD_SetupReqTypedef* req) { }
+
 /** @addtogroup STM32_USBD_DEVICE_LIBRARY
 * @{
 */
@@ -267,6 +270,15 @@ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
 
   pdev->ep0_state = USBD_EP0_SETUP;
   pdev->ep0_data_len = pdev->request.wLength;
+ 
+  //Handle Vendor Command with Request Code 0x40
+  if ((pdev->request.bmRequest & 0x40) == 0x40) {
+    VendorCommand(&pdev->request); //Get Vendor setup request (no data)
+    //If there is data len then must take data or Setup will fail
+    //Send ACK if no other trasmission required (so dont make Host to fail request)
+    if (pdev->request.wLength == 0) USBD_CtlSendStatus(pdev); //ACK by sending 0 len packet  
+    return USBD_OK;
+  }
 
   switch (pdev->request.bmRequest & 0x1F)
   {
diff --git a/STM32/libraries/stm32_dma/src/stm32_dma.h b/STM32/libraries/stm32_dma/src/stm32_dma.h
index 6c00a103..5683fd33 100644
--- a/STM32/libraries/stm32_dma/src/stm32_dma.h
+++ b/STM32/libraries/stm32_dma/src/stm32_dma.h
@@ -26,7 +26,7 @@
 #include "stdbool.h"
 
 typedef enum {
-    SPI_TX, SPI_RX, SDIO_RXTX
+    SPI_TX, SPI_RX, SDIO_RXTX, ADC_DMA
 } dmaRequest;
 
 
diff --git a/STM32/libraries/stm32_dma/src/stm32_dma_F0F1F3L1.h b/STM32/libraries/stm32_dma/src/stm32_dma_F0F1F3L1.h
index 0103bf8a..949c74a0 100644
--- a/STM32/libraries/stm32_dma/src/stm32_dma_F0F1F3L1.h
+++ b/STM32/libraries/stm32_dma/src/stm32_dma_F0F1F3L1.h
@@ -5,6 +5,7 @@
 // F3 RM0316 http://www.st.com/content/ccc/resource/technical/document/reference_manual/4a/19/6e/18/9d/92/43/32/DM00043574.pdf/files/DM00043574.pdf/jcr:content/translations/en.DM00043574.pdf#page=272
 // L1 RM0038 http://www.st.com/content/ccc/resource/technical/document/reference_manual/cc/f9/93/b2/f0/82/42/57/CD00240193.pdf/files/CD00240193.pdf/jcr:content/translations/en.CD00240193.pdf#page=255
 
+//These works just for L0 and F0, not for F1 (cannot compile) -> TO CHECK
 #ifndef DMA1_Channel2_IRQn
 #define DMA1_Channel2_IRQn DMA1_Channel2_3_IRQn
 #define DMA1_Channel3_IRQn DMA1_Channel2_3_IRQn
@@ -30,6 +31,8 @@ const dma_request_to_instance_t dmaRequestToStream[] = {
 
     {SPI1, SPI_TX, DMA1_Channel3, 3, DMA1_Channel3_IRQn},
     {SPI1, SPI_RX, DMA1_Channel2, 2, DMA1_Channel2_IRQn},
+    
+    {ADC1, ADC_DMA, DMA1_Channel1, 1, DMA1_Channel1_IRQn},
 
 #ifdef SPI2
     {SPI2, SPI_TX, DMA1_Channel5, 5, DMA1_Channel5_IRQn},
diff --git a/STM32/libraries/stm32_dma/src/stm32_dma_F2F4F7.h b/STM32/libraries/stm32_dma/src/stm32_dma_F2F4F7.h
index 4bc9011a..3c0b92b5 100644
--- a/STM32/libraries/stm32_dma/src/stm32_dma_F2F4F7.h
+++ b/STM32/libraries/stm32_dma/src/stm32_dma_F2F4F7.h
@@ -26,6 +26,16 @@ const dma_request_to_instance_t dmaRequestToStream[] = {
     {SPI2, SPI_TX, DMA1_Stream4, DMA_CHANNEL_0, 4, DMA1_Stream4_IRQn},
     {SPI2, SPI_RX, DMA1_Stream3, DMA_CHANNEL_0, 3, DMA1_Stream3_IRQn},
 
+    {ADC1, ADC_DMA, DMA2_Stream0, DMA_CHANNEL_0, 0 + 8, DMA2_Stream0_IRQn},
+    {ADC1, ADC_DMA, DMA2_Stream4, DMA_CHANNEL_0, 4 + 8, DMA2_Stream4_IRQn},
+#ifdef ADC2
+    {ADC2, ADC_DMA, DMA2_Stream2, DMA_CHANNEL_1, 2 + 8, DMA2_Stream2_IRQn},
+    {ADC2, ADC_DMA, DMA2_Stream3, DMA_CHANNEL_1, 3 + 8, DMA2_Stream3_IRQn},
+#endif
+#ifdef ADC3
+    {ADC3, ADC_DMA, DMA2_Stream0, DMA_CHANNEL_2, 0 + 8, DMA2_Stream0_IRQn},
+    {ADC3, ADC_DMA, DMA2_Stream1, DMA_CHANNEL_2, 1 + 8, DMA2_Stream1_IRQn},
+#endif
 #ifdef SPI3
     {SPI3, SPI_TX, DMA1_Stream5, DMA_CHANNEL_0, 5, DMA1_Stream5_IRQn},
     {SPI3, SPI_RX, DMA1_Stream0, DMA_CHANNEL_0, 0, DMA1_Stream0_IRQn},