diff --git a/classes/rust-target-config.bbclass b/classes/rust-target-config.bbclass
index 21a56ede..e564b54a 100644
--- a/classes/rust-target-config.bbclass
+++ b/classes/rust-target-config.bbclass
@@ -245,6 +245,13 @@ TARGET_POINTER_WIDTH[riscv64gc] = "64"
 TARGET_C_INT_WIDTH[riscv64gc] = "64"
 MAX_ATOMIC_WIDTH[riscv64gc] = "64"
 
+## riscv64-unknown-linux-{gnu, musl}
+DATA_LAYOUT[riscv64] = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
+TARGET_ENDIAN[riscv64] = "little"
+TARGET_POINTER_WIDTH[riscv64] = "64"
+TARGET_C_INT_WIDTH[riscv64] = "64"
+MAX_ATOMIC_WIDTH[riscv64] = "64"
+
 ## loongarch64-unknown-linux-{gnu, musl}
 DATA_LAYOUT[loongarch64] = "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
 TARGET_ENDIAN[loongarch64] = "little"
diff --git a/conf/machine/include/nezha-allwinner-d1.inc b/conf/machine/include/nezha-allwinner-d1.inc
index cda0ede5..450d2a26 100644
--- a/conf/machine/include/nezha-allwinner-d1.inc
+++ b/conf/machine/include/nezha-allwinner-d1.inc
@@ -33,7 +33,8 @@ IMAGE_BOOT_FILES:nezha-allwinner-d1 = "${KERNEL_IMAGETYPE} sun20i-d1-nezha.dtb b
 IMAGE_BOOT_FILES:sota:nezha-allwinner-d1 = "${KERNEL_IMAGETYPE} sun20i-d1-nezha.dtb boot.scr-${MACHINE};boot.scr.uimg"
 
 hostname:pn-base-files = "torizon-nezha"
-CORE_IMAGE_BASE_INSTALL:remove = "set-hostname"
+# FIXME: rac does not compile for riscv64, https://github.com/briansmith/ring/issues/1182
+CORE_IMAGE_BASE_INSTALL:remove = "set-hostname rac"
 
 # Use meta-lmp but maintain compatibility
 BBMASK += " \