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latest yosys: ast process_format_str() changed, plugin won't compile. #1961

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hzeller opened this issue Sep 12, 2023 · 3 comments
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latest yosys: ast process_format_str() changed, plugin won't compile. #1961

hzeller opened this issue Sep 12, 2023 · 3 comments

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@hzeller
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hzeller commented Sep 12, 2023

Looks like the new function is now called processFormat(). So the systemverilog plug--in will not compile with latest yosys from head as our local copy of simplify.cc uses that in two places. So probably some #ifdef of sorts needed to work with older and newer yosys-es.

(this is copied from chipsalliance/yosys-f4pga-plugins#542 )

@hzeller
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hzeller commented Sep 15, 2023

The currently referenced yosys is more than 3 months old, so there will be a problem compiling the plugin with folks using newer Yosys versions.

Making it compatible with older and newer Yoysys API using a #ifdef or entirely implement the function in question independently of Yosys can be the way forward @wsipak

@timkpaine
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timkpaine commented Sep 15, 2023

@wsipak wsipak mentioned this issue Sep 22, 2023
kgugala added a commit that referenced this issue Sep 30, 2023
This bumps Yosys solving the issue with recent changes in the mainline:
#1961

I've adjusted the references to Yosys' functions so that the plugin
compiles.

There are Parsing Tests in Synlig which run simulation. Right now Yosys
fails simulation if there are blackboxes. In such cases we should get
rid of the simulation part.

Some tests are added to the skiplist as Yosys is unable to produce
results that would be used in the Formal Verification tests.
@alaindargelas
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Latest Yosys is merged. #2063

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