From bc41d6905710c28b7b0bb5badc54d991d015a292 Mon Sep 17 00:00:00 2001 From: burgholzer Date: Tue, 9 Apr 2024 17:11:56 +0200 Subject: [PATCH] =?UTF-8?q?=F0=9F=9A=A8=20fix=20rst=20backticks?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: burgholzer --- docs/Abstraction_levels.rst | 8 ++++---- docs/Parameter.rst | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/Abstraction_levels.rst b/docs/Abstraction_levels.rst index 9daba348d..8cac66996 100644 --- a/docs/Abstraction_levels.rst +++ b/docs/Abstraction_levels.rst @@ -52,7 +52,7 @@ shown above. Different quantum computer realizations support different native gate-sets. In our example, we consider the -`ibmq_manila` device as the target device which natively supports I, X, √X, Rz and CX gates. +``ibmq_manila`` device as the target device which natively supports I, X, √X, Rz and CX gates. Consequently, the Ry gates in the previous figure have to be converted using only these native gates. In this case, they are substituted by a sequence of X and Rz gates (denoted as • with a phase of −π). @@ -63,10 +63,10 @@ they are substituted by a sequence of X and Rz gates (denoted as • with a phas .. image:: /_static/arch.png :width: 15% - :alt: Illustration of the `ibmq_manila` device + :alt: Illustration of the ``ibmq_manila`` device :align: center -The architecture of the `ibmq_manila` device is shown above on the right and it defines between which qubits a two-qubit operation may be performed. +The architecture of the ``ibmq_manila`` device is shown above on the right and it defines between which qubits a two-qubit operation may be performed. Since the circuit shown in the previous figure contains CX gates operating between all combination of qubits, there is no mapping directly matching the target architecture's layout. As a consequence, a non-trivial mapping followed by a round of optimization leads to the resulting circuit @@ -80,4 +80,4 @@ shown below. This is also the reason for the different sequence of CX gates compared to the previous example. -This circuit is now executable on the `ibmq_manila` device, since all hardware induced requirements are fulfilled. +This circuit is now executable on the ``ibmq_manila`` device, since all hardware induced requirements are fulfilled. diff --git a/docs/Parameter.rst b/docs/Parameter.rst index b67fcf4ad..73ab5d6e4 100644 --- a/docs/Parameter.rst +++ b/docs/Parameter.rst @@ -16,7 +16,7 @@ The ``mqt.bench.get_benchmark`` method has the following signature: * ``circuit_size``\ : for most of the cases this is equal to number of qubits (all scalable benchmarks except ``"qwalk-v-chain"`` and ``"grover-v-chain"``\ ) while for all other the qubit number is higher * ``compiler``\ : ``"qiskit"`` or ``"tket"`` -* `compiler_settings`: Optimization level for `"qiskit"` (`0`-`3`), placement for `"tket"` (`lineplacement` or `graphplacement`), exemplary shown: +* ``compiler_settings``: Optimization level for ``"qiskit"`` (``0``-``3``), placement for ``"tket"`` (``lineplacement`` or ``graphplacement``), exemplary shown: .. code-block:: python