Rx Overflows

[PETERKNEE22]

I was able to get the software built and installed onto a Raspberry Pi Zero 2W. All test applications show the Pi talking with the CaribouLite successfully. Receiving a CW tone on the device does not look as expected though. There are numerous phase discontinues presumably either from data being dropped or an issue with the mixing LO. I have not had the opportunity to look into the mixing LO yet so I'm only considering overflows from either dropped or corrupted data.

To try and determine if there was an overflow issue, I re-compiled the firmware with a counter for the data so that overflows can more easily be observed.

diff --git a/firmware/lvds_rx.v b/firmware/lvds_rx.v
index 8ede82e..f10fe36 100644
--- a/firmware/lvds_rx.v
+++ b/firmware/lvds_rx.v
@@ -20,12 +20,14 @@ module lvds_rx (
   // Internal Registers
   reg [1:0] r_state_if;
   reg [2:0] r_phase_count;
+  reg [12:0] r_sample_count;
   reg r_sync_input;
 
   // Initial conditions
   initial begin
     r_state_if = state_idle;
     r_phase_count = 3'b111;
+    r_sample_count = 13'b000000000000;
   end
 
   // Global Assignments
@@ -39,6 +41,7 @@ module lvds_rx (
       o_fifo_push <= 1'b0;
       r_phase_count <= 3'b111;
       r_sync_input <= 1'b0;
+      r_sample_count = 13'b000000000000;
     end else begin
       case (r_state_if)
         state_idle: begin
@@ -71,7 +74,15 @@ module lvds_rx (
           if (r_phase_count == 3'b000) begin
             o_fifo_push <= ~i_fifo_full;
             r_state_if  <= state_idle;
-            o_fifo_data <= {o_fifo_data[29:0], i_ddr_data[1], r_sync_input};
+            // o_fifo_data <= {o_fifo_data[29:0], i_ddr_data[1], r_sync_input};
+            o_fifo_data <= {2'b10, r_sample_count, 3'b001, r_sample_count, r_sync_input};
+
+            // reset sample counter
+            if (r_sample_count == 13'b1111111111111) begin
+                r_sample_count = 13'b0000000000000;
+            end else begin
+                r_sample_count <= r_sample_count + 1;
+            end
           end else begin
             o_fifo_push   <= 1'b0;
             r_phase_count <= r_phase_count - 1;

On the receiving side, not only do I see discontinuities in the counters, every now and then I see completely invalid samples (in-phase and quadrature components that are not the same).

1. Has anyone seen a similar issue and if so, were you able to resolve?
2. Any ideas on where the issue might lie? Firmware, Kernel Module, Software?
3. Is there a potential for SMI data transfers being corrupted or dropped?

Any help you can provide would be appreciated. This is a really cool piece of hardware that I'd love to get working properly.

Regards,
Peter Knee