From fb6804c5af83d11f2943bba073f3c17bad22947a Mon Sep 17 00:00:00 2001 From: dragonmux Date: Sat, 16 Dec 2023 03:07:48 +0000 Subject: [PATCH 1/3] cortexar: Improved the diagnostics in `cortexar_mem_write()` and switched them to `DEBUG_PROTO` --- src/target/cortexar.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/src/target/cortexar.c b/src/target/cortexar.c index 9526d03ed33..6fac48774fb 100644 --- a/src/target/cortexar.c +++ b/src/target/cortexar.c @@ -1061,7 +1061,19 @@ static void cortexar_mem_write( target_s *const target, const target_addr_t dest, const void *const src, const size_t len) { cortexar_priv_s *const priv = (cortexar_priv_s *)target->priv; - DEBUG_TARGET("%s: Writing %zu bytes @0x%" PRIx32 "\n", __func__, len, dest); + DEBUG_PROTO("%s: Writing %zu bytes @0x%" PRIx32 ":", __func__, len, dest); +#ifndef DEBUG_PROTO_IS_NOOP + const uint8_t *const data = (const uint8_t *)src; +#endif + for (size_t offset = 0; offset < len; ++offset) { + if (offset == 16U) + break; + DEBUG_PROTO(" %02x", data[offset]); + } + if (len > 16U) + DEBUG_PROTO(" ..."); + DEBUG_PROTO("\n"); + /* Cache DFSR and DFAR in case we wind up triggering a data fault */ const uint32_t fault_status = cortexar_coproc_read(target, CORTEXAR_DFSR); const uint32_t fault_addr = cortexar_coproc_read(target, CORTEXAR_DFAR); From 358fd7f368d3d89ada3cad0d9b9d44d7cfc879bc Mon Sep 17 00:00:00 2001 From: dragonmux Date: Sat, 16 Dec 2023 03:08:15 +0000 Subject: [PATCH 2/3] cortexar: Implemented proto level diagnostics in `cortexar_mem_read()` --- src/target/cortexar.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/target/cortexar.c b/src/target/cortexar.c index 6fac48774fb..8182e26ce8a 100644 --- a/src/target/cortexar.c +++ b/src/target/cortexar.c @@ -1000,6 +1000,19 @@ static void cortexar_mem_read(target_s *const target, void *const dest, const ta cortexr_mem_read_slow(target, (uint8_t *)dest, src, len); /* Deal with any data faults that occured */ cortexr_mem_handle_fault(target, __func__, fault_status, fault_addr); + + DEBUG_PROTO("%s: Reading %zu bytes @0x%" PRIx32 ":", __func__, len, src); +#ifndef DEBUG_PROTO_IS_NOOP + const uint8_t *const data = (const uint8_t *)dest; +#endif + for (size_t offset = 0; offset < len; ++offset) { + if (offset == 16U) + break; + DEBUG_PROTO(" %02x", data[offset]); + } + if (len > 16U) + DEBUG_PROTO(" ..."); + DEBUG_PROTO("\n"); } /* Fast path for cortexar_mem_write(). Assumes the address to read data from is already loaded in r0. */ From 77e98cae609c6dd1f2595ac6eb7ebddf0cdf1796 Mon Sep 17 00:00:00 2001 From: dragonmux Date: Wed, 20 Dec 2023 09:51:57 +0000 Subject: [PATCH 3/3] cortexar: Implemented proto level diagnostics for the coprocessor read/write routines --- src/target/cortexar.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/target/cortexar.c b/src/target/cortexar.c index 8182e26ce8a..0e453eac62a 100644 --- a/src/target/cortexar.c +++ b/src/target/cortexar.c @@ -556,11 +556,14 @@ static uint32_t cortexar_coproc_read(target_s *const target, const uint8_t copro cortexar_run_insn(target, ARM_MRC_INSN | ENCODE_CP_ACCESS(coproc & 0xfU, (op >> 8U) & 0x7U, 0U, (op >> 4U) & 0xfU, op & 0xfU, (op >> 12U) & 0x7U)); - return cortexar_core_reg_read(target, 0U); + const uint32_t result = cortexar_core_reg_read(target, 0U); + DEBUG_PROTO("%s: coproc %u (%04x): %08" PRIx32 "\n", __func__, coproc, op, result); + return result; } static void cortexar_coproc_write(target_s *const target, const uint8_t coproc, const uint16_t op, const uint32_t value) { + DEBUG_PROTO("%s: coproc %u (%04x): %08" PRIx32 "\n", __func__, coproc, op, value); /* * Perform a write of a coprocessor - which one (between 0 and 15) is given by the coproc parameter * and which register of the coprocessor to write and the operands required is given by op.