From ce13ce299d8bd73c61d4cefa7b64fde38ab33ea4 Mon Sep 17 00:00:00 2001 From: dragonmux Date: Sun, 28 Apr 2024 16:02:35 +0100 Subject: [PATCH] stm32l4: Fixed the clang-format lints from CI --- src/target/stm32l4.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/target/stm32l4.c b/src/target/stm32l4.c index 9a7f506d431..0c9a4f7d82b 100644 --- a/src/target/stm32l4.c +++ b/src/target/stm32l4.c @@ -151,7 +151,7 @@ const command_s stm32l4_cmd_list[] = { #define RAM_COUNT_MSK 0x07U /* TODO: add block size constants for other MCUs */ -#define STM32U5_FLASH_BLOCK_SIZE 0x2000U +#define STM32U5_FLASH_BLOCK_SIZE 0x2000U typedef enum stm32l4_device_id { /* This first block of devices uses an ID code register located in the DBG_MCU block at 0xe0042000 */ @@ -702,11 +702,14 @@ static bool stm32l4_attach(target_s *const t) if (options & OR_DUALBANK) { const uint32_t bank_len = flash_len * 512U; if (device->family == STM32L4_FAMILY_U5xx) { - stm32l4_add_flash(t, STM32L4_FLASH_BANK_1_BASE, bank_len, STM32U5_FLASH_BLOCK_SIZE, STM32L4_FLASH_BANK_1_BASE + bank_len); - stm32l4_add_flash(t, STM32L4_FLASH_BANK_1_BASE + bank_len, bank_len, STM32U5_FLASH_BLOCK_SIZE, STM32L4_FLASH_BANK_1_BASE + bank_len); + stm32l4_add_flash(t, STM32L4_FLASH_BANK_1_BASE, bank_len, STM32U5_FLASH_BLOCK_SIZE, + STM32L4_FLASH_BANK_1_BASE + bank_len); + stm32l4_add_flash(t, STM32L4_FLASH_BANK_1_BASE + bank_len, bank_len, STM32U5_FLASH_BLOCK_SIZE, + STM32L4_FLASH_BANK_1_BASE + bank_len); } else { stm32l4_add_flash(t, STM32L4_FLASH_BANK_1_BASE, bank_len, 0x0800, STM32L4_FLASH_BANK_1_BASE + bank_len); - stm32l4_add_flash(t, STM32L4_FLASH_BANK_1_BASE + bank_len, bank_len, 0x0800, STM32L4_FLASH_BANK_1_BASE + bank_len); + stm32l4_add_flash( + t, STM32L4_FLASH_BANK_1_BASE + bank_len, bank_len, 0x0800, STM32L4_FLASH_BANK_1_BASE + bank_len); } } else { const uint32_t bank_len = flash_len * 1024U;