From bc019cb913d25dc482695059fb9fa6deea8460be Mon Sep 17 00:00:00 2001 From: buxiasen Date: Thu, 17 Oct 2024 15:26:20 +0800 Subject: [PATCH] arm/lc823450: use custom vectors to make smp_call work with exception_common Signed-off-by: buxiasen --- arch/arm/Kconfig | 1 + arch/arm/src/lc823450/Make.defs | 2 +- arch/arm/src/lc823450/lc823450_vectors.c | 112 +++++++++++++++++++++++ 3 files changed, 114 insertions(+), 1 deletion(-) create mode 100644 arch/arm/src/lc823450/lc823450_vectors.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2748ee7c7944b..64328c0006a60 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -221,6 +221,7 @@ config ARCH_CHIP_LC823450 select ARCH_HAVE_HEAPCHECK select ARCH_HAVE_MULTICPU select ARCH_HAVE_I2CRESET + select ARCH_HAVE_CUSTOM_VECTORS ---help--- ON Semiconductor LC823450 architectures (ARM dual Cortex-M3) diff --git a/arch/arm/src/lc823450/Make.defs b/arch/arm/src/lc823450/Make.defs index 590e6d02e259c..c3b756b19e2af 100644 --- a/arch/arm/src/lc823450/Make.defs +++ b/arch/arm/src/lc823450/Make.defs @@ -22,7 +22,7 @@ include armv7-m/Make.defs CHIP_CSRCS = lc823450_allocateheap2.c lc823450_start.c lc823450_irq.c lc823450_timer.c CHIP_CSRCS += lc823450_lowputc.c lc823450_serial.c lc823450_clockconfig.c -CHIP_CSRCS += lc823450_syscontrol.c lc823450_gpio.c +CHIP_CSRCS += lc823450_syscontrol.c lc823450_gpio.c lc823450_vectors.c # Configuration-dependent LC823450 files diff --git a/arch/arm/src/lc823450/lc823450_vectors.c b/arch/arm/src/lc823450/lc823450_vectors.c new file mode 100644 index 0000000000000..aa60916281a97 --- /dev/null +++ b/arch/arm/src/lc823450/lc823450_vectors.c @@ -0,0 +1,112 @@ +/**************************************************************************** + * arch/arm/src/lc823450/lc823450_vectors.c + * + * Copyright (C) 2012 Michael Smith. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip.h" +#include "arm_internal.h" +#include "ram_vectors.h" +#include "nvic.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define IDLE_STACK (_ebss + CONFIG_IDLETHREAD_STACKSIZE) + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Chip-specific entrypoint */ + +extern void __start(void); + +static void start(void) +{ + /* Zero lr to mark the end of backtrace */ + + asm volatile ("mov lr, #0\n\t" + "b __start\n\t"); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Common exception entrypoint */ + +extern void exception_common(void); +extern void exception_direct(void); + +/**************************************************************************** + * Public data + ****************************************************************************/ + +/* The v7m vector table consists of an array of function pointers, with the + * first slot (vector zero) used to hold the initial stack pointer. + * + * As all exceptions (interrupts) are routed via exception_common, we just + * need to fill this array with pointers to it. + * + * Note that the [ ... ] designated initializer is a GCC extension. + */ + +const void * const _vectors[] locate_data(".vectors") + aligned_data(VECTAB_ALIGN) = +{ + /* Initial stack */ + + IDLE_STACK, + + /* Reset exception handler */ + + start, + + /* Vectors 2 - n point directly at the generic handler */ + + [2 ... NVIC_IRQ_PENDSV] = &exception_common, + [(NVIC_IRQ_PENDSV + 1) ... (LC823450_IRQ_SMP_CALL_01 - 1)] + = &exception_direct, + [LC823450_IRQ_SMP_CALL_01] = &exception_common, + [(LC823450_IRQ_SMP_CALL_01 + 1) ... (LC823450_IRQ_SMP_CALL_11 - 1)] + = &exception_direct, + [LC823450_IRQ_SMP_CALL_11] = &exception_common, + [(LC823450_IRQ_SMP_CALL_11 + 1) ... (15 + ARMV7M_PERIPHERAL_INTERRUPTS)] + = &exception_direct +};