Fix Serial APB Clock Sources

The apbclock sources for lpuart1, usart6, usart10, and usart11 were set to the wrong PCLK (default).

arch/arm/src/stm32h5/stm32_serial.c

@@ -479,7 +479,7 @@ static struct stm32_serial_s g_lpuart1priv =
   .bits          = CONFIG_LPUART1_BITS,
   .stopbits2     = CONFIG_LPUART1_2STOP,
   .baud          = CONFIG_LPUART1_BAUD,
-  .apbclock      = STM32_PCLK2_FREQUENCY,
+  .apbclock      = STM32_PCLK3_FREQUENCY,
   .usartbase     = STM32_LPUART1_BASE,
   .tx_gpio       = GPIO_LPUART1_TX,
   .rx_gpio       = GPIO_LPUART1_RX,
@@ -849,7 +849,7 @@ static struct stm32_serial_s g_usart6priv =
   .bits          = CONFIG_USART6_BITS,
   .stopbits2     = CONFIG_USART6_2STOP,
   .baud          = CONFIG_USART6_BAUD,
-  .apbclock      = STM32_PCLK2_FREQUENCY,
+  .apbclock      = STM32_PCLK1_FREQUENCY,
   .usartbase     = STM32_USART6_BASE,
   .tx_gpio       = GPIO_USART6_TX,
   .rx_gpio       = GPIO_USART6_RX,
@@ -1097,7 +1097,7 @@ static struct stm32_serial_s g_usart10priv =
   .bits          = CONFIG_USART10_BITS,
   .stopbits2     = CONFIG_USART10_2STOP,
   .baud          = CONFIG_USART10_BAUD,
-  .apbclock      = STM32_PCLK2_FREQUENCY,
+  .apbclock      = STM32_PCLK1_FREQUENCY,
   .usartbase     = STM32_USART10_BASE,
   .tx_gpio       = GPIO_USART10_TX,
   .rx_gpio       = GPIO_USART10_RX,
@@ -1159,7 +1159,7 @@ static struct stm32_serial_s g_usart11priv =
   .bits          = CONFIG_USART11_BITS,
   .stopbits2     = CONFIG_USART11_2STOP,
   .baud          = CONFIG_USART11_BAUD,
-  .apbclock      = STM32_PCLK2_FREQUENCY,
+  .apbclock      = STM32_PCLK1_FREQUENCY,
   .usartbase     = STM32_USART11_BASE,
   .tx_gpio       = GPIO_USART11_TX,
   .rx_gpio       = GPIO_USART11_RX,