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13 Open 18 Closed
13 Open 18 Closed
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Issues list

MemoryMap should allow adding windows with a larger granularity than the parent improvement meta:needs-rfc
#97 opened Jul 17, 2024 by zyp
2
Monotonic clock feature
#90 opened Jun 4, 2024 by whitequark
@jfng
Tracking issue for RFC 49: GPIO peripheral
#77 opened Mar 8, 2024 by jfng
1 of 3 tasks
@jfng
The README should be updated improvement
#71 opened Feb 9, 2024 by jfng
@jfng
Tracking issue for RFC 16: CSR register API
#68 opened Feb 6, 2024 by jfng
2 of 4 tasks
@jfng
Resources on dense memory windows must be sized multiples of "parent" data_width?
#39 opened Mar 30, 2023 by chenz
Should wishbone.Decoder generate bus errors for unmapped addresses? improvement
#38 opened Mar 27, 2023 by chenz
5
[pre?-RFC] Generic constant-frequency enable generator design
#37 opened Feb 15, 2023 by galibert
4
Constructing Wishbone interface with a single memory window is overly complex / uses redundant parameters question
#36 opened Feb 14, 2023 by galibert
12
[pre-RFC] Ideas for an I2C peripheral interface on Wishbone design
#34 opened Feb 14, 2023 by galibert
2
PyPi package is empty question
#33 opened Dec 21, 2021 by hansfbaier
1
Wishbone access from initiator bus with data_width smaller than the one of the subordinate bus. question
#18 opened Jun 24, 2020 by Fatsie
9
Peripheral API design: exposing bus interfaces meta:needs-rfc question
#10 opened Feb 19, 2020 by jfng
7
ProTip! Follow long discussions with comments:>50.