-
Notifications
You must be signed in to change notification settings - Fork 26
/
spiF0.cpp
191 lines (160 loc) · 3.04 KB
/
spiF0.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
/**
* @file spiF0.cpp
*
* @date 12.12.2015
* @author Andre
* @description
*/
#include "spiF0.hpp"
bool SPI::initClock()
{
bool clockEnabled = true;
// init clocks
if (_spi == SPI1)
{
RCC->APB2ENR |= RCC_APB2Periph_SPI1;
}
else if (_spi == SPI2)
{
RCC->APB1ENR |= RCC_APB1Periph_SPI2;
}
else
{
clockEnabled = false;
}
return clockEnabled;
}
bool SPI::init()
{
// deinit before init
if (true == _init)
deinit();
// enable peripheral clock
if (false == initClock())
return false;
// configure SPI
reconfigure();
_init = true;
return _init;
}
void SPI::reconfigure()
{
// Reset peripheral
if (_spi == SPI1)
{
RCC->APB2RSTR |= RCC_APB2Periph_SPI1;
RCC->APB2RSTR &= ~RCC_APB2Periph_SPI1;
}
else if (_spi == SPI2)
{
RCC->APB1RSTR |= RCC_APB1Periph_SPI2;
RCC->APB1RSTR &= ~RCC_APB1Periph_SPI2;
}
// apply new configuration
uint16_t cr1 = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM | ((_prescaler & 0x07) << 3);
// MSB or LSB first
if (true == _firstBitLSB)
{
cr1 |= SPI_CR1_LSBFIRST;
}
// CPOL/CPHA
if (true == _cpol)
{
cr1 |= SPI_CR1_CPOL;
}
if (true == _cpha)
{
cr1 |= SPI_CR1_CPHA;
}
// control 1 register
_spi->CR1 = cr1;
// RXNE flag after 1 byte (quarter FIFO)
uint16_t cr2 = SPI_CR2_FRXTH;
// set frame length
if (8 == _bits)
{
cr2 |= SPI_DataSize_8b;
}
else if (16 == _bits)
{
cr2 |= SPI_DataSize_16b;
}
// control 2 register
_spi->CR2 = cr2;
// enable SPI
_spi->CR1 |= SPI_CR1_SPE;
}
void SPI::deinit()
{
// fixme: check if transfer is pending
if (_spi == SPI1)
{
RCC->APB2RSTR |= RCC_APB2Periph_SPI1;
RCC->APB2RSTR &= ~RCC_APB2Periph_SPI1;
RCC->APB2ENR &= ~RCC_APB2Periph_SPI1;
}
else if (_spi == SPI2)
{
RCC->APB1RSTR |= RCC_APB1Periph_SPI2;
RCC->APB1RSTR &= ~RCC_APB1Periph_SPI2;
RCC->APB1ENR &= ~RCC_APB1Periph_SPI2;
}
_init = false;
}
uint16_t SPI::transfer(uint16_t data)
{
// SPI must be init'd
if (false == _init)
return 0;
// wait for TX buffer empty (transfer finished)
while ((_spi->SR & SPI_I2S_FLAG_TXE) == RESET);
// transfer
if (8 == _bits)
{
// 8 bit write operation!
*(uint8_t*)&(_spi->DR) = data & 0xFF;
}
else
{
// 16 bit write operation
_spi->DR = data;
}
// wait for RX buffer full (transfer finished)
while ((_spi->SR & SPI_I2S_FLAG_RXNE) == RESET);
// get received data
if (8 == _bits)
{
// 8 bit read operation!
data = *(uint8_t*)&(_spi->DR) & 0xFF;
}
else
{
// 16 bit read operation
data = _spi->DR;
}
return data;
}
/**
* Select the device.
*
* Can be used if only one device shall be addressed.
*
* @note Can only be used if configureCS() has been called before.
*/
void SPI::select()
{
if (_csGPIO != 0)
_csGPIO->BRR = _csPin;
}
/**
* Release the device.
*
* Can be used if only one device shall be addressed.
*
* @note Can only be used if configureCS() has been called before.
*/
void SPI::unselect()
{
if (_csGPIO != 0)
_csGPIO->BSRR = _csPin;
}