From 07dbd78eb8020ffc57559a4bf454d11ebc3d4cc5 Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Thu, 25 Apr 2024 20:14:38 -0300 Subject: [PATCH] stm32f777zit6-meadow: Add audio support (CS4344) --- .../configs/i2s/defconfig | 113 ++++++++++++++++++ .../stm32f777zit6-meadow/include/board.h | 39 +++++- .../stm32f777zit6-meadow/src/stm32_bringup.c | 19 +++ 3 files changed, 167 insertions(+), 4 deletions(-) create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/configs/i2s/defconfig diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/configs/i2s/defconfig b/boards/arm/stm32f7/stm32f777zit6-meadow/configs/i2s/defconfig new file mode 100644 index 0000000000000..e2286b77cfcce --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/configs/i2s/defconfig @@ -0,0 +1,113 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_STM32F7_USE_LEGACY_PINMAP is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f777zit6-meadow" +CONFIG_ARCH_BOARD_MEADOW_F7MICRO=y +CONFIG_ARCH_CHIP="stm32f7" +CONFIG_ARCH_CHIP_STM32F777ZI=y +CONFIG_ARCH_CHIP_STM32F7=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_DTCM=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_AUDIO=y +CONFIG_AUDIO_CS4344=y +CONFIG_AUDIO_EXCLUDE_TONE=y +CONFIG_AUDIO_EXCLUDE_VOLUME=y +CONFIG_AUDIO_I2S=y +CONFIG_BCH=y +CONFIG_BOARDCTL_ROMDISK=y +CONFIG_BOARDCTL_USBDEVCTRL=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=43103 +CONFIG_BUILTIN=y +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_PRODUCTID=0x0001 +CONFIG_CDCACM_PRODUCTSTR="Wilderness Labs" +CONFIG_CDCACM_VENDORID=0x2E6A +CONFIG_CDCACM_VENDORSTR="Meadow F7 Micro" +CONFIG_CRYPTO=y +CONFIG_CRYPTO_RANDOM_POOL=y +CONFIG_DEBUG_AUDIO=y +CONFIG_DEBUG_AUDIO_ERROR=y +CONFIG_DEBUG_AUDIO_INFO=y +CONFIG_DEBUG_AUDIO_WARN=y +CONFIG_DEBUG_DMA=y +CONFIG_DEBUG_DMA_ERROR=y +CONFIG_DEBUG_DMA_INFO=y +CONFIG_DEBUG_DMA_WARN=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_I2S=y +CONFIG_DEBUG_I2S_ERROR=y +CONFIG_DEBUG_I2S_INFO=y +CONFIG_DEBUG_I2S_WARN=y +CONFIG_DEBUG_SCHED=y +CONFIG_DEBUG_SCHED_ERROR=y +CONFIG_DEBUG_SCHED_WARN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEV_URANDOM=y +CONFIG_DEV_URANDOM_RANDOM_POOL=y +CONFIG_DRIVERS_AUDIO=y +CONFIG_FS_PROCFS=y +CONFIG_FS_TMPFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_I2S=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_MEMFD_ERROR=y +CONFIG_MM_REGIONS=3 +CONFIG_MTD=y +CONFIG_MTD_BYTE_WRITE=y +CONFIG_MTD_PARTITION=y +CONFIG_MTD_SECT512=y +CONFIG_MTD_W25QXXXJV=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_DISABLE_PS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAM_SIZE=245760 +CONFIG_RAM_START=0x20010000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SPI=y +CONFIG_START_DAY=14 +CONFIG_STM32F7_DMA1=y +CONFIG_STM32F7_I2S2=y +CONFIG_STM32F7_I2S2_MCK=y +CONFIG_STM32F7_I2S2_TX=y +CONFIG_STM32F7_OTGFS=y +CONFIG_STM32F7_QSPI_POLLING=y +CONFIG_STM32F7_QUADSPI=y +CONFIG_STM32F7_USART1=y +CONFIG_SYSLOG_DEFAULT=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS1" +CONFIG_SYSLOG_MAX_CHANNELS=2 +CONFIG_SYSTEM_FLASH_ERASEALL=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_SYSTEM_ZMODEM=y +CONFIG_SYSTEM_ZMODEM_PKTBUFSIZE=1024 +CONFIG_SYSTEM_ZMODEM_RCVBUFSIZE=1024 +CONFIG_SYSTEM_ZMODEM_SNDBUFSIZE=1024 +CONFIG_TASK_NAME_SIZE=64 +CONFIG_USBDEV=y +CONFIG_W25QXXXJV_QSPI_FREQUENCY=64000000 diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h b/boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h index 9c054cd020149..b54790dd58fa8 100644 --- a/boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h @@ -152,6 +152,13 @@ #define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(2) #define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2) +/* SAIx input frequency = 25 / M * N / Q / P + * 25000000 / 25 * 384 / 2 / 8 + */ + +#define STM32F7_SAI1_FREQUENCY (49142857) +#define STM32F7_SAI2_FREQUENCY (49142857) + /* Configure Dedicated Clock Configuration Register */ #define STM32_RCC_DCKCFGR1_PLLI2SDIVQ RCC_DCKCFGR1_PLLI2SDIVQ(1) @@ -163,12 +170,13 @@ #define STM32_RCC_DCKCFGR1_DFSDM1SRC 0 #define STM32_RCC_DCKCFGR1_ADFSDM1SRC 0 -/* Configure factors for PLLI2S clock */ +/* Configure factors for PLLI2S clock */ +#define CONFIG_STM32F7_PLLI2S 1 #define STM32_RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN(192) -#define STM32_RCC_PLLI2SCFGR_PLLI2SP RCC_PLLI2SCFGR_PLLI2SP(2) -#define STM32_RCC_PLLI2SCFGR_PLLI2SQ RCC_PLLI2SCFGR_PLLI2SQ(2) -#define STM32_RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR(2) +#define STM32_RCC_PLLI2SCFGR_PLLI2SP RCC_PLLI2SCFGR_PLLI2SP(4) +#define STM32_RCC_PLLI2SCFGR_PLLI2SQ RCC_PLLI2SCFGR_PLLI2SQ(4) +#define STM32_RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR(4) /* Configure Dedicated Clock Configuration Register 2 */ @@ -377,6 +385,10 @@ /* DMA Channel/Stream Selections ********************************************/ +#define DMACHAN_SAI2_A DMAMAP_SAI2_A +#define DMACHAN_SAI2_B DMAMAP_SAI2_B +#define DMACHAN_SAI1_B DMAMAP_SAI1_B + /* SDMMC */ /* Stream selections are arbitrary for now but might become important in the @@ -470,6 +482,25 @@ #define GPIO_I2C1_SCL (GPIO_I2C1_SCL_1|GPIO_SPEED_50MHz) #define GPIO_I2C1_SDA (GPIO_I2C1_SDA_1|GPIO_SPEED_50MHz) +/* Dumb definition to SPI2, just because it is needed by i2s driver */ + +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_5 +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_3 +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_3 + +#define DMAMAP_SPI2_TX DMAMAP_SPI2_TX_2 +#define DMAMAP_SPI2_RX DMAMAP_SPI2_RX_2 + +/* I2S2 - CS4344 configuration uses I2S2 */ + +#define GPIO_I2S2_SD (GPIO_I2S2_SD_1) /* PB15 */ +#define GPIO_I2S2_CK (GPIO_I2S2_CK_3) /* PB13 */ +#define GPIO_I2S2_WS (GPIO_I2S2_WS_1) /* PB12 */ +#define GPIO_I2S2_MCK (GPIO_I2S2_MCK_0) /* PC6 */ + +#define DMACHAN_I2S2_RX DMAMAP_SPI2_RX_2 +#define DMACHAN_I2S2_TX DMAMAP_SPI2_TX_2 + /* QSPI Mapping */ #define GPIO_QSPI_CS (GPIO_QUADSPI_BK1_NCS_2 | GPIO_FLOAT | GPIO_PUSHPULL | GPIO_SPEED_100MHz) diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c index 7c0b50331efab..601233061b33b 100644 --- a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c @@ -32,6 +32,15 @@ #include #include +#include + +#ifdef CONFIG_AUDIO_CS4344 +# include "stm32_cs4344.h" +#endif + +#include "chip.h" +#include "stm32_gpio.h" +#include "stm32_rcc.h" #include "stm32f777zit6-meadow.h" @@ -139,6 +148,16 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_AUDIO_CS4344 + /* Configure CS4344 audio as /dev/pcm0 on I2S2 */ + + ret = board_cs4344_initialize(1, 2); + if (ret != OK) + { + syslog(LOG_ERR, "Failed to initialize CS4344 audio: %d\n", ret); + } +#endif + #ifdef CONFIG_BOARD_MEADOW_F7_CORE_COMPUTE /* Initialize all devices in the F7 Core Compute */