From f2ad4b897e8d25d0f5531e83c36a4684d38326b6 Mon Sep 17 00:00:00 2001 From: max Date: Tue, 19 Dec 2023 22:20:54 -0600 Subject: [PATCH] fix tests --- include/aie/Dialect/AIE/IR/AIEOps.td | 2 +- python/dialects/aie.py | 1 + .../MM_2x2/circuit_switched_version/aie.mlir | 398 +- .../aie.mlir | 172 +- .../MM_2x2/packet_switched_version/aie.mlir | 428 +- reference_designs/autocorrelation/aie.mlir | 223 +- .../objectFifo_version/aie.mlir | 118 +- .../aie.mlir | 94 +- .../aie_fp32.mlir | 94 +- .../HDIFF_single_AIE_objectFIFO/aie.mlir | 50 +- .../HDIFF_single_AIE_objectFIFO/aie_fp32.mlir | 52 +- .../aie.mlir | 50 +- .../aie_fp32.mlir | 52 +- .../aie.mlir | 1312 +- .../aie.mlir | 132 +- .../aie_fp32.mlir | 130 +- .../aie.mlir | 510 +- .../aie_1.mlir | 510 +- .../aie_16.mlir | 7728 ++++---- .../aie_2.mlir | 1020 +- .../aie_3.mlir | 1532 +- .../aie_32.mlir | 15456 ++++++++-------- .../aie_4.mlir | 2042 +- .../aie_8.mlir | 3878 ++-- reference_designs/idct/aie.mlir | 296 +- .../aie.mlir | 76 +- .../passthrough/aie2_lineBased_8b_1080.mlir | 32 +- .../passthrough/aie2_lineBased_8b_8k.mlir | 36 +- .../passthrough/aie2_lineBased_8b_tiny.mlir | 32 +- reference_designs/prime_sieve_large/aie.mlir | 7198 +++---- test/Conversion/DmaToIpu/aiert_insts.mlir | 18 +- test/Conversion/DmaToIpu/bad_rtp_write.mlir | 8 +- test/Conversion/DmaToIpu/dma_to_ipu.mlir | 14 +- test/Conversion/DmaToIpu/push_to_queue.mlir | 14 +- test/Conversion/DmaToIpu/rtp_write.mlir | 18 +- test/Integration/julia_by_lines/aie.mlir | 16 +- .../Targets/AIEGenerateCDO/packet_header.mlir | 78 +- test/Targets/AIEGenerateJSON/shim_alloc.mlir | 10 +- test/Targets/AIEGenerateTargetArch/aie.mlir | 2 +- test/Targets/AIEGenerateTargetArch/aie2.mlir | 4 +- test/Targets/AIEGenerateXAIE/aie2_nd_DMA.mlir | 60 +- .../Targets/AIEGenerateXAIE/aie2_tileDMA.mlir | 24 +- .../AIEGenerateXAIE/aie2_tileDMA2.mlir | 24 +- .../AIEGenerateXAIE/aie2_tileDMA3.mlir | 24 +- .../AIEGenerateXAIE/aie2_tileDMA_locks.mlir | 60 +- test/Targets/AIEGenerateXAIE/memTileDMA.mlir | 62 +- test/Targets/AIEGenerateXAIE/memTileDMA2.mlir | 44 +- .../AIEGenerateXAIE/packet_drop_header.mlir | 74 +- .../AIEGenerateXAIE/packet_shim_header.mlir | 68 +- test/Targets/AIEGenerateXAIE/plio_shim.mlir | 20 +- .../Targets/AIEGenerateXAIE/plio_shimmux.mlir | 20 +- test/Targets/AIEGenerateXAIE/shim.mlir | 64 +- .../AIEGenerateXAIE/shim_dma_packet.mlir | 24 +- test/Targets/AIEGenerateXAIE/shimmux.mlir | 8 +- .../test_error_dma_multi_lock.mlir | 24 +- .../test_error_dma_multi_state.mlir | 22 +- .../test_error_shimdma_multi_lock.mlir | 24 +- .../test_error_shimdma_multi_state.mlir | 22 +- .../AIEGenerateXAIE/test_explicit_elf.mlir | 8 +- .../AIEGenerateXAIE/test_herd_xaie0.mlir | 170 +- .../AIEGenerateXAIE/test_lock_init.mlir | 6 +- .../AIEGenerateXAIE/test_ps0_xaie.mlir | 34 +- .../AIEGenerateXAIE/test_ps1_xaie.mlir | 42 +- .../AIEGenerateXAIE/test_ps2_xaie.mlir | 42 +- .../AIEGenerateXAIE/test_ps3_xaie.mlir | 44 +- .../AIEGenerateXAIE/test_ps4_xaie.mlir | 48 +- .../AIEGenerateXAIE/test_ps5_xaie.mlir | 54 +- .../AIEGenerateXAIE/test_ps6_xaie.mlir | 54 +- .../AIEGenerateXAIE/test_ps7_xaie.mlir | 48 +- test/Targets/AIEGenerateXAIE/test_xaie1.mlir | 24 +- test/Targets/AIEGenerateXAIE/test_xaie2.mlir | 34 +- test/Targets/AIEGenerateXAIE/test_xaie3.mlir | 24 +- test/Targets/AIEGenerateXAIE/test_xaie4.mlir | 38 +- test/Targets/AIEGenerateXAIE/tileDMA.mlir | 38 +- test/Targets/IPU/ipu_instgen.mlir | 8 +- test/aiecc/simple.mlir | 8 +- test/aiecc/simple_aie2.mlir | 10 +- test/assign-buffer-addresses/error.mlir | 24 +- .../memtile_error.mlir | 12 +- .../memtile_simple.mlir | 12 +- test/assign-buffer-addresses/simple.mlir | 30 +- test/assign-lock-ids/assign-lockIDs.mlir | 182 +- test/assign-lock-ids/invalid.mlir | 96 +- .../01_DDR_SHIM_LM_FillRate/aie.mlir | 56 +- .../02_LM_SHIM_DDR_FillRate/aie.mlir | 52 +- test/benchmarks/03_Flood_DDR/aie.mlir | 824 +- .../benchmarks/04_Tile_Tile_FillRate/aie.mlir | 48 +- test/benchmarks/05_Core_Startup/aie.mlir | 8 +- test/benchmarks/06_Buffer_Store/aie.mlir | 8 +- test/benchmarks/07_Lock_Acquire/aie.mlir | 10 +- test/benchmarks/08_Lock_Release/aie.mlir | 10 +- .../09_Shim_Broadcast_Horizontal/aie.mlir | 12 +- .../10_Tile_Broadcast_Horizontal/aie.mlir | 6 +- .../11_Tile_Broadcast_Vertical/aie.mlir | 8 +- test/benchmarks/12_Stream_Delay/aie.mlir | 56 +- test/benchmarks/13_Program_Counter/aie.mlir | 8 +- test/benchmarks/14_Timer/aie.mlir | 8 +- .../canonicalize-device.mlir | 34 +- test/convolution.mlir | 80 +- test/convolution2.mlir | 98 +- .../test_broad_packet.mlir | 54 +- test/create-cores/duplicate_dma.mlir | 32 +- test/create-cores/hello_world.mlir | 74 +- test/create-cores/test_core0.mlir | 14 +- test/create-cores/test_core1.mlir | 16 +- test/create-cores/test_dma0.mlir | 74 +- test/create-cores/test_dma1.mlir | 132 +- test/create-cores/test_dma2.mlir | 134 +- test/create-cores/test_dma3.mlir | 120 +- test/create-flows/broadcast.mlir | 106 +- test/create-flows/flow_test_1.mlir | 146 +- test/create-flows/flow_test_2.mlir | 166 +- test/create-flows/flow_test_3.mlir | 174 +- test/create-flows/many_flows.mlir | 102 +- test/create-flows/many_flows2.mlir | 102 +- test/create-flows/maxiter_err_test.mlir | 120 +- test/create-flows/memtile.mlir | 66 +- .../memtile_routing_constraints.mlir | 46 +- test/create-flows/mmult.mlir | 408 +- test/create-flows/more_flows_shim.mlir | 98 +- test/create-flows/over_flows.mlir | 106 +- test/create-flows/routed_herd_3x1.mlir | 410 +- test/create-flows/routed_herd_3x2.mlir | 516 +- test/create-flows/simple.mlir | 24 +- test/create-flows/simple2.mlir | 14 +- test/create-flows/simple_flows.mlir | 22 +- test/create-flows/simple_flows2.mlir | 22 +- test/create-flows/simple_flows_shim.mlir | 72 +- test/create-flows/unit_broadcast.mlir | 460 +- test/create-flows/unit_fixed_connections.mlir | 374 +- test/create-flows/unit_flow_test_1.mlir | 858 +- test/create-flows/unit_flow_test_2.mlir | 458 +- test/create-flows/unit_flow_test_3.mlir | 934 +- test/create-flows/unit_many_flows.mlir | 634 +- test/create-flows/unit_many_flows2.mlir | 590 +- test/create-flows/unit_maxiter_err_test.mlir | 120 +- test/create-flows/unit_memtile.mlir | 130 +- .../unit_memtile_routing_constraints.mlir | 46 +- test/create-flows/unit_mmult.mlir | 1074 +- test/create-flows/unit_more_flows_shim.mlir | 98 +- test/create-flows/unit_over_flows.mlir | 382 +- test/create-flows/unit_routed_herd_3x1.mlir | 1486 +- test/create-flows/unit_routed_herd_3x2.mlir | 1754 +- test/create-flows/unit_simple.mlir | 62 +- test/create-flows/unit_simple2.mlir | 44 +- test/create-flows/unit_simple_flows.mlir | 42 +- test/create-flows/unit_simple_flows2.mlir | 62 +- test/create-flows/unit_simple_flows_shim.mlir | 72 +- test/create-flows/unit_vecmul_4x4.mlir | 6478 +++---- test/create-flows/vecmul_4x4.mlir | 1426 +- test/create-locks/test_lock0.mlir | 52 +- test/create-locks/test_lock1.mlir | 82 +- test/create-locks/test_lock2.mlir | 162 +- test/create-locks/test_lock3.mlir | 120 +- test/create-locks/test_lock4.mlir | 204 +- test/create-locks/test_lock5.mlir | 190 +- test/create-locks/test_lock6.mlir | 200 +- test/create-locks/test_lock7.mlir | 190 +- test/create-locks/test_lock_shimdma.mlir | 118 +- test/create-multicast/test_multicast.mlir | 42 +- .../circuit_and_packet_routing.mlir | 40 +- .../packet_routing_keep_pkt_header.mlir | 70 +- .../test_create_packet_flows0.mlir | 34 +- .../test_create_packet_flows1.mlir | 34 +- .../test_create_packet_flows2.mlir | 36 +- .../test_create_packet_flows3.mlir | 38 +- .../test_create_packet_flows4.mlir | 44 +- .../test_create_packet_flows5.mlir | 40 +- .../test_create_packet_flows6.mlir | 114 +- .../test_create_packet_flows_shim0.mlir | 40 +- .../test_create_packet_flows_shim1.mlir | 40 +- .../test_pktflow_weight_pusher.mlir | 450 +- test/dialect/AIE/badbuffer-ve2802.mlir | 14 +- test/dialect/AIE/badbuffer.mlir | 12 +- test/dialect/AIE/badcascade-vc1902.mlir | 12 +- test/dialect/AIE/badcascade-ve2802.mlir | 12 +- test/dialect/AIE/badconnect.mlir | 8 +- test/dialect/AIE/badcore.mlir | 8 +- test/dialect/AIE/badcore2.mlir | 10 +- test/dialect/AIE/badgetcascade-vc1902.mlir | 12 +- test/dialect/AIE/badgetcascade-ve2802.mlir | 12 +- test/dialect/AIE/badlock-vc1902.mlir | 6 +- test/dialect/AIE/badlock-ve2802.mlir | 8 +- test/dialect/AIE/badlock.mlir | 54 +- test/dialect/AIE/badlockdma.mlir | 20 +- test/dialect/AIE/badlockfunc.mlir | 10 +- test/dialect/AIE/badmem.mlir | 8 +- test/dialect/AIE/badmem_duplicatechannel.mlir | 12 +- test/dialect/AIE/badmem_toomanybds.mlir | 80 +- test/dialect/AIE/badmemtile_circ_sw.mlir | 10 +- test/dialect/AIE/badmemtile_pkt_sw.mlir | 16 +- test/dialect/AIE/badmemtiledma.mlir | 14 +- .../AIE/badmemtiledma_channel4buffer.mlir | 32 +- .../AIE/badmemtiledma_channel4lock.mlir | 38 +- .../AIE/badmemtiledma_duplicatechannel.mlir | 16 +- .../AIE/badmemtiledma_neighboraccess.mlir | 42 +- .../dialect/AIE/badshim_duplicatechannel.mlir | 12 +- test/dialect/AIE/badshim_notnoc.mlir | 12 +- test/dialect/AIE/badshim_toomanybds.mlir | 80 +- .../AIE/badswitchbox_dmanoc-vc1902.mlir | 10 +- .../badswitchbox_memtile_nofifo-ve2802.mlir | 10 +- .../badswitchbox_shimtile_nodma-ve2802.mlir | 10 +- test/dialect/AIE/badtile-ve2802.mlir | 6 +- test/dialect/AIE/badtile.mlir | 4 +- test/dialect/AIE/badtile2.mlir | 4 +- test/dialect/AIE/badtiledma.mlir | 60 +- test/dialect/AIE/badtiledma2.mlir | 58 +- test/dialect/AIE/badtiledma3.mlir | 58 +- test/dialect/AIE/badtrace_core-vc1902.mlir | 26 +- test/dialect/AIE/badtrace_core-ve2302.mlir | 26 +- test/dialect/AIE/badtrace_core-ve2802.mlir | 26 +- test/dialect/AIE/badtrace_memtile-ve2302.mlir | 26 +- test/dialect/AIE/badtrace_memtile-ve2802.mlir | 26 +- test/dialect/AIE/badtrace_shim-vc1902.mlir | 26 +- test/dialect/AIE/badtrace_shim-ve2302.mlir | 26 +- test/dialect/AIE/badtrace_shim-ve2802.mlir | 26 +- test/dialect/AIE/canonicalize-mem.mlir | 26 +- test/dialect/AIE/cascade-vc1902.mlir | 12 +- test/dialect/AIE/cascade-ve2802.mlir | 12 +- test/dialect/AIE/example0.mlir | 120 +- test/dialect/AIE/memory-affinity-vc1902.mlir | 34 +- test/dialect/AIE/memory-affinity-vc2302.mlir | 34 +- test/dialect/AIE/memory-affinity-vc2802.mlir | 38 +- test/dialect/AIE/memtiledma.mlir | 80 +- .../AIE/memtiledma_channel4buffer.mlir | 26 +- test/dialect/AIE/memtiledma_channel4lock.mlir | 32 +- .../AIE/memtiledma_neighboraccess.mlir | 40 +- test/dialect/AIE/nd-dma-oob.mlir | 22 +- test/dialect/AIE/nd-dma-too-many-dims-1.mlir | 16 +- test/dialect/AIE/nd-dma-too-many-dims-2.mlir | 16 +- test/dialect/AIE/shimdma.mlir | 76 +- test/dialect/AIE/simple-vc1902.mlir | 18 +- test/dialect/AIE/simple-ve2802.mlir | 18 +- test/dialect/AIE/simple.mlir | 14 +- test/dialect/AIE/switchbox-vc1902.mlir | 138 +- test/dialect/AIE/switchbox-ve2802.mlir | 154 +- test/dialect/AIE/tiledma.mlir | 76 +- test/dialect/AIEX/bad_ipu_nd_length.mlir | 6 +- test/dialect/AIEX/bad_ipu_nd_repeat.mlir | 6 +- test/dialect/AIEX/bad_ipu_nd_stride.mlir | 6 +- test/dialect/AIEX/bad_ipu_nd_type.mlir | 6 +- test/dialect/AIEX/bad_ipu_push_queue_bd.mlir | 6 +- .../AIEX/bad_ipu_push_queue_repeat.mlir | 6 +- test/dialect/AIEX/bad_ipu_write_bd_bd.mlir | 6 +- .../AIEX/bad_ipu_write_bd_it_wrap.mlir | 6 +- .../AIEX/bad_ipu_write_bd_stepsize.mlir | 6 +- test/dialect/AIEX/bad_ipu_write_bd_wrap.mlir | 6 +- test/example1.mlir | 30 +- test/find-flows/find_flows.mlir | 64 +- test/find-flows/id_check.mlir | 46 +- test/find-flows/id_check2.mlir | 46 +- test/find-flows/shim.mlir | 122 +- test/foldinterface.mlir | 16 +- test/generate-mmap/allocation_error.mlir | 10 +- test/generate-mmap/test_mmap0.mlir | 30 +- test/generate-mmap/test_mmap1.mlir | 14 +- test/generate-mmap/test_mmap2.mlir | 14 +- test/generate-mmap/test_mmap3.mlir | 22 +- test/generate-mmap/test_mmap4.mlir | 22 +- test/generate-mmap/test_mmap5.mlir | 22 +- test/herd-routing/test_herd_routing0.mlir | 96 +- test/herd-routing/test_herd_routing1.mlir | 296 +- test/herd-routing/test_herd_routing2.mlir | 30 +- test/herd.mlir | 10 +- test/ipu-xrt/add_one_objFifo/aie.mlir | 42 +- test/localize-locks/locks-ve2802.mlir | 124 +- test/localize-locks/locks1.mlir | 124 +- test/lower-to-standard/local_locks.mlir | 12 +- test/lower-to-standard/lower_buffer.mlir | 18 +- .../lower_buffer_and_lock.mlir | 26 +- test/lower-to-standard/lower_dma.mlir | 76 +- test/lower-to-standard/lower_event.mlir | 12 +- test/lower-to-standard/lower_stream.mlir | 28 +- test/lower-to-standard/useLock_in_func.mlir | 12 +- test/merge-buffers/test_buffer_merge0.mlir | 112 +- test/negative.mlir | 10 +- .../normalize_call_op.mlir | 6 +- .../base_test_1.aie.mlir | 28 +- .../base_test_2.aie.mlir | 46 +- .../base_test_3.aie.mlir | 56 +- .../base_test_4.aie.mlir | 50 +- .../base_test_5.aie.mlir | 38 +- .../nd_dma_test_aie2.mlir | 28 +- .../AIE2_cyclostatic_dma.mlir | 176 +- .../AIE2_cyclostatic_l1.mlir | 108 +- .../AIE2_cyclostatic_l2.mlir | 284 +- .../AIE2_delayed_release.mlir | 92 +- .../AIE2_delayed_release_inside_funcs.mlir | 42 +- .../AIE2_dynamic_locks.mlir | 82 +- .../AIE2_static_l1.mlir | 82 +- .../allocation_info_test.mlir | 40 +- .../base_test_AIE1.mlir | 98 +- .../base_test_AIE2.mlir | 94 +- .../broadcast_error_test.mlir | 16 +- .../broadcast_test.mlir | 384 +- .../cyclostatic_AIE2_sharedMem.mlir | 118 +- .../link_test_AIE1.mlir | 128 +- .../link_test_AIE2.mlir | 284 +- .../link_test_DDR_to_L1.mlir | 130 +- .../link_test_L1_to_DDR.mlir | 130 +- .../link_test_broadcast.mlir | 212 +- .../link_test_distribute.mlir | 242 +- .../link_test_join.mlir | 298 +- .../loop_test.aie.mlir | 96 +- .../matmul_test.mlir | 188 +- .../memTile_test.mlir | 76 +- .../nd_dma_base_AIE2.mlir | 184 +- .../nd_dma_distribute_AIE2.mlir | 174 +- .../nd_dma_distribute_AIE2_bad.mlir | 26 +- .../nd_dma_distribute_broadcast_AIE2_bad.mlir | 30 +- .../nd_dma_multiple_consumers_AIE2.mlir | 306 +- .../non_adjacency_test_1.mlir | 120 +- .../non_adjacency_test_2.mlir | 160 +- .../non_adjacency_test_AIE2.mlir | 120 +- .../register_external_buffers_test.mlir | 104 +- .../same_core_producer_consumer_test.mlir | 68 +- .../shimRow_mem_test.mlir | 104 +- .../shim_AIE2_test.mlir | 124 +- .../shim_broadcast_test.mlir | 144 +- .../subview_test_1.mlir | 82 +- .../subview_test_2.mlir | 160 +- .../subview_test_3.mlir | 160 +- .../tileDMA_test.mlir | 182 +- test/objectFifo_tests/broadcast/aie.mlir | 86 +- test/objectFifo_tests/ping_pong/aie.mlir | 36 +- .../tileDMA_channels/aie.mlir | 78 +- test/objectFifo_tests/twoFilter2D/aie.mlir | 104 +- test/python/aie_ops.py | 73 +- test/python/aiecc_simple.py | 8 +- test/python/aiex_ops.py | 2 +- test/python/code_region.py | 24 +- test/python/core_ext_kernel.py | 26 +- test/python/ipu.py | 272 +- test/python/objFifo.py | 18 +- test/python/objFifo_link.py | 18 +- test/python/python_passes.py | 1920 +- test/python/simple_with_bindings.py | 10 +- test/round-trip/packet_flow.mlir | 16 +- test/simplepacket1.mlir | 72 +- test/simplepacket2.mlir | 80 +- test/simplepacket3.mlir | 80 +- test/unit_tests/aie/00_itsalive/aie.mlir | 8 +- .../aie/01_memory_read_write/aie.mlir | 8 +- .../aie/02_lock_acquire_release/aie.mlir | 18 +- .../aie/03_sync_with_locks/aie.mlir | 22 +- test/unit_tests/aie/04_shared_memory/aie.mlir | 40 +- test/unit_tests/aie/05_tiledma/aie.mlir | 80 +- .../aie/08_stream_broadcast/aie.mlir | 174 +- .../aie/09_simple_shim_dma/aie.mlir | 64 +- test/unit_tests/aie/10_scalar_fp/aie.mlir | 8 +- test/unit_tests/aie/11_vector_fp/aie.mlir | 8 +- test/unit_tests/aie/12_julia/aie.mlir | 16 +- test/unit_tests/aie/13_julia_fp/aie.mlir | 16 +- test/unit_tests/aie/14_stream_packet/aie.mlir | 118 +- test/unit_tests/aie/15_prime_sieve/aie.mlir | 66 +- test/unit_tests/aie/16_libm_expf/aie.mlir | 16 +- .../aie/17_shim_dma_with_core/aie.mlir | 132 +- .../aie/18_simple_shim_dma_routed/aie.mlir | 54 +- .../aie/19_shim_dma_with_core_routed/aie.mlir | 116 +- .../aie/20_shim_dma_broadcast/aie.mlir | 88 +- .../aie/21_shim_dma_packet/aie.mlir | 248 +- test/unit_tests/aie/21_target_triple/aie.mlir | 10 +- test/unit_tests/aie/22_init_locks/aie.mlir | 22 +- .../aie/23_broadcast_packet/aie.mlir | 130 +- test/unit_tests/aie/23_packet_biShim/aie.mlir | 78 +- test/unit_tests/aie/24_host_loop/aie.mlir | 34 +- .../unit_tests/aie/25_host_multirate/aie.mlir | 40 +- .../aie/27_single_L1_single_lock/aie.mlir | 30 +- .../aie/27_single_L1_single_lock/aie2.mlir | 30 +- .../aieWithWorkaround.mlir | 60 +- .../multi_depth/aie.mlir | 64 +- .../single_depth/aie.mlir | 64 +- .../aie/29_aie2_nd_dma_even_odd/aie.mlir | 58 +- .../30_aie2_nd_dma_transpose_repeat/aie.mlir | 58 +- test/unit_tests/aie/31_stream_core/aie.mlir | 34 +- test/unit_tests/aie2/00_itsalive/aie.mlir | 10 +- .../01_precompiled_core_function/aie.mlir | 24 +- .../aie2/03_cascade_core_functions/aie.mlir | 26 +- test/unit_tests/aie2/03_simple/aie.mlir | 24 +- .../unit_tests/aie2/04_shared_memory/aie.mlir | 50 +- .../aie2/04_shared_memory/aie_row.mlir | 50 +- .../aie2/05_shim_dma_core_function/aie.mlir | 128 +- .../aie.mlir | 134 +- test/unit_tests/aie2/08_tile_locks/aie.mlir | 68 +- .../unit_tests/aie2/09_memtile_locks/aie.mlir | 78 +- .../chess_compiler_tests/00_itsalive/aie.mlir | 8 +- .../01_precompiled_core_function/aie.mlir | 22 +- .../02_precompiled_kernel/aie.mlir | 12 +- .../03_cascade_core_functions/aie.mlir | 28 +- .../04_shared_memory/aie.mlir | 40 +- .../04_shared_memory/aie_row.mlir | 40 +- .../04_shim_dma_kernel/aie.mlir | 102 +- .../05_shim_dma_core_function/aie.mlir | 120 +- .../aie.mlir | 120 +- .../08_tile_locks/aie.mlir | 66 +- .../00_itsalive/aie.mlir | 10 +- .../01_precompiled_core_function/aie.mlir | 24 +- .../02_precompiled_kernel/aie.mlir | 14 +- .../03_cascade_core_functions/aie.mlir | 26 +- .../03_simple/aie.mlir | 24 +- .../04_shared_memory/aie.mlir | 50 +- .../04_shared_memory/aie_row.mlir | 50 +- .../04_shim_dma_kernel/aie.mlir | 110 +- .../05_shim_dma_core_function/aie.mlir | 132 +- .../aie.mlir | 134 +- .../08_tile_locks/aie.mlir | 68 +- .../09_memtile_locks/aie.mlir | 78 +- tutorials/tutorial-1/aie.mlir | 8 +- tutorials/tutorial-1/answers/aie_q5.mlir | 8 +- tutorials/tutorial-1/answers/aie_q6.mlir | 12 +- tutorials/tutorial-2/tutorial-2a/aie.mlir | 14 +- tutorials/tutorial-2/tutorial-2b/aie.mlir | 16 +- tutorials/tutorial-2/tutorial-2c/aie.mlir | 14 +- .../tutorial-2c/answers/aie_empty.mlir | 14 +- .../tutorial-2c/answers/aie_real_empty.mlir | 14 +- tutorials/tutorial-3/aie.mlir | 28 +- tutorials/tutorial-3/answers/aie_perf.mlir | 28 +- tutorials/tutorial-3/objectFifo_ver/aie.mlir | 34 +- tutorials/tutorial-4/aie.mlir | 34 +- tutorials/tutorial-4/flow/aie.mlir | 66 +- tutorials/tutorial-4/flow/answers/aie_q5.mlir | 62 +- tutorials/tutorial-4/switchbox/aie.mlir | 74 +- .../switchbox/path/pathfinder_input.mlir | 92 +- tutorials/tutorial-5/aie.mlir | 34 +- tutorials/tutorial-5/flow/aie.mlir | 84 +- tutorials/tutorial-6/aie.mlir | 72 +- tutorials/tutorial-7/aie.mlir | 52 +- tutorials/tutorial-7/flow/aie.mlir | 112 +- tutorials/tutorial-7/switchbox/aie.mlir | 112 +- tutorials/tutorial-8/aie.mlir | 34 +- tutorials/tutorial-8/answers/aie.mlir | 28 +- tutorials/tutorial-9/aie.mlir | 14 +- tutorials/tutorial-9/answers/aie_matmul.mlir | 20 +- 433 files changed, 43796 insertions(+), 43749 deletions(-) diff --git a/include/aie/Dialect/AIE/IR/AIEOps.td b/include/aie/Dialect/AIE/IR/AIEOps.td index dc749c9fef..19dc2501d9 100644 --- a/include/aie/Dialect/AIE/IR/AIEOps.td +++ b/include/aie/Dialect/AIE/IR/AIEOps.td @@ -262,7 +262,7 @@ def AIE_ShimDMAOp: AIE_Op<"shim_dma", [ aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: aie.use_lock(%lock1, Acquire, 1) - aie.dma_bd(<%buf : memref<512 x i16>, 0, 512>, A) + aie.dma_bd(%buf : memref<512 x i16>, 0, 512) aie.use_lock(%lock1, Release, 0) aie.next_bd ^bd0 ^end: diff --git a/python/dialects/aie.py b/python/dialects/aie.py index 7b6f8c7618..122824c162 100644 --- a/python/dialects/aie.py +++ b/python/dialects/aie.py @@ -23,6 +23,7 @@ IntegerType, _i32ArrayAttr, ) +from ._ods_common import _cext # Comes from _aie register_dialect(get_dialect_registry()) diff --git a/reference_designs/MM_2x2/circuit_switched_version/aie.mlir b/reference_designs/MM_2x2/circuit_switched_version/aie.mlir index 99f9f4091d..dd611979a8 100755 --- a/reference_designs/MM_2x2/circuit_switched_version/aie.mlir +++ b/reference_designs/MM_2x2/circuit_switched_version/aie.mlir @@ -16,285 +16,285 @@ // RUN: %run_on_board ./test.elf module @MM_2x2 { - %t60 = AIE.tile(6, 0) - %t63 = AIE.tile(6, 3) - %t64 = AIE.tile(6, 4) + %t60 = aie.tile(6, 0) + %t63 = aie.tile(6, 3) + %t64 = aie.tile(6, 4) - %t70 = AIE.tile(7, 0) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) + %t70 = aie.tile(7, 0) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) - %t100 = AIE.tile(10, 0) + %t100 = aie.tile(10, 0) - %buffer0 = AIE.external_buffer {sym_name = "LHS_tile0"} : memref<1024 x i32> //LHS_tile0 - %buffer1 = AIE.external_buffer {sym_name = "LHS_tile1"} : memref<1024 x i32> //LHS_tile1 - %buffer2 = AIE.external_buffer {sym_name = "RHS_tile0"} : memref<1024 x i32> //RHS_tile0 - %buffer3 = AIE.external_buffer {sym_name = "RHS_tile1"} : memref<1024 x i32> //RHS_tile1 - %buffer4 = AIE.external_buffer {sym_name = "RHS_tile2"} : memref<1024 x i32> //RHS_tile2 - %buffer5 = AIE.external_buffer {sym_name = "RHS_tile3"} : memref<1024 x i32> //RHS_tile3 - %buffer6 = AIE.external_buffer {sym_name = "Out_tile0"} : memref<1025 x i32> //Out_tile0 - %buffer7 = AIE.external_buffer {sym_name = "Out_tile1"} : memref<1025 x i32> //Out_tile1 + %buffer0 = aie.external_buffer {sym_name = "LHS_tile0"} : memref<1024 x i32> //LHS_tile0 + %buffer1 = aie.external_buffer {sym_name = "LHS_tile1"} : memref<1024 x i32> //LHS_tile1 + %buffer2 = aie.external_buffer {sym_name = "RHS_tile0"} : memref<1024 x i32> //RHS_tile0 + %buffer3 = aie.external_buffer {sym_name = "RHS_tile1"} : memref<1024 x i32> //RHS_tile1 + %buffer4 = aie.external_buffer {sym_name = "RHS_tile2"} : memref<1024 x i32> //RHS_tile2 + %buffer5 = aie.external_buffer {sym_name = "RHS_tile3"} : memref<1024 x i32> //RHS_tile3 + %buffer6 = aie.external_buffer {sym_name = "Out_tile0"} : memref<1025 x i32> //Out_tile0 + %buffer7 = aie.external_buffer {sym_name = "Out_tile1"} : memref<1025 x i32> //Out_tile1 - %lock60_0 = AIE.lock(%t60, 0) {sym_name = "LHS_tile0_lock"} - %lock60_1 = AIE.lock(%t60, 1) {sym_name = "LHS_tile1_lock"} - %lock60_2 = AIE.lock(%t60, 2) {sym_name = "RHS_tile0_lock"} - %lock60_3 = AIE.lock(%t60, 3) {sym_name = "RHS_tile1_lock"} - %lock70_0 = AIE.lock(%t70, 0) {sym_name = "RHS_tile2_lock"} - %lock70_1 = AIE.lock(%t70, 1) {sym_name = "RHS_tile3_lock"} - %lock100_0 = AIE.lock(%t100, 0) {sym_name = "Out_tile0_lock"} - %lock100_1 = AIE.lock(%t100, 1) {sym_name = "Out_tile1_lock"} + %lock60_0 = aie.lock(%t60, 0) {sym_name = "LHS_tile0_lock"} + %lock60_1 = aie.lock(%t60, 1) {sym_name = "LHS_tile1_lock"} + %lock60_2 = aie.lock(%t60, 2) {sym_name = "RHS_tile0_lock"} + %lock60_3 = aie.lock(%t60, 3) {sym_name = "RHS_tile1_lock"} + %lock70_0 = aie.lock(%t70, 0) {sym_name = "RHS_tile2_lock"} + %lock70_1 = aie.lock(%t70, 1) {sym_name = "RHS_tile3_lock"} + %lock100_0 = aie.lock(%t100, 0) {sym_name = "Out_tile0_lock"} + %lock100_1 = aie.lock(%t100, 1) {sym_name = "Out_tile1_lock"} - %buf63_0 = AIE.buffer(%t63) {sym_name = "buf63_0"} : memref<1024xi32> //LHS_tile0 - %buf63_1 = AIE.buffer(%t63) {sym_name = "buf63_1"} : memref<1024xi32> //RHS_tile0 - %buf63_2 = AIE.buffer(%t63) {sym_name = "buf63_2"} : memref<1024xi32> //Accumulator - %buf63_3 = AIE.buffer(%t63) {sym_name = "buf63_3"} : memref<1024xi32> //Sub_sum0 - %buf64_0 = AIE.buffer(%t64) {sym_name = "buf64_0"} : memref<1024xi32> //LHS_tile1 - %buf64_1 = AIE.buffer(%t64) {sym_name = "buf64_1"} : memref<1024xi32> //RHS_tile1 - %buf64_2 = AIE.buffer(%t64) {sym_name = "buf64_2"} : memref<1024xi32> //Out_tile0 + %buf63_0 = aie.buffer(%t63) {sym_name = "buf63_0"} : memref<1024xi32> //LHS_tile0 + %buf63_1 = aie.buffer(%t63) {sym_name = "buf63_1"} : memref<1024xi32> //RHS_tile0 + %buf63_2 = aie.buffer(%t63) {sym_name = "buf63_2"} : memref<1024xi32> //Accumulator + %buf63_3 = aie.buffer(%t63) {sym_name = "buf63_3"} : memref<1024xi32> //Sub_sum0 + %buf64_0 = aie.buffer(%t64) {sym_name = "buf64_0"} : memref<1024xi32> //LHS_tile1 + %buf64_1 = aie.buffer(%t64) {sym_name = "buf64_1"} : memref<1024xi32> //RHS_tile1 + %buf64_2 = aie.buffer(%t64) {sym_name = "buf64_2"} : memref<1024xi32> //Out_tile0 - %lock63_0 = AIE.lock(%t63, 0) - %lock63_1 = AIE.lock(%t63, 1) - %lock63_3 = AIE.lock(%t63, 3) - %lock64_0 = AIE.lock(%t64, 0) - %lock64_1 = AIE.lock(%t64, 1) - %lock64_2 = AIE.lock(%t64, 2) - %lock73_0 = AIE.lock(%t73, 0) - %lock73_1 = AIE.lock(%t73, 1) - %lock73_2 = AIE.lock(%t73, 2) - %lock74_0 = AIE.lock(%t74, 0) - %lock74_1 = AIE.lock(%t74, 1) - %lock74_2 = AIE.lock(%t74, 2) + %lock63_0 = aie.lock(%t63, 0) + %lock63_1 = aie.lock(%t63, 1) + %lock63_3 = aie.lock(%t63, 3) + %lock64_0 = aie.lock(%t64, 0) + %lock64_1 = aie.lock(%t64, 1) + %lock64_2 = aie.lock(%t64, 2) + %lock73_0 = aie.lock(%t73, 0) + %lock73_1 = aie.lock(%t73, 1) + %lock73_2 = aie.lock(%t73, 2) + %lock74_0 = aie.lock(%t74, 0) + %lock74_1 = aie.lock(%t74, 1) + %lock74_2 = aie.lock(%t74, 2) - %buf73_0 = AIE.buffer(%t73) {sym_name = "buf73_0"} : memref<1024xi32> //LHS_tile0 - %buf73_1 = AIE.buffer(%t73) {sym_name = "buf73_1"} : memref<1024xi32> //RHS_tile2 - %buf73_2 = AIE.buffer(%t73) {sym_name = "buf73_2"} : memref<1024xi32> //Accumulator - %buf73_3 = AIE.buffer(%t73) {sym_name = "buf73_3"} : memref<1024xi32> //Sub_sum1 - %buf74_0 = AIE.buffer(%t74) {sym_name = "buf74_0"} : memref<1024xi32> //LHS_tile1 - %buf74_1 = AIE.buffer(%t74) {sym_name = "buf74_1"} : memref<1024xi32> //RHS_tile3 - %buf74_2 = AIE.buffer(%t74) {sym_name = "buf74_2"} : memref<1024xi32> //Out_tile1 + %buf73_0 = aie.buffer(%t73) {sym_name = "buf73_0"} : memref<1024xi32> //LHS_tile0 + %buf73_1 = aie.buffer(%t73) {sym_name = "buf73_1"} : memref<1024xi32> //RHS_tile2 + %buf73_2 = aie.buffer(%t73) {sym_name = "buf73_2"} : memref<1024xi32> //Accumulator + %buf73_3 = aie.buffer(%t73) {sym_name = "buf73_3"} : memref<1024xi32> //Sub_sum1 + %buf74_0 = aie.buffer(%t74) {sym_name = "buf74_0"} : memref<1024xi32> //LHS_tile1 + %buf74_1 = aie.buffer(%t74) {sym_name = "buf74_1"} : memref<1024xi32> //RHS_tile3 + %buf74_2 = aie.buffer(%t74) {sym_name = "buf74_2"} : memref<1024xi32> //Out_tile1 // LHS_tile0 - AIE.flow(%t60, DMA : 0, %t63, DMA : 0) - AIE.flow(%t60, DMA : 0, %t73, DMA : 0) + aie.flow(%t60, DMA : 0, %t63, DMA : 0) + aie.flow(%t60, DMA : 0, %t73, DMA : 0) // LHS_tile1 - AIE.flow(%t60, DMA : 1, %t64, DMA : 0) - AIE.flow(%t60, DMA : 1, %t74, DMA : 0) + aie.flow(%t60, DMA : 1, %t64, DMA : 0) + aie.flow(%t60, DMA : 1, %t74, DMA : 0) // RHS_tile0 - AIE.flow(%t70, DMA : 0, %t63, DMA : 1) + aie.flow(%t70, DMA : 0, %t63, DMA : 1) // RHS_tile1 - AIE.flow(%t70, DMA : 1, %t64, DMA : 1) + aie.flow(%t70, DMA : 1, %t64, DMA : 1) // RHS_tile2 - AIE.flow(%t100, DMA : 0, %t73, DMA : 1) + aie.flow(%t100, DMA : 0, %t73, DMA : 1) // RHS_tile3 - AIE.flow(%t100, DMA : 1, %t74, DMA : 1) + aie.flow(%t100, DMA : 1, %t74, DMA : 1) // Out_tile0 - AIE.flow(%t64, DMA : 0, %t60, DMA : 0) + aie.flow(%t64, DMA : 0, %t60, DMA : 0) // Out_tile1 - AIE.flow(%t74, DMA : 0, %t60, DMA : 1) + aie.flow(%t74, DMA : 0, %t60, DMA : 1) - %dma60 = AIE.shim_dma(%t60) { - AIE.dma_start("MM2S", 0, ^bd4, ^dma2) + %dma60 = aie.shim_dma(%t60) { + aie.dma_start("MM2S", 0, ^bd4, ^dma2) ^dma2: - AIE.dma_start("MM2S", 1, ^bd5, ^dma3) + aie.dma_start("MM2S", 1, ^bd5, ^dma3) ^dma3: - AIE.dma_start("S2MM", 0, ^bd6, ^dma4) + aie.dma_start("S2MM", 0, ^bd6, ^dma4) ^dma4: - AIE.dma_start("S2MM", 1, ^bd7, ^end) + aie.dma_start("S2MM", 1, ^bd7, ^end) ^bd4: - AIE.use_lock(%lock60_0, "Acquire", 1) - AIE.dma_bd(%buffer0 : memref<1024xi32>, 0, 1024) //send LHS_tile0 - AIE.use_lock(%lock60_0, "Release", 0) - AIE.next_bd ^bd4 + aie.use_lock(%lock60_0, "Acquire", 1) + aie.dma_bd(%buffer0 : memref<1024xi32>, 0, 1024) //send LHS_tile0 + aie.use_lock(%lock60_0, "Release", 0) + aie.next_bd ^bd4 ^bd5: - AIE.use_lock(%lock60_1, "Acquire", 1) - AIE.dma_bd(%buffer1 : memref<1024xi32>, 0, 1024) //send LHS_tile1 - AIE.use_lock(%lock60_1, "Release", 0) - AIE.next_bd ^bd5 + aie.use_lock(%lock60_1, "Acquire", 1) + aie.dma_bd(%buffer1 : memref<1024xi32>, 0, 1024) //send LHS_tile1 + aie.use_lock(%lock60_1, "Release", 0) + aie.next_bd ^bd5 ^bd6: - AIE.use_lock(%lock60_2, "Acquire", 1) - AIE.dma_bd(%buffer6 : memref<1025xi32>, 0, 1025) //send Out_tile0 - AIE.use_lock(%lock60_2, "Release", 0) - AIE.next_bd ^bd6 + aie.use_lock(%lock60_2, "Acquire", 1) + aie.dma_bd(%buffer6 : memref<1025xi32>, 0, 1025) //send Out_tile0 + aie.use_lock(%lock60_2, "Release", 0) + aie.next_bd ^bd6 ^bd7: - AIE.use_lock(%lock60_3, "Acquire", 1) - AIE.dma_bd(%buffer7 : memref<1025xi32>, 0, 1025) //send Out_tile1 - AIE.use_lock(%lock60_3, "Release", 0) - AIE.next_bd ^bd7 + aie.use_lock(%lock60_3, "Acquire", 1) + aie.dma_bd(%buffer7 : memref<1025xi32>, 0, 1025) //send Out_tile1 + aie.use_lock(%lock60_3, "Release", 0) + aie.next_bd ^bd7 ^end: - AIE.end + aie.end } - %dma70 = AIE.shim_dma(%t70) { - AIE.dma_start("MM2S", 0, ^bd4, ^dma2) + %dma70 = aie.shim_dma(%t70) { + aie.dma_start("MM2S", 0, ^bd4, ^dma2) ^dma2: - AIE.dma_start("MM2S", 1, ^bd5, ^end) + aie.dma_start("MM2S", 1, ^bd5, ^end) ^bd4: - AIE.use_lock(%lock70_0, "Acquire", 1) - AIE.dma_bd(%buffer2 : memref<1024xi32>, 0, 1024) //send RHS_tile0 - AIE.use_lock(%lock70_0, "Release", 0) - AIE.next_bd ^bd4 + aie.use_lock(%lock70_0, "Acquire", 1) + aie.dma_bd(%buffer2 : memref<1024xi32>, 0, 1024) //send RHS_tile0 + aie.use_lock(%lock70_0, "Release", 0) + aie.next_bd ^bd4 ^bd5: - AIE.use_lock(%lock70_1, "Acquire", 1) - AIE.dma_bd(%buffer3 : memref<1024xi32>, 0, 1024) //send RHS_tile1 - AIE.use_lock(%lock70_1, "Release", 0) - AIE.next_bd ^bd5 + aie.use_lock(%lock70_1, "Acquire", 1) + aie.dma_bd(%buffer3 : memref<1024xi32>, 0, 1024) //send RHS_tile1 + aie.use_lock(%lock70_1, "Release", 0) + aie.next_bd ^bd5 ^end: - AIE.end + aie.end } - %dma100 = AIE.shim_dma(%t100) { - AIE.dma_start("MM2S", 0, ^bd4, ^dma2) + %dma100 = aie.shim_dma(%t100) { + aie.dma_start("MM2S", 0, ^bd4, ^dma2) ^dma2: - AIE.dma_start("MM2S", 1, ^bd5, ^end) + aie.dma_start("MM2S", 1, ^bd5, ^end) ^bd4: - AIE.use_lock(%lock100_0, "Acquire", 1) - AIE.dma_bd(%buffer4 : memref<1024xi32>, 0, 1024) //send RHS_tile2 - AIE.use_lock(%lock100_0, "Release", 0) - AIE.next_bd ^bd4 + aie.use_lock(%lock100_0, "Acquire", 1) + aie.dma_bd(%buffer4 : memref<1024xi32>, 0, 1024) //send RHS_tile2 + aie.use_lock(%lock100_0, "Release", 0) + aie.next_bd ^bd4 ^bd5: - AIE.use_lock(%lock100_1, "Acquire", 1) - AIE.dma_bd(%buffer5 : memref<1024xi32>, 0, 1024) //send RHS_tile3 - AIE.use_lock(%lock100_1, "Release", 0) - AIE.next_bd ^bd5 + aie.use_lock(%lock100_1, "Acquire", 1) + aie.dma_bd(%buffer5 : memref<1024xi32>, 0, 1024) //send RHS_tile3 + aie.use_lock(%lock100_1, "Release", 0) + aie.next_bd ^bd5 ^end: - AIE.end + aie.end } - %m63 = AIE.mem(%t63) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m63 = aie.mem(%t63) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^end) + aie.dma_start("S2MM", 1, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock63_0, Acquire, 0) - AIE.dma_bd(%buf63_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock63_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock63_0, Acquire, 0) + aie.dma_bd(%buf63_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock63_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock63_1, Acquire, 0) - AIE.dma_bd(%buf63_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock63_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock63_1, Acquire, 0) + aie.dma_bd(%buf63_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock63_1, Release, 1) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } - %m64 = AIE.mem(%t64) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m64 = aie.mem(%t64) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^dma1) + aie.dma_start("S2MM", 1, ^bd1, ^dma1) ^bd0: - AIE.use_lock(%lock64_0, Acquire, 0) - AIE.dma_bd(%buf64_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock64_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock64_0, Acquire, 0) + aie.dma_bd(%buf64_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock64_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock64_1, Acquire, 0) - AIE.dma_bd(%buf64_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock64_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock64_1, Acquire, 0) + aie.dma_bd(%buf64_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock64_1, Release, 1) + aie.next_bd ^bd1 ^dma1: - AIE.dma_start("MM2S", 0, ^bd2, ^end) + aie.dma_start("MM2S", 0, ^bd2, ^end) ^bd2: - AIE.use_lock(%lock64_2, Acquire, 1) - AIE.dma_bd(%buf64_2 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock64_2, Release, 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock64_2, Acquire, 1) + aie.dma_bd(%buf64_2 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock64_2, Release, 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } func.func private @extern_kernel(%A: memref<1024xi32>, %B: memref<1024xi32>, %acc: memref<1024xi32>, %C: memref<1024xi32>) -> () - %core63 = AIE.core(%t63) { - AIE.use_lock(%lock63_0, "Acquire", 1) - AIE.use_lock(%lock63_1, "Acquire", 1) - AIE.use_lock(%lock63_3, "Acquire", 0) + %core63 = aie.core(%t63) { + aie.use_lock(%lock63_0, "Acquire", 1) + aie.use_lock(%lock63_1, "Acquire", 1) + aie.use_lock(%lock63_3, "Acquire", 0) func.call @extern_kernel(%buf63_0, %buf63_1, %buf63_2, %buf63_3) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock63_3, "Release", 1) - AIE.use_lock(%lock63_1, "Release", 0) - AIE.use_lock(%lock63_0, "Release", 0) - AIE.end + aie.use_lock(%lock63_3, "Release", 1) + aie.use_lock(%lock63_1, "Release", 0) + aie.use_lock(%lock63_0, "Release", 0) + aie.end } { link_with="kernel.o" } - %core64 = AIE.core(%t64) { - AIE.use_lock(%lock63_3, "Acquire", 1) - AIE.use_lock(%lock64_0, "Acquire", 1) - AIE.use_lock(%lock64_1, "Acquire", 1) - AIE.use_lock(%lock64_2, "Acquire", 0) + %core64 = aie.core(%t64) { + aie.use_lock(%lock63_3, "Acquire", 1) + aie.use_lock(%lock64_0, "Acquire", 1) + aie.use_lock(%lock64_1, "Acquire", 1) + aie.use_lock(%lock64_2, "Acquire", 0) func.call @extern_kernel(%buf64_0, %buf64_1, %buf63_3, %buf64_2) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock64_2, "Release", 1) - AIE.use_lock(%lock64_1, "Release", 0) - AIE.use_lock(%lock64_0, "Release", 0) - AIE.use_lock(%lock63_3, "Release", 0) - AIE.end + aie.use_lock(%lock64_2, "Release", 1) + aie.use_lock(%lock64_1, "Release", 0) + aie.use_lock(%lock64_0, "Release", 0) + aie.use_lock(%lock63_3, "Release", 0) + aie.end } { link_with="kernel.o" } - %m73 = AIE.mem(%t73) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^end) + aie.dma_start("S2MM", 1, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock73_0, Acquire, 0) - AIE.dma_bd(%buf73_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock73_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock73_0, Acquire, 0) + aie.dma_bd(%buf73_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock73_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock73_1, Acquire, 0) - AIE.dma_bd(%buf73_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock73_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock73_1, Acquire, 0) + aie.dma_bd(%buf73_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock73_1, Release, 1) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } - %m74 = AIE.mem(%t74) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m74 = aie.mem(%t74) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^dma1) + aie.dma_start("S2MM", 1, ^bd1, ^dma1) ^bd0: - AIE.use_lock(%lock74_0, Acquire, 0) - AIE.dma_bd(%buf74_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock74_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock74_0, Acquire, 0) + aie.dma_bd(%buf74_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock74_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock74_1, Acquire, 0) - AIE.dma_bd(%buf74_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock74_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock74_1, Acquire, 0) + aie.dma_bd(%buf74_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock74_1, Release, 1) + aie.next_bd ^bd1 ^dma1: - AIE.dma_start("MM2S", 0, ^bd2, ^end) + aie.dma_start("MM2S", 0, ^bd2, ^end) ^bd2: - AIE.use_lock(%lock74_2, Acquire, 1) - AIE.dma_bd(%buf74_2 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock74_2, Release, 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock74_2, Acquire, 1) + aie.dma_bd(%buf74_2 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock74_2, Release, 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } - %core73 = AIE.core(%t73) { - AIE.use_lock(%lock73_0, "Acquire", 1) - AIE.use_lock(%lock73_1, "Acquire", 1) - AIE.use_lock(%lock73_2, "Acquire", 0) + %core73 = aie.core(%t73) { + aie.use_lock(%lock73_0, "Acquire", 1) + aie.use_lock(%lock73_1, "Acquire", 1) + aie.use_lock(%lock73_2, "Acquire", 0) func.call @extern_kernel(%buf73_0, %buf73_1, %buf73_2, %buf73_3) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock73_2, "Release", 1) - AIE.use_lock(%lock73_1, "Release", 0) - AIE.use_lock(%lock73_0, "Release", 0) - AIE.end + aie.use_lock(%lock73_2, "Release", 1) + aie.use_lock(%lock73_1, "Release", 0) + aie.use_lock(%lock73_0, "Release", 0) + aie.end } { link_with="kernel.o" } - %core74 = AIE.core(%t74) { - AIE.use_lock(%lock73_2, "Acquire", 1) - AIE.use_lock(%lock74_0, "Acquire", 1) - AIE.use_lock(%lock74_1, "Acquire", 1) - AIE.use_lock(%lock74_2, "Acquire", 0) + %core74 = aie.core(%t74) { + aie.use_lock(%lock73_2, "Acquire", 1) + aie.use_lock(%lock74_0, "Acquire", 1) + aie.use_lock(%lock74_1, "Acquire", 1) + aie.use_lock(%lock74_2, "Acquire", 0) func.call @extern_kernel(%buf74_0, %buf74_1, %buf73_3, %buf74_2) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock74_2, "Release", 1) - AIE.use_lock(%lock74_1, "Release", 0) - AIE.use_lock(%lock74_0, "Release", 0) - AIE.use_lock(%lock73_2, "Release", 0) - AIE.end + aie.use_lock(%lock74_2, "Release", 1) + aie.use_lock(%lock74_1, "Release", 0) + aie.use_lock(%lock74_0, "Release", 0) + aie.use_lock(%lock73_2, "Release", 0) + aie.end } { link_with="kernel.o" } } diff --git a/reference_designs/MM_2x2/objectFifo_circuit_switched_version/aie.mlir b/reference_designs/MM_2x2/objectFifo_circuit_switched_version/aie.mlir index 990ae2573e..320c94ca0b 100755 --- a/reference_designs/MM_2x2/objectFifo_circuit_switched_version/aie.mlir +++ b/reference_designs/MM_2x2/objectFifo_circuit_switched_version/aie.mlir @@ -15,136 +15,136 @@ // RUN: aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf -AIE.device(xcvc1902) { - %t60 = AIE.tile(6, 0) - %t63 = AIE.tile(6, 3) - %t64 = AIE.tile(6, 4) +aie.device(xcvc1902) { + %t60 = aie.tile(6, 0) + %t63 = aie.tile(6, 3) + %t64 = aie.tile(6, 4) - %t70 = AIE.tile(7, 0) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) + %t70 = aie.tile(7, 0) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) - %t100 = AIE.tile(10, 0) + %t100 = aie.tile(10, 0) - AIE.objectfifo @of_LHS0 (%t60, {%t63, %t73}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_LHS1 (%t60, {%t64, %t74}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_RHS0 (%t70, {%t63}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_RHS1 (%t70, {%t64}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_RHS2 (%t100, {%t73}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_RHS3 (%t100, {%t74}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_LHS0 (%t60, {%t63, %t73}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_LHS1 (%t60, {%t64, %t74}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_RHS0 (%t70, {%t63}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_RHS1 (%t70, {%t64}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_RHS2 (%t100, {%t73}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_RHS3 (%t100, {%t74}, 1 : i32) : !aie.objectfifo> - AIE.objectfifo @of_out0 (%t64, {%t60}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out1 (%t74, {%t60}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_out0 (%t64, {%t60}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_out1 (%t74, {%t60}, 1 : i32) : !aie.objectfifo> - AIE.objectfifo @of_acc0 (%t63, {%t64}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_acc1 (%t73, {%t74}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_acc0 (%t63, {%t64}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_acc1 (%t73, {%t74}, 1 : i32) : !aie.objectfifo> - %buffer0 = AIE.external_buffer {sym_name = "LHS_tile0"} : memref<1024 x i32> //LHS_tile0 - %buffer1 = AIE.external_buffer {sym_name = "LHS_tile1"} : memref<1024 x i32> //LHS_tile1 - %buffer2 = AIE.external_buffer {sym_name = "RHS_tile0"} : memref<1024 x i32> //RHS_tile0 - %buffer3 = AIE.external_buffer {sym_name = "RHS_tile1"} : memref<1024 x i32> //RHS_tile1 - %buffer4 = AIE.external_buffer {sym_name = "RHS_tile2"} : memref<1024 x i32> //RHS_tile2 - %buffer5 = AIE.external_buffer {sym_name = "RHS_tile3"} : memref<1024 x i32> //RHS_tile3 - %buffer6 = AIE.external_buffer {sym_name = "Out_tile0"} : memref<1024 x i32> //Out_tile0 - %buffer7 = AIE.external_buffer {sym_name = "Out_tile1"} : memref<1024 x i32> //Out_tile1 + %buffer0 = aie.external_buffer {sym_name = "LHS_tile0"} : memref<1024 x i32> //LHS_tile0 + %buffer1 = aie.external_buffer {sym_name = "LHS_tile1"} : memref<1024 x i32> //LHS_tile1 + %buffer2 = aie.external_buffer {sym_name = "RHS_tile0"} : memref<1024 x i32> //RHS_tile0 + %buffer3 = aie.external_buffer {sym_name = "RHS_tile1"} : memref<1024 x i32> //RHS_tile1 + %buffer4 = aie.external_buffer {sym_name = "RHS_tile2"} : memref<1024 x i32> //RHS_tile2 + %buffer5 = aie.external_buffer {sym_name = "RHS_tile3"} : memref<1024 x i32> //RHS_tile3 + %buffer6 = aie.external_buffer {sym_name = "Out_tile0"} : memref<1024 x i32> //Out_tile0 + %buffer7 = aie.external_buffer {sym_name = "Out_tile1"} : memref<1024 x i32> //Out_tile1 - AIE.objectfifo.register_external_buffers @of_LHS0 (%t60, {%buffer0}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers @of_LHS1 (%t60, {%buffer1}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers @of_out0 (%t60, {%buffer6}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers @of_out1 (%t60, {%buffer7}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_LHS0 (%t60, {%buffer0}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_LHS1 (%t60, {%buffer1}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_out0 (%t60, {%buffer6}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_out1 (%t60, {%buffer7}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers @of_RHS0 (%t70, {%buffer2}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers @of_RHS1 (%t70, {%buffer3}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_RHS0 (%t70, {%buffer2}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_RHS1 (%t70, {%buffer3}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers @of_RHS2 (%t100, {%buffer4}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers @of_RHS3 (%t100, {%buffer5}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_RHS2 (%t100, {%buffer4}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers @of_RHS3 (%t100, {%buffer5}) : (memref<1024xi32>) - %buf63 = AIE.buffer(%t63) {sym_name = "buf63"} : memref<1024xi32> //Accumulator0 - %buf73 = AIE.buffer(%t73) {sym_name = "buf73"} : memref<1024xi32> //Accumulator1 + %buf63 = aie.buffer(%t63) {sym_name = "buf63"} : memref<1024xi32> //Accumulator0 + %buf73 = aie.buffer(%t73) {sym_name = "buf73"} : memref<1024xi32> //Accumulator1 func.func private @extern_kernel(%A: memref<1024xi32>, %B: memref<1024xi32>, %acc: memref<1024xi32>, %C: memref<1024xi32>) -> () - %core63 = AIE.core(%t63) { - %LHS0Subview = AIE.objectfifo.acquire @of_LHS0 (Consume, 1) : !AIE.objectfifosubview> - %LHS0 = AIE.objectfifo.subview.access %LHS0Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %core63 = aie.core(%t63) { + %LHS0Subview = aie.objectfifo.acquire @of_LHS0 (Consume, 1) : !aie.objectfifosubview> + %LHS0 = aie.objectfifo.subview.access %LHS0Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %RHS0Subview = AIE.objectfifo.acquire @of_RHS0 (Consume, 1) : !AIE.objectfifosubview> - %RHS0 = AIE.objectfifo.subview.access %RHS0Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %RHS0Subview = aie.objectfifo.acquire @of_RHS0 (Consume, 1) : !aie.objectfifosubview> + %RHS0 = aie.objectfifo.subview.access %RHS0Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %ACC0Subview = AIE.objectfifo.acquire @of_acc0 (Produce, 1) : !AIE.objectfifosubview> - %ACC0 = AIE.objectfifo.subview.access %ACC0Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %ACC0Subview = aie.objectfifo.acquire @of_acc0 (Produce, 1) : !aie.objectfifosubview> + %ACC0 = aie.objectfifo.subview.access %ACC0Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> func.call @extern_kernel(%LHS0, %RHS0, %buf63, %ACC0) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.objectfifo.release @of_LHS0 (Consume, 1) - AIE.objectfifo.release @of_RHS0 (Consume, 1) - AIE.objectfifo.release @of_acc0 (Produce, 1) + aie.objectfifo.release @of_LHS0 (Consume, 1) + aie.objectfifo.release @of_RHS0 (Consume, 1) + aie.objectfifo.release @of_acc0 (Produce, 1) - AIE.end + aie.end } { link_with="kernel.o" } - %core64 = AIE.core(%t64) { - %LHS1Subview = AIE.objectfifo.acquire @of_LHS1 (Consume, 1) : !AIE.objectfifosubview> - %LHS1 = AIE.objectfifo.subview.access %LHS1Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %core64 = aie.core(%t64) { + %LHS1Subview = aie.objectfifo.acquire @of_LHS1 (Consume, 1) : !aie.objectfifosubview> + %LHS1 = aie.objectfifo.subview.access %LHS1Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %RHS1Subview = AIE.objectfifo.acquire @of_RHS1 (Consume, 1) : !AIE.objectfifosubview> - %RHS1 = AIE.objectfifo.subview.access %RHS1Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %RHS1Subview = aie.objectfifo.acquire @of_RHS1 (Consume, 1) : !aie.objectfifosubview> + %RHS1 = aie.objectfifo.subview.access %RHS1Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %ACC0Subview = AIE.objectfifo.acquire @of_acc0 (Consume, 1) : !AIE.objectfifosubview> - %ACC0 = AIE.objectfifo.subview.access %ACC0Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %ACC0Subview = aie.objectfifo.acquire @of_acc0 (Consume, 1) : !aie.objectfifosubview> + %ACC0 = aie.objectfifo.subview.access %ACC0Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %Out0Subview = AIE.objectfifo.acquire @of_out0 (Produce, 1) : !AIE.objectfifosubview> - %Out0 = AIE.objectfifo.subview.access %Out0Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %Out0Subview = aie.objectfifo.acquire @of_out0 (Produce, 1) : !aie.objectfifosubview> + %Out0 = aie.objectfifo.subview.access %Out0Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> func.call @extern_kernel(%LHS1, %RHS1, %ACC0, %Out0) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.objectfifo.release @of_LHS1 (Consume, 1) - AIE.objectfifo.release @of_RHS1 (Consume, 1) - AIE.objectfifo.release @of_acc0 (Consume, 1) - AIE.objectfifo.release @of_out0 (Produce, 1) + aie.objectfifo.release @of_LHS1 (Consume, 1) + aie.objectfifo.release @of_RHS1 (Consume, 1) + aie.objectfifo.release @of_acc0 (Consume, 1) + aie.objectfifo.release @of_out0 (Produce, 1) - AIE.end + aie.end } { link_with="kernel.o" } - %core73 = AIE.core(%t73) { - %LHS0Subview = AIE.objectfifo.acquire @of_LHS0 (Consume, 1) : !AIE.objectfifosubview> - %LHS0 = AIE.objectfifo.subview.access %LHS0Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %core73 = aie.core(%t73) { + %LHS0Subview = aie.objectfifo.acquire @of_LHS0 (Consume, 1) : !aie.objectfifosubview> + %LHS0 = aie.objectfifo.subview.access %LHS0Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %RHS2Subview = AIE.objectfifo.acquire @of_RHS2 (Consume, 1) : !AIE.objectfifosubview> - %RHS2 = AIE.objectfifo.subview.access %RHS2Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %RHS2Subview = aie.objectfifo.acquire @of_RHS2 (Consume, 1) : !aie.objectfifosubview> + %RHS2 = aie.objectfifo.subview.access %RHS2Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %ACC1Subview = AIE.objectfifo.acquire @of_acc1 (Produce, 1) : !AIE.objectfifosubview> - %ACC1 = AIE.objectfifo.subview.access %ACC1Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %ACC1Subview = aie.objectfifo.acquire @of_acc1 (Produce, 1) : !aie.objectfifosubview> + %ACC1 = aie.objectfifo.subview.access %ACC1Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> func.call @extern_kernel(%LHS0, %RHS2, %buf73, %ACC1) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.objectfifo.release @of_LHS0 (Consume, 1) - AIE.objectfifo.release @of_RHS2 (Consume, 1) - AIE.objectfifo.release @of_acc1 (Produce, 1) + aie.objectfifo.release @of_LHS0 (Consume, 1) + aie.objectfifo.release @of_RHS2 (Consume, 1) + aie.objectfifo.release @of_acc1 (Produce, 1) - AIE.end + aie.end } { link_with="kernel.o" } - %core74 = AIE.core(%t74) { - %LHS1Subview = AIE.objectfifo.acquire @of_LHS1 (Consume, 1) : !AIE.objectfifosubview> - %LHS1 = AIE.objectfifo.subview.access %LHS1Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %core74 = aie.core(%t74) { + %LHS1Subview = aie.objectfifo.acquire @of_LHS1 (Consume, 1) : !aie.objectfifosubview> + %LHS1 = aie.objectfifo.subview.access %LHS1Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %RHS3Subview = AIE.objectfifo.acquire @of_RHS3 (Consume, 1) : !AIE.objectfifosubview> - %RHS3 = AIE.objectfifo.subview.access %RHS3Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %RHS3Subview = aie.objectfifo.acquire @of_RHS3 (Consume, 1) : !aie.objectfifosubview> + %RHS3 = aie.objectfifo.subview.access %RHS3Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %ACC1Subview = AIE.objectfifo.acquire @of_acc1 (Consume, 1) : !AIE.objectfifosubview> - %ACC1 = AIE.objectfifo.subview.access %ACC1Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %ACC1Subview = aie.objectfifo.acquire @of_acc1 (Consume, 1) : !aie.objectfifosubview> + %ACC1 = aie.objectfifo.subview.access %ACC1Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> - %Out1Subview = AIE.objectfifo.acquire @of_out1 (Produce, 1) : !AIE.objectfifosubview> - %Out1 = AIE.objectfifo.subview.access %Out1Subview[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %Out1Subview = aie.objectfifo.acquire @of_out1 (Produce, 1) : !aie.objectfifosubview> + %Out1 = aie.objectfifo.subview.access %Out1Subview[0] : !aie.objectfifosubview> -> memref<1024xi32> func.call @extern_kernel(%LHS1, %RHS3, %ACC1, %Out1) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.objectfifo.release @of_LHS1 (Consume, 1) - AIE.objectfifo.release @of_RHS3 (Consume, 1) - AIE.objectfifo.release @of_acc1 (Consume, 1) - AIE.objectfifo.release @of_out1 (Produce, 1) + aie.objectfifo.release @of_LHS1 (Consume, 1) + aie.objectfifo.release @of_RHS3 (Consume, 1) + aie.objectfifo.release @of_acc1 (Consume, 1) + aie.objectfifo.release @of_out1 (Produce, 1) - AIE.end + aie.end } { link_with="kernel.o" } } diff --git a/reference_designs/MM_2x2/packet_switched_version/aie.mlir b/reference_designs/MM_2x2/packet_switched_version/aie.mlir index e1c4339b94..4b3a9ec914 100644 --- a/reference_designs/MM_2x2/packet_switched_version/aie.mlir +++ b/reference_designs/MM_2x2/packet_switched_version/aie.mlir @@ -15,304 +15,304 @@ module @MM_2x2 { - %t60 = AIE.tile(6, 0) - %t63 = AIE.tile(6, 3) - %t64 = AIE.tile(6, 4) - - %t70 = AIE.tile(7, 0) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - - %buffer0 = AIE.external_buffer {sym_name = "LHS_tile0"} : memref<1024 x i32> //LHS_tile0 - %buffer1 = AIE.external_buffer {sym_name = "LHS_tile1"} : memref<1024 x i32> //LHS_tile1 - %buffer2 = AIE.external_buffer {sym_name = "RHS_tile0"} : memref<1024 x i32> //RHS_tile0 - %buffer3 = AIE.external_buffer {sym_name = "RHS_tile1"} : memref<1024 x i32> //RHS_tile1 - %buffer4 = AIE.external_buffer {sym_name = "RHS_tile2"} : memref<1024 x i32> //RHS_tile2 - %buffer5 = AIE.external_buffer {sym_name = "RHS_tile3"} : memref<1024 x i32> //RHS_tile3 - - %lock60_0 = AIE.lock(%t60, 0) {sym_name = "LHS_tile0_lock"} - %lock60_1 = AIE.lock(%t60, 1) {sym_name = "LHS_tile1_lock"} - %lock60_2 = AIE.lock(%t60, 2) {sym_name = "RHS_tile0_lock"} - %lock60_3 = AIE.lock(%t60, 3) {sym_name = "RHS_tile1_lock"} - %lock70_0 = AIE.lock(%t70, 0) {sym_name = "RHS_tile2_lock"} - %lock70_1 = AIE.lock(%t70, 1) {sym_name = "RHS_tile3_lock"} - - %buffer6 = AIE.external_buffer {sym_name = "Out_tile0"} : memref<1025 x i32> //Out_tile0 - %buffer7 = AIE.external_buffer {sym_name = "Out_tile1"} : memref<1025 x i32> //Out_tile1 - - %buf63_0 = AIE.buffer(%t63) {sym_name = "buf63_0"} : memref<1024xi32> //LHS_tile0 - %buf63_1 = AIE.buffer(%t63) {sym_name = "buf63_1"} : memref<1024xi32> //RHS_tile0 - %buf63_2 = AIE.buffer(%t63) {sym_name = "buf63_2"} : memref<1024xi32> //Accumulator - %buf63_3 = AIE.buffer(%t63) {sym_name = "buf63_3"} : memref<1024xi32> //Sub_sum0 - %buf64_0 = AIE.buffer(%t64) {sym_name = "buf64_0"} : memref<1024xi32> //LHS_tile1 - %buf64_1 = AIE.buffer(%t64) {sym_name = "buf64_1"} : memref<1024xi32> //RHS_tile1 - %buf64_2 = AIE.buffer(%t64) {sym_name = "buf64_2"} : memref<1024xi32> //Out_tile0 - - %buf73_0 = AIE.buffer(%t73) {sym_name = "buf73_0"} : memref<1024xi32> //LHS_tile0 - %buf73_1 = AIE.buffer(%t73) {sym_name = "buf73_1"} : memref<1024xi32> //RHS_tile2 - %buf73_2 = AIE.buffer(%t73) {sym_name = "buf73_2"} : memref<1024xi32> //Accumulator - %buf73_3 = AIE.buffer(%t73) {sym_name = "buf73_3"} : memref<1024xi32> //Sub_sum1 - %buf74_0 = AIE.buffer(%t74) {sym_name = "buf74_0"} : memref<1024xi32> //LHS_tile1 - %buf74_1 = AIE.buffer(%t74) {sym_name = "buf74_1"} : memref<1024xi32> //RHS_tile3 - %buf74_2 = AIE.buffer(%t74) {sym_name = "buf74_2"} : memref<1024xi32> //Out_tile1 - - AIEX.broadcast_packet(%t60, DMA : 0) { - AIEX.bp_id(0) { - AIEX.bp_dest<%t63, DMA : 0> - AIEX.bp_dest<%t73, DMA : 0> + %t60 = aie.tile(6, 0) + %t63 = aie.tile(6, 3) + %t64 = aie.tile(6, 4) + + %t70 = aie.tile(7, 0) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + + %buffer0 = aie.external_buffer {sym_name = "LHS_tile0"} : memref<1024 x i32> //LHS_tile0 + %buffer1 = aie.external_buffer {sym_name = "LHS_tile1"} : memref<1024 x i32> //LHS_tile1 + %buffer2 = aie.external_buffer {sym_name = "RHS_tile0"} : memref<1024 x i32> //RHS_tile0 + %buffer3 = aie.external_buffer {sym_name = "RHS_tile1"} : memref<1024 x i32> //RHS_tile1 + %buffer4 = aie.external_buffer {sym_name = "RHS_tile2"} : memref<1024 x i32> //RHS_tile2 + %buffer5 = aie.external_buffer {sym_name = "RHS_tile3"} : memref<1024 x i32> //RHS_tile3 + + %lock60_0 = aie.lock(%t60, 0) {sym_name = "LHS_tile0_lock"} + %lock60_1 = aie.lock(%t60, 1) {sym_name = "LHS_tile1_lock"} + %lock60_2 = aie.lock(%t60, 2) {sym_name = "RHS_tile0_lock"} + %lock60_3 = aie.lock(%t60, 3) {sym_name = "RHS_tile1_lock"} + %lock70_0 = aie.lock(%t70, 0) {sym_name = "RHS_tile2_lock"} + %lock70_1 = aie.lock(%t70, 1) {sym_name = "RHS_tile3_lock"} + + %buffer6 = aie.external_buffer {sym_name = "Out_tile0"} : memref<1025 x i32> //Out_tile0 + %buffer7 = aie.external_buffer {sym_name = "Out_tile1"} : memref<1025 x i32> //Out_tile1 + + %buf63_0 = aie.buffer(%t63) {sym_name = "buf63_0"} : memref<1024xi32> //LHS_tile0 + %buf63_1 = aie.buffer(%t63) {sym_name = "buf63_1"} : memref<1024xi32> //RHS_tile0 + %buf63_2 = aie.buffer(%t63) {sym_name = "buf63_2"} : memref<1024xi32> //Accumulator + %buf63_3 = aie.buffer(%t63) {sym_name = "buf63_3"} : memref<1024xi32> //Sub_sum0 + %buf64_0 = aie.buffer(%t64) {sym_name = "buf64_0"} : memref<1024xi32> //LHS_tile1 + %buf64_1 = aie.buffer(%t64) {sym_name = "buf64_1"} : memref<1024xi32> //RHS_tile1 + %buf64_2 = aie.buffer(%t64) {sym_name = "buf64_2"} : memref<1024xi32> //Out_tile0 + + %buf73_0 = aie.buffer(%t73) {sym_name = "buf73_0"} : memref<1024xi32> //LHS_tile0 + %buf73_1 = aie.buffer(%t73) {sym_name = "buf73_1"} : memref<1024xi32> //RHS_tile2 + %buf73_2 = aie.buffer(%t73) {sym_name = "buf73_2"} : memref<1024xi32> //Accumulator + %buf73_3 = aie.buffer(%t73) {sym_name = "buf73_3"} : memref<1024xi32> //Sub_sum1 + %buf74_0 = aie.buffer(%t74) {sym_name = "buf74_0"} : memref<1024xi32> //LHS_tile1 + %buf74_1 = aie.buffer(%t74) {sym_name = "buf74_1"} : memref<1024xi32> //RHS_tile3 + %buf74_2 = aie.buffer(%t74) {sym_name = "buf74_2"} : memref<1024xi32> //Out_tile1 + + aiex.broadcast_packet(%t60, DMA : 0) { + aiex.bp_id(0) { + aiex.bp_dest<%t63, DMA : 0> + aiex.bp_dest<%t73, DMA : 0> } - AIEX.bp_id(1) { - AIEX.bp_dest<%t64, DMA : 0> - AIEX.bp_dest<%t74, DMA : 0> + aiex.bp_id(1) { + aiex.bp_dest<%t64, DMA : 0> + aiex.bp_dest<%t74, DMA : 0> } } - AIEX.broadcast_packet(%t60, DMA : 1) { - AIEX.bp_id(2) { - AIEX.bp_dest<%t63, DMA : 1> + aiex.broadcast_packet(%t60, DMA : 1) { + aiex.bp_id(2) { + aiex.bp_dest<%t63, DMA : 1> } - AIEX.bp_id(3) { - AIEX.bp_dest<%t64, DMA : 1> + aiex.bp_id(3) { + aiex.bp_dest<%t64, DMA : 1> } } - AIEX.broadcast_packet(%t70, DMA : 0) { - AIEX.bp_id(4) { - AIEX.bp_dest<%t73, DMA : 1> + aiex.broadcast_packet(%t70, DMA : 0) { + aiex.bp_id(4) { + aiex.bp_dest<%t73, DMA : 1> } - AIEX.bp_id(5) { - AIEX.bp_dest<%t74, DMA : 1> + aiex.bp_id(5) { + aiex.bp_dest<%t74, DMA : 1> } } - AIEX.broadcast_packet(%t64, DMA : 0) { - AIEX.bp_id(6) { - AIEX.bp_dest<%t70, DMA : 0> + aiex.broadcast_packet(%t64, DMA : 0) { + aiex.bp_id(6) { + aiex.bp_dest<%t70, DMA : 0> } } - AIEX.broadcast_packet(%t74, DMA : 0) { - AIEX.bp_id(7) { - AIEX.bp_dest<%t70, DMA : 0> + aiex.broadcast_packet(%t74, DMA : 0) { + aiex.bp_id(7) { + aiex.bp_dest<%t70, DMA : 0> } } - %dma60 = AIE.shim_dma(%t60) { - AIE.dma_start("MM2S", 0, ^bd4, ^dma2) + %dma60 = aie.shim_dma(%t60) { + aie.dma_start("MM2S", 0, ^bd4, ^dma2) ^dma2: - AIE.dma_start("MM2S", 1, ^bd6, ^end) + aie.dma_start("MM2S", 1, ^bd6, ^end) ^bd4: - AIE.use_lock(%lock60_0, "Acquire", 1) - AIE.dma_bd_packet(0x0, 0x0) - AIE.dma_bd(%buffer0 : memref<1024xi32>, 0, 1024) //send LHS_tile0 with Pack_ID=0 - AIE.use_lock(%lock60_0, "Release", 0) - AIE.next_bd ^bd5 + aie.use_lock(%lock60_0, "Acquire", 1) + aie.dma_bd_packet(0x0, 0x0) + aie.dma_bd(%buffer0 : memref<1024xi32>, 0, 1024) //send LHS_tile0 with Pack_ID=0 + aie.use_lock(%lock60_0, "Release", 0) + aie.next_bd ^bd5 ^bd5: - AIE.use_lock(%lock60_1, "Acquire", 1) - AIE.dma_bd_packet(0x1, 0x1) - AIE.dma_bd(%buffer1 : memref<1024xi32>, 0, 1024) //send LHS_tile1 with Pack_ID=1 - AIE.use_lock(%lock60_1, "Release", 0) - AIE.next_bd ^bd4 + aie.use_lock(%lock60_1, "Acquire", 1) + aie.dma_bd_packet(0x1, 0x1) + aie.dma_bd(%buffer1 : memref<1024xi32>, 0, 1024) //send LHS_tile1 with Pack_ID=1 + aie.use_lock(%lock60_1, "Release", 0) + aie.next_bd ^bd4 ^bd6: - AIE.use_lock(%lock60_2, "Acquire", 1) - AIE.dma_bd_packet(0x2, 0x2) - AIE.dma_bd(%buffer2 : memref<1024xi32>, 0, 1024) //send RHS_tile0 with Pack_ID=2 - AIE.use_lock(%lock60_2, "Release", 0) - AIE.next_bd ^bd7 + aie.use_lock(%lock60_2, "Acquire", 1) + aie.dma_bd_packet(0x2, 0x2) + aie.dma_bd(%buffer2 : memref<1024xi32>, 0, 1024) //send RHS_tile0 with Pack_ID=2 + aie.use_lock(%lock60_2, "Release", 0) + aie.next_bd ^bd7 ^bd7: - AIE.use_lock(%lock60_3, "Acquire", 1) - AIE.dma_bd_packet(0x3, 0x3) - AIE.dma_bd(%buffer3 : memref<1024xi32>, 0, 1024) //send RHS_tile1 with Pack_ID=3 - AIE.use_lock(%lock60_3, "Release", 0) - AIE.next_bd ^bd6 + aie.use_lock(%lock60_3, "Acquire", 1) + aie.dma_bd_packet(0x3, 0x3) + aie.dma_bd(%buffer3 : memref<1024xi32>, 0, 1024) //send RHS_tile1 with Pack_ID=3 + aie.use_lock(%lock60_3, "Release", 0) + aie.next_bd ^bd6 ^end: - AIE.end + aie.end } - %dma70 = AIE.shim_dma(%t70) { - AIE.dma_start("MM2S", 0, ^bd4, ^dma2) + %dma70 = aie.shim_dma(%t70) { + aie.dma_start("MM2S", 0, ^bd4, ^dma2) ^dma2: - AIE.dma_start("S2MM", 0, ^bd6, ^end) + aie.dma_start("S2MM", 0, ^bd6, ^end) ^bd4: - AIE.use_lock(%lock70_0, "Acquire", 1) - AIE.dma_bd_packet(0x4, 0x4) - AIE.dma_bd(%buffer4 : memref<1024xi32>, 0, 1024) //send RHS_tile2 with Pack_ID=4 - AIE.use_lock(%lock70_0, "Release", 0) - AIE.next_bd ^bd5 + aie.use_lock(%lock70_0, "Acquire", 1) + aie.dma_bd_packet(0x4, 0x4) + aie.dma_bd(%buffer4 : memref<1024xi32>, 0, 1024) //send RHS_tile2 with Pack_ID=4 + aie.use_lock(%lock70_0, "Release", 0) + aie.next_bd ^bd5 ^bd5: - AIE.use_lock(%lock70_1, "Acquire", 1) - AIE.dma_bd_packet(0x5, 0x5) - AIE.dma_bd(%buffer5 : memref<1024xi32>, 0, 1024) //send RHS_tile3 with Pack_ID=5 - AIE.use_lock(%lock70_1, "Release", 0) - AIE.next_bd ^bd4 + aie.use_lock(%lock70_1, "Acquire", 1) + aie.dma_bd_packet(0x5, 0x5) + aie.dma_bd(%buffer5 : memref<1024xi32>, 0, 1024) //send RHS_tile3 with Pack_ID=5 + aie.use_lock(%lock70_1, "Release", 0) + aie.next_bd ^bd4 ^bd6: - AIE.dma_bd(%buffer6 : memref<1025xi32>, 0, 1025) //send Out_tile0 with Pack_ID=6 - AIE.next_bd ^bd7 + aie.dma_bd(%buffer6 : memref<1025xi32>, 0, 1025) //send Out_tile0 with Pack_ID=6 + aie.next_bd ^bd7 ^bd7: - AIE.dma_bd(%buffer7 : memref<1025xi32>, 0, 1025) //send Out_tile1 with Pack_ID=7 - AIE.next_bd ^bd6 + aie.dma_bd(%buffer7 : memref<1025xi32>, 0, 1025) //send Out_tile1 with Pack_ID=7 + aie.next_bd ^bd6 ^end: - AIE.end + aie.end } - %lock63_0 = AIE.lock(%t63, 0) - %lock63_1 = AIE.lock(%t63, 1) - %m63 = AIE.mem(%t63) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %lock63_0 = aie.lock(%t63, 0) + %lock63_1 = aie.lock(%t63, 1) + %m63 = aie.mem(%t63) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^end) + aie.dma_start("S2MM", 1, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock63_0, Acquire, 0) - AIE.dma_bd(%buf63_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock63_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock63_0, Acquire, 0) + aie.dma_bd(%buf63_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock63_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock63_1, Acquire, 0) - AIE.dma_bd(%buf63_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock63_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock63_1, Acquire, 0) + aie.dma_bd(%buf63_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock63_1, Release, 1) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } - %lock64_0 = AIE.lock(%t64, 0) - %lock64_1 = AIE.lock(%t64, 1) - %lock64_2 = AIE.lock(%t64, 2) - %m64 = AIE.mem(%t64) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %lock64_0 = aie.lock(%t64, 0) + %lock64_1 = aie.lock(%t64, 1) + %lock64_2 = aie.lock(%t64, 2) + %m64 = aie.mem(%t64) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^dma1) + aie.dma_start("S2MM", 1, ^bd1, ^dma1) ^bd0: - AIE.use_lock(%lock64_0, Acquire, 0) - AIE.dma_bd(%buf64_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock64_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock64_0, Acquire, 0) + aie.dma_bd(%buf64_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock64_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock64_1, Acquire, 0) - AIE.dma_bd(%buf64_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock64_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock64_1, Acquire, 0) + aie.dma_bd(%buf64_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock64_1, Release, 1) + aie.next_bd ^bd1 ^dma1: - AIE.dma_start("MM2S", 0, ^bd2, ^end) + aie.dma_start("MM2S", 0, ^bd2, ^end) ^bd2: - AIE.use_lock(%lock64_2, Acquire, 1) - AIE.dma_bd_packet(0x0, 0x6) - AIE.dma_bd(%buf64_2 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock64_2, Release, 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock64_2, Acquire, 1) + aie.dma_bd_packet(0x0, 0x6) + aie.dma_bd(%buf64_2 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock64_2, Release, 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } func.func private @extern_kernel(%A: memref<1024xi32>, %B: memref<1024xi32>, %acc: memref<1024xi32>, %C: memref<1024xi32>) -> () - %lock63_3 = AIE.lock(%t63, 3) - %core63 = AIE.core(%t63) { - AIE.use_lock(%lock63_0, "Acquire", 1) - AIE.use_lock(%lock63_1, "Acquire", 1) - AIE.use_lock(%lock63_3, "Acquire", 0) + %lock63_3 = aie.lock(%t63, 3) + %core63 = aie.core(%t63) { + aie.use_lock(%lock63_0, "Acquire", 1) + aie.use_lock(%lock63_1, "Acquire", 1) + aie.use_lock(%lock63_3, "Acquire", 0) func.call @extern_kernel(%buf63_0, %buf63_1, %buf63_2, %buf63_3) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock63_3, "Release", 1) - AIE.use_lock(%lock63_1, "Release", 0) - AIE.use_lock(%lock63_0, "Release", 0) + aie.use_lock(%lock63_3, "Release", 1) + aie.use_lock(%lock63_1, "Release", 0) + aie.use_lock(%lock63_0, "Release", 0) - AIE.end + aie.end } { link_with="kernel.o" } - %core64 = AIE.core(%t64) { - AIE.use_lock(%lock63_3, "Acquire", 1) - AIE.use_lock(%lock64_0, "Acquire", 1) - AIE.use_lock(%lock64_1, "Acquire", 1) - AIE.use_lock(%lock64_2, "Acquire", 0) + %core64 = aie.core(%t64) { + aie.use_lock(%lock63_3, "Acquire", 1) + aie.use_lock(%lock64_0, "Acquire", 1) + aie.use_lock(%lock64_1, "Acquire", 1) + aie.use_lock(%lock64_2, "Acquire", 0) func.call @extern_kernel(%buf64_0, %buf64_1, %buf63_3, %buf64_2) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock64_2, "Release", 1) - AIE.use_lock(%lock64_1, "Release", 0) - AIE.use_lock(%lock64_0, "Release", 0) - AIE.use_lock(%lock63_3, "Release", 0) - AIE.end + aie.use_lock(%lock64_2, "Release", 1) + aie.use_lock(%lock64_1, "Release", 0) + aie.use_lock(%lock64_0, "Release", 0) + aie.use_lock(%lock63_3, "Release", 0) + aie.end } { link_with="kernel.o" } - %lock73_0 = AIE.lock(%t73, 0) - %lock73_1 = AIE.lock(%t73, 1) + %lock73_0 = aie.lock(%t73, 0) + %lock73_1 = aie.lock(%t73, 1) - %m73 = AIE.mem(%t73) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^end) + aie.dma_start("S2MM", 1, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock73_0, Acquire, 0) - AIE.dma_bd(%buf73_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock73_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock73_0, Acquire, 0) + aie.dma_bd(%buf73_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock73_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock73_1, Acquire, 0) - AIE.dma_bd(%buf73_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock73_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock73_1, Acquire, 0) + aie.dma_bd(%buf73_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock73_1, Release, 1) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } - %lock74_0 = AIE.lock(%t74, 0) - %lock74_1 = AIE.lock(%t74, 1) - %lock74_2 = AIE.lock(%t74, 2) - %m74 = AIE.mem(%t74) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %lock74_0 = aie.lock(%t74, 0) + %lock74_1 = aie.lock(%t74, 1) + %lock74_2 = aie.lock(%t74, 2) + %m74 = aie.mem(%t74) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 1, ^bd1, ^dma1) + aie.dma_start("S2MM", 1, ^bd1, ^dma1) ^bd0: - AIE.use_lock(%lock74_0, Acquire, 0) - AIE.dma_bd(%buf74_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock74_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock74_0, Acquire, 0) + aie.dma_bd(%buf74_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock74_0, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock74_1, Acquire, 0) - AIE.dma_bd(%buf74_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock74_1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock74_1, Acquire, 0) + aie.dma_bd(%buf74_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock74_1, Release, 1) + aie.next_bd ^bd1 ^dma1: - AIE.dma_start("MM2S", 0, ^bd2, ^end) + aie.dma_start("MM2S", 0, ^bd2, ^end) ^bd2: - AIE.use_lock(%lock74_2, Acquire, 1) - AIE.dma_bd_packet(0x0, 0x7) - AIE.dma_bd(%buf74_2 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock74_2, Release, 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock74_2, Acquire, 1) + aie.dma_bd_packet(0x0, 0x7) + aie.dma_bd(%buf74_2 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock74_2, Release, 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } - %lock73_2 = AIE.lock(%t73, 2) - %core73 = AIE.core(%t73) { - AIE.use_lock(%lock73_0, "Acquire", 1) - AIE.use_lock(%lock73_1, "Acquire", 1) - AIE.use_lock(%lock73_2, "Acquire", 0) + %lock73_2 = aie.lock(%t73, 2) + %core73 = aie.core(%t73) { + aie.use_lock(%lock73_0, "Acquire", 1) + aie.use_lock(%lock73_1, "Acquire", 1) + aie.use_lock(%lock73_2, "Acquire", 0) func.call @extern_kernel(%buf73_0, %buf73_1, %buf73_2, %buf73_3) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock73_2, "Release", 1) - AIE.use_lock(%lock73_1, "Release", 0) - AIE.use_lock(%lock73_0, "Release", 0) - AIE.end + aie.use_lock(%lock73_2, "Release", 1) + aie.use_lock(%lock73_1, "Release", 0) + aie.use_lock(%lock73_0, "Release", 0) + aie.end } { link_with="kernel.o" } - %core74 = AIE.core(%t74) { - AIE.use_lock(%lock73_2, "Acquire", 1) - AIE.use_lock(%lock74_0, "Acquire", 1) - AIE.use_lock(%lock74_1, "Acquire", 1) - AIE.use_lock(%lock74_2, "Acquire", 0) + %core74 = aie.core(%t74) { + aie.use_lock(%lock73_2, "Acquire", 1) + aie.use_lock(%lock74_0, "Acquire", 1) + aie.use_lock(%lock74_1, "Acquire", 1) + aie.use_lock(%lock74_2, "Acquire", 0) func.call @extern_kernel(%buf74_0, %buf74_1, %buf73_3, %buf74_2) : (memref<1024xi32>, memref<1024xi32>, memref<1024xi32>, memref<1024xi32>) -> () - AIE.use_lock(%lock74_2, "Release", 1) - AIE.use_lock(%lock74_1, "Release", 0) - AIE.use_lock(%lock74_0, "Release", 0) - AIE.use_lock(%lock73_2, "Release", 0) - AIE.end + aie.use_lock(%lock74_2, "Release", 1) + aie.use_lock(%lock74_1, "Release", 0) + aie.use_lock(%lock74_0, "Release", 0) + aie.use_lock(%lock73_2, "Release", 0) + aie.end } { link_with="kernel.o" } diff --git a/reference_designs/autocorrelation/aie.mlir b/reference_designs/autocorrelation/aie.mlir index 59fe21b2c9..17c8761e58 100755 --- a/reference_designs/autocorrelation/aie.mlir +++ b/reference_designs/autocorrelation/aie.mlir @@ -14,48 +14,49 @@ module @autocorrelation { - %tile0_1 = AIE.tile(2, 1) - %tile0_2 = AIE.tile(2, 2) - %tile0_3 = AIE.tile(2, 3) - %tile0_4 = AIE.tile(2, 4) - %tile0_5 = AIE.tile(2, 5) - %tile0_6 = AIE.tile(2, 6) - %tile0_7 = AIE.tile(2, 7) - %tile0_8 = AIE.tile(2, 8) - - %tile7_0 = AIE.tile(7, 0) - - %input = AIE.external_buffer {sym_name = "input"} : memref<1024 x i32> - %output = AIE.external_buffer {sym_name = "output"} : memref<1024 x i32> - - %input_lock = AIE.lock(%tile7_0) {sym_name = "input_lock"} - %output_lock = AIE.lock(%tile7_0) {sym_name = "output_lock"} - - %buf1_in = AIE.buffer(%tile0_1) : memref<1024xi32> - %buf1_out = AIE.buffer(%tile0_1) : memref<1024xi32> - %buf1_in_lock = AIE.lock(%tile0_1) - %buf1_out_lock = AIE.lock(%tile0_1) - - %buf2_in = AIE.buffer(%tile0_2) : memref<1024xi32> - %buf2_out = AIE.buffer(%tile0_2) : memref<1024xi32> - %buf2_in_lock = AIE.lock(%tile0_2) - %buf2_out_lock = AIE.lock(%tile0_2) - - %buf3_in = AIE.buffer(%tile0_3) : memref<1024xi32> - %buf3_out = AIE.buffer(%tile0_3) : memref<1024xi32> - %buf3_in_lock = AIE.lock(%tile0_3) - %buf3_out_lock = AIE.lock(%tile0_3) - - %buf4_in = AIE.buffer(%tile0_4) : memref<1024xi32> - %buf4_out = AIE.buffer(%tile0_4) : memref<1024xi32> - %buf4_in_lock = AIE.lock(%tile0_4) - %buf4_out_lock = AIE.lock(%tile0_4) - - AIE.shim_dma(%tile7_0) { - AIE.dma_start("MM2S", 0, ^bdin, ^dma2) + %tile0_1 = aie.tile(2, 1) + %tile0_2 = aie.tile(2, 2) + %tile0_3 = aie.tile(2, 3) + %tile0_4 = aie.tile(2, 4) + %tile0_5 = aie.tile(2, 5) + %tile0_6 = aie.tile(2, 6) + %tile0_7 = aie.tile(2, 7) + %tile0_8 = aie.tile(2, 8) + + %tile7_0 = aie.tile(7, 0) + + %input = aie.external_buffer {sym_name = "input"} : memref<1024 x i32> + %output = aie.external_buffer {sym_name = "output"} : memref<1024 x i32> + + %input_lock = aie.lock(%tile7_0) {sym_name = "input_lock"} + %output_lock = aie.lock(%tile7_0) {sym_name = "output_lock"} + + %buf1_in = aie.buffer(%tile0_1) : memref<1024xi32> + %buf1_out = aie.buffer(%tile0_1) : memref<1024xi32> + %buf1_in_lock = aie.lock(%tile0_1) + %buf1_out_lock = aie.lock(%tile0_1) + + %buf2_in = aie.buffer(%tile0_2) : memref<1024xi32> + %buf2_out = aie.buffer(%tile0_2) : memref<1024xi32> + %buf2_in_lock = aie.lock(%tile0_2) + %buf2_out_lock = aie.lock(%tile0_2) + + %buf3_in = aie.buffer(%tile0_3) : memref<1024xi32> + %buf3_out = aie.buffer(%tile0_3) : memref<1024xi32> + %buf3_in_lock = aie.lock(%tile0_3) + %buf3_out_lock = aie.lock(%tile0_3) + + %buf4_in = aie.buffer(%tile0_4) : memref<1024xi32> + %buf4_out = aie.buffer(%tile0_4) : memref<1024xi32> + %buf4_in_lock = aie.lock(%tile0_4) + %buf4_out_lock = aie.lock(%tile0_4) + + aie.shim_dma(%tile7_0) { + aie.dma_start("MM2S", 0, ^bdin, ^dma2) ^dma2: - AIE.dma_start("S2MM", 0, ^bdout, ^end) + aie.dma_start("S2MM", 0, ^bdout, ^end) ^bdin: +<<<<<<< HEAD AIE.use_lock(%input_lock, "Acquire", 1) AIE.dma_bd(%input : memref<1024xi32>, 0, 1024) AIE.use_lock(%input_lock, "Release", 0) @@ -65,25 +66,37 @@ module @autocorrelation { AIE.dma_bd(%output : memref<1024xi32>, 0, 1024) AIE.use_lock(%output_lock, "Release", 1) AIE.next_bd ^end +======= + aie.use_lock(%input_lock, "Acquire", 1) + aie.dma_bd(%input : memref<1024xi32>, 0, 1024) + aie.use_lock(%input_lock, "Release", 0) + aie.next_bd ^end + ^bdout: + aie.use_lock(%output_lock, "Acquire", 0) + aie.dma_bd(%output : memref<1024xi32>, 0, 1024) + aie.use_lock(%output_lock, "Release", 1) + aie.next_bd ^end +>>>>>>> 9bc1cfff (fix tests) ^end: - AIE.end + aie.end } // Simple broadcast flows for input - AIE.flow(%tile7_0, DMA : 0, %tile0_1, DMA : 0) - AIE.flow(%tile7_0, DMA : 0, %tile0_2, DMA : 0) - AIE.flow(%tile7_0, DMA : 0, %tile0_3, DMA : 0) - AIE.flow(%tile7_0, DMA : 0, %tile0_4, DMA : 0) + aie.flow(%tile7_0, DMA : 0, %tile0_1, DMA : 0) + aie.flow(%tile7_0, DMA : 0, %tile0_2, DMA : 0) + aie.flow(%tile7_0, DMA : 0, %tile0_3, DMA : 0) + aie.flow(%tile7_0, DMA : 0, %tile0_4, DMA : 0) // Flow for output - AIE.flow(%tile0_1, DMA : 0, %tile7_0, DMA : 0) + aie.flow(%tile0_1, DMA : 0, %tile7_0, DMA : 0) // The row 1 tile collects the result and DMAs back to the shim - AIE.mem(%tile0_1) { - AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + aie.mem(%tile0_1) { + aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start("MM2S", 0, ^bd1, ^end) + aie.dma_start("MM2S", 0, ^bd1, ^end) ^bd0: +<<<<<<< HEAD AIE.use_lock(%buf1_in_lock, Acquire, 0) AIE.dma_bd(%buf1_in : memref<1024xi32>, 0, 1024) AIE.use_lock(%buf1_in_lock, Release, 1) @@ -93,41 +106,73 @@ module @autocorrelation { AIE.dma_bd(%buf1_out : memref<1024xi32>, 0, 1024) AIE.use_lock(%buf1_out_lock, Release, 0) AIE.next_bd ^end +======= + aie.use_lock(%buf1_in_lock, Acquire, 0) + aie.dma_bd(%buf1_in : memref<1024xi32>, 0, 1024) + aie.use_lock(%buf1_in_lock, Release, 1) + aie.next_bd ^end + ^bd1: + aie.use_lock(%buf1_out_lock, Acquire, 1) + aie.dma_bd(%buf1_out : memref<1024xi32>, 0, 1024) + aie.use_lock(%buf1_out_lock, Release, 0) + aie.next_bd ^end +>>>>>>> 9bc1cfff (fix tests) ^end: - AIE.end + aie.end } - AIE.mem(%tile0_2) { - AIE.dma_start("S2MM", 0, ^bd0, ^end) + aie.mem(%tile0_2) { + aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: +<<<<<<< HEAD AIE.use_lock(%buf2_in_lock, Acquire, 0) AIE.dma_bd(%buf2_in : memref<1024xi32>, 0, 1024) AIE.use_lock(%buf2_in_lock, Release, 1) AIE.next_bd ^end +======= + aie.use_lock(%buf2_in_lock, Acquire, 0) + aie.dma_bd(%buf2_in : memref<1024xi32>, 0, 1024) + aie.use_lock(%buf2_in_lock, Release, 1) + aie.next_bd ^end +>>>>>>> 9bc1cfff (fix tests) ^end: - AIE.end + aie.end } - AIE.mem(%tile0_3) { - AIE.dma_start("S2MM", 0, ^bd0, ^end) + aie.mem(%tile0_3) { + aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: +<<<<<<< HEAD AIE.use_lock(%buf3_in_lock, Acquire, 0) AIE.dma_bd(%buf3_in : memref<1024xi32>, 0, 1024) AIE.use_lock(%buf3_in_lock, Release, 1) AIE.next_bd ^end +======= + aie.use_lock(%buf3_in_lock, Acquire, 0) + aie.dma_bd(%buf3_in : memref<1024xi32>, 0, 1024) + aie.use_lock(%buf3_in_lock, Release, 1) + aie.next_bd ^end +>>>>>>> 9bc1cfff (fix tests) ^end: - AIE.end + aie.end } - AIE.mem(%tile0_4) { - AIE.dma_start("S2MM", 0, ^bd0, ^end) + aie.mem(%tile0_4) { + aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: +<<<<<<< HEAD AIE.use_lock(%buf4_in_lock, Acquire, 0) AIE.dma_bd(%buf4_in : memref<1024xi32>, 0, 1024) AIE.use_lock(%buf4_in_lock, Release, 1) AIE.next_bd ^end +======= + aie.use_lock(%buf4_in_lock, Acquire, 0) + aie.dma_bd(%buf4_in : memref<1024xi32>, 0, 1024) + aie.use_lock(%buf4_in_lock, Release, 1) + aie.next_bd ^end +>>>>>>> 9bc1cfff (fix tests) ^end: - AIE.end + aie.end } func.func @autocorrelate(%bufin: memref<1024xi32>, %bufout:memref<1024xi32>, %offset:index, %blocksize:index) -> () { @@ -151,72 +196,72 @@ module @autocorrelation { return } - AIE.core(%tile0_1) { - AIE.use_lock(%buf1_in_lock, "Acquire", 1) - AIE.use_lock(%buf1_out_lock, "Acquire", 0) + aie.core(%tile0_1) { + aie.use_lock(%buf1_in_lock, "Acquire", 1) + aie.use_lock(%buf1_out_lock, "Acquire", 0) %offset = arith.constant 0 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%buf1_in, %buf1_out, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.use_lock(%buf1_in_lock, "Release", 0) + aie.use_lock(%buf1_in_lock, "Release", 0) // Append the prior results, block of 16. - AIE.use_lock(%buf2_out_lock, "Acquire", 1) + aie.use_lock(%buf2_out_lock, "Acquire", 1) %1 = memref.subview %buf2_out[0][64][1] : memref<1024xi32> to memref<64xi32> %2 = memref.subview %buf1_out[%blocksize][64][1] : memref<1024xi32> to memref<64xi32, strided<[1], offset: ?>> memref.copy %1, %2 : memref<64xi32> to memref<64xi32, strided<[1], offset: ?>> - AIE.use_lock(%buf2_out_lock, "Release", 0) + aie.use_lock(%buf2_out_lock, "Release", 0) - AIE.use_lock(%buf1_out_lock, "Release", 1) - AIE.end + aie.use_lock(%buf1_out_lock, "Release", 1) + aie.end } - AIE.core(%tile0_2) { - AIE.use_lock(%buf2_in_lock, "Acquire", 1) - AIE.use_lock(%buf2_out_lock, "Acquire", 0) + aie.core(%tile0_2) { + aie.use_lock(%buf2_in_lock, "Acquire", 1) + aie.use_lock(%buf2_out_lock, "Acquire", 0) %offset = arith.constant 16 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%buf2_in, %buf2_out, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.use_lock(%buf2_in_lock, "Release", 0) + aie.use_lock(%buf2_in_lock, "Release", 0) // Append the prior results, block of 16. - AIE.use_lock(%buf3_out_lock, "Acquire", 1) + aie.use_lock(%buf3_out_lock, "Acquire", 1) %1 = memref.subview %buf3_out[0][64][1] : memref<1024xi32> to memref<64xi32> %2 = memref.subview %buf2_out[%blocksize][64][1] : memref<1024xi32> to memref<64xi32, strided<[1], offset: ?>> memref.copy %1, %2 : memref<64xi32> to memref<64xi32, strided<[1], offset: ?>> - AIE.use_lock(%buf3_out_lock, "Release", 0) + aie.use_lock(%buf3_out_lock, "Release", 0) - AIE.use_lock(%buf2_out_lock, "Release", 1) - AIE.end + aie.use_lock(%buf2_out_lock, "Release", 1) + aie.end } - AIE.core(%tile0_3) { - AIE.use_lock(%buf3_in_lock, "Acquire", 1) - AIE.use_lock(%buf3_out_lock, "Acquire", 0) + aie.core(%tile0_3) { + aie.use_lock(%buf3_in_lock, "Acquire", 1) + aie.use_lock(%buf3_out_lock, "Acquire", 0) %offset = arith.constant 32 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%buf3_in, %buf3_out, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.use_lock(%buf3_in_lock, "Release", 0) + aie.use_lock(%buf3_in_lock, "Release", 0) // Append the prior results, block of 16. - AIE.use_lock(%buf4_out_lock, "Acquire", 1) + aie.use_lock(%buf4_out_lock, "Acquire", 1) %1 = memref.subview %buf4_out[0][64][1] : memref<1024xi32> to memref<64xi32> %2 = memref.subview %buf3_out[%blocksize][64][1] : memref<1024xi32> to memref<64xi32, strided<[1], offset: ?>> memref.copy %1, %2 : memref<64xi32> to memref<64xi32, strided<[1], offset: ?>> - AIE.use_lock(%buf4_out_lock, "Release", 0) + aie.use_lock(%buf4_out_lock, "Release", 0) - AIE.use_lock(%buf3_out_lock, "Release", 1) - AIE.end + aie.use_lock(%buf3_out_lock, "Release", 1) + aie.end } - AIE.core(%tile0_4) { - AIE.use_lock(%buf4_in_lock, "Acquire", 1) - AIE.use_lock(%buf4_out_lock, "Acquire", 0) + aie.core(%tile0_4) { + aie.use_lock(%buf4_in_lock, "Acquire", 1) + aie.use_lock(%buf4_out_lock, "Acquire", 0) %offset = arith.constant 48 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%buf4_in, %buf4_out, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.use_lock(%buf4_in_lock, "Release", 0) - AIE.use_lock(%buf4_out_lock, "Release", 1) - AIE.end + aie.use_lock(%buf4_in_lock, "Release", 0) + aie.use_lock(%buf4_out_lock, "Release", 1) + aie.end } } diff --git a/reference_designs/autocorrelation/objectFifo_version/aie.mlir b/reference_designs/autocorrelation/objectFifo_version/aie.mlir index f05e051f54..8ae23da975 100755 --- a/reference_designs/autocorrelation/objectFifo_version/aie.mlir +++ b/reference_designs/autocorrelation/objectFifo_version/aie.mlir @@ -15,29 +15,29 @@ // XFAIL: * module @autocorrelation { - %tile0_1 = AIE.tile(2, 1) - %tile0_2 = AIE.tile(2, 2) - %tile0_3 = AIE.tile(2, 3) - %tile0_4 = AIE.tile(2, 4) - %tile0_5 = AIE.tile(2, 5) - %tile0_6 = AIE.tile(2, 6) - %tile0_7 = AIE.tile(2, 7) - %tile0_8 = AIE.tile(2, 8) + %tile0_1 = aie.tile(2, 1) + %tile0_2 = aie.tile(2, 2) + %tile0_3 = aie.tile(2, 3) + %tile0_4 = aie.tile(2, 4) + %tile0_5 = aie.tile(2, 5) + %tile0_6 = aie.tile(2, 6) + %tile0_7 = aie.tile(2, 7) + %tile0_8 = aie.tile(2, 8) - %tile7_0 = AIE.tile(7, 0) + %tile7_0 = aie.tile(7, 0) - %inputExt = AIE.external_buffer {sym_name = "input"} : memref<1024 x i32> - %outputExt = AIE.external_buffer {sym_name = "output"} : memref<1024 x i32> + %inputExt = aie.external_buffer {sym_name = "input"} : memref<1024 x i32> + %outputExt = aie.external_buffer {sym_name = "output"} : memref<1024 x i32> - AIE.objectfifo @of_in (%tile7_0, {%tile0_1, %tile0_2, %tile0_3, %tile0_4}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out (%tile0_1, {%tile7_0}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile7_0, {%tile0_1, %tile0_2, %tile0_3, %tile0_4}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_out (%tile0_1, {%tile7_0}, 1 : i32) : !aie.objectfifo> - AIE.objectfifo.register_external_buffers(%tile7_0, %objFifoIn : !AIE.objectfifo>, {%inputExt}) : (memref<1024xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %objFifoOut : !AIE.objectfifo>, {%outputExt}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %objFifoIn : !aie.objectfifo>, {%inputExt}) : (memref<1024xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %objFifoOut : !aie.objectfifo>, {%outputExt}) : (memref<1024xi32>) - AIE.objectfifo @of_04_03 (%tile0_4, {%tile0_3}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_03_02 (%tile0_3, {%tile0_2}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_02_01 (%tile0_2, {%tile0_1}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_04_03 (%tile0_4, {%tile0_3}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_03_02 (%tile0_3, {%tile0_2}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_02_01 (%tile0_2, {%tile0_1}, 1 : i32) : !aie.objectfifo> func.func @autocorrelate(%bufin: memref<1024xi32>, %bufout:memref<1024xi32>, %offset:index, %blocksize:index) -> () { %c0 = arith.constant 0 : index @@ -59,104 +59,104 @@ module @autocorrelation { return } - AIE.core(%tile0_1) { - %subviewIn = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %subviewOut = AIE.objectfifo.acquire @of_out (Produce, 1) : !AIE.objectfifosubview> + aie.core(%tile0_1) { + %subviewIn = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %subviewOut = aie.objectfifo.acquire @of_out (Produce, 1) : !aie.objectfifosubview> - %input = AIE.objectfifo.subview.access %subviewIn[0] : !AIE.objectfifosubview> -> memref<1024xi32> - %output = AIE.objectfifo.subview.access %subviewOut[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %input = aie.objectfifo.subview.access %subviewIn[0] : !aie.objectfifosubview> -> memref<1024xi32> + %output = aie.objectfifo.subview.access %subviewOut[0] : !aie.objectfifosubview> -> memref<1024xi32> %offset = arith.constant 0 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%input, %output, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_in (Consume, 1) // Append the prior results, block of 16. - %subviewIn2 = AIE.objectfifo.acquire @of_in (%objFifo_02_01 : !AIE.objectfifo>, 1) : !AIE.objectfifosubview> - %input2 = AIE.objectfifo.subview.access %subviewIn2[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %subviewIn2 = aie.objectfifo.acquire @of_in (%objFifo_02_01 : !aie.objectfifo>, 1) : !aie.objectfifosubview> + %input2 = aie.objectfifo.subview.access %subviewIn2[0] : !aie.objectfifosubview> -> memref<1024xi32> %1 = memref.subview %input2[0][64][1] : memref<1024xi32> to memref<64xi32> %2 = memref.subview %output[%blocksize][64][1] : memref<1024xi32> to memref<64xi32, strided<[1], offset: ?>> memref.copy %1, %2 : memref<64xi32> to memref<64xi32, strided<[1], offset: ?>> - AIE.objectfifo.release(%objFifo_02_01 : !AIE.objectfifo>, 1) + aie.objectfifo.release(%objFifo_02_01 : !aie.objectfifo>, 1) - AIE.objectfifo.release @of_out (Produce, 1) + aie.objectfifo.release @of_out (Produce, 1) - AIE.end + aie.end } - AIE.core(%tile0_2) { - %subviewIn = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %subviewOut = AIE.objectfifo.acquire(%objFifo_02_01 : !AIE.objectfifo>, 1) : !AIE.objectfifosubview> + aie.core(%tile0_2) { + %subviewIn = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %subviewOut = aie.objectfifo.acquire(%objFifo_02_01 : !aie.objectfifo>, 1) : !aie.objectfifosubview> - %input = AIE.objectfifo.subview.access %subviewIn[0] : !AIE.objectfifosubview> -> memref<1024xi32> - %output = AIE.objectfifo.subview.access %subviewOut[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %input = aie.objectfifo.subview.access %subviewIn[0] : !aie.objectfifosubview> -> memref<1024xi32> + %output = aie.objectfifo.subview.access %subviewOut[0] : !aie.objectfifosubview> -> memref<1024xi32> %offset = arith.constant 16 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%input, %output, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_in (Consume, 1) // Append the prior results, block of 16. - %subviewIn3 = AIE.objectfifo.acquire(%objFifo_03_02 : !AIE.objectfifo>, 1) : !AIE.objectfifosubview> - %input3 = AIE.objectfifo.subview.access %subviewIn3[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %subviewIn3 = aie.objectfifo.acquire(%objFifo_03_02 : !aie.objectfifo>, 1) : !aie.objectfifosubview> + %input3 = aie.objectfifo.subview.access %subviewIn3[0] : !aie.objectfifosubview> -> memref<1024xi32> %1 = memref.subview %input3[0][64][1] : memref<1024xi32> to memref<64xi32> %2 = memref.subview %output[%blocksize][64][1] : memref<1024xi32> to memref<64xi32, strided<[1], offset: ?>> memref.copy %1, %2 : memref<64xi32> to memref<64xi32, strided<[1], offset: ?>> - AIE.objectfifo.release(%objFifo_03_02 : !AIE.objectfifo>, 1) + aie.objectfifo.release(%objFifo_03_02 : !aie.objectfifo>, 1) - AIE.objectfifo.release(%objFifo_02_01 : !AIE.objectfifo>, 1) + aie.objectfifo.release(%objFifo_02_01 : !aie.objectfifo>, 1) - AIE.end + aie.end } - AIE.core(%tile0_3) { - %subviewIn = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %subviewOut = AIE.objectfifo.acquire(%objFifo_03_02 : !AIE.objectfifo>, 1) : !AIE.objectfifosubview> + aie.core(%tile0_3) { + %subviewIn = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %subviewOut = aie.objectfifo.acquire(%objFifo_03_02 : !aie.objectfifo>, 1) : !aie.objectfifosubview> - %input = AIE.objectfifo.subview.access %subviewIn[0] : !AIE.objectfifosubview> -> memref<1024xi32> - %output = AIE.objectfifo.subview.access %subviewOut[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %input = aie.objectfifo.subview.access %subviewIn[0] : !aie.objectfifosubview> -> memref<1024xi32> + %output = aie.objectfifo.subview.access %subviewOut[0] : !aie.objectfifosubview> -> memref<1024xi32> %offset = arith.constant 32 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%input, %output, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_in (Consume, 1) // Append the prior results, block of 16. - %subviewIn4 = AIE.objectfifo.acquire(%objFifo_04_03 : !AIE.objectfifo>, 1) : !AIE.objectfifosubview> - %input4 = AIE.objectfifo.subview.access %subviewIn4[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %subviewIn4 = aie.objectfifo.acquire(%objFifo_04_03 : !aie.objectfifo>, 1) : !aie.objectfifosubview> + %input4 = aie.objectfifo.subview.access %subviewIn4[0] : !aie.objectfifosubview> -> memref<1024xi32> %1 = memref.subview %input4[0][64][1] : memref<1024xi32> to memref<64xi32> %2 = memref.subview %output[%blocksize][64][1] : memref<1024xi32> to memref<64xi32, strided<[1], offset: ?>> memref.copy %1, %2 : memref<64xi32> to memref<64xi32, strided<[1], offset: ?>> - AIE.objectfifo.release(%objFifo_04_03 : !AIE.objectfifo>, 1) + aie.objectfifo.release(%objFifo_04_03 : !aie.objectfifo>, 1) - AIE.objectfifo.release(%objFifo_03_02 : !AIE.objectfifo>, 1) + aie.objectfifo.release(%objFifo_03_02 : !aie.objectfifo>, 1) - AIE.end + aie.end } - AIE.core(%tile0_4) { - %subviewIn = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %subviewOut = AIE.objectfifo.acquire(%objFifo_04_03 : !AIE.objectfifo>, 1) : !AIE.objectfifosubview> + aie.core(%tile0_4) { + %subviewIn = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %subviewOut = aie.objectfifo.acquire(%objFifo_04_03 : !aie.objectfifo>, 1) : !aie.objectfifosubview> - %input = AIE.objectfifo.subview.access %subviewIn[0] : !AIE.objectfifosubview> -> memref<1024xi32> - %output = AIE.objectfifo.subview.access %subviewOut[0] : !AIE.objectfifosubview> -> memref<1024xi32> + %input = aie.objectfifo.subview.access %subviewIn[0] : !aie.objectfifosubview> -> memref<1024xi32> + %output = aie.objectfifo.subview.access %subviewOut[0] : !aie.objectfifosubview> -> memref<1024xi32> %offset = arith.constant 48 : index %blocksize = arith.constant 16 : index func.call @autocorrelate(%input, %output, %offset, %blocksize) : (memref<1024xi32>, memref<1024xi32>, index, index) -> () - AIE.objectfifo.release(%objFifo_04_03 : !AIE.objectfifo>, 1) - AIE.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release(%objFifo_04_03 : !aie.objectfifo>, 1) + aie.objectfifo.release @of_in (Consume, 1) - AIE.end + aie.end } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie.mlir b/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie.mlir index 50fe2e90e6..985f4b3850 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie.mlir @@ -11,85 +11,85 @@ module @hdiff_multi_AIE{ - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) { sym_name = "lock71_14" } - %lock72_14 = AIE.lock(%t72, 14) { sym_name = "lock72_14" } + %lock71_14 = aie.lock(%t71, 14) { sym_name = "lock71_14" } + %lock72_14 = aie.lock(%t72, 14) { sym_name = "lock72_14" } - AIE.objectfifo @obj_in (%t70, {%t71,%t72}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_lap (%t71, {%t72}, 4 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_flux (%t72, {%t70}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71,%t72}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_lap (%t71, {%t72}, 4 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_flux (%t72, {%t70}, 2 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x i32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x i32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x i32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x i32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Produce, 4) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Produce, 4) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release @obj_out_lap (Produce, 4) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Produce, 4) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.objectfifo.release @obj_in (Consume, 4) + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_lap.o" } func.func private @hdiff_flux(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OF: memref<256xi32>) -> () - %c14 = AIE.core(%t72) { + %c14 = aie.core(%t72) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Consume, 4) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Consume, 4) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire @obj_out_flux (Produce, 1) : !AIE.objectfifosubview> - %obj_out_flux = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire @obj_out_flux (Produce, 1) : !aie.objectfifosubview> + %obj_out_flux = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux ) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release @obj_out_lap (Consume, 4) - AIE.objectfifo.release @obj_out_flux (Produce, 1) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Consume, 4) + aie.objectfifo.release @obj_out_flux (Produce, 1) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.use_lock(%lock72_14, "Acquire", 0) // stop the timer - AIE.objectfifo.release @obj_in (Consume, 4) + aie.use_lock(%lock72_14, "Acquire", 0) // stop the timer + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_flux.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie_fp32.mlir b/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie_fp32.mlir index 0d7d29b02f..78a78e8eb6 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie_fp32.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_dual_AIE_objectFIFO_ping_pong/aie_fp32.mlir @@ -11,90 +11,90 @@ module @hdiff_multi_AIE{ - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) { sym_name = "lock71_14" } - %lock72_14 = AIE.lock(%t72, 14) { sym_name = "lock72_14" } + %lock71_14 = aie.lock(%t71, 14) { sym_name = "lock71_14" } + %lock72_14 = aie.lock(%t72, 14) { sym_name = "lock72_14" } - AIE.objectfifo @obj_in (%t70, {%t71,%t72}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_lap (%t71, {%t72}, 4 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_flux (%t72, {%t70}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71,%t72}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_lap (%t71, {%t72}, 4 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_flux (%t72, {%t70}, 2 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) - AIE.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xf32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) + aie.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xf32>) func.func private @hdiff_lap_fp32(%AL: memref<256xf32>,%BL: memref<256xf32>, %CL: memref<256xf32>, %DL: memref<256xf32>, %EL: memref<256xf32>, %OLL1: memref<256xf32>, %OLL2: memref<256xf32>, %OLL3: memref<256xf32>, %OLL4: memref<256xf32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xf32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xf32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xf32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xf32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xf32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xf32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xf32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xf32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xf32> - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Produce, 4 ) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Produce, 4 ) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xf32> func.call @hdiff_lap_fp32(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xf32>,memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>) -> () - AIE.objectfifo.release @obj_out_lap (Produce, 4) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Produce, 4) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.objectfifo.release @obj_in (Consume, 4) + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_lap_fp32.o" } func.func private @hdiff_flux_fp32(%AF: memref<256xf32>,%BF: memref<256xf32>, %CF: memref<256xf32>, %OLF1: memref<256xf32>, %OLF2: memref<256xf32>, %OLF3: memref<256xf32>, %OLF4: memref<256xf32>, %OF: memref<256xf32>) -> () - %c14 = AIE.core(%t72) { + %c14 = aie.core(%t72) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xf32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xf32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xf32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xf32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xf32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xf32> - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Consume, 4) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Consume, 4) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xf32> - %obj_out_subview_flux = AIE.objectfifo.acquire @obj_out_flux (Produce, 1) : !AIE.objectfifosubview> - %obj_out_flux = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_out_subview_flux = aie.objectfifo.acquire @obj_out_flux (Produce, 1) : !aie.objectfifosubview> + %obj_out_flux = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xf32> func.call @hdiff_flux_fp32(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux ) : (memref<256xf32>,memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>) -> () - AIE.objectfifo.release @obj_out_lap (Consume, 4) - AIE.objectfifo.release @obj_out_flux (Produce, 1) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Consume, 4) + aie.objectfifo.release @obj_out_flux (Produce, 1) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.use_lock(%lock72_14, "Acquire", 0) // stop the timer - AIE.objectfifo.release @obj_in (Consume, 4) + aie.use_lock(%lock72_14, "Acquire", 0) // stop the timer + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_flux_fp32.o" } diff --git a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie.mlir b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie.mlir index 6240598d63..6b8907f080 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie.mlir @@ -11,47 +11,47 @@ module @hdiff_single_AIE { - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) {sym_name = "lock71_14"} + %lock71_14 = aie.lock(%t71, 14) {sym_name = "lock71_14"} - AIE.objectfifo @obj_in (%t70, {%t71}, 5 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out (%t71, {%t70}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71}, 5 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out (%t71, {%t70}, 1 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x i32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x i32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x i32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x i32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xi32>) func.func private @vec_hdiff(%A: memref<256xi32>,%B: memref<256xi32>, %C: memref<256xi32>, %D: memref<256xi32>, %E: memref<256xi32>, %O: memref<256xi32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index // 256*1= (256-2)*1 %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview = AIE.objectfifo.acquire @obj_out (Produce, 1) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview = aie.objectfifo.acquire @obj_out (Produce, 1) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release @obj_in (Consume, 1) - AIE.objectfifo.release @obj_out (Produce, 1) + aie.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out (Produce, 1) } - AIE.use_lock(%lock71_14, "Release", 0) // stop the timer - AIE.objectfifo.release @obj_in (Consume, 4) + aie.use_lock(%lock71_14, "Release", 0) // stop the timer + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie_fp32.mlir b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie_fp32.mlir index 2b26fcf4b4..1533c5052e 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie_fp32.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO/aie_fp32.mlir @@ -10,51 +10,51 @@ module @hdiff_single_AIE_fp32{ - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) { sym_name = "lock71_14" } + %lock71_14 = aie.lock(%t71, 14) { sym_name = "lock71_14" } - AIE.objectfifo @obj_in (%t70, {%t71}, 5 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out (%t71, {%t70}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71}, 5 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out (%t71, {%t70}, 1 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) - AIE.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xf32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) + aie.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xf32>) func.func private @vec_hdiff_fp32(%A: memref<256xf32>,%B: memref<256xf32>, %C: memref<256xf32>, %D: memref<256xf32>, %E: memref<256xf32>, %O: memref<256xf32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xf32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xf32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xf32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xf32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xf32> - - %obj_out_subview = AIE.objectfifo.acquire @obj_out (Produce, 1) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xf32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xf32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xf32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xf32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xf32> + + %obj_out_subview = aie.objectfifo.acquire @obj_out (Produce, 1) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xf32> func.call @vec_hdiff_fp32(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xf32>,memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>) -> () - AIE.objectfifo.release @obj_in (Consume, 1) - AIE.objectfifo.release @obj_out (Produce, 1) + aie.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out (Produce, 1) } - AIE.use_lock(%lock71_14, "Release", 0) // stop the timer - AIE.objectfifo.release @obj_in (Consume, 4) + aie.use_lock(%lock71_14, "Release", 0) // stop the timer + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_fp32.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie.mlir b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie.mlir index dff289be17..c3f43f522d 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie.mlir @@ -10,47 +10,47 @@ module @hdiff_single_AIE { - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) { sym_name = "lock71_14" } + %lock71_14 = aie.lock(%t71, 14) { sym_name = "lock71_14" } - AIE.objectfifo @obj_in (%t70, {%t71}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out (%t71, {%t70}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out (%t71, {%t70}, 2 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x i32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x i32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x i32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x i32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xi32>) func.func private @vec_hdiff(%A: memref<256xi32>, %B: memref<256xi32>, %C: memref<256xi32>, %D: memref<256xi32>, %E: memref<256xi32>, %O: memref<256xi32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index // 256*1= (256-2)*1 %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview = AIE.objectfifo.acquire @obj_out (Produce, 1) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview = aie.objectfifo.acquire @obj_out (Produce, 1) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release @obj_in (Consume, 1) - AIE.objectfifo.release @obj_out (Produce, 1) + aie.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out (Produce, 1) } - AIE.use_lock(%lock71_14, "Release", 0) // stop the timer - AIE.objectfifo.release @obj_in (Consume, 4) + aie.use_lock(%lock71_14, "Release", 0) // stop the timer + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie_fp32.mlir b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie_fp32.mlir index 6ea13bc295..2384b35a6e 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie_fp32.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong/aie_fp32.mlir @@ -11,51 +11,51 @@ module @hdiff_single_AIE_fp32{ - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) { sym_name = "lock71_14" } + %lock71_14 = aie.lock(%t71, 14) { sym_name = "lock71_14" } - AIE.objectfifo @obj_in (%t70, {%t71}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out (%t71, {%t70}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out (%t71, {%t70}, 2 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) - AIE.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xf32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) + aie.objectfifo.register_external_buffers @obj_out (%t70, {%ext_buffer_out}) : (memref<512xf32>) func.func private @vec_hdiff_fp32(%A: memref<256xf32>,%B: memref<256xf32>, %C: memref<256xf32>, %D: memref<256xf32>, %E: memref<256xf32>, %O: memref<256xf32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index // 256*1= (256-2)*1 %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xf32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xf32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xf32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xf32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xf32> - - %obj_out_subview = AIE.objectfifo.acquire @obj_out (Produce, 1) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xf32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xf32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xf32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xf32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xf32> + + %obj_out_subview = aie.objectfifo.acquire @obj_out (Produce, 1) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xf32> func.call @vec_hdiff_fp32(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xf32>,memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>) -> () - AIE.objectfifo.release @obj_in (Consume, 1) - AIE.objectfifo.release @obj_out (Produce, 1) + aie.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out (Produce, 1) } - AIE.use_lock(%lock71_14, "Release", 0) // stop the timer - AIE.objectfifo.release @obj_in (Consume, 4) + aie.use_lock(%lock71_14, "Release", 0) // stop the timer + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_fp32.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong_scaled/aie.mlir b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong_scaled/aie.mlir index 6a8d8d870a..a5700619bd 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong_scaled/aie.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_single_AIE_objectFIFO_ping_pong_scaled/aie.mlir @@ -11,1097 +11,1097 @@ module @hdiff_large_0 { //---col 0---*- - %tile0_2 = AIE.tile(0, 2) + %tile0_2 = aie.tile(0, 2) //---col 1---*- - %tile1_2 = AIE.tile(1, 2) + %tile1_2 = aie.tile(1, 2) //---col 2---*- - %tile2_2 = AIE.tile(2, 2) + %tile2_2 = aie.tile(2, 2) //---col 3---*- - %tile3_2 = AIE.tile(3, 2) + %tile3_2 = aie.tile(3, 2) //---col 4---*- - %tile4_2 = AIE.tile(4, 2) + %tile4_2 = aie.tile(4, 2) //---col 5---*- - %tile5_2 = AIE.tile(5, 2) + %tile5_2 = aie.tile(5, 2) //---col 6---*- - %tile6_2 = AIE.tile(6, 2) + %tile6_2 = aie.tile(6, 2) //---col 7---*- - %tile7_2 = AIE.tile(7, 2) + %tile7_2 = aie.tile(7, 2) //---col 8---*- - %tile8_2 = AIE.tile(8, 2) + %tile8_2 = aie.tile(8, 2) //---col 9---*- - %tile9_2 = AIE.tile(9, 2) + %tile9_2 = aie.tile(9, 2) //---col 10---*- - %tile10_2 = AIE.tile(10, 2) + %tile10_2 = aie.tile(10, 2) //---col 11---*- - %tile11_2 = AIE.tile(11, 2) + %tile11_2 = aie.tile(11, 2) //---col 12---*- - %tile12_2 = AIE.tile(12, 2) + %tile12_2 = aie.tile(12, 2) //---col 13---*- - %tile13_2 = AIE.tile(13, 2) + %tile13_2 = aie.tile(13, 2) //---col 14---*- - %tile14_2 = AIE.tile(14, 2) + %tile14_2 = aie.tile(14, 2) //---col 15---*- - %tile15_2 = AIE.tile(15, 2) + %tile15_2 = aie.tile(15, 2) //---col 16---*- - %tile16_2 = AIE.tile(16, 2) + %tile16_2 = aie.tile(16, 2) //---col 17---*- - %tile17_2 = AIE.tile(17, 2) + %tile17_2 = aie.tile(17, 2) //---col 18---*- - %tile18_2 = AIE.tile(18, 2) + %tile18_2 = aie.tile(18, 2) //---col 19---*- - %tile19_2 = AIE.tile(19, 2) + %tile19_2 = aie.tile(19, 2) //---col 20---*- - %tile20_2 = AIE.tile(20, 2) + %tile20_2 = aie.tile(20, 2) //---col 21---*- - %tile21_2 = AIE.tile(21, 2) + %tile21_2 = aie.tile(21, 2) //---col 22---*- - %tile22_2 = AIE.tile(22, 2) + %tile22_2 = aie.tile(22, 2) //---col 23---*- - %tile23_2 = AIE.tile(23, 2) + %tile23_2 = aie.tile(23, 2) //---col 24---*- - %tile24_2 = AIE.tile(24, 2) + %tile24_2 = aie.tile(24, 2) //---col 25---*- - %tile25_2 = AIE.tile(25, 2) + %tile25_2 = aie.tile(25, 2) //---col 26---*- - %tile26_2 = AIE.tile(26, 2) + %tile26_2 = aie.tile(26, 2) //---col 27---*- - %tile27_2 = AIE.tile(27, 2) + %tile27_2 = aie.tile(27, 2) //---col 28---*- - %tile28_2 = AIE.tile(28, 2) + %tile28_2 = aie.tile(28, 2) //---col 29---*- - %tile29_2 = AIE.tile(29, 2) + %tile29_2 = aie.tile(29, 2) //---col 30---*- - %tile30_2 = AIE.tile(30, 2) + %tile30_2 = aie.tile(30, 2) //---col 31---*- - %tile31_2 = AIE.tile(31, 2) + %tile31_2 = aie.tile(31, 2) //---NOC TILE 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) //---NOC TILE 3---*- - %tile3_0 = AIE.tile(3, 0) + %tile3_0 = aie.tile(3, 0) //---NOC TILE 6---*- - %tile6_0 = AIE.tile(6, 0) + %tile6_0 = aie.tile(6, 0) //---NOC TILE 7---*- - %tile7_0 = AIE.tile(7, 0) + %tile7_0 = aie.tile(7, 0) //---NOC TILE 10---*- - %tile10_0 = AIE.tile(10, 0) + %tile10_0 = aie.tile(10, 0) //---NOC TILE 11---*- - %tile11_0 = AIE.tile(11, 0) + %tile11_0 = aie.tile(11, 0) //---NOC TILE 18---*- - %tile18_0 = AIE.tile(18, 0) + %tile18_0 = aie.tile(18, 0) //---NOC TILE 19---*- - %tile19_0 = AIE.tile(19, 0) + %tile19_0 = aie.tile(19, 0) //---NOC TILE 26---*- - %tile26_0 = AIE.tile(26, 0) + %tile26_0 = aie.tile(26, 0) //---NOC TILE 27---*- - %tile27_0 = AIE.tile(27, 0) + %tile27_0 = aie.tile(27, 0) //---NOC TILE 34---*- - %tile34_0 = AIE.tile(34, 0) + %tile34_0 = aie.tile(34, 0) //---NOC TILE 35---*- - %tile35_0 = AIE.tile(35, 0) + %tile35_0 = aie.tile(35, 0) //---NOC TILE 42---*- - %tile42_0 = AIE.tile(42, 0) + %tile42_0 = aie.tile(42, 0) //---NOC TILE 43---*- - %tile43_0 = AIE.tile(43, 0) + %tile43_0 = aie.tile(43, 0) //---NOC TILE 46---*- - %tile46_0 = AIE.tile(46, 0) + %tile46_0 = aie.tile(46, 0) //---NOC TILE 47---*- - %tile47_0 = AIE.tile(47, 0) + %tile47_0 = aie.tile(47, 0) - %buf_in_0_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_2},6) { sym_name = "obj_in_0" } : !AIE.objectfifo> - %buf_out_0_2_shim_2 = AIE.objectfifo.createObjectFifo(%tile0_2,{%tile2_0},2) { sym_name = "obj_out_0_2" } : !AIE.objectfifo> + %buf_in_0_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_2},6) { sym_name = "obj_in_0" } : !aie.objectfifo> + %buf_out_0_2_shim_2 = aie.objectfifo.createObjectFifo(%tile0_2,{%tile2_0},2) { sym_name = "obj_out_0_2" } : !aie.objectfifo> - %buf_in_1_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile1_2},6) { sym_name = "obj_in_1" } : !AIE.objectfifo> - %buf_out_1_2_shim_2 = AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_0},2) { sym_name = "obj_out_1_2" } : !AIE.objectfifo> + %buf_in_1_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile1_2},6) { sym_name = "obj_in_1" } : !aie.objectfifo> + %buf_out_1_2_shim_2 = aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_0},2) { sym_name = "obj_out_1_2" } : !aie.objectfifo> - %buf_in_2_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile2_2},6) { sym_name = "obj_in_2" } : !AIE.objectfifo> - %buf_out_2_2_shim_3 = AIE.objectfifo.createObjectFifo(%tile2_2,{%tile3_0},2) { sym_name = "obj_out_2_2" } : !AIE.objectfifo> + %buf_in_2_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile2_2},6) { sym_name = "obj_in_2" } : !aie.objectfifo> + %buf_out_2_2_shim_3 = aie.objectfifo.createObjectFifo(%tile2_2,{%tile3_0},2) { sym_name = "obj_out_2_2" } : !aie.objectfifo> - %buf_in_3_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_2},6) { sym_name = "obj_in_3" } : !AIE.objectfifo> - %buf_out_3_2_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_2,{%tile3_0},2) { sym_name = "obj_out_3_2" } : !AIE.objectfifo> + %buf_in_3_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_2},6) { sym_name = "obj_in_3" } : !aie.objectfifo> + %buf_out_3_2_shim_3 = aie.objectfifo.createObjectFifo(%tile3_2,{%tile3_0},2) { sym_name = "obj_out_3_2" } : !aie.objectfifo> - %buf_in_4_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile4_2},6) { sym_name = "obj_in_4" } : !AIE.objectfifo> - %buf_out_4_2_shim_6 = AIE.objectfifo.createObjectFifo(%tile4_2,{%tile6_0},2) { sym_name = "obj_out_4_2" } : !AIE.objectfifo> + %buf_in_4_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile4_2},6) { sym_name = "obj_in_4" } : !aie.objectfifo> + %buf_out_4_2_shim_6 = aie.objectfifo.createObjectFifo(%tile4_2,{%tile6_0},2) { sym_name = "obj_out_4_2" } : !aie.objectfifo> - %buf_in_5_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile5_2},6) { sym_name = "obj_in_5" } : !AIE.objectfifo> - %buf_out_5_2_shim_6 = AIE.objectfifo.createObjectFifo(%tile5_2,{%tile6_0},2) { sym_name = "obj_out_5_2" } : !AIE.objectfifo> + %buf_in_5_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile5_2},6) { sym_name = "obj_in_5" } : !aie.objectfifo> + %buf_out_5_2_shim_6 = aie.objectfifo.createObjectFifo(%tile5_2,{%tile6_0},2) { sym_name = "obj_out_5_2" } : !aie.objectfifo> - %buf_in_6_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile6_2},6) { sym_name = "obj_in_6" } : !AIE.objectfifo> - %buf_out_6_2_shim_7 = AIE.objectfifo.createObjectFifo(%tile6_2,{%tile7_0},2) { sym_name = "obj_out_6_2" } : !AIE.objectfifo> + %buf_in_6_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile6_2},6) { sym_name = "obj_in_6" } : !aie.objectfifo> + %buf_out_6_2_shim_7 = aie.objectfifo.createObjectFifo(%tile6_2,{%tile7_0},2) { sym_name = "obj_out_6_2" } : !aie.objectfifo> - %buf_in_7_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile7_2},6) { sym_name = "obj_in_7" } : !AIE.objectfifo> - %buf_out_7_2_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_2,{%tile7_0},2) { sym_name = "obj_out_7_2" } : !AIE.objectfifo> + %buf_in_7_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile7_2},6) { sym_name = "obj_in_7" } : !aie.objectfifo> + %buf_out_7_2_shim_7 = aie.objectfifo.createObjectFifo(%tile7_2,{%tile7_0},2) { sym_name = "obj_out_7_2" } : !aie.objectfifo> - %buf_in_8_shim_10 = AIE.objectfifo.createObjectFifo(%tile10_0,{%tile8_2},6) { sym_name = "obj_in_8" } : !AIE.objectfifo> - %buf_out_8_2_shim_10 = AIE.objectfifo.createObjectFifo(%tile8_2,{%tile10_0},2) { sym_name = "obj_out_8_2" } : !AIE.objectfifo> + %buf_in_8_shim_10 = aie.objectfifo.createObjectFifo(%tile10_0,{%tile8_2},6) { sym_name = "obj_in_8" } : !aie.objectfifo> + %buf_out_8_2_shim_10 = aie.objectfifo.createObjectFifo(%tile8_2,{%tile10_0},2) { sym_name = "obj_out_8_2" } : !aie.objectfifo> - %buf_in_9_shim_10 = AIE.objectfifo.createObjectFifo(%tile10_0,{%tile9_2},6) { sym_name = "obj_in_9" } : !AIE.objectfifo> - %buf_out_9_2_shim_10 = AIE.objectfifo.createObjectFifo(%tile9_2,{%tile10_0},2) { sym_name = "obj_out_9_2" } : !AIE.objectfifo> + %buf_in_9_shim_10 = aie.objectfifo.createObjectFifo(%tile10_0,{%tile9_2},6) { sym_name = "obj_in_9" } : !aie.objectfifo> + %buf_out_9_2_shim_10 = aie.objectfifo.createObjectFifo(%tile9_2,{%tile10_0},2) { sym_name = "obj_out_9_2" } : !aie.objectfifo> - %buf_in_10_shim_11 = AIE.objectfifo.createObjectFifo(%tile11_0,{%tile10_2},6) { sym_name = "obj_in_10" } : !AIE.objectfifo> - %buf_out_10_2_shim_11 = AIE.objectfifo.createObjectFifo(%tile10_2,{%tile11_0},2) { sym_name = "obj_out_10_2" } : !AIE.objectfifo> + %buf_in_10_shim_11 = aie.objectfifo.createObjectFifo(%tile11_0,{%tile10_2},6) { sym_name = "obj_in_10" } : !aie.objectfifo> + %buf_out_10_2_shim_11 = aie.objectfifo.createObjectFifo(%tile10_2,{%tile11_0},2) { sym_name = "obj_out_10_2" } : !aie.objectfifo> - %buf_in_11_shim_11 = AIE.objectfifo.createObjectFifo(%tile11_0,{%tile11_2},6) { sym_name = "obj_in_11" } : !AIE.objectfifo> - %buf_out_11_2_shim_11 = AIE.objectfifo.createObjectFifo(%tile11_2,{%tile11_0},2) { sym_name = "obj_out_11_2" } : !AIE.objectfifo> + %buf_in_11_shim_11 = aie.objectfifo.createObjectFifo(%tile11_0,{%tile11_2},6) { sym_name = "obj_in_11" } : !aie.objectfifo> + %buf_out_11_2_shim_11 = aie.objectfifo.createObjectFifo(%tile11_2,{%tile11_0},2) { sym_name = "obj_out_11_2" } : !aie.objectfifo> - %buf_in_12_shim_18 = AIE.objectfifo.createObjectFifo(%tile18_0,{%tile12_2},6) { sym_name = "obj_in_12" } : !AIE.objectfifo> - %buf_out_12_2_shim_18 = AIE.objectfifo.createObjectFifo(%tile12_2,{%tile18_0},2) { sym_name = "obj_out_12_2" } : !AIE.objectfifo> + %buf_in_12_shim_18 = aie.objectfifo.createObjectFifo(%tile18_0,{%tile12_2},6) { sym_name = "obj_in_12" } : !aie.objectfifo> + %buf_out_12_2_shim_18 = aie.objectfifo.createObjectFifo(%tile12_2,{%tile18_0},2) { sym_name = "obj_out_12_2" } : !aie.objectfifo> - %buf_in_13_shim_18 = AIE.objectfifo.createObjectFifo(%tile18_0,{%tile13_2},6) { sym_name = "obj_in_13" } : !AIE.objectfifo> - %buf_out_13_2_shim_18 = AIE.objectfifo.createObjectFifo(%tile13_2,{%tile18_0},2) { sym_name = "obj_out_13_2" } : !AIE.objectfifo> + %buf_in_13_shim_18 = aie.objectfifo.createObjectFifo(%tile18_0,{%tile13_2},6) { sym_name = "obj_in_13" } : !aie.objectfifo> + %buf_out_13_2_shim_18 = aie.objectfifo.createObjectFifo(%tile13_2,{%tile18_0},2) { sym_name = "obj_out_13_2" } : !aie.objectfifo> - %buf_in_14_shim_19 = AIE.objectfifo.createObjectFifo(%tile19_0,{%tile14_2},6) { sym_name = "obj_in_14" } : !AIE.objectfifo> - %buf_out_14_2_shim_19 = AIE.objectfifo.createObjectFifo(%tile14_2,{%tile19_0},2) { sym_name = "obj_out_14_2" } : !AIE.objectfifo> + %buf_in_14_shim_19 = aie.objectfifo.createObjectFifo(%tile19_0,{%tile14_2},6) { sym_name = "obj_in_14" } : !aie.objectfifo> + %buf_out_14_2_shim_19 = aie.objectfifo.createObjectFifo(%tile14_2,{%tile19_0},2) { sym_name = "obj_out_14_2" } : !aie.objectfifo> - %buf_in_15_shim_19 = AIE.objectfifo.createObjectFifo(%tile19_0,{%tile15_2},6) { sym_name = "obj_in_15" } : !AIE.objectfifo> - %buf_out_15_2_shim_19 = AIE.objectfifo.createObjectFifo(%tile15_2,{%tile19_0},2) { sym_name = "obj_out_15_2" } : !AIE.objectfifo> + %buf_in_15_shim_19 = aie.objectfifo.createObjectFifo(%tile19_0,{%tile15_2},6) { sym_name = "obj_in_15" } : !aie.objectfifo> + %buf_out_15_2_shim_19 = aie.objectfifo.createObjectFifo(%tile15_2,{%tile19_0},2) { sym_name = "obj_out_15_2" } : !aie.objectfifo> - %buf_in_16_shim_26 = AIE.objectfifo.createObjectFifo(%tile26_0,{%tile16_2},6) { sym_name = "obj_in_16" } : !AIE.objectfifo> - %buf_out_16_2_shim_26 = AIE.objectfifo.createObjectFifo(%tile16_2,{%tile26_0},2) { sym_name = "obj_out_16_2" } : !AIE.objectfifo> + %buf_in_16_shim_26 = aie.objectfifo.createObjectFifo(%tile26_0,{%tile16_2},6) { sym_name = "obj_in_16" } : !aie.objectfifo> + %buf_out_16_2_shim_26 = aie.objectfifo.createObjectFifo(%tile16_2,{%tile26_0},2) { sym_name = "obj_out_16_2" } : !aie.objectfifo> - %buf_in_17_shim_26 = AIE.objectfifo.createObjectFifo(%tile26_0,{%tile17_2},6) { sym_name = "obj_in_17" } : !AIE.objectfifo> - %buf_out_17_2_shim_26 = AIE.objectfifo.createObjectFifo(%tile17_2,{%tile26_0},2) { sym_name = "obj_out_17_2" } : !AIE.objectfifo> + %buf_in_17_shim_26 = aie.objectfifo.createObjectFifo(%tile26_0,{%tile17_2},6) { sym_name = "obj_in_17" } : !aie.objectfifo> + %buf_out_17_2_shim_26 = aie.objectfifo.createObjectFifo(%tile17_2,{%tile26_0},2) { sym_name = "obj_out_17_2" } : !aie.objectfifo> - %buf_in_18_shim_27 = AIE.objectfifo.createObjectFifo(%tile27_0,{%tile18_2},6) { sym_name = "obj_in_18" } : !AIE.objectfifo> - %buf_out_18_2_shim_27 = AIE.objectfifo.createObjectFifo(%tile18_2,{%tile27_0},2) { sym_name = "obj_out_18_2" } : !AIE.objectfifo> + %buf_in_18_shim_27 = aie.objectfifo.createObjectFifo(%tile27_0,{%tile18_2},6) { sym_name = "obj_in_18" } : !aie.objectfifo> + %buf_out_18_2_shim_27 = aie.objectfifo.createObjectFifo(%tile18_2,{%tile27_0},2) { sym_name = "obj_out_18_2" } : !aie.objectfifo> - %buf_in_19_shim_27 = AIE.objectfifo.createObjectFifo(%tile27_0,{%tile19_2},6) { sym_name = "obj_in_19" } : !AIE.objectfifo> - %buf_out_19_2_shim_27 = AIE.objectfifo.createObjectFifo(%tile19_2,{%tile27_0},2) { sym_name = "obj_out_19_2" } : !AIE.objectfifo> + %buf_in_19_shim_27 = aie.objectfifo.createObjectFifo(%tile27_0,{%tile19_2},6) { sym_name = "obj_in_19" } : !aie.objectfifo> + %buf_out_19_2_shim_27 = aie.objectfifo.createObjectFifo(%tile19_2,{%tile27_0},2) { sym_name = "obj_out_19_2" } : !aie.objectfifo> - %buf_in_20_shim_34 = AIE.objectfifo.createObjectFifo(%tile34_0,{%tile20_2},6) { sym_name = "obj_in_20" } : !AIE.objectfifo> - %buf_out_20_2_shim_34 = AIE.objectfifo.createObjectFifo(%tile20_2,{%tile34_0},2) { sym_name = "obj_out_20_2" } : !AIE.objectfifo> + %buf_in_20_shim_34 = aie.objectfifo.createObjectFifo(%tile34_0,{%tile20_2},6) { sym_name = "obj_in_20" } : !aie.objectfifo> + %buf_out_20_2_shim_34 = aie.objectfifo.createObjectFifo(%tile20_2,{%tile34_0},2) { sym_name = "obj_out_20_2" } : !aie.objectfifo> - %buf_in_21_shim_34 = AIE.objectfifo.createObjectFifo(%tile34_0,{%tile21_2},6) { sym_name = "obj_in_21" } : !AIE.objectfifo> - %buf_out_21_2_shim_34 = AIE.objectfifo.createObjectFifo(%tile21_2,{%tile34_0},2) { sym_name = "obj_out_21_2" } : !AIE.objectfifo> + %buf_in_21_shim_34 = aie.objectfifo.createObjectFifo(%tile34_0,{%tile21_2},6) { sym_name = "obj_in_21" } : !aie.objectfifo> + %buf_out_21_2_shim_34 = aie.objectfifo.createObjectFifo(%tile21_2,{%tile34_0},2) { sym_name = "obj_out_21_2" } : !aie.objectfifo> - %buf_in_22_shim_35 = AIE.objectfifo.createObjectFifo(%tile35_0,{%tile22_2},6) { sym_name = "obj_in_22" } : !AIE.objectfifo> - %buf_out_22_2_shim_35 = AIE.objectfifo.createObjectFifo(%tile22_2,{%tile35_0},2) { sym_name = "obj_out_22_2" } : !AIE.objectfifo> + %buf_in_22_shim_35 = aie.objectfifo.createObjectFifo(%tile35_0,{%tile22_2},6) { sym_name = "obj_in_22" } : !aie.objectfifo> + %buf_out_22_2_shim_35 = aie.objectfifo.createObjectFifo(%tile22_2,{%tile35_0},2) { sym_name = "obj_out_22_2" } : !aie.objectfifo> - %buf_in_23_shim_35 = AIE.objectfifo.createObjectFifo(%tile35_0,{%tile23_2},6) { sym_name = "obj_in_23" } : !AIE.objectfifo> - %buf_out_23_2_shim_35 = AIE.objectfifo.createObjectFifo(%tile23_2,{%tile35_0},2) { sym_name = "obj_out_23_2" } : !AIE.objectfifo> + %buf_in_23_shim_35 = aie.objectfifo.createObjectFifo(%tile35_0,{%tile23_2},6) { sym_name = "obj_in_23" } : !aie.objectfifo> + %buf_out_23_2_shim_35 = aie.objectfifo.createObjectFifo(%tile23_2,{%tile35_0},2) { sym_name = "obj_out_23_2" } : !aie.objectfifo> - %buf_in_24_shim_42 = AIE.objectfifo.createObjectFifo(%tile42_0,{%tile24_2},6) { sym_name = "obj_in_24" } : !AIE.objectfifo> - %buf_out_24_2_shim_42 = AIE.objectfifo.createObjectFifo(%tile24_2,{%tile42_0},2) { sym_name = "obj_out_24_2" } : !AIE.objectfifo> + %buf_in_24_shim_42 = aie.objectfifo.createObjectFifo(%tile42_0,{%tile24_2},6) { sym_name = "obj_in_24" } : !aie.objectfifo> + %buf_out_24_2_shim_42 = aie.objectfifo.createObjectFifo(%tile24_2,{%tile42_0},2) { sym_name = "obj_out_24_2" } : !aie.objectfifo> - %buf_in_25_shim_42 = AIE.objectfifo.createObjectFifo(%tile42_0,{%tile25_2},6) { sym_name = "obj_in_25" } : !AIE.objectfifo> - %buf_out_25_2_shim_42 = AIE.objectfifo.createObjectFifo(%tile25_2,{%tile42_0},2) { sym_name = "obj_out_25_2" } : !AIE.objectfifo> + %buf_in_25_shim_42 = aie.objectfifo.createObjectFifo(%tile42_0,{%tile25_2},6) { sym_name = "obj_in_25" } : !aie.objectfifo> + %buf_out_25_2_shim_42 = aie.objectfifo.createObjectFifo(%tile25_2,{%tile42_0},2) { sym_name = "obj_out_25_2" } : !aie.objectfifo> - %buf_in_26_shim_43 = AIE.objectfifo.createObjectFifo(%tile43_0,{%tile26_2},6) { sym_name = "obj_in_26" } : !AIE.objectfifo> - %buf_out_26_2_shim_43 = AIE.objectfifo.createObjectFifo(%tile26_2,{%tile43_0},2) { sym_name = "obj_out_26_2" } : !AIE.objectfifo> + %buf_in_26_shim_43 = aie.objectfifo.createObjectFifo(%tile43_0,{%tile26_2},6) { sym_name = "obj_in_26" } : !aie.objectfifo> + %buf_out_26_2_shim_43 = aie.objectfifo.createObjectFifo(%tile26_2,{%tile43_0},2) { sym_name = "obj_out_26_2" } : !aie.objectfifo> - %buf_in_27_shim_43 = AIE.objectfifo.createObjectFifo(%tile43_0,{%tile27_2},6) { sym_name = "obj_in_27" } : !AIE.objectfifo> - %buf_out_27_2_shim_43 = AIE.objectfifo.createObjectFifo(%tile27_2,{%tile43_0},2) { sym_name = "obj_out_27_2" } : !AIE.objectfifo> + %buf_in_27_shim_43 = aie.objectfifo.createObjectFifo(%tile43_0,{%tile27_2},6) { sym_name = "obj_in_27" } : !aie.objectfifo> + %buf_out_27_2_shim_43 = aie.objectfifo.createObjectFifo(%tile27_2,{%tile43_0},2) { sym_name = "obj_out_27_2" } : !aie.objectfifo> - %buf_in_28_shim_46 = AIE.objectfifo.createObjectFifo(%tile46_0,{%tile28_2},6) { sym_name = "obj_in_28" } : !AIE.objectfifo> - %buf_out_28_2_shim_46 = AIE.objectfifo.createObjectFifo(%tile28_2,{%tile46_0},2) { sym_name = "obj_out_28_2" } : !AIE.objectfifo> + %buf_in_28_shim_46 = aie.objectfifo.createObjectFifo(%tile46_0,{%tile28_2},6) { sym_name = "obj_in_28" } : !aie.objectfifo> + %buf_out_28_2_shim_46 = aie.objectfifo.createObjectFifo(%tile28_2,{%tile46_0},2) { sym_name = "obj_out_28_2" } : !aie.objectfifo> - %buf_in_29_shim_46 = AIE.objectfifo.createObjectFifo(%tile46_0,{%tile29_2},6) { sym_name = "obj_in_29" } : !AIE.objectfifo> - %buf_out_29_2_shim_46 = AIE.objectfifo.createObjectFifo(%tile29_2,{%tile46_0},2) { sym_name = "obj_out_29_2" } : !AIE.objectfifo> + %buf_in_29_shim_46 = aie.objectfifo.createObjectFifo(%tile46_0,{%tile29_2},6) { sym_name = "obj_in_29" } : !aie.objectfifo> + %buf_out_29_2_shim_46 = aie.objectfifo.createObjectFifo(%tile29_2,{%tile46_0},2) { sym_name = "obj_out_29_2" } : !aie.objectfifo> - %buf_in_30_shim_47 = AIE.objectfifo.createObjectFifo(%tile47_0,{%tile30_2},6) { sym_name = "obj_in_30" } : !AIE.objectfifo> - %buf_out_30_2_shim_47 = AIE.objectfifo.createObjectFifo(%tile30_2,{%tile47_0},2) { sym_name = "obj_out_30_2" } : !AIE.objectfifo> + %buf_in_30_shim_47 = aie.objectfifo.createObjectFifo(%tile47_0,{%tile30_2},6) { sym_name = "obj_in_30" } : !aie.objectfifo> + %buf_out_30_2_shim_47 = aie.objectfifo.createObjectFifo(%tile30_2,{%tile47_0},2) { sym_name = "obj_out_30_2" } : !aie.objectfifo> - %buf_in_31_shim_47 = AIE.objectfifo.createObjectFifo(%tile47_0,{%tile31_2},6) { sym_name = "obj_in_31" } : !AIE.objectfifo> - %buf_out_31_2_shim_47 = AIE.objectfifo.createObjectFifo(%tile31_2,{%tile47_0},2) { sym_name = "obj_out_31_2" } : !AIE.objectfifo> + %buf_in_31_shim_47 = aie.objectfifo.createObjectFifo(%tile47_0,{%tile31_2},6) { sym_name = "obj_in_31" } : !aie.objectfifo> + %buf_out_31_2_shim_47 = aie.objectfifo.createObjectFifo(%tile31_2,{%tile47_0},2) { sym_name = "obj_out_31_2" } : !aie.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<1536 x i32> - %ext_buffer_out_0_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_0_2"}: memref<512 x i32> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<1536 x i32> + %ext_buffer_out_0_2 = aie.external_buffer {sym_name = "ddr_buffer_out_0_2"}: memref<512 x i32> - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<1536 x i32> - %ext_buffer_out_1_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_1_2"}: memref<512 x i32> + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<1536 x i32> + %ext_buffer_out_1_2 = aie.external_buffer {sym_name = "ddr_buffer_out_1_2"}: memref<512 x i32> - %ext_buffer_in_2 = AIE.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<1536 x i32> - %ext_buffer_out_2_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_2_2"}: memref<512 x i32> + %ext_buffer_in_2 = aie.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<1536 x i32> + %ext_buffer_out_2_2 = aie.external_buffer {sym_name = "ddr_buffer_out_2_2"}: memref<512 x i32> - %ext_buffer_in_3 = AIE.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<1536 x i32> - %ext_buffer_out_3_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_3_2"}: memref<512 x i32> + %ext_buffer_in_3 = aie.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<1536 x i32> + %ext_buffer_out_3_2 = aie.external_buffer {sym_name = "ddr_buffer_out_3_2"}: memref<512 x i32> - %ext_buffer_in_4 = AIE.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<1536 x i32> - %ext_buffer_out_4_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_4_2"}: memref<512 x i32> + %ext_buffer_in_4 = aie.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<1536 x i32> + %ext_buffer_out_4_2 = aie.external_buffer {sym_name = "ddr_buffer_out_4_2"}: memref<512 x i32> - %ext_buffer_in_5 = AIE.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<1536 x i32> - %ext_buffer_out_5_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_5_2"}: memref<512 x i32> + %ext_buffer_in_5 = aie.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<1536 x i32> + %ext_buffer_out_5_2 = aie.external_buffer {sym_name = "ddr_buffer_out_5_2"}: memref<512 x i32> - %ext_buffer_in_6 = AIE.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<1536 x i32> - %ext_buffer_out_6_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_6_2"}: memref<512 x i32> + %ext_buffer_in_6 = aie.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<1536 x i32> + %ext_buffer_out_6_2 = aie.external_buffer {sym_name = "ddr_buffer_out_6_2"}: memref<512 x i32> - %ext_buffer_in_7 = AIE.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<1536 x i32> - %ext_buffer_out_7_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_7_2"}: memref<512 x i32> + %ext_buffer_in_7 = aie.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<1536 x i32> + %ext_buffer_out_7_2 = aie.external_buffer {sym_name = "ddr_buffer_out_7_2"}: memref<512 x i32> - %ext_buffer_in_8 = AIE.external_buffer {sym_name = "ddr_buffer_in_8"}: memref<1536 x i32> - %ext_buffer_out_8_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_8_2"}: memref<512 x i32> + %ext_buffer_in_8 = aie.external_buffer {sym_name = "ddr_buffer_in_8"}: memref<1536 x i32> + %ext_buffer_out_8_2 = aie.external_buffer {sym_name = "ddr_buffer_out_8_2"}: memref<512 x i32> - %ext_buffer_in_9 = AIE.external_buffer {sym_name = "ddr_buffer_in_9"}: memref<1536 x i32> - %ext_buffer_out_9_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_9_2"}: memref<512 x i32> + %ext_buffer_in_9 = aie.external_buffer {sym_name = "ddr_buffer_in_9"}: memref<1536 x i32> + %ext_buffer_out_9_2 = aie.external_buffer {sym_name = "ddr_buffer_out_9_2"}: memref<512 x i32> - %ext_buffer_in_10 = AIE.external_buffer {sym_name = "ddr_buffer_in_10"}: memref<1536 x i32> - %ext_buffer_out_10_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_10_2"}: memref<512 x i32> + %ext_buffer_in_10 = aie.external_buffer {sym_name = "ddr_buffer_in_10"}: memref<1536 x i32> + %ext_buffer_out_10_2 = aie.external_buffer {sym_name = "ddr_buffer_out_10_2"}: memref<512 x i32> - %ext_buffer_in_11 = AIE.external_buffer {sym_name = "ddr_buffer_in_11"}: memref<1536 x i32> - %ext_buffer_out_11_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_11_2"}: memref<512 x i32> + %ext_buffer_in_11 = aie.external_buffer {sym_name = "ddr_buffer_in_11"}: memref<1536 x i32> + %ext_buffer_out_11_2 = aie.external_buffer {sym_name = "ddr_buffer_out_11_2"}: memref<512 x i32> - %ext_buffer_in_12 = AIE.external_buffer {sym_name = "ddr_buffer_in_12"}: memref<1536 x i32> - %ext_buffer_out_12_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_12_2"}: memref<512 x i32> + %ext_buffer_in_12 = aie.external_buffer {sym_name = "ddr_buffer_in_12"}: memref<1536 x i32> + %ext_buffer_out_12_2 = aie.external_buffer {sym_name = "ddr_buffer_out_12_2"}: memref<512 x i32> - %ext_buffer_in_13 = AIE.external_buffer {sym_name = "ddr_buffer_in_13"}: memref<1536 x i32> - %ext_buffer_out_13_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_13_2"}: memref<512 x i32> + %ext_buffer_in_13 = aie.external_buffer {sym_name = "ddr_buffer_in_13"}: memref<1536 x i32> + %ext_buffer_out_13_2 = aie.external_buffer {sym_name = "ddr_buffer_out_13_2"}: memref<512 x i32> - %ext_buffer_in_14 = AIE.external_buffer {sym_name = "ddr_buffer_in_14"}: memref<1536 x i32> - %ext_buffer_out_14_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_14_2"}: memref<512 x i32> + %ext_buffer_in_14 = aie.external_buffer {sym_name = "ddr_buffer_in_14"}: memref<1536 x i32> + %ext_buffer_out_14_2 = aie.external_buffer {sym_name = "ddr_buffer_out_14_2"}: memref<512 x i32> - %ext_buffer_in_15 = AIE.external_buffer {sym_name = "ddr_buffer_in_15"}: memref<1536 x i32> - %ext_buffer_out_15_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_15_2"}: memref<512 x i32> + %ext_buffer_in_15 = aie.external_buffer {sym_name = "ddr_buffer_in_15"}: memref<1536 x i32> + %ext_buffer_out_15_2 = aie.external_buffer {sym_name = "ddr_buffer_out_15_2"}: memref<512 x i32> - %ext_buffer_in_16 = AIE.external_buffer {sym_name = "ddr_buffer_in_16"}: memref<1536 x i32> - %ext_buffer_out_16_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_16_2"}: memref<512 x i32> + %ext_buffer_in_16 = aie.external_buffer {sym_name = "ddr_buffer_in_16"}: memref<1536 x i32> + %ext_buffer_out_16_2 = aie.external_buffer {sym_name = "ddr_buffer_out_16_2"}: memref<512 x i32> - %ext_buffer_in_17 = AIE.external_buffer {sym_name = "ddr_buffer_in_17"}: memref<1536 x i32> - %ext_buffer_out_17_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_17_2"}: memref<512 x i32> + %ext_buffer_in_17 = aie.external_buffer {sym_name = "ddr_buffer_in_17"}: memref<1536 x i32> + %ext_buffer_out_17_2 = aie.external_buffer {sym_name = "ddr_buffer_out_17_2"}: memref<512 x i32> - %ext_buffer_in_18 = AIE.external_buffer {sym_name = "ddr_buffer_in_18"}: memref<1536 x i32> - %ext_buffer_out_18_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_18_2"}: memref<512 x i32> + %ext_buffer_in_18 = aie.external_buffer {sym_name = "ddr_buffer_in_18"}: memref<1536 x i32> + %ext_buffer_out_18_2 = aie.external_buffer {sym_name = "ddr_buffer_out_18_2"}: memref<512 x i32> - %ext_buffer_in_19 = AIE.external_buffer {sym_name = "ddr_buffer_in_19"}: memref<1536 x i32> - %ext_buffer_out_19_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_19_2"}: memref<512 x i32> + %ext_buffer_in_19 = aie.external_buffer {sym_name = "ddr_buffer_in_19"}: memref<1536 x i32> + %ext_buffer_out_19_2 = aie.external_buffer {sym_name = "ddr_buffer_out_19_2"}: memref<512 x i32> - %ext_buffer_in_20 = AIE.external_buffer {sym_name = "ddr_buffer_in_20"}: memref<1536 x i32> - %ext_buffer_out_20_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_20_2"}: memref<512 x i32> + %ext_buffer_in_20 = aie.external_buffer {sym_name = "ddr_buffer_in_20"}: memref<1536 x i32> + %ext_buffer_out_20_2 = aie.external_buffer {sym_name = "ddr_buffer_out_20_2"}: memref<512 x i32> - %ext_buffer_in_21 = AIE.external_buffer {sym_name = "ddr_buffer_in_21"}: memref<1536 x i32> - %ext_buffer_out_21_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_21_2"}: memref<512 x i32> + %ext_buffer_in_21 = aie.external_buffer {sym_name = "ddr_buffer_in_21"}: memref<1536 x i32> + %ext_buffer_out_21_2 = aie.external_buffer {sym_name = "ddr_buffer_out_21_2"}: memref<512 x i32> - %ext_buffer_in_22 = AIE.external_buffer {sym_name = "ddr_buffer_in_22"}: memref<1536 x i32> - %ext_buffer_out_22_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_22_2"}: memref<512 x i32> + %ext_buffer_in_22 = aie.external_buffer {sym_name = "ddr_buffer_in_22"}: memref<1536 x i32> + %ext_buffer_out_22_2 = aie.external_buffer {sym_name = "ddr_buffer_out_22_2"}: memref<512 x i32> - %ext_buffer_in_23 = AIE.external_buffer {sym_name = "ddr_buffer_in_23"}: memref<1536 x i32> - %ext_buffer_out_23_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_23_2"}: memref<512 x i32> + %ext_buffer_in_23 = aie.external_buffer {sym_name = "ddr_buffer_in_23"}: memref<1536 x i32> + %ext_buffer_out_23_2 = aie.external_buffer {sym_name = "ddr_buffer_out_23_2"}: memref<512 x i32> - %ext_buffer_in_24 = AIE.external_buffer {sym_name = "ddr_buffer_in_24"}: memref<1536 x i32> - %ext_buffer_out_24_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_24_2"}: memref<512 x i32> + %ext_buffer_in_24 = aie.external_buffer {sym_name = "ddr_buffer_in_24"}: memref<1536 x i32> + %ext_buffer_out_24_2 = aie.external_buffer {sym_name = "ddr_buffer_out_24_2"}: memref<512 x i32> - %ext_buffer_in_25 = AIE.external_buffer {sym_name = "ddr_buffer_in_25"}: memref<1536 x i32> - %ext_buffer_out_25_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_25_2"}: memref<512 x i32> + %ext_buffer_in_25 = aie.external_buffer {sym_name = "ddr_buffer_in_25"}: memref<1536 x i32> + %ext_buffer_out_25_2 = aie.external_buffer {sym_name = "ddr_buffer_out_25_2"}: memref<512 x i32> - %ext_buffer_in_26 = AIE.external_buffer {sym_name = "ddr_buffer_in_26"}: memref<1536 x i32> - %ext_buffer_out_26_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_26_2"}: memref<512 x i32> + %ext_buffer_in_26 = aie.external_buffer {sym_name = "ddr_buffer_in_26"}: memref<1536 x i32> + %ext_buffer_out_26_2 = aie.external_buffer {sym_name = "ddr_buffer_out_26_2"}: memref<512 x i32> - %ext_buffer_in_27 = AIE.external_buffer {sym_name = "ddr_buffer_in_27"}: memref<1536 x i32> - %ext_buffer_out_27_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_27_2"}: memref<512 x i32> + %ext_buffer_in_27 = aie.external_buffer {sym_name = "ddr_buffer_in_27"}: memref<1536 x i32> + %ext_buffer_out_27_2 = aie.external_buffer {sym_name = "ddr_buffer_out_27_2"}: memref<512 x i32> - %ext_buffer_in_28 = AIE.external_buffer {sym_name = "ddr_buffer_in_28"}: memref<1536 x i32> - %ext_buffer_out_28_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_28_2"}: memref<512 x i32> + %ext_buffer_in_28 = aie.external_buffer {sym_name = "ddr_buffer_in_28"}: memref<1536 x i32> + %ext_buffer_out_28_2 = aie.external_buffer {sym_name = "ddr_buffer_out_28_2"}: memref<512 x i32> - %ext_buffer_in_29 = AIE.external_buffer {sym_name = "ddr_buffer_in_29"}: memref<1536 x i32> - %ext_buffer_out_29_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_29_2"}: memref<512 x i32> + %ext_buffer_in_29 = aie.external_buffer {sym_name = "ddr_buffer_in_29"}: memref<1536 x i32> + %ext_buffer_out_29_2 = aie.external_buffer {sym_name = "ddr_buffer_out_29_2"}: memref<512 x i32> - %ext_buffer_in_30 = AIE.external_buffer {sym_name = "ddr_buffer_in_30"}: memref<1536 x i32> - %ext_buffer_out_30_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_30_2"}: memref<512 x i32> + %ext_buffer_in_30 = aie.external_buffer {sym_name = "ddr_buffer_in_30"}: memref<1536 x i32> + %ext_buffer_out_30_2 = aie.external_buffer {sym_name = "ddr_buffer_out_30_2"}: memref<512 x i32> - %ext_buffer_in_31 = AIE.external_buffer {sym_name = "ddr_buffer_in_31"}: memref<1536 x i32> - %ext_buffer_out_31_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_31_2"}: memref<512 x i32> + %ext_buffer_in_31 = aie.external_buffer {sym_name = "ddr_buffer_in_31"}: memref<1536 x i32> + %ext_buffer_out_31_2 = aie.external_buffer {sym_name = "ddr_buffer_out_31_2"}: memref<512 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %buf_in_0_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %buf_out_0_2_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %buf_in_0_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %buf_out_0_2_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %buf_in_1_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_1}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %buf_out_1_2_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_1_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %buf_in_1_shim_2 : !aie.objectfifo>, {%ext_buffer_in_1}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %buf_out_1_2_shim_2 : !aie.objectfifo>, {%ext_buffer_out_1_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %buf_in_2_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_2}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %buf_out_2_2_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_2_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %buf_in_2_shim_3 : !aie.objectfifo>, {%ext_buffer_in_2}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %buf_out_2_2_shim_3 : !aie.objectfifo>, {%ext_buffer_out_2_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %buf_in_3_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_3}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %buf_out_3_2_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_3_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %buf_in_3_shim_3 : !aie.objectfifo>, {%ext_buffer_in_3}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %buf_out_3_2_shim_3 : !aie.objectfifo>, {%ext_buffer_out_3_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %buf_in_4_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_4}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %buf_out_4_2_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_4_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %buf_in_4_shim_6 : !aie.objectfifo>, {%ext_buffer_in_4}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %buf_out_4_2_shim_6 : !aie.objectfifo>, {%ext_buffer_out_4_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %buf_in_5_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_5}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %buf_out_5_2_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_5_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %buf_in_5_shim_6 : !aie.objectfifo>, {%ext_buffer_in_5}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %buf_out_5_2_shim_6 : !aie.objectfifo>, {%ext_buffer_out_5_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %buf_in_6_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_6}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %buf_out_6_2_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_6_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %buf_in_6_shim_7 : !aie.objectfifo>, {%ext_buffer_in_6}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %buf_out_6_2_shim_7 : !aie.objectfifo>, {%ext_buffer_out_6_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %buf_in_7_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_7}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %buf_out_7_2_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_7_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %buf_in_7_shim_7 : !aie.objectfifo>, {%ext_buffer_in_7}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %buf_out_7_2_shim_7 : !aie.objectfifo>, {%ext_buffer_out_7_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %buf_in_8_shim_10 : !AIE.objectfifo>, {%ext_buffer_in_8}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %buf_out_8_2_shim_10 : !AIE.objectfifo>, {%ext_buffer_out_8_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %buf_in_8_shim_10 : !aie.objectfifo>, {%ext_buffer_in_8}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %buf_out_8_2_shim_10 : !aie.objectfifo>, {%ext_buffer_out_8_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %buf_in_9_shim_10 : !AIE.objectfifo>, {%ext_buffer_in_9}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %buf_out_9_2_shim_10 : !AIE.objectfifo>, {%ext_buffer_out_9_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %buf_in_9_shim_10 : !aie.objectfifo>, {%ext_buffer_in_9}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %buf_out_9_2_shim_10 : !aie.objectfifo>, {%ext_buffer_out_9_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %buf_in_10_shim_11 : !AIE.objectfifo>, {%ext_buffer_in_10}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %buf_out_10_2_shim_11 : !AIE.objectfifo>, {%ext_buffer_out_10_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %buf_in_10_shim_11 : !aie.objectfifo>, {%ext_buffer_in_10}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %buf_out_10_2_shim_11 : !aie.objectfifo>, {%ext_buffer_out_10_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %buf_in_11_shim_11 : !AIE.objectfifo>, {%ext_buffer_in_11}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %buf_out_11_2_shim_11 : !AIE.objectfifo>, {%ext_buffer_out_11_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %buf_in_11_shim_11 : !aie.objectfifo>, {%ext_buffer_in_11}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %buf_out_11_2_shim_11 : !aie.objectfifo>, {%ext_buffer_out_11_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %buf_in_12_shim_18 : !AIE.objectfifo>, {%ext_buffer_in_12}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %buf_out_12_2_shim_18 : !AIE.objectfifo>, {%ext_buffer_out_12_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %buf_in_12_shim_18 : !aie.objectfifo>, {%ext_buffer_in_12}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %buf_out_12_2_shim_18 : !aie.objectfifo>, {%ext_buffer_out_12_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %buf_in_13_shim_18 : !AIE.objectfifo>, {%ext_buffer_in_13}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %buf_out_13_2_shim_18 : !AIE.objectfifo>, {%ext_buffer_out_13_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %buf_in_13_shim_18 : !aie.objectfifo>, {%ext_buffer_in_13}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %buf_out_13_2_shim_18 : !aie.objectfifo>, {%ext_buffer_out_13_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %buf_in_14_shim_19 : !AIE.objectfifo>, {%ext_buffer_in_14}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %buf_out_14_2_shim_19 : !AIE.objectfifo>, {%ext_buffer_out_14_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %buf_in_14_shim_19 : !aie.objectfifo>, {%ext_buffer_in_14}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %buf_out_14_2_shim_19 : !aie.objectfifo>, {%ext_buffer_out_14_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %buf_in_15_shim_19 : !AIE.objectfifo>, {%ext_buffer_in_15}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %buf_out_15_2_shim_19 : !AIE.objectfifo>, {%ext_buffer_out_15_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %buf_in_15_shim_19 : !aie.objectfifo>, {%ext_buffer_in_15}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %buf_out_15_2_shim_19 : !aie.objectfifo>, {%ext_buffer_out_15_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %buf_in_16_shim_26 : !AIE.objectfifo>, {%ext_buffer_in_16}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %buf_out_16_2_shim_26 : !AIE.objectfifo>, {%ext_buffer_out_16_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %buf_in_16_shim_26 : !aie.objectfifo>, {%ext_buffer_in_16}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %buf_out_16_2_shim_26 : !aie.objectfifo>, {%ext_buffer_out_16_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %buf_in_17_shim_26 : !AIE.objectfifo>, {%ext_buffer_in_17}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %buf_out_17_2_shim_26 : !AIE.objectfifo>, {%ext_buffer_out_17_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %buf_in_17_shim_26 : !aie.objectfifo>, {%ext_buffer_in_17}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %buf_out_17_2_shim_26 : !aie.objectfifo>, {%ext_buffer_out_17_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %buf_in_18_shim_27 : !AIE.objectfifo>, {%ext_buffer_in_18}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %buf_out_18_2_shim_27 : !AIE.objectfifo>, {%ext_buffer_out_18_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %buf_in_18_shim_27 : !aie.objectfifo>, {%ext_buffer_in_18}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %buf_out_18_2_shim_27 : !aie.objectfifo>, {%ext_buffer_out_18_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %buf_in_19_shim_27 : !AIE.objectfifo>, {%ext_buffer_in_19}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %buf_out_19_2_shim_27 : !AIE.objectfifo>, {%ext_buffer_out_19_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %buf_in_19_shim_27 : !aie.objectfifo>, {%ext_buffer_in_19}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %buf_out_19_2_shim_27 : !aie.objectfifo>, {%ext_buffer_out_19_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %buf_in_20_shim_34 : !AIE.objectfifo>, {%ext_buffer_in_20}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %buf_out_20_2_shim_34 : !AIE.objectfifo>, {%ext_buffer_out_20_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %buf_in_20_shim_34 : !aie.objectfifo>, {%ext_buffer_in_20}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %buf_out_20_2_shim_34 : !aie.objectfifo>, {%ext_buffer_out_20_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %buf_in_21_shim_34 : !AIE.objectfifo>, {%ext_buffer_in_21}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %buf_out_21_2_shim_34 : !AIE.objectfifo>, {%ext_buffer_out_21_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %buf_in_21_shim_34 : !aie.objectfifo>, {%ext_buffer_in_21}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %buf_out_21_2_shim_34 : !aie.objectfifo>, {%ext_buffer_out_21_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %buf_in_22_shim_35 : !AIE.objectfifo>, {%ext_buffer_in_22}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %buf_out_22_2_shim_35 : !AIE.objectfifo>, {%ext_buffer_out_22_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %buf_in_22_shim_35 : !aie.objectfifo>, {%ext_buffer_in_22}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %buf_out_22_2_shim_35 : !aie.objectfifo>, {%ext_buffer_out_22_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %buf_in_23_shim_35 : !AIE.objectfifo>, {%ext_buffer_in_23}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %buf_out_23_2_shim_35 : !AIE.objectfifo>, {%ext_buffer_out_23_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %buf_in_23_shim_35 : !aie.objectfifo>, {%ext_buffer_in_23}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %buf_out_23_2_shim_35 : !aie.objectfifo>, {%ext_buffer_out_23_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %buf_in_24_shim_42 : !AIE.objectfifo>, {%ext_buffer_in_24}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %buf_out_24_2_shim_42 : !AIE.objectfifo>, {%ext_buffer_out_24_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %buf_in_24_shim_42 : !aie.objectfifo>, {%ext_buffer_in_24}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %buf_out_24_2_shim_42 : !aie.objectfifo>, {%ext_buffer_out_24_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %buf_in_25_shim_42 : !AIE.objectfifo>, {%ext_buffer_in_25}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %buf_out_25_2_shim_42 : !AIE.objectfifo>, {%ext_buffer_out_25_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %buf_in_25_shim_42 : !aie.objectfifo>, {%ext_buffer_in_25}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %buf_out_25_2_shim_42 : !aie.objectfifo>, {%ext_buffer_out_25_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %buf_in_26_shim_43 : !AIE.objectfifo>, {%ext_buffer_in_26}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %buf_out_26_2_shim_43 : !AIE.objectfifo>, {%ext_buffer_out_26_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %buf_in_26_shim_43 : !aie.objectfifo>, {%ext_buffer_in_26}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %buf_out_26_2_shim_43 : !aie.objectfifo>, {%ext_buffer_out_26_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %buf_in_27_shim_43 : !AIE.objectfifo>, {%ext_buffer_in_27}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %buf_out_27_2_shim_43 : !AIE.objectfifo>, {%ext_buffer_out_27_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %buf_in_27_shim_43 : !aie.objectfifo>, {%ext_buffer_in_27}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %buf_out_27_2_shim_43 : !aie.objectfifo>, {%ext_buffer_out_27_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %buf_in_28_shim_46 : !AIE.objectfifo>, {%ext_buffer_in_28}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %buf_out_28_2_shim_46 : !AIE.objectfifo>, {%ext_buffer_out_28_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %buf_in_28_shim_46 : !aie.objectfifo>, {%ext_buffer_in_28}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %buf_out_28_2_shim_46 : !aie.objectfifo>, {%ext_buffer_out_28_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %buf_in_29_shim_46 : !AIE.objectfifo>, {%ext_buffer_in_29}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %buf_out_29_2_shim_46 : !AIE.objectfifo>, {%ext_buffer_out_29_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %buf_in_29_shim_46 : !aie.objectfifo>, {%ext_buffer_in_29}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %buf_out_29_2_shim_46 : !aie.objectfifo>, {%ext_buffer_out_29_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %buf_in_30_shim_47 : !AIE.objectfifo>, {%ext_buffer_in_30}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %buf_out_30_2_shim_47 : !AIE.objectfifo>, {%ext_buffer_out_30_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %buf_in_30_shim_47 : !aie.objectfifo>, {%ext_buffer_in_30}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %buf_out_30_2_shim_47 : !aie.objectfifo>, {%ext_buffer_out_30_2}) : (memref<512xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %buf_in_31_shim_47 : !AIE.objectfifo>, {%ext_buffer_in_31}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %buf_out_31_2_shim_47 : !AIE.objectfifo>, {%ext_buffer_out_31_2}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %buf_in_31_shim_47 : !aie.objectfifo>, {%ext_buffer_in_31}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %buf_out_31_2_shim_47 : !aie.objectfifo>, {%ext_buffer_out_31_2}) : (memref<512xi32>) func.func private @vec_hdiff(%A: memref<256xi32>,%B: memref<256xi32>, %C: memref<256xi32>, %D: memref<256xi32>, %E: memref<256xi32>, %O: memref<256xi32>) -> () - %core0_2 = AIE.core(%tile0_2) { + %core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_0_shim_2: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_0_2_shim_2: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_0_shim_2: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_0_2_shim_2: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_0_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_0_2_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_0_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_0_2_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_0_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_0_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core1_2 = AIE.core(%tile1_2) { + %core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_1_shim_2: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_1_2_shim_2: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_1_shim_2: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_1_2_shim_2: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_1_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_1_2_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_1_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_1_2_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_1_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_1_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core2_2 = AIE.core(%tile2_2) { + %core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_2_shim_3: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_2_2_shim_3: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_2_shim_3: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_2_2_shim_3: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_2_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_2_2_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_2_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_2_2_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_2_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_2_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core3_2 = AIE.core(%tile3_2) { + %core3_2 = aie.core(%tile3_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_3_shim_3: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_3_2_shim_3: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_3_shim_3: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_3_2_shim_3: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_3_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_3_2_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_3_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_3_2_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_3_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_3_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core4_2 = AIE.core(%tile4_2) { + %core4_2 = aie.core(%tile4_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_4_shim_6: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_4_2_shim_6: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_4_shim_6: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_4_2_shim_6: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_4_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_4_2_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_4_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_4_2_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_4_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_4_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core5_2 = AIE.core(%tile5_2) { + %core5_2 = aie.core(%tile5_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_5_shim_6: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_5_2_shim_6: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_5_shim_6: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_5_2_shim_6: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_5_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_5_2_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_5_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_5_2_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_5_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_5_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core6_2 = AIE.core(%tile6_2) { + %core6_2 = aie.core(%tile6_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_6_shim_7: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_6_2_shim_7: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_6_shim_7: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_6_2_shim_7: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_6_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_6_2_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_6_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_6_2_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_6_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_6_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core7_2 = AIE.core(%tile7_2) { + %core7_2 = aie.core(%tile7_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_7_shim_7: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_7_2_shim_7: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_7_shim_7: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_7_2_shim_7: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_7_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_7_2_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_7_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_7_2_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_7_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_7_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core8_2 = AIE.core(%tile8_2) { + %core8_2 = aie.core(%tile8_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_8_shim_10: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_8_2_shim_10: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_8_shim_10: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_8_2_shim_10: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_8_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_8_2_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_8_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_8_2_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_8_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_8_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core9_2 = AIE.core(%tile9_2) { + %core9_2 = aie.core(%tile9_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_9_shim_10: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_9_2_shim_10: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_9_shim_10: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_9_2_shim_10: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_9_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_9_2_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_9_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_9_2_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_9_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_9_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core10_2 = AIE.core(%tile10_2) { + %core10_2 = aie.core(%tile10_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_10_shim_11: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_10_2_shim_11: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_10_shim_11: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_10_2_shim_11: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_10_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_10_2_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_10_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_10_2_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_10_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_10_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core11_2 = AIE.core(%tile11_2) { + %core11_2 = aie.core(%tile11_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_11_shim_11: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_11_2_shim_11: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_11_shim_11: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_11_2_shim_11: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_11_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_11_2_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_11_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_11_2_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_11_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_11_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core12_2 = AIE.core(%tile12_2) { + %core12_2 = aie.core(%tile12_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_12_shim_18: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_12_2_shim_18: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_12_shim_18: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_12_2_shim_18: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_12_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_12_2_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_12_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_12_2_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_12_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_12_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core13_2 = AIE.core(%tile13_2) { + %core13_2 = aie.core(%tile13_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_13_shim_18: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_13_2_shim_18: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_13_shim_18: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_13_2_shim_18: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_13_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_13_2_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_13_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_13_2_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_13_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_13_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core14_2 = AIE.core(%tile14_2) { + %core14_2 = aie.core(%tile14_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_14_shim_19: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_14_2_shim_19: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_14_shim_19: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_14_2_shim_19: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_14_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_14_2_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_14_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_14_2_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_14_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_14_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core15_2 = AIE.core(%tile15_2) { + %core15_2 = aie.core(%tile15_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_15_shim_19: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_15_2_shim_19: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_15_shim_19: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_15_2_shim_19: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_15_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_15_2_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_15_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_15_2_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_15_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_15_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core16_2 = AIE.core(%tile16_2) { + %core16_2 = aie.core(%tile16_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_16_shim_26: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_16_2_shim_26: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_16_shim_26: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_16_2_shim_26: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_16_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_16_2_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_16_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_16_2_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_16_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_16_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core17_2 = AIE.core(%tile17_2) { + %core17_2 = aie.core(%tile17_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_17_shim_26: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_17_2_shim_26: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_17_shim_26: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_17_2_shim_26: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_17_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_17_2_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_17_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_17_2_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_17_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_17_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core18_2 = AIE.core(%tile18_2) { + %core18_2 = aie.core(%tile18_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_18_shim_27: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_18_2_shim_27: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_18_shim_27: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_18_2_shim_27: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_18_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_18_2_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_18_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_18_2_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_18_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_18_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core19_2 = AIE.core(%tile19_2) { + %core19_2 = aie.core(%tile19_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_19_shim_27: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_19_2_shim_27: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_19_shim_27: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_19_2_shim_27: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_19_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_19_2_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_19_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_19_2_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_19_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_19_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core20_2 = AIE.core(%tile20_2) { + %core20_2 = aie.core(%tile20_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_20_shim_34: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_20_2_shim_34: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_20_shim_34: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_20_2_shim_34: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_20_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_20_2_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_20_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_20_2_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_20_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_20_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core21_2 = AIE.core(%tile21_2) { + %core21_2 = aie.core(%tile21_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_21_shim_34: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_21_2_shim_34: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_21_shim_34: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_21_2_shim_34: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_21_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_21_2_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_21_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_21_2_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_21_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_21_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core22_2 = AIE.core(%tile22_2) { + %core22_2 = aie.core(%tile22_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_22_shim_35: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_22_2_shim_35: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_22_shim_35: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_22_2_shim_35: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_22_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_22_2_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_22_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_22_2_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_22_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_22_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core23_2 = AIE.core(%tile23_2) { + %core23_2 = aie.core(%tile23_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_23_shim_35: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_23_2_shim_35: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_23_shim_35: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_23_2_shim_35: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_23_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_23_2_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_23_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_23_2_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_23_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_23_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core24_2 = AIE.core(%tile24_2) { + %core24_2 = aie.core(%tile24_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_24_shim_42: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_24_2_shim_42: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_24_shim_42: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_24_2_shim_42: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_24_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_24_2_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_24_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_24_2_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_24_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_24_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core25_2 = AIE.core(%tile25_2) { + %core25_2 = aie.core(%tile25_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_25_shim_42: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_25_2_shim_42: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_25_shim_42: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_25_2_shim_42: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_25_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_25_2_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_25_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_25_2_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_25_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_25_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core26_2 = AIE.core(%tile26_2) { + %core26_2 = aie.core(%tile26_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_26_shim_43: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_26_2_shim_43: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_26_shim_43: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_26_2_shim_43: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_26_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_26_2_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_26_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_26_2_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_26_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_26_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core27_2 = AIE.core(%tile27_2) { + %core27_2 = aie.core(%tile27_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_27_shim_43: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_27_2_shim_43: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_27_shim_43: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_27_2_shim_43: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_27_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_27_2_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_27_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_27_2_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_27_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_27_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core28_2 = AIE.core(%tile28_2) { + %core28_2 = aie.core(%tile28_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_28_shim_46: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_28_2_shim_46: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_28_shim_46: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_28_2_shim_46: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_28_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_28_2_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_28_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_28_2_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_28_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_28_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core29_2 = AIE.core(%tile29_2) { + %core29_2 = aie.core(%tile29_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_29_shim_46: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_29_2_shim_46: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_29_shim_46: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_29_2_shim_46: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_29_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_29_2_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_29_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_29_2_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_29_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_29_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core30_2 = AIE.core(%tile30_2) { + %core30_2 = aie.core(%tile30_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_30_shim_47: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_30_2_shim_47: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_30_shim_47: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_30_2_shim_47: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_30_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_30_2_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_30_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_30_2_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_30_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_30_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } - %core31_2 = AIE.core(%tile31_2) { + %core31_2 = aie.core(%tile31_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%buf_in_31_shim_47: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_subview = AIE.objectfifo.acquire(%buf_out_31_2_shim_47: !AIE.objectfifo>, 5) : !AIE.objectfifosubview> - %obj_out = AIE.objectfifo.subview.access %obj_out_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%buf_in_31_shim_47: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_subview = aie.objectfifo.acquire(%buf_out_31_2_shim_47: !aie.objectfifo>, 5) : !aie.objectfifosubview> + %obj_out = aie.objectfifo.subview.access %obj_out_subview[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @vec_hdiff(%row0,%row1,%row2,%row3,%row4,%obj_out) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%buf_in_31_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%buf_out_31_2_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%buf_in_31_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%buf_out_31_2_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%buf_in_31_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%buf_in_31_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie.mlir index cb275d0379..1566168882 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie.mlir @@ -11,117 +11,117 @@ module @hdiff_tri_AIE { - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) {sym_name = "lock71_14"} - %lock73_14 = AIE.lock(%t73, 14) {sym_name = "lock73_14"} + %lock71_14 = aie.lock(%t71, 14) {sym_name = "lock71_14"} + %lock73_14 = aie.lock(%t73, 14) {sym_name = "lock73_14"} - AIE.objectfifo @obj_in (%t70, {%t71, %t72}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_lap (%t71, {%t72}, 5 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_flux_inter1 (%t72, {%t73}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_flux (%t73, {%t70}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71, %t72}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_lap (%t71, {%t72}, 5 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_flux_inter1 (%t72, {%t73}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_flux (%t73, {%t70}, 2 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"} : memref<1536 x i32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"} : memref<512 x i32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"} : memref<1536 x i32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"} : memref<512 x i32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) - AIE.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xi32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xi32>) + aie.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Produce, 4 ) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Produce, 4 ) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release @obj_out_lap (Produce, 4) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Produce, 4) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.objectfifo.release @obj_in (Consume, 4) + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_lap.o" } - %c14 = AIE.core(%t72) { + %c14 = aie.core(%t72) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Consume, 4) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Consume, 4) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire @obj_out_flux_inter1 (Produce, 5) : !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire @obj_out_flux_inter1 (Produce, 5) : !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release @obj_out_lap (Consume, 4) - AIE.objectfifo.release @obj_out_flux_inter1 (Produce, 5) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Consume, 4) + aie.objectfifo.release @obj_out_flux_inter1 (Produce, 5) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.objectfifo.release @obj_in (Consume, 4) + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_flux1.o" } - %c15 = AIE.core(%t73) { + %c15 = aie.core(%t73) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire @obj_out_flux_inter1 (Consume, 5) : !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire @obj_out_flux_inter1 (Consume, 5) : !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire @obj_out_flux (Produce, 1) : !AIE.objectfifosubview> - %obj_out_flux_element = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire @obj_out_flux (Produce, 1) : !aie.objectfifosubview> + %obj_out_flux_element = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release @obj_out_flux_inter1 (Consume, 5) - AIE.objectfifo.release @obj_out_flux (Produce, 1) + aie.objectfifo.release @obj_out_flux_inter1 (Consume, 5) + aie.objectfifo.release @obj_out_flux (Produce, 1) } - AIE.use_lock(%lock73_14, "Acquire", 0) // stop the timer + aie.use_lock(%lock73_14, "Acquire", 0) // stop the timer - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie_fp32.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie_fp32.mlir index c33cdc96fd..e91361b78c 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie_fp32.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong/aie_fp32.mlir @@ -11,126 +11,126 @@ module @hdiff_tri_AIE{ - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %lock71_14 = AIE.lock(%t71, 14) { sym_name = "lock71_14" } - %lock73_14 = AIE.lock(%t73, 14) { sym_name = "lock73_14" } + %lock71_14 = aie.lock(%t71, 14) { sym_name = "lock71_14" } + %lock73_14 = aie.lock(%t73, 14) { sym_name = "lock73_14" } - AIE.objectfifo @obj_in (%t70, {%t71,%t72}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_lap (%t71, {%t72}, 5 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_flux_inter1 (%t72, {%t73}, 6 : i32) : !AIE.objectfifo> - AIE.objectfifo @obj_out_flux (%t73, {%t70}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @obj_in (%t70, {%t71,%t72}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_lap (%t71, {%t72}, 5 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_flux_inter1 (%t72, {%t73}, 6 : i32) : !aie.objectfifo> + aie.objectfifo @obj_out_flux (%t73, {%t70}, 2 : i32) : !aie.objectfifo> // DDR buffer - %ext_buffer_in0 = AIE.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> + %ext_buffer_in0 = aie.external_buffer {sym_name = "ddr_test_buffer_in0"}: memref<1536 x f32> + %ext_buffer_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<512 x f32> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) - AIE.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xf32>) + aie.objectfifo.register_external_buffers @obj_in (%t70, {%ext_buffer_in0}) : (memref<1536xf32>) + aie.objectfifo.register_external_buffers @obj_out_flux (%t70, {%ext_buffer_out}) : (memref<512xf32>) func.func private @hdiff_lap_fp32(%AL: memref<256xf32>,%BL: memref<256xf32>, %CL: memref<256xf32>, %DL: memref<256xf32>, %EL: memref<256xf32>, %OLL1: memref<256xf32>, %OLL2: memref<256xf32>, %OLL3: memref<256xf32>, %OLL4: memref<256xf32>) -> () func.func private @hdiff_flux1_fp32(%AF: memref<256xf32>,%BF: memref<256xf32>, %CF: memref<256xf32>, %OLF1: memref<256xf32>, %OLF2: memref<256xf32>, %OLF3: memref<256xf32>, %OLF4: memref<256xf32>, %OFI1: memref<512xf32>, %OFI2: memref<512xf32>, %OFI3: memref<512xf32>, %OFI4: memref<512xf32>, %OFI5: memref<512xf32>) -> () func.func private @hdiff_flux2_fp32( %Inter1: memref<512xf32>,%Inter2: memref<512xf32>, %Inter3: memref<512xf32>,%Inter4: memref<512xf32>,%Inter5: memref<512xf32>, %Out: memref<256xf32>) -> () - %c13 = AIE.core(%t71) { + %c13 = aie.core(%t71) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index - AIE.use_lock(%lock71_14, "Acquire", 0) // start the timer + aie.use_lock(%lock71_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xf32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xf32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xf32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xf32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xf32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xf32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xf32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xf32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xf32> - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Produce, 4 ) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Produce, 4 ) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xf32> func.call @hdiff_lap_fp32(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xf32>,memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>) -> () - AIE.objectfifo.release @obj_out_lap (Produce, 4) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Produce, 4) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.objectfifo.release @obj_in (Consume, 4) + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_lap_fp32.o" } - %c14 = AIE.core(%t72) { + %c14 = aie.core(%t72) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire @obj_in (Consume, 5) : !AIE.objectfifosubview> + %obj_in_subview = aie.objectfifo.acquire @obj_in (Consume, 5) : !aie.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xf32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xf32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xf32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xf32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xf32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xf32> - %obj_out_subview_lap = AIE.objectfifo.acquire @obj_out_lap (Consume, 4) : !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xf32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_out_subview_lap = aie.objectfifo.acquire @obj_out_lap (Consume, 4) : !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xf32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xf32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire @obj_out_flux_inter1 (Produce, 5) : !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xf32> + %obj_out_subview_flux1 = aie.objectfifo.acquire @obj_out_flux_inter1 (Produce, 5) : !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xf32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xf32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xf32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xf32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xf32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xf32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xf32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xf32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xf32> func.call @hdiff_flux1_fp32(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xf32>,memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<256xf32>, memref<512xf32>, memref<512xf32>, memref<512xf32>, memref<512xf32>, memref<512xf32>) -> () - AIE.objectfifo.release @obj_out_lap (Consume, 4) - AIE.objectfifo.release @obj_out_flux_inter1 (Produce, 5) - AIE.objectfifo.release @obj_in (Consume, 1) + aie.objectfifo.release @obj_out_lap (Consume, 4) + aie.objectfifo.release @obj_out_flux_inter1 (Produce, 5) + aie.objectfifo.release @obj_in (Consume, 1) } - AIE.objectfifo.release @obj_in (Consume, 4) + aie.objectfifo.release @obj_in (Consume, 4) - AIE.end + aie.end } { link_with="hdiff_flux1_fp32.o" } - %c15 = AIE.core(%t73) { + %c15 = aie.core(%t73) { %lb = arith.constant 0 : index %ub = arith.constant 2: index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire @obj_out_flux_inter1 (Consume, 5) : !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xf32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire @obj_out_flux_inter1 (Consume, 5) : !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xf32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xf32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xf32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xf32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xf32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xf32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xf32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xf32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xf32> - %obj_out_subview_flux = AIE.objectfifo.acquire @obj_out_flux (Produce, 1) : !AIE.objectfifosubview> - %obj_out_flux_element = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xf32> + %obj_out_subview_flux = aie.objectfifo.acquire @obj_out_flux (Produce, 1) : !aie.objectfifosubview> + %obj_out_flux_element = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xf32> func.call @hdiff_flux2_fp32(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element ) : ( memref<512xf32>, memref<512xf32>, memref<512xf32>, memref<512xf32>, memref<512xf32>, memref<256xf32>) -> () - AIE.objectfifo.release @obj_out_flux_inter1 (Consume, 5) - AIE.objectfifo.release @obj_out_flux (Produce, 1) + aie.objectfifo.release @obj_out_flux_inter1 (Consume, 5) + aie.objectfifo.release @obj_out_flux (Produce, 1) } - AIE.use_lock(%lock73_14, "Acquire", 0) // stop the timer + aie.use_lock(%lock73_14, "Acquire", 0) // stop the timer - AIE.end + aie.end } { link_with="hdiff_flux2_fp32.o" } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie.mlir index a50efede68..78de65d092 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie.mlir @@ -13,227 +13,227 @@ module @hdiff_bundle_1 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) // timing locks - %lock01_14 = AIE.lock(%tile0_1, 14) { sym_name = "lock01_14" } - %lock21_14 = AIE.lock(%tile2_1, 14) { sym_name = "lock21_14" } + %lock01_14 = aie.lock(%tile0_1, 14) { sym_name = "lock01_14" } + %lock21_14 = aie.lock(%tile2_1, 14) { sym_name = "lock21_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock01_14, "Acquire", 0) // start the timer + aie.use_lock(%lock01_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.use_lock(%lock21_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock21_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -241,179 +241,179 @@ module @hdiff_bundle_1 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_1.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_1.mlir index db9d8c89c9..a4b619191a 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_1.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_1.mlir @@ -13,227 +13,227 @@ module @hdiff_bundle_1 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) // timing locks - %lock01_14 = AIE.lock(%tile0_1, 14) { sym_name = "lock01_14" } - %lock21_14 = AIE.lock(%tile2_1, 14) { sym_name = "lock21_14" } + %lock01_14 = aie.lock(%tile0_1, 14) { sym_name = "lock01_14" } + %lock21_14 = aie.lock(%tile2_1, 14) { sym_name = "lock21_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock01_14, "Acquire", 0) // start the timer + aie.use_lock(%lock01_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.use_lock(%lock21_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock21_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -241,179 +241,179 @@ module @hdiff_bundle_1 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_16.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_16.mlir index cc83fdb13f..588bcab596 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_16.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_16.mlir @@ -14,855 +14,855 @@ module @hdiff_bundle_16 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---Generating B-block 1---*- //---col 0---*- - %tile0_5 = AIE.tile(0, 5) - %tile0_6 = AIE.tile(0, 6) - %tile0_7 = AIE.tile(0, 7) - %tile0_8 = AIE.tile(0, 8) + %tile0_5 = aie.tile(0, 5) + %tile0_6 = aie.tile(0, 6) + %tile0_7 = aie.tile(0, 7) + %tile0_8 = aie.tile(0, 8) //---col 1---*- - %tile1_5 = AIE.tile(1, 5) - %tile1_6 = AIE.tile(1, 6) - %tile1_7 = AIE.tile(1, 7) - %tile1_8 = AIE.tile(1, 8) + %tile1_5 = aie.tile(1, 5) + %tile1_6 = aie.tile(1, 6) + %tile1_7 = aie.tile(1, 7) + %tile1_8 = aie.tile(1, 8) //---col 2---*- - %tile2_5 = AIE.tile(2, 5) - %tile2_6 = AIE.tile(2, 6) - %tile2_7 = AIE.tile(2, 7) - %tile2_8 = AIE.tile(2, 8) + %tile2_5 = aie.tile(2, 5) + %tile2_6 = aie.tile(2, 6) + %tile2_7 = aie.tile(2, 7) + %tile2_8 = aie.tile(2, 8) //---Generating B-block 2---*- //---col 0---*- - %tile3_1 = AIE.tile(3, 1) - %tile3_2 = AIE.tile(3, 2) - %tile3_3 = AIE.tile(3, 3) - %tile3_4 = AIE.tile(3, 4) + %tile3_1 = aie.tile(3, 1) + %tile3_2 = aie.tile(3, 2) + %tile3_3 = aie.tile(3, 3) + %tile3_4 = aie.tile(3, 4) //---col 1---*- - %tile4_1 = AIE.tile(4, 1) - %tile4_2 = AIE.tile(4, 2) - %tile4_3 = AIE.tile(4, 3) - %tile4_4 = AIE.tile(4, 4) + %tile4_1 = aie.tile(4, 1) + %tile4_2 = aie.tile(4, 2) + %tile4_3 = aie.tile(4, 3) + %tile4_4 = aie.tile(4, 4) //---col 2---*- - %tile5_1 = AIE.tile(5, 1) - %tile5_2 = AIE.tile(5, 2) - %tile5_3 = AIE.tile(5, 3) - %tile5_4 = AIE.tile(5, 4) + %tile5_1 = aie.tile(5, 1) + %tile5_2 = aie.tile(5, 2) + %tile5_3 = aie.tile(5, 3) + %tile5_4 = aie.tile(5, 4) //---Generating B-block 3---*- //---col 0---*- - %tile3_5 = AIE.tile(3, 5) - %tile3_6 = AIE.tile(3, 6) - %tile3_7 = AIE.tile(3, 7) - %tile3_8 = AIE.tile(3, 8) + %tile3_5 = aie.tile(3, 5) + %tile3_6 = aie.tile(3, 6) + %tile3_7 = aie.tile(3, 7) + %tile3_8 = aie.tile(3, 8) //---col 1---*- - %tile4_5 = AIE.tile(4, 5) - %tile4_6 = AIE.tile(4, 6) - %tile4_7 = AIE.tile(4, 7) - %tile4_8 = AIE.tile(4, 8) + %tile4_5 = aie.tile(4, 5) + %tile4_6 = aie.tile(4, 6) + %tile4_7 = aie.tile(4, 7) + %tile4_8 = aie.tile(4, 8) //---col 2---*- - %tile5_5 = AIE.tile(5, 5) - %tile5_6 = AIE.tile(5, 6) - %tile5_7 = AIE.tile(5, 7) - %tile5_8 = AIE.tile(5, 8) + %tile5_5 = aie.tile(5, 5) + %tile5_6 = aie.tile(5, 6) + %tile5_7 = aie.tile(5, 7) + %tile5_8 = aie.tile(5, 8) //---Generating B-block 4---*- //---col 0---*- - %tile6_1 = AIE.tile(6, 1) - %tile6_2 = AIE.tile(6, 2) - %tile6_3 = AIE.tile(6, 3) - %tile6_4 = AIE.tile(6, 4) + %tile6_1 = aie.tile(6, 1) + %tile6_2 = aie.tile(6, 2) + %tile6_3 = aie.tile(6, 3) + %tile6_4 = aie.tile(6, 4) //---col 1---*- - %tile7_1 = AIE.tile(7, 1) - %tile7_2 = AIE.tile(7, 2) - %tile7_3 = AIE.tile(7, 3) - %tile7_4 = AIE.tile(7, 4) + %tile7_1 = aie.tile(7, 1) + %tile7_2 = aie.tile(7, 2) + %tile7_3 = aie.tile(7, 3) + %tile7_4 = aie.tile(7, 4) //---col 2---*- - %tile8_1 = AIE.tile(8, 1) - %tile8_2 = AIE.tile(8, 2) - %tile8_3 = AIE.tile(8, 3) - %tile8_4 = AIE.tile(8, 4) + %tile8_1 = aie.tile(8, 1) + %tile8_2 = aie.tile(8, 2) + %tile8_3 = aie.tile(8, 3) + %tile8_4 = aie.tile(8, 4) //---Generating B-block 5---*- //---col 0---*- - %tile6_5 = AIE.tile(6, 5) - %tile6_6 = AIE.tile(6, 6) - %tile6_7 = AIE.tile(6, 7) - %tile6_8 = AIE.tile(6, 8) + %tile6_5 = aie.tile(6, 5) + %tile6_6 = aie.tile(6, 6) + %tile6_7 = aie.tile(6, 7) + %tile6_8 = aie.tile(6, 8) //---col 1---*- - %tile7_5 = AIE.tile(7, 5) - %tile7_6 = AIE.tile(7, 6) - %tile7_7 = AIE.tile(7, 7) - %tile7_8 = AIE.tile(7, 8) + %tile7_5 = aie.tile(7, 5) + %tile7_6 = aie.tile(7, 6) + %tile7_7 = aie.tile(7, 7) + %tile7_8 = aie.tile(7, 8) //---col 2---*- - %tile8_5 = AIE.tile(8, 5) - %tile8_6 = AIE.tile(8, 6) - %tile8_7 = AIE.tile(8, 7) - %tile8_8 = AIE.tile(8, 8) + %tile8_5 = aie.tile(8, 5) + %tile8_6 = aie.tile(8, 6) + %tile8_7 = aie.tile(8, 7) + %tile8_8 = aie.tile(8, 8) //---Generating B-block 6---*- //---col 0---*- - %tile9_1 = AIE.tile(9, 1) - %tile9_2 = AIE.tile(9, 2) - %tile9_3 = AIE.tile(9, 3) - %tile9_4 = AIE.tile(9, 4) + %tile9_1 = aie.tile(9, 1) + %tile9_2 = aie.tile(9, 2) + %tile9_3 = aie.tile(9, 3) + %tile9_4 = aie.tile(9, 4) //---col 1---*- - %tile10_1 = AIE.tile(10, 1) - %tile10_2 = AIE.tile(10, 2) - %tile10_3 = AIE.tile(10, 3) - %tile10_4 = AIE.tile(10, 4) + %tile10_1 = aie.tile(10, 1) + %tile10_2 = aie.tile(10, 2) + %tile10_3 = aie.tile(10, 3) + %tile10_4 = aie.tile(10, 4) //---col 2---*- - %tile11_1 = AIE.tile(11, 1) - %tile11_2 = AIE.tile(11, 2) - %tile11_3 = AIE.tile(11, 3) - %tile11_4 = AIE.tile(11, 4) + %tile11_1 = aie.tile(11, 1) + %tile11_2 = aie.tile(11, 2) + %tile11_3 = aie.tile(11, 3) + %tile11_4 = aie.tile(11, 4) //---Generating B-block 7---*- //---col 0---*- - %tile9_5 = AIE.tile(9, 5) - %tile9_6 = AIE.tile(9, 6) - %tile9_7 = AIE.tile(9, 7) - %tile9_8 = AIE.tile(9, 8) + %tile9_5 = aie.tile(9, 5) + %tile9_6 = aie.tile(9, 6) + %tile9_7 = aie.tile(9, 7) + %tile9_8 = aie.tile(9, 8) //---col 1---*- - %tile10_5 = AIE.tile(10, 5) - %tile10_6 = AIE.tile(10, 6) - %tile10_7 = AIE.tile(10, 7) - %tile10_8 = AIE.tile(10, 8) + %tile10_5 = aie.tile(10, 5) + %tile10_6 = aie.tile(10, 6) + %tile10_7 = aie.tile(10, 7) + %tile10_8 = aie.tile(10, 8) //---col 2---*- - %tile11_5 = AIE.tile(11, 5) - %tile11_6 = AIE.tile(11, 6) - %tile11_7 = AIE.tile(11, 7) - %tile11_8 = AIE.tile(11, 8) + %tile11_5 = aie.tile(11, 5) + %tile11_6 = aie.tile(11, 6) + %tile11_7 = aie.tile(11, 7) + %tile11_8 = aie.tile(11, 8) //---Generating B-block 8---*- //---col 0---*- - %tile12_1 = AIE.tile(12, 1) - %tile12_2 = AIE.tile(12, 2) - %tile12_3 = AIE.tile(12, 3) - %tile12_4 = AIE.tile(12, 4) + %tile12_1 = aie.tile(12, 1) + %tile12_2 = aie.tile(12, 2) + %tile12_3 = aie.tile(12, 3) + %tile12_4 = aie.tile(12, 4) //---col 1---*- - %tile13_1 = AIE.tile(13, 1) - %tile13_2 = AIE.tile(13, 2) - %tile13_3 = AIE.tile(13, 3) - %tile13_4 = AIE.tile(13, 4) + %tile13_1 = aie.tile(13, 1) + %tile13_2 = aie.tile(13, 2) + %tile13_3 = aie.tile(13, 3) + %tile13_4 = aie.tile(13, 4) //---col 2---*- - %tile14_1 = AIE.tile(14, 1) - %tile14_2 = AIE.tile(14, 2) - %tile14_3 = AIE.tile(14, 3) - %tile14_4 = AIE.tile(14, 4) + %tile14_1 = aie.tile(14, 1) + %tile14_2 = aie.tile(14, 2) + %tile14_3 = aie.tile(14, 3) + %tile14_4 = aie.tile(14, 4) //---Generating B-block 9---*- //---col 0---*- - %tile12_5 = AIE.tile(12, 5) - %tile12_6 = AIE.tile(12, 6) - %tile12_7 = AIE.tile(12, 7) - %tile12_8 = AIE.tile(12, 8) + %tile12_5 = aie.tile(12, 5) + %tile12_6 = aie.tile(12, 6) + %tile12_7 = aie.tile(12, 7) + %tile12_8 = aie.tile(12, 8) //---col 1---*- - %tile13_5 = AIE.tile(13, 5) - %tile13_6 = AIE.tile(13, 6) - %tile13_7 = AIE.tile(13, 7) - %tile13_8 = AIE.tile(13, 8) + %tile13_5 = aie.tile(13, 5) + %tile13_6 = aie.tile(13, 6) + %tile13_7 = aie.tile(13, 7) + %tile13_8 = aie.tile(13, 8) //---col 2---*- - %tile14_5 = AIE.tile(14, 5) - %tile14_6 = AIE.tile(14, 6) - %tile14_7 = AIE.tile(14, 7) - %tile14_8 = AIE.tile(14, 8) + %tile14_5 = aie.tile(14, 5) + %tile14_6 = aie.tile(14, 6) + %tile14_7 = aie.tile(14, 7) + %tile14_8 = aie.tile(14, 8) //---Generating B-block 10---*- //---col 0---*- - %tile15_1 = AIE.tile(15, 1) - %tile15_2 = AIE.tile(15, 2) - %tile15_3 = AIE.tile(15, 3) - %tile15_4 = AIE.tile(15, 4) + %tile15_1 = aie.tile(15, 1) + %tile15_2 = aie.tile(15, 2) + %tile15_3 = aie.tile(15, 3) + %tile15_4 = aie.tile(15, 4) //---col 1---*- - %tile16_1 = AIE.tile(16, 1) - %tile16_2 = AIE.tile(16, 2) - %tile16_3 = AIE.tile(16, 3) - %tile16_4 = AIE.tile(16, 4) + %tile16_1 = aie.tile(16, 1) + %tile16_2 = aie.tile(16, 2) + %tile16_3 = aie.tile(16, 3) + %tile16_4 = aie.tile(16, 4) //---col 2---*- - %tile17_1 = AIE.tile(17, 1) - %tile17_2 = AIE.tile(17, 2) - %tile17_3 = AIE.tile(17, 3) - %tile17_4 = AIE.tile(17, 4) + %tile17_1 = aie.tile(17, 1) + %tile17_2 = aie.tile(17, 2) + %tile17_3 = aie.tile(17, 3) + %tile17_4 = aie.tile(17, 4) //---Generating B-block 11---*- //---col 0---*- - %tile15_5 = AIE.tile(15, 5) - %tile15_6 = AIE.tile(15, 6) - %tile15_7 = AIE.tile(15, 7) - %tile15_8 = AIE.tile(15, 8) + %tile15_5 = aie.tile(15, 5) + %tile15_6 = aie.tile(15, 6) + %tile15_7 = aie.tile(15, 7) + %tile15_8 = aie.tile(15, 8) //---col 1---*- - %tile16_5 = AIE.tile(16, 5) - %tile16_6 = AIE.tile(16, 6) - %tile16_7 = AIE.tile(16, 7) - %tile16_8 = AIE.tile(16, 8) + %tile16_5 = aie.tile(16, 5) + %tile16_6 = aie.tile(16, 6) + %tile16_7 = aie.tile(16, 7) + %tile16_8 = aie.tile(16, 8) //---col 2---*- - %tile17_5 = AIE.tile(17, 5) - %tile17_6 = AIE.tile(17, 6) - %tile17_7 = AIE.tile(17, 7) - %tile17_8 = AIE.tile(17, 8) + %tile17_5 = aie.tile(17, 5) + %tile17_6 = aie.tile(17, 6) + %tile17_7 = aie.tile(17, 7) + %tile17_8 = aie.tile(17, 8) //---Generating B-block 12---*- //---col 0---*- - %tile18_1 = AIE.tile(18, 1) - %tile18_2 = AIE.tile(18, 2) - %tile18_3 = AIE.tile(18, 3) - %tile18_4 = AIE.tile(18, 4) + %tile18_1 = aie.tile(18, 1) + %tile18_2 = aie.tile(18, 2) + %tile18_3 = aie.tile(18, 3) + %tile18_4 = aie.tile(18, 4) //---col 1---*- - %tile19_1 = AIE.tile(19, 1) - %tile19_2 = AIE.tile(19, 2) - %tile19_3 = AIE.tile(19, 3) - %tile19_4 = AIE.tile(19, 4) + %tile19_1 = aie.tile(19, 1) + %tile19_2 = aie.tile(19, 2) + %tile19_3 = aie.tile(19, 3) + %tile19_4 = aie.tile(19, 4) //---col 2---*- - %tile20_1 = AIE.tile(20, 1) - %tile20_2 = AIE.tile(20, 2) - %tile20_3 = AIE.tile(20, 3) - %tile20_4 = AIE.tile(20, 4) + %tile20_1 = aie.tile(20, 1) + %tile20_2 = aie.tile(20, 2) + %tile20_3 = aie.tile(20, 3) + %tile20_4 = aie.tile(20, 4) //---Generating B-block 13---*- //---col 0---*- - %tile18_5 = AIE.tile(18, 5) - %tile18_6 = AIE.tile(18, 6) - %tile18_7 = AIE.tile(18, 7) - %tile18_8 = AIE.tile(18, 8) + %tile18_5 = aie.tile(18, 5) + %tile18_6 = aie.tile(18, 6) + %tile18_7 = aie.tile(18, 7) + %tile18_8 = aie.tile(18, 8) //---col 1---*- - %tile19_5 = AIE.tile(19, 5) - %tile19_6 = AIE.tile(19, 6) - %tile19_7 = AIE.tile(19, 7) - %tile19_8 = AIE.tile(19, 8) + %tile19_5 = aie.tile(19, 5) + %tile19_6 = aie.tile(19, 6) + %tile19_7 = aie.tile(19, 7) + %tile19_8 = aie.tile(19, 8) //---col 2---*- - %tile20_5 = AIE.tile(20, 5) - %tile20_6 = AIE.tile(20, 6) - %tile20_7 = AIE.tile(20, 7) - %tile20_8 = AIE.tile(20, 8) + %tile20_5 = aie.tile(20, 5) + %tile20_6 = aie.tile(20, 6) + %tile20_7 = aie.tile(20, 7) + %tile20_8 = aie.tile(20, 8) //---Generating B-block 14---*- //---col 0---*- - %tile21_1 = AIE.tile(21, 1) - %tile21_2 = AIE.tile(21, 2) - %tile21_3 = AIE.tile(21, 3) - %tile21_4 = AIE.tile(21, 4) + %tile21_1 = aie.tile(21, 1) + %tile21_2 = aie.tile(21, 2) + %tile21_3 = aie.tile(21, 3) + %tile21_4 = aie.tile(21, 4) //---col 1---*- - %tile22_1 = AIE.tile(22, 1) - %tile22_2 = AIE.tile(22, 2) - %tile22_3 = AIE.tile(22, 3) - %tile22_4 = AIE.tile(22, 4) + %tile22_1 = aie.tile(22, 1) + %tile22_2 = aie.tile(22, 2) + %tile22_3 = aie.tile(22, 3) + %tile22_4 = aie.tile(22, 4) //---col 2---*- - %tile23_1 = AIE.tile(23, 1) - %tile23_2 = AIE.tile(23, 2) - %tile23_3 = AIE.tile(23, 3) - %tile23_4 = AIE.tile(23, 4) + %tile23_1 = aie.tile(23, 1) + %tile23_2 = aie.tile(23, 2) + %tile23_3 = aie.tile(23, 3) + %tile23_4 = aie.tile(23, 4) //---Generating B-block 15---*- //---col 0---*- - %tile21_5 = AIE.tile(21, 5) - %tile21_6 = AIE.tile(21, 6) - %tile21_7 = AIE.tile(21, 7) - %tile21_8 = AIE.tile(21, 8) + %tile21_5 = aie.tile(21, 5) + %tile21_6 = aie.tile(21, 6) + %tile21_7 = aie.tile(21, 7) + %tile21_8 = aie.tile(21, 8) //---col 1---*- - %tile22_5 = AIE.tile(22, 5) - %tile22_6 = AIE.tile(22, 6) - %tile22_7 = AIE.tile(22, 7) - %tile22_8 = AIE.tile(22, 8) + %tile22_5 = aie.tile(22, 5) + %tile22_6 = aie.tile(22, 6) + %tile22_7 = aie.tile(22, 7) + %tile22_8 = aie.tile(22, 8) //---col 2---*- - %tile23_5 = AIE.tile(23, 5) - %tile23_6 = AIE.tile(23, 6) - %tile23_7 = AIE.tile(23, 7) - %tile23_8 = AIE.tile(23, 8) + %tile23_5 = aie.tile(23, 5) + %tile23_6 = aie.tile(23, 6) + %tile23_7 = aie.tile(23, 7) + %tile23_8 = aie.tile(23, 8) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) //---NOC Tile 3---*- - %tile3_0 = AIE.tile(3, 0) + %tile3_0 = aie.tile(3, 0) //---NOC Tile 6---*- - %tile6_0 = AIE.tile(6, 0) + %tile6_0 = aie.tile(6, 0) //---NOC Tile 7---*- - %tile7_0 = AIE.tile(7, 0) + %tile7_0 = aie.tile(7, 0) //---NOC Tile 10---*- - %tile10_0 = AIE.tile(10, 0) + %tile10_0 = aie.tile(10, 0) //---NOC Tile 11---*- - %tile11_0 = AIE.tile(11, 0) + %tile11_0 = aie.tile(11, 0) //---NOC Tile 18---*- - %tile18_0 = AIE.tile(18, 0) + %tile18_0 = aie.tile(18, 0) //---NOC Tile 19---*- - %tile19_0 = AIE.tile(19, 0) + %tile19_0 = aie.tile(19, 0) // timing locks - %lock02_14 = AIE.lock(%tile0_2, 14) { sym_name = "lock02_14" } - %lock22_14 = AIE.lock(%tile2_2, 14) { sym_name = "lock22_14" } + %lock02_14 = aie.lock(%tile0_2, 14) { sym_name = "lock02_14" } + %lock22_14 = aie.lock(%tile2_2, 14) { sym_name = "lock22_14" } // timing locks - %lock06_14 = AIE.lock(%tile0_6, 14) { sym_name = "lock06_14" } - %lock26_14 = AIE.lock(%tile2_6, 14) { sym_name = "lock26_14" } + %lock06_14 = aie.lock(%tile0_6, 14) { sym_name = "lock06_14" } + %lock26_14 = aie.lock(%tile2_6, 14) { sym_name = "lock26_14" } // timing locks - %lock32_14 = AIE.lock(%tile3_2, 14) { sym_name = "lock32_14" } - %lock52_14 = AIE.lock(%tile5_2, 14) { sym_name = "lock52_14" } + %lock32_14 = aie.lock(%tile3_2, 14) { sym_name = "lock32_14" } + %lock52_14 = aie.lock(%tile5_2, 14) { sym_name = "lock52_14" } // timing locks - %lock36_14 = AIE.lock(%tile3_6, 14) { sym_name = "lock36_14" } - %lock56_14 = AIE.lock(%tile5_6, 14) { sym_name = "lock56_14" } + %lock36_14 = aie.lock(%tile3_6, 14) { sym_name = "lock36_14" } + %lock56_14 = aie.lock(%tile5_6, 14) { sym_name = "lock56_14" } // timing locks - %lock62_14 = AIE.lock(%tile6_2, 14) { sym_name = "lock62_14" } - %lock82_14 = AIE.lock(%tile8_2, 14) { sym_name = "lock82_14" } + %lock62_14 = aie.lock(%tile6_2, 14) { sym_name = "lock62_14" } + %lock82_14 = aie.lock(%tile8_2, 14) { sym_name = "lock82_14" } // timing locks - %lock66_14 = AIE.lock(%tile6_6, 14) { sym_name = "lock66_14" } - %lock86_14 = AIE.lock(%tile8_6, 14) { sym_name = "lock86_14" } + %lock66_14 = aie.lock(%tile6_6, 14) { sym_name = "lock66_14" } + %lock86_14 = aie.lock(%tile8_6, 14) { sym_name = "lock86_14" } // timing locks - %lock92_14 = AIE.lock(%tile9_2, 14) { sym_name = "lock92_14" } - %lock112_14 = AIE.lock(%tile11_2, 14) { sym_name = "lock112_14" } + %lock92_14 = aie.lock(%tile9_2, 14) { sym_name = "lock92_14" } + %lock112_14 = aie.lock(%tile11_2, 14) { sym_name = "lock112_14" } // timing locks - %lock96_14 = AIE.lock(%tile9_6, 14) { sym_name = "lock96_14" } - %lock116_14 = AIE.lock(%tile11_6, 14) { sym_name = "lock116_14" } + %lock96_14 = aie.lock(%tile9_6, 14) { sym_name = "lock96_14" } + %lock116_14 = aie.lock(%tile11_6, 14) { sym_name = "lock116_14" } // timing locks - %lock122_14 = AIE.lock(%tile12_2, 14) { sym_name = "lock122_14" } - %lock142_14 = AIE.lock(%tile14_2, 14) { sym_name = "lock142_14" } + %lock122_14 = aie.lock(%tile12_2, 14) { sym_name = "lock122_14" } + %lock142_14 = aie.lock(%tile14_2, 14) { sym_name = "lock142_14" } // timing locks - %lock126_14 = AIE.lock(%tile12_6, 14) { sym_name = "lock126_14" } - %lock146_14 = AIE.lock(%tile14_6, 14) { sym_name = "lock146_14" } + %lock126_14 = aie.lock(%tile12_6, 14) { sym_name = "lock126_14" } + %lock146_14 = aie.lock(%tile14_6, 14) { sym_name = "lock146_14" } // timing locks - %lock152_14 = AIE.lock(%tile15_2, 14) { sym_name = "lock152_14" } - %lock172_14 = AIE.lock(%tile17_2, 14) { sym_name = "lock172_14" } + %lock152_14 = aie.lock(%tile15_2, 14) { sym_name = "lock152_14" } + %lock172_14 = aie.lock(%tile17_2, 14) { sym_name = "lock172_14" } // timing locks - %lock156_14 = AIE.lock(%tile15_6, 14) { sym_name = "lock156_14" } - %lock176_14 = AIE.lock(%tile17_6, 14) { sym_name = "lock176_14" } + %lock156_14 = aie.lock(%tile15_6, 14) { sym_name = "lock156_14" } + %lock176_14 = aie.lock(%tile17_6, 14) { sym_name = "lock176_14" } // timing locks - %lock182_14 = AIE.lock(%tile18_2, 14) { sym_name = "lock182_14" } - %lock202_14 = AIE.lock(%tile20_2, 14) { sym_name = "lock202_14" } + %lock182_14 = aie.lock(%tile18_2, 14) { sym_name = "lock182_14" } + %lock202_14 = aie.lock(%tile20_2, 14) { sym_name = "lock202_14" } // timing locks - %lock186_14 = AIE.lock(%tile18_6, 14) { sym_name = "lock186_14" } - %lock206_14 = AIE.lock(%tile20_6, 14) { sym_name = "lock206_14" } + %lock186_14 = aie.lock(%tile18_6, 14) { sym_name = "lock186_14" } + %lock206_14 = aie.lock(%tile20_6, 14) { sym_name = "lock206_14" } // timing locks - %lock212_14 = AIE.lock(%tile21_2, 14) { sym_name = "lock212_14" } - %lock232_14 = AIE.lock(%tile23_2, 14) { sym_name = "lock232_14" } + %lock212_14 = aie.lock(%tile21_2, 14) { sym_name = "lock212_14" } + %lock232_14 = aie.lock(%tile23_2, 14) { sym_name = "lock232_14" } // timing locks - %lock216_14 = AIE.lock(%tile21_6, 14) { sym_name = "lock216_14" } - %lock236_14 = AIE.lock(%tile23_6, 14) { sym_name = "lock236_14" } + %lock216_14 = aie.lock(%tile21_6, 14) { sym_name = "lock216_14" } + %lock236_14 = aie.lock(%tile23_6, 14) { sym_name = "lock236_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B1 buffers---*- - %block_1_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_1_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_1_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_1_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_1_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_1_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_1_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B2 buffers---*- - %block_2_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_2_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_2_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_2_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_2_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_2_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_2_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B3 buffers---*- - %block_3_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_3_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_3_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_3_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_3_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_3_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_3_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B4 buffers---*- - %block_4_buf_in_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile6_1,%tile7_1,%tile6_2,%tile7_2,%tile6_3,%tile7_3,%tile6_4,%tile7_4},9) { sym_name = "block_4_buf_in_shim_6" } : !AIE.objectfifo> //B block input - %block_4_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_1,{%tile7_1},5){ sym_name ="block_4_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_1,{%tile8_1},6) { sym_name ="block_4_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_1,{%tile8_2},2) { sym_name ="block_4_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_4_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_2,{%tile7_2},5){ sym_name ="block_4_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_2,{%tile8_2},6) { sym_name ="block_4_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_out_shim_6= AIE.objectfifo.createObjectFifo(%tile8_2,{%tile6_0},5){ sym_name ="block_4_buf_out_shim_6"} : !AIE.objectfifo> //B block output - %block_4_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_3,{%tile7_3},5){ sym_name ="block_4_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_3,{%tile8_3},6) { sym_name ="block_4_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_3,{%tile8_2},2) { sym_name ="block_4_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_4_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_4,{%tile7_4},5){ sym_name ="block_4_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_4,{%tile8_4},6) { sym_name ="block_4_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_4,{%tile8_2},2) { sym_name ="block_4_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_4_buf_in_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile6_1,%tile7_1,%tile6_2,%tile7_2,%tile6_3,%tile7_3,%tile6_4,%tile7_4},9) { sym_name = "block_4_buf_in_shim_6" } : !aie.objectfifo> //B block input + %block_4_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile6_1,{%tile7_1},5){ sym_name ="block_4_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_1,{%tile8_1},6) { sym_name ="block_4_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile8_1,{%tile8_2},2) { sym_name ="block_4_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_4_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile6_2,{%tile7_2},5){ sym_name ="block_4_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_2,{%tile8_2},6) { sym_name ="block_4_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_4_buf_out_shim_6= aie.objectfifo.createObjectFifo(%tile8_2,{%tile6_0},5){ sym_name ="block_4_buf_out_shim_6"} : !aie.objectfifo> //B block output + %block_4_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile6_3,{%tile7_3},5){ sym_name ="block_4_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_3,{%tile8_3},6) { sym_name ="block_4_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile8_3,{%tile8_2},2) { sym_name ="block_4_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_4_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile6_4,{%tile7_4},5){ sym_name ="block_4_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_4,{%tile8_4},6) { sym_name ="block_4_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile8_4,{%tile8_2},2) { sym_name ="block_4_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B5 buffers---*- - %block_5_buf_in_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile6_5,%tile7_5,%tile6_6,%tile7_6,%tile6_7,%tile7_7,%tile6_8,%tile7_8},9) { sym_name = "block_5_buf_in_shim_6" } : !AIE.objectfifo> //B block input - %block_5_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_5,{%tile7_5},5){ sym_name ="block_5_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_5,{%tile8_5},6) { sym_name ="block_5_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_5,{%tile8_6},2) { sym_name ="block_5_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_5_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_6,{%tile7_6},5){ sym_name ="block_5_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_6,{%tile8_6},6) { sym_name ="block_5_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_out_shim_6= AIE.objectfifo.createObjectFifo(%tile8_6,{%tile6_0},5){ sym_name ="block_5_buf_out_shim_6"} : !AIE.objectfifo> //B block output - %block_5_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_7,{%tile7_7},5){ sym_name ="block_5_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_7,{%tile8_7},6) { sym_name ="block_5_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_7,{%tile8_6},2) { sym_name ="block_5_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_5_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_8,{%tile7_8},5){ sym_name ="block_5_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_8,{%tile8_8},6) { sym_name ="block_5_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_8,{%tile8_6},2) { sym_name ="block_5_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_5_buf_in_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile6_5,%tile7_5,%tile6_6,%tile7_6,%tile6_7,%tile7_7,%tile6_8,%tile7_8},9) { sym_name = "block_5_buf_in_shim_6" } : !aie.objectfifo> //B block input + %block_5_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile6_5,{%tile7_5},5){ sym_name ="block_5_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_5,{%tile8_5},6) { sym_name ="block_5_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile8_5,{%tile8_6},2) { sym_name ="block_5_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_5_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile6_6,{%tile7_6},5){ sym_name ="block_5_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_6,{%tile8_6},6) { sym_name ="block_5_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_5_buf_out_shim_6= aie.objectfifo.createObjectFifo(%tile8_6,{%tile6_0},5){ sym_name ="block_5_buf_out_shim_6"} : !aie.objectfifo> //B block output + %block_5_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile6_7,{%tile7_7},5){ sym_name ="block_5_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_7,{%tile8_7},6) { sym_name ="block_5_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile8_7,{%tile8_6},2) { sym_name ="block_5_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_5_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile6_8,{%tile7_8},5){ sym_name ="block_5_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_8,{%tile8_8},6) { sym_name ="block_5_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile8_8,{%tile8_6},2) { sym_name ="block_5_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B6 buffers---*- - %block_6_buf_in_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile9_1,%tile10_1,%tile9_2,%tile10_2,%tile9_3,%tile10_3,%tile9_4,%tile10_4},9) { sym_name = "block_6_buf_in_shim_7" } : !AIE.objectfifo> //B block input - %block_6_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_1,{%tile10_1},5){ sym_name ="block_6_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_1,{%tile11_1},6) { sym_name ="block_6_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_1,{%tile11_2},2) { sym_name ="block_6_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_6_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_2,{%tile10_2},5){ sym_name ="block_6_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_2,{%tile11_2},6) { sym_name ="block_6_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_out_shim_7= AIE.objectfifo.createObjectFifo(%tile11_2,{%tile7_0},5){ sym_name ="block_6_buf_out_shim_7"} : !AIE.objectfifo> //B block output - %block_6_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_3,{%tile10_3},5){ sym_name ="block_6_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_3,{%tile11_3},6) { sym_name ="block_6_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_3,{%tile11_2},2) { sym_name ="block_6_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_6_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_4,{%tile10_4},5){ sym_name ="block_6_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_4,{%tile11_4},6) { sym_name ="block_6_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_4,{%tile11_2},2) { sym_name ="block_6_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_6_buf_in_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile9_1,%tile10_1,%tile9_2,%tile10_2,%tile9_3,%tile10_3,%tile9_4,%tile10_4},9) { sym_name = "block_6_buf_in_shim_7" } : !aie.objectfifo> //B block input + %block_6_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile9_1,{%tile10_1},5){ sym_name ="block_6_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_1,{%tile11_1},6) { sym_name ="block_6_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile11_1,{%tile11_2},2) { sym_name ="block_6_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_6_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile9_2,{%tile10_2},5){ sym_name ="block_6_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_2,{%tile11_2},6) { sym_name ="block_6_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_6_buf_out_shim_7= aie.objectfifo.createObjectFifo(%tile11_2,{%tile7_0},5){ sym_name ="block_6_buf_out_shim_7"} : !aie.objectfifo> //B block output + %block_6_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile9_3,{%tile10_3},5){ sym_name ="block_6_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_3,{%tile11_3},6) { sym_name ="block_6_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile11_3,{%tile11_2},2) { sym_name ="block_6_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_6_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile9_4,{%tile10_4},5){ sym_name ="block_6_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_4,{%tile11_4},6) { sym_name ="block_6_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile11_4,{%tile11_2},2) { sym_name ="block_6_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B7 buffers---*- - %block_7_buf_in_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile9_5,%tile10_5,%tile9_6,%tile10_6,%tile9_7,%tile10_7,%tile9_8,%tile10_8},9) { sym_name = "block_7_buf_in_shim_7" } : !AIE.objectfifo> //B block input - %block_7_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_5,{%tile10_5},5){ sym_name ="block_7_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_5,{%tile11_5},6) { sym_name ="block_7_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_5,{%tile11_6},2) { sym_name ="block_7_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_7_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_6,{%tile10_6},5){ sym_name ="block_7_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_6,{%tile11_6},6) { sym_name ="block_7_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_out_shim_7= AIE.objectfifo.createObjectFifo(%tile11_6,{%tile7_0},5){ sym_name ="block_7_buf_out_shim_7"} : !AIE.objectfifo> //B block output - %block_7_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_7,{%tile10_7},5){ sym_name ="block_7_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_7,{%tile11_7},6) { sym_name ="block_7_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_7,{%tile11_6},2) { sym_name ="block_7_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_7_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_8,{%tile10_8},5){ sym_name ="block_7_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_8,{%tile11_8},6) { sym_name ="block_7_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_8,{%tile11_6},2) { sym_name ="block_7_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_7_buf_in_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile9_5,%tile10_5,%tile9_6,%tile10_6,%tile9_7,%tile10_7,%tile9_8,%tile10_8},9) { sym_name = "block_7_buf_in_shim_7" } : !aie.objectfifo> //B block input + %block_7_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile9_5,{%tile10_5},5){ sym_name ="block_7_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_5,{%tile11_5},6) { sym_name ="block_7_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile11_5,{%tile11_6},2) { sym_name ="block_7_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_7_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile9_6,{%tile10_6},5){ sym_name ="block_7_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_6,{%tile11_6},6) { sym_name ="block_7_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_7_buf_out_shim_7= aie.objectfifo.createObjectFifo(%tile11_6,{%tile7_0},5){ sym_name ="block_7_buf_out_shim_7"} : !aie.objectfifo> //B block output + %block_7_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile9_7,{%tile10_7},5){ sym_name ="block_7_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_7,{%tile11_7},6) { sym_name ="block_7_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile11_7,{%tile11_6},2) { sym_name ="block_7_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_7_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile9_8,{%tile10_8},5){ sym_name ="block_7_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_8,{%tile11_8},6) { sym_name ="block_7_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile11_8,{%tile11_6},2) { sym_name ="block_7_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B8 buffers---*- - %block_8_buf_in_shim_10 = AIE.objectfifo.createObjectFifo(%tile10_0,{%tile12_1,%tile13_1,%tile12_2,%tile13_2,%tile12_3,%tile13_3,%tile12_4,%tile13_4},9) { sym_name = "block_8_buf_in_shim_10" } : !AIE.objectfifo> //B block input - %block_8_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_1,{%tile13_1},5){ sym_name ="block_8_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_1,{%tile14_1},6) { sym_name ="block_8_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_1,{%tile14_2},2) { sym_name ="block_8_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_8_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_2,{%tile13_2},5){ sym_name ="block_8_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_2,{%tile14_2},6) { sym_name ="block_8_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_out_shim_10= AIE.objectfifo.createObjectFifo(%tile14_2,{%tile10_0},5){ sym_name ="block_8_buf_out_shim_10"} : !AIE.objectfifo> //B block output - %block_8_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_3,{%tile13_3},5){ sym_name ="block_8_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_3,{%tile14_3},6) { sym_name ="block_8_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_3,{%tile14_2},2) { sym_name ="block_8_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_8_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_4,{%tile13_4},5){ sym_name ="block_8_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_4,{%tile14_4},6) { sym_name ="block_8_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_4,{%tile14_2},2) { sym_name ="block_8_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_8_buf_in_shim_10 = aie.objectfifo.createObjectFifo(%tile10_0,{%tile12_1,%tile13_1,%tile12_2,%tile13_2,%tile12_3,%tile13_3,%tile12_4,%tile13_4},9) { sym_name = "block_8_buf_in_shim_10" } : !aie.objectfifo> //B block input + %block_8_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile12_1,{%tile13_1},5){ sym_name ="block_8_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_1,{%tile14_1},6) { sym_name ="block_8_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_8_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile14_1,{%tile14_2},2) { sym_name ="block_8_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_8_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile12_2,{%tile13_2},5){ sym_name ="block_8_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_2,{%tile14_2},6) { sym_name ="block_8_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_8_buf_out_shim_10= aie.objectfifo.createObjectFifo(%tile14_2,{%tile10_0},5){ sym_name ="block_8_buf_out_shim_10"} : !aie.objectfifo> //B block output + %block_8_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile12_3,{%tile13_3},5){ sym_name ="block_8_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_3,{%tile14_3},6) { sym_name ="block_8_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_8_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile14_3,{%tile14_2},2) { sym_name ="block_8_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_8_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile12_4,{%tile13_4},5){ sym_name ="block_8_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_4,{%tile14_4},6) { sym_name ="block_8_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_8_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile14_4,{%tile14_2},2) { sym_name ="block_8_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B9 buffers---*- - %block_9_buf_in_shim_10 = AIE.objectfifo.createObjectFifo(%tile10_0,{%tile12_5,%tile13_5,%tile12_6,%tile13_6,%tile12_7,%tile13_7,%tile12_8,%tile13_8},9) { sym_name = "block_9_buf_in_shim_10" } : !AIE.objectfifo> //B block input - %block_9_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_5,{%tile13_5},5){ sym_name ="block_9_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_5,{%tile14_5},6) { sym_name ="block_9_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_5,{%tile14_6},2) { sym_name ="block_9_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_9_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_6,{%tile13_6},5){ sym_name ="block_9_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_6,{%tile14_6},6) { sym_name ="block_9_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_out_shim_10= AIE.objectfifo.createObjectFifo(%tile14_6,{%tile10_0},5){ sym_name ="block_9_buf_out_shim_10"} : !AIE.objectfifo> //B block output - %block_9_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_7,{%tile13_7},5){ sym_name ="block_9_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_7,{%tile14_7},6) { sym_name ="block_9_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_7,{%tile14_6},2) { sym_name ="block_9_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_9_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_8,{%tile13_8},5){ sym_name ="block_9_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_8,{%tile14_8},6) { sym_name ="block_9_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_8,{%tile14_6},2) { sym_name ="block_9_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_9_buf_in_shim_10 = aie.objectfifo.createObjectFifo(%tile10_0,{%tile12_5,%tile13_5,%tile12_6,%tile13_6,%tile12_7,%tile13_7,%tile12_8,%tile13_8},9) { sym_name = "block_9_buf_in_shim_10" } : !aie.objectfifo> //B block input + %block_9_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile12_5,{%tile13_5},5){ sym_name ="block_9_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_5,{%tile14_5},6) { sym_name ="block_9_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_9_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile14_5,{%tile14_6},2) { sym_name ="block_9_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_9_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile12_6,{%tile13_6},5){ sym_name ="block_9_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_6,{%tile14_6},6) { sym_name ="block_9_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_9_buf_out_shim_10= aie.objectfifo.createObjectFifo(%tile14_6,{%tile10_0},5){ sym_name ="block_9_buf_out_shim_10"} : !aie.objectfifo> //B block output + %block_9_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile12_7,{%tile13_7},5){ sym_name ="block_9_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_7,{%tile14_7},6) { sym_name ="block_9_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_9_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile14_7,{%tile14_6},2) { sym_name ="block_9_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_9_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile12_8,{%tile13_8},5){ sym_name ="block_9_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_8,{%tile14_8},6) { sym_name ="block_9_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_9_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile14_8,{%tile14_6},2) { sym_name ="block_9_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B10 buffers---*- - %block_10_buf_in_shim_11 = AIE.objectfifo.createObjectFifo(%tile11_0,{%tile15_1,%tile16_1,%tile15_2,%tile16_2,%tile15_3,%tile16_3,%tile15_4,%tile16_4},9) { sym_name = "block_10_buf_in_shim_11" } : !AIE.objectfifo> //B block input - %block_10_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_1,{%tile16_1},5){ sym_name ="block_10_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_1,{%tile17_1},6) { sym_name ="block_10_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_1,{%tile17_2},2) { sym_name ="block_10_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_10_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_2,{%tile16_2},5){ sym_name ="block_10_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_2,{%tile17_2},6) { sym_name ="block_10_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_out_shim_11= AIE.objectfifo.createObjectFifo(%tile17_2,{%tile11_0},5){ sym_name ="block_10_buf_out_shim_11"} : !AIE.objectfifo> //B block output - %block_10_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_3,{%tile16_3},5){ sym_name ="block_10_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_3,{%tile17_3},6) { sym_name ="block_10_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_3,{%tile17_2},2) { sym_name ="block_10_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_10_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_4,{%tile16_4},5){ sym_name ="block_10_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_4,{%tile17_4},6) { sym_name ="block_10_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_4,{%tile17_2},2) { sym_name ="block_10_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_10_buf_in_shim_11 = aie.objectfifo.createObjectFifo(%tile11_0,{%tile15_1,%tile16_1,%tile15_2,%tile16_2,%tile15_3,%tile16_3,%tile15_4,%tile16_4},9) { sym_name = "block_10_buf_in_shim_11" } : !aie.objectfifo> //B block input + %block_10_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile15_1,{%tile16_1},5){ sym_name ="block_10_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_1,{%tile17_1},6) { sym_name ="block_10_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_10_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile17_1,{%tile17_2},2) { sym_name ="block_10_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_10_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile15_2,{%tile16_2},5){ sym_name ="block_10_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_2,{%tile17_2},6) { sym_name ="block_10_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_10_buf_out_shim_11= aie.objectfifo.createObjectFifo(%tile17_2,{%tile11_0},5){ sym_name ="block_10_buf_out_shim_11"} : !aie.objectfifo> //B block output + %block_10_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile15_3,{%tile16_3},5){ sym_name ="block_10_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_3,{%tile17_3},6) { sym_name ="block_10_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_10_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile17_3,{%tile17_2},2) { sym_name ="block_10_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_10_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile15_4,{%tile16_4},5){ sym_name ="block_10_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_4,{%tile17_4},6) { sym_name ="block_10_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_10_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile17_4,{%tile17_2},2) { sym_name ="block_10_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B11 buffers---*- - %block_11_buf_in_shim_11 = AIE.objectfifo.createObjectFifo(%tile11_0,{%tile15_5,%tile16_5,%tile15_6,%tile16_6,%tile15_7,%tile16_7,%tile15_8,%tile16_8},9) { sym_name = "block_11_buf_in_shim_11" } : !AIE.objectfifo> //B block input - %block_11_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_5,{%tile16_5},5){ sym_name ="block_11_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_5,{%tile17_5},6) { sym_name ="block_11_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_5,{%tile17_6},2) { sym_name ="block_11_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_11_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_6,{%tile16_6},5){ sym_name ="block_11_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_6,{%tile17_6},6) { sym_name ="block_11_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_out_shim_11= AIE.objectfifo.createObjectFifo(%tile17_6,{%tile11_0},5){ sym_name ="block_11_buf_out_shim_11"} : !AIE.objectfifo> //B block output - %block_11_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_7,{%tile16_7},5){ sym_name ="block_11_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_7,{%tile17_7},6) { sym_name ="block_11_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_7,{%tile17_6},2) { sym_name ="block_11_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_11_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_8,{%tile16_8},5){ sym_name ="block_11_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_8,{%tile17_8},6) { sym_name ="block_11_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_8,{%tile17_6},2) { sym_name ="block_11_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_11_buf_in_shim_11 = aie.objectfifo.createObjectFifo(%tile11_0,{%tile15_5,%tile16_5,%tile15_6,%tile16_6,%tile15_7,%tile16_7,%tile15_8,%tile16_8},9) { sym_name = "block_11_buf_in_shim_11" } : !aie.objectfifo> //B block input + %block_11_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile15_5,{%tile16_5},5){ sym_name ="block_11_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_5,{%tile17_5},6) { sym_name ="block_11_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_11_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile17_5,{%tile17_6},2) { sym_name ="block_11_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_11_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile15_6,{%tile16_6},5){ sym_name ="block_11_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_6,{%tile17_6},6) { sym_name ="block_11_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_11_buf_out_shim_11= aie.objectfifo.createObjectFifo(%tile17_6,{%tile11_0},5){ sym_name ="block_11_buf_out_shim_11"} : !aie.objectfifo> //B block output + %block_11_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile15_7,{%tile16_7},5){ sym_name ="block_11_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_7,{%tile17_7},6) { sym_name ="block_11_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_11_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile17_7,{%tile17_6},2) { sym_name ="block_11_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_11_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile15_8,{%tile16_8},5){ sym_name ="block_11_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_8,{%tile17_8},6) { sym_name ="block_11_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_11_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile17_8,{%tile17_6},2) { sym_name ="block_11_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B12 buffers---*- - %block_12_buf_in_shim_18 = AIE.objectfifo.createObjectFifo(%tile18_0,{%tile18_1,%tile19_1,%tile18_2,%tile19_2,%tile18_3,%tile19_3,%tile18_4,%tile19_4},9) { sym_name = "block_12_buf_in_shim_18" } : !AIE.objectfifo> //B block input - %block_12_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_1,{%tile19_1},5){ sym_name ="block_12_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_1,{%tile20_1},6) { sym_name ="block_12_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_1,{%tile20_2},2) { sym_name ="block_12_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_12_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_2,{%tile19_2},5){ sym_name ="block_12_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_2,{%tile20_2},6) { sym_name ="block_12_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_out_shim_18= AIE.objectfifo.createObjectFifo(%tile20_2,{%tile18_0},5){ sym_name ="block_12_buf_out_shim_18"} : !AIE.objectfifo> //B block output - %block_12_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_3,{%tile19_3},5){ sym_name ="block_12_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_3,{%tile20_3},6) { sym_name ="block_12_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_3,{%tile20_2},2) { sym_name ="block_12_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_12_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_4,{%tile19_4},5){ sym_name ="block_12_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_4,{%tile20_4},6) { sym_name ="block_12_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_4,{%tile20_2},2) { sym_name ="block_12_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_12_buf_in_shim_18 = aie.objectfifo.createObjectFifo(%tile18_0,{%tile18_1,%tile19_1,%tile18_2,%tile19_2,%tile18_3,%tile19_3,%tile18_4,%tile19_4},9) { sym_name = "block_12_buf_in_shim_18" } : !aie.objectfifo> //B block input + %block_12_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile18_1,{%tile19_1},5){ sym_name ="block_12_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_1,{%tile20_1},6) { sym_name ="block_12_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_12_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile20_1,{%tile20_2},2) { sym_name ="block_12_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_12_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile18_2,{%tile19_2},5){ sym_name ="block_12_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_2,{%tile20_2},6) { sym_name ="block_12_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_12_buf_out_shim_18= aie.objectfifo.createObjectFifo(%tile20_2,{%tile18_0},5){ sym_name ="block_12_buf_out_shim_18"} : !aie.objectfifo> //B block output + %block_12_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile18_3,{%tile19_3},5){ sym_name ="block_12_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_3,{%tile20_3},6) { sym_name ="block_12_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_12_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile20_3,{%tile20_2},2) { sym_name ="block_12_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_12_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile18_4,{%tile19_4},5){ sym_name ="block_12_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_4,{%tile20_4},6) { sym_name ="block_12_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_12_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile20_4,{%tile20_2},2) { sym_name ="block_12_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B13 buffers---*- - %block_13_buf_in_shim_18 = AIE.objectfifo.createObjectFifo(%tile18_0,{%tile18_5,%tile19_5,%tile18_6,%tile19_6,%tile18_7,%tile19_7,%tile18_8,%tile19_8},9) { sym_name = "block_13_buf_in_shim_18" } : !AIE.objectfifo> //B block input - %block_13_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_5,{%tile19_5},5){ sym_name ="block_13_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_5,{%tile20_5},6) { sym_name ="block_13_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_5,{%tile20_6},2) { sym_name ="block_13_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_13_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_6,{%tile19_6},5){ sym_name ="block_13_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_6,{%tile20_6},6) { sym_name ="block_13_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_out_shim_18= AIE.objectfifo.createObjectFifo(%tile20_6,{%tile18_0},5){ sym_name ="block_13_buf_out_shim_18"} : !AIE.objectfifo> //B block output - %block_13_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_7,{%tile19_7},5){ sym_name ="block_13_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_7,{%tile20_7},6) { sym_name ="block_13_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_7,{%tile20_6},2) { sym_name ="block_13_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_13_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_8,{%tile19_8},5){ sym_name ="block_13_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_8,{%tile20_8},6) { sym_name ="block_13_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_8,{%tile20_6},2) { sym_name ="block_13_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_13_buf_in_shim_18 = aie.objectfifo.createObjectFifo(%tile18_0,{%tile18_5,%tile19_5,%tile18_6,%tile19_6,%tile18_7,%tile19_7,%tile18_8,%tile19_8},9) { sym_name = "block_13_buf_in_shim_18" } : !aie.objectfifo> //B block input + %block_13_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile18_5,{%tile19_5},5){ sym_name ="block_13_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_5,{%tile20_5},6) { sym_name ="block_13_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_13_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile20_5,{%tile20_6},2) { sym_name ="block_13_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_13_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile18_6,{%tile19_6},5){ sym_name ="block_13_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_6,{%tile20_6},6) { sym_name ="block_13_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_13_buf_out_shim_18= aie.objectfifo.createObjectFifo(%tile20_6,{%tile18_0},5){ sym_name ="block_13_buf_out_shim_18"} : !aie.objectfifo> //B block output + %block_13_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile18_7,{%tile19_7},5){ sym_name ="block_13_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_7,{%tile20_7},6) { sym_name ="block_13_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_13_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile20_7,{%tile20_6},2) { sym_name ="block_13_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_13_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile18_8,{%tile19_8},5){ sym_name ="block_13_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_8,{%tile20_8},6) { sym_name ="block_13_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_13_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile20_8,{%tile20_6},2) { sym_name ="block_13_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B14 buffers---*- - %block_14_buf_in_shim_19 = AIE.objectfifo.createObjectFifo(%tile19_0,{%tile21_1,%tile22_1,%tile21_2,%tile22_2,%tile21_3,%tile22_3,%tile21_4,%tile22_4},9) { sym_name = "block_14_buf_in_shim_19" } : !AIE.objectfifo> //B block input - %block_14_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_1,{%tile22_1},5){ sym_name ="block_14_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_1,{%tile23_1},6) { sym_name ="block_14_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_1,{%tile23_2},2) { sym_name ="block_14_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_14_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_2,{%tile22_2},5){ sym_name ="block_14_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_2,{%tile23_2},6) { sym_name ="block_14_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_out_shim_19= AIE.objectfifo.createObjectFifo(%tile23_2,{%tile19_0},5){ sym_name ="block_14_buf_out_shim_19"} : !AIE.objectfifo> //B block output - %block_14_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_3,{%tile22_3},5){ sym_name ="block_14_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_3,{%tile23_3},6) { sym_name ="block_14_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_3,{%tile23_2},2) { sym_name ="block_14_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_14_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_4,{%tile22_4},5){ sym_name ="block_14_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_4,{%tile23_4},6) { sym_name ="block_14_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_4,{%tile23_2},2) { sym_name ="block_14_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_14_buf_in_shim_19 = aie.objectfifo.createObjectFifo(%tile19_0,{%tile21_1,%tile22_1,%tile21_2,%tile22_2,%tile21_3,%tile22_3,%tile21_4,%tile22_4},9) { sym_name = "block_14_buf_in_shim_19" } : !aie.objectfifo> //B block input + %block_14_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile21_1,{%tile22_1},5){ sym_name ="block_14_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_1,{%tile23_1},6) { sym_name ="block_14_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_14_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile23_1,{%tile23_2},2) { sym_name ="block_14_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_14_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile21_2,{%tile22_2},5){ sym_name ="block_14_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_2,{%tile23_2},6) { sym_name ="block_14_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_14_buf_out_shim_19= aie.objectfifo.createObjectFifo(%tile23_2,{%tile19_0},5){ sym_name ="block_14_buf_out_shim_19"} : !aie.objectfifo> //B block output + %block_14_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile21_3,{%tile22_3},5){ sym_name ="block_14_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_3,{%tile23_3},6) { sym_name ="block_14_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_14_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile23_3,{%tile23_2},2) { sym_name ="block_14_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_14_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile21_4,{%tile22_4},5){ sym_name ="block_14_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_4,{%tile23_4},6) { sym_name ="block_14_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_14_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile23_4,{%tile23_2},2) { sym_name ="block_14_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B15 buffers---*- - %block_15_buf_in_shim_19 = AIE.objectfifo.createObjectFifo(%tile19_0,{%tile21_5,%tile22_5,%tile21_6,%tile22_6,%tile21_7,%tile22_7,%tile21_8,%tile22_8},9) { sym_name = "block_15_buf_in_shim_19" } : !AIE.objectfifo> //B block input - %block_15_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_5,{%tile22_5},5){ sym_name ="block_15_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_5,{%tile23_5},6) { sym_name ="block_15_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_5,{%tile23_6},2) { sym_name ="block_15_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_15_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_6,{%tile22_6},5){ sym_name ="block_15_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_6,{%tile23_6},6) { sym_name ="block_15_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_out_shim_19= AIE.objectfifo.createObjectFifo(%tile23_6,{%tile19_0},5){ sym_name ="block_15_buf_out_shim_19"} : !AIE.objectfifo> //B block output - %block_15_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_7,{%tile22_7},5){ sym_name ="block_15_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_7,{%tile23_7},6) { sym_name ="block_15_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_7,{%tile23_6},2) { sym_name ="block_15_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_15_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_8,{%tile22_8},5){ sym_name ="block_15_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_8,{%tile23_8},6) { sym_name ="block_15_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_8,{%tile23_6},2) { sym_name ="block_15_buf_row_8_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + %block_15_buf_in_shim_19 = aie.objectfifo.createObjectFifo(%tile19_0,{%tile21_5,%tile22_5,%tile21_6,%tile22_6,%tile21_7,%tile22_7,%tile21_8,%tile22_8},9) { sym_name = "block_15_buf_in_shim_19" } : !aie.objectfifo> //B block input + %block_15_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile21_5,{%tile22_5},5){ sym_name ="block_15_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_5,{%tile23_5},6) { sym_name ="block_15_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_15_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile23_5,{%tile23_6},2) { sym_name ="block_15_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_15_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile21_6,{%tile22_6},5){ sym_name ="block_15_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_6,{%tile23_6},6) { sym_name ="block_15_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_15_buf_out_shim_19= aie.objectfifo.createObjectFifo(%tile23_6,{%tile19_0},5){ sym_name ="block_15_buf_out_shim_19"} : !aie.objectfifo> //B block output + %block_15_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile21_7,{%tile22_7},5){ sym_name ="block_15_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_7,{%tile23_7},6) { sym_name ="block_15_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_15_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile23_7,{%tile23_6},2) { sym_name ="block_15_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_15_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile21_8,{%tile22_8},5){ sym_name ="block_15_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_8,{%tile23_8},6) { sym_name ="block_15_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_15_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile23_8,{%tile23_6},2) { sym_name ="block_15_buf_row_8_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> - %ext_buffer_out_1 = AIE.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> + %ext_buffer_out_1 = aie.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> - %ext_buffer_in_2 = AIE.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> - %ext_buffer_out_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> + %ext_buffer_in_2 = aie.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> + %ext_buffer_out_2 = aie.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> - %ext_buffer_in_3 = AIE.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> - %ext_buffer_out_3 = AIE.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> + %ext_buffer_in_3 = aie.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> + %ext_buffer_out_3 = aie.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> - %ext_buffer_in_4 = AIE.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<2304 x i32> - %ext_buffer_out_4 = AIE.external_buffer {sym_name = "ddr_buffer_out_4"}: memref<2048 x i32> + %ext_buffer_in_4 = aie.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<2304 x i32> + %ext_buffer_out_4 = aie.external_buffer {sym_name = "ddr_buffer_out_4"}: memref<2048 x i32> - %ext_buffer_in_5 = AIE.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<2304 x i32> - %ext_buffer_out_5 = AIE.external_buffer {sym_name = "ddr_buffer_out_5"}: memref<2048 x i32> + %ext_buffer_in_5 = aie.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<2304 x i32> + %ext_buffer_out_5 = aie.external_buffer {sym_name = "ddr_buffer_out_5"}: memref<2048 x i32> - %ext_buffer_in_6 = AIE.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<2304 x i32> - %ext_buffer_out_6 = AIE.external_buffer {sym_name = "ddr_buffer_out_6"}: memref<2048 x i32> + %ext_buffer_in_6 = aie.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<2304 x i32> + %ext_buffer_out_6 = aie.external_buffer {sym_name = "ddr_buffer_out_6"}: memref<2048 x i32> - %ext_buffer_in_7 = AIE.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<2304 x i32> - %ext_buffer_out_7 = AIE.external_buffer {sym_name = "ddr_buffer_out_7"}: memref<2048 x i32> + %ext_buffer_in_7 = aie.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<2304 x i32> + %ext_buffer_out_7 = aie.external_buffer {sym_name = "ddr_buffer_out_7"}: memref<2048 x i32> - %ext_buffer_in_8 = AIE.external_buffer {sym_name = "ddr_buffer_in_8"}: memref<2304 x i32> - %ext_buffer_out_8 = AIE.external_buffer {sym_name = "ddr_buffer_out_8"}: memref<2048 x i32> + %ext_buffer_in_8 = aie.external_buffer {sym_name = "ddr_buffer_in_8"}: memref<2304 x i32> + %ext_buffer_out_8 = aie.external_buffer {sym_name = "ddr_buffer_out_8"}: memref<2048 x i32> - %ext_buffer_in_9 = AIE.external_buffer {sym_name = "ddr_buffer_in_9"}: memref<2304 x i32> - %ext_buffer_out_9 = AIE.external_buffer {sym_name = "ddr_buffer_out_9"}: memref<2048 x i32> + %ext_buffer_in_9 = aie.external_buffer {sym_name = "ddr_buffer_in_9"}: memref<2304 x i32> + %ext_buffer_out_9 = aie.external_buffer {sym_name = "ddr_buffer_out_9"}: memref<2048 x i32> - %ext_buffer_in_10 = AIE.external_buffer {sym_name = "ddr_buffer_in_10"}: memref<2304 x i32> - %ext_buffer_out_10 = AIE.external_buffer {sym_name = "ddr_buffer_out_10"}: memref<2048 x i32> + %ext_buffer_in_10 = aie.external_buffer {sym_name = "ddr_buffer_in_10"}: memref<2304 x i32> + %ext_buffer_out_10 = aie.external_buffer {sym_name = "ddr_buffer_out_10"}: memref<2048 x i32> - %ext_buffer_in_11 = AIE.external_buffer {sym_name = "ddr_buffer_in_11"}: memref<2304 x i32> - %ext_buffer_out_11 = AIE.external_buffer {sym_name = "ddr_buffer_out_11"}: memref<2048 x i32> + %ext_buffer_in_11 = aie.external_buffer {sym_name = "ddr_buffer_in_11"}: memref<2304 x i32> + %ext_buffer_out_11 = aie.external_buffer {sym_name = "ddr_buffer_out_11"}: memref<2048 x i32> - %ext_buffer_in_12 = AIE.external_buffer {sym_name = "ddr_buffer_in_12"}: memref<2304 x i32> - %ext_buffer_out_12 = AIE.external_buffer {sym_name = "ddr_buffer_out_12"}: memref<2048 x i32> + %ext_buffer_in_12 = aie.external_buffer {sym_name = "ddr_buffer_in_12"}: memref<2304 x i32> + %ext_buffer_out_12 = aie.external_buffer {sym_name = "ddr_buffer_out_12"}: memref<2048 x i32> - %ext_buffer_in_13 = AIE.external_buffer {sym_name = "ddr_buffer_in_13"}: memref<2304 x i32> - %ext_buffer_out_13 = AIE.external_buffer {sym_name = "ddr_buffer_out_13"}: memref<2048 x i32> + %ext_buffer_in_13 = aie.external_buffer {sym_name = "ddr_buffer_in_13"}: memref<2304 x i32> + %ext_buffer_out_13 = aie.external_buffer {sym_name = "ddr_buffer_out_13"}: memref<2048 x i32> - %ext_buffer_in_14 = AIE.external_buffer {sym_name = "ddr_buffer_in_14"}: memref<2304 x i32> - %ext_buffer_out_14 = AIE.external_buffer {sym_name = "ddr_buffer_out_14"}: memref<2048 x i32> + %ext_buffer_in_14 = aie.external_buffer {sym_name = "ddr_buffer_in_14"}: memref<2304 x i32> + %ext_buffer_out_14 = aie.external_buffer {sym_name = "ddr_buffer_out_14"}: memref<2048 x i32> - %ext_buffer_in_15 = AIE.external_buffer {sym_name = "ddr_buffer_in_15"}: memref<2304 x i32> - %ext_buffer_out_15 = AIE.external_buffer {sym_name = "ddr_buffer_out_15"}: memref<2048 x i32> + %ext_buffer_in_15 = aie.external_buffer {sym_name = "ddr_buffer_in_15"}: memref<2304 x i32> + %ext_buffer_out_15 = aie.external_buffer {sym_name = "ddr_buffer_out_15"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_in_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_4}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_out_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_4}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_in_shim_6 : !aie.objectfifo>, {%ext_buffer_in_4}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_out_shim_6 : !aie.objectfifo>, {%ext_buffer_out_4}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_in_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_5}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_out_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_5}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_in_shim_6 : !aie.objectfifo>, {%ext_buffer_in_5}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_out_shim_6 : !aie.objectfifo>, {%ext_buffer_out_5}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_in_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_6}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_out_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_6}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_in_shim_7 : !aie.objectfifo>, {%ext_buffer_in_6}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_out_shim_7 : !aie.objectfifo>, {%ext_buffer_out_6}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_in_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_7}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_out_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_7}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_in_shim_7 : !aie.objectfifo>, {%ext_buffer_in_7}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_out_shim_7 : !aie.objectfifo>, {%ext_buffer_out_7}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_in_shim_10 : !AIE.objectfifo>, {%ext_buffer_in_8}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_out_shim_10 : !AIE.objectfifo>, {%ext_buffer_out_8}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_in_shim_10 : !aie.objectfifo>, {%ext_buffer_in_8}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_out_shim_10 : !aie.objectfifo>, {%ext_buffer_out_8}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_in_shim_10 : !AIE.objectfifo>, {%ext_buffer_in_9}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_out_shim_10 : !AIE.objectfifo>, {%ext_buffer_out_9}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_in_shim_10 : !aie.objectfifo>, {%ext_buffer_in_9}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_out_shim_10 : !aie.objectfifo>, {%ext_buffer_out_9}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_in_shim_11 : !AIE.objectfifo>, {%ext_buffer_in_10}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_out_shim_11 : !AIE.objectfifo>, {%ext_buffer_out_10}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_in_shim_11 : !aie.objectfifo>, {%ext_buffer_in_10}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_out_shim_11 : !aie.objectfifo>, {%ext_buffer_out_10}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_in_shim_11 : !AIE.objectfifo>, {%ext_buffer_in_11}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_out_shim_11 : !AIE.objectfifo>, {%ext_buffer_out_11}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_in_shim_11 : !aie.objectfifo>, {%ext_buffer_in_11}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_out_shim_11 : !aie.objectfifo>, {%ext_buffer_out_11}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_in_shim_18 : !AIE.objectfifo>, {%ext_buffer_in_12}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_out_shim_18 : !AIE.objectfifo>, {%ext_buffer_out_12}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_in_shim_18 : !aie.objectfifo>, {%ext_buffer_in_12}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_out_shim_18 : !aie.objectfifo>, {%ext_buffer_out_12}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_in_shim_18 : !AIE.objectfifo>, {%ext_buffer_in_13}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_out_shim_18 : !AIE.objectfifo>, {%ext_buffer_out_13}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_in_shim_18 : !aie.objectfifo>, {%ext_buffer_in_13}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_out_shim_18 : !aie.objectfifo>, {%ext_buffer_out_13}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_in_shim_19 : !AIE.objectfifo>, {%ext_buffer_in_14}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_out_shim_19 : !AIE.objectfifo>, {%ext_buffer_out_14}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_in_shim_19 : !aie.objectfifo>, {%ext_buffer_in_14}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_out_shim_19 : !aie.objectfifo>, {%ext_buffer_out_14}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_in_shim_19 : !AIE.objectfifo>, {%ext_buffer_in_15}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_out_shim_19 : !AIE.objectfifo>, {%ext_buffer_out_15}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_in_shim_19 : !aie.objectfifo>, {%ext_buffer_in_15}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_out_shim_19 : !aie.objectfifo>, {%ext_buffer_out_15}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock02_14, "Acquire", 0) // start the timer + aie.use_lock(%lock02_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -870,354 +870,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock22_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock22_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_5 = AIE.core(%tile0_5) { + %block_1_core0_5 = aie.core(%tile0_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_5 = AIE.core(%tile1_5) { + %block_1_core1_5 = aie.core(%tile1_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_5 = AIE.core(%tile2_5) { + %block_1_core2_5 = aie.core(%tile2_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_6 = AIE.core(%tile0_6) { + %block_1_core0_6 = aie.core(%tile0_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock06_14, "Acquire", 0) // start the timer + aie.use_lock(%lock06_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_6 = AIE.core(%tile1_6) { + %block_1_core1_6 = aie.core(%tile1_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_1_core2_6 = AIE.core(%tile2_6) { + %block_1_core2_6 = aie.core(%tile2_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1225,354 +1225,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock26_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock26_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_7 = AIE.core(%tile0_7) { + %block_1_core0_7 = aie.core(%tile0_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_7 = AIE.core(%tile1_7) { + %block_1_core1_7 = aie.core(%tile1_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_7 = AIE.core(%tile2_7) { + %block_1_core2_7 = aie.core(%tile2_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_8 = AIE.core(%tile0_8) { + %block_1_core0_8 = aie.core(%tile0_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_8 = AIE.core(%tile1_8) { + %block_1_core1_8 = aie.core(%tile1_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_8 = AIE.core(%tile2_8) { + %block_1_core2_8 = aie.core(%tile2_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_1 = AIE.core(%tile3_1) { + %block_2_core3_1 = aie.core(%tile3_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_1 = AIE.core(%tile4_1) { + %block_2_core4_1 = aie.core(%tile4_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_1 = AIE.core(%tile5_1) { + %block_2_core5_1 = aie.core(%tile5_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_2 = AIE.core(%tile3_2) { + %block_2_core3_2 = aie.core(%tile3_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock32_14, "Acquire", 0) // start the timer + aie.use_lock(%lock32_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_2 = AIE.core(%tile4_2) { + %block_2_core4_2 = aie.core(%tile4_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_2_core5_2 = AIE.core(%tile5_2) { + %block_2_core5_2 = aie.core(%tile5_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1580,354 +1580,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock52_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock52_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_3 = AIE.core(%tile3_3) { + %block_2_core3_3 = aie.core(%tile3_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_3 = AIE.core(%tile4_3) { + %block_2_core4_3 = aie.core(%tile4_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_3 = AIE.core(%tile5_3) { + %block_2_core5_3 = aie.core(%tile5_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_4 = AIE.core(%tile3_4) { + %block_2_core3_4 = aie.core(%tile3_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_4 = AIE.core(%tile4_4) { + %block_2_core4_4 = aie.core(%tile4_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_4 = AIE.core(%tile5_4) { + %block_2_core5_4 = aie.core(%tile5_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_5 = AIE.core(%tile3_5) { + %block_3_core3_5 = aie.core(%tile3_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_5 = AIE.core(%tile4_5) { + %block_3_core4_5 = aie.core(%tile4_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_5 = AIE.core(%tile5_5) { + %block_3_core5_5 = aie.core(%tile5_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_6 = AIE.core(%tile3_6) { + %block_3_core3_6 = aie.core(%tile3_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock36_14, "Acquire", 0) // start the timer + aie.use_lock(%lock36_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_6 = AIE.core(%tile4_6) { + %block_3_core4_6 = aie.core(%tile4_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_3_core5_6 = AIE.core(%tile5_6) { + %block_3_core5_6 = aie.core(%tile5_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1935,354 +1935,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock56_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock56_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_7 = AIE.core(%tile3_7) { + %block_3_core3_7 = aie.core(%tile3_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_7 = AIE.core(%tile4_7) { + %block_3_core4_7 = aie.core(%tile4_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_7 = AIE.core(%tile5_7) { + %block_3_core5_7 = aie.core(%tile5_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_8 = AIE.core(%tile3_8) { + %block_3_core3_8 = aie.core(%tile3_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_8 = AIE.core(%tile4_8) { + %block_3_core4_8 = aie.core(%tile4_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_8 = AIE.core(%tile5_8) { + %block_3_core5_8 = aie.core(%tile5_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_1 = AIE.core(%tile6_1) { + %block_4_core6_1 = aie.core(%tile6_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_1 = AIE.core(%tile7_1) { + %block_4_core7_1 = aie.core(%tile7_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_1 = AIE.core(%tile8_1) { + %block_4_core8_1 = aie.core(%tile8_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_2 = AIE.core(%tile6_2) { + %block_4_core6_2 = aie.core(%tile6_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock62_14, "Acquire", 0) // start the timer + aie.use_lock(%lock62_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_2 = AIE.core(%tile7_2) { + %block_4_core7_2 = aie.core(%tile7_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_4_core8_2 = AIE.core(%tile8_2) { + %block_4_core8_2 = aie.core(%tile8_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_out_shim_6: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_out_shim_6: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -2290,354 +2290,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_out_shim_6:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_out_shim_6:!aie.objectfifo>, 4) } - AIE.use_lock(%lock82_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock82_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_3 = AIE.core(%tile6_3) { + %block_4_core6_3 = aie.core(%tile6_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_3 = AIE.core(%tile7_3) { + %block_4_core7_3 = aie.core(%tile7_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_3 = AIE.core(%tile8_3) { + %block_4_core8_3 = aie.core(%tile8_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_4 = AIE.core(%tile6_4) { + %block_4_core6_4 = aie.core(%tile6_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_4 = AIE.core(%tile7_4) { + %block_4_core7_4 = aie.core(%tile7_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_4 = AIE.core(%tile8_4) { + %block_4_core8_4 = aie.core(%tile8_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_5 = AIE.core(%tile6_5) { + %block_5_core6_5 = aie.core(%tile6_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_5 = AIE.core(%tile7_5) { + %block_5_core7_5 = aie.core(%tile7_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_5 = AIE.core(%tile8_5) { + %block_5_core8_5 = aie.core(%tile8_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_6 = AIE.core(%tile6_6) { + %block_5_core6_6 = aie.core(%tile6_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock66_14, "Acquire", 0) // start the timer + aie.use_lock(%lock66_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_6 = AIE.core(%tile7_6) { + %block_5_core7_6 = aie.core(%tile7_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_5_core8_6 = AIE.core(%tile8_6) { + %block_5_core8_6 = aie.core(%tile8_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_out_shim_6: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_out_shim_6: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -2645,354 +2645,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_out_shim_6:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_out_shim_6:!aie.objectfifo>, 4) } - AIE.use_lock(%lock86_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock86_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_7 = AIE.core(%tile6_7) { + %block_5_core6_7 = aie.core(%tile6_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_7 = AIE.core(%tile7_7) { + %block_5_core7_7 = aie.core(%tile7_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_7 = AIE.core(%tile8_7) { + %block_5_core8_7 = aie.core(%tile8_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_8 = AIE.core(%tile6_8) { + %block_5_core6_8 = aie.core(%tile6_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_8 = AIE.core(%tile7_8) { + %block_5_core7_8 = aie.core(%tile7_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_8 = AIE.core(%tile8_8) { + %block_5_core8_8 = aie.core(%tile8_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_1 = AIE.core(%tile9_1) { + %block_6_core9_1 = aie.core(%tile9_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_1 = AIE.core(%tile10_1) { + %block_6_core10_1 = aie.core(%tile10_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_1 = AIE.core(%tile11_1) { + %block_6_core11_1 = aie.core(%tile11_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_2 = AIE.core(%tile9_2) { + %block_6_core9_2 = aie.core(%tile9_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock92_14, "Acquire", 0) // start the timer + aie.use_lock(%lock92_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_2 = AIE.core(%tile10_2) { + %block_6_core10_2 = aie.core(%tile10_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_6_core11_2 = AIE.core(%tile11_2) { + %block_6_core11_2 = aie.core(%tile11_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_out_shim_7: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_out_shim_7: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -3000,354 +3000,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_out_shim_7:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_out_shim_7:!aie.objectfifo>, 4) } - AIE.use_lock(%lock112_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock112_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_3 = AIE.core(%tile9_3) { + %block_6_core9_3 = aie.core(%tile9_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_3 = AIE.core(%tile10_3) { + %block_6_core10_3 = aie.core(%tile10_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_3 = AIE.core(%tile11_3) { + %block_6_core11_3 = aie.core(%tile11_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_4 = AIE.core(%tile9_4) { + %block_6_core9_4 = aie.core(%tile9_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_4 = AIE.core(%tile10_4) { + %block_6_core10_4 = aie.core(%tile10_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_4 = AIE.core(%tile11_4) { + %block_6_core11_4 = aie.core(%tile11_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_5 = AIE.core(%tile9_5) { + %block_7_core9_5 = aie.core(%tile9_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_5 = AIE.core(%tile10_5) { + %block_7_core10_5 = aie.core(%tile10_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_5 = AIE.core(%tile11_5) { + %block_7_core11_5 = aie.core(%tile11_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_6 = AIE.core(%tile9_6) { + %block_7_core9_6 = aie.core(%tile9_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock96_14, "Acquire", 0) // start the timer + aie.use_lock(%lock96_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_6 = AIE.core(%tile10_6) { + %block_7_core10_6 = aie.core(%tile10_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_7_core11_6 = AIE.core(%tile11_6) { + %block_7_core11_6 = aie.core(%tile11_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_out_shim_7: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_out_shim_7: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -3355,354 +3355,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_out_shim_7:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_out_shim_7:!aie.objectfifo>, 4) } - AIE.use_lock(%lock116_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock116_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_7 = AIE.core(%tile9_7) { + %block_7_core9_7 = aie.core(%tile9_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_7 = AIE.core(%tile10_7) { + %block_7_core10_7 = aie.core(%tile10_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_7 = AIE.core(%tile11_7) { + %block_7_core11_7 = aie.core(%tile11_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_8 = AIE.core(%tile9_8) { + %block_7_core9_8 = aie.core(%tile9_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_8 = AIE.core(%tile10_8) { + %block_7_core10_8 = aie.core(%tile10_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_8 = AIE.core(%tile11_8) { + %block_7_core11_8 = aie.core(%tile11_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_1 = AIE.core(%tile12_1) { + %block_8_core12_1 = aie.core(%tile12_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_1 = AIE.core(%tile13_1) { + %block_8_core13_1 = aie.core(%tile13_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_8_core14_1 = AIE.core(%tile14_1) { + %block_8_core14_1 = aie.core(%tile14_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_2 = AIE.core(%tile12_2) { + %block_8_core12_2 = aie.core(%tile12_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock122_14, "Acquire", 0) // start the timer + aie.use_lock(%lock122_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_2 = AIE.core(%tile13_2) { + %block_8_core13_2 = aie.core(%tile13_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_8_core14_2 = AIE.core(%tile14_2) { + %block_8_core14_2 = aie.core(%tile14_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_out_shim_10: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_out_shim_10: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -3710,354 +3710,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_out_shim_10:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_out_shim_10:!aie.objectfifo>, 4) } - AIE.use_lock(%lock142_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock142_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_3 = AIE.core(%tile12_3) { + %block_8_core12_3 = aie.core(%tile12_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_3 = AIE.core(%tile13_3) { + %block_8_core13_3 = aie.core(%tile13_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_8_core14_3 = AIE.core(%tile14_3) { + %block_8_core14_3 = aie.core(%tile14_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_4 = AIE.core(%tile12_4) { + %block_8_core12_4 = aie.core(%tile12_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_4 = AIE.core(%tile13_4) { + %block_8_core13_4 = aie.core(%tile13_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_8_core14_4 = AIE.core(%tile14_4) { + %block_8_core14_4 = aie.core(%tile14_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_5 = AIE.core(%tile12_5) { + %block_9_core12_5 = aie.core(%tile12_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_5 = AIE.core(%tile13_5) { + %block_9_core13_5 = aie.core(%tile13_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_9_core14_5 = AIE.core(%tile14_5) { + %block_9_core14_5 = aie.core(%tile14_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_6 = AIE.core(%tile12_6) { + %block_9_core12_6 = aie.core(%tile12_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock126_14, "Acquire", 0) // start the timer + aie.use_lock(%lock126_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_6 = AIE.core(%tile13_6) { + %block_9_core13_6 = aie.core(%tile13_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_9_core14_6 = AIE.core(%tile14_6) { + %block_9_core14_6 = aie.core(%tile14_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_out_shim_10: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_out_shim_10: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -4065,354 +4065,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_out_shim_10:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_out_shim_10:!aie.objectfifo>, 4) } - AIE.use_lock(%lock146_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock146_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_7 = AIE.core(%tile12_7) { + %block_9_core12_7 = aie.core(%tile12_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_7 = AIE.core(%tile13_7) { + %block_9_core13_7 = aie.core(%tile13_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_9_core14_7 = AIE.core(%tile14_7) { + %block_9_core14_7 = aie.core(%tile14_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_8 = AIE.core(%tile12_8) { + %block_9_core12_8 = aie.core(%tile12_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_8 = AIE.core(%tile13_8) { + %block_9_core13_8 = aie.core(%tile13_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_9_core14_8 = AIE.core(%tile14_8) { + %block_9_core14_8 = aie.core(%tile14_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_1 = AIE.core(%tile15_1) { + %block_10_core15_1 = aie.core(%tile15_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_1 = AIE.core(%tile16_1) { + %block_10_core16_1 = aie.core(%tile16_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_10_core17_1 = AIE.core(%tile17_1) { + %block_10_core17_1 = aie.core(%tile17_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_2 = AIE.core(%tile15_2) { + %block_10_core15_2 = aie.core(%tile15_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock152_14, "Acquire", 0) // start the timer + aie.use_lock(%lock152_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_2 = AIE.core(%tile16_2) { + %block_10_core16_2 = aie.core(%tile16_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_10_core17_2 = AIE.core(%tile17_2) { + %block_10_core17_2 = aie.core(%tile17_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_out_shim_11: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_out_shim_11: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -4420,354 +4420,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_out_shim_11:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_out_shim_11:!aie.objectfifo>, 4) } - AIE.use_lock(%lock172_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock172_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_3 = AIE.core(%tile15_3) { + %block_10_core15_3 = aie.core(%tile15_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_3 = AIE.core(%tile16_3) { + %block_10_core16_3 = aie.core(%tile16_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_10_core17_3 = AIE.core(%tile17_3) { + %block_10_core17_3 = aie.core(%tile17_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_4 = AIE.core(%tile15_4) { + %block_10_core15_4 = aie.core(%tile15_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_4 = AIE.core(%tile16_4) { + %block_10_core16_4 = aie.core(%tile16_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_10_core17_4 = AIE.core(%tile17_4) { + %block_10_core17_4 = aie.core(%tile17_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_5 = AIE.core(%tile15_5) { + %block_11_core15_5 = aie.core(%tile15_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_5 = AIE.core(%tile16_5) { + %block_11_core16_5 = aie.core(%tile16_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_11_core17_5 = AIE.core(%tile17_5) { + %block_11_core17_5 = aie.core(%tile17_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_6 = AIE.core(%tile15_6) { + %block_11_core15_6 = aie.core(%tile15_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock156_14, "Acquire", 0) // start the timer + aie.use_lock(%lock156_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_6 = AIE.core(%tile16_6) { + %block_11_core16_6 = aie.core(%tile16_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_11_core17_6 = AIE.core(%tile17_6) { + %block_11_core17_6 = aie.core(%tile17_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_out_shim_11: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_out_shim_11: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -4775,354 +4775,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_out_shim_11:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_out_shim_11:!aie.objectfifo>, 4) } - AIE.use_lock(%lock176_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock176_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_7 = AIE.core(%tile15_7) { + %block_11_core15_7 = aie.core(%tile15_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_7 = AIE.core(%tile16_7) { + %block_11_core16_7 = aie.core(%tile16_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_11_core17_7 = AIE.core(%tile17_7) { + %block_11_core17_7 = aie.core(%tile17_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_8 = AIE.core(%tile15_8) { + %block_11_core15_8 = aie.core(%tile15_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_8 = AIE.core(%tile16_8) { + %block_11_core16_8 = aie.core(%tile16_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_11_core17_8 = AIE.core(%tile17_8) { + %block_11_core17_8 = aie.core(%tile17_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_1 = AIE.core(%tile18_1) { + %block_12_core18_1 = aie.core(%tile18_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_1 = AIE.core(%tile19_1) { + %block_12_core19_1 = aie.core(%tile19_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_12_core20_1 = AIE.core(%tile20_1) { + %block_12_core20_1 = aie.core(%tile20_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_2 = AIE.core(%tile18_2) { + %block_12_core18_2 = aie.core(%tile18_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock182_14, "Acquire", 0) // start the timer + aie.use_lock(%lock182_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_2 = AIE.core(%tile19_2) { + %block_12_core19_2 = aie.core(%tile19_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_12_core20_2 = AIE.core(%tile20_2) { + %block_12_core20_2 = aie.core(%tile20_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_out_shim_18: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_out_shim_18: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -5130,354 +5130,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_out_shim_18:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_out_shim_18:!aie.objectfifo>, 4) } - AIE.use_lock(%lock202_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock202_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_3 = AIE.core(%tile18_3) { + %block_12_core18_3 = aie.core(%tile18_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_3 = AIE.core(%tile19_3) { + %block_12_core19_3 = aie.core(%tile19_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_12_core20_3 = AIE.core(%tile20_3) { + %block_12_core20_3 = aie.core(%tile20_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_4 = AIE.core(%tile18_4) { + %block_12_core18_4 = aie.core(%tile18_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_4 = AIE.core(%tile19_4) { + %block_12_core19_4 = aie.core(%tile19_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_12_core20_4 = AIE.core(%tile20_4) { + %block_12_core20_4 = aie.core(%tile20_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_5 = AIE.core(%tile18_5) { + %block_13_core18_5 = aie.core(%tile18_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_5 = AIE.core(%tile19_5) { + %block_13_core19_5 = aie.core(%tile19_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_13_core20_5 = AIE.core(%tile20_5) { + %block_13_core20_5 = aie.core(%tile20_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_6 = AIE.core(%tile18_6) { + %block_13_core18_6 = aie.core(%tile18_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock186_14, "Acquire", 0) // start the timer + aie.use_lock(%lock186_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_6 = AIE.core(%tile19_6) { + %block_13_core19_6 = aie.core(%tile19_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_13_core20_6 = AIE.core(%tile20_6) { + %block_13_core20_6 = aie.core(%tile20_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_out_shim_18: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_out_shim_18: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -5485,354 +5485,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_out_shim_18:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_out_shim_18:!aie.objectfifo>, 4) } - AIE.use_lock(%lock206_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock206_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_7 = AIE.core(%tile18_7) { + %block_13_core18_7 = aie.core(%tile18_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_7 = AIE.core(%tile19_7) { + %block_13_core19_7 = aie.core(%tile19_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_13_core20_7 = AIE.core(%tile20_7) { + %block_13_core20_7 = aie.core(%tile20_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_8 = AIE.core(%tile18_8) { + %block_13_core18_8 = aie.core(%tile18_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_8 = AIE.core(%tile19_8) { + %block_13_core19_8 = aie.core(%tile19_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_13_core20_8 = AIE.core(%tile20_8) { + %block_13_core20_8 = aie.core(%tile20_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_1 = AIE.core(%tile21_1) { + %block_14_core21_1 = aie.core(%tile21_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_1 = AIE.core(%tile22_1) { + %block_14_core22_1 = aie.core(%tile22_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_14_core23_1 = AIE.core(%tile23_1) { + %block_14_core23_1 = aie.core(%tile23_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_2 = AIE.core(%tile21_2) { + %block_14_core21_2 = aie.core(%tile21_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock212_14, "Acquire", 0) // start the timer + aie.use_lock(%lock212_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_2 = AIE.core(%tile22_2) { + %block_14_core22_2 = aie.core(%tile22_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_14_core23_2 = AIE.core(%tile23_2) { + %block_14_core23_2 = aie.core(%tile23_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_out_shim_19: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_out_shim_19: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -5840,354 +5840,354 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_out_shim_19:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_out_shim_19:!aie.objectfifo>, 4) } - AIE.use_lock(%lock232_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock232_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_3 = AIE.core(%tile21_3) { + %block_14_core21_3 = aie.core(%tile21_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_3 = AIE.core(%tile22_3) { + %block_14_core22_3 = aie.core(%tile22_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_14_core23_3 = AIE.core(%tile23_3) { + %block_14_core23_3 = aie.core(%tile23_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_4 = AIE.core(%tile21_4) { + %block_14_core21_4 = aie.core(%tile21_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_4 = AIE.core(%tile22_4) { + %block_14_core22_4 = aie.core(%tile22_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_14_core23_4 = AIE.core(%tile23_4) { + %block_14_core23_4 = aie.core(%tile23_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_5 = AIE.core(%tile21_5) { + %block_15_core21_5 = aie.core(%tile21_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_5 = AIE.core(%tile22_5) { + %block_15_core22_5 = aie.core(%tile22_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_15_core23_5 = AIE.core(%tile23_5) { + %block_15_core23_5 = aie.core(%tile23_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_6 = AIE.core(%tile21_6) { + %block_15_core21_6 = aie.core(%tile21_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock216_14, "Acquire", 0) // start the timer + aie.use_lock(%lock216_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_6 = AIE.core(%tile22_6) { + %block_15_core22_6 = aie.core(%tile22_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_15_core23_6 = AIE.core(%tile23_6) { + %block_15_core23_6 = aie.core(%tile23_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_out_shim_19: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_out_shim_19: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -6195,180 +6195,180 @@ module @hdiff_bundle_16 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_out_shim_19:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_out_shim_19:!aie.objectfifo>, 4) } - AIE.use_lock(%lock236_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock236_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_7 = AIE.core(%tile21_7) { + %block_15_core21_7 = aie.core(%tile21_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_7 = AIE.core(%tile22_7) { + %block_15_core22_7 = aie.core(%tile22_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_15_core23_7 = AIE.core(%tile23_7) { + %block_15_core23_7 = aie.core(%tile23_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_8 = AIE.core(%tile21_8) { + %block_15_core21_8 = aie.core(%tile21_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_8 = AIE.core(%tile22_8) { + %block_15_core22_8 = aie.core(%tile22_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_15_core23_8 = AIE.core(%tile23_8) { + %block_15_core23_8 = aie.core(%tile23_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_2.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_2.mlir index cfcc9615b1..e2c70180b0 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_2.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_2.mlir @@ -14,267 +14,267 @@ module @hdiff_bundle_2 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---Generating B-block 1---*- //---col 0---*- - %tile0_5 = AIE.tile(0, 5) - %tile0_6 = AIE.tile(0, 6) - %tile0_7 = AIE.tile(0, 7) - %tile0_8 = AIE.tile(0, 8) + %tile0_5 = aie.tile(0, 5) + %tile0_6 = aie.tile(0, 6) + %tile0_7 = aie.tile(0, 7) + %tile0_8 = aie.tile(0, 8) //---col 1---*- - %tile1_5 = AIE.tile(1, 5) - %tile1_6 = AIE.tile(1, 6) - %tile1_7 = AIE.tile(1, 7) - %tile1_8 = AIE.tile(1, 8) + %tile1_5 = aie.tile(1, 5) + %tile1_6 = aie.tile(1, 6) + %tile1_7 = aie.tile(1, 7) + %tile1_8 = aie.tile(1, 8) //---col 2---*- - %tile2_5 = AIE.tile(2, 5) - %tile2_6 = AIE.tile(2, 6) - %tile2_7 = AIE.tile(2, 7) - %tile2_8 = AIE.tile(2, 8) + %tile2_5 = aie.tile(2, 5) + %tile2_6 = aie.tile(2, 6) + %tile2_7 = aie.tile(2, 7) + %tile2_8 = aie.tile(2, 8) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) // timing locks - %lock02_14 = AIE.lock(%tile0_2, 14) { sym_name = "lock02_14" } - %lock22_14 = AIE.lock(%tile2_2, 14) { sym_name = "lock22_14" } + %lock02_14 = aie.lock(%tile0_2, 14) { sym_name = "lock02_14" } + %lock22_14 = aie.lock(%tile2_2, 14) { sym_name = "lock22_14" } // timing locks - %lock06_14 = AIE.lock(%tile0_6, 14) { sym_name = "lock06_14" } - %lock26_14 = AIE.lock(%tile2_6, 14) { sym_name = "lock26_14" } + %lock06_14 = aie.lock(%tile0_6, 14) { sym_name = "lock06_14" } + %lock26_14 = aie.lock(%tile2_6, 14) { sym_name = "lock26_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B1 buffers---*- - %block_1_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_1_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_1_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> - - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> - %ext_buffer_out_1 = AIE.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> + %block_1_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_1_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_1_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_1_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> + %ext_buffer_out_1 = aie.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock02_14, "Acquire", 0) // start the timer + aie.use_lock(%lock02_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -282,354 +282,354 @@ module @hdiff_bundle_2 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock22_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock22_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_5 = AIE.core(%tile0_5) { + %block_1_core0_5 = aie.core(%tile0_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_5 = AIE.core(%tile1_5) { + %block_1_core1_5 = aie.core(%tile1_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_5 = AIE.core(%tile2_5) { + %block_1_core2_5 = aie.core(%tile2_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_6 = AIE.core(%tile0_6) { + %block_1_core0_6 = aie.core(%tile0_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock06_14, "Acquire", 0) // start the timer + aie.use_lock(%lock06_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_6 = AIE.core(%tile1_6) { + %block_1_core1_6 = aie.core(%tile1_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_1_core2_6 = AIE.core(%tile2_6) { + %block_1_core2_6 = aie.core(%tile2_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -637,180 +637,180 @@ module @hdiff_bundle_2 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock26_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock26_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_7 = AIE.core(%tile0_7) { + %block_1_core0_7 = aie.core(%tile0_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_7 = AIE.core(%tile1_7) { + %block_1_core1_7 = aie.core(%tile1_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_7 = AIE.core(%tile2_7) { + %block_1_core2_7 = aie.core(%tile2_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_8 = AIE.core(%tile0_8) { + %block_1_core0_8 = aie.core(%tile0_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_8 = AIE.core(%tile1_8) { + %block_1_core1_8 = aie.core(%tile1_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_8 = AIE.core(%tile2_8) { + %block_1_core2_8 = aie.core(%tile2_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_3.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_3.mlir index 8aefd6ca50..284bcf7752 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_3.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_3.mlir @@ -13,311 +13,311 @@ module @hdiff_bundle_3 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---Generating B-block 1---*- //---col 0---*- - %tile0_5 = AIE.tile(0, 5) - %tile0_6 = AIE.tile(0, 6) - %tile0_7 = AIE.tile(0, 7) - %tile0_8 = AIE.tile(0, 8) + %tile0_5 = aie.tile(0, 5) + %tile0_6 = aie.tile(0, 6) + %tile0_7 = aie.tile(0, 7) + %tile0_8 = aie.tile(0, 8) //---col 1---*- - %tile1_5 = AIE.tile(1, 5) - %tile1_6 = AIE.tile(1, 6) - %tile1_7 = AIE.tile(1, 7) - %tile1_8 = AIE.tile(1, 8) + %tile1_5 = aie.tile(1, 5) + %tile1_6 = aie.tile(1, 6) + %tile1_7 = aie.tile(1, 7) + %tile1_8 = aie.tile(1, 8) //---col 2---*- - %tile2_5 = AIE.tile(2, 5) - %tile2_6 = AIE.tile(2, 6) - %tile2_7 = AIE.tile(2, 7) - %tile2_8 = AIE.tile(2, 8) + %tile2_5 = aie.tile(2, 5) + %tile2_6 = aie.tile(2, 6) + %tile2_7 = aie.tile(2, 7) + %tile2_8 = aie.tile(2, 8) //---Generating B-block 2---*- //---col 0---*- - %tile3_1 = AIE.tile(3, 1) - %tile3_2 = AIE.tile(3, 2) - %tile3_3 = AIE.tile(3, 3) - %tile3_4 = AIE.tile(3, 4) + %tile3_1 = aie.tile(3, 1) + %tile3_2 = aie.tile(3, 2) + %tile3_3 = aie.tile(3, 3) + %tile3_4 = aie.tile(3, 4) //---col 1---*- - %tile4_1 = AIE.tile(4, 1) - %tile4_2 = AIE.tile(4, 2) - %tile4_3 = AIE.tile(4, 3) - %tile4_4 = AIE.tile(4, 4) + %tile4_1 = aie.tile(4, 1) + %tile4_2 = aie.tile(4, 2) + %tile4_3 = aie.tile(4, 3) + %tile4_4 = aie.tile(4, 4) //---col 2---*- - %tile5_1 = AIE.tile(5, 1) - %tile5_2 = AIE.tile(5, 2) - %tile5_3 = AIE.tile(5, 3) - %tile5_4 = AIE.tile(5, 4) + %tile5_1 = aie.tile(5, 1) + %tile5_2 = aie.tile(5, 2) + %tile5_3 = aie.tile(5, 3) + %tile5_4 = aie.tile(5, 4) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) //---NOC Tile 3---*- - %tile3_0 = AIE.tile(3, 0) + %tile3_0 = aie.tile(3, 0) // timing locks - %lock01_14 = AIE.lock(%tile0_1, 14) { sym_name = "lock01_14" } - %lock21_14 = AIE.lock(%tile2_1, 14) { sym_name = "lock21_14" } + %lock01_14 = aie.lock(%tile0_1, 14) { sym_name = "lock01_14" } + %lock21_14 = aie.lock(%tile2_1, 14) { sym_name = "lock21_14" } // timing locks - %lock05_14 = AIE.lock(%tile0_5, 14) { sym_name = "lock05_14" } - %lock25_14 = AIE.lock(%tile2_5, 14) { sym_name = "lock25_14" } + %lock05_14 = aie.lock(%tile0_5, 14) { sym_name = "lock05_14" } + %lock25_14 = aie.lock(%tile2_5, 14) { sym_name = "lock25_14" } // timing locks - %lock31_14 = AIE.lock(%tile3_1, 14) { sym_name = "lock31_14" } - %lock51_14 = AIE.lock(%tile5_1, 14) { sym_name = "lock51_14" } + %lock31_14 = aie.lock(%tile3_1, 14) { sym_name = "lock31_14" } + %lock51_14 = aie.lock(%tile5_1, 14) { sym_name = "lock51_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B1 buffers---*- - %block_1_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_1_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_1_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_1_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_1_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_1_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_1_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B2 buffers---*- - %block_2_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_2_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_2_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> - - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> - %ext_buffer_out_1 = AIE.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> - - %ext_buffer_in_2 = AIE.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> - %ext_buffer_out_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> + %block_2_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_2_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_2_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_2_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> + %ext_buffer_out_1 = aie.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> + + %ext_buffer_in_2 = aie.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> + %ext_buffer_out_2 = aie.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock01_14, "Acquire", 0) // start the timer + aie.use_lock(%lock01_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.use_lock(%lock21_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock21_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -325,354 +325,354 @@ module @hdiff_bundle_3 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_5 = AIE.core(%tile0_5) { + %block_1_core0_5 = aie.core(%tile0_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock05_14, "Acquire", 0) // start the timer + aie.use_lock(%lock05_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_5 = AIE.core(%tile1_5) { + %block_1_core1_5 = aie.core(%tile1_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_5 = AIE.core(%tile2_5) { + %block_1_core2_5 = aie.core(%tile2_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.use_lock(%lock25_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock25_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_6 = AIE.core(%tile0_6) { + %block_1_core0_6 = aie.core(%tile0_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_6 = AIE.core(%tile1_6) { + %block_1_core1_6 = aie.core(%tile1_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_1_core2_6 = AIE.core(%tile2_6) { + %block_1_core2_6 = aie.core(%tile2_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -680,354 +680,354 @@ module @hdiff_bundle_3 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_7 = AIE.core(%tile0_7) { + %block_1_core0_7 = aie.core(%tile0_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_7 = AIE.core(%tile1_7) { + %block_1_core1_7 = aie.core(%tile1_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_7 = AIE.core(%tile2_7) { + %block_1_core2_7 = aie.core(%tile2_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_8 = AIE.core(%tile0_8) { + %block_1_core0_8 = aie.core(%tile0_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_8 = AIE.core(%tile1_8) { + %block_1_core1_8 = aie.core(%tile1_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_8 = AIE.core(%tile2_8) { + %block_1_core2_8 = aie.core(%tile2_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_1 = AIE.core(%tile3_1) { + %block_2_core3_1 = aie.core(%tile3_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock31_14, "Acquire", 0) // start the timer + aie.use_lock(%lock31_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_1 = AIE.core(%tile4_1) { + %block_2_core4_1 = aie.core(%tile4_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_1 = AIE.core(%tile5_1) { + %block_2_core5_1 = aie.core(%tile5_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.use_lock(%lock51_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock51_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_2 = AIE.core(%tile3_2) { + %block_2_core3_2 = aie.core(%tile3_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_2 = AIE.core(%tile4_2) { + %block_2_core4_2 = aie.core(%tile4_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_2_core5_2 = AIE.core(%tile5_2) { + %block_2_core5_2 = aie.core(%tile5_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1035,179 +1035,179 @@ module @hdiff_bundle_3 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_3 = AIE.core(%tile3_3) { + %block_2_core3_3 = aie.core(%tile3_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_3 = AIE.core(%tile4_3) { + %block_2_core4_3 = aie.core(%tile4_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_3 = AIE.core(%tile5_3) { + %block_2_core5_3 = aie.core(%tile5_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_4 = AIE.core(%tile3_4) { + %block_2_core3_4 = aie.core(%tile3_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_4 = AIE.core(%tile4_4) { + %block_2_core4_4 = aie.core(%tile4_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_4 = AIE.core(%tile5_4) { + %block_2_core5_4 = aie.core(%tile5_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_32.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_32.mlir index 6ae598d044..7db60b8d6a 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_32.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_32.mlir @@ -13,1527 +13,1527 @@ module @hdiff_bundle_32 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---Generating B-block 1---*- //---col 0---*- - %tile0_5 = AIE.tile(0, 5) - %tile0_6 = AIE.tile(0, 6) - %tile0_7 = AIE.tile(0, 7) - %tile0_8 = AIE.tile(0, 8) + %tile0_5 = aie.tile(0, 5) + %tile0_6 = aie.tile(0, 6) + %tile0_7 = aie.tile(0, 7) + %tile0_8 = aie.tile(0, 8) //---col 1---*- - %tile1_5 = AIE.tile(1, 5) - %tile1_6 = AIE.tile(1, 6) - %tile1_7 = AIE.tile(1, 7) - %tile1_8 = AIE.tile(1, 8) + %tile1_5 = aie.tile(1, 5) + %tile1_6 = aie.tile(1, 6) + %tile1_7 = aie.tile(1, 7) + %tile1_8 = aie.tile(1, 8) //---col 2---*- - %tile2_5 = AIE.tile(2, 5) - %tile2_6 = AIE.tile(2, 6) - %tile2_7 = AIE.tile(2, 7) - %tile2_8 = AIE.tile(2, 8) + %tile2_5 = aie.tile(2, 5) + %tile2_6 = aie.tile(2, 6) + %tile2_7 = aie.tile(2, 7) + %tile2_8 = aie.tile(2, 8) //---Generating B-block 2---*- //---col 0---*- - %tile3_1 = AIE.tile(3, 1) - %tile3_2 = AIE.tile(3, 2) - %tile3_3 = AIE.tile(3, 3) - %tile3_4 = AIE.tile(3, 4) + %tile3_1 = aie.tile(3, 1) + %tile3_2 = aie.tile(3, 2) + %tile3_3 = aie.tile(3, 3) + %tile3_4 = aie.tile(3, 4) //---col 1---*- - %tile4_1 = AIE.tile(4, 1) - %tile4_2 = AIE.tile(4, 2) - %tile4_3 = AIE.tile(4, 3) - %tile4_4 = AIE.tile(4, 4) + %tile4_1 = aie.tile(4, 1) + %tile4_2 = aie.tile(4, 2) + %tile4_3 = aie.tile(4, 3) + %tile4_4 = aie.tile(4, 4) //---col 2---*- - %tile5_1 = AIE.tile(5, 1) - %tile5_2 = AIE.tile(5, 2) - %tile5_3 = AIE.tile(5, 3) - %tile5_4 = AIE.tile(5, 4) + %tile5_1 = aie.tile(5, 1) + %tile5_2 = aie.tile(5, 2) + %tile5_3 = aie.tile(5, 3) + %tile5_4 = aie.tile(5, 4) //---Generating B-block 3---*- //---col 0---*- - %tile3_5 = AIE.tile(3, 5) - %tile3_6 = AIE.tile(3, 6) - %tile3_7 = AIE.tile(3, 7) - %tile3_8 = AIE.tile(3, 8) + %tile3_5 = aie.tile(3, 5) + %tile3_6 = aie.tile(3, 6) + %tile3_7 = aie.tile(3, 7) + %tile3_8 = aie.tile(3, 8) //---col 1---*- - %tile4_5 = AIE.tile(4, 5) - %tile4_6 = AIE.tile(4, 6) - %tile4_7 = AIE.tile(4, 7) - %tile4_8 = AIE.tile(4, 8) + %tile4_5 = aie.tile(4, 5) + %tile4_6 = aie.tile(4, 6) + %tile4_7 = aie.tile(4, 7) + %tile4_8 = aie.tile(4, 8) //---col 2---*- - %tile5_5 = AIE.tile(5, 5) - %tile5_6 = AIE.tile(5, 6) - %tile5_7 = AIE.tile(5, 7) - %tile5_8 = AIE.tile(5, 8) + %tile5_5 = aie.tile(5, 5) + %tile5_6 = aie.tile(5, 6) + %tile5_7 = aie.tile(5, 7) + %tile5_8 = aie.tile(5, 8) //---Generating B-block 4---*- //---col 0---*- - %tile6_1 = AIE.tile(6, 1) - %tile6_2 = AIE.tile(6, 2) - %tile6_3 = AIE.tile(6, 3) - %tile6_4 = AIE.tile(6, 4) + %tile6_1 = aie.tile(6, 1) + %tile6_2 = aie.tile(6, 2) + %tile6_3 = aie.tile(6, 3) + %tile6_4 = aie.tile(6, 4) //---col 1---*- - %tile7_1 = AIE.tile(7, 1) - %tile7_2 = AIE.tile(7, 2) - %tile7_3 = AIE.tile(7, 3) - %tile7_4 = AIE.tile(7, 4) + %tile7_1 = aie.tile(7, 1) + %tile7_2 = aie.tile(7, 2) + %tile7_3 = aie.tile(7, 3) + %tile7_4 = aie.tile(7, 4) //---col 2---*- - %tile8_1 = AIE.tile(8, 1) - %tile8_2 = AIE.tile(8, 2) - %tile8_3 = AIE.tile(8, 3) - %tile8_4 = AIE.tile(8, 4) + %tile8_1 = aie.tile(8, 1) + %tile8_2 = aie.tile(8, 2) + %tile8_3 = aie.tile(8, 3) + %tile8_4 = aie.tile(8, 4) //---Generating B-block 5---*- //---col 0---*- - %tile6_5 = AIE.tile(6, 5) - %tile6_6 = AIE.tile(6, 6) - %tile6_7 = AIE.tile(6, 7) - %tile6_8 = AIE.tile(6, 8) + %tile6_5 = aie.tile(6, 5) + %tile6_6 = aie.tile(6, 6) + %tile6_7 = aie.tile(6, 7) + %tile6_8 = aie.tile(6, 8) //---col 1---*- - %tile7_5 = AIE.tile(7, 5) - %tile7_6 = AIE.tile(7, 6) - %tile7_7 = AIE.tile(7, 7) - %tile7_8 = AIE.tile(7, 8) + %tile7_5 = aie.tile(7, 5) + %tile7_6 = aie.tile(7, 6) + %tile7_7 = aie.tile(7, 7) + %tile7_8 = aie.tile(7, 8) //---col 2---*- - %tile8_5 = AIE.tile(8, 5) - %tile8_6 = AIE.tile(8, 6) - %tile8_7 = AIE.tile(8, 7) - %tile8_8 = AIE.tile(8, 8) + %tile8_5 = aie.tile(8, 5) + %tile8_6 = aie.tile(8, 6) + %tile8_7 = aie.tile(8, 7) + %tile8_8 = aie.tile(8, 8) //---Generating B-block 6---*- //---col 0---*- - %tile9_1 = AIE.tile(9, 1) - %tile9_2 = AIE.tile(9, 2) - %tile9_3 = AIE.tile(9, 3) - %tile9_4 = AIE.tile(9, 4) + %tile9_1 = aie.tile(9, 1) + %tile9_2 = aie.tile(9, 2) + %tile9_3 = aie.tile(9, 3) + %tile9_4 = aie.tile(9, 4) //---col 1---*- - %tile10_1 = AIE.tile(10, 1) - %tile10_2 = AIE.tile(10, 2) - %tile10_3 = AIE.tile(10, 3) - %tile10_4 = AIE.tile(10, 4) + %tile10_1 = aie.tile(10, 1) + %tile10_2 = aie.tile(10, 2) + %tile10_3 = aie.tile(10, 3) + %tile10_4 = aie.tile(10, 4) //---col 2---*- - %tile11_1 = AIE.tile(11, 1) - %tile11_2 = AIE.tile(11, 2) - %tile11_3 = AIE.tile(11, 3) - %tile11_4 = AIE.tile(11, 4) + %tile11_1 = aie.tile(11, 1) + %tile11_2 = aie.tile(11, 2) + %tile11_3 = aie.tile(11, 3) + %tile11_4 = aie.tile(11, 4) //---Generating B-block 7---*- //---col 0---*- - %tile9_5 = AIE.tile(9, 5) - %tile9_6 = AIE.tile(9, 6) - %tile9_7 = AIE.tile(9, 7) - %tile9_8 = AIE.tile(9, 8) + %tile9_5 = aie.tile(9, 5) + %tile9_6 = aie.tile(9, 6) + %tile9_7 = aie.tile(9, 7) + %tile9_8 = aie.tile(9, 8) //---col 1---*- - %tile10_5 = AIE.tile(10, 5) - %tile10_6 = AIE.tile(10, 6) - %tile10_7 = AIE.tile(10, 7) - %tile10_8 = AIE.tile(10, 8) + %tile10_5 = aie.tile(10, 5) + %tile10_6 = aie.tile(10, 6) + %tile10_7 = aie.tile(10, 7) + %tile10_8 = aie.tile(10, 8) //---col 2---*- - %tile11_5 = AIE.tile(11, 5) - %tile11_6 = AIE.tile(11, 6) - %tile11_7 = AIE.tile(11, 7) - %tile11_8 = AIE.tile(11, 8) + %tile11_5 = aie.tile(11, 5) + %tile11_6 = aie.tile(11, 6) + %tile11_7 = aie.tile(11, 7) + %tile11_8 = aie.tile(11, 8) //---Generating B-block 8---*- //---col 0---*- - %tile12_1 = AIE.tile(12, 1) - %tile12_2 = AIE.tile(12, 2) - %tile12_3 = AIE.tile(12, 3) - %tile12_4 = AIE.tile(12, 4) + %tile12_1 = aie.tile(12, 1) + %tile12_2 = aie.tile(12, 2) + %tile12_3 = aie.tile(12, 3) + %tile12_4 = aie.tile(12, 4) //---col 1---*- - %tile13_1 = AIE.tile(13, 1) - %tile13_2 = AIE.tile(13, 2) - %tile13_3 = AIE.tile(13, 3) - %tile13_4 = AIE.tile(13, 4) + %tile13_1 = aie.tile(13, 1) + %tile13_2 = aie.tile(13, 2) + %tile13_3 = aie.tile(13, 3) + %tile13_4 = aie.tile(13, 4) //---col 2---*- - %tile14_1 = AIE.tile(14, 1) - %tile14_2 = AIE.tile(14, 2) - %tile14_3 = AIE.tile(14, 3) - %tile14_4 = AIE.tile(14, 4) + %tile14_1 = aie.tile(14, 1) + %tile14_2 = aie.tile(14, 2) + %tile14_3 = aie.tile(14, 3) + %tile14_4 = aie.tile(14, 4) //---Generating B-block 9---*- //---col 0---*- - %tile12_5 = AIE.tile(12, 5) - %tile12_6 = AIE.tile(12, 6) - %tile12_7 = AIE.tile(12, 7) - %tile12_8 = AIE.tile(12, 8) + %tile12_5 = aie.tile(12, 5) + %tile12_6 = aie.tile(12, 6) + %tile12_7 = aie.tile(12, 7) + %tile12_8 = aie.tile(12, 8) //---col 1---*- - %tile13_5 = AIE.tile(13, 5) - %tile13_6 = AIE.tile(13, 6) - %tile13_7 = AIE.tile(13, 7) - %tile13_8 = AIE.tile(13, 8) + %tile13_5 = aie.tile(13, 5) + %tile13_6 = aie.tile(13, 6) + %tile13_7 = aie.tile(13, 7) + %tile13_8 = aie.tile(13, 8) //---col 2---*- - %tile14_5 = AIE.tile(14, 5) - %tile14_6 = AIE.tile(14, 6) - %tile14_7 = AIE.tile(14, 7) - %tile14_8 = AIE.tile(14, 8) + %tile14_5 = aie.tile(14, 5) + %tile14_6 = aie.tile(14, 6) + %tile14_7 = aie.tile(14, 7) + %tile14_8 = aie.tile(14, 8) //---Generating B-block 10---*- //---col 0---*- - %tile15_1 = AIE.tile(15, 1) - %tile15_2 = AIE.tile(15, 2) - %tile15_3 = AIE.tile(15, 3) - %tile15_4 = AIE.tile(15, 4) + %tile15_1 = aie.tile(15, 1) + %tile15_2 = aie.tile(15, 2) + %tile15_3 = aie.tile(15, 3) + %tile15_4 = aie.tile(15, 4) //---col 1---*- - %tile16_1 = AIE.tile(16, 1) - %tile16_2 = AIE.tile(16, 2) - %tile16_3 = AIE.tile(16, 3) - %tile16_4 = AIE.tile(16, 4) + %tile16_1 = aie.tile(16, 1) + %tile16_2 = aie.tile(16, 2) + %tile16_3 = aie.tile(16, 3) + %tile16_4 = aie.tile(16, 4) //---col 2---*- - %tile17_1 = AIE.tile(17, 1) - %tile17_2 = AIE.tile(17, 2) - %tile17_3 = AIE.tile(17, 3) - %tile17_4 = AIE.tile(17, 4) + %tile17_1 = aie.tile(17, 1) + %tile17_2 = aie.tile(17, 2) + %tile17_3 = aie.tile(17, 3) + %tile17_4 = aie.tile(17, 4) //---Generating B-block 11---*- //---col 0---*- - %tile15_5 = AIE.tile(15, 5) - %tile15_6 = AIE.tile(15, 6) - %tile15_7 = AIE.tile(15, 7) - %tile15_8 = AIE.tile(15, 8) + %tile15_5 = aie.tile(15, 5) + %tile15_6 = aie.tile(15, 6) + %tile15_7 = aie.tile(15, 7) + %tile15_8 = aie.tile(15, 8) //---col 1---*- - %tile16_5 = AIE.tile(16, 5) - %tile16_6 = AIE.tile(16, 6) - %tile16_7 = AIE.tile(16, 7) - %tile16_8 = AIE.tile(16, 8) + %tile16_5 = aie.tile(16, 5) + %tile16_6 = aie.tile(16, 6) + %tile16_7 = aie.tile(16, 7) + %tile16_8 = aie.tile(16, 8) //---col 2---*- - %tile17_5 = AIE.tile(17, 5) - %tile17_6 = AIE.tile(17, 6) - %tile17_7 = AIE.tile(17, 7) - %tile17_8 = AIE.tile(17, 8) + %tile17_5 = aie.tile(17, 5) + %tile17_6 = aie.tile(17, 6) + %tile17_7 = aie.tile(17, 7) + %tile17_8 = aie.tile(17, 8) //---Generating B-block 12---*- //---col 0---*- - %tile18_1 = AIE.tile(18, 1) - %tile18_2 = AIE.tile(18, 2) - %tile18_3 = AIE.tile(18, 3) - %tile18_4 = AIE.tile(18, 4) + %tile18_1 = aie.tile(18, 1) + %tile18_2 = aie.tile(18, 2) + %tile18_3 = aie.tile(18, 3) + %tile18_4 = aie.tile(18, 4) //---col 1---*- - %tile19_1 = AIE.tile(19, 1) - %tile19_2 = AIE.tile(19, 2) - %tile19_3 = AIE.tile(19, 3) - %tile19_4 = AIE.tile(19, 4) + %tile19_1 = aie.tile(19, 1) + %tile19_2 = aie.tile(19, 2) + %tile19_3 = aie.tile(19, 3) + %tile19_4 = aie.tile(19, 4) //---col 2---*- - %tile20_1 = AIE.tile(20, 1) - %tile20_2 = AIE.tile(20, 2) - %tile20_3 = AIE.tile(20, 3) - %tile20_4 = AIE.tile(20, 4) + %tile20_1 = aie.tile(20, 1) + %tile20_2 = aie.tile(20, 2) + %tile20_3 = aie.tile(20, 3) + %tile20_4 = aie.tile(20, 4) //---Generating B-block 13---*- //---col 0---*- - %tile18_5 = AIE.tile(18, 5) - %tile18_6 = AIE.tile(18, 6) - %tile18_7 = AIE.tile(18, 7) - %tile18_8 = AIE.tile(18, 8) + %tile18_5 = aie.tile(18, 5) + %tile18_6 = aie.tile(18, 6) + %tile18_7 = aie.tile(18, 7) + %tile18_8 = aie.tile(18, 8) //---col 1---*- - %tile19_5 = AIE.tile(19, 5) - %tile19_6 = AIE.tile(19, 6) - %tile19_7 = AIE.tile(19, 7) - %tile19_8 = AIE.tile(19, 8) + %tile19_5 = aie.tile(19, 5) + %tile19_6 = aie.tile(19, 6) + %tile19_7 = aie.tile(19, 7) + %tile19_8 = aie.tile(19, 8) //---col 2---*- - %tile20_5 = AIE.tile(20, 5) - %tile20_6 = AIE.tile(20, 6) - %tile20_7 = AIE.tile(20, 7) - %tile20_8 = AIE.tile(20, 8) + %tile20_5 = aie.tile(20, 5) + %tile20_6 = aie.tile(20, 6) + %tile20_7 = aie.tile(20, 7) + %tile20_8 = aie.tile(20, 8) //---Generating B-block 14---*- //---col 0---*- - %tile21_1 = AIE.tile(21, 1) - %tile21_2 = AIE.tile(21, 2) - %tile21_3 = AIE.tile(21, 3) - %tile21_4 = AIE.tile(21, 4) + %tile21_1 = aie.tile(21, 1) + %tile21_2 = aie.tile(21, 2) + %tile21_3 = aie.tile(21, 3) + %tile21_4 = aie.tile(21, 4) //---col 1---*- - %tile22_1 = AIE.tile(22, 1) - %tile22_2 = AIE.tile(22, 2) - %tile22_3 = AIE.tile(22, 3) - %tile22_4 = AIE.tile(22, 4) + %tile22_1 = aie.tile(22, 1) + %tile22_2 = aie.tile(22, 2) + %tile22_3 = aie.tile(22, 3) + %tile22_4 = aie.tile(22, 4) //---col 2---*- - %tile23_1 = AIE.tile(23, 1) - %tile23_2 = AIE.tile(23, 2) - %tile23_3 = AIE.tile(23, 3) - %tile23_4 = AIE.tile(23, 4) + %tile23_1 = aie.tile(23, 1) + %tile23_2 = aie.tile(23, 2) + %tile23_3 = aie.tile(23, 3) + %tile23_4 = aie.tile(23, 4) //---Generating B-block 15---*- //---col 0---*- - %tile21_5 = AIE.tile(21, 5) - %tile21_6 = AIE.tile(21, 6) - %tile21_7 = AIE.tile(21, 7) - %tile21_8 = AIE.tile(21, 8) + %tile21_5 = aie.tile(21, 5) + %tile21_6 = aie.tile(21, 6) + %tile21_7 = aie.tile(21, 7) + %tile21_8 = aie.tile(21, 8) //---col 1---*- - %tile22_5 = AIE.tile(22, 5) - %tile22_6 = AIE.tile(22, 6) - %tile22_7 = AIE.tile(22, 7) - %tile22_8 = AIE.tile(22, 8) + %tile22_5 = aie.tile(22, 5) + %tile22_6 = aie.tile(22, 6) + %tile22_7 = aie.tile(22, 7) + %tile22_8 = aie.tile(22, 8) //---col 2---*- - %tile23_5 = AIE.tile(23, 5) - %tile23_6 = AIE.tile(23, 6) - %tile23_7 = AIE.tile(23, 7) - %tile23_8 = AIE.tile(23, 8) + %tile23_5 = aie.tile(23, 5) + %tile23_6 = aie.tile(23, 6) + %tile23_7 = aie.tile(23, 7) + %tile23_8 = aie.tile(23, 8) //---Generating B-block 16---*- //---col 0---*- - %tile24_1 = AIE.tile(24, 1) - %tile24_2 = AIE.tile(24, 2) - %tile24_3 = AIE.tile(24, 3) - %tile24_4 = AIE.tile(24, 4) + %tile24_1 = aie.tile(24, 1) + %tile24_2 = aie.tile(24, 2) + %tile24_3 = aie.tile(24, 3) + %tile24_4 = aie.tile(24, 4) //---col 1---*- - %tile25_1 = AIE.tile(25, 1) - %tile25_2 = AIE.tile(25, 2) - %tile25_3 = AIE.tile(25, 3) - %tile25_4 = AIE.tile(25, 4) + %tile25_1 = aie.tile(25, 1) + %tile25_2 = aie.tile(25, 2) + %tile25_3 = aie.tile(25, 3) + %tile25_4 = aie.tile(25, 4) //---col 2---*- - %tile26_1 = AIE.tile(26, 1) - %tile26_2 = AIE.tile(26, 2) - %tile26_3 = AIE.tile(26, 3) - %tile26_4 = AIE.tile(26, 4) + %tile26_1 = aie.tile(26, 1) + %tile26_2 = aie.tile(26, 2) + %tile26_3 = aie.tile(26, 3) + %tile26_4 = aie.tile(26, 4) //---Generating B-block 17---*- //---col 0---*- - %tile24_5 = AIE.tile(24, 5) - %tile24_6 = AIE.tile(24, 6) - %tile24_7 = AIE.tile(24, 7) - %tile24_8 = AIE.tile(24, 8) + %tile24_5 = aie.tile(24, 5) + %tile24_6 = aie.tile(24, 6) + %tile24_7 = aie.tile(24, 7) + %tile24_8 = aie.tile(24, 8) //---col 1---*- - %tile25_5 = AIE.tile(25, 5) - %tile25_6 = AIE.tile(25, 6) - %tile25_7 = AIE.tile(25, 7) - %tile25_8 = AIE.tile(25, 8) + %tile25_5 = aie.tile(25, 5) + %tile25_6 = aie.tile(25, 6) + %tile25_7 = aie.tile(25, 7) + %tile25_8 = aie.tile(25, 8) //---col 2---*- - %tile26_5 = AIE.tile(26, 5) - %tile26_6 = AIE.tile(26, 6) - %tile26_7 = AIE.tile(26, 7) - %tile26_8 = AIE.tile(26, 8) + %tile26_5 = aie.tile(26, 5) + %tile26_6 = aie.tile(26, 6) + %tile26_7 = aie.tile(26, 7) + %tile26_8 = aie.tile(26, 8) //---Generating B-block 18---*- //---col 0---*- - %tile27_1 = AIE.tile(27, 1) - %tile27_2 = AIE.tile(27, 2) - %tile27_3 = AIE.tile(27, 3) - %tile27_4 = AIE.tile(27, 4) + %tile27_1 = aie.tile(27, 1) + %tile27_2 = aie.tile(27, 2) + %tile27_3 = aie.tile(27, 3) + %tile27_4 = aie.tile(27, 4) //---col 1---*- - %tile28_1 = AIE.tile(28, 1) - %tile28_2 = AIE.tile(28, 2) - %tile28_3 = AIE.tile(28, 3) - %tile28_4 = AIE.tile(28, 4) + %tile28_1 = aie.tile(28, 1) + %tile28_2 = aie.tile(28, 2) + %tile28_3 = aie.tile(28, 3) + %tile28_4 = aie.tile(28, 4) //---col 2---*- - %tile29_1 = AIE.tile(29, 1) - %tile29_2 = AIE.tile(29, 2) - %tile29_3 = AIE.tile(29, 3) - %tile29_4 = AIE.tile(29, 4) + %tile29_1 = aie.tile(29, 1) + %tile29_2 = aie.tile(29, 2) + %tile29_3 = aie.tile(29, 3) + %tile29_4 = aie.tile(29, 4) //---Generating B-block 19---*- //---col 0---*- - %tile27_5 = AIE.tile(27, 5) - %tile27_6 = AIE.tile(27, 6) - %tile27_7 = AIE.tile(27, 7) - %tile27_8 = AIE.tile(27, 8) + %tile27_5 = aie.tile(27, 5) + %tile27_6 = aie.tile(27, 6) + %tile27_7 = aie.tile(27, 7) + %tile27_8 = aie.tile(27, 8) //---col 1---*- - %tile28_5 = AIE.tile(28, 5) - %tile28_6 = AIE.tile(28, 6) - %tile28_7 = AIE.tile(28, 7) - %tile28_8 = AIE.tile(28, 8) + %tile28_5 = aie.tile(28, 5) + %tile28_6 = aie.tile(28, 6) + %tile28_7 = aie.tile(28, 7) + %tile28_8 = aie.tile(28, 8) //---col 2---*- - %tile29_5 = AIE.tile(29, 5) - %tile29_6 = AIE.tile(29, 6) - %tile29_7 = AIE.tile(29, 7) - %tile29_8 = AIE.tile(29, 8) + %tile29_5 = aie.tile(29, 5) + %tile29_6 = aie.tile(29, 6) + %tile29_7 = aie.tile(29, 7) + %tile29_8 = aie.tile(29, 8) //---Generating B-block 20---*- //---col 0---*- - %tile30_1 = AIE.tile(30, 1) - %tile30_2 = AIE.tile(30, 2) - %tile30_3 = AIE.tile(30, 3) - %tile30_4 = AIE.tile(30, 4) + %tile30_1 = aie.tile(30, 1) + %tile30_2 = aie.tile(30, 2) + %tile30_3 = aie.tile(30, 3) + %tile30_4 = aie.tile(30, 4) //---col 1---*- - %tile31_1 = AIE.tile(31, 1) - %tile31_2 = AIE.tile(31, 2) - %tile31_3 = AIE.tile(31, 3) - %tile31_4 = AIE.tile(31, 4) + %tile31_1 = aie.tile(31, 1) + %tile31_2 = aie.tile(31, 2) + %tile31_3 = aie.tile(31, 3) + %tile31_4 = aie.tile(31, 4) //---col 2---*- - %tile32_1 = AIE.tile(32, 1) - %tile32_2 = AIE.tile(32, 2) - %tile32_3 = AIE.tile(32, 3) - %tile32_4 = AIE.tile(32, 4) + %tile32_1 = aie.tile(32, 1) + %tile32_2 = aie.tile(32, 2) + %tile32_3 = aie.tile(32, 3) + %tile32_4 = aie.tile(32, 4) //---Generating B-block 21---*- //---col 0---*- - %tile30_5 = AIE.tile(30, 5) - %tile30_6 = AIE.tile(30, 6) - %tile30_7 = AIE.tile(30, 7) - %tile30_8 = AIE.tile(30, 8) + %tile30_5 = aie.tile(30, 5) + %tile30_6 = aie.tile(30, 6) + %tile30_7 = aie.tile(30, 7) + %tile30_8 = aie.tile(30, 8) //---col 1---*- - %tile31_5 = AIE.tile(31, 5) - %tile31_6 = AIE.tile(31, 6) - %tile31_7 = AIE.tile(31, 7) - %tile31_8 = AIE.tile(31, 8) + %tile31_5 = aie.tile(31, 5) + %tile31_6 = aie.tile(31, 6) + %tile31_7 = aie.tile(31, 7) + %tile31_8 = aie.tile(31, 8) //---col 2---*- - %tile32_5 = AIE.tile(32, 5) - %tile32_6 = AIE.tile(32, 6) - %tile32_7 = AIE.tile(32, 7) - %tile32_8 = AIE.tile(32, 8) + %tile32_5 = aie.tile(32, 5) + %tile32_6 = aie.tile(32, 6) + %tile32_7 = aie.tile(32, 7) + %tile32_8 = aie.tile(32, 8) //---Generating B-block 22---*- //---col 0---*- - %tile33_1 = AIE.tile(33, 1) - %tile33_2 = AIE.tile(33, 2) - %tile33_3 = AIE.tile(33, 3) - %tile33_4 = AIE.tile(33, 4) + %tile33_1 = aie.tile(33, 1) + %tile33_2 = aie.tile(33, 2) + %tile33_3 = aie.tile(33, 3) + %tile33_4 = aie.tile(33, 4) //---col 1---*- - %tile34_1 = AIE.tile(34, 1) - %tile34_2 = AIE.tile(34, 2) - %tile34_3 = AIE.tile(34, 3) - %tile34_4 = AIE.tile(34, 4) + %tile34_1 = aie.tile(34, 1) + %tile34_2 = aie.tile(34, 2) + %tile34_3 = aie.tile(34, 3) + %tile34_4 = aie.tile(34, 4) //---col 2---*- - %tile35_1 = AIE.tile(35, 1) - %tile35_2 = AIE.tile(35, 2) - %tile35_3 = AIE.tile(35, 3) - %tile35_4 = AIE.tile(35, 4) + %tile35_1 = aie.tile(35, 1) + %tile35_2 = aie.tile(35, 2) + %tile35_3 = aie.tile(35, 3) + %tile35_4 = aie.tile(35, 4) //---Generating B-block 23---*- //---col 0---*- - %tile33_5 = AIE.tile(33, 5) - %tile33_6 = AIE.tile(33, 6) - %tile33_7 = AIE.tile(33, 7) - %tile33_8 = AIE.tile(33, 8) + %tile33_5 = aie.tile(33, 5) + %tile33_6 = aie.tile(33, 6) + %tile33_7 = aie.tile(33, 7) + %tile33_8 = aie.tile(33, 8) //---col 1---*- - %tile34_5 = AIE.tile(34, 5) - %tile34_6 = AIE.tile(34, 6) - %tile34_7 = AIE.tile(34, 7) - %tile34_8 = AIE.tile(34, 8) + %tile34_5 = aie.tile(34, 5) + %tile34_6 = aie.tile(34, 6) + %tile34_7 = aie.tile(34, 7) + %tile34_8 = aie.tile(34, 8) //---col 2---*- - %tile35_5 = AIE.tile(35, 5) - %tile35_6 = AIE.tile(35, 6) - %tile35_7 = AIE.tile(35, 7) - %tile35_8 = AIE.tile(35, 8) + %tile35_5 = aie.tile(35, 5) + %tile35_6 = aie.tile(35, 6) + %tile35_7 = aie.tile(35, 7) + %tile35_8 = aie.tile(35, 8) //---Generating B-block 24---*- //---col 0---*- - %tile36_1 = AIE.tile(36, 1) - %tile36_2 = AIE.tile(36, 2) - %tile36_3 = AIE.tile(36, 3) - %tile36_4 = AIE.tile(36, 4) + %tile36_1 = aie.tile(36, 1) + %tile36_2 = aie.tile(36, 2) + %tile36_3 = aie.tile(36, 3) + %tile36_4 = aie.tile(36, 4) //---col 1---*- - %tile37_1 = AIE.tile(37, 1) - %tile37_2 = AIE.tile(37, 2) - %tile37_3 = AIE.tile(37, 3) - %tile37_4 = AIE.tile(37, 4) + %tile37_1 = aie.tile(37, 1) + %tile37_2 = aie.tile(37, 2) + %tile37_3 = aie.tile(37, 3) + %tile37_4 = aie.tile(37, 4) //---col 2---*- - %tile38_1 = AIE.tile(38, 1) - %tile38_2 = AIE.tile(38, 2) - %tile38_3 = AIE.tile(38, 3) - %tile38_4 = AIE.tile(38, 4) + %tile38_1 = aie.tile(38, 1) + %tile38_2 = aie.tile(38, 2) + %tile38_3 = aie.tile(38, 3) + %tile38_4 = aie.tile(38, 4) //---Generating B-block 25---*- //---col 0---*- - %tile36_5 = AIE.tile(36, 5) - %tile36_6 = AIE.tile(36, 6) - %tile36_7 = AIE.tile(36, 7) - %tile36_8 = AIE.tile(36, 8) + %tile36_5 = aie.tile(36, 5) + %tile36_6 = aie.tile(36, 6) + %tile36_7 = aie.tile(36, 7) + %tile36_8 = aie.tile(36, 8) //---col 1---*- - %tile37_5 = AIE.tile(37, 5) - %tile37_6 = AIE.tile(37, 6) - %tile37_7 = AIE.tile(37, 7) - %tile37_8 = AIE.tile(37, 8) + %tile37_5 = aie.tile(37, 5) + %tile37_6 = aie.tile(37, 6) + %tile37_7 = aie.tile(37, 7) + %tile37_8 = aie.tile(37, 8) //---col 2---*- - %tile38_5 = AIE.tile(38, 5) - %tile38_6 = AIE.tile(38, 6) - %tile38_7 = AIE.tile(38, 7) - %tile38_8 = AIE.tile(38, 8) + %tile38_5 = aie.tile(38, 5) + %tile38_6 = aie.tile(38, 6) + %tile38_7 = aie.tile(38, 7) + %tile38_8 = aie.tile(38, 8) //---Generating B-block 26---*- //---col 0---*- - %tile39_1 = AIE.tile(39, 1) - %tile39_2 = AIE.tile(39, 2) - %tile39_3 = AIE.tile(39, 3) - %tile39_4 = AIE.tile(39, 4) + %tile39_1 = aie.tile(39, 1) + %tile39_2 = aie.tile(39, 2) + %tile39_3 = aie.tile(39, 3) + %tile39_4 = aie.tile(39, 4) //---col 1---*- - %tile40_1 = AIE.tile(40, 1) - %tile40_2 = AIE.tile(40, 2) - %tile40_3 = AIE.tile(40, 3) - %tile40_4 = AIE.tile(40, 4) + %tile40_1 = aie.tile(40, 1) + %tile40_2 = aie.tile(40, 2) + %tile40_3 = aie.tile(40, 3) + %tile40_4 = aie.tile(40, 4) //---col 2---*- - %tile41_1 = AIE.tile(41, 1) - %tile41_2 = AIE.tile(41, 2) - %tile41_3 = AIE.tile(41, 3) - %tile41_4 = AIE.tile(41, 4) + %tile41_1 = aie.tile(41, 1) + %tile41_2 = aie.tile(41, 2) + %tile41_3 = aie.tile(41, 3) + %tile41_4 = aie.tile(41, 4) //---Generating B-block 27---*- //---col 0---*- - %tile39_5 = AIE.tile(39, 5) - %tile39_6 = AIE.tile(39, 6) - %tile39_7 = AIE.tile(39, 7) - %tile39_8 = AIE.tile(39, 8) + %tile39_5 = aie.tile(39, 5) + %tile39_6 = aie.tile(39, 6) + %tile39_7 = aie.tile(39, 7) + %tile39_8 = aie.tile(39, 8) //---col 1---*- - %tile40_5 = AIE.tile(40, 5) - %tile40_6 = AIE.tile(40, 6) - %tile40_7 = AIE.tile(40, 7) - %tile40_8 = AIE.tile(40, 8) + %tile40_5 = aie.tile(40, 5) + %tile40_6 = aie.tile(40, 6) + %tile40_7 = aie.tile(40, 7) + %tile40_8 = aie.tile(40, 8) //---col 2---*- - %tile41_5 = AIE.tile(41, 5) - %tile41_6 = AIE.tile(41, 6) - %tile41_7 = AIE.tile(41, 7) - %tile41_8 = AIE.tile(41, 8) + %tile41_5 = aie.tile(41, 5) + %tile41_6 = aie.tile(41, 6) + %tile41_7 = aie.tile(41, 7) + %tile41_8 = aie.tile(41, 8) //---Generating B-block 28---*- //---col 0---*- - %tile42_1 = AIE.tile(42, 1) - %tile42_2 = AIE.tile(42, 2) - %tile42_3 = AIE.tile(42, 3) - %tile42_4 = AIE.tile(42, 4) + %tile42_1 = aie.tile(42, 1) + %tile42_2 = aie.tile(42, 2) + %tile42_3 = aie.tile(42, 3) + %tile42_4 = aie.tile(42, 4) //---col 1---*- - %tile43_1 = AIE.tile(43, 1) - %tile43_2 = AIE.tile(43, 2) - %tile43_3 = AIE.tile(43, 3) - %tile43_4 = AIE.tile(43, 4) + %tile43_1 = aie.tile(43, 1) + %tile43_2 = aie.tile(43, 2) + %tile43_3 = aie.tile(43, 3) + %tile43_4 = aie.tile(43, 4) //---col 2---*- - %tile44_1 = AIE.tile(44, 1) - %tile44_2 = AIE.tile(44, 2) - %tile44_3 = AIE.tile(44, 3) - %tile44_4 = AIE.tile(44, 4) + %tile44_1 = aie.tile(44, 1) + %tile44_2 = aie.tile(44, 2) + %tile44_3 = aie.tile(44, 3) + %tile44_4 = aie.tile(44, 4) //---Generating B-block 29---*- //---col 0---*- - %tile42_5 = AIE.tile(42, 5) - %tile42_6 = AIE.tile(42, 6) - %tile42_7 = AIE.tile(42, 7) - %tile42_8 = AIE.tile(42, 8) + %tile42_5 = aie.tile(42, 5) + %tile42_6 = aie.tile(42, 6) + %tile42_7 = aie.tile(42, 7) + %tile42_8 = aie.tile(42, 8) //---col 1---*- - %tile43_5 = AIE.tile(43, 5) - %tile43_6 = AIE.tile(43, 6) - %tile43_7 = AIE.tile(43, 7) - %tile43_8 = AIE.tile(43, 8) + %tile43_5 = aie.tile(43, 5) + %tile43_6 = aie.tile(43, 6) + %tile43_7 = aie.tile(43, 7) + %tile43_8 = aie.tile(43, 8) //---col 2---*- - %tile44_5 = AIE.tile(44, 5) - %tile44_6 = AIE.tile(44, 6) - %tile44_7 = AIE.tile(44, 7) - %tile44_8 = AIE.tile(44, 8) + %tile44_5 = aie.tile(44, 5) + %tile44_6 = aie.tile(44, 6) + %tile44_7 = aie.tile(44, 7) + %tile44_8 = aie.tile(44, 8) //---Generating B-block 30---*- //---col 0---*- - %tile45_1 = AIE.tile(45, 1) - %tile45_2 = AIE.tile(45, 2) - %tile45_3 = AIE.tile(45, 3) - %tile45_4 = AIE.tile(45, 4) + %tile45_1 = aie.tile(45, 1) + %tile45_2 = aie.tile(45, 2) + %tile45_3 = aie.tile(45, 3) + %tile45_4 = aie.tile(45, 4) //---col 1---*- - %tile46_1 = AIE.tile(46, 1) - %tile46_2 = AIE.tile(46, 2) - %tile46_3 = AIE.tile(46, 3) - %tile46_4 = AIE.tile(46, 4) + %tile46_1 = aie.tile(46, 1) + %tile46_2 = aie.tile(46, 2) + %tile46_3 = aie.tile(46, 3) + %tile46_4 = aie.tile(46, 4) //---col 2---*- - %tile47_1 = AIE.tile(47, 1) - %tile47_2 = AIE.tile(47, 2) - %tile47_3 = AIE.tile(47, 3) - %tile47_4 = AIE.tile(47, 4) + %tile47_1 = aie.tile(47, 1) + %tile47_2 = aie.tile(47, 2) + %tile47_3 = aie.tile(47, 3) + %tile47_4 = aie.tile(47, 4) //---Generating B-block 31---*- //---col 0---*- - %tile45_5 = AIE.tile(45, 5) - %tile45_6 = AIE.tile(45, 6) - %tile45_7 = AIE.tile(45, 7) - %tile45_8 = AIE.tile(45, 8) + %tile45_5 = aie.tile(45, 5) + %tile45_6 = aie.tile(45, 6) + %tile45_7 = aie.tile(45, 7) + %tile45_8 = aie.tile(45, 8) //---col 1---*- - %tile46_5 = AIE.tile(46, 5) - %tile46_6 = AIE.tile(46, 6) - %tile46_7 = AIE.tile(46, 7) - %tile46_8 = AIE.tile(46, 8) + %tile46_5 = aie.tile(46, 5) + %tile46_6 = aie.tile(46, 6) + %tile46_7 = aie.tile(46, 7) + %tile46_8 = aie.tile(46, 8) //---col 2---*- - %tile47_5 = AIE.tile(47, 5) - %tile47_6 = AIE.tile(47, 6) - %tile47_7 = AIE.tile(47, 7) - %tile47_8 = AIE.tile(47, 8) + %tile47_5 = aie.tile(47, 5) + %tile47_6 = aie.tile(47, 6) + %tile47_7 = aie.tile(47, 7) + %tile47_8 = aie.tile(47, 8) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) //---NOC Tile 3---*- - %tile3_0 = AIE.tile(3, 0) + %tile3_0 = aie.tile(3, 0) //---NOC Tile 6---*- - %tile6_0 = AIE.tile(6, 0) + %tile6_0 = aie.tile(6, 0) //---NOC Tile 7---*- - %tile7_0 = AIE.tile(7, 0) + %tile7_0 = aie.tile(7, 0) //---NOC Tile 10---*- - %tile10_0 = AIE.tile(10, 0) + %tile10_0 = aie.tile(10, 0) //---NOC Tile 11---*- - %tile11_0 = AIE.tile(11, 0) + %tile11_0 = aie.tile(11, 0) //---NOC Tile 18---*- - %tile18_0 = AIE.tile(18, 0) + %tile18_0 = aie.tile(18, 0) //---NOC Tile 19---*- - %tile19_0 = AIE.tile(19, 0) + %tile19_0 = aie.tile(19, 0) //---NOC Tile 26---*- - %tile26_0 = AIE.tile(26, 0) + %tile26_0 = aie.tile(26, 0) //---NOC Tile 27---*- - %tile27_0 = AIE.tile(27, 0) + %tile27_0 = aie.tile(27, 0) //---NOC Tile 34---*- - %tile34_0 = AIE.tile(34, 0) + %tile34_0 = aie.tile(34, 0) //---NOC Tile 35---*- - %tile35_0 = AIE.tile(35, 0) + %tile35_0 = aie.tile(35, 0) //---NOC Tile 42---*- - %tile42_0 = AIE.tile(42, 0) + %tile42_0 = aie.tile(42, 0) //---NOC Tile 43---*- - %tile43_0 = AIE.tile(43, 0) + %tile43_0 = aie.tile(43, 0) //---NOC Tile 46---*- - %tile46_0 = AIE.tile(46, 0) + %tile46_0 = aie.tile(46, 0) //---NOC Tile 47---*- - %tile47_0 = AIE.tile(47, 0) + %tile47_0 = aie.tile(47, 0) // timing locks - %lock02_14 = AIE.lock(%tile0_2, 14) { sym_name = "lock02_14" } - %lock22_14 = AIE.lock(%tile2_2, 14) { sym_name = "lock22_14" } + %lock02_14 = aie.lock(%tile0_2, 14) { sym_name = "lock02_14" } + %lock22_14 = aie.lock(%tile2_2, 14) { sym_name = "lock22_14" } // timing locks - %lock06_14 = AIE.lock(%tile0_6, 14) { sym_name = "lock06_14" } - %lock26_14 = AIE.lock(%tile2_6, 14) { sym_name = "lock26_14" } + %lock06_14 = aie.lock(%tile0_6, 14) { sym_name = "lock06_14" } + %lock26_14 = aie.lock(%tile2_6, 14) { sym_name = "lock26_14" } // timing locks - %lock32_14 = AIE.lock(%tile3_2, 14) { sym_name = "lock32_14" } - %lock52_14 = AIE.lock(%tile5_2, 14) { sym_name = "lock52_14" } + %lock32_14 = aie.lock(%tile3_2, 14) { sym_name = "lock32_14" } + %lock52_14 = aie.lock(%tile5_2, 14) { sym_name = "lock52_14" } // timing locks - %lock36_14 = AIE.lock(%tile3_6, 14) { sym_name = "lock36_14" } - %lock56_14 = AIE.lock(%tile5_6, 14) { sym_name = "lock56_14" } + %lock36_14 = aie.lock(%tile3_6, 14) { sym_name = "lock36_14" } + %lock56_14 = aie.lock(%tile5_6, 14) { sym_name = "lock56_14" } // timing locks - %lock62_14 = AIE.lock(%tile6_2, 14) { sym_name = "lock62_14" } - %lock82_14 = AIE.lock(%tile8_2, 14) { sym_name = "lock82_14" } + %lock62_14 = aie.lock(%tile6_2, 14) { sym_name = "lock62_14" } + %lock82_14 = aie.lock(%tile8_2, 14) { sym_name = "lock82_14" } // timing locks - %lock66_14 = AIE.lock(%tile6_6, 14) { sym_name = "lock66_14" } - %lock86_14 = AIE.lock(%tile8_6, 14) { sym_name = "lock86_14" } + %lock66_14 = aie.lock(%tile6_6, 14) { sym_name = "lock66_14" } + %lock86_14 = aie.lock(%tile8_6, 14) { sym_name = "lock86_14" } // timing locks - %lock92_14 = AIE.lock(%tile9_2, 14) { sym_name = "lock92_14" } - %lock112_14 = AIE.lock(%tile11_2, 14) { sym_name = "lock112_14" } + %lock92_14 = aie.lock(%tile9_2, 14) { sym_name = "lock92_14" } + %lock112_14 = aie.lock(%tile11_2, 14) { sym_name = "lock112_14" } // timing locks - %lock96_14 = AIE.lock(%tile9_6, 14) { sym_name = "lock96_14" } - %lock116_14 = AIE.lock(%tile11_6, 14) { sym_name = "lock116_14" } + %lock96_14 = aie.lock(%tile9_6, 14) { sym_name = "lock96_14" } + %lock116_14 = aie.lock(%tile11_6, 14) { sym_name = "lock116_14" } // timing locks - %lock122_14 = AIE.lock(%tile12_2, 14) { sym_name = "lock122_14" } - %lock142_14 = AIE.lock(%tile14_2, 14) { sym_name = "lock142_14" } + %lock122_14 = aie.lock(%tile12_2, 14) { sym_name = "lock122_14" } + %lock142_14 = aie.lock(%tile14_2, 14) { sym_name = "lock142_14" } // timing locks - %lock126_14 = AIE.lock(%tile12_6, 14) { sym_name = "lock126_14" } - %lock146_14 = AIE.lock(%tile14_6, 14) { sym_name = "lock146_14" } + %lock126_14 = aie.lock(%tile12_6, 14) { sym_name = "lock126_14" } + %lock146_14 = aie.lock(%tile14_6, 14) { sym_name = "lock146_14" } // timing locks - %lock152_14 = AIE.lock(%tile15_2, 14) { sym_name = "lock152_14" } - %lock172_14 = AIE.lock(%tile17_2, 14) { sym_name = "lock172_14" } + %lock152_14 = aie.lock(%tile15_2, 14) { sym_name = "lock152_14" } + %lock172_14 = aie.lock(%tile17_2, 14) { sym_name = "lock172_14" } // timing locks - %lock156_14 = AIE.lock(%tile15_6, 14) { sym_name = "lock156_14" } - %lock176_14 = AIE.lock(%tile17_6, 14) { sym_name = "lock176_14" } + %lock156_14 = aie.lock(%tile15_6, 14) { sym_name = "lock156_14" } + %lock176_14 = aie.lock(%tile17_6, 14) { sym_name = "lock176_14" } // timing locks - %lock182_14 = AIE.lock(%tile18_2, 14) { sym_name = "lock182_14" } - %lock202_14 = AIE.lock(%tile20_2, 14) { sym_name = "lock202_14" } + %lock182_14 = aie.lock(%tile18_2, 14) { sym_name = "lock182_14" } + %lock202_14 = aie.lock(%tile20_2, 14) { sym_name = "lock202_14" } // timing locks - %lock186_14 = AIE.lock(%tile18_6, 14) { sym_name = "lock186_14" } - %lock206_14 = AIE.lock(%tile20_6, 14) { sym_name = "lock206_14" } + %lock186_14 = aie.lock(%tile18_6, 14) { sym_name = "lock186_14" } + %lock206_14 = aie.lock(%tile20_6, 14) { sym_name = "lock206_14" } // timing locks - %lock212_14 = AIE.lock(%tile21_2, 14) { sym_name = "lock212_14" } - %lock232_14 = AIE.lock(%tile23_2, 14) { sym_name = "lock232_14" } + %lock212_14 = aie.lock(%tile21_2, 14) { sym_name = "lock212_14" } + %lock232_14 = aie.lock(%tile23_2, 14) { sym_name = "lock232_14" } // timing locks - %lock216_14 = AIE.lock(%tile21_6, 14) { sym_name = "lock216_14" } - %lock236_14 = AIE.lock(%tile23_6, 14) { sym_name = "lock236_14" } + %lock216_14 = aie.lock(%tile21_6, 14) { sym_name = "lock216_14" } + %lock236_14 = aie.lock(%tile23_6, 14) { sym_name = "lock236_14" } // timing locks - %lock242_14 = AIE.lock(%tile24_2, 14) { sym_name = "lock242_14" } - %lock262_14 = AIE.lock(%tile26_2, 14) { sym_name = "lock262_14" } + %lock242_14 = aie.lock(%tile24_2, 14) { sym_name = "lock242_14" } + %lock262_14 = aie.lock(%tile26_2, 14) { sym_name = "lock262_14" } // timing locks - %lock246_14 = AIE.lock(%tile24_6, 14) { sym_name = "lock246_14" } - %lock266_14 = AIE.lock(%tile26_6, 14) { sym_name = "lock266_14" } + %lock246_14 = aie.lock(%tile24_6, 14) { sym_name = "lock246_14" } + %lock266_14 = aie.lock(%tile26_6, 14) { sym_name = "lock266_14" } // timing locks - %lock272_14 = AIE.lock(%tile27_2, 14) { sym_name = "lock272_14" } - %lock292_14 = AIE.lock(%tile29_2, 14) { sym_name = "lock292_14" } + %lock272_14 = aie.lock(%tile27_2, 14) { sym_name = "lock272_14" } + %lock292_14 = aie.lock(%tile29_2, 14) { sym_name = "lock292_14" } // timing locks - %lock276_14 = AIE.lock(%tile27_6, 14) { sym_name = "lock276_14" } - %lock296_14 = AIE.lock(%tile29_6, 14) { sym_name = "lock296_14" } + %lock276_14 = aie.lock(%tile27_6, 14) { sym_name = "lock276_14" } + %lock296_14 = aie.lock(%tile29_6, 14) { sym_name = "lock296_14" } // timing locks - %lock302_14 = AIE.lock(%tile30_2, 14) { sym_name = "lock302_14" } - %lock322_14 = AIE.lock(%tile32_2, 14) { sym_name = "lock322_14" } + %lock302_14 = aie.lock(%tile30_2, 14) { sym_name = "lock302_14" } + %lock322_14 = aie.lock(%tile32_2, 14) { sym_name = "lock322_14" } // timing locks - %lock306_14 = AIE.lock(%tile30_6, 14) { sym_name = "lock306_14" } - %lock326_14 = AIE.lock(%tile32_6, 14) { sym_name = "lock326_14" } + %lock306_14 = aie.lock(%tile30_6, 14) { sym_name = "lock306_14" } + %lock326_14 = aie.lock(%tile32_6, 14) { sym_name = "lock326_14" } // timing locks - %lock332_14 = AIE.lock(%tile33_2, 14) { sym_name = "lock332_14" } - %lock352_14 = AIE.lock(%tile35_2, 14) { sym_name = "lock352_14" } + %lock332_14 = aie.lock(%tile33_2, 14) { sym_name = "lock332_14" } + %lock352_14 = aie.lock(%tile35_2, 14) { sym_name = "lock352_14" } // timing locks - %lock336_14 = AIE.lock(%tile33_6, 14) { sym_name = "lock336_14" } - %lock356_14 = AIE.lock(%tile35_6, 14) { sym_name = "lock356_14" } + %lock336_14 = aie.lock(%tile33_6, 14) { sym_name = "lock336_14" } + %lock356_14 = aie.lock(%tile35_6, 14) { sym_name = "lock356_14" } // timing locks - %lock362_14 = AIE.lock(%tile36_2, 14) { sym_name = "lock362_14" } - %lock382_14 = AIE.lock(%tile38_2, 14) { sym_name = "lock382_14" } + %lock362_14 = aie.lock(%tile36_2, 14) { sym_name = "lock362_14" } + %lock382_14 = aie.lock(%tile38_2, 14) { sym_name = "lock382_14" } // timing locks - %lock366_14 = AIE.lock(%tile36_6, 14) { sym_name = "lock366_14" } - %lock386_14 = AIE.lock(%tile38_6, 14) { sym_name = "lock386_14" } + %lock366_14 = aie.lock(%tile36_6, 14) { sym_name = "lock366_14" } + %lock386_14 = aie.lock(%tile38_6, 14) { sym_name = "lock386_14" } // timing locks - %lock392_14 = AIE.lock(%tile39_2, 14) { sym_name = "lock392_14" } - %lock412_14 = AIE.lock(%tile41_2, 14) { sym_name = "lock412_14" } + %lock392_14 = aie.lock(%tile39_2, 14) { sym_name = "lock392_14" } + %lock412_14 = aie.lock(%tile41_2, 14) { sym_name = "lock412_14" } // timing locks - %lock396_14 = AIE.lock(%tile39_6, 14) { sym_name = "lock396_14" } - %lock416_14 = AIE.lock(%tile41_6, 14) { sym_name = "lock416_14" } + %lock396_14 = aie.lock(%tile39_6, 14) { sym_name = "lock396_14" } + %lock416_14 = aie.lock(%tile41_6, 14) { sym_name = "lock416_14" } // timing locks - %lock422_14 = AIE.lock(%tile42_2, 14) { sym_name = "lock422_14" } - %lock442_14 = AIE.lock(%tile44_2, 14) { sym_name = "lock442_14" } + %lock422_14 = aie.lock(%tile42_2, 14) { sym_name = "lock422_14" } + %lock442_14 = aie.lock(%tile44_2, 14) { sym_name = "lock442_14" } // timing locks - %lock426_14 = AIE.lock(%tile42_6, 14) { sym_name = "lock426_14" } - %lock446_14 = AIE.lock(%tile44_6, 14) { sym_name = "lock446_14" } + %lock426_14 = aie.lock(%tile42_6, 14) { sym_name = "lock426_14" } + %lock446_14 = aie.lock(%tile44_6, 14) { sym_name = "lock446_14" } // timing locks - %lock452_14 = AIE.lock(%tile45_2, 14) { sym_name = "lock452_14" } - %lock472_14 = AIE.lock(%tile47_2, 14) { sym_name = "lock472_14" } + %lock452_14 = aie.lock(%tile45_2, 14) { sym_name = "lock452_14" } + %lock472_14 = aie.lock(%tile47_2, 14) { sym_name = "lock472_14" } // timing locks - %lock456_14 = AIE.lock(%tile45_6, 14) { sym_name = "lock456_14" } - %lock476_14 = AIE.lock(%tile47_6, 14) { sym_name = "lock476_14" } + %lock456_14 = aie.lock(%tile45_6, 14) { sym_name = "lock456_14" } + %lock476_14 = aie.lock(%tile47_6, 14) { sym_name = "lock476_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B1 buffers---*- - %block_1_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_1_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_1_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_1_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_1_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_1_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_1_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B2 buffers---*- - %block_2_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_2_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_2_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_2_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_2_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_2_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_2_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B3 buffers---*- - %block_3_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_3_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_3_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_3_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_3_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_3_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_3_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B4 buffers---*- - %block_4_buf_in_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile6_1,%tile7_1,%tile6_2,%tile7_2,%tile6_3,%tile7_3,%tile6_4,%tile7_4},9) { sym_name = "block_4_buf_in_shim_6" } : !AIE.objectfifo> //B block input - %block_4_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_1,{%tile7_1},5){ sym_name ="block_4_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_1,{%tile8_1},6) { sym_name ="block_4_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_1,{%tile8_2},2) { sym_name ="block_4_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_4_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_2,{%tile7_2},5){ sym_name ="block_4_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_2,{%tile8_2},6) { sym_name ="block_4_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_out_shim_6= AIE.objectfifo.createObjectFifo(%tile8_2,{%tile6_0},5){ sym_name ="block_4_buf_out_shim_6"} : !AIE.objectfifo> //B block output - %block_4_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_3,{%tile7_3},5){ sym_name ="block_4_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_3,{%tile8_3},6) { sym_name ="block_4_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_3,{%tile8_2},2) { sym_name ="block_4_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_4_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_4,{%tile7_4},5){ sym_name ="block_4_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_4,{%tile8_4},6) { sym_name ="block_4_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_4,{%tile8_2},2) { sym_name ="block_4_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_4_buf_in_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile6_1,%tile7_1,%tile6_2,%tile7_2,%tile6_3,%tile7_3,%tile6_4,%tile7_4},9) { sym_name = "block_4_buf_in_shim_6" } : !aie.objectfifo> //B block input + %block_4_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile6_1,{%tile7_1},5){ sym_name ="block_4_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_1,{%tile8_1},6) { sym_name ="block_4_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile8_1,{%tile8_2},2) { sym_name ="block_4_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_4_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile6_2,{%tile7_2},5){ sym_name ="block_4_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_2,{%tile8_2},6) { sym_name ="block_4_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_4_buf_out_shim_6= aie.objectfifo.createObjectFifo(%tile8_2,{%tile6_0},5){ sym_name ="block_4_buf_out_shim_6"} : !aie.objectfifo> //B block output + %block_4_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile6_3,{%tile7_3},5){ sym_name ="block_4_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_3,{%tile8_3},6) { sym_name ="block_4_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile8_3,{%tile8_2},2) { sym_name ="block_4_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_4_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile6_4,{%tile7_4},5){ sym_name ="block_4_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_4,{%tile8_4},6) { sym_name ="block_4_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile8_4,{%tile8_2},2) { sym_name ="block_4_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B5 buffers---*- - %block_5_buf_in_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile6_5,%tile7_5,%tile6_6,%tile7_6,%tile6_7,%tile7_7,%tile6_8,%tile7_8},9) { sym_name = "block_5_buf_in_shim_6" } : !AIE.objectfifo> //B block input - %block_5_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_5,{%tile7_5},5){ sym_name ="block_5_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_5,{%tile8_5},6) { sym_name ="block_5_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_5,{%tile8_6},2) { sym_name ="block_5_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_5_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_6,{%tile7_6},5){ sym_name ="block_5_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_6,{%tile8_6},6) { sym_name ="block_5_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_out_shim_6= AIE.objectfifo.createObjectFifo(%tile8_6,{%tile6_0},5){ sym_name ="block_5_buf_out_shim_6"} : !AIE.objectfifo> //B block output - %block_5_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_7,{%tile7_7},5){ sym_name ="block_5_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_7,{%tile8_7},6) { sym_name ="block_5_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_7,{%tile8_6},2) { sym_name ="block_5_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_5_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_8,{%tile7_8},5){ sym_name ="block_5_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_8,{%tile8_8},6) { sym_name ="block_5_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_8,{%tile8_6},2) { sym_name ="block_5_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_5_buf_in_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile6_5,%tile7_5,%tile6_6,%tile7_6,%tile6_7,%tile7_7,%tile6_8,%tile7_8},9) { sym_name = "block_5_buf_in_shim_6" } : !aie.objectfifo> //B block input + %block_5_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile6_5,{%tile7_5},5){ sym_name ="block_5_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_5,{%tile8_5},6) { sym_name ="block_5_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile8_5,{%tile8_6},2) { sym_name ="block_5_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_5_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile6_6,{%tile7_6},5){ sym_name ="block_5_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_6,{%tile8_6},6) { sym_name ="block_5_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_5_buf_out_shim_6= aie.objectfifo.createObjectFifo(%tile8_6,{%tile6_0},5){ sym_name ="block_5_buf_out_shim_6"} : !aie.objectfifo> //B block output + %block_5_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile6_7,{%tile7_7},5){ sym_name ="block_5_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_7,{%tile8_7},6) { sym_name ="block_5_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile8_7,{%tile8_6},2) { sym_name ="block_5_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_5_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile6_8,{%tile7_8},5){ sym_name ="block_5_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_8,{%tile8_8},6) { sym_name ="block_5_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile8_8,{%tile8_6},2) { sym_name ="block_5_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B6 buffers---*- - %block_6_buf_in_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile9_1,%tile10_1,%tile9_2,%tile10_2,%tile9_3,%tile10_3,%tile9_4,%tile10_4},9) { sym_name = "block_6_buf_in_shim_7" } : !AIE.objectfifo> //B block input - %block_6_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_1,{%tile10_1},5){ sym_name ="block_6_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_1,{%tile11_1},6) { sym_name ="block_6_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_1,{%tile11_2},2) { sym_name ="block_6_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_6_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_2,{%tile10_2},5){ sym_name ="block_6_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_2,{%tile11_2},6) { sym_name ="block_6_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_out_shim_7= AIE.objectfifo.createObjectFifo(%tile11_2,{%tile7_0},5){ sym_name ="block_6_buf_out_shim_7"} : !AIE.objectfifo> //B block output - %block_6_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_3,{%tile10_3},5){ sym_name ="block_6_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_3,{%tile11_3},6) { sym_name ="block_6_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_3,{%tile11_2},2) { sym_name ="block_6_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_6_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_4,{%tile10_4},5){ sym_name ="block_6_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_4,{%tile11_4},6) { sym_name ="block_6_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_4,{%tile11_2},2) { sym_name ="block_6_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_6_buf_in_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile9_1,%tile10_1,%tile9_2,%tile10_2,%tile9_3,%tile10_3,%tile9_4,%tile10_4},9) { sym_name = "block_6_buf_in_shim_7" } : !aie.objectfifo> //B block input + %block_6_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile9_1,{%tile10_1},5){ sym_name ="block_6_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_1,{%tile11_1},6) { sym_name ="block_6_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile11_1,{%tile11_2},2) { sym_name ="block_6_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_6_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile9_2,{%tile10_2},5){ sym_name ="block_6_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_2,{%tile11_2},6) { sym_name ="block_6_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_6_buf_out_shim_7= aie.objectfifo.createObjectFifo(%tile11_2,{%tile7_0},5){ sym_name ="block_6_buf_out_shim_7"} : !aie.objectfifo> //B block output + %block_6_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile9_3,{%tile10_3},5){ sym_name ="block_6_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_3,{%tile11_3},6) { sym_name ="block_6_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile11_3,{%tile11_2},2) { sym_name ="block_6_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_6_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile9_4,{%tile10_4},5){ sym_name ="block_6_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_4,{%tile11_4},6) { sym_name ="block_6_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile11_4,{%tile11_2},2) { sym_name ="block_6_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B7 buffers---*- - %block_7_buf_in_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile9_5,%tile10_5,%tile9_6,%tile10_6,%tile9_7,%tile10_7,%tile9_8,%tile10_8},9) { sym_name = "block_7_buf_in_shim_7" } : !AIE.objectfifo> //B block input - %block_7_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_5,{%tile10_5},5){ sym_name ="block_7_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_5,{%tile11_5},6) { sym_name ="block_7_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_5,{%tile11_6},2) { sym_name ="block_7_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_7_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_6,{%tile10_6},5){ sym_name ="block_7_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_6,{%tile11_6},6) { sym_name ="block_7_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_out_shim_7= AIE.objectfifo.createObjectFifo(%tile11_6,{%tile7_0},5){ sym_name ="block_7_buf_out_shim_7"} : !AIE.objectfifo> //B block output - %block_7_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_7,{%tile10_7},5){ sym_name ="block_7_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_7,{%tile11_7},6) { sym_name ="block_7_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_7,{%tile11_6},2) { sym_name ="block_7_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_7_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_8,{%tile10_8},5){ sym_name ="block_7_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_8,{%tile11_8},6) { sym_name ="block_7_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_8,{%tile11_6},2) { sym_name ="block_7_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_7_buf_in_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile9_5,%tile10_5,%tile9_6,%tile10_6,%tile9_7,%tile10_7,%tile9_8,%tile10_8},9) { sym_name = "block_7_buf_in_shim_7" } : !aie.objectfifo> //B block input + %block_7_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile9_5,{%tile10_5},5){ sym_name ="block_7_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_5,{%tile11_5},6) { sym_name ="block_7_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile11_5,{%tile11_6},2) { sym_name ="block_7_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_7_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile9_6,{%tile10_6},5){ sym_name ="block_7_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_6,{%tile11_6},6) { sym_name ="block_7_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_7_buf_out_shim_7= aie.objectfifo.createObjectFifo(%tile11_6,{%tile7_0},5){ sym_name ="block_7_buf_out_shim_7"} : !aie.objectfifo> //B block output + %block_7_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile9_7,{%tile10_7},5){ sym_name ="block_7_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_7,{%tile11_7},6) { sym_name ="block_7_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile11_7,{%tile11_6},2) { sym_name ="block_7_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_7_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile9_8,{%tile10_8},5){ sym_name ="block_7_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_8,{%tile11_8},6) { sym_name ="block_7_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile11_8,{%tile11_6},2) { sym_name ="block_7_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B8 buffers---*- - %block_8_buf_in_shim_10 = AIE.objectfifo.createObjectFifo(%tile10_0,{%tile12_1,%tile13_1,%tile12_2,%tile13_2,%tile12_3,%tile13_3,%tile12_4,%tile13_4},9) { sym_name = "block_8_buf_in_shim_10" } : !AIE.objectfifo> //B block input - %block_8_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_1,{%tile13_1},5){ sym_name ="block_8_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_1,{%tile14_1},6) { sym_name ="block_8_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_1,{%tile14_2},2) { sym_name ="block_8_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_8_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_2,{%tile13_2},5){ sym_name ="block_8_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_2,{%tile14_2},6) { sym_name ="block_8_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_out_shim_10= AIE.objectfifo.createObjectFifo(%tile14_2,{%tile10_0},5){ sym_name ="block_8_buf_out_shim_10"} : !AIE.objectfifo> //B block output - %block_8_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_3,{%tile13_3},5){ sym_name ="block_8_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_3,{%tile14_3},6) { sym_name ="block_8_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_3,{%tile14_2},2) { sym_name ="block_8_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_8_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_4,{%tile13_4},5){ sym_name ="block_8_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_8_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_4,{%tile14_4},6) { sym_name ="block_8_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_8_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_4,{%tile14_2},2) { sym_name ="block_8_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_8_buf_in_shim_10 = aie.objectfifo.createObjectFifo(%tile10_0,{%tile12_1,%tile13_1,%tile12_2,%tile13_2,%tile12_3,%tile13_3,%tile12_4,%tile13_4},9) { sym_name = "block_8_buf_in_shim_10" } : !aie.objectfifo> //B block input + %block_8_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile12_1,{%tile13_1},5){ sym_name ="block_8_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_1,{%tile14_1},6) { sym_name ="block_8_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_8_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile14_1,{%tile14_2},2) { sym_name ="block_8_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_8_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile12_2,{%tile13_2},5){ sym_name ="block_8_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_2,{%tile14_2},6) { sym_name ="block_8_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_8_buf_out_shim_10= aie.objectfifo.createObjectFifo(%tile14_2,{%tile10_0},5){ sym_name ="block_8_buf_out_shim_10"} : !aie.objectfifo> //B block output + %block_8_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile12_3,{%tile13_3},5){ sym_name ="block_8_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_3,{%tile14_3},6) { sym_name ="block_8_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_8_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile14_3,{%tile14_2},2) { sym_name ="block_8_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_8_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile12_4,{%tile13_4},5){ sym_name ="block_8_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_8_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_4,{%tile14_4},6) { sym_name ="block_8_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_8_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile14_4,{%tile14_2},2) { sym_name ="block_8_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B9 buffers---*- - %block_9_buf_in_shim_10 = AIE.objectfifo.createObjectFifo(%tile10_0,{%tile12_5,%tile13_5,%tile12_6,%tile13_6,%tile12_7,%tile13_7,%tile12_8,%tile13_8},9) { sym_name = "block_9_buf_in_shim_10" } : !AIE.objectfifo> //B block input - %block_9_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_5,{%tile13_5},5){ sym_name ="block_9_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_5,{%tile14_5},6) { sym_name ="block_9_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_5,{%tile14_6},2) { sym_name ="block_9_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_9_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_6,{%tile13_6},5){ sym_name ="block_9_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_6,{%tile14_6},6) { sym_name ="block_9_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_out_shim_10= AIE.objectfifo.createObjectFifo(%tile14_6,{%tile10_0},5){ sym_name ="block_9_buf_out_shim_10"} : !AIE.objectfifo> //B block output - %block_9_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_7,{%tile13_7},5){ sym_name ="block_9_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_7,{%tile14_7},6) { sym_name ="block_9_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_7,{%tile14_6},2) { sym_name ="block_9_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_9_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile12_8,{%tile13_8},5){ sym_name ="block_9_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_9_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile13_8,{%tile14_8},6) { sym_name ="block_9_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_9_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile14_8,{%tile14_6},2) { sym_name ="block_9_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_9_buf_in_shim_10 = aie.objectfifo.createObjectFifo(%tile10_0,{%tile12_5,%tile13_5,%tile12_6,%tile13_6,%tile12_7,%tile13_7,%tile12_8,%tile13_8},9) { sym_name = "block_9_buf_in_shim_10" } : !aie.objectfifo> //B block input + %block_9_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile12_5,{%tile13_5},5){ sym_name ="block_9_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_5,{%tile14_5},6) { sym_name ="block_9_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_9_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile14_5,{%tile14_6},2) { sym_name ="block_9_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_9_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile12_6,{%tile13_6},5){ sym_name ="block_9_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_6,{%tile14_6},6) { sym_name ="block_9_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_9_buf_out_shim_10= aie.objectfifo.createObjectFifo(%tile14_6,{%tile10_0},5){ sym_name ="block_9_buf_out_shim_10"} : !aie.objectfifo> //B block output + %block_9_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile12_7,{%tile13_7},5){ sym_name ="block_9_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_7,{%tile14_7},6) { sym_name ="block_9_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_9_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile14_7,{%tile14_6},2) { sym_name ="block_9_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_9_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile12_8,{%tile13_8},5){ sym_name ="block_9_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_9_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile13_8,{%tile14_8},6) { sym_name ="block_9_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_9_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile14_8,{%tile14_6},2) { sym_name ="block_9_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B10 buffers---*- - %block_10_buf_in_shim_11 = AIE.objectfifo.createObjectFifo(%tile11_0,{%tile15_1,%tile16_1,%tile15_2,%tile16_2,%tile15_3,%tile16_3,%tile15_4,%tile16_4},9) { sym_name = "block_10_buf_in_shim_11" } : !AIE.objectfifo> //B block input - %block_10_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_1,{%tile16_1},5){ sym_name ="block_10_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_1,{%tile17_1},6) { sym_name ="block_10_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_1,{%tile17_2},2) { sym_name ="block_10_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_10_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_2,{%tile16_2},5){ sym_name ="block_10_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_2,{%tile17_2},6) { sym_name ="block_10_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_out_shim_11= AIE.objectfifo.createObjectFifo(%tile17_2,{%tile11_0},5){ sym_name ="block_10_buf_out_shim_11"} : !AIE.objectfifo> //B block output - %block_10_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_3,{%tile16_3},5){ sym_name ="block_10_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_3,{%tile17_3},6) { sym_name ="block_10_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_3,{%tile17_2},2) { sym_name ="block_10_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_10_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_4,{%tile16_4},5){ sym_name ="block_10_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_10_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_4,{%tile17_4},6) { sym_name ="block_10_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_10_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_4,{%tile17_2},2) { sym_name ="block_10_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_10_buf_in_shim_11 = aie.objectfifo.createObjectFifo(%tile11_0,{%tile15_1,%tile16_1,%tile15_2,%tile16_2,%tile15_3,%tile16_3,%tile15_4,%tile16_4},9) { sym_name = "block_10_buf_in_shim_11" } : !aie.objectfifo> //B block input + %block_10_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile15_1,{%tile16_1},5){ sym_name ="block_10_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_1,{%tile17_1},6) { sym_name ="block_10_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_10_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile17_1,{%tile17_2},2) { sym_name ="block_10_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_10_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile15_2,{%tile16_2},5){ sym_name ="block_10_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_2,{%tile17_2},6) { sym_name ="block_10_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_10_buf_out_shim_11= aie.objectfifo.createObjectFifo(%tile17_2,{%tile11_0},5){ sym_name ="block_10_buf_out_shim_11"} : !aie.objectfifo> //B block output + %block_10_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile15_3,{%tile16_3},5){ sym_name ="block_10_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_3,{%tile17_3},6) { sym_name ="block_10_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_10_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile17_3,{%tile17_2},2) { sym_name ="block_10_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_10_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile15_4,{%tile16_4},5){ sym_name ="block_10_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_10_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_4,{%tile17_4},6) { sym_name ="block_10_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_10_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile17_4,{%tile17_2},2) { sym_name ="block_10_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B11 buffers---*- - %block_11_buf_in_shim_11 = AIE.objectfifo.createObjectFifo(%tile11_0,{%tile15_5,%tile16_5,%tile15_6,%tile16_6,%tile15_7,%tile16_7,%tile15_8,%tile16_8},9) { sym_name = "block_11_buf_in_shim_11" } : !AIE.objectfifo> //B block input - %block_11_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_5,{%tile16_5},5){ sym_name ="block_11_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_5,{%tile17_5},6) { sym_name ="block_11_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_5,{%tile17_6},2) { sym_name ="block_11_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_11_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_6,{%tile16_6},5){ sym_name ="block_11_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_6,{%tile17_6},6) { sym_name ="block_11_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_out_shim_11= AIE.objectfifo.createObjectFifo(%tile17_6,{%tile11_0},5){ sym_name ="block_11_buf_out_shim_11"} : !AIE.objectfifo> //B block output - %block_11_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_7,{%tile16_7},5){ sym_name ="block_11_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_7,{%tile17_7},6) { sym_name ="block_11_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_7,{%tile17_6},2) { sym_name ="block_11_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_11_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile15_8,{%tile16_8},5){ sym_name ="block_11_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_11_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile16_8,{%tile17_8},6) { sym_name ="block_11_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_11_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile17_8,{%tile17_6},2) { sym_name ="block_11_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_11_buf_in_shim_11 = aie.objectfifo.createObjectFifo(%tile11_0,{%tile15_5,%tile16_5,%tile15_6,%tile16_6,%tile15_7,%tile16_7,%tile15_8,%tile16_8},9) { sym_name = "block_11_buf_in_shim_11" } : !aie.objectfifo> //B block input + %block_11_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile15_5,{%tile16_5},5){ sym_name ="block_11_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_5,{%tile17_5},6) { sym_name ="block_11_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_11_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile17_5,{%tile17_6},2) { sym_name ="block_11_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_11_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile15_6,{%tile16_6},5){ sym_name ="block_11_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_6,{%tile17_6},6) { sym_name ="block_11_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_11_buf_out_shim_11= aie.objectfifo.createObjectFifo(%tile17_6,{%tile11_0},5){ sym_name ="block_11_buf_out_shim_11"} : !aie.objectfifo> //B block output + %block_11_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile15_7,{%tile16_7},5){ sym_name ="block_11_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_7,{%tile17_7},6) { sym_name ="block_11_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_11_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile17_7,{%tile17_6},2) { sym_name ="block_11_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_11_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile15_8,{%tile16_8},5){ sym_name ="block_11_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_11_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile16_8,{%tile17_8},6) { sym_name ="block_11_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_11_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile17_8,{%tile17_6},2) { sym_name ="block_11_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B12 buffers---*- - %block_12_buf_in_shim_18 = AIE.objectfifo.createObjectFifo(%tile18_0,{%tile18_1,%tile19_1,%tile18_2,%tile19_2,%tile18_3,%tile19_3,%tile18_4,%tile19_4},9) { sym_name = "block_12_buf_in_shim_18" } : !AIE.objectfifo> //B block input - %block_12_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_1,{%tile19_1},5){ sym_name ="block_12_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_1,{%tile20_1},6) { sym_name ="block_12_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_1,{%tile20_2},2) { sym_name ="block_12_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_12_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_2,{%tile19_2},5){ sym_name ="block_12_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_2,{%tile20_2},6) { sym_name ="block_12_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_out_shim_18= AIE.objectfifo.createObjectFifo(%tile20_2,{%tile18_0},5){ sym_name ="block_12_buf_out_shim_18"} : !AIE.objectfifo> //B block output - %block_12_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_3,{%tile19_3},5){ sym_name ="block_12_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_3,{%tile20_3},6) { sym_name ="block_12_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_3,{%tile20_2},2) { sym_name ="block_12_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_12_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_4,{%tile19_4},5){ sym_name ="block_12_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_12_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_4,{%tile20_4},6) { sym_name ="block_12_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_12_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_4,{%tile20_2},2) { sym_name ="block_12_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_12_buf_in_shim_18 = aie.objectfifo.createObjectFifo(%tile18_0,{%tile18_1,%tile19_1,%tile18_2,%tile19_2,%tile18_3,%tile19_3,%tile18_4,%tile19_4},9) { sym_name = "block_12_buf_in_shim_18" } : !aie.objectfifo> //B block input + %block_12_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile18_1,{%tile19_1},5){ sym_name ="block_12_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_1,{%tile20_1},6) { sym_name ="block_12_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_12_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile20_1,{%tile20_2},2) { sym_name ="block_12_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_12_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile18_2,{%tile19_2},5){ sym_name ="block_12_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_2,{%tile20_2},6) { sym_name ="block_12_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_12_buf_out_shim_18= aie.objectfifo.createObjectFifo(%tile20_2,{%tile18_0},5){ sym_name ="block_12_buf_out_shim_18"} : !aie.objectfifo> //B block output + %block_12_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile18_3,{%tile19_3},5){ sym_name ="block_12_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_3,{%tile20_3},6) { sym_name ="block_12_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_12_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile20_3,{%tile20_2},2) { sym_name ="block_12_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_12_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile18_4,{%tile19_4},5){ sym_name ="block_12_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_12_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_4,{%tile20_4},6) { sym_name ="block_12_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_12_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile20_4,{%tile20_2},2) { sym_name ="block_12_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B13 buffers---*- - %block_13_buf_in_shim_18 = AIE.objectfifo.createObjectFifo(%tile18_0,{%tile18_5,%tile19_5,%tile18_6,%tile19_6,%tile18_7,%tile19_7,%tile18_8,%tile19_8},9) { sym_name = "block_13_buf_in_shim_18" } : !AIE.objectfifo> //B block input - %block_13_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_5,{%tile19_5},5){ sym_name ="block_13_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_5,{%tile20_5},6) { sym_name ="block_13_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_5,{%tile20_6},2) { sym_name ="block_13_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_13_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_6,{%tile19_6},5){ sym_name ="block_13_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_6,{%tile20_6},6) { sym_name ="block_13_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_out_shim_18= AIE.objectfifo.createObjectFifo(%tile20_6,{%tile18_0},5){ sym_name ="block_13_buf_out_shim_18"} : !AIE.objectfifo> //B block output - %block_13_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_7,{%tile19_7},5){ sym_name ="block_13_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_7,{%tile20_7},6) { sym_name ="block_13_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_7,{%tile20_6},2) { sym_name ="block_13_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_13_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile18_8,{%tile19_8},5){ sym_name ="block_13_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_13_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile19_8,{%tile20_8},6) { sym_name ="block_13_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_13_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile20_8,{%tile20_6},2) { sym_name ="block_13_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_13_buf_in_shim_18 = aie.objectfifo.createObjectFifo(%tile18_0,{%tile18_5,%tile19_5,%tile18_6,%tile19_6,%tile18_7,%tile19_7,%tile18_8,%tile19_8},9) { sym_name = "block_13_buf_in_shim_18" } : !aie.objectfifo> //B block input + %block_13_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile18_5,{%tile19_5},5){ sym_name ="block_13_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_5,{%tile20_5},6) { sym_name ="block_13_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_13_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile20_5,{%tile20_6},2) { sym_name ="block_13_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_13_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile18_6,{%tile19_6},5){ sym_name ="block_13_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_6,{%tile20_6},6) { sym_name ="block_13_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_13_buf_out_shim_18= aie.objectfifo.createObjectFifo(%tile20_6,{%tile18_0},5){ sym_name ="block_13_buf_out_shim_18"} : !aie.objectfifo> //B block output + %block_13_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile18_7,{%tile19_7},5){ sym_name ="block_13_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_7,{%tile20_7},6) { sym_name ="block_13_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_13_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile20_7,{%tile20_6},2) { sym_name ="block_13_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_13_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile18_8,{%tile19_8},5){ sym_name ="block_13_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_13_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile19_8,{%tile20_8},6) { sym_name ="block_13_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_13_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile20_8,{%tile20_6},2) { sym_name ="block_13_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B14 buffers---*- - %block_14_buf_in_shim_19 = AIE.objectfifo.createObjectFifo(%tile19_0,{%tile21_1,%tile22_1,%tile21_2,%tile22_2,%tile21_3,%tile22_3,%tile21_4,%tile22_4},9) { sym_name = "block_14_buf_in_shim_19" } : !AIE.objectfifo> //B block input - %block_14_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_1,{%tile22_1},5){ sym_name ="block_14_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_1,{%tile23_1},6) { sym_name ="block_14_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_1,{%tile23_2},2) { sym_name ="block_14_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_14_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_2,{%tile22_2},5){ sym_name ="block_14_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_2,{%tile23_2},6) { sym_name ="block_14_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_out_shim_19= AIE.objectfifo.createObjectFifo(%tile23_2,{%tile19_0},5){ sym_name ="block_14_buf_out_shim_19"} : !AIE.objectfifo> //B block output - %block_14_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_3,{%tile22_3},5){ sym_name ="block_14_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_3,{%tile23_3},6) { sym_name ="block_14_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_3,{%tile23_2},2) { sym_name ="block_14_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_14_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_4,{%tile22_4},5){ sym_name ="block_14_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_14_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_4,{%tile23_4},6) { sym_name ="block_14_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_14_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_4,{%tile23_2},2) { sym_name ="block_14_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_14_buf_in_shim_19 = aie.objectfifo.createObjectFifo(%tile19_0,{%tile21_1,%tile22_1,%tile21_2,%tile22_2,%tile21_3,%tile22_3,%tile21_4,%tile22_4},9) { sym_name = "block_14_buf_in_shim_19" } : !aie.objectfifo> //B block input + %block_14_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile21_1,{%tile22_1},5){ sym_name ="block_14_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_1,{%tile23_1},6) { sym_name ="block_14_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_14_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile23_1,{%tile23_2},2) { sym_name ="block_14_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_14_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile21_2,{%tile22_2},5){ sym_name ="block_14_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_2,{%tile23_2},6) { sym_name ="block_14_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_14_buf_out_shim_19= aie.objectfifo.createObjectFifo(%tile23_2,{%tile19_0},5){ sym_name ="block_14_buf_out_shim_19"} : !aie.objectfifo> //B block output + %block_14_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile21_3,{%tile22_3},5){ sym_name ="block_14_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_3,{%tile23_3},6) { sym_name ="block_14_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_14_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile23_3,{%tile23_2},2) { sym_name ="block_14_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_14_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile21_4,{%tile22_4},5){ sym_name ="block_14_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_14_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_4,{%tile23_4},6) { sym_name ="block_14_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_14_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile23_4,{%tile23_2},2) { sym_name ="block_14_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B15 buffers---*- - %block_15_buf_in_shim_19 = AIE.objectfifo.createObjectFifo(%tile19_0,{%tile21_5,%tile22_5,%tile21_6,%tile22_6,%tile21_7,%tile22_7,%tile21_8,%tile22_8},9) { sym_name = "block_15_buf_in_shim_19" } : !AIE.objectfifo> //B block input - %block_15_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_5,{%tile22_5},5){ sym_name ="block_15_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_5,{%tile23_5},6) { sym_name ="block_15_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_5,{%tile23_6},2) { sym_name ="block_15_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_15_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_6,{%tile22_6},5){ sym_name ="block_15_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_6,{%tile23_6},6) { sym_name ="block_15_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_out_shim_19= AIE.objectfifo.createObjectFifo(%tile23_6,{%tile19_0},5){ sym_name ="block_15_buf_out_shim_19"} : !AIE.objectfifo> //B block output - %block_15_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_7,{%tile22_7},5){ sym_name ="block_15_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_7,{%tile23_7},6) { sym_name ="block_15_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_7,{%tile23_6},2) { sym_name ="block_15_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_15_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile21_8,{%tile22_8},5){ sym_name ="block_15_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_15_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile22_8,{%tile23_8},6) { sym_name ="block_15_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_15_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile23_8,{%tile23_6},2) { sym_name ="block_15_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_15_buf_in_shim_19 = aie.objectfifo.createObjectFifo(%tile19_0,{%tile21_5,%tile22_5,%tile21_6,%tile22_6,%tile21_7,%tile22_7,%tile21_8,%tile22_8},9) { sym_name = "block_15_buf_in_shim_19" } : !aie.objectfifo> //B block input + %block_15_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile21_5,{%tile22_5},5){ sym_name ="block_15_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_5,{%tile23_5},6) { sym_name ="block_15_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_15_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile23_5,{%tile23_6},2) { sym_name ="block_15_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_15_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile21_6,{%tile22_6},5){ sym_name ="block_15_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_6,{%tile23_6},6) { sym_name ="block_15_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_15_buf_out_shim_19= aie.objectfifo.createObjectFifo(%tile23_6,{%tile19_0},5){ sym_name ="block_15_buf_out_shim_19"} : !aie.objectfifo> //B block output + %block_15_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile21_7,{%tile22_7},5){ sym_name ="block_15_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_7,{%tile23_7},6) { sym_name ="block_15_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_15_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile23_7,{%tile23_6},2) { sym_name ="block_15_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_15_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile21_8,{%tile22_8},5){ sym_name ="block_15_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_15_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile22_8,{%tile23_8},6) { sym_name ="block_15_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_15_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile23_8,{%tile23_6},2) { sym_name ="block_15_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B16 buffers---*- - %block_16_buf_in_shim_26 = AIE.objectfifo.createObjectFifo(%tile26_0,{%tile24_1,%tile25_1,%tile24_2,%tile25_2,%tile24_3,%tile25_3,%tile24_4,%tile25_4},9) { sym_name = "block_16_buf_in_shim_26" } : !AIE.objectfifo> //B block input - %block_16_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_1,{%tile25_1},5){ sym_name ="block_16_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_16_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_1,{%tile26_1},6) { sym_name ="block_16_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_16_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile26_1,{%tile26_2},2) { sym_name ="block_16_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_16_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_2,{%tile25_2},5){ sym_name ="block_16_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_16_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_2,{%tile26_2},6) { sym_name ="block_16_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_16_buf_out_shim_26= AIE.objectfifo.createObjectFifo(%tile26_2,{%tile26_0},5){ sym_name ="block_16_buf_out_shim_26"} : !AIE.objectfifo> //B block output - %block_16_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_3,{%tile25_3},5){ sym_name ="block_16_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_16_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_3,{%tile26_3},6) { sym_name ="block_16_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_16_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile26_3,{%tile26_2},2) { sym_name ="block_16_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_16_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_4,{%tile25_4},5){ sym_name ="block_16_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_16_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_4,{%tile26_4},6) { sym_name ="block_16_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_16_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile26_4,{%tile26_2},2) { sym_name ="block_16_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_16_buf_in_shim_26 = aie.objectfifo.createObjectFifo(%tile26_0,{%tile24_1,%tile25_1,%tile24_2,%tile25_2,%tile24_3,%tile25_3,%tile24_4,%tile25_4},9) { sym_name = "block_16_buf_in_shim_26" } : !aie.objectfifo> //B block input + %block_16_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile24_1,{%tile25_1},5){ sym_name ="block_16_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_16_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_1,{%tile26_1},6) { sym_name ="block_16_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_16_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile26_1,{%tile26_2},2) { sym_name ="block_16_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_16_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile24_2,{%tile25_2},5){ sym_name ="block_16_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_16_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_2,{%tile26_2},6) { sym_name ="block_16_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_16_buf_out_shim_26= aie.objectfifo.createObjectFifo(%tile26_2,{%tile26_0},5){ sym_name ="block_16_buf_out_shim_26"} : !aie.objectfifo> //B block output + %block_16_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile24_3,{%tile25_3},5){ sym_name ="block_16_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_16_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_3,{%tile26_3},6) { sym_name ="block_16_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_16_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile26_3,{%tile26_2},2) { sym_name ="block_16_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_16_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile24_4,{%tile25_4},5){ sym_name ="block_16_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_16_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_4,{%tile26_4},6) { sym_name ="block_16_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_16_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile26_4,{%tile26_2},2) { sym_name ="block_16_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B17 buffers---*- - %block_17_buf_in_shim_26 = AIE.objectfifo.createObjectFifo(%tile26_0,{%tile24_5,%tile25_5,%tile24_6,%tile25_6,%tile24_7,%tile25_7,%tile24_8,%tile25_8},9) { sym_name = "block_17_buf_in_shim_26" } : !AIE.objectfifo> //B block input - %block_17_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_5,{%tile25_5},5){ sym_name ="block_17_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_17_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_5,{%tile26_5},6) { sym_name ="block_17_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_17_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile26_5,{%tile26_6},2) { sym_name ="block_17_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_17_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_6,{%tile25_6},5){ sym_name ="block_17_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_17_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_6,{%tile26_6},6) { sym_name ="block_17_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_17_buf_out_shim_26= AIE.objectfifo.createObjectFifo(%tile26_6,{%tile26_0},5){ sym_name ="block_17_buf_out_shim_26"} : !AIE.objectfifo> //B block output - %block_17_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_7,{%tile25_7},5){ sym_name ="block_17_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_17_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_7,{%tile26_7},6) { sym_name ="block_17_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_17_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile26_7,{%tile26_6},2) { sym_name ="block_17_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_17_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile24_8,{%tile25_8},5){ sym_name ="block_17_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_17_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile25_8,{%tile26_8},6) { sym_name ="block_17_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_17_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile26_8,{%tile26_6},2) { sym_name ="block_17_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_17_buf_in_shim_26 = aie.objectfifo.createObjectFifo(%tile26_0,{%tile24_5,%tile25_5,%tile24_6,%tile25_6,%tile24_7,%tile25_7,%tile24_8,%tile25_8},9) { sym_name = "block_17_buf_in_shim_26" } : !aie.objectfifo> //B block input + %block_17_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile24_5,{%tile25_5},5){ sym_name ="block_17_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_17_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_5,{%tile26_5},6) { sym_name ="block_17_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_17_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile26_5,{%tile26_6},2) { sym_name ="block_17_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_17_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile24_6,{%tile25_6},5){ sym_name ="block_17_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_17_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_6,{%tile26_6},6) { sym_name ="block_17_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_17_buf_out_shim_26= aie.objectfifo.createObjectFifo(%tile26_6,{%tile26_0},5){ sym_name ="block_17_buf_out_shim_26"} : !aie.objectfifo> //B block output + %block_17_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile24_7,{%tile25_7},5){ sym_name ="block_17_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_17_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_7,{%tile26_7},6) { sym_name ="block_17_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_17_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile26_7,{%tile26_6},2) { sym_name ="block_17_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_17_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile24_8,{%tile25_8},5){ sym_name ="block_17_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_17_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile25_8,{%tile26_8},6) { sym_name ="block_17_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_17_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile26_8,{%tile26_6},2) { sym_name ="block_17_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B18 buffers---*- - %block_18_buf_in_shim_27 = AIE.objectfifo.createObjectFifo(%tile27_0,{%tile27_1,%tile28_1,%tile27_2,%tile28_2,%tile27_3,%tile28_3,%tile27_4,%tile28_4},9) { sym_name = "block_18_buf_in_shim_27" } : !AIE.objectfifo> //B block input - %block_18_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_1,{%tile28_1},5){ sym_name ="block_18_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_18_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_1,{%tile29_1},6) { sym_name ="block_18_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_18_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile29_1,{%tile29_2},2) { sym_name ="block_18_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_18_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_2,{%tile28_2},5){ sym_name ="block_18_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_18_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_2,{%tile29_2},6) { sym_name ="block_18_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_18_buf_out_shim_27= AIE.objectfifo.createObjectFifo(%tile29_2,{%tile27_0},5){ sym_name ="block_18_buf_out_shim_27"} : !AIE.objectfifo> //B block output - %block_18_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_3,{%tile28_3},5){ sym_name ="block_18_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_18_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_3,{%tile29_3},6) { sym_name ="block_18_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_18_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile29_3,{%tile29_2},2) { sym_name ="block_18_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_18_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_4,{%tile28_4},5){ sym_name ="block_18_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_18_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_4,{%tile29_4},6) { sym_name ="block_18_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_18_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile29_4,{%tile29_2},2) { sym_name ="block_18_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_18_buf_in_shim_27 = aie.objectfifo.createObjectFifo(%tile27_0,{%tile27_1,%tile28_1,%tile27_2,%tile28_2,%tile27_3,%tile28_3,%tile27_4,%tile28_4},9) { sym_name = "block_18_buf_in_shim_27" } : !aie.objectfifo> //B block input + %block_18_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile27_1,{%tile28_1},5){ sym_name ="block_18_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_18_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_1,{%tile29_1},6) { sym_name ="block_18_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_18_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile29_1,{%tile29_2},2) { sym_name ="block_18_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_18_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile27_2,{%tile28_2},5){ sym_name ="block_18_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_18_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_2,{%tile29_2},6) { sym_name ="block_18_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_18_buf_out_shim_27= aie.objectfifo.createObjectFifo(%tile29_2,{%tile27_0},5){ sym_name ="block_18_buf_out_shim_27"} : !aie.objectfifo> //B block output + %block_18_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile27_3,{%tile28_3},5){ sym_name ="block_18_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_18_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_3,{%tile29_3},6) { sym_name ="block_18_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_18_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile29_3,{%tile29_2},2) { sym_name ="block_18_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_18_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile27_4,{%tile28_4},5){ sym_name ="block_18_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_18_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_4,{%tile29_4},6) { sym_name ="block_18_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_18_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile29_4,{%tile29_2},2) { sym_name ="block_18_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B19 buffers---*- - %block_19_buf_in_shim_27 = AIE.objectfifo.createObjectFifo(%tile27_0,{%tile27_5,%tile28_5,%tile27_6,%tile28_6,%tile27_7,%tile28_7,%tile27_8,%tile28_8},9) { sym_name = "block_19_buf_in_shim_27" } : !AIE.objectfifo> //B block input - %block_19_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_5,{%tile28_5},5){ sym_name ="block_19_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_19_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_5,{%tile29_5},6) { sym_name ="block_19_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_19_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile29_5,{%tile29_6},2) { sym_name ="block_19_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_19_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_6,{%tile28_6},5){ sym_name ="block_19_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_19_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_6,{%tile29_6},6) { sym_name ="block_19_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_19_buf_out_shim_27= AIE.objectfifo.createObjectFifo(%tile29_6,{%tile27_0},5){ sym_name ="block_19_buf_out_shim_27"} : !AIE.objectfifo> //B block output - %block_19_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_7,{%tile28_7},5){ sym_name ="block_19_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_19_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_7,{%tile29_7},6) { sym_name ="block_19_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_19_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile29_7,{%tile29_6},2) { sym_name ="block_19_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_19_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile27_8,{%tile28_8},5){ sym_name ="block_19_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_19_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile28_8,{%tile29_8},6) { sym_name ="block_19_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_19_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile29_8,{%tile29_6},2) { sym_name ="block_19_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_19_buf_in_shim_27 = aie.objectfifo.createObjectFifo(%tile27_0,{%tile27_5,%tile28_5,%tile27_6,%tile28_6,%tile27_7,%tile28_7,%tile27_8,%tile28_8},9) { sym_name = "block_19_buf_in_shim_27" } : !aie.objectfifo> //B block input + %block_19_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile27_5,{%tile28_5},5){ sym_name ="block_19_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_19_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_5,{%tile29_5},6) { sym_name ="block_19_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_19_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile29_5,{%tile29_6},2) { sym_name ="block_19_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_19_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile27_6,{%tile28_6},5){ sym_name ="block_19_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_19_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_6,{%tile29_6},6) { sym_name ="block_19_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_19_buf_out_shim_27= aie.objectfifo.createObjectFifo(%tile29_6,{%tile27_0},5){ sym_name ="block_19_buf_out_shim_27"} : !aie.objectfifo> //B block output + %block_19_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile27_7,{%tile28_7},5){ sym_name ="block_19_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_19_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_7,{%tile29_7},6) { sym_name ="block_19_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_19_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile29_7,{%tile29_6},2) { sym_name ="block_19_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_19_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile27_8,{%tile28_8},5){ sym_name ="block_19_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_19_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile28_8,{%tile29_8},6) { sym_name ="block_19_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_19_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile29_8,{%tile29_6},2) { sym_name ="block_19_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B20 buffers---*- - %block_20_buf_in_shim_34 = AIE.objectfifo.createObjectFifo(%tile34_0,{%tile30_1,%tile31_1,%tile30_2,%tile31_2,%tile30_3,%tile31_3,%tile30_4,%tile31_4},9) { sym_name = "block_20_buf_in_shim_34" } : !AIE.objectfifo> //B block input - %block_20_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_1,{%tile31_1},5){ sym_name ="block_20_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_20_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_1,{%tile32_1},6) { sym_name ="block_20_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_20_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile32_1,{%tile32_2},2) { sym_name ="block_20_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_20_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_2,{%tile31_2},5){ sym_name ="block_20_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_20_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_2,{%tile32_2},6) { sym_name ="block_20_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_20_buf_out_shim_34= AIE.objectfifo.createObjectFifo(%tile32_2,{%tile34_0},5){ sym_name ="block_20_buf_out_shim_34"} : !AIE.objectfifo> //B block output - %block_20_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_3,{%tile31_3},5){ sym_name ="block_20_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_20_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_3,{%tile32_3},6) { sym_name ="block_20_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_20_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile32_3,{%tile32_2},2) { sym_name ="block_20_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_20_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_4,{%tile31_4},5){ sym_name ="block_20_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_20_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_4,{%tile32_4},6) { sym_name ="block_20_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_20_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile32_4,{%tile32_2},2) { sym_name ="block_20_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_20_buf_in_shim_34 = aie.objectfifo.createObjectFifo(%tile34_0,{%tile30_1,%tile31_1,%tile30_2,%tile31_2,%tile30_3,%tile31_3,%tile30_4,%tile31_4},9) { sym_name = "block_20_buf_in_shim_34" } : !aie.objectfifo> //B block input + %block_20_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile30_1,{%tile31_1},5){ sym_name ="block_20_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_20_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_1,{%tile32_1},6) { sym_name ="block_20_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_20_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile32_1,{%tile32_2},2) { sym_name ="block_20_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_20_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile30_2,{%tile31_2},5){ sym_name ="block_20_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_20_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_2,{%tile32_2},6) { sym_name ="block_20_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_20_buf_out_shim_34= aie.objectfifo.createObjectFifo(%tile32_2,{%tile34_0},5){ sym_name ="block_20_buf_out_shim_34"} : !aie.objectfifo> //B block output + %block_20_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile30_3,{%tile31_3},5){ sym_name ="block_20_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_20_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_3,{%tile32_3},6) { sym_name ="block_20_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_20_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile32_3,{%tile32_2},2) { sym_name ="block_20_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_20_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile30_4,{%tile31_4},5){ sym_name ="block_20_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_20_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_4,{%tile32_4},6) { sym_name ="block_20_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_20_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile32_4,{%tile32_2},2) { sym_name ="block_20_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B21 buffers---*- - %block_21_buf_in_shim_34 = AIE.objectfifo.createObjectFifo(%tile34_0,{%tile30_5,%tile31_5,%tile30_6,%tile31_6,%tile30_7,%tile31_7,%tile30_8,%tile31_8},9) { sym_name = "block_21_buf_in_shim_34" } : !AIE.objectfifo> //B block input - %block_21_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_5,{%tile31_5},5){ sym_name ="block_21_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_21_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_5,{%tile32_5},6) { sym_name ="block_21_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_21_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile32_5,{%tile32_6},2) { sym_name ="block_21_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_21_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_6,{%tile31_6},5){ sym_name ="block_21_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_21_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_6,{%tile32_6},6) { sym_name ="block_21_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_21_buf_out_shim_34= AIE.objectfifo.createObjectFifo(%tile32_6,{%tile34_0},5){ sym_name ="block_21_buf_out_shim_34"} : !AIE.objectfifo> //B block output - %block_21_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_7,{%tile31_7},5){ sym_name ="block_21_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_21_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_7,{%tile32_7},6) { sym_name ="block_21_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_21_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile32_7,{%tile32_6},2) { sym_name ="block_21_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_21_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile30_8,{%tile31_8},5){ sym_name ="block_21_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_21_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile31_8,{%tile32_8},6) { sym_name ="block_21_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_21_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile32_8,{%tile32_6},2) { sym_name ="block_21_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_21_buf_in_shim_34 = aie.objectfifo.createObjectFifo(%tile34_0,{%tile30_5,%tile31_5,%tile30_6,%tile31_6,%tile30_7,%tile31_7,%tile30_8,%tile31_8},9) { sym_name = "block_21_buf_in_shim_34" } : !aie.objectfifo> //B block input + %block_21_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile30_5,{%tile31_5},5){ sym_name ="block_21_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_21_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_5,{%tile32_5},6) { sym_name ="block_21_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_21_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile32_5,{%tile32_6},2) { sym_name ="block_21_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_21_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile30_6,{%tile31_6},5){ sym_name ="block_21_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_21_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_6,{%tile32_6},6) { sym_name ="block_21_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_21_buf_out_shim_34= aie.objectfifo.createObjectFifo(%tile32_6,{%tile34_0},5){ sym_name ="block_21_buf_out_shim_34"} : !aie.objectfifo> //B block output + %block_21_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile30_7,{%tile31_7},5){ sym_name ="block_21_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_21_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_7,{%tile32_7},6) { sym_name ="block_21_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_21_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile32_7,{%tile32_6},2) { sym_name ="block_21_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_21_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile30_8,{%tile31_8},5){ sym_name ="block_21_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_21_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile31_8,{%tile32_8},6) { sym_name ="block_21_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_21_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile32_8,{%tile32_6},2) { sym_name ="block_21_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B22 buffers---*- - %block_22_buf_in_shim_35 = AIE.objectfifo.createObjectFifo(%tile35_0,{%tile33_1,%tile34_1,%tile33_2,%tile34_2,%tile33_3,%tile34_3,%tile33_4,%tile34_4},9) { sym_name = "block_22_buf_in_shim_35" } : !AIE.objectfifo> //B block input - %block_22_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_1,{%tile34_1},5){ sym_name ="block_22_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_22_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_1,{%tile35_1},6) { sym_name ="block_22_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_22_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile35_1,{%tile35_2},2) { sym_name ="block_22_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_22_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_2,{%tile34_2},5){ sym_name ="block_22_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_22_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_2,{%tile35_2},6) { sym_name ="block_22_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_22_buf_out_shim_35= AIE.objectfifo.createObjectFifo(%tile35_2,{%tile35_0},5){ sym_name ="block_22_buf_out_shim_35"} : !AIE.objectfifo> //B block output - %block_22_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_3,{%tile34_3},5){ sym_name ="block_22_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_22_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_3,{%tile35_3},6) { sym_name ="block_22_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_22_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile35_3,{%tile35_2},2) { sym_name ="block_22_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_22_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_4,{%tile34_4},5){ sym_name ="block_22_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_22_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_4,{%tile35_4},6) { sym_name ="block_22_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_22_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile35_4,{%tile35_2},2) { sym_name ="block_22_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_22_buf_in_shim_35 = aie.objectfifo.createObjectFifo(%tile35_0,{%tile33_1,%tile34_1,%tile33_2,%tile34_2,%tile33_3,%tile34_3,%tile33_4,%tile34_4},9) { sym_name = "block_22_buf_in_shim_35" } : !aie.objectfifo> //B block input + %block_22_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile33_1,{%tile34_1},5){ sym_name ="block_22_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_22_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_1,{%tile35_1},6) { sym_name ="block_22_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_22_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile35_1,{%tile35_2},2) { sym_name ="block_22_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_22_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile33_2,{%tile34_2},5){ sym_name ="block_22_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_22_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_2,{%tile35_2},6) { sym_name ="block_22_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_22_buf_out_shim_35= aie.objectfifo.createObjectFifo(%tile35_2,{%tile35_0},5){ sym_name ="block_22_buf_out_shim_35"} : !aie.objectfifo> //B block output + %block_22_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile33_3,{%tile34_3},5){ sym_name ="block_22_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_22_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_3,{%tile35_3},6) { sym_name ="block_22_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_22_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile35_3,{%tile35_2},2) { sym_name ="block_22_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_22_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile33_4,{%tile34_4},5){ sym_name ="block_22_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_22_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_4,{%tile35_4},6) { sym_name ="block_22_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_22_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile35_4,{%tile35_2},2) { sym_name ="block_22_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B23 buffers---*- - %block_23_buf_in_shim_35 = AIE.objectfifo.createObjectFifo(%tile35_0,{%tile33_5,%tile34_5,%tile33_6,%tile34_6,%tile33_7,%tile34_7,%tile33_8,%tile34_8},9) { sym_name = "block_23_buf_in_shim_35" } : !AIE.objectfifo> //B block input - %block_23_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_5,{%tile34_5},5){ sym_name ="block_23_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_23_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_5,{%tile35_5},6) { sym_name ="block_23_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_23_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile35_5,{%tile35_6},2) { sym_name ="block_23_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_23_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_6,{%tile34_6},5){ sym_name ="block_23_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_23_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_6,{%tile35_6},6) { sym_name ="block_23_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_23_buf_out_shim_35= AIE.objectfifo.createObjectFifo(%tile35_6,{%tile35_0},5){ sym_name ="block_23_buf_out_shim_35"} : !AIE.objectfifo> //B block output - %block_23_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_7,{%tile34_7},5){ sym_name ="block_23_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_23_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_7,{%tile35_7},6) { sym_name ="block_23_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_23_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile35_7,{%tile35_6},2) { sym_name ="block_23_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_23_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile33_8,{%tile34_8},5){ sym_name ="block_23_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_23_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile34_8,{%tile35_8},6) { sym_name ="block_23_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_23_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile35_8,{%tile35_6},2) { sym_name ="block_23_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_23_buf_in_shim_35 = aie.objectfifo.createObjectFifo(%tile35_0,{%tile33_5,%tile34_5,%tile33_6,%tile34_6,%tile33_7,%tile34_7,%tile33_8,%tile34_8},9) { sym_name = "block_23_buf_in_shim_35" } : !aie.objectfifo> //B block input + %block_23_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile33_5,{%tile34_5},5){ sym_name ="block_23_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_23_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_5,{%tile35_5},6) { sym_name ="block_23_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_23_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile35_5,{%tile35_6},2) { sym_name ="block_23_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_23_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile33_6,{%tile34_6},5){ sym_name ="block_23_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_23_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_6,{%tile35_6},6) { sym_name ="block_23_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_23_buf_out_shim_35= aie.objectfifo.createObjectFifo(%tile35_6,{%tile35_0},5){ sym_name ="block_23_buf_out_shim_35"} : !aie.objectfifo> //B block output + %block_23_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile33_7,{%tile34_7},5){ sym_name ="block_23_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_23_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_7,{%tile35_7},6) { sym_name ="block_23_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_23_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile35_7,{%tile35_6},2) { sym_name ="block_23_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_23_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile33_8,{%tile34_8},5){ sym_name ="block_23_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_23_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile34_8,{%tile35_8},6) { sym_name ="block_23_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_23_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile35_8,{%tile35_6},2) { sym_name ="block_23_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B24 buffers---*- - %block_24_buf_in_shim_42 = AIE.objectfifo.createObjectFifo(%tile42_0,{%tile36_1,%tile37_1,%tile36_2,%tile37_2,%tile36_3,%tile37_3,%tile36_4,%tile37_4},9) { sym_name = "block_24_buf_in_shim_42" } : !AIE.objectfifo> //B block input - %block_24_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_1,{%tile37_1},5){ sym_name ="block_24_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_24_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_1,{%tile38_1},6) { sym_name ="block_24_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_24_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile38_1,{%tile38_2},2) { sym_name ="block_24_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_24_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_2,{%tile37_2},5){ sym_name ="block_24_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_24_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_2,{%tile38_2},6) { sym_name ="block_24_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_24_buf_out_shim_42= AIE.objectfifo.createObjectFifo(%tile38_2,{%tile42_0},5){ sym_name ="block_24_buf_out_shim_42"} : !AIE.objectfifo> //B block output - %block_24_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_3,{%tile37_3},5){ sym_name ="block_24_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_24_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_3,{%tile38_3},6) { sym_name ="block_24_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_24_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile38_3,{%tile38_2},2) { sym_name ="block_24_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_24_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_4,{%tile37_4},5){ sym_name ="block_24_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_24_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_4,{%tile38_4},6) { sym_name ="block_24_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_24_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile38_4,{%tile38_2},2) { sym_name ="block_24_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_24_buf_in_shim_42 = aie.objectfifo.createObjectFifo(%tile42_0,{%tile36_1,%tile37_1,%tile36_2,%tile37_2,%tile36_3,%tile37_3,%tile36_4,%tile37_4},9) { sym_name = "block_24_buf_in_shim_42" } : !aie.objectfifo> //B block input + %block_24_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile36_1,{%tile37_1},5){ sym_name ="block_24_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_24_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_1,{%tile38_1},6) { sym_name ="block_24_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_24_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile38_1,{%tile38_2},2) { sym_name ="block_24_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_24_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile36_2,{%tile37_2},5){ sym_name ="block_24_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_24_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_2,{%tile38_2},6) { sym_name ="block_24_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_24_buf_out_shim_42= aie.objectfifo.createObjectFifo(%tile38_2,{%tile42_0},5){ sym_name ="block_24_buf_out_shim_42"} : !aie.objectfifo> //B block output + %block_24_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile36_3,{%tile37_3},5){ sym_name ="block_24_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_24_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_3,{%tile38_3},6) { sym_name ="block_24_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_24_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile38_3,{%tile38_2},2) { sym_name ="block_24_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_24_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile36_4,{%tile37_4},5){ sym_name ="block_24_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_24_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_4,{%tile38_4},6) { sym_name ="block_24_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_24_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile38_4,{%tile38_2},2) { sym_name ="block_24_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B25 buffers---*- - %block_25_buf_in_shim_42 = AIE.objectfifo.createObjectFifo(%tile42_0,{%tile36_5,%tile37_5,%tile36_6,%tile37_6,%tile36_7,%tile37_7,%tile36_8,%tile37_8},9) { sym_name = "block_25_buf_in_shim_42" } : !AIE.objectfifo> //B block input - %block_25_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_5,{%tile37_5},5){ sym_name ="block_25_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_25_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_5,{%tile38_5},6) { sym_name ="block_25_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_25_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile38_5,{%tile38_6},2) { sym_name ="block_25_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_25_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_6,{%tile37_6},5){ sym_name ="block_25_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_25_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_6,{%tile38_6},6) { sym_name ="block_25_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_25_buf_out_shim_42= AIE.objectfifo.createObjectFifo(%tile38_6,{%tile42_0},5){ sym_name ="block_25_buf_out_shim_42"} : !AIE.objectfifo> //B block output - %block_25_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_7,{%tile37_7},5){ sym_name ="block_25_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_25_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_7,{%tile38_7},6) { sym_name ="block_25_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_25_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile38_7,{%tile38_6},2) { sym_name ="block_25_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_25_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile36_8,{%tile37_8},5){ sym_name ="block_25_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_25_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile37_8,{%tile38_8},6) { sym_name ="block_25_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_25_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile38_8,{%tile38_6},2) { sym_name ="block_25_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_25_buf_in_shim_42 = aie.objectfifo.createObjectFifo(%tile42_0,{%tile36_5,%tile37_5,%tile36_6,%tile37_6,%tile36_7,%tile37_7,%tile36_8,%tile37_8},9) { sym_name = "block_25_buf_in_shim_42" } : !aie.objectfifo> //B block input + %block_25_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile36_5,{%tile37_5},5){ sym_name ="block_25_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_25_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_5,{%tile38_5},6) { sym_name ="block_25_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_25_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile38_5,{%tile38_6},2) { sym_name ="block_25_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_25_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile36_6,{%tile37_6},5){ sym_name ="block_25_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_25_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_6,{%tile38_6},6) { sym_name ="block_25_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_25_buf_out_shim_42= aie.objectfifo.createObjectFifo(%tile38_6,{%tile42_0},5){ sym_name ="block_25_buf_out_shim_42"} : !aie.objectfifo> //B block output + %block_25_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile36_7,{%tile37_7},5){ sym_name ="block_25_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_25_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_7,{%tile38_7},6) { sym_name ="block_25_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_25_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile38_7,{%tile38_6},2) { sym_name ="block_25_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_25_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile36_8,{%tile37_8},5){ sym_name ="block_25_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_25_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile37_8,{%tile38_8},6) { sym_name ="block_25_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_25_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile38_8,{%tile38_6},2) { sym_name ="block_25_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B26 buffers---*- - %block_26_buf_in_shim_43 = AIE.objectfifo.createObjectFifo(%tile43_0,{%tile39_1,%tile40_1,%tile39_2,%tile40_2,%tile39_3,%tile40_3,%tile39_4,%tile40_4},9) { sym_name = "block_26_buf_in_shim_43" } : !AIE.objectfifo> //B block input - %block_26_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_1,{%tile40_1},5){ sym_name ="block_26_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_26_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_1,{%tile41_1},6) { sym_name ="block_26_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_26_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile41_1,{%tile41_2},2) { sym_name ="block_26_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_26_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_2,{%tile40_2},5){ sym_name ="block_26_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_26_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_2,{%tile41_2},6) { sym_name ="block_26_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_26_buf_out_shim_43= AIE.objectfifo.createObjectFifo(%tile41_2,{%tile43_0},5){ sym_name ="block_26_buf_out_shim_43"} : !AIE.objectfifo> //B block output - %block_26_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_3,{%tile40_3},5){ sym_name ="block_26_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_26_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_3,{%tile41_3},6) { sym_name ="block_26_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_26_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile41_3,{%tile41_2},2) { sym_name ="block_26_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_26_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_4,{%tile40_4},5){ sym_name ="block_26_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_26_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_4,{%tile41_4},6) { sym_name ="block_26_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_26_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile41_4,{%tile41_2},2) { sym_name ="block_26_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_26_buf_in_shim_43 = aie.objectfifo.createObjectFifo(%tile43_0,{%tile39_1,%tile40_1,%tile39_2,%tile40_2,%tile39_3,%tile40_3,%tile39_4,%tile40_4},9) { sym_name = "block_26_buf_in_shim_43" } : !aie.objectfifo> //B block input + %block_26_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile39_1,{%tile40_1},5){ sym_name ="block_26_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_26_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_1,{%tile41_1},6) { sym_name ="block_26_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_26_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile41_1,{%tile41_2},2) { sym_name ="block_26_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_26_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile39_2,{%tile40_2},5){ sym_name ="block_26_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_26_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_2,{%tile41_2},6) { sym_name ="block_26_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_26_buf_out_shim_43= aie.objectfifo.createObjectFifo(%tile41_2,{%tile43_0},5){ sym_name ="block_26_buf_out_shim_43"} : !aie.objectfifo> //B block output + %block_26_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile39_3,{%tile40_3},5){ sym_name ="block_26_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_26_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_3,{%tile41_3},6) { sym_name ="block_26_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_26_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile41_3,{%tile41_2},2) { sym_name ="block_26_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_26_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile39_4,{%tile40_4},5){ sym_name ="block_26_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_26_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_4,{%tile41_4},6) { sym_name ="block_26_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_26_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile41_4,{%tile41_2},2) { sym_name ="block_26_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B27 buffers---*- - %block_27_buf_in_shim_43 = AIE.objectfifo.createObjectFifo(%tile43_0,{%tile39_5,%tile40_5,%tile39_6,%tile40_6,%tile39_7,%tile40_7,%tile39_8,%tile40_8},9) { sym_name = "block_27_buf_in_shim_43" } : !AIE.objectfifo> //B block input - %block_27_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_5,{%tile40_5},5){ sym_name ="block_27_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_27_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_5,{%tile41_5},6) { sym_name ="block_27_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_27_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile41_5,{%tile41_6},2) { sym_name ="block_27_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_27_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_6,{%tile40_6},5){ sym_name ="block_27_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_27_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_6,{%tile41_6},6) { sym_name ="block_27_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_27_buf_out_shim_43= AIE.objectfifo.createObjectFifo(%tile41_6,{%tile43_0},5){ sym_name ="block_27_buf_out_shim_43"} : !AIE.objectfifo> //B block output - %block_27_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_7,{%tile40_7},5){ sym_name ="block_27_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_27_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_7,{%tile41_7},6) { sym_name ="block_27_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_27_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile41_7,{%tile41_6},2) { sym_name ="block_27_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_27_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile39_8,{%tile40_8},5){ sym_name ="block_27_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_27_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile40_8,{%tile41_8},6) { sym_name ="block_27_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_27_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile41_8,{%tile41_6},2) { sym_name ="block_27_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_27_buf_in_shim_43 = aie.objectfifo.createObjectFifo(%tile43_0,{%tile39_5,%tile40_5,%tile39_6,%tile40_6,%tile39_7,%tile40_7,%tile39_8,%tile40_8},9) { sym_name = "block_27_buf_in_shim_43" } : !aie.objectfifo> //B block input + %block_27_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile39_5,{%tile40_5},5){ sym_name ="block_27_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_27_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_5,{%tile41_5},6) { sym_name ="block_27_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_27_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile41_5,{%tile41_6},2) { sym_name ="block_27_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_27_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile39_6,{%tile40_6},5){ sym_name ="block_27_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_27_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_6,{%tile41_6},6) { sym_name ="block_27_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_27_buf_out_shim_43= aie.objectfifo.createObjectFifo(%tile41_6,{%tile43_0},5){ sym_name ="block_27_buf_out_shim_43"} : !aie.objectfifo> //B block output + %block_27_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile39_7,{%tile40_7},5){ sym_name ="block_27_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_27_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_7,{%tile41_7},6) { sym_name ="block_27_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_27_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile41_7,{%tile41_6},2) { sym_name ="block_27_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_27_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile39_8,{%tile40_8},5){ sym_name ="block_27_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_27_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile40_8,{%tile41_8},6) { sym_name ="block_27_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_27_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile41_8,{%tile41_6},2) { sym_name ="block_27_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B28 buffers---*- - %block_28_buf_in_shim_46 = AIE.objectfifo.createObjectFifo(%tile46_0,{%tile42_1,%tile43_1,%tile42_2,%tile43_2,%tile42_3,%tile43_3,%tile42_4,%tile43_4},9) { sym_name = "block_28_buf_in_shim_46" } : !AIE.objectfifo> //B block input - %block_28_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_1,{%tile43_1},5){ sym_name ="block_28_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_28_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_1,{%tile44_1},6) { sym_name ="block_28_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_28_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile44_1,{%tile44_2},2) { sym_name ="block_28_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_28_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_2,{%tile43_2},5){ sym_name ="block_28_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_28_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_2,{%tile44_2},6) { sym_name ="block_28_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_28_buf_out_shim_46= AIE.objectfifo.createObjectFifo(%tile44_2,{%tile46_0},5){ sym_name ="block_28_buf_out_shim_46"} : !AIE.objectfifo> //B block output - %block_28_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_3,{%tile43_3},5){ sym_name ="block_28_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_28_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_3,{%tile44_3},6) { sym_name ="block_28_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_28_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile44_3,{%tile44_2},2) { sym_name ="block_28_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_28_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_4,{%tile43_4},5){ sym_name ="block_28_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_28_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_4,{%tile44_4},6) { sym_name ="block_28_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_28_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile44_4,{%tile44_2},2) { sym_name ="block_28_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_28_buf_in_shim_46 = aie.objectfifo.createObjectFifo(%tile46_0,{%tile42_1,%tile43_1,%tile42_2,%tile43_2,%tile42_3,%tile43_3,%tile42_4,%tile43_4},9) { sym_name = "block_28_buf_in_shim_46" } : !aie.objectfifo> //B block input + %block_28_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile42_1,{%tile43_1},5){ sym_name ="block_28_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_28_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_1,{%tile44_1},6) { sym_name ="block_28_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_28_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile44_1,{%tile44_2},2) { sym_name ="block_28_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_28_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile42_2,{%tile43_2},5){ sym_name ="block_28_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_28_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_2,{%tile44_2},6) { sym_name ="block_28_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_28_buf_out_shim_46= aie.objectfifo.createObjectFifo(%tile44_2,{%tile46_0},5){ sym_name ="block_28_buf_out_shim_46"} : !aie.objectfifo> //B block output + %block_28_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile42_3,{%tile43_3},5){ sym_name ="block_28_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_28_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_3,{%tile44_3},6) { sym_name ="block_28_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_28_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile44_3,{%tile44_2},2) { sym_name ="block_28_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_28_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile42_4,{%tile43_4},5){ sym_name ="block_28_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_28_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_4,{%tile44_4},6) { sym_name ="block_28_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_28_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile44_4,{%tile44_2},2) { sym_name ="block_28_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B29 buffers---*- - %block_29_buf_in_shim_46 = AIE.objectfifo.createObjectFifo(%tile46_0,{%tile42_5,%tile43_5,%tile42_6,%tile43_6,%tile42_7,%tile43_7,%tile42_8,%tile43_8},9) { sym_name = "block_29_buf_in_shim_46" } : !AIE.objectfifo> //B block input - %block_29_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_5,{%tile43_5},5){ sym_name ="block_29_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_29_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_5,{%tile44_5},6) { sym_name ="block_29_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_29_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile44_5,{%tile44_6},2) { sym_name ="block_29_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_29_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_6,{%tile43_6},5){ sym_name ="block_29_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_29_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_6,{%tile44_6},6) { sym_name ="block_29_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_29_buf_out_shim_46= AIE.objectfifo.createObjectFifo(%tile44_6,{%tile46_0},5){ sym_name ="block_29_buf_out_shim_46"} : !AIE.objectfifo> //B block output - %block_29_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_7,{%tile43_7},5){ sym_name ="block_29_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_29_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_7,{%tile44_7},6) { sym_name ="block_29_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_29_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile44_7,{%tile44_6},2) { sym_name ="block_29_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_29_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile42_8,{%tile43_8},5){ sym_name ="block_29_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_29_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile43_8,{%tile44_8},6) { sym_name ="block_29_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_29_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile44_8,{%tile44_6},2) { sym_name ="block_29_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_29_buf_in_shim_46 = aie.objectfifo.createObjectFifo(%tile46_0,{%tile42_5,%tile43_5,%tile42_6,%tile43_6,%tile42_7,%tile43_7,%tile42_8,%tile43_8},9) { sym_name = "block_29_buf_in_shim_46" } : !aie.objectfifo> //B block input + %block_29_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile42_5,{%tile43_5},5){ sym_name ="block_29_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_29_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_5,{%tile44_5},6) { sym_name ="block_29_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_29_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile44_5,{%tile44_6},2) { sym_name ="block_29_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_29_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile42_6,{%tile43_6},5){ sym_name ="block_29_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_29_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_6,{%tile44_6},6) { sym_name ="block_29_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_29_buf_out_shim_46= aie.objectfifo.createObjectFifo(%tile44_6,{%tile46_0},5){ sym_name ="block_29_buf_out_shim_46"} : !aie.objectfifo> //B block output + %block_29_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile42_7,{%tile43_7},5){ sym_name ="block_29_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_29_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_7,{%tile44_7},6) { sym_name ="block_29_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_29_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile44_7,{%tile44_6},2) { sym_name ="block_29_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_29_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile42_8,{%tile43_8},5){ sym_name ="block_29_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_29_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile43_8,{%tile44_8},6) { sym_name ="block_29_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_29_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile44_8,{%tile44_6},2) { sym_name ="block_29_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B30 buffers---*- - %block_30_buf_in_shim_47 = AIE.objectfifo.createObjectFifo(%tile47_0,{%tile45_1,%tile46_1,%tile45_2,%tile46_2,%tile45_3,%tile46_3,%tile45_4,%tile46_4},9) { sym_name = "block_30_buf_in_shim_47" } : !AIE.objectfifo> //B block input - %block_30_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_1,{%tile46_1},5){ sym_name ="block_30_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_30_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_1,{%tile47_1},6) { sym_name ="block_30_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_30_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile47_1,{%tile47_2},2) { sym_name ="block_30_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_30_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_2,{%tile46_2},5){ sym_name ="block_30_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_30_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_2,{%tile47_2},6) { sym_name ="block_30_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_30_buf_out_shim_47= AIE.objectfifo.createObjectFifo(%tile47_2,{%tile47_0},5){ sym_name ="block_30_buf_out_shim_47"} : !AIE.objectfifo> //B block output - %block_30_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_3,{%tile46_3},5){ sym_name ="block_30_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_30_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_3,{%tile47_3},6) { sym_name ="block_30_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_30_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile47_3,{%tile47_2},2) { sym_name ="block_30_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_30_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_4,{%tile46_4},5){ sym_name ="block_30_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_30_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_4,{%tile47_4},6) { sym_name ="block_30_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_30_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile47_4,{%tile47_2},2) { sym_name ="block_30_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_30_buf_in_shim_47 = aie.objectfifo.createObjectFifo(%tile47_0,{%tile45_1,%tile46_1,%tile45_2,%tile46_2,%tile45_3,%tile46_3,%tile45_4,%tile46_4},9) { sym_name = "block_30_buf_in_shim_47" } : !aie.objectfifo> //B block input + %block_30_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile45_1,{%tile46_1},5){ sym_name ="block_30_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_30_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_1,{%tile47_1},6) { sym_name ="block_30_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_30_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile47_1,{%tile47_2},2) { sym_name ="block_30_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_30_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile45_2,{%tile46_2},5){ sym_name ="block_30_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_30_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_2,{%tile47_2},6) { sym_name ="block_30_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_30_buf_out_shim_47= aie.objectfifo.createObjectFifo(%tile47_2,{%tile47_0},5){ sym_name ="block_30_buf_out_shim_47"} : !aie.objectfifo> //B block output + %block_30_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile45_3,{%tile46_3},5){ sym_name ="block_30_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_30_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_3,{%tile47_3},6) { sym_name ="block_30_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_30_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile47_3,{%tile47_2},2) { sym_name ="block_30_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_30_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile45_4,{%tile46_4},5){ sym_name ="block_30_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_30_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_4,{%tile47_4},6) { sym_name ="block_30_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_30_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile47_4,{%tile47_2},2) { sym_name ="block_30_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B31 buffers---*- - %block_31_buf_in_shim_47 = AIE.objectfifo.createObjectFifo(%tile47_0,{%tile45_5,%tile46_5,%tile45_6,%tile46_6,%tile45_7,%tile46_7,%tile45_8,%tile46_8},9) { sym_name = "block_31_buf_in_shim_47" } : !AIE.objectfifo> //B block input - %block_31_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_5,{%tile46_5},5){ sym_name ="block_31_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_31_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_5,{%tile47_5},6) { sym_name ="block_31_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_31_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile47_5,{%tile47_6},2) { sym_name ="block_31_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_31_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_6,{%tile46_6},5){ sym_name ="block_31_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_31_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_6,{%tile47_6},6) { sym_name ="block_31_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_31_buf_out_shim_47= AIE.objectfifo.createObjectFifo(%tile47_6,{%tile47_0},5){ sym_name ="block_31_buf_out_shim_47"} : !AIE.objectfifo> //B block output - %block_31_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_7,{%tile46_7},5){ sym_name ="block_31_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_31_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_7,{%tile47_7},6) { sym_name ="block_31_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_31_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile47_7,{%tile47_6},2) { sym_name ="block_31_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_31_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile45_8,{%tile46_8},5){ sym_name ="block_31_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_31_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile46_8,{%tile47_8},6) { sym_name ="block_31_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_31_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile47_8,{%tile47_6},2) { sym_name ="block_31_buf_row_8_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + %block_31_buf_in_shim_47 = aie.objectfifo.createObjectFifo(%tile47_0,{%tile45_5,%tile46_5,%tile45_6,%tile46_6,%tile45_7,%tile46_7,%tile45_8,%tile46_8},9) { sym_name = "block_31_buf_in_shim_47" } : !aie.objectfifo> //B block input + %block_31_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile45_5,{%tile46_5},5){ sym_name ="block_31_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_31_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_5,{%tile47_5},6) { sym_name ="block_31_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_31_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile47_5,{%tile47_6},2) { sym_name ="block_31_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_31_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile45_6,{%tile46_6},5){ sym_name ="block_31_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_31_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_6,{%tile47_6},6) { sym_name ="block_31_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_31_buf_out_shim_47= aie.objectfifo.createObjectFifo(%tile47_6,{%tile47_0},5){ sym_name ="block_31_buf_out_shim_47"} : !aie.objectfifo> //B block output + %block_31_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile45_7,{%tile46_7},5){ sym_name ="block_31_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_31_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_7,{%tile47_7},6) { sym_name ="block_31_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_31_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile47_7,{%tile47_6},2) { sym_name ="block_31_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_31_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile45_8,{%tile46_8},5){ sym_name ="block_31_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_31_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile46_8,{%tile47_8},6) { sym_name ="block_31_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_31_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile47_8,{%tile47_6},2) { sym_name ="block_31_buf_row_8_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> - %ext_buffer_out_1 = AIE.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> + %ext_buffer_out_1 = aie.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> - %ext_buffer_in_2 = AIE.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> - %ext_buffer_out_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> + %ext_buffer_in_2 = aie.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> + %ext_buffer_out_2 = aie.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> - %ext_buffer_in_3 = AIE.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> - %ext_buffer_out_3 = AIE.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> + %ext_buffer_in_3 = aie.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> + %ext_buffer_out_3 = aie.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> - %ext_buffer_in_4 = AIE.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<2304 x i32> - %ext_buffer_out_4 = AIE.external_buffer {sym_name = "ddr_buffer_out_4"}: memref<2048 x i32> + %ext_buffer_in_4 = aie.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<2304 x i32> + %ext_buffer_out_4 = aie.external_buffer {sym_name = "ddr_buffer_out_4"}: memref<2048 x i32> - %ext_buffer_in_5 = AIE.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<2304 x i32> - %ext_buffer_out_5 = AIE.external_buffer {sym_name = "ddr_buffer_out_5"}: memref<2048 x i32> + %ext_buffer_in_5 = aie.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<2304 x i32> + %ext_buffer_out_5 = aie.external_buffer {sym_name = "ddr_buffer_out_5"}: memref<2048 x i32> - %ext_buffer_in_6 = AIE.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<2304 x i32> - %ext_buffer_out_6 = AIE.external_buffer {sym_name = "ddr_buffer_out_6"}: memref<2048 x i32> + %ext_buffer_in_6 = aie.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<2304 x i32> + %ext_buffer_out_6 = aie.external_buffer {sym_name = "ddr_buffer_out_6"}: memref<2048 x i32> - %ext_buffer_in_7 = AIE.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<2304 x i32> - %ext_buffer_out_7 = AIE.external_buffer {sym_name = "ddr_buffer_out_7"}: memref<2048 x i32> + %ext_buffer_in_7 = aie.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<2304 x i32> + %ext_buffer_out_7 = aie.external_buffer {sym_name = "ddr_buffer_out_7"}: memref<2048 x i32> - %ext_buffer_in_8 = AIE.external_buffer {sym_name = "ddr_buffer_in_8"}: memref<2304 x i32> - %ext_buffer_out_8 = AIE.external_buffer {sym_name = "ddr_buffer_out_8"}: memref<2048 x i32> + %ext_buffer_in_8 = aie.external_buffer {sym_name = "ddr_buffer_in_8"}: memref<2304 x i32> + %ext_buffer_out_8 = aie.external_buffer {sym_name = "ddr_buffer_out_8"}: memref<2048 x i32> - %ext_buffer_in_9 = AIE.external_buffer {sym_name = "ddr_buffer_in_9"}: memref<2304 x i32> - %ext_buffer_out_9 = AIE.external_buffer {sym_name = "ddr_buffer_out_9"}: memref<2048 x i32> + %ext_buffer_in_9 = aie.external_buffer {sym_name = "ddr_buffer_in_9"}: memref<2304 x i32> + %ext_buffer_out_9 = aie.external_buffer {sym_name = "ddr_buffer_out_9"}: memref<2048 x i32> - %ext_buffer_in_10 = AIE.external_buffer {sym_name = "ddr_buffer_in_10"}: memref<2304 x i32> - %ext_buffer_out_10 = AIE.external_buffer {sym_name = "ddr_buffer_out_10"}: memref<2048 x i32> + %ext_buffer_in_10 = aie.external_buffer {sym_name = "ddr_buffer_in_10"}: memref<2304 x i32> + %ext_buffer_out_10 = aie.external_buffer {sym_name = "ddr_buffer_out_10"}: memref<2048 x i32> - %ext_buffer_in_11 = AIE.external_buffer {sym_name = "ddr_buffer_in_11"}: memref<2304 x i32> - %ext_buffer_out_11 = AIE.external_buffer {sym_name = "ddr_buffer_out_11"}: memref<2048 x i32> + %ext_buffer_in_11 = aie.external_buffer {sym_name = "ddr_buffer_in_11"}: memref<2304 x i32> + %ext_buffer_out_11 = aie.external_buffer {sym_name = "ddr_buffer_out_11"}: memref<2048 x i32> - %ext_buffer_in_12 = AIE.external_buffer {sym_name = "ddr_buffer_in_12"}: memref<2304 x i32> - %ext_buffer_out_12 = AIE.external_buffer {sym_name = "ddr_buffer_out_12"}: memref<2048 x i32> + %ext_buffer_in_12 = aie.external_buffer {sym_name = "ddr_buffer_in_12"}: memref<2304 x i32> + %ext_buffer_out_12 = aie.external_buffer {sym_name = "ddr_buffer_out_12"}: memref<2048 x i32> - %ext_buffer_in_13 = AIE.external_buffer {sym_name = "ddr_buffer_in_13"}: memref<2304 x i32> - %ext_buffer_out_13 = AIE.external_buffer {sym_name = "ddr_buffer_out_13"}: memref<2048 x i32> + %ext_buffer_in_13 = aie.external_buffer {sym_name = "ddr_buffer_in_13"}: memref<2304 x i32> + %ext_buffer_out_13 = aie.external_buffer {sym_name = "ddr_buffer_out_13"}: memref<2048 x i32> - %ext_buffer_in_14 = AIE.external_buffer {sym_name = "ddr_buffer_in_14"}: memref<2304 x i32> - %ext_buffer_out_14 = AIE.external_buffer {sym_name = "ddr_buffer_out_14"}: memref<2048 x i32> + %ext_buffer_in_14 = aie.external_buffer {sym_name = "ddr_buffer_in_14"}: memref<2304 x i32> + %ext_buffer_out_14 = aie.external_buffer {sym_name = "ddr_buffer_out_14"}: memref<2048 x i32> - %ext_buffer_in_15 = AIE.external_buffer {sym_name = "ddr_buffer_in_15"}: memref<2304 x i32> - %ext_buffer_out_15 = AIE.external_buffer {sym_name = "ddr_buffer_out_15"}: memref<2048 x i32> + %ext_buffer_in_15 = aie.external_buffer {sym_name = "ddr_buffer_in_15"}: memref<2304 x i32> + %ext_buffer_out_15 = aie.external_buffer {sym_name = "ddr_buffer_out_15"}: memref<2048 x i32> - %ext_buffer_in_16 = AIE.external_buffer {sym_name = "ddr_buffer_in_16"}: memref<2304 x i32> - %ext_buffer_out_16 = AIE.external_buffer {sym_name = "ddr_buffer_out_16"}: memref<2048 x i32> + %ext_buffer_in_16 = aie.external_buffer {sym_name = "ddr_buffer_in_16"}: memref<2304 x i32> + %ext_buffer_out_16 = aie.external_buffer {sym_name = "ddr_buffer_out_16"}: memref<2048 x i32> - %ext_buffer_in_17 = AIE.external_buffer {sym_name = "ddr_buffer_in_17"}: memref<2304 x i32> - %ext_buffer_out_17 = AIE.external_buffer {sym_name = "ddr_buffer_out_17"}: memref<2048 x i32> + %ext_buffer_in_17 = aie.external_buffer {sym_name = "ddr_buffer_in_17"}: memref<2304 x i32> + %ext_buffer_out_17 = aie.external_buffer {sym_name = "ddr_buffer_out_17"}: memref<2048 x i32> - %ext_buffer_in_18 = AIE.external_buffer {sym_name = "ddr_buffer_in_18"}: memref<2304 x i32> - %ext_buffer_out_18 = AIE.external_buffer {sym_name = "ddr_buffer_out_18"}: memref<2048 x i32> + %ext_buffer_in_18 = aie.external_buffer {sym_name = "ddr_buffer_in_18"}: memref<2304 x i32> + %ext_buffer_out_18 = aie.external_buffer {sym_name = "ddr_buffer_out_18"}: memref<2048 x i32> - %ext_buffer_in_19 = AIE.external_buffer {sym_name = "ddr_buffer_in_19"}: memref<2304 x i32> - %ext_buffer_out_19 = AIE.external_buffer {sym_name = "ddr_buffer_out_19"}: memref<2048 x i32> + %ext_buffer_in_19 = aie.external_buffer {sym_name = "ddr_buffer_in_19"}: memref<2304 x i32> + %ext_buffer_out_19 = aie.external_buffer {sym_name = "ddr_buffer_out_19"}: memref<2048 x i32> - %ext_buffer_in_20 = AIE.external_buffer {sym_name = "ddr_buffer_in_20"}: memref<2304 x i32> - %ext_buffer_out_20 = AIE.external_buffer {sym_name = "ddr_buffer_out_20"}: memref<2048 x i32> + %ext_buffer_in_20 = aie.external_buffer {sym_name = "ddr_buffer_in_20"}: memref<2304 x i32> + %ext_buffer_out_20 = aie.external_buffer {sym_name = "ddr_buffer_out_20"}: memref<2048 x i32> - %ext_buffer_in_21 = AIE.external_buffer {sym_name = "ddr_buffer_in_21"}: memref<2304 x i32> - %ext_buffer_out_21 = AIE.external_buffer {sym_name = "ddr_buffer_out_21"}: memref<2048 x i32> + %ext_buffer_in_21 = aie.external_buffer {sym_name = "ddr_buffer_in_21"}: memref<2304 x i32> + %ext_buffer_out_21 = aie.external_buffer {sym_name = "ddr_buffer_out_21"}: memref<2048 x i32> - %ext_buffer_in_22 = AIE.external_buffer {sym_name = "ddr_buffer_in_22"}: memref<2304 x i32> - %ext_buffer_out_22 = AIE.external_buffer {sym_name = "ddr_buffer_out_22"}: memref<2048 x i32> + %ext_buffer_in_22 = aie.external_buffer {sym_name = "ddr_buffer_in_22"}: memref<2304 x i32> + %ext_buffer_out_22 = aie.external_buffer {sym_name = "ddr_buffer_out_22"}: memref<2048 x i32> - %ext_buffer_in_23 = AIE.external_buffer {sym_name = "ddr_buffer_in_23"}: memref<2304 x i32> - %ext_buffer_out_23 = AIE.external_buffer {sym_name = "ddr_buffer_out_23"}: memref<2048 x i32> + %ext_buffer_in_23 = aie.external_buffer {sym_name = "ddr_buffer_in_23"}: memref<2304 x i32> + %ext_buffer_out_23 = aie.external_buffer {sym_name = "ddr_buffer_out_23"}: memref<2048 x i32> - %ext_buffer_in_24 = AIE.external_buffer {sym_name = "ddr_buffer_in_24"}: memref<2304 x i32> - %ext_buffer_out_24 = AIE.external_buffer {sym_name = "ddr_buffer_out_24"}: memref<2048 x i32> + %ext_buffer_in_24 = aie.external_buffer {sym_name = "ddr_buffer_in_24"}: memref<2304 x i32> + %ext_buffer_out_24 = aie.external_buffer {sym_name = "ddr_buffer_out_24"}: memref<2048 x i32> - %ext_buffer_in_25 = AIE.external_buffer {sym_name = "ddr_buffer_in_25"}: memref<2304 x i32> - %ext_buffer_out_25 = AIE.external_buffer {sym_name = "ddr_buffer_out_25"}: memref<2048 x i32> + %ext_buffer_in_25 = aie.external_buffer {sym_name = "ddr_buffer_in_25"}: memref<2304 x i32> + %ext_buffer_out_25 = aie.external_buffer {sym_name = "ddr_buffer_out_25"}: memref<2048 x i32> - %ext_buffer_in_26 = AIE.external_buffer {sym_name = "ddr_buffer_in_26"}: memref<2304 x i32> - %ext_buffer_out_26 = AIE.external_buffer {sym_name = "ddr_buffer_out_26"}: memref<2048 x i32> + %ext_buffer_in_26 = aie.external_buffer {sym_name = "ddr_buffer_in_26"}: memref<2304 x i32> + %ext_buffer_out_26 = aie.external_buffer {sym_name = "ddr_buffer_out_26"}: memref<2048 x i32> - %ext_buffer_in_27 = AIE.external_buffer {sym_name = "ddr_buffer_in_27"}: memref<2304 x i32> - %ext_buffer_out_27 = AIE.external_buffer {sym_name = "ddr_buffer_out_27"}: memref<2048 x i32> + %ext_buffer_in_27 = aie.external_buffer {sym_name = "ddr_buffer_in_27"}: memref<2304 x i32> + %ext_buffer_out_27 = aie.external_buffer {sym_name = "ddr_buffer_out_27"}: memref<2048 x i32> - %ext_buffer_in_28 = AIE.external_buffer {sym_name = "ddr_buffer_in_28"}: memref<2304 x i32> - %ext_buffer_out_28 = AIE.external_buffer {sym_name = "ddr_buffer_out_28"}: memref<2048 x i32> + %ext_buffer_in_28 = aie.external_buffer {sym_name = "ddr_buffer_in_28"}: memref<2304 x i32> + %ext_buffer_out_28 = aie.external_buffer {sym_name = "ddr_buffer_out_28"}: memref<2048 x i32> - %ext_buffer_in_29 = AIE.external_buffer {sym_name = "ddr_buffer_in_29"}: memref<2304 x i32> - %ext_buffer_out_29 = AIE.external_buffer {sym_name = "ddr_buffer_out_29"}: memref<2048 x i32> + %ext_buffer_in_29 = aie.external_buffer {sym_name = "ddr_buffer_in_29"}: memref<2304 x i32> + %ext_buffer_out_29 = aie.external_buffer {sym_name = "ddr_buffer_out_29"}: memref<2048 x i32> - %ext_buffer_in_30 = AIE.external_buffer {sym_name = "ddr_buffer_in_30"}: memref<2304 x i32> - %ext_buffer_out_30 = AIE.external_buffer {sym_name = "ddr_buffer_out_30"}: memref<2048 x i32> + %ext_buffer_in_30 = aie.external_buffer {sym_name = "ddr_buffer_in_30"}: memref<2304 x i32> + %ext_buffer_out_30 = aie.external_buffer {sym_name = "ddr_buffer_out_30"}: memref<2048 x i32> - %ext_buffer_in_31 = AIE.external_buffer {sym_name = "ddr_buffer_in_31"}: memref<2304 x i32> - %ext_buffer_out_31 = AIE.external_buffer {sym_name = "ddr_buffer_out_31"}: memref<2048 x i32> + %ext_buffer_in_31 = aie.external_buffer {sym_name = "ddr_buffer_in_31"}: memref<2304 x i32> + %ext_buffer_out_31 = aie.external_buffer {sym_name = "ddr_buffer_out_31"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_in_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_4}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_out_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_4}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_in_shim_6 : !aie.objectfifo>, {%ext_buffer_in_4}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_out_shim_6 : !aie.objectfifo>, {%ext_buffer_out_4}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_in_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_5}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_out_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_5}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_in_shim_6 : !aie.objectfifo>, {%ext_buffer_in_5}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_out_shim_6 : !aie.objectfifo>, {%ext_buffer_out_5}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_in_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_6}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_out_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_6}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_in_shim_7 : !aie.objectfifo>, {%ext_buffer_in_6}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_out_shim_7 : !aie.objectfifo>, {%ext_buffer_out_6}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_in_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_7}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_out_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_7}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_in_shim_7 : !aie.objectfifo>, {%ext_buffer_in_7}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_out_shim_7 : !aie.objectfifo>, {%ext_buffer_out_7}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_in_shim_10 : !AIE.objectfifo>, {%ext_buffer_in_8}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_out_shim_10 : !AIE.objectfifo>, {%ext_buffer_out_8}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_in_shim_10 : !aie.objectfifo>, {%ext_buffer_in_8}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_8_buf_out_shim_10 : !aie.objectfifo>, {%ext_buffer_out_8}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_in_shim_10 : !AIE.objectfifo>, {%ext_buffer_in_9}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_out_shim_10 : !AIE.objectfifo>, {%ext_buffer_out_9}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_in_shim_10 : !aie.objectfifo>, {%ext_buffer_in_9}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile10_0, %block_9_buf_out_shim_10 : !aie.objectfifo>, {%ext_buffer_out_9}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_in_shim_11 : !AIE.objectfifo>, {%ext_buffer_in_10}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_out_shim_11 : !AIE.objectfifo>, {%ext_buffer_out_10}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_in_shim_11 : !aie.objectfifo>, {%ext_buffer_in_10}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_10_buf_out_shim_11 : !aie.objectfifo>, {%ext_buffer_out_10}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_in_shim_11 : !AIE.objectfifo>, {%ext_buffer_in_11}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_out_shim_11 : !AIE.objectfifo>, {%ext_buffer_out_11}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_in_shim_11 : !aie.objectfifo>, {%ext_buffer_in_11}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile11_0, %block_11_buf_out_shim_11 : !aie.objectfifo>, {%ext_buffer_out_11}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_in_shim_18 : !AIE.objectfifo>, {%ext_buffer_in_12}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_out_shim_18 : !AIE.objectfifo>, {%ext_buffer_out_12}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_in_shim_18 : !aie.objectfifo>, {%ext_buffer_in_12}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_12_buf_out_shim_18 : !aie.objectfifo>, {%ext_buffer_out_12}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_in_shim_18 : !AIE.objectfifo>, {%ext_buffer_in_13}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_out_shim_18 : !AIE.objectfifo>, {%ext_buffer_out_13}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_in_shim_18 : !aie.objectfifo>, {%ext_buffer_in_13}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile18_0, %block_13_buf_out_shim_18 : !aie.objectfifo>, {%ext_buffer_out_13}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_in_shim_19 : !AIE.objectfifo>, {%ext_buffer_in_14}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_out_shim_19 : !AIE.objectfifo>, {%ext_buffer_out_14}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_in_shim_19 : !aie.objectfifo>, {%ext_buffer_in_14}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_14_buf_out_shim_19 : !aie.objectfifo>, {%ext_buffer_out_14}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_in_shim_19 : !AIE.objectfifo>, {%ext_buffer_in_15}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_out_shim_19 : !AIE.objectfifo>, {%ext_buffer_out_15}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_in_shim_19 : !aie.objectfifo>, {%ext_buffer_in_15}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile19_0, %block_15_buf_out_shim_19 : !aie.objectfifo>, {%ext_buffer_out_15}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %block_16_buf_in_shim_26 : !AIE.objectfifo>, {%ext_buffer_in_16}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %block_16_buf_out_shim_26 : !AIE.objectfifo>, {%ext_buffer_out_16}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %block_16_buf_in_shim_26 : !aie.objectfifo>, {%ext_buffer_in_16}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %block_16_buf_out_shim_26 : !aie.objectfifo>, {%ext_buffer_out_16}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %block_17_buf_in_shim_26 : !AIE.objectfifo>, {%ext_buffer_in_17}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile26_0, %block_17_buf_out_shim_26 : !AIE.objectfifo>, {%ext_buffer_out_17}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %block_17_buf_in_shim_26 : !aie.objectfifo>, {%ext_buffer_in_17}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile26_0, %block_17_buf_out_shim_26 : !aie.objectfifo>, {%ext_buffer_out_17}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %block_18_buf_in_shim_27 : !AIE.objectfifo>, {%ext_buffer_in_18}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %block_18_buf_out_shim_27 : !AIE.objectfifo>, {%ext_buffer_out_18}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %block_18_buf_in_shim_27 : !aie.objectfifo>, {%ext_buffer_in_18}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %block_18_buf_out_shim_27 : !aie.objectfifo>, {%ext_buffer_out_18}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %block_19_buf_in_shim_27 : !AIE.objectfifo>, {%ext_buffer_in_19}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile27_0, %block_19_buf_out_shim_27 : !AIE.objectfifo>, {%ext_buffer_out_19}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %block_19_buf_in_shim_27 : !aie.objectfifo>, {%ext_buffer_in_19}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile27_0, %block_19_buf_out_shim_27 : !aie.objectfifo>, {%ext_buffer_out_19}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %block_20_buf_in_shim_34 : !AIE.objectfifo>, {%ext_buffer_in_20}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %block_20_buf_out_shim_34 : !AIE.objectfifo>, {%ext_buffer_out_20}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %block_20_buf_in_shim_34 : !aie.objectfifo>, {%ext_buffer_in_20}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %block_20_buf_out_shim_34 : !aie.objectfifo>, {%ext_buffer_out_20}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %block_21_buf_in_shim_34 : !AIE.objectfifo>, {%ext_buffer_in_21}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile34_0, %block_21_buf_out_shim_34 : !AIE.objectfifo>, {%ext_buffer_out_21}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %block_21_buf_in_shim_34 : !aie.objectfifo>, {%ext_buffer_in_21}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile34_0, %block_21_buf_out_shim_34 : !aie.objectfifo>, {%ext_buffer_out_21}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %block_22_buf_in_shim_35 : !AIE.objectfifo>, {%ext_buffer_in_22}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %block_22_buf_out_shim_35 : !AIE.objectfifo>, {%ext_buffer_out_22}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %block_22_buf_in_shim_35 : !aie.objectfifo>, {%ext_buffer_in_22}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %block_22_buf_out_shim_35 : !aie.objectfifo>, {%ext_buffer_out_22}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %block_23_buf_in_shim_35 : !AIE.objectfifo>, {%ext_buffer_in_23}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile35_0, %block_23_buf_out_shim_35 : !AIE.objectfifo>, {%ext_buffer_out_23}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %block_23_buf_in_shim_35 : !aie.objectfifo>, {%ext_buffer_in_23}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile35_0, %block_23_buf_out_shim_35 : !aie.objectfifo>, {%ext_buffer_out_23}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %block_24_buf_in_shim_42 : !AIE.objectfifo>, {%ext_buffer_in_24}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %block_24_buf_out_shim_42 : !AIE.objectfifo>, {%ext_buffer_out_24}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %block_24_buf_in_shim_42 : !aie.objectfifo>, {%ext_buffer_in_24}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %block_24_buf_out_shim_42 : !aie.objectfifo>, {%ext_buffer_out_24}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %block_25_buf_in_shim_42 : !AIE.objectfifo>, {%ext_buffer_in_25}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile42_0, %block_25_buf_out_shim_42 : !AIE.objectfifo>, {%ext_buffer_out_25}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %block_25_buf_in_shim_42 : !aie.objectfifo>, {%ext_buffer_in_25}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile42_0, %block_25_buf_out_shim_42 : !aie.objectfifo>, {%ext_buffer_out_25}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %block_26_buf_in_shim_43 : !AIE.objectfifo>, {%ext_buffer_in_26}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %block_26_buf_out_shim_43 : !AIE.objectfifo>, {%ext_buffer_out_26}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %block_26_buf_in_shim_43 : !aie.objectfifo>, {%ext_buffer_in_26}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %block_26_buf_out_shim_43 : !aie.objectfifo>, {%ext_buffer_out_26}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %block_27_buf_in_shim_43 : !AIE.objectfifo>, {%ext_buffer_in_27}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile43_0, %block_27_buf_out_shim_43 : !AIE.objectfifo>, {%ext_buffer_out_27}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %block_27_buf_in_shim_43 : !aie.objectfifo>, {%ext_buffer_in_27}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile43_0, %block_27_buf_out_shim_43 : !aie.objectfifo>, {%ext_buffer_out_27}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %block_28_buf_in_shim_46 : !AIE.objectfifo>, {%ext_buffer_in_28}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %block_28_buf_out_shim_46 : !AIE.objectfifo>, {%ext_buffer_out_28}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %block_28_buf_in_shim_46 : !aie.objectfifo>, {%ext_buffer_in_28}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %block_28_buf_out_shim_46 : !aie.objectfifo>, {%ext_buffer_out_28}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %block_29_buf_in_shim_46 : !AIE.objectfifo>, {%ext_buffer_in_29}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile46_0, %block_29_buf_out_shim_46 : !AIE.objectfifo>, {%ext_buffer_out_29}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %block_29_buf_in_shim_46 : !aie.objectfifo>, {%ext_buffer_in_29}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile46_0, %block_29_buf_out_shim_46 : !aie.objectfifo>, {%ext_buffer_out_29}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %block_30_buf_in_shim_47 : !AIE.objectfifo>, {%ext_buffer_in_30}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %block_30_buf_out_shim_47 : !AIE.objectfifo>, {%ext_buffer_out_30}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %block_30_buf_in_shim_47 : !aie.objectfifo>, {%ext_buffer_in_30}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %block_30_buf_out_shim_47 : !aie.objectfifo>, {%ext_buffer_out_30}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %block_31_buf_in_shim_47 : !AIE.objectfifo>, {%ext_buffer_in_31}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile47_0, %block_31_buf_out_shim_47 : !AIE.objectfifo>, {%ext_buffer_out_31}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %block_31_buf_in_shim_47 : !aie.objectfifo>, {%ext_buffer_in_31}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile47_0, %block_31_buf_out_shim_47 : !aie.objectfifo>, {%ext_buffer_out_31}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock02_14, "Acquire", 0) // start the timer + aie.use_lock(%lock02_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1541,354 +1541,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock22_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock22_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_5 = AIE.core(%tile0_5) { + %block_1_core0_5 = aie.core(%tile0_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_5 = AIE.core(%tile1_5) { + %block_1_core1_5 = aie.core(%tile1_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_5 = AIE.core(%tile2_5) { + %block_1_core2_5 = aie.core(%tile2_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_6 = AIE.core(%tile0_6) { + %block_1_core0_6 = aie.core(%tile0_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock06_14, "Acquire", 0) // start the timer + aie.use_lock(%lock06_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_6 = AIE.core(%tile1_6) { + %block_1_core1_6 = aie.core(%tile1_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_1_core2_6 = AIE.core(%tile2_6) { + %block_1_core2_6 = aie.core(%tile2_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1896,354 +1896,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock26_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock26_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_7 = AIE.core(%tile0_7) { + %block_1_core0_7 = aie.core(%tile0_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_7 = AIE.core(%tile1_7) { + %block_1_core1_7 = aie.core(%tile1_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_7 = AIE.core(%tile2_7) { + %block_1_core2_7 = aie.core(%tile2_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_8 = AIE.core(%tile0_8) { + %block_1_core0_8 = aie.core(%tile0_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_8 = AIE.core(%tile1_8) { + %block_1_core1_8 = aie.core(%tile1_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_8 = AIE.core(%tile2_8) { + %block_1_core2_8 = aie.core(%tile2_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_1 = AIE.core(%tile3_1) { + %block_2_core3_1 = aie.core(%tile3_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_1 = AIE.core(%tile4_1) { + %block_2_core4_1 = aie.core(%tile4_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_1 = AIE.core(%tile5_1) { + %block_2_core5_1 = aie.core(%tile5_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_2 = AIE.core(%tile3_2) { + %block_2_core3_2 = aie.core(%tile3_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock32_14, "Acquire", 0) // start the timer + aie.use_lock(%lock32_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_2 = AIE.core(%tile4_2) { + %block_2_core4_2 = aie.core(%tile4_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_2_core5_2 = AIE.core(%tile5_2) { + %block_2_core5_2 = aie.core(%tile5_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -2251,354 +2251,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock52_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock52_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_3 = AIE.core(%tile3_3) { + %block_2_core3_3 = aie.core(%tile3_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_3 = AIE.core(%tile4_3) { + %block_2_core4_3 = aie.core(%tile4_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_3 = AIE.core(%tile5_3) { + %block_2_core5_3 = aie.core(%tile5_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_4 = AIE.core(%tile3_4) { + %block_2_core3_4 = aie.core(%tile3_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_4 = AIE.core(%tile4_4) { + %block_2_core4_4 = aie.core(%tile4_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_4 = AIE.core(%tile5_4) { + %block_2_core5_4 = aie.core(%tile5_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_5 = AIE.core(%tile3_5) { + %block_3_core3_5 = aie.core(%tile3_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_5 = AIE.core(%tile4_5) { + %block_3_core4_5 = aie.core(%tile4_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_5 = AIE.core(%tile5_5) { + %block_3_core5_5 = aie.core(%tile5_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_6 = AIE.core(%tile3_6) { + %block_3_core3_6 = aie.core(%tile3_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock36_14, "Acquire", 0) // start the timer + aie.use_lock(%lock36_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_6 = AIE.core(%tile4_6) { + %block_3_core4_6 = aie.core(%tile4_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_3_core5_6 = AIE.core(%tile5_6) { + %block_3_core5_6 = aie.core(%tile5_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -2606,354 +2606,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock56_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock56_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_7 = AIE.core(%tile3_7) { + %block_3_core3_7 = aie.core(%tile3_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_7 = AIE.core(%tile4_7) { + %block_3_core4_7 = aie.core(%tile4_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_7 = AIE.core(%tile5_7) { + %block_3_core5_7 = aie.core(%tile5_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_8 = AIE.core(%tile3_8) { + %block_3_core3_8 = aie.core(%tile3_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_8 = AIE.core(%tile4_8) { + %block_3_core4_8 = aie.core(%tile4_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_8 = AIE.core(%tile5_8) { + %block_3_core5_8 = aie.core(%tile5_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_1 = AIE.core(%tile6_1) { + %block_4_core6_1 = aie.core(%tile6_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_1 = AIE.core(%tile7_1) { + %block_4_core7_1 = aie.core(%tile7_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_1 = AIE.core(%tile8_1) { + %block_4_core8_1 = aie.core(%tile8_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_2 = AIE.core(%tile6_2) { + %block_4_core6_2 = aie.core(%tile6_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock62_14, "Acquire", 0) // start the timer + aie.use_lock(%lock62_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_2 = AIE.core(%tile7_2) { + %block_4_core7_2 = aie.core(%tile7_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_4_core8_2 = AIE.core(%tile8_2) { + %block_4_core8_2 = aie.core(%tile8_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_out_shim_6: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_out_shim_6: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -2961,354 +2961,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_out_shim_6:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_out_shim_6:!aie.objectfifo>, 4) } - AIE.use_lock(%lock82_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock82_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_3 = AIE.core(%tile6_3) { + %block_4_core6_3 = aie.core(%tile6_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_3 = AIE.core(%tile7_3) { + %block_4_core7_3 = aie.core(%tile7_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_3 = AIE.core(%tile8_3) { + %block_4_core8_3 = aie.core(%tile8_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_4 = AIE.core(%tile6_4) { + %block_4_core6_4 = aie.core(%tile6_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_4 = AIE.core(%tile7_4) { + %block_4_core7_4 = aie.core(%tile7_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_4 = AIE.core(%tile8_4) { + %block_4_core8_4 = aie.core(%tile8_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_5 = AIE.core(%tile6_5) { + %block_5_core6_5 = aie.core(%tile6_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_5 = AIE.core(%tile7_5) { + %block_5_core7_5 = aie.core(%tile7_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_5 = AIE.core(%tile8_5) { + %block_5_core8_5 = aie.core(%tile8_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_6 = AIE.core(%tile6_6) { + %block_5_core6_6 = aie.core(%tile6_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock66_14, "Acquire", 0) // start the timer + aie.use_lock(%lock66_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_6 = AIE.core(%tile7_6) { + %block_5_core7_6 = aie.core(%tile7_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_5_core8_6 = AIE.core(%tile8_6) { + %block_5_core8_6 = aie.core(%tile8_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_out_shim_6: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_out_shim_6: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -3316,354 +3316,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_out_shim_6:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_out_shim_6:!aie.objectfifo>, 4) } - AIE.use_lock(%lock86_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock86_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_7 = AIE.core(%tile6_7) { + %block_5_core6_7 = aie.core(%tile6_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_7 = AIE.core(%tile7_7) { + %block_5_core7_7 = aie.core(%tile7_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_7 = AIE.core(%tile8_7) { + %block_5_core8_7 = aie.core(%tile8_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_8 = AIE.core(%tile6_8) { + %block_5_core6_8 = aie.core(%tile6_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_8 = AIE.core(%tile7_8) { + %block_5_core7_8 = aie.core(%tile7_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_8 = AIE.core(%tile8_8) { + %block_5_core8_8 = aie.core(%tile8_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_1 = AIE.core(%tile9_1) { + %block_6_core9_1 = aie.core(%tile9_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_1 = AIE.core(%tile10_1) { + %block_6_core10_1 = aie.core(%tile10_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_1 = AIE.core(%tile11_1) { + %block_6_core11_1 = aie.core(%tile11_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_2 = AIE.core(%tile9_2) { + %block_6_core9_2 = aie.core(%tile9_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock92_14, "Acquire", 0) // start the timer + aie.use_lock(%lock92_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_2 = AIE.core(%tile10_2) { + %block_6_core10_2 = aie.core(%tile10_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_6_core11_2 = AIE.core(%tile11_2) { + %block_6_core11_2 = aie.core(%tile11_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_out_shim_7: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_out_shim_7: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -3671,354 +3671,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_out_shim_7:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_out_shim_7:!aie.objectfifo>, 4) } - AIE.use_lock(%lock112_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock112_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_3 = AIE.core(%tile9_3) { + %block_6_core9_3 = aie.core(%tile9_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_3 = AIE.core(%tile10_3) { + %block_6_core10_3 = aie.core(%tile10_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_3 = AIE.core(%tile11_3) { + %block_6_core11_3 = aie.core(%tile11_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_4 = AIE.core(%tile9_4) { + %block_6_core9_4 = aie.core(%tile9_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_4 = AIE.core(%tile10_4) { + %block_6_core10_4 = aie.core(%tile10_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_4 = AIE.core(%tile11_4) { + %block_6_core11_4 = aie.core(%tile11_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_5 = AIE.core(%tile9_5) { + %block_7_core9_5 = aie.core(%tile9_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_5 = AIE.core(%tile10_5) { + %block_7_core10_5 = aie.core(%tile10_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_5 = AIE.core(%tile11_5) { + %block_7_core11_5 = aie.core(%tile11_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_6 = AIE.core(%tile9_6) { + %block_7_core9_6 = aie.core(%tile9_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock96_14, "Acquire", 0) // start the timer + aie.use_lock(%lock96_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_6 = AIE.core(%tile10_6) { + %block_7_core10_6 = aie.core(%tile10_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_7_core11_6 = AIE.core(%tile11_6) { + %block_7_core11_6 = aie.core(%tile11_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_out_shim_7: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_out_shim_7: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -4026,354 +4026,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_out_shim_7:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_out_shim_7:!aie.objectfifo>, 4) } - AIE.use_lock(%lock116_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock116_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_7 = AIE.core(%tile9_7) { + %block_7_core9_7 = aie.core(%tile9_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_7 = AIE.core(%tile10_7) { + %block_7_core10_7 = aie.core(%tile10_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_7 = AIE.core(%tile11_7) { + %block_7_core11_7 = aie.core(%tile11_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_8 = AIE.core(%tile9_8) { + %block_7_core9_8 = aie.core(%tile9_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_8 = AIE.core(%tile10_8) { + %block_7_core10_8 = aie.core(%tile10_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_8 = AIE.core(%tile11_8) { + %block_7_core11_8 = aie.core(%tile11_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_1 = AIE.core(%tile12_1) { + %block_8_core12_1 = aie.core(%tile12_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_1 = AIE.core(%tile13_1) { + %block_8_core13_1 = aie.core(%tile13_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_8_core14_1 = AIE.core(%tile14_1) { + %block_8_core14_1 = aie.core(%tile14_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_2 = AIE.core(%tile12_2) { + %block_8_core12_2 = aie.core(%tile12_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock122_14, "Acquire", 0) // start the timer + aie.use_lock(%lock122_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_2 = AIE.core(%tile13_2) { + %block_8_core13_2 = aie.core(%tile13_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_8_core14_2 = AIE.core(%tile14_2) { + %block_8_core14_2 = aie.core(%tile14_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_out_shim_10: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_out_shim_10: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -4381,354 +4381,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_out_shim_10:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_out_shim_10:!aie.objectfifo>, 4) } - AIE.use_lock(%lock142_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock142_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_3 = AIE.core(%tile12_3) { + %block_8_core12_3 = aie.core(%tile12_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_3 = AIE.core(%tile13_3) { + %block_8_core13_3 = aie.core(%tile13_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_8_core14_3 = AIE.core(%tile14_3) { + %block_8_core14_3 = aie.core(%tile14_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_8_core12_4 = AIE.core(%tile12_4) { + %block_8_core12_4 = aie.core(%tile12_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_8_core13_4 = AIE.core(%tile13_4) { + %block_8_core13_4 = aie.core(%tile13_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_8_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_8_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_8_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_8_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_8_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_8_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_8_core14_4 = AIE.core(%tile14_4) { + %block_8_core14_4 = aie.core(%tile14_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_8_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_8_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_8_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_8_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_8_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_8_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_5 = AIE.core(%tile12_5) { + %block_9_core12_5 = aie.core(%tile12_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_5 = AIE.core(%tile13_5) { + %block_9_core13_5 = aie.core(%tile13_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_9_core14_5 = AIE.core(%tile14_5) { + %block_9_core14_5 = aie.core(%tile14_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_6 = AIE.core(%tile12_6) { + %block_9_core12_6 = aie.core(%tile12_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock126_14, "Acquire", 0) // start the timer + aie.use_lock(%lock126_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_6 = AIE.core(%tile13_6) { + %block_9_core13_6 = aie.core(%tile13_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_9_core14_6 = AIE.core(%tile14_6) { + %block_9_core14_6 = aie.core(%tile14_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_out_shim_10: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_out_shim_10: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -4736,354 +4736,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_out_shim_10:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_out_shim_10:!aie.objectfifo>, 4) } - AIE.use_lock(%lock146_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock146_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_7 = AIE.core(%tile12_7) { + %block_9_core12_7 = aie.core(%tile12_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_7 = AIE.core(%tile13_7) { + %block_9_core13_7 = aie.core(%tile13_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_9_core14_7 = AIE.core(%tile14_7) { + %block_9_core14_7 = aie.core(%tile14_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_9_core12_8 = AIE.core(%tile12_8) { + %block_9_core12_8 = aie.core(%tile12_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_9_core13_8 = AIE.core(%tile13_8) { + %block_9_core13_8 = aie.core(%tile13_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_9_buf_in_shim_10: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_9_buf_in_shim_10: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_9_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_9_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_9_buf_in_shim_10: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_9_buf_in_shim_10: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_9_core14_8 = AIE.core(%tile14_8) { + %block_9_core14_8 = aie.core(%tile14_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_9_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_9_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_9_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_9_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_9_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_9_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_1 = AIE.core(%tile15_1) { + %block_10_core15_1 = aie.core(%tile15_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_1 = AIE.core(%tile16_1) { + %block_10_core16_1 = aie.core(%tile16_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_10_core17_1 = AIE.core(%tile17_1) { + %block_10_core17_1 = aie.core(%tile17_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_2 = AIE.core(%tile15_2) { + %block_10_core15_2 = aie.core(%tile15_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock152_14, "Acquire", 0) // start the timer + aie.use_lock(%lock152_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_2 = AIE.core(%tile16_2) { + %block_10_core16_2 = aie.core(%tile16_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_10_core17_2 = AIE.core(%tile17_2) { + %block_10_core17_2 = aie.core(%tile17_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_out_shim_11: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_out_shim_11: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -5091,354 +5091,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_out_shim_11:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_out_shim_11:!aie.objectfifo>, 4) } - AIE.use_lock(%lock172_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock172_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_3 = AIE.core(%tile15_3) { + %block_10_core15_3 = aie.core(%tile15_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_3 = AIE.core(%tile16_3) { + %block_10_core16_3 = aie.core(%tile16_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_10_core17_3 = AIE.core(%tile17_3) { + %block_10_core17_3 = aie.core(%tile17_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_10_core15_4 = AIE.core(%tile15_4) { + %block_10_core15_4 = aie.core(%tile15_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_10_core16_4 = AIE.core(%tile16_4) { + %block_10_core16_4 = aie.core(%tile16_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_10_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_10_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_10_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_10_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_10_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_10_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_10_core17_4 = AIE.core(%tile17_4) { + %block_10_core17_4 = aie.core(%tile17_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_10_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_10_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_10_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_10_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_10_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_10_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_5 = AIE.core(%tile15_5) { + %block_11_core15_5 = aie.core(%tile15_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_5 = AIE.core(%tile16_5) { + %block_11_core16_5 = aie.core(%tile16_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_11_core17_5 = AIE.core(%tile17_5) { + %block_11_core17_5 = aie.core(%tile17_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_6 = AIE.core(%tile15_6) { + %block_11_core15_6 = aie.core(%tile15_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock156_14, "Acquire", 0) // start the timer + aie.use_lock(%lock156_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_6 = AIE.core(%tile16_6) { + %block_11_core16_6 = aie.core(%tile16_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_11_core17_6 = AIE.core(%tile17_6) { + %block_11_core17_6 = aie.core(%tile17_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_out_shim_11: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_out_shim_11: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -5446,354 +5446,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_out_shim_11:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_out_shim_11:!aie.objectfifo>, 4) } - AIE.use_lock(%lock176_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock176_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_7 = AIE.core(%tile15_7) { + %block_11_core15_7 = aie.core(%tile15_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_7 = AIE.core(%tile16_7) { + %block_11_core16_7 = aie.core(%tile16_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_11_core17_7 = AIE.core(%tile17_7) { + %block_11_core17_7 = aie.core(%tile17_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_11_core15_8 = AIE.core(%tile15_8) { + %block_11_core15_8 = aie.core(%tile15_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_11_core16_8 = AIE.core(%tile16_8) { + %block_11_core16_8 = aie.core(%tile16_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_11_buf_in_shim_11: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_11_buf_in_shim_11: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_11_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_11_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_11_buf_in_shim_11: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_11_buf_in_shim_11: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_11_core17_8 = AIE.core(%tile17_8) { + %block_11_core17_8 = aie.core(%tile17_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_11_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_11_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_11_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_11_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_11_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_11_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_1 = AIE.core(%tile18_1) { + %block_12_core18_1 = aie.core(%tile18_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_1 = AIE.core(%tile19_1) { + %block_12_core19_1 = aie.core(%tile19_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_12_core20_1 = AIE.core(%tile20_1) { + %block_12_core20_1 = aie.core(%tile20_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_2 = AIE.core(%tile18_2) { + %block_12_core18_2 = aie.core(%tile18_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock182_14, "Acquire", 0) // start the timer + aie.use_lock(%lock182_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_2 = AIE.core(%tile19_2) { + %block_12_core19_2 = aie.core(%tile19_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_12_core20_2 = AIE.core(%tile20_2) { + %block_12_core20_2 = aie.core(%tile20_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_out_shim_18: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_out_shim_18: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -5801,354 +5801,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_out_shim_18:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_out_shim_18:!aie.objectfifo>, 4) } - AIE.use_lock(%lock202_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock202_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_3 = AIE.core(%tile18_3) { + %block_12_core18_3 = aie.core(%tile18_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_3 = AIE.core(%tile19_3) { + %block_12_core19_3 = aie.core(%tile19_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_12_core20_3 = AIE.core(%tile20_3) { + %block_12_core20_3 = aie.core(%tile20_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_12_core18_4 = AIE.core(%tile18_4) { + %block_12_core18_4 = aie.core(%tile18_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_12_core19_4 = AIE.core(%tile19_4) { + %block_12_core19_4 = aie.core(%tile19_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_12_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_12_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_12_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_12_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_12_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_12_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_12_core20_4 = AIE.core(%tile20_4) { + %block_12_core20_4 = aie.core(%tile20_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_12_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_12_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_12_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_12_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_12_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_12_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_5 = AIE.core(%tile18_5) { + %block_13_core18_5 = aie.core(%tile18_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_5 = AIE.core(%tile19_5) { + %block_13_core19_5 = aie.core(%tile19_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_13_core20_5 = AIE.core(%tile20_5) { + %block_13_core20_5 = aie.core(%tile20_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_6 = AIE.core(%tile18_6) { + %block_13_core18_6 = aie.core(%tile18_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock186_14, "Acquire", 0) // start the timer + aie.use_lock(%lock186_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_6 = AIE.core(%tile19_6) { + %block_13_core19_6 = aie.core(%tile19_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_13_core20_6 = AIE.core(%tile20_6) { + %block_13_core20_6 = aie.core(%tile20_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_out_shim_18: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_out_shim_18: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -6156,354 +6156,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_out_shim_18:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_out_shim_18:!aie.objectfifo>, 4) } - AIE.use_lock(%lock206_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock206_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_7 = AIE.core(%tile18_7) { + %block_13_core18_7 = aie.core(%tile18_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_7 = AIE.core(%tile19_7) { + %block_13_core19_7 = aie.core(%tile19_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_13_core20_7 = AIE.core(%tile20_7) { + %block_13_core20_7 = aie.core(%tile20_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_13_core18_8 = AIE.core(%tile18_8) { + %block_13_core18_8 = aie.core(%tile18_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_13_core19_8 = AIE.core(%tile19_8) { + %block_13_core19_8 = aie.core(%tile19_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_13_buf_in_shim_18: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_13_buf_in_shim_18: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_13_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_13_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_13_buf_in_shim_18: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_13_buf_in_shim_18: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_13_core20_8 = AIE.core(%tile20_8) { + %block_13_core20_8 = aie.core(%tile20_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_13_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_13_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_13_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_13_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_13_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_13_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_1 = AIE.core(%tile21_1) { + %block_14_core21_1 = aie.core(%tile21_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_1 = AIE.core(%tile22_1) { + %block_14_core22_1 = aie.core(%tile22_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_14_core23_1 = AIE.core(%tile23_1) { + %block_14_core23_1 = aie.core(%tile23_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_2 = AIE.core(%tile21_2) { + %block_14_core21_2 = aie.core(%tile21_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock212_14, "Acquire", 0) // start the timer + aie.use_lock(%lock212_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_2 = AIE.core(%tile22_2) { + %block_14_core22_2 = aie.core(%tile22_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_14_core23_2 = AIE.core(%tile23_2) { + %block_14_core23_2 = aie.core(%tile23_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_out_shim_19: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_out_shim_19: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -6511,354 +6511,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_out_shim_19:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_out_shim_19:!aie.objectfifo>, 4) } - AIE.use_lock(%lock232_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock232_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_3 = AIE.core(%tile21_3) { + %block_14_core21_3 = aie.core(%tile21_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_3 = AIE.core(%tile22_3) { + %block_14_core22_3 = aie.core(%tile22_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_14_core23_3 = AIE.core(%tile23_3) { + %block_14_core23_3 = aie.core(%tile23_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_14_core21_4 = AIE.core(%tile21_4) { + %block_14_core21_4 = aie.core(%tile21_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_14_core22_4 = AIE.core(%tile22_4) { + %block_14_core22_4 = aie.core(%tile22_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_14_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_14_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_14_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_14_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_14_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_14_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_14_core23_4 = AIE.core(%tile23_4) { + %block_14_core23_4 = aie.core(%tile23_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_14_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_14_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_14_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_14_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_14_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_14_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_5 = AIE.core(%tile21_5) { + %block_15_core21_5 = aie.core(%tile21_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_5 = AIE.core(%tile22_5) { + %block_15_core22_5 = aie.core(%tile22_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_15_core23_5 = AIE.core(%tile23_5) { + %block_15_core23_5 = aie.core(%tile23_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_6 = AIE.core(%tile21_6) { + %block_15_core21_6 = aie.core(%tile21_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock216_14, "Acquire", 0) // start the timer + aie.use_lock(%lock216_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_6 = AIE.core(%tile22_6) { + %block_15_core22_6 = aie.core(%tile22_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_15_core23_6 = AIE.core(%tile23_6) { + %block_15_core23_6 = aie.core(%tile23_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_out_shim_19: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_out_shim_19: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -6866,354 +6866,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_out_shim_19:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_out_shim_19:!aie.objectfifo>, 4) } - AIE.use_lock(%lock236_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock236_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_7 = AIE.core(%tile21_7) { + %block_15_core21_7 = aie.core(%tile21_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_7 = AIE.core(%tile22_7) { + %block_15_core22_7 = aie.core(%tile22_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_15_core23_7 = AIE.core(%tile23_7) { + %block_15_core23_7 = aie.core(%tile23_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_15_core21_8 = AIE.core(%tile21_8) { + %block_15_core21_8 = aie.core(%tile21_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_15_core22_8 = AIE.core(%tile22_8) { + %block_15_core22_8 = aie.core(%tile22_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_15_buf_in_shim_19: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_15_buf_in_shim_19: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_15_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_15_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_15_buf_in_shim_19: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_15_buf_in_shim_19: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_15_core23_8 = AIE.core(%tile23_8) { + %block_15_core23_8 = aie.core(%tile23_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_15_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_15_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_15_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_15_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_15_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_15_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_16_core24_1 = AIE.core(%tile24_1) { + %block_16_core24_1 = aie.core(%tile24_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_16_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_16_core25_1 = AIE.core(%tile25_1) { + %block_16_core25_1 = aie.core(%tile25_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_16_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_16_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_16_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_16_core26_1 = AIE.core(%tile26_1) { + %block_16_core26_1 = aie.core(%tile26_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_16_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_16_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_16_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_16_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_16_core24_2 = AIE.core(%tile24_2) { + %block_16_core24_2 = aie.core(%tile24_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock242_14, "Acquire", 0) // start the timer + aie.use_lock(%lock242_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_16_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_16_core25_2 = AIE.core(%tile25_2) { + %block_16_core25_2 = aie.core(%tile25_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_16_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_16_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_16_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_16_core26_2 = AIE.core(%tile26_2) { + %block_16_core26_2 = aie.core(%tile26_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_16_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_16_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_16_buf_out_shim_26: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_16_buf_out_shim_26: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_16_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_16_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_16_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_16_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_16_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_16_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -7221,354 +7221,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_16_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_16_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_16_buf_out_shim_26:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_out_shim_26:!aie.objectfifo>, 4) } - AIE.use_lock(%lock262_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock262_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_16_core24_3 = AIE.core(%tile24_3) { + %block_16_core24_3 = aie.core(%tile24_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_16_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_16_core25_3 = AIE.core(%tile25_3) { + %block_16_core25_3 = aie.core(%tile25_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_16_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_16_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_16_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_16_core26_3 = AIE.core(%tile26_3) { + %block_16_core26_3 = aie.core(%tile26_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_16_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_16_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_16_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_16_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_16_core24_4 = AIE.core(%tile24_4) { + %block_16_core24_4 = aie.core(%tile24_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_16_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_16_core25_4 = AIE.core(%tile25_4) { + %block_16_core25_4 = aie.core(%tile25_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_16_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_16_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_16_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_16_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_16_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_16_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_16_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_16_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_16_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_16_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_16_core26_4 = AIE.core(%tile26_4) { + %block_16_core26_4 = aie.core(%tile26_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_16_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_16_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_16_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_16_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_16_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_16_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_16_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_16_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_17_core24_5 = AIE.core(%tile24_5) { + %block_17_core24_5 = aie.core(%tile24_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_17_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_17_core25_5 = AIE.core(%tile25_5) { + %block_17_core25_5 = aie.core(%tile25_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_17_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_17_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_17_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_17_core26_5 = AIE.core(%tile26_5) { + %block_17_core26_5 = aie.core(%tile26_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_17_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_17_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_17_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_17_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_17_core24_6 = AIE.core(%tile24_6) { + %block_17_core24_6 = aie.core(%tile24_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock246_14, "Acquire", 0) // start the timer + aie.use_lock(%lock246_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_17_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_17_core25_6 = AIE.core(%tile25_6) { + %block_17_core25_6 = aie.core(%tile25_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_17_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_17_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_17_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_17_core26_6 = AIE.core(%tile26_6) { + %block_17_core26_6 = aie.core(%tile26_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_17_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_17_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_17_buf_out_shim_26: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_17_buf_out_shim_26: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_17_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_17_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_17_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_17_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_17_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_17_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -7576,354 +7576,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_17_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_17_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_17_buf_out_shim_26:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_out_shim_26:!aie.objectfifo>, 4) } - AIE.use_lock(%lock266_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock266_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_17_core24_7 = AIE.core(%tile24_7) { + %block_17_core24_7 = aie.core(%tile24_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_17_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_17_core25_7 = AIE.core(%tile25_7) { + %block_17_core25_7 = aie.core(%tile25_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_17_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_17_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_17_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_17_core26_7 = AIE.core(%tile26_7) { + %block_17_core26_7 = aie.core(%tile26_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_17_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_17_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_17_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_17_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_17_core24_8 = AIE.core(%tile24_8) { + %block_17_core24_8 = aie.core(%tile24_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_17_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_17_core25_8 = AIE.core(%tile25_8) { + %block_17_core25_8 = aie.core(%tile25_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_17_buf_in_shim_26: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_17_buf_in_shim_26: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_17_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_17_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_17_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_17_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_17_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_17_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_17_buf_in_shim_26: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_17_buf_in_shim_26: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_17_core26_8 = AIE.core(%tile26_8) { + %block_17_core26_8 = aie.core(%tile26_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_17_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_17_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_17_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_17_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_17_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_17_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_17_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_17_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_18_core27_1 = AIE.core(%tile27_1) { + %block_18_core27_1 = aie.core(%tile27_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_18_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_18_core28_1 = AIE.core(%tile28_1) { + %block_18_core28_1 = aie.core(%tile28_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_18_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_18_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_18_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_18_core29_1 = AIE.core(%tile29_1) { + %block_18_core29_1 = aie.core(%tile29_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_18_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_18_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_18_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_18_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_18_core27_2 = AIE.core(%tile27_2) { + %block_18_core27_2 = aie.core(%tile27_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock272_14, "Acquire", 0) // start the timer + aie.use_lock(%lock272_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_18_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_18_core28_2 = AIE.core(%tile28_2) { + %block_18_core28_2 = aie.core(%tile28_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_18_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_18_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_18_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_18_core29_2 = AIE.core(%tile29_2) { + %block_18_core29_2 = aie.core(%tile29_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_18_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_18_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_18_buf_out_shim_27: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_18_buf_out_shim_27: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_18_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_18_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_18_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_18_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_18_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_18_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -7931,354 +7931,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_18_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_18_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_18_buf_out_shim_27:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_out_shim_27:!aie.objectfifo>, 4) } - AIE.use_lock(%lock292_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock292_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_18_core27_3 = AIE.core(%tile27_3) { + %block_18_core27_3 = aie.core(%tile27_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_18_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_18_core28_3 = AIE.core(%tile28_3) { + %block_18_core28_3 = aie.core(%tile28_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_18_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_18_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_18_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_18_core29_3 = AIE.core(%tile29_3) { + %block_18_core29_3 = aie.core(%tile29_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_18_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_18_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_18_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_18_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_18_core27_4 = AIE.core(%tile27_4) { + %block_18_core27_4 = aie.core(%tile27_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_18_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_18_core28_4 = AIE.core(%tile28_4) { + %block_18_core28_4 = aie.core(%tile28_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_18_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_18_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_18_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_18_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_18_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_18_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_18_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_18_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_18_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_18_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_18_core29_4 = AIE.core(%tile29_4) { + %block_18_core29_4 = aie.core(%tile29_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_18_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_18_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_18_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_18_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_18_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_18_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_18_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_18_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_19_core27_5 = AIE.core(%tile27_5) { + %block_19_core27_5 = aie.core(%tile27_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_19_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_19_core28_5 = AIE.core(%tile28_5) { + %block_19_core28_5 = aie.core(%tile28_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_19_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_19_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_19_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_19_core29_5 = AIE.core(%tile29_5) { + %block_19_core29_5 = aie.core(%tile29_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_19_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_19_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_19_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_19_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_19_core27_6 = AIE.core(%tile27_6) { + %block_19_core27_6 = aie.core(%tile27_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock276_14, "Acquire", 0) // start the timer + aie.use_lock(%lock276_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_19_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_19_core28_6 = AIE.core(%tile28_6) { + %block_19_core28_6 = aie.core(%tile28_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_19_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_19_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_19_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_19_core29_6 = AIE.core(%tile29_6) { + %block_19_core29_6 = aie.core(%tile29_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_19_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_19_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_19_buf_out_shim_27: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_19_buf_out_shim_27: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_19_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_19_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_19_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_19_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_19_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_19_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -8286,354 +8286,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_19_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_19_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_19_buf_out_shim_27:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_out_shim_27:!aie.objectfifo>, 4) } - AIE.use_lock(%lock296_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock296_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_19_core27_7 = AIE.core(%tile27_7) { + %block_19_core27_7 = aie.core(%tile27_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_19_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_19_core28_7 = AIE.core(%tile28_7) { + %block_19_core28_7 = aie.core(%tile28_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_19_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_19_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_19_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_19_core29_7 = AIE.core(%tile29_7) { + %block_19_core29_7 = aie.core(%tile29_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_19_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_19_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_19_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_19_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_19_core27_8 = AIE.core(%tile27_8) { + %block_19_core27_8 = aie.core(%tile27_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_19_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_19_core28_8 = AIE.core(%tile28_8) { + %block_19_core28_8 = aie.core(%tile28_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_19_buf_in_shim_27: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_19_buf_in_shim_27: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_19_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_19_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_19_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_19_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_19_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_19_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_19_buf_in_shim_27: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_19_buf_in_shim_27: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_19_core29_8 = AIE.core(%tile29_8) { + %block_19_core29_8 = aie.core(%tile29_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_19_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_19_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_19_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_19_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_19_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_19_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_19_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_19_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_20_core30_1 = AIE.core(%tile30_1) { + %block_20_core30_1 = aie.core(%tile30_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_20_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_20_core31_1 = AIE.core(%tile31_1) { + %block_20_core31_1 = aie.core(%tile31_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_20_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_20_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_20_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_20_core32_1 = AIE.core(%tile32_1) { + %block_20_core32_1 = aie.core(%tile32_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_20_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_20_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_20_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_20_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_20_core30_2 = AIE.core(%tile30_2) { + %block_20_core30_2 = aie.core(%tile30_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock302_14, "Acquire", 0) // start the timer + aie.use_lock(%lock302_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_20_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_20_core31_2 = AIE.core(%tile31_2) { + %block_20_core31_2 = aie.core(%tile31_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_20_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_20_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_20_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_20_core32_2 = AIE.core(%tile32_2) { + %block_20_core32_2 = aie.core(%tile32_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_20_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_20_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_20_buf_out_shim_34: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_20_buf_out_shim_34: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_20_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_20_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_20_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_20_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_20_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_20_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -8641,354 +8641,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_20_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_20_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_20_buf_out_shim_34:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_out_shim_34:!aie.objectfifo>, 4) } - AIE.use_lock(%lock322_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock322_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_20_core30_3 = AIE.core(%tile30_3) { + %block_20_core30_3 = aie.core(%tile30_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_20_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_20_core31_3 = AIE.core(%tile31_3) { + %block_20_core31_3 = aie.core(%tile31_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_20_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_20_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_20_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_20_core32_3 = AIE.core(%tile32_3) { + %block_20_core32_3 = aie.core(%tile32_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_20_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_20_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_20_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_20_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_20_core30_4 = AIE.core(%tile30_4) { + %block_20_core30_4 = aie.core(%tile30_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_20_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_20_core31_4 = AIE.core(%tile31_4) { + %block_20_core31_4 = aie.core(%tile31_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_20_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_20_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_20_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_20_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_20_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_20_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_20_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_20_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_20_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_20_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_20_core32_4 = AIE.core(%tile32_4) { + %block_20_core32_4 = aie.core(%tile32_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_20_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_20_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_20_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_20_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_20_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_20_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_20_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_20_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_21_core30_5 = AIE.core(%tile30_5) { + %block_21_core30_5 = aie.core(%tile30_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_21_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_21_core31_5 = AIE.core(%tile31_5) { + %block_21_core31_5 = aie.core(%tile31_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_21_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_21_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_21_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_21_core32_5 = AIE.core(%tile32_5) { + %block_21_core32_5 = aie.core(%tile32_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_21_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_21_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_21_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_21_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_21_core30_6 = AIE.core(%tile30_6) { + %block_21_core30_6 = aie.core(%tile30_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock306_14, "Acquire", 0) // start the timer + aie.use_lock(%lock306_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_21_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_21_core31_6 = AIE.core(%tile31_6) { + %block_21_core31_6 = aie.core(%tile31_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_21_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_21_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_21_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_21_core32_6 = AIE.core(%tile32_6) { + %block_21_core32_6 = aie.core(%tile32_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_21_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_21_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_21_buf_out_shim_34: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_21_buf_out_shim_34: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_21_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_21_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_21_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_21_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_21_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_21_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -8996,354 +8996,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_21_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_21_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_21_buf_out_shim_34:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_out_shim_34:!aie.objectfifo>, 4) } - AIE.use_lock(%lock326_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock326_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_21_core30_7 = AIE.core(%tile30_7) { + %block_21_core30_7 = aie.core(%tile30_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_21_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_21_core31_7 = AIE.core(%tile31_7) { + %block_21_core31_7 = aie.core(%tile31_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_21_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_21_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_21_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_21_core32_7 = AIE.core(%tile32_7) { + %block_21_core32_7 = aie.core(%tile32_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_21_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_21_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_21_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_21_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_21_core30_8 = AIE.core(%tile30_8) { + %block_21_core30_8 = aie.core(%tile30_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_21_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_21_core31_8 = AIE.core(%tile31_8) { + %block_21_core31_8 = aie.core(%tile31_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_21_buf_in_shim_34: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_21_buf_in_shim_34: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_21_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_21_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_21_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_21_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_21_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_21_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_21_buf_in_shim_34: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_21_buf_in_shim_34: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_21_core32_8 = AIE.core(%tile32_8) { + %block_21_core32_8 = aie.core(%tile32_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_21_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_21_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_21_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_21_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_21_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_21_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_21_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_21_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_22_core33_1 = AIE.core(%tile33_1) { + %block_22_core33_1 = aie.core(%tile33_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_22_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_22_core34_1 = AIE.core(%tile34_1) { + %block_22_core34_1 = aie.core(%tile34_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_22_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_22_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_22_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_22_core35_1 = AIE.core(%tile35_1) { + %block_22_core35_1 = aie.core(%tile35_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_22_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_22_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_22_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_22_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_22_core33_2 = AIE.core(%tile33_2) { + %block_22_core33_2 = aie.core(%tile33_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock332_14, "Acquire", 0) // start the timer + aie.use_lock(%lock332_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_22_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_22_core34_2 = AIE.core(%tile34_2) { + %block_22_core34_2 = aie.core(%tile34_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_22_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_22_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_22_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_22_core35_2 = AIE.core(%tile35_2) { + %block_22_core35_2 = aie.core(%tile35_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_22_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_22_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_22_buf_out_shim_35: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_22_buf_out_shim_35: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_22_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_22_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_22_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_22_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_22_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_22_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -9351,354 +9351,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_22_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_22_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_22_buf_out_shim_35:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_out_shim_35:!aie.objectfifo>, 4) } - AIE.use_lock(%lock352_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock352_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_22_core33_3 = AIE.core(%tile33_3) { + %block_22_core33_3 = aie.core(%tile33_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_22_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_22_core34_3 = AIE.core(%tile34_3) { + %block_22_core34_3 = aie.core(%tile34_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_22_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_22_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_22_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_22_core35_3 = AIE.core(%tile35_3) { + %block_22_core35_3 = aie.core(%tile35_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_22_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_22_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_22_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_22_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_22_core33_4 = AIE.core(%tile33_4) { + %block_22_core33_4 = aie.core(%tile33_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_22_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_22_core34_4 = AIE.core(%tile34_4) { + %block_22_core34_4 = aie.core(%tile34_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_22_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_22_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_22_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_22_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_22_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_22_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_22_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_22_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_22_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_22_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_22_core35_4 = AIE.core(%tile35_4) { + %block_22_core35_4 = aie.core(%tile35_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_22_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_22_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_22_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_22_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_22_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_22_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_22_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_22_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_23_core33_5 = AIE.core(%tile33_5) { + %block_23_core33_5 = aie.core(%tile33_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_23_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_23_core34_5 = AIE.core(%tile34_5) { + %block_23_core34_5 = aie.core(%tile34_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_23_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_23_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_23_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_23_core35_5 = AIE.core(%tile35_5) { + %block_23_core35_5 = aie.core(%tile35_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_23_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_23_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_23_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_23_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_23_core33_6 = AIE.core(%tile33_6) { + %block_23_core33_6 = aie.core(%tile33_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock336_14, "Acquire", 0) // start the timer + aie.use_lock(%lock336_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_23_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_23_core34_6 = AIE.core(%tile34_6) { + %block_23_core34_6 = aie.core(%tile34_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_23_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_23_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_23_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_23_core35_6 = AIE.core(%tile35_6) { + %block_23_core35_6 = aie.core(%tile35_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_23_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_23_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_23_buf_out_shim_35: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_23_buf_out_shim_35: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_23_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_23_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_23_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_23_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_23_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_23_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -9706,354 +9706,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_23_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_23_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_23_buf_out_shim_35:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_out_shim_35:!aie.objectfifo>, 4) } - AIE.use_lock(%lock356_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock356_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_23_core33_7 = AIE.core(%tile33_7) { + %block_23_core33_7 = aie.core(%tile33_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_23_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_23_core34_7 = AIE.core(%tile34_7) { + %block_23_core34_7 = aie.core(%tile34_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_23_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_23_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_23_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_23_core35_7 = AIE.core(%tile35_7) { + %block_23_core35_7 = aie.core(%tile35_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_23_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_23_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_23_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_23_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_23_core33_8 = AIE.core(%tile33_8) { + %block_23_core33_8 = aie.core(%tile33_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_23_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_23_core34_8 = AIE.core(%tile34_8) { + %block_23_core34_8 = aie.core(%tile34_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_23_buf_in_shim_35: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_23_buf_in_shim_35: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_23_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_23_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_23_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_23_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_23_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_23_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_23_buf_in_shim_35: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_23_buf_in_shim_35: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_23_core35_8 = AIE.core(%tile35_8) { + %block_23_core35_8 = aie.core(%tile35_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_23_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_23_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_23_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_23_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_23_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_23_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_23_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_23_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_24_core36_1 = AIE.core(%tile36_1) { + %block_24_core36_1 = aie.core(%tile36_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_24_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_24_core37_1 = AIE.core(%tile37_1) { + %block_24_core37_1 = aie.core(%tile37_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_24_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_24_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_24_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_24_core38_1 = AIE.core(%tile38_1) { + %block_24_core38_1 = aie.core(%tile38_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_24_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_24_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_24_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_24_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_24_core36_2 = AIE.core(%tile36_2) { + %block_24_core36_2 = aie.core(%tile36_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock362_14, "Acquire", 0) // start the timer + aie.use_lock(%lock362_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_24_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_24_core37_2 = AIE.core(%tile37_2) { + %block_24_core37_2 = aie.core(%tile37_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_24_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_24_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_24_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_24_core38_2 = AIE.core(%tile38_2) { + %block_24_core38_2 = aie.core(%tile38_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_24_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_24_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_24_buf_out_shim_42: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_24_buf_out_shim_42: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_24_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_24_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_24_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_24_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_24_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_24_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -10061,354 +10061,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_24_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_24_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_24_buf_out_shim_42:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_out_shim_42:!aie.objectfifo>, 4) } - AIE.use_lock(%lock382_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock382_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_24_core36_3 = AIE.core(%tile36_3) { + %block_24_core36_3 = aie.core(%tile36_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_24_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_24_core37_3 = AIE.core(%tile37_3) { + %block_24_core37_3 = aie.core(%tile37_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_24_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_24_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_24_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_24_core38_3 = AIE.core(%tile38_3) { + %block_24_core38_3 = aie.core(%tile38_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_24_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_24_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_24_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_24_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_24_core36_4 = AIE.core(%tile36_4) { + %block_24_core36_4 = aie.core(%tile36_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_24_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_24_core37_4 = AIE.core(%tile37_4) { + %block_24_core37_4 = aie.core(%tile37_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_24_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_24_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_24_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_24_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_24_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_24_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_24_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_24_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_24_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_24_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_24_core38_4 = AIE.core(%tile38_4) { + %block_24_core38_4 = aie.core(%tile38_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_24_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_24_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_24_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_24_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_24_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_24_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_24_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_24_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_25_core36_5 = AIE.core(%tile36_5) { + %block_25_core36_5 = aie.core(%tile36_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_25_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_25_core37_5 = AIE.core(%tile37_5) { + %block_25_core37_5 = aie.core(%tile37_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_25_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_25_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_25_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_25_core38_5 = AIE.core(%tile38_5) { + %block_25_core38_5 = aie.core(%tile38_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_25_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_25_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_25_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_25_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_25_core36_6 = AIE.core(%tile36_6) { + %block_25_core36_6 = aie.core(%tile36_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock366_14, "Acquire", 0) // start the timer + aie.use_lock(%lock366_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_25_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_25_core37_6 = AIE.core(%tile37_6) { + %block_25_core37_6 = aie.core(%tile37_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_25_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_25_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_25_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_25_core38_6 = AIE.core(%tile38_6) { + %block_25_core38_6 = aie.core(%tile38_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_25_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_25_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_25_buf_out_shim_42: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_25_buf_out_shim_42: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_25_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_25_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_25_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_25_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_25_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_25_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -10416,354 +10416,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_25_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_25_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_25_buf_out_shim_42:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_out_shim_42:!aie.objectfifo>, 4) } - AIE.use_lock(%lock386_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock386_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_25_core36_7 = AIE.core(%tile36_7) { + %block_25_core36_7 = aie.core(%tile36_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_25_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_25_core37_7 = AIE.core(%tile37_7) { + %block_25_core37_7 = aie.core(%tile37_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_25_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_25_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_25_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_25_core38_7 = AIE.core(%tile38_7) { + %block_25_core38_7 = aie.core(%tile38_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_25_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_25_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_25_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_25_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_25_core36_8 = AIE.core(%tile36_8) { + %block_25_core36_8 = aie.core(%tile36_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_25_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_25_core37_8 = AIE.core(%tile37_8) { + %block_25_core37_8 = aie.core(%tile37_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_25_buf_in_shim_42: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_25_buf_in_shim_42: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_25_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_25_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_25_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_25_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_25_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_25_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_25_buf_in_shim_42: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_25_buf_in_shim_42: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_25_core38_8 = AIE.core(%tile38_8) { + %block_25_core38_8 = aie.core(%tile38_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_25_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_25_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_25_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_25_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_25_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_25_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_25_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_25_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_26_core39_1 = AIE.core(%tile39_1) { + %block_26_core39_1 = aie.core(%tile39_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_26_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_26_core40_1 = AIE.core(%tile40_1) { + %block_26_core40_1 = aie.core(%tile40_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_26_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_26_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_26_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_26_core41_1 = AIE.core(%tile41_1) { + %block_26_core41_1 = aie.core(%tile41_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_26_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_26_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_26_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_26_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_26_core39_2 = AIE.core(%tile39_2) { + %block_26_core39_2 = aie.core(%tile39_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock392_14, "Acquire", 0) // start the timer + aie.use_lock(%lock392_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_26_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_26_core40_2 = AIE.core(%tile40_2) { + %block_26_core40_2 = aie.core(%tile40_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_26_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_26_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_26_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_26_core41_2 = AIE.core(%tile41_2) { + %block_26_core41_2 = aie.core(%tile41_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_26_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_26_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_26_buf_out_shim_43: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_26_buf_out_shim_43: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_26_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_26_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_26_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_26_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_26_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_26_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -10771,354 +10771,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_26_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_26_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_26_buf_out_shim_43:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_out_shim_43:!aie.objectfifo>, 4) } - AIE.use_lock(%lock412_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock412_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_26_core39_3 = AIE.core(%tile39_3) { + %block_26_core39_3 = aie.core(%tile39_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_26_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_26_core40_3 = AIE.core(%tile40_3) { + %block_26_core40_3 = aie.core(%tile40_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_26_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_26_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_26_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_26_core41_3 = AIE.core(%tile41_3) { + %block_26_core41_3 = aie.core(%tile41_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_26_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_26_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_26_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_26_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_26_core39_4 = AIE.core(%tile39_4) { + %block_26_core39_4 = aie.core(%tile39_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_26_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_26_core40_4 = AIE.core(%tile40_4) { + %block_26_core40_4 = aie.core(%tile40_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_26_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_26_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_26_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_26_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_26_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_26_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_26_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_26_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_26_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_26_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_26_core41_4 = AIE.core(%tile41_4) { + %block_26_core41_4 = aie.core(%tile41_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_26_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_26_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_26_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_26_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_26_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_26_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_26_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_26_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_27_core39_5 = AIE.core(%tile39_5) { + %block_27_core39_5 = aie.core(%tile39_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_27_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_27_core40_5 = AIE.core(%tile40_5) { + %block_27_core40_5 = aie.core(%tile40_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_27_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_27_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_27_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_27_core41_5 = AIE.core(%tile41_5) { + %block_27_core41_5 = aie.core(%tile41_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_27_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_27_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_27_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_27_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_27_core39_6 = AIE.core(%tile39_6) { + %block_27_core39_6 = aie.core(%tile39_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock396_14, "Acquire", 0) // start the timer + aie.use_lock(%lock396_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_27_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_27_core40_6 = AIE.core(%tile40_6) { + %block_27_core40_6 = aie.core(%tile40_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_27_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_27_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_27_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_27_core41_6 = AIE.core(%tile41_6) { + %block_27_core41_6 = aie.core(%tile41_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_27_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_27_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_27_buf_out_shim_43: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_27_buf_out_shim_43: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_27_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_27_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_27_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_27_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_27_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_27_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -11126,354 +11126,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_27_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_27_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_27_buf_out_shim_43:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_out_shim_43:!aie.objectfifo>, 4) } - AIE.use_lock(%lock416_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock416_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_27_core39_7 = AIE.core(%tile39_7) { + %block_27_core39_7 = aie.core(%tile39_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_27_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_27_core40_7 = AIE.core(%tile40_7) { + %block_27_core40_7 = aie.core(%tile40_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_27_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_27_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_27_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_27_core41_7 = AIE.core(%tile41_7) { + %block_27_core41_7 = aie.core(%tile41_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_27_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_27_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_27_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_27_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_27_core39_8 = AIE.core(%tile39_8) { + %block_27_core39_8 = aie.core(%tile39_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_27_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_27_core40_8 = AIE.core(%tile40_8) { + %block_27_core40_8 = aie.core(%tile40_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_27_buf_in_shim_43: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_27_buf_in_shim_43: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_27_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_27_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_27_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_27_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_27_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_27_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_27_buf_in_shim_43: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_27_buf_in_shim_43: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_27_core41_8 = AIE.core(%tile41_8) { + %block_27_core41_8 = aie.core(%tile41_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_27_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_27_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_27_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_27_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_27_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_27_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_27_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_27_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_28_core42_1 = AIE.core(%tile42_1) { + %block_28_core42_1 = aie.core(%tile42_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_28_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_28_core43_1 = AIE.core(%tile43_1) { + %block_28_core43_1 = aie.core(%tile43_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_28_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_28_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_28_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_28_core44_1 = AIE.core(%tile44_1) { + %block_28_core44_1 = aie.core(%tile44_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_28_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_28_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_28_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_28_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_28_core42_2 = AIE.core(%tile42_2) { + %block_28_core42_2 = aie.core(%tile42_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock422_14, "Acquire", 0) // start the timer + aie.use_lock(%lock422_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_28_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_28_core43_2 = AIE.core(%tile43_2) { + %block_28_core43_2 = aie.core(%tile43_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_28_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_28_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_28_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_28_core44_2 = AIE.core(%tile44_2) { + %block_28_core44_2 = aie.core(%tile44_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_28_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_28_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_28_buf_out_shim_46: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_28_buf_out_shim_46: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_28_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_28_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_28_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_28_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_28_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_28_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -11481,354 +11481,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_28_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_28_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_28_buf_out_shim_46:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_out_shim_46:!aie.objectfifo>, 4) } - AIE.use_lock(%lock442_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock442_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_28_core42_3 = AIE.core(%tile42_3) { + %block_28_core42_3 = aie.core(%tile42_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_28_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_28_core43_3 = AIE.core(%tile43_3) { + %block_28_core43_3 = aie.core(%tile43_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_28_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_28_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_28_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_28_core44_3 = AIE.core(%tile44_3) { + %block_28_core44_3 = aie.core(%tile44_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_28_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_28_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_28_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_28_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_28_core42_4 = AIE.core(%tile42_4) { + %block_28_core42_4 = aie.core(%tile42_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_28_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_28_core43_4 = AIE.core(%tile43_4) { + %block_28_core43_4 = aie.core(%tile43_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_28_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_28_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_28_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_28_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_28_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_28_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_28_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_28_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_28_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_28_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_28_core44_4 = AIE.core(%tile44_4) { + %block_28_core44_4 = aie.core(%tile44_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_28_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_28_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_28_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_28_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_28_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_28_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_28_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_28_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_29_core42_5 = AIE.core(%tile42_5) { + %block_29_core42_5 = aie.core(%tile42_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_29_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_29_core43_5 = AIE.core(%tile43_5) { + %block_29_core43_5 = aie.core(%tile43_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_29_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_29_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_29_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_29_core44_5 = AIE.core(%tile44_5) { + %block_29_core44_5 = aie.core(%tile44_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_29_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_29_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_29_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_29_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_29_core42_6 = AIE.core(%tile42_6) { + %block_29_core42_6 = aie.core(%tile42_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock426_14, "Acquire", 0) // start the timer + aie.use_lock(%lock426_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_29_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_29_core43_6 = AIE.core(%tile43_6) { + %block_29_core43_6 = aie.core(%tile43_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_29_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_29_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_29_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_29_core44_6 = AIE.core(%tile44_6) { + %block_29_core44_6 = aie.core(%tile44_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_29_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_29_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_29_buf_out_shim_46: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_29_buf_out_shim_46: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_29_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_29_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_29_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_29_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_29_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_29_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -11836,354 +11836,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_29_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_29_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_29_buf_out_shim_46:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_out_shim_46:!aie.objectfifo>, 4) } - AIE.use_lock(%lock446_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock446_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_29_core42_7 = AIE.core(%tile42_7) { + %block_29_core42_7 = aie.core(%tile42_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_29_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_29_core43_7 = AIE.core(%tile43_7) { + %block_29_core43_7 = aie.core(%tile43_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_29_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_29_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_29_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_29_core44_7 = AIE.core(%tile44_7) { + %block_29_core44_7 = aie.core(%tile44_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_29_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_29_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_29_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_29_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_29_core42_8 = AIE.core(%tile42_8) { + %block_29_core42_8 = aie.core(%tile42_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_29_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_29_core43_8 = AIE.core(%tile43_8) { + %block_29_core43_8 = aie.core(%tile43_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_29_buf_in_shim_46: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_29_buf_in_shim_46: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_29_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_29_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_29_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_29_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_29_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_29_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_29_buf_in_shim_46: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_29_buf_in_shim_46: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_29_core44_8 = AIE.core(%tile44_8) { + %block_29_core44_8 = aie.core(%tile44_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_29_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_29_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_29_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_29_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_29_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_29_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_29_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_29_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_30_core45_1 = AIE.core(%tile45_1) { + %block_30_core45_1 = aie.core(%tile45_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_30_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_30_core46_1 = AIE.core(%tile46_1) { + %block_30_core46_1 = aie.core(%tile46_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_30_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_30_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_30_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_30_core47_1 = AIE.core(%tile47_1) { + %block_30_core47_1 = aie.core(%tile47_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_30_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_30_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_30_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_30_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_30_core45_2 = AIE.core(%tile45_2) { + %block_30_core45_2 = aie.core(%tile45_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock452_14, "Acquire", 0) // start the timer + aie.use_lock(%lock452_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_30_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_30_core46_2 = AIE.core(%tile46_2) { + %block_30_core46_2 = aie.core(%tile46_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_30_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_30_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_30_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_30_core47_2 = AIE.core(%tile47_2) { + %block_30_core47_2 = aie.core(%tile47_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_30_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_30_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_30_buf_out_shim_47: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_30_buf_out_shim_47: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_30_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_30_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_30_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_30_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_30_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_30_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -12191,354 +12191,354 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_30_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_30_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_30_buf_out_shim_47:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_out_shim_47:!aie.objectfifo>, 4) } - AIE.use_lock(%lock472_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock472_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_30_core45_3 = AIE.core(%tile45_3) { + %block_30_core45_3 = aie.core(%tile45_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_30_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_30_core46_3 = AIE.core(%tile46_3) { + %block_30_core46_3 = aie.core(%tile46_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_30_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_30_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_30_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_30_core47_3 = AIE.core(%tile47_3) { + %block_30_core47_3 = aie.core(%tile47_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_30_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_30_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_30_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_30_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_30_core45_4 = AIE.core(%tile45_4) { + %block_30_core45_4 = aie.core(%tile45_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_30_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_30_core46_4 = AIE.core(%tile46_4) { + %block_30_core46_4 = aie.core(%tile46_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_30_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_30_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_30_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_30_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_30_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_30_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_30_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_30_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_30_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_30_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_30_core47_4 = AIE.core(%tile47_4) { + %block_30_core47_4 = aie.core(%tile47_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_30_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_30_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_30_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_30_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_30_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_30_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_30_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_30_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_31_core45_5 = AIE.core(%tile45_5) { + %block_31_core45_5 = aie.core(%tile45_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_31_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_31_core46_5 = AIE.core(%tile46_5) { + %block_31_core46_5 = aie.core(%tile46_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_31_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_31_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_31_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_31_core47_5 = AIE.core(%tile47_5) { + %block_31_core47_5 = aie.core(%tile47_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_31_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_31_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_31_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_31_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_31_core45_6 = AIE.core(%tile45_6) { + %block_31_core45_6 = aie.core(%tile45_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock456_14, "Acquire", 0) // start the timer + aie.use_lock(%lock456_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_31_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_31_core46_6 = AIE.core(%tile46_6) { + %block_31_core46_6 = aie.core(%tile46_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_31_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_31_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_31_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_31_core47_6 = AIE.core(%tile47_6) { + %block_31_core47_6 = aie.core(%tile47_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_31_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_31_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_31_buf_out_shim_47: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_31_buf_out_shim_47: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_31_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_31_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_31_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_31_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_31_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_31_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -12546,180 +12546,180 @@ module @hdiff_bundle_32 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_31_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_31_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_31_buf_out_shim_47:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_out_shim_47:!aie.objectfifo>, 4) } - AIE.use_lock(%lock476_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock476_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_31_core45_7 = AIE.core(%tile45_7) { + %block_31_core45_7 = aie.core(%tile45_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_31_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_31_core46_7 = AIE.core(%tile46_7) { + %block_31_core46_7 = aie.core(%tile46_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_31_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_31_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_31_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_31_core47_7 = AIE.core(%tile47_7) { + %block_31_core47_7 = aie.core(%tile47_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_31_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_31_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_31_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_31_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_31_core45_8 = AIE.core(%tile45_8) { + %block_31_core45_8 = aie.core(%tile45_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_31_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_31_core46_8 = AIE.core(%tile46_8) { + %block_31_core46_8 = aie.core(%tile46_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_31_buf_in_shim_47: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_31_buf_in_shim_47: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_31_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_31_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_31_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_31_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_31_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_31_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_31_buf_in_shim_47: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_31_buf_in_shim_47: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_31_core47_8 = AIE.core(%tile47_8) { + %block_31_core47_8 = aie.core(%tile47_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_31_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_31_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_31_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_31_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_31_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_31_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_31_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_31_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_4.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_4.mlir index 08f2cb6fac..b1c5308889 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_4.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_4.mlir @@ -14,351 +14,351 @@ module @hdiff_bundle_4 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---Generating B-block 1---*- //---col 0---*- - %tile0_5 = AIE.tile(0, 5) - %tile0_6 = AIE.tile(0, 6) - %tile0_7 = AIE.tile(0, 7) - %tile0_8 = AIE.tile(0, 8) + %tile0_5 = aie.tile(0, 5) + %tile0_6 = aie.tile(0, 6) + %tile0_7 = aie.tile(0, 7) + %tile0_8 = aie.tile(0, 8) //---col 1---*- - %tile1_5 = AIE.tile(1, 5) - %tile1_6 = AIE.tile(1, 6) - %tile1_7 = AIE.tile(1, 7) - %tile1_8 = AIE.tile(1, 8) + %tile1_5 = aie.tile(1, 5) + %tile1_6 = aie.tile(1, 6) + %tile1_7 = aie.tile(1, 7) + %tile1_8 = aie.tile(1, 8) //---col 2---*- - %tile2_5 = AIE.tile(2, 5) - %tile2_6 = AIE.tile(2, 6) - %tile2_7 = AIE.tile(2, 7) - %tile2_8 = AIE.tile(2, 8) + %tile2_5 = aie.tile(2, 5) + %tile2_6 = aie.tile(2, 6) + %tile2_7 = aie.tile(2, 7) + %tile2_8 = aie.tile(2, 8) //---Generating B-block 2---*- //---col 0---*- - %tile3_1 = AIE.tile(3, 1) - %tile3_2 = AIE.tile(3, 2) - %tile3_3 = AIE.tile(3, 3) - %tile3_4 = AIE.tile(3, 4) + %tile3_1 = aie.tile(3, 1) + %tile3_2 = aie.tile(3, 2) + %tile3_3 = aie.tile(3, 3) + %tile3_4 = aie.tile(3, 4) //---col 1---*- - %tile4_1 = AIE.tile(4, 1) - %tile4_2 = AIE.tile(4, 2) - %tile4_3 = AIE.tile(4, 3) - %tile4_4 = AIE.tile(4, 4) + %tile4_1 = aie.tile(4, 1) + %tile4_2 = aie.tile(4, 2) + %tile4_3 = aie.tile(4, 3) + %tile4_4 = aie.tile(4, 4) //---col 2---*- - %tile5_1 = AIE.tile(5, 1) - %tile5_2 = AIE.tile(5, 2) - %tile5_3 = AIE.tile(5, 3) - %tile5_4 = AIE.tile(5, 4) + %tile5_1 = aie.tile(5, 1) + %tile5_2 = aie.tile(5, 2) + %tile5_3 = aie.tile(5, 3) + %tile5_4 = aie.tile(5, 4) //---Generating B-block 3---*- //---col 0---*- - %tile3_5 = AIE.tile(3, 5) - %tile3_6 = AIE.tile(3, 6) - %tile3_7 = AIE.tile(3, 7) - %tile3_8 = AIE.tile(3, 8) + %tile3_5 = aie.tile(3, 5) + %tile3_6 = aie.tile(3, 6) + %tile3_7 = aie.tile(3, 7) + %tile3_8 = aie.tile(3, 8) //---col 1---*- - %tile4_5 = AIE.tile(4, 5) - %tile4_6 = AIE.tile(4, 6) - %tile4_7 = AIE.tile(4, 7) - %tile4_8 = AIE.tile(4, 8) + %tile4_5 = aie.tile(4, 5) + %tile4_6 = aie.tile(4, 6) + %tile4_7 = aie.tile(4, 7) + %tile4_8 = aie.tile(4, 8) //---col 2---*- - %tile5_5 = AIE.tile(5, 5) - %tile5_6 = AIE.tile(5, 6) - %tile5_7 = AIE.tile(5, 7) - %tile5_8 = AIE.tile(5, 8) + %tile5_5 = aie.tile(5, 5) + %tile5_6 = aie.tile(5, 6) + %tile5_7 = aie.tile(5, 7) + %tile5_8 = aie.tile(5, 8) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) //---NOC Tile 3---*- - %tile3_0 = AIE.tile(3, 0) + %tile3_0 = aie.tile(3, 0) // timing locks - %lock02_14 = AIE.lock(%tile0_2, 14) { sym_name = "lock02_14" } - %lock22_14 = AIE.lock(%tile2_2, 14) { sym_name = "lock22_14" } + %lock02_14 = aie.lock(%tile0_2, 14) { sym_name = "lock02_14" } + %lock22_14 = aie.lock(%tile2_2, 14) { sym_name = "lock22_14" } // timing locks - %lock06_14 = AIE.lock(%tile0_6, 14) { sym_name = "lock06_14" } - %lock26_14 = AIE.lock(%tile2_6, 14) { sym_name = "lock26_14" } + %lock06_14 = aie.lock(%tile0_6, 14) { sym_name = "lock06_14" } + %lock26_14 = aie.lock(%tile2_6, 14) { sym_name = "lock26_14" } // timing locks - %lock32_14 = AIE.lock(%tile3_2, 14) { sym_name = "lock32_14" } - %lock52_14 = AIE.lock(%tile5_2, 14) { sym_name = "lock52_14" } + %lock32_14 = aie.lock(%tile3_2, 14) { sym_name = "lock32_14" } + %lock52_14 = aie.lock(%tile5_2, 14) { sym_name = "lock52_14" } // timing locks - %lock36_14 = AIE.lock(%tile3_6, 14) { sym_name = "lock36_14" } - %lock56_14 = AIE.lock(%tile5_6, 14) { sym_name = "lock56_14" } + %lock36_14 = aie.lock(%tile3_6, 14) { sym_name = "lock36_14" } + %lock56_14 = aie.lock(%tile5_6, 14) { sym_name = "lock56_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B1 buffers---*- - %block_1_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_1_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_1_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_1_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_1_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_1_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_1_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B2 buffers---*- - %block_2_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_2_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_2_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_2_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_2_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_2_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_2_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B3 buffers---*- - %block_3_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_3_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_3_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> - - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> - %ext_buffer_out_1 = AIE.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> - - %ext_buffer_in_2 = AIE.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> - %ext_buffer_out_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> - - %ext_buffer_in_3 = AIE.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> - %ext_buffer_out_3 = AIE.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> + %block_3_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_3_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_3_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_3_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> + %ext_buffer_out_1 = aie.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> + + %ext_buffer_in_2 = aie.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> + %ext_buffer_out_2 = aie.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> + + %ext_buffer_in_3 = aie.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> + %ext_buffer_out_3 = aie.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock02_14, "Acquire", 0) // start the timer + aie.use_lock(%lock02_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -366,354 +366,354 @@ module @hdiff_bundle_4 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock22_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock22_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_5 = AIE.core(%tile0_5) { + %block_1_core0_5 = aie.core(%tile0_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_5 = AIE.core(%tile1_5) { + %block_1_core1_5 = aie.core(%tile1_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_5 = AIE.core(%tile2_5) { + %block_1_core2_5 = aie.core(%tile2_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_6 = AIE.core(%tile0_6) { + %block_1_core0_6 = aie.core(%tile0_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock06_14, "Acquire", 0) // start the timer + aie.use_lock(%lock06_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_6 = AIE.core(%tile1_6) { + %block_1_core1_6 = aie.core(%tile1_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_1_core2_6 = AIE.core(%tile2_6) { + %block_1_core2_6 = aie.core(%tile2_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -721,354 +721,354 @@ module @hdiff_bundle_4 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock26_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock26_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_7 = AIE.core(%tile0_7) { + %block_1_core0_7 = aie.core(%tile0_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_7 = AIE.core(%tile1_7) { + %block_1_core1_7 = aie.core(%tile1_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_7 = AIE.core(%tile2_7) { + %block_1_core2_7 = aie.core(%tile2_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_8 = AIE.core(%tile0_8) { + %block_1_core0_8 = aie.core(%tile0_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_8 = AIE.core(%tile1_8) { + %block_1_core1_8 = aie.core(%tile1_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_8 = AIE.core(%tile2_8) { + %block_1_core2_8 = aie.core(%tile2_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_1 = AIE.core(%tile3_1) { + %block_2_core3_1 = aie.core(%tile3_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_1 = AIE.core(%tile4_1) { + %block_2_core4_1 = aie.core(%tile4_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_1 = AIE.core(%tile5_1) { + %block_2_core5_1 = aie.core(%tile5_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_2 = AIE.core(%tile3_2) { + %block_2_core3_2 = aie.core(%tile3_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock32_14, "Acquire", 0) // start the timer + aie.use_lock(%lock32_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_2 = AIE.core(%tile4_2) { + %block_2_core4_2 = aie.core(%tile4_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_2_core5_2 = AIE.core(%tile5_2) { + %block_2_core5_2 = aie.core(%tile5_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1076,354 +1076,354 @@ module @hdiff_bundle_4 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock52_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock52_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_3 = AIE.core(%tile3_3) { + %block_2_core3_3 = aie.core(%tile3_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_3 = AIE.core(%tile4_3) { + %block_2_core4_3 = aie.core(%tile4_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_3 = AIE.core(%tile5_3) { + %block_2_core5_3 = aie.core(%tile5_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_4 = AIE.core(%tile3_4) { + %block_2_core3_4 = aie.core(%tile3_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_4 = AIE.core(%tile4_4) { + %block_2_core4_4 = aie.core(%tile4_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_4 = AIE.core(%tile5_4) { + %block_2_core5_4 = aie.core(%tile5_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_5 = AIE.core(%tile3_5) { + %block_3_core3_5 = aie.core(%tile3_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_5 = AIE.core(%tile4_5) { + %block_3_core4_5 = aie.core(%tile4_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_5 = AIE.core(%tile5_5) { + %block_3_core5_5 = aie.core(%tile5_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_6 = AIE.core(%tile3_6) { + %block_3_core3_6 = aie.core(%tile3_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock36_14, "Acquire", 0) // start the timer + aie.use_lock(%lock36_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_6 = AIE.core(%tile4_6) { + %block_3_core4_6 = aie.core(%tile4_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_3_core5_6 = AIE.core(%tile5_6) { + %block_3_core5_6 = aie.core(%tile5_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> - - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> + + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1431,180 +1431,180 @@ module @hdiff_bundle_4 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock56_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock56_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_7 = AIE.core(%tile3_7) { + %block_3_core3_7 = aie.core(%tile3_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_7 = AIE.core(%tile4_7) { + %block_3_core4_7 = aie.core(%tile4_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_7 = AIE.core(%tile5_7) { + %block_3_core5_7 = aie.core(%tile5_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_8 = AIE.core(%tile3_8) { + %block_3_core3_8 = aie.core(%tile3_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_8 = AIE.core(%tile4_8) { + %block_3_core4_8 = aie.core(%tile4_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> - - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> + + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_8 = AIE.core(%tile5_8) { + %block_3_core5_8 = aie.core(%tile5_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_8.mlir b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_8.mlir index ea892abc47..b0e1bbd394 100644 --- a/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_8.mlir +++ b/reference_designs/horizontal_diffusion/HDIFF_tri_AIE_objectFIFO_ping_pong_scaled/aie_8.mlir @@ -14,519 +14,519 @@ module @hdiff_bundle_8 { //---Generating B-block 0---*- //---col 0---*- - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) //---col 1---*- - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) //---col 2---*- - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) //---Generating B-block 1---*- //---col 0---*- - %tile0_5 = AIE.tile(0, 5) - %tile0_6 = AIE.tile(0, 6) - %tile0_7 = AIE.tile(0, 7) - %tile0_8 = AIE.tile(0, 8) + %tile0_5 = aie.tile(0, 5) + %tile0_6 = aie.tile(0, 6) + %tile0_7 = aie.tile(0, 7) + %tile0_8 = aie.tile(0, 8) //---col 1---*- - %tile1_5 = AIE.tile(1, 5) - %tile1_6 = AIE.tile(1, 6) - %tile1_7 = AIE.tile(1, 7) - %tile1_8 = AIE.tile(1, 8) + %tile1_5 = aie.tile(1, 5) + %tile1_6 = aie.tile(1, 6) + %tile1_7 = aie.tile(1, 7) + %tile1_8 = aie.tile(1, 8) //---col 2---*- - %tile2_5 = AIE.tile(2, 5) - %tile2_6 = AIE.tile(2, 6) - %tile2_7 = AIE.tile(2, 7) - %tile2_8 = AIE.tile(2, 8) + %tile2_5 = aie.tile(2, 5) + %tile2_6 = aie.tile(2, 6) + %tile2_7 = aie.tile(2, 7) + %tile2_8 = aie.tile(2, 8) //---Generating B-block 2---*- //---col 0---*- - %tile3_1 = AIE.tile(3, 1) - %tile3_2 = AIE.tile(3, 2) - %tile3_3 = AIE.tile(3, 3) - %tile3_4 = AIE.tile(3, 4) + %tile3_1 = aie.tile(3, 1) + %tile3_2 = aie.tile(3, 2) + %tile3_3 = aie.tile(3, 3) + %tile3_4 = aie.tile(3, 4) //---col 1---*- - %tile4_1 = AIE.tile(4, 1) - %tile4_2 = AIE.tile(4, 2) - %tile4_3 = AIE.tile(4, 3) - %tile4_4 = AIE.tile(4, 4) + %tile4_1 = aie.tile(4, 1) + %tile4_2 = aie.tile(4, 2) + %tile4_3 = aie.tile(4, 3) + %tile4_4 = aie.tile(4, 4) //---col 2---*- - %tile5_1 = AIE.tile(5, 1) - %tile5_2 = AIE.tile(5, 2) - %tile5_3 = AIE.tile(5, 3) - %tile5_4 = AIE.tile(5, 4) + %tile5_1 = aie.tile(5, 1) + %tile5_2 = aie.tile(5, 2) + %tile5_3 = aie.tile(5, 3) + %tile5_4 = aie.tile(5, 4) //---Generating B-block 3---*- //---col 0---*- - %tile3_5 = AIE.tile(3, 5) - %tile3_6 = AIE.tile(3, 6) - %tile3_7 = AIE.tile(3, 7) - %tile3_8 = AIE.tile(3, 8) + %tile3_5 = aie.tile(3, 5) + %tile3_6 = aie.tile(3, 6) + %tile3_7 = aie.tile(3, 7) + %tile3_8 = aie.tile(3, 8) //---col 1---*- - %tile4_5 = AIE.tile(4, 5) - %tile4_6 = AIE.tile(4, 6) - %tile4_7 = AIE.tile(4, 7) - %tile4_8 = AIE.tile(4, 8) + %tile4_5 = aie.tile(4, 5) + %tile4_6 = aie.tile(4, 6) + %tile4_7 = aie.tile(4, 7) + %tile4_8 = aie.tile(4, 8) //---col 2---*- - %tile5_5 = AIE.tile(5, 5) - %tile5_6 = AIE.tile(5, 6) - %tile5_7 = AIE.tile(5, 7) - %tile5_8 = AIE.tile(5, 8) + %tile5_5 = aie.tile(5, 5) + %tile5_6 = aie.tile(5, 6) + %tile5_7 = aie.tile(5, 7) + %tile5_8 = aie.tile(5, 8) //---Generating B-block 4---*- //---col 0---*- - %tile6_1 = AIE.tile(6, 1) - %tile6_2 = AIE.tile(6, 2) - %tile6_3 = AIE.tile(6, 3) - %tile6_4 = AIE.tile(6, 4) + %tile6_1 = aie.tile(6, 1) + %tile6_2 = aie.tile(6, 2) + %tile6_3 = aie.tile(6, 3) + %tile6_4 = aie.tile(6, 4) //---col 1---*- - %tile7_1 = AIE.tile(7, 1) - %tile7_2 = AIE.tile(7, 2) - %tile7_3 = AIE.tile(7, 3) - %tile7_4 = AIE.tile(7, 4) + %tile7_1 = aie.tile(7, 1) + %tile7_2 = aie.tile(7, 2) + %tile7_3 = aie.tile(7, 3) + %tile7_4 = aie.tile(7, 4) //---col 2---*- - %tile8_1 = AIE.tile(8, 1) - %tile8_2 = AIE.tile(8, 2) - %tile8_3 = AIE.tile(8, 3) - %tile8_4 = AIE.tile(8, 4) + %tile8_1 = aie.tile(8, 1) + %tile8_2 = aie.tile(8, 2) + %tile8_3 = aie.tile(8, 3) + %tile8_4 = aie.tile(8, 4) //---Generating B-block 5---*- //---col 0---*- - %tile6_5 = AIE.tile(6, 5) - %tile6_6 = AIE.tile(6, 6) - %tile6_7 = AIE.tile(6, 7) - %tile6_8 = AIE.tile(6, 8) + %tile6_5 = aie.tile(6, 5) + %tile6_6 = aie.tile(6, 6) + %tile6_7 = aie.tile(6, 7) + %tile6_8 = aie.tile(6, 8) //---col 1---*- - %tile7_5 = AIE.tile(7, 5) - %tile7_6 = AIE.tile(7, 6) - %tile7_7 = AIE.tile(7, 7) - %tile7_8 = AIE.tile(7, 8) + %tile7_5 = aie.tile(7, 5) + %tile7_6 = aie.tile(7, 6) + %tile7_7 = aie.tile(7, 7) + %tile7_8 = aie.tile(7, 8) //---col 2---*- - %tile8_5 = AIE.tile(8, 5) - %tile8_6 = AIE.tile(8, 6) - %tile8_7 = AIE.tile(8, 7) - %tile8_8 = AIE.tile(8, 8) + %tile8_5 = aie.tile(8, 5) + %tile8_6 = aie.tile(8, 6) + %tile8_7 = aie.tile(8, 7) + %tile8_8 = aie.tile(8, 8) //---Generating B-block 6---*- //---col 0---*- - %tile9_1 = AIE.tile(9, 1) - %tile9_2 = AIE.tile(9, 2) - %tile9_3 = AIE.tile(9, 3) - %tile9_4 = AIE.tile(9, 4) + %tile9_1 = aie.tile(9, 1) + %tile9_2 = aie.tile(9, 2) + %tile9_3 = aie.tile(9, 3) + %tile9_4 = aie.tile(9, 4) //---col 1---*- - %tile10_1 = AIE.tile(10, 1) - %tile10_2 = AIE.tile(10, 2) - %tile10_3 = AIE.tile(10, 3) - %tile10_4 = AIE.tile(10, 4) + %tile10_1 = aie.tile(10, 1) + %tile10_2 = aie.tile(10, 2) + %tile10_3 = aie.tile(10, 3) + %tile10_4 = aie.tile(10, 4) //---col 2---*- - %tile11_1 = AIE.tile(11, 1) - %tile11_2 = AIE.tile(11, 2) - %tile11_3 = AIE.tile(11, 3) - %tile11_4 = AIE.tile(11, 4) + %tile11_1 = aie.tile(11, 1) + %tile11_2 = aie.tile(11, 2) + %tile11_3 = aie.tile(11, 3) + %tile11_4 = aie.tile(11, 4) //---Generating B-block 7---*- //---col 0---*- - %tile9_5 = AIE.tile(9, 5) - %tile9_6 = AIE.tile(9, 6) - %tile9_7 = AIE.tile(9, 7) - %tile9_8 = AIE.tile(9, 8) + %tile9_5 = aie.tile(9, 5) + %tile9_6 = aie.tile(9, 6) + %tile9_7 = aie.tile(9, 7) + %tile9_8 = aie.tile(9, 8) //---col 1---*- - %tile10_5 = AIE.tile(10, 5) - %tile10_6 = AIE.tile(10, 6) - %tile10_7 = AIE.tile(10, 7) - %tile10_8 = AIE.tile(10, 8) + %tile10_5 = aie.tile(10, 5) + %tile10_6 = aie.tile(10, 6) + %tile10_7 = aie.tile(10, 7) + %tile10_8 = aie.tile(10, 8) //---col 2---*- - %tile11_5 = AIE.tile(11, 5) - %tile11_6 = AIE.tile(11, 6) - %tile11_7 = AIE.tile(11, 7) - %tile11_8 = AIE.tile(11, 8) + %tile11_5 = aie.tile(11, 5) + %tile11_6 = aie.tile(11, 6) + %tile11_7 = aie.tile(11, 7) + %tile11_8 = aie.tile(11, 8) //---NOC Tile 2---*- - %tile2_0 = AIE.tile(2, 0) + %tile2_0 = aie.tile(2, 0) //---NOC Tile 3---*- - %tile3_0 = AIE.tile(3, 0) + %tile3_0 = aie.tile(3, 0) //---NOC Tile 6---*- - %tile6_0 = AIE.tile(6, 0) + %tile6_0 = aie.tile(6, 0) //---NOC Tile 7---*- - %tile7_0 = AIE.tile(7, 0) + %tile7_0 = aie.tile(7, 0) // timing locks - %lock02_14 = AIE.lock(%tile0_2, 14) { sym_name = "lock02_14" } - %lock22_14 = AIE.lock(%tile2_2, 14) { sym_name = "lock22_14" } + %lock02_14 = aie.lock(%tile0_2, 14) { sym_name = "lock02_14" } + %lock22_14 = aie.lock(%tile2_2, 14) { sym_name = "lock22_14" } // timing locks - %lock06_14 = AIE.lock(%tile0_6, 14) { sym_name = "lock06_14" } - %lock26_14 = AIE.lock(%tile2_6, 14) { sym_name = "lock26_14" } + %lock06_14 = aie.lock(%tile0_6, 14) { sym_name = "lock06_14" } + %lock26_14 = aie.lock(%tile2_6, 14) { sym_name = "lock26_14" } // timing locks - %lock32_14 = AIE.lock(%tile3_2, 14) { sym_name = "lock32_14" } - %lock52_14 = AIE.lock(%tile5_2, 14) { sym_name = "lock52_14" } + %lock32_14 = aie.lock(%tile3_2, 14) { sym_name = "lock32_14" } + %lock52_14 = aie.lock(%tile5_2, 14) { sym_name = "lock52_14" } // timing locks - %lock36_14 = AIE.lock(%tile3_6, 14) { sym_name = "lock36_14" } - %lock56_14 = AIE.lock(%tile5_6, 14) { sym_name = "lock56_14" } + %lock36_14 = aie.lock(%tile3_6, 14) { sym_name = "lock36_14" } + %lock56_14 = aie.lock(%tile5_6, 14) { sym_name = "lock56_14" } // timing locks - %lock62_14 = AIE.lock(%tile6_2, 14) { sym_name = "lock62_14" } - %lock82_14 = AIE.lock(%tile8_2, 14) { sym_name = "lock82_14" } + %lock62_14 = aie.lock(%tile6_2, 14) { sym_name = "lock62_14" } + %lock82_14 = aie.lock(%tile8_2, 14) { sym_name = "lock82_14" } // timing locks - %lock66_14 = AIE.lock(%tile6_6, 14) { sym_name = "lock66_14" } - %lock86_14 = AIE.lock(%tile8_6, 14) { sym_name = "lock86_14" } + %lock66_14 = aie.lock(%tile6_6, 14) { sym_name = "lock66_14" } + %lock86_14 = aie.lock(%tile8_6, 14) { sym_name = "lock86_14" } // timing locks - %lock92_14 = AIE.lock(%tile9_2, 14) { sym_name = "lock92_14" } - %lock112_14 = AIE.lock(%tile11_2, 14) { sym_name = "lock112_14" } + %lock92_14 = aie.lock(%tile9_2, 14) { sym_name = "lock92_14" } + %lock112_14 = aie.lock(%tile11_2, 14) { sym_name = "lock112_14" } // timing locks - %lock96_14 = AIE.lock(%tile9_6, 14) { sym_name = "lock96_14" } - %lock116_14 = AIE.lock(%tile11_6, 14) { sym_name = "lock116_14" } + %lock96_14 = aie.lock(%tile9_6, 14) { sym_name = "lock96_14" } + %lock116_14 = aie.lock(%tile11_6, 14) { sym_name = "lock116_14" } //---Generating B0 buffers---*- - %block_0_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_0_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_0_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_0_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_0_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_0_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_1,%tile1_1,%tile0_2,%tile1_2,%tile0_3,%tile1_3,%tile0_4,%tile1_4},9) { sym_name = "block_0_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_0_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile0_1,{%tile1_1},5){ sym_name ="block_0_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_1,{%tile2_1},6) { sym_name ="block_0_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile2_1,{%tile2_2},2) { sym_name ="block_0_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile0_2,{%tile1_2},5){ sym_name ="block_0_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_2,{%tile2_2},6) { sym_name ="block_0_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_0_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_2,{%tile2_0},5){ sym_name ="block_0_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_0_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile0_3,{%tile1_3},5){ sym_name ="block_0_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_3,{%tile2_3},6) { sym_name ="block_0_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile2_3,{%tile2_2},2) { sym_name ="block_0_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_0_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile0_4,{%tile1_4},5){ sym_name ="block_0_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_0_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_4,{%tile2_4},6) { sym_name ="block_0_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_0_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile2_4,{%tile2_2},2) { sym_name ="block_0_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B1 buffers---*- - %block_1_buf_in_shim_2 = AIE.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !AIE.objectfifo> //B block input - %block_1_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_out_shim_2= AIE.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !AIE.objectfifo> //B block output - %block_1_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_1_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_1_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_1_buf_in_shim_2 = aie.objectfifo.createObjectFifo(%tile2_0,{%tile0_5,%tile1_5,%tile0_6,%tile1_6,%tile0_7,%tile1_7,%tile0_8,%tile1_8},9) { sym_name = "block_1_buf_in_shim_2" } : !aie.objectfifo> //B block input + %block_1_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile0_5,{%tile1_5},5){ sym_name ="block_1_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_5,{%tile2_5},6) { sym_name ="block_1_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile2_5,{%tile2_6},2) { sym_name ="block_1_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile0_6,{%tile1_6},5){ sym_name ="block_1_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_6,{%tile2_6},6) { sym_name ="block_1_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_1_buf_out_shim_2= aie.objectfifo.createObjectFifo(%tile2_6,{%tile2_0},5){ sym_name ="block_1_buf_out_shim_2"} : !aie.objectfifo> //B block output + %block_1_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile0_7,{%tile1_7},5){ sym_name ="block_1_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_7,{%tile2_7},6) { sym_name ="block_1_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile2_7,{%tile2_6},2) { sym_name ="block_1_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_1_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile0_8,{%tile1_8},5){ sym_name ="block_1_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_1_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile1_8,{%tile2_8},6) { sym_name ="block_1_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_1_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile2_8,{%tile2_6},2) { sym_name ="block_1_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B2 buffers---*- - %block_2_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_2_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_2_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_2_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_2_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_2_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_1,%tile4_1,%tile3_2,%tile4_2,%tile3_3,%tile4_3,%tile3_4,%tile4_4},9) { sym_name = "block_2_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_2_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile3_1,{%tile4_1},5){ sym_name ="block_2_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_1,{%tile5_1},6) { sym_name ="block_2_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile5_1,{%tile5_2},2) { sym_name ="block_2_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile3_2,{%tile4_2},5){ sym_name ="block_2_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_2,{%tile5_2},6) { sym_name ="block_2_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_2_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_2,{%tile3_0},5){ sym_name ="block_2_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_2_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile3_3,{%tile4_3},5){ sym_name ="block_2_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_3,{%tile5_3},6) { sym_name ="block_2_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile5_3,{%tile5_2},2) { sym_name ="block_2_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_2_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile3_4,{%tile4_4},5){ sym_name ="block_2_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_2_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_4,{%tile5_4},6) { sym_name ="block_2_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_2_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile5_4,{%tile5_2},2) { sym_name ="block_2_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B3 buffers---*- - %block_3_buf_in_shim_3 = AIE.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !AIE.objectfifo> //B block input - %block_3_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_out_shim_3= AIE.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !AIE.objectfifo> //B block output - %block_3_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_3_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_3_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_3_buf_in_shim_3 = aie.objectfifo.createObjectFifo(%tile3_0,{%tile3_5,%tile4_5,%tile3_6,%tile4_6,%tile3_7,%tile4_7,%tile3_8,%tile4_8},9) { sym_name = "block_3_buf_in_shim_3" } : !aie.objectfifo> //B block input + %block_3_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile3_5,{%tile4_5},5){ sym_name ="block_3_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_5,{%tile5_5},6) { sym_name ="block_3_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile5_5,{%tile5_6},2) { sym_name ="block_3_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile3_6,{%tile4_6},5){ sym_name ="block_3_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_6,{%tile5_6},6) { sym_name ="block_3_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_3_buf_out_shim_3= aie.objectfifo.createObjectFifo(%tile5_6,{%tile3_0},5){ sym_name ="block_3_buf_out_shim_3"} : !aie.objectfifo> //B block output + %block_3_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile3_7,{%tile4_7},5){ sym_name ="block_3_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_7,{%tile5_7},6) { sym_name ="block_3_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile5_7,{%tile5_6},2) { sym_name ="block_3_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_3_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile3_8,{%tile4_8},5){ sym_name ="block_3_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_3_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile4_8,{%tile5_8},6) { sym_name ="block_3_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_3_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile5_8,{%tile5_6},2) { sym_name ="block_3_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B4 buffers---*- - %block_4_buf_in_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile6_1,%tile7_1,%tile6_2,%tile7_2,%tile6_3,%tile7_3,%tile6_4,%tile7_4},9) { sym_name = "block_4_buf_in_shim_6" } : !AIE.objectfifo> //B block input - %block_4_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_1,{%tile7_1},5){ sym_name ="block_4_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_1,{%tile8_1},6) { sym_name ="block_4_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_1,{%tile8_2},2) { sym_name ="block_4_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_4_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_2,{%tile7_2},5){ sym_name ="block_4_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_2,{%tile8_2},6) { sym_name ="block_4_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_out_shim_6= AIE.objectfifo.createObjectFifo(%tile8_2,{%tile6_0},5){ sym_name ="block_4_buf_out_shim_6"} : !AIE.objectfifo> //B block output - %block_4_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_3,{%tile7_3},5){ sym_name ="block_4_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_3,{%tile8_3},6) { sym_name ="block_4_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_3,{%tile8_2},2) { sym_name ="block_4_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_4_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_4,{%tile7_4},5){ sym_name ="block_4_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_4_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_4,{%tile8_4},6) { sym_name ="block_4_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_4_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_4,{%tile8_2},2) { sym_name ="block_4_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_4_buf_in_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile6_1,%tile7_1,%tile6_2,%tile7_2,%tile6_3,%tile7_3,%tile6_4,%tile7_4},9) { sym_name = "block_4_buf_in_shim_6" } : !aie.objectfifo> //B block input + %block_4_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile6_1,{%tile7_1},5){ sym_name ="block_4_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_1,{%tile8_1},6) { sym_name ="block_4_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile8_1,{%tile8_2},2) { sym_name ="block_4_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_4_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile6_2,{%tile7_2},5){ sym_name ="block_4_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_2,{%tile8_2},6) { sym_name ="block_4_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_4_buf_out_shim_6= aie.objectfifo.createObjectFifo(%tile8_2,{%tile6_0},5){ sym_name ="block_4_buf_out_shim_6"} : !aie.objectfifo> //B block output + %block_4_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile6_3,{%tile7_3},5){ sym_name ="block_4_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_3,{%tile8_3},6) { sym_name ="block_4_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile8_3,{%tile8_2},2) { sym_name ="block_4_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_4_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile6_4,{%tile7_4},5){ sym_name ="block_4_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_4_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_4,{%tile8_4},6) { sym_name ="block_4_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_4_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile8_4,{%tile8_2},2) { sym_name ="block_4_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B5 buffers---*- - %block_5_buf_in_shim_6 = AIE.objectfifo.createObjectFifo(%tile6_0,{%tile6_5,%tile7_5,%tile6_6,%tile7_6,%tile6_7,%tile7_7,%tile6_8,%tile7_8},9) { sym_name = "block_5_buf_in_shim_6" } : !AIE.objectfifo> //B block input - %block_5_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_5,{%tile7_5},5){ sym_name ="block_5_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_5,{%tile8_5},6) { sym_name ="block_5_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_5,{%tile8_6},2) { sym_name ="block_5_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_5_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_6,{%tile7_6},5){ sym_name ="block_5_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_6,{%tile8_6},6) { sym_name ="block_5_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_out_shim_6= AIE.objectfifo.createObjectFifo(%tile8_6,{%tile6_0},5){ sym_name ="block_5_buf_out_shim_6"} : !AIE.objectfifo> //B block output - %block_5_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_7,{%tile7_7},5){ sym_name ="block_5_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_7,{%tile8_7},6) { sym_name ="block_5_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_7,{%tile8_6},2) { sym_name ="block_5_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_5_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile6_8,{%tile7_8},5){ sym_name ="block_5_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_5_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile7_8,{%tile8_8},6) { sym_name ="block_5_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_5_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile8_8,{%tile8_6},2) { sym_name ="block_5_buf_row_8_out_flx2"} : !AIE.objectfifo> + %block_5_buf_in_shim_6 = aie.objectfifo.createObjectFifo(%tile6_0,{%tile6_5,%tile7_5,%tile6_6,%tile7_6,%tile6_7,%tile7_7,%tile6_8,%tile7_8},9) { sym_name = "block_5_buf_in_shim_6" } : !aie.objectfifo> //B block input + %block_5_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile6_5,{%tile7_5},5){ sym_name ="block_5_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_5,{%tile8_5},6) { sym_name ="block_5_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile8_5,{%tile8_6},2) { sym_name ="block_5_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_5_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile6_6,{%tile7_6},5){ sym_name ="block_5_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_6,{%tile8_6},6) { sym_name ="block_5_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_5_buf_out_shim_6= aie.objectfifo.createObjectFifo(%tile8_6,{%tile6_0},5){ sym_name ="block_5_buf_out_shim_6"} : !aie.objectfifo> //B block output + %block_5_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile6_7,{%tile7_7},5){ sym_name ="block_5_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_7,{%tile8_7},6) { sym_name ="block_5_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile8_7,{%tile8_6},2) { sym_name ="block_5_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_5_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile6_8,{%tile7_8},5){ sym_name ="block_5_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_5_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile7_8,{%tile8_8},6) { sym_name ="block_5_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_5_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile8_8,{%tile8_6},2) { sym_name ="block_5_buf_row_8_out_flx2"} : !aie.objectfifo> //---Generating B6 buffers---*- - %block_6_buf_in_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile9_1,%tile10_1,%tile9_2,%tile10_2,%tile9_3,%tile10_3,%tile9_4,%tile10_4},9) { sym_name = "block_6_buf_in_shim_7" } : !AIE.objectfifo> //B block input - %block_6_buf_row_1_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_1,{%tile10_1},5){ sym_name ="block_6_buf_row_1_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_1_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_1,{%tile11_1},6) { sym_name ="block_6_buf_row_1_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_1_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_1,{%tile11_2},2) { sym_name ="block_6_buf_row_1_out_flx2"} : !AIE.objectfifo> - %block_6_buf_row_2_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_2,{%tile10_2},5){ sym_name ="block_6_buf_row_2_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_2_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_2,{%tile11_2},6) { sym_name ="block_6_buf_row_2_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_out_shim_7= AIE.objectfifo.createObjectFifo(%tile11_2,{%tile7_0},5){ sym_name ="block_6_buf_out_shim_7"} : !AIE.objectfifo> //B block output - %block_6_buf_row_3_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_3,{%tile10_3},5){ sym_name ="block_6_buf_row_3_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_3_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_3,{%tile11_3},6) { sym_name ="block_6_buf_row_3_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_3_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_3,{%tile11_2},2) { sym_name ="block_6_buf_row_3_out_flx2"} : !AIE.objectfifo> - %block_6_buf_row_4_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_4,{%tile10_4},5){ sym_name ="block_6_buf_row_4_inter_lap"} : !AIE.objectfifo> - %block_6_buf_row_4_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_4,{%tile11_4},6) { sym_name ="block_6_buf_row_4_inter_flx1"} : !AIE.objectfifo> - %block_6_buf_row_4_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_4,{%tile11_2},2) { sym_name ="block_6_buf_row_4_out_flx2"} : !AIE.objectfifo> + %block_6_buf_in_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile9_1,%tile10_1,%tile9_2,%tile10_2,%tile9_3,%tile10_3,%tile9_4,%tile10_4},9) { sym_name = "block_6_buf_in_shim_7" } : !aie.objectfifo> //B block input + %block_6_buf_row_1_inter_lap= aie.objectfifo.createObjectFifo(%tile9_1,{%tile10_1},5){ sym_name ="block_6_buf_row_1_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_1_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_1,{%tile11_1},6) { sym_name ="block_6_buf_row_1_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_1_out_flx2= aie.objectfifo.createObjectFifo(%tile11_1,{%tile11_2},2) { sym_name ="block_6_buf_row_1_out_flx2"} : !aie.objectfifo> + %block_6_buf_row_2_inter_lap= aie.objectfifo.createObjectFifo(%tile9_2,{%tile10_2},5){ sym_name ="block_6_buf_row_2_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_2_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_2,{%tile11_2},6) { sym_name ="block_6_buf_row_2_inter_flx1"} : !aie.objectfifo> + %block_6_buf_out_shim_7= aie.objectfifo.createObjectFifo(%tile11_2,{%tile7_0},5){ sym_name ="block_6_buf_out_shim_7"} : !aie.objectfifo> //B block output + %block_6_buf_row_3_inter_lap= aie.objectfifo.createObjectFifo(%tile9_3,{%tile10_3},5){ sym_name ="block_6_buf_row_3_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_3_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_3,{%tile11_3},6) { sym_name ="block_6_buf_row_3_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_3_out_flx2= aie.objectfifo.createObjectFifo(%tile11_3,{%tile11_2},2) { sym_name ="block_6_buf_row_3_out_flx2"} : !aie.objectfifo> + %block_6_buf_row_4_inter_lap= aie.objectfifo.createObjectFifo(%tile9_4,{%tile10_4},5){ sym_name ="block_6_buf_row_4_inter_lap"} : !aie.objectfifo> + %block_6_buf_row_4_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_4,{%tile11_4},6) { sym_name ="block_6_buf_row_4_inter_flx1"} : !aie.objectfifo> + %block_6_buf_row_4_out_flx2= aie.objectfifo.createObjectFifo(%tile11_4,{%tile11_2},2) { sym_name ="block_6_buf_row_4_out_flx2"} : !aie.objectfifo> //---Generating B7 buffers---*- - %block_7_buf_in_shim_7 = AIE.objectfifo.createObjectFifo(%tile7_0,{%tile9_5,%tile10_5,%tile9_6,%tile10_6,%tile9_7,%tile10_7,%tile9_8,%tile10_8},9) { sym_name = "block_7_buf_in_shim_7" } : !AIE.objectfifo> //B block input - %block_7_buf_row_5_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_5,{%tile10_5},5){ sym_name ="block_7_buf_row_5_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_5_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_5,{%tile11_5},6) { sym_name ="block_7_buf_row_5_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_5_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_5,{%tile11_6},2) { sym_name ="block_7_buf_row_5_out_flx2"} : !AIE.objectfifo> - %block_7_buf_row_6_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_6,{%tile10_6},5){ sym_name ="block_7_buf_row_6_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_6_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_6,{%tile11_6},6) { sym_name ="block_7_buf_row_6_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_out_shim_7= AIE.objectfifo.createObjectFifo(%tile11_6,{%tile7_0},5){ sym_name ="block_7_buf_out_shim_7"} : !AIE.objectfifo> //B block output - %block_7_buf_row_7_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_7,{%tile10_7},5){ sym_name ="block_7_buf_row_7_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_7_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_7,{%tile11_7},6) { sym_name ="block_7_buf_row_7_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_7_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_7,{%tile11_6},2) { sym_name ="block_7_buf_row_7_out_flx2"} : !AIE.objectfifo> - %block_7_buf_row_8_inter_lap= AIE.objectfifo.createObjectFifo(%tile9_8,{%tile10_8},5){ sym_name ="block_7_buf_row_8_inter_lap"} : !AIE.objectfifo> - %block_7_buf_row_8_inter_flx1= AIE.objectfifo.createObjectFifo(%tile10_8,{%tile11_8},6) { sym_name ="block_7_buf_row_8_inter_flx1"} : !AIE.objectfifo> - %block_7_buf_row_8_out_flx2= AIE.objectfifo.createObjectFifo(%tile11_8,{%tile11_6},2) { sym_name ="block_7_buf_row_8_out_flx2"} : !AIE.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> - %ext_buffer_out_0 = AIE.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> - - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> - %ext_buffer_out_1 = AIE.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> - - %ext_buffer_in_2 = AIE.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> - %ext_buffer_out_2 = AIE.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> - - %ext_buffer_in_3 = AIE.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> - %ext_buffer_out_3 = AIE.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> - - %ext_buffer_in_4 = AIE.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<2304 x i32> - %ext_buffer_out_4 = AIE.external_buffer {sym_name = "ddr_buffer_out_4"}: memref<2048 x i32> - - %ext_buffer_in_5 = AIE.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<2304 x i32> - %ext_buffer_out_5 = AIE.external_buffer {sym_name = "ddr_buffer_out_5"}: memref<2048 x i32> - - %ext_buffer_in_6 = AIE.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<2304 x i32> - %ext_buffer_out_6 = AIE.external_buffer {sym_name = "ddr_buffer_out_6"}: memref<2048 x i32> - - %ext_buffer_in_7 = AIE.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<2304 x i32> - %ext_buffer_out_7 = AIE.external_buffer {sym_name = "ddr_buffer_out_7"}: memref<2048 x i32> + %block_7_buf_in_shim_7 = aie.objectfifo.createObjectFifo(%tile7_0,{%tile9_5,%tile10_5,%tile9_6,%tile10_6,%tile9_7,%tile10_7,%tile9_8,%tile10_8},9) { sym_name = "block_7_buf_in_shim_7" } : !aie.objectfifo> //B block input + %block_7_buf_row_5_inter_lap= aie.objectfifo.createObjectFifo(%tile9_5,{%tile10_5},5){ sym_name ="block_7_buf_row_5_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_5_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_5,{%tile11_5},6) { sym_name ="block_7_buf_row_5_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_5_out_flx2= aie.objectfifo.createObjectFifo(%tile11_5,{%tile11_6},2) { sym_name ="block_7_buf_row_5_out_flx2"} : !aie.objectfifo> + %block_7_buf_row_6_inter_lap= aie.objectfifo.createObjectFifo(%tile9_6,{%tile10_6},5){ sym_name ="block_7_buf_row_6_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_6_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_6,{%tile11_6},6) { sym_name ="block_7_buf_row_6_inter_flx1"} : !aie.objectfifo> + %block_7_buf_out_shim_7= aie.objectfifo.createObjectFifo(%tile11_6,{%tile7_0},5){ sym_name ="block_7_buf_out_shim_7"} : !aie.objectfifo> //B block output + %block_7_buf_row_7_inter_lap= aie.objectfifo.createObjectFifo(%tile9_7,{%tile10_7},5){ sym_name ="block_7_buf_row_7_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_7_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_7,{%tile11_7},6) { sym_name ="block_7_buf_row_7_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_7_out_flx2= aie.objectfifo.createObjectFifo(%tile11_7,{%tile11_6},2) { sym_name ="block_7_buf_row_7_out_flx2"} : !aie.objectfifo> + %block_7_buf_row_8_inter_lap= aie.objectfifo.createObjectFifo(%tile9_8,{%tile10_8},5){ sym_name ="block_7_buf_row_8_inter_lap"} : !aie.objectfifo> + %block_7_buf_row_8_inter_flx1= aie.objectfifo.createObjectFifo(%tile10_8,{%tile11_8},6) { sym_name ="block_7_buf_row_8_inter_flx1"} : !aie.objectfifo> + %block_7_buf_row_8_out_flx2= aie.objectfifo.createObjectFifo(%tile11_8,{%tile11_6},2) { sym_name ="block_7_buf_row_8_out_flx2"} : !aie.objectfifo> + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ddr_buffer_in_0"}: memref<2304 x i32> + %ext_buffer_out_0 = aie.external_buffer {sym_name = "ddr_buffer_out_0"}: memref<2048 x i32> + + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ddr_buffer_in_1"}: memref<2304 x i32> + %ext_buffer_out_1 = aie.external_buffer {sym_name = "ddr_buffer_out_1"}: memref<2048 x i32> + + %ext_buffer_in_2 = aie.external_buffer {sym_name = "ddr_buffer_in_2"}: memref<2304 x i32> + %ext_buffer_out_2 = aie.external_buffer {sym_name = "ddr_buffer_out_2"}: memref<2048 x i32> + + %ext_buffer_in_3 = aie.external_buffer {sym_name = "ddr_buffer_in_3"}: memref<2304 x i32> + %ext_buffer_out_3 = aie.external_buffer {sym_name = "ddr_buffer_out_3"}: memref<2048 x i32> + + %ext_buffer_in_4 = aie.external_buffer {sym_name = "ddr_buffer_in_4"}: memref<2304 x i32> + %ext_buffer_out_4 = aie.external_buffer {sym_name = "ddr_buffer_out_4"}: memref<2048 x i32> + + %ext_buffer_in_5 = aie.external_buffer {sym_name = "ddr_buffer_in_5"}: memref<2304 x i32> + %ext_buffer_out_5 = aie.external_buffer {sym_name = "ddr_buffer_out_5"}: memref<2048 x i32> + + %ext_buffer_in_6 = aie.external_buffer {sym_name = "ddr_buffer_in_6"}: memref<2304 x i32> + %ext_buffer_out_6 = aie.external_buffer {sym_name = "ddr_buffer_out_6"}: memref<2048 x i32> + + %ext_buffer_in_7 = aie.external_buffer {sym_name = "ddr_buffer_in_7"}: memref<2304 x i32> + %ext_buffer_out_7 = aie.external_buffer {sym_name = "ddr_buffer_out_7"}: memref<2048 x i32> //Registering buffers - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_0}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_0_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_0}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !AIE.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !AIE.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_in_shim_2 : !aie.objectfifo>, {%ext_buffer_in_1}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile2_0, %block_1_buf_out_shim_2 : !aie.objectfifo>, {%ext_buffer_out_1}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_2}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_2_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_2}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !AIE.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !AIE.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_in_shim_3 : !aie.objectfifo>, {%ext_buffer_in_3}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile3_0, %block_3_buf_out_shim_3 : !aie.objectfifo>, {%ext_buffer_out_3}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_in_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_4}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_out_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_4}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_in_shim_6 : !aie.objectfifo>, {%ext_buffer_in_4}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_4_buf_out_shim_6 : !aie.objectfifo>, {%ext_buffer_out_4}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_in_shim_6 : !AIE.objectfifo>, {%ext_buffer_in_5}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_out_shim_6 : !AIE.objectfifo>, {%ext_buffer_out_5}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_in_shim_6 : !aie.objectfifo>, {%ext_buffer_in_5}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile6_0, %block_5_buf_out_shim_6 : !aie.objectfifo>, {%ext_buffer_out_5}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_in_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_6}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_out_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_6}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_in_shim_7 : !aie.objectfifo>, {%ext_buffer_in_6}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_6_buf_out_shim_7 : !aie.objectfifo>, {%ext_buffer_out_6}) : (memref<2048xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_in_shim_7 : !AIE.objectfifo>, {%ext_buffer_in_7}) : (memref<2304xi32>) - AIE.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_out_shim_7 : !AIE.objectfifo>, {%ext_buffer_out_7}) : (memref<2048xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_in_shim_7 : !aie.objectfifo>, {%ext_buffer_in_7}) : (memref<2304xi32>) + aie.objectfifo.register_external_buffers(%tile7_0, %block_7_buf_out_shim_7 : !aie.objectfifo>, {%ext_buffer_out_7}) : (memref<2048xi32>) func.func private @hdiff_lap(%AL: memref<256xi32>,%BL: memref<256xi32>, %CL: memref<256xi32>, %DL: memref<256xi32>, %EL: memref<256xi32>, %OLL1: memref<256xi32>, %OLL2: memref<256xi32>, %OLL3: memref<256xi32>, %OLL4: memref<256xi32>) -> () func.func private @hdiff_flux1(%AF: memref<256xi32>,%BF: memref<256xi32>, %CF: memref<256xi32>, %OLF1: memref<256xi32>, %OLF2: memref<256xi32>, %OLF3: memref<256xi32>, %OLF4: memref<256xi32>, %OFI1: memref<512xi32>, %OFI2: memref<512xi32>, %OFI3: memref<512xi32>, %OFI4: memref<512xi32>, %OFI5: memref<512xi32>) -> () func.func private @hdiff_flux2( %Inter1: memref<512xi32>,%Inter2: memref<512xi32>, %Inter3: memref<512xi32>,%Inter4: memref<512xi32>,%Inter5: memref<512xi32>, %Out: memref<256xi32>) -> () - %block_0_core0_1 = AIE.core(%tile0_1) { + %block_0_core0_1 = aie.core(%tile0_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_1 = AIE.core(%tile1_1) { + %block_0_core1_1 = aie.core(%tile1_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_1 = AIE.core(%tile2_1) { + %block_0_core2_1 = aie.core(%tile2_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_2 = AIE.core(%tile0_2) { + %block_0_core0_2 = aie.core(%tile0_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock02_14, "Acquire", 0) // start the timer + aie.use_lock(%lock02_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_2 = AIE.core(%tile1_2) { + %block_0_core1_2 = aie.core(%tile1_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_0_core2_2 = AIE.core(%tile2_2) { + %block_0_core2_2 = aie.core(%tile2_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -534,354 +534,354 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock22_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock22_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_3 = AIE.core(%tile0_3) { + %block_0_core0_3 = aie.core(%tile0_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_3 = AIE.core(%tile1_3) { + %block_0_core1_3 = aie.core(%tile1_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_3 = AIE.core(%tile2_3) { + %block_0_core2_3 = aie.core(%tile2_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_0_core0_4 = AIE.core(%tile0_4) { + %block_0_core0_4 = aie.core(%tile0_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_0_core1_4 = AIE.core(%tile1_4) { + %block_0_core1_4 = aie.core(%tile1_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_0_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_0_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_0_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_0_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_0_core2_4 = AIE.core(%tile2_4) { + %block_0_core2_4 = aie.core(%tile2_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_0_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_0_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_0_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_0_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_0_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_5 = AIE.core(%tile0_5) { + %block_1_core0_5 = aie.core(%tile0_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_5 = AIE.core(%tile1_5) { + %block_1_core1_5 = aie.core(%tile1_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_5 = AIE.core(%tile2_5) { + %block_1_core2_5 = aie.core(%tile2_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_6 = AIE.core(%tile0_6) { + %block_1_core0_6 = aie.core(%tile0_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock06_14, "Acquire", 0) // start the timer + aie.use_lock(%lock06_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_6 = AIE.core(%tile1_6) { + %block_1_core1_6 = aie.core(%tile1_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_1_core2_6 = AIE.core(%tile2_6) { + %block_1_core2_6 = aie.core(%tile2_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_out_shim_2: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_out_shim_2: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -889,354 +889,354 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_out_shim_2:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_out_shim_2:!aie.objectfifo>, 4) } - AIE.use_lock(%lock26_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock26_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_7 = AIE.core(%tile0_7) { + %block_1_core0_7 = aie.core(%tile0_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_7 = AIE.core(%tile1_7) { + %block_1_core1_7 = aie.core(%tile1_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_7 = AIE.core(%tile2_7) { + %block_1_core2_7 = aie.core(%tile2_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_1_core0_8 = AIE.core(%tile0_8) { + %block_1_core0_8 = aie.core(%tile0_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_1_core1_8 = AIE.core(%tile1_8) { + %block_1_core1_8 = aie.core(%tile1_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_1_buf_in_shim_2: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_1_buf_in_shim_2: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_1_buf_in_shim_2: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_1_buf_in_shim_2: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_1_core2_8 = AIE.core(%tile2_8) { + %block_1_core2_8 = aie.core(%tile2_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_1_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_1_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_1_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_1_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_1_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_1 = AIE.core(%tile3_1) { + %block_2_core3_1 = aie.core(%tile3_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_1 = AIE.core(%tile4_1) { + %block_2_core4_1 = aie.core(%tile4_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_1 = AIE.core(%tile5_1) { + %block_2_core5_1 = aie.core(%tile5_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_2 = AIE.core(%tile3_2) { + %block_2_core3_2 = aie.core(%tile3_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock32_14, "Acquire", 0) // start the timer + aie.use_lock(%lock32_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_2 = AIE.core(%tile4_2) { + %block_2_core4_2 = aie.core(%tile4_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_2_core5_2 = AIE.core(%tile5_2) { + %block_2_core5_2 = aie.core(%tile5_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1244,354 +1244,354 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock52_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock52_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_3 = AIE.core(%tile3_3) { + %block_2_core3_3 = aie.core(%tile3_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_3 = AIE.core(%tile4_3) { + %block_2_core4_3 = aie.core(%tile4_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_3 = AIE.core(%tile5_3) { + %block_2_core5_3 = aie.core(%tile5_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_2_core3_4 = AIE.core(%tile3_4) { + %block_2_core3_4 = aie.core(%tile3_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_2_core4_4 = AIE.core(%tile4_4) { + %block_2_core4_4 = aie.core(%tile4_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_2_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_2_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_2_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_2_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_2_core5_4 = AIE.core(%tile5_4) { + %block_2_core5_4 = aie.core(%tile5_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_2_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_2_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_2_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_2_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_2_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_5 = AIE.core(%tile3_5) { + %block_3_core3_5 = aie.core(%tile3_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_5 = AIE.core(%tile4_5) { + %block_3_core4_5 = aie.core(%tile4_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_5 = AIE.core(%tile5_5) { + %block_3_core5_5 = aie.core(%tile5_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_6 = AIE.core(%tile3_6) { + %block_3_core3_6 = aie.core(%tile3_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock36_14, "Acquire", 0) // start the timer + aie.use_lock(%lock36_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_6 = AIE.core(%tile4_6) { + %block_3_core4_6 = aie.core(%tile4_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_3_core5_6 = AIE.core(%tile5_6) { + %block_3_core5_6 = aie.core(%tile5_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_out_shim_3: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_out_shim_3: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1599,354 +1599,354 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_out_shim_3:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_out_shim_3:!aie.objectfifo>, 4) } - AIE.use_lock(%lock56_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock56_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_7 = AIE.core(%tile3_7) { + %block_3_core3_7 = aie.core(%tile3_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_7 = AIE.core(%tile4_7) { + %block_3_core4_7 = aie.core(%tile4_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_7 = AIE.core(%tile5_7) { + %block_3_core5_7 = aie.core(%tile5_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_3_core3_8 = AIE.core(%tile3_8) { + %block_3_core3_8 = aie.core(%tile3_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_3_core4_8 = AIE.core(%tile4_8) { + %block_3_core4_8 = aie.core(%tile4_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_3_buf_in_shim_3: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_3_buf_in_shim_3: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_3_buf_in_shim_3: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_3_buf_in_shim_3: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_3_core5_8 = AIE.core(%tile5_8) { + %block_3_core5_8 = aie.core(%tile5_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_3_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_3_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_3_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_3_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_3_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_1 = AIE.core(%tile6_1) { + %block_4_core6_1 = aie.core(%tile6_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_1 = AIE.core(%tile7_1) { + %block_4_core7_1 = aie.core(%tile7_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_1 = AIE.core(%tile8_1) { + %block_4_core8_1 = aie.core(%tile8_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_2 = AIE.core(%tile6_2) { + %block_4_core6_2 = aie.core(%tile6_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock62_14, "Acquire", 0) // start the timer + aie.use_lock(%lock62_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_2 = AIE.core(%tile7_2) { + %block_4_core7_2 = aie.core(%tile7_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_4_core8_2 = AIE.core(%tile8_2) { + %block_4_core8_2 = aie.core(%tile8_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_out_shim_6: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_out_shim_6: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -1954,354 +1954,354 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_out_shim_6:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_out_shim_6:!aie.objectfifo>, 4) } - AIE.use_lock(%lock82_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock82_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_3 = AIE.core(%tile6_3) { + %block_4_core6_3 = aie.core(%tile6_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_3 = AIE.core(%tile7_3) { + %block_4_core7_3 = aie.core(%tile7_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_3 = AIE.core(%tile8_3) { + %block_4_core8_3 = aie.core(%tile8_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_4_core6_4 = AIE.core(%tile6_4) { + %block_4_core6_4 = aie.core(%tile6_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_4_core7_4 = AIE.core(%tile7_4) { + %block_4_core7_4 = aie.core(%tile7_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_4_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_4_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_4_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_4_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_4_core8_4 = AIE.core(%tile8_4) { + %block_4_core8_4 = aie.core(%tile8_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_4_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_4_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_4_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_4_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_4_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_4_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_5 = AIE.core(%tile6_5) { + %block_5_core6_5 = aie.core(%tile6_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_5 = AIE.core(%tile7_5) { + %block_5_core7_5 = aie.core(%tile7_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_5 = AIE.core(%tile8_5) { + %block_5_core8_5 = aie.core(%tile8_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_6 = AIE.core(%tile6_6) { + %block_5_core6_6 = aie.core(%tile6_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock66_14, "Acquire", 0) // start the timer + aie.use_lock(%lock66_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_6 = AIE.core(%tile7_6) { + %block_5_core7_6 = aie.core(%tile7_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_5_core8_6 = AIE.core(%tile8_6) { + %block_5_core8_6 = aie.core(%tile8_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_out_shim_6: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_out_shim_6: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -2309,354 +2309,354 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_out_shim_6:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_out_shim_6:!aie.objectfifo>, 4) } - AIE.use_lock(%lock86_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock86_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_7 = AIE.core(%tile6_7) { + %block_5_core6_7 = aie.core(%tile6_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_7 = AIE.core(%tile7_7) { + %block_5_core7_7 = aie.core(%tile7_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_7 = AIE.core(%tile8_7) { + %block_5_core8_7 = aie.core(%tile8_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_5_core6_8 = AIE.core(%tile6_8) { + %block_5_core6_8 = aie.core(%tile6_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_5_core7_8 = AIE.core(%tile7_8) { + %block_5_core7_8 = aie.core(%tile7_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_5_buf_in_shim_6: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_5_buf_in_shim_6: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_5_buf_in_shim_6: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_5_buf_in_shim_6: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_5_core8_8 = AIE.core(%tile8_8) { + %block_5_core8_8 = aie.core(%tile8_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_5_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_5_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_5_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_5_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_5_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_5_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_1 = AIE.core(%tile9_1) { + %block_6_core9_1 = aie.core(%tile9_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_1 = AIE.core(%tile10_1) { + %block_6_core10_1 = aie.core(%tile10_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_1_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_1 = AIE.core(%tile11_1) { + %block_6_core11_1 = aie.core(%tile11_1) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_1_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_1_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_1_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_1_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_1_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_2 = AIE.core(%tile9_2) { + %block_6_core9_2 = aie.core(%tile9_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock92_14, "Acquire", 0) // start the timer + aie.use_lock(%lock92_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_2 = AIE.core(%tile10_2) { + %block_6_core10_2 = aie.core(%tile10_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_2_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_2_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_6_core11_2 = AIE.core(%tile11_2) { + %block_6_core11_2 = aie.core(%tile11_2) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_2_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_out_shim_7: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_out_shim_7: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_1_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -2664,354 +2664,354 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_2_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_1_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_3_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_4_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_out_shim_7:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_2_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_1_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_out_shim_7:!aie.objectfifo>, 4) } - AIE.use_lock(%lock112_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock112_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_3 = AIE.core(%tile9_3) { + %block_6_core9_3 = aie.core(%tile9_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_3 = AIE.core(%tile10_3) { + %block_6_core10_3 = aie.core(%tile10_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_3_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_3 = AIE.core(%tile11_3) { + %block_6_core11_3 = aie.core(%tile11_3) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_3_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_3_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_3_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_3_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_3_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_3_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_6_core9_4 = AIE.core(%tile9_4) { + %block_6_core9_4 = aie.core(%tile9_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_6_core10_4 = AIE.core(%tile10_4) { + %block_6_core10_4 = aie.core(%tile10_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_6_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_6_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_4_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_6_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_6_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_6_core11_4 = AIE.core(%tile11_4) { + %block_6_core11_4 = aie.core(%tile11_4) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_6_buf_row_4_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_6_buf_row_4_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_6_buf_row_4_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_6_buf_row_4_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_6_buf_row_4_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_6_buf_row_4_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_5 = AIE.core(%tile9_5) { + %block_7_core9_5 = aie.core(%tile9_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[0] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_5 = AIE.core(%tile10_5) { + %block_7_core10_5 = aie.core(%tile10_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_5_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_5 = AIE.core(%tile11_5) { + %block_7_core11_5 = aie.core(%tile11_5) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_5_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_5_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_5_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_5_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_5_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_6 = AIE.core(%tile9_6) { + %block_7_core9_6 = aie.core(%tile9_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index - AIE.use_lock(%lock96_14, "Acquire", 0) // start the timer + aie.use_lock(%lock96_14, "Acquire", 0) // start the timer scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[1] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[1] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_6 = AIE.core(%tile10_6) { + %block_7_core10_6 = aie.core(%tile10_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_6_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_6_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } // Gathering Tile - %block_7_core11_6 = AIE.core(%tile11_6) { + %block_7_core11_6 = aie.core(%tile11_6) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_6_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_out_shim_7: !AIE.objectfifo>, 4): !AIE.objectfifosubview> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_out_shim_7: !aie.objectfifo>, 4): !aie.objectfifosubview> // Acquire all elements and add in order - %obj_out_flux_element0 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_flux_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element0 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element2 = aie.objectfifo.subview.access %obj_out_subview_flux[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_flux_element3 = aie.objectfifo.subview.access %obj_out_subview_flux[3] : !aie.objectfifosubview> -> memref<256xi32> // Acquiring outputs from other flux - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_5_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux3 = AIE.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from3 = AIE.objectfifo.subview.access %obj_out_subview_flux3[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux3 = aie.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from3 = aie.objectfifo.subview.access %obj_out_subview_flux3[0] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux4 = AIE.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %final_out_from4 = AIE.objectfifo.subview.access %obj_out_subview_flux4[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux4 = aie.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %final_out_from4 = aie.objectfifo.subview.access %obj_out_subview_flux4[0] : !aie.objectfifosubview> -> memref<256xi32> // Ordering and copying data to gather tile (src-->dst) memref.copy %final_out_from1 , %obj_out_flux_element0 : memref<256xi32> to memref<256xi32> @@ -3019,180 +3019,180 @@ module @hdiff_bundle_8 { memref.copy %final_out_from4 , %obj_out_flux_element3 : memref<256xi32> to memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_6_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_5_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_7_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_8_out_flx2:!AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_out_shim_7:!AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_6_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_5_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_out_flx2:!aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_out_shim_7:!aie.objectfifo>, 4) } - AIE.use_lock(%lock116_14, "Acquire", 0) // stop the timer - AIE.end + aie.use_lock(%lock116_14, "Acquire", 0) // stop the timer + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_7 = AIE.core(%tile9_7) { + %block_7_core9_7 = aie.core(%tile9_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[2] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[2] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_7 = AIE.core(%tile10_7) { + %block_7_core10_7 = aie.core(%tile10_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_7_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_7 = AIE.core(%tile11_7) { + %block_7_core11_7 = aie.core(%tile11_7) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_7_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_7_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_7_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_7_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_7_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_7_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } - %block_7_core9_8 = AIE.core(%tile9_8) { + %block_7_core9_8 = aie.core(%tile9_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row0 = AIE.objectfifo.subview.access %obj_in_subview[3] : !AIE.objectfifosubview> -> memref<256xi32> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> - %row4 = AIE.objectfifo.subview.access %obj_in_subview[7] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row0 = aie.objectfifo.subview.access %obj_in_subview[3] : !aie.objectfifosubview> -> memref<256xi32> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> + %row4 = aie.objectfifo.subview.access %obj_in_subview[7] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_lap(%row0,%row1,%row2,%row3,%row4,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) - AIE.objectfifo.release(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 4) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 4) + aie.end } { link_with="hdiff_lap.o" } - %block_7_core10_8 = AIE.core(%tile10_8) { + %block_7_core10_8 = aie.core(%tile10_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_in_subview = AIE.objectfifo.acquire(%block_7_buf_in_shim_7: !AIE.objectfifo>, 8) : !AIE.objectfifosubview> - %row1 = AIE.objectfifo.subview.access %obj_in_subview[4] : !AIE.objectfifosubview> -> memref<256xi32> - %row2 = AIE.objectfifo.subview.access %obj_in_subview[5] : !AIE.objectfifosubview> -> memref<256xi32> - %row3 = AIE.objectfifo.subview.access %obj_in_subview[6] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_in_subview = aie.objectfifo.acquire(%block_7_buf_in_shim_7: !aie.objectfifo>, 8) : !aie.objectfifosubview> + %row1 = aie.objectfifo.subview.access %obj_in_subview[4] : !aie.objectfifosubview> -> memref<256xi32> + %row2 = aie.objectfifo.subview.access %obj_in_subview[5] : !aie.objectfifosubview> -> memref<256xi32> + %row3 = aie.objectfifo.subview.access %obj_in_subview[6] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_lap = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4): !AIE.objectfifosubview> - %obj_out_lap1 = AIE.objectfifo.subview.access %obj_out_subview_lap[0] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap2 = AIE.objectfifo.subview.access %obj_out_subview_lap[1] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap3 = AIE.objectfifo.subview.access %obj_out_subview_lap[2] : !AIE.objectfifosubview> -> memref<256xi32> - %obj_out_lap4 = AIE.objectfifo.subview.access %obj_out_subview_lap[3] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_lap = aie.objectfifo.acquire(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4): !aie.objectfifosubview> + %obj_out_lap1 = aie.objectfifo.subview.access %obj_out_subview_lap[0] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap2 = aie.objectfifo.subview.access %obj_out_subview_lap[1] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap3 = aie.objectfifo.subview.access %obj_out_subview_lap[2] : !aie.objectfifosubview> -> memref<256xi32> + %obj_out_lap4 = aie.objectfifo.subview.access %obj_out_subview_lap[3] : !aie.objectfifosubview> -> memref<256xi32> - %obj_out_subview_flux1 = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_out_flux_inter1 = AIE.objectfifo.subview.access %obj_out_subview_flux1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter2 = AIE.objectfifo.subview.access %obj_out_subview_flux1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter3 = AIE.objectfifo.subview.access %obj_out_subview_flux1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter4 = AIE.objectfifo.subview.access %obj_out_subview_flux1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_out_flux_inter5 = AIE.objectfifo.subview.access %obj_out_subview_flux1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux1 = aie.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_out_flux_inter1 = aie.objectfifo.subview.access %obj_out_subview_flux1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter2 = aie.objectfifo.subview.access %obj_out_subview_flux1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter3 = aie.objectfifo.subview.access %obj_out_subview_flux1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter4 = aie.objectfifo.subview.access %obj_out_subview_flux1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_out_flux_inter5 = aie.objectfifo.subview.access %obj_out_subview_flux1[4] : !aie.objectfifosubview> -> memref<512xi32> func.call @hdiff_flux1(%row1,%row2,%row3,%obj_out_lap1,%obj_out_lap2,%obj_out_lap3,%obj_out_lap4, %obj_out_flux_inter1 , %obj_out_flux_inter2, %obj_out_flux_inter3, %obj_out_flux_inter4, %obj_out_flux_inter5) : (memref<256xi32>,memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<256xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_8_inter_lap: !AIE.objectfifo>, 4) - AIE.objectfifo.release(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_lap: !aie.objectfifo>, 4) + aie.objectfifo.release(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 1) } - AIE.objectfifo.release(%block_7_buf_in_shim_7: !AIE.objectfifo>, 7) - AIE.end + aie.objectfifo.release(%block_7_buf_in_shim_7: !aie.objectfifo>, 7) + aie.end } { link_with="hdiff_flux1.o" } - %block_7_core11_8 = AIE.core(%tile11_8) { + %block_7_core11_8 = aie.core(%tile11_8) { %lb = arith.constant 0 : index %ub = arith.constant 2 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - %obj_out_subview_flux_inter1 = AIE.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !AIE.objectfifo>, 5): !AIE.objectfifosubview> - %obj_flux_inter_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element2 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element3 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element4 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !AIE.objectfifosubview> -> memref<512xi32> - %obj_flux_inter_element5 = AIE.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !AIE.objectfifosubview> -> memref<512xi32> + %obj_out_subview_flux_inter1 = aie.objectfifo.acquire(%block_7_buf_row_8_inter_flx1: !aie.objectfifo>, 5): !aie.objectfifosubview> + %obj_flux_inter_element1 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[0] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element2 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[1] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element3 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[2] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element4 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[3] : !aie.objectfifosubview> -> memref<512xi32> + %obj_flux_inter_element5 = aie.objectfifo.subview.access %obj_out_subview_flux_inter1[4] : !aie.objectfifosubview> -> memref<512xi32> - %obj_out_subview_flux = AIE.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !AIE.objectfifo>, 1): !AIE.objectfifosubview> - %obj_out_flux_element1 = AIE.objectfifo.subview.access %obj_out_subview_flux[0] : !AIE.objectfifosubview> -> memref<256xi32> + %obj_out_subview_flux = aie.objectfifo.acquire(%block_7_buf_row_8_out_flx2: !aie.objectfifo>, 1): !aie.objectfifosubview> + %obj_out_flux_element1 = aie.objectfifo.subview.access %obj_out_subview_flux[0] : !aie.objectfifosubview> -> memref<256xi32> func.call @hdiff_flux2(%obj_flux_inter_element1, %obj_flux_inter_element2,%obj_flux_inter_element3, %obj_flux_inter_element4, %obj_flux_inter_element5, %obj_out_flux_element1 ) : ( memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<512xi32>, memref<256xi32>) -> () - AIE.objectfifo.release(%block_7_buf_row_8_inter_flx1 :!AIE.objectfifo>, 5) - AIE.objectfifo.release(%block_7_buf_row_8_out_flx2 :!AIE.objectfifo>, 1) + aie.objectfifo.release(%block_7_buf_row_8_inter_flx1 :!aie.objectfifo>, 5) + aie.objectfifo.release(%block_7_buf_row_8_out_flx2 :!aie.objectfifo>, 1) } - AIE.end + aie.end } { link_with="hdiff_flux2.o" } } diff --git a/reference_designs/idct/aie.mlir b/reference_designs/idct/aie.mlir index 7d13971a8e..d2fab524f8 100644 --- a/reference_designs/idct/aie.mlir +++ b/reference_designs/idct/aie.mlir @@ -16,229 +16,229 @@ module @idct { - %t74 = AIE.tile(7, 4) - %t75 = AIE.tile(7, 5) - - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) - - %buf_73_aping = AIE.buffer(%t73) {sym_name = "a73_ping" } : memref<64xi16> - %buf_73_apong = AIE.buffer(%t73) {sym_name = "a73_pong" } : memref<64xi16> - %buf_73_bping = AIE.buffer(%t73) {sym_name = "b73_ping" } : memref<64xi16> - %buf_73_bpong = AIE.buffer(%t73) {sym_name = "b73_pong" } : memref<64xi16> - - %lock_73_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_73_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_73_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_73_b_pong = AIE.lock(%t73, 6) // b_pong - - %buf_74_aping = AIE.buffer(%t74) {sym_name = "a74_ping" } : memref<64xi16> - %buf_74_apong = AIE.buffer(%t74) {sym_name = "a74_pong" } : memref<64xi16> - %buf_74_bping = AIE.buffer(%t74) {sym_name = "b74_ping" } : memref<64xi16> - %buf_74_bpong = AIE.buffer(%t74) {sym_name = "b74_pong" } : memref<64xi16> - - %lock_74_a_ping = AIE.lock(%t74, 3) // a_ping - %lock_74_a_pong = AIE.lock(%t74, 4) // a_pong - %lock_74_b_ping = AIE.lock(%t74, 5) // b_ping - %lock_74_b_pong = AIE.lock(%t74, 6) // b_pong - - %buf_75_aping = AIE.buffer(%t75) {sym_name = "a75_ping" } : memref<64xi16> - %buf_75_apong = AIE.buffer(%t75) {sym_name = "a75_pong" } : memref<64xi16> - %buf_75_bping = AIE.buffer(%t75) {sym_name = "b75_ping" } : memref<64xi16> - %buf_75_bpong = AIE.buffer(%t75) {sym_name = "b75_pong" } : memref<64xi16> - - %lock_75_a_ping = AIE.lock(%t75, 3) // a_ping - %lock_75_a_pong = AIE.lock(%t75, 4) // a_pong - %lock_75_b_ping = AIE.lock(%t75, 5) // b_ping - %lock_75_b_pong = AIE.lock(%t75, 6) // b_pong - - AIE.flow(%t70, DMA : 0, %t73, DMA : 0) - AIE.flow(%t73, DMA : 1, %t74, DMA : 0) - AIE.flow(%t74, DMA : 1, %t75, DMA : 0) - AIE.flow(%t75, DMA : 1, %t70, DMA : 0) + %t74 = aie.tile(7, 4) + %t75 = aie.tile(7, 5) + + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) + + %buf_73_aping = aie.buffer(%t73) {sym_name = "a73_ping" } : memref<64xi16> + %buf_73_apong = aie.buffer(%t73) {sym_name = "a73_pong" } : memref<64xi16> + %buf_73_bping = aie.buffer(%t73) {sym_name = "b73_ping" } : memref<64xi16> + %buf_73_bpong = aie.buffer(%t73) {sym_name = "b73_pong" } : memref<64xi16> + + %lock_73_a_ping = aie.lock(%t73, 3) // a_ping + %lock_73_a_pong = aie.lock(%t73, 4) // a_pong + %lock_73_b_ping = aie.lock(%t73, 5) // b_ping + %lock_73_b_pong = aie.lock(%t73, 6) // b_pong + + %buf_74_aping = aie.buffer(%t74) {sym_name = "a74_ping" } : memref<64xi16> + %buf_74_apong = aie.buffer(%t74) {sym_name = "a74_pong" } : memref<64xi16> + %buf_74_bping = aie.buffer(%t74) {sym_name = "b74_ping" } : memref<64xi16> + %buf_74_bpong = aie.buffer(%t74) {sym_name = "b74_pong" } : memref<64xi16> + + %lock_74_a_ping = aie.lock(%t74, 3) // a_ping + %lock_74_a_pong = aie.lock(%t74, 4) // a_pong + %lock_74_b_ping = aie.lock(%t74, 5) // b_ping + %lock_74_b_pong = aie.lock(%t74, 6) // b_pong + + %buf_75_aping = aie.buffer(%t75) {sym_name = "a75_ping" } : memref<64xi16> + %buf_75_apong = aie.buffer(%t75) {sym_name = "a75_pong" } : memref<64xi16> + %buf_75_bping = aie.buffer(%t75) {sym_name = "b75_ping" } : memref<64xi16> + %buf_75_bpong = aie.buffer(%t75) {sym_name = "b75_pong" } : memref<64xi16> + + %lock_75_a_ping = aie.lock(%t75, 3) // a_ping + %lock_75_a_pong = aie.lock(%t75, 4) // a_pong + %lock_75_b_ping = aie.lock(%t75, 5) // b_ping + %lock_75_b_pong = aie.lock(%t75, 6) // b_pong + + aie.flow(%t70, DMA : 0, %t73, DMA : 0) + aie.flow(%t73, DMA : 1, %t74, DMA : 0) + aie.flow(%t74, DMA : 1, %t75, DMA : 0) + aie.flow(%t75, DMA : 1, %t70, DMA : 0) func.func private @dequant_8x8(%A: memref<64xi16>, %B: memref<64xi16>) -> () func.func private @idct_8x8_mmult_h(%A: memref<64xi16>, %B: memref<64xi16>) -> () func.func private @idct_8x8_mmult_v(%A: memref<64xi16>, %B: memref<64xi16>) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %lb = arith.constant 0 : index %ub = arith.constant 4 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_73_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_73_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_73_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_73_b_ping, "Acquire", 0) // acquire for write func.call @dequant_8x8(%buf_73_aping, %buf_73_bping) : (memref<64xi16>, memref<64xi16>) -> () - AIE.use_lock(%lock_73_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_73_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_73_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_73_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_73_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_73_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_73_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_73_b_pong, "Acquire", 0) // acquire for write func.call @dequant_8x8(%buf_73_apong, %buf_73_bpong) : (memref<64xi16>, memref<64xi16>) -> () - AIE.use_lock(%lock_73_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_73_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_73_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_73_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } { link_with="dequant.o" } - %c74 = AIE.core(%t74) { + %c74 = aie.core(%t74) { %lb = arith.constant 0 : index %ub = arith.constant 4 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_74_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_74_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_74_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_74_b_ping, "Acquire", 0) // acquire for write func.call @idct_8x8_mmult_h(%buf_74_aping, %buf_74_bping) : (memref<64xi16>, memref<64xi16>) -> () - AIE.use_lock(%lock_74_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_74_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_74_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_74_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_74_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_74_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_74_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_74_b_pong, "Acquire", 0) // acquire for write func.call @idct_8x8_mmult_h(%buf_74_apong, %buf_74_bpong) : (memref<64xi16>, memref<64xi16>) -> () - AIE.use_lock(%lock_74_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_74_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_74_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_74_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } { link_with="idct_horizontal.o" } - %c75 = AIE.core(%t75) { + %c75 = aie.core(%t75) { %lb = arith.constant 0 : index %ub = arith.constant 4 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_75_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_75_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_75_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_75_b_ping, "Acquire", 0) // acquire for write func.call @idct_8x8_mmult_v(%buf_75_aping, %buf_75_bping) : (memref<64xi16>, memref<64xi16>) -> () - AIE.use_lock(%lock_75_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_75_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_75_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_75_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_75_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_75_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_75_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_75_b_pong, "Acquire", 0) // acquire for write func.call @idct_8x8_mmult_v(%buf_75_apong, %buf_75_bpong) : (memref<64xi16>, memref<64xi16>) -> () - AIE.use_lock(%lock_75_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_75_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_75_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_75_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } { link_with="idct_vertical.o" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_73_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_73_aping : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_73_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_73_a_ping, "Acquire", 0) + aie.dma_bd(%buf_73_aping : memref<64xi16>, 0, 64) + aie.use_lock(%lock_73_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_73_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_73_apong : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_73_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_73_a_pong, "Acquire", 0) + aie.dma_bd(%buf_73_apong : memref<64xi16>, 0, 64) + aie.use_lock(%lock_73_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_73_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_73_bping : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_73_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_73_b_ping, "Acquire", 1) + aie.dma_bd(%buf_73_bping : memref<64xi16>, 0, 64) + aie.use_lock(%lock_73_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_73_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_73_bpong : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_73_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_73_b_pong, "Acquire", 1) + aie.dma_bd(%buf_73_bpong : memref<64xi16>, 0, 64) + aie.use_lock(%lock_73_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // Tile DMA - %m74 = AIE.mem(%t74) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m74 = aie.mem(%t74) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_74_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_74_aping : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_74_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_74_a_ping, "Acquire", 0) + aie.dma_bd(%buf_74_aping : memref<64xi16>, 0, 64) + aie.use_lock(%lock_74_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_74_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_74_apong : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_74_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_74_a_pong, "Acquire", 0) + aie.dma_bd(%buf_74_apong : memref<64xi16>, 0, 64) + aie.use_lock(%lock_74_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_74_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_74_bping : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_74_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_74_b_ping, "Acquire", 1) + aie.dma_bd(%buf_74_bping : memref<64xi16>, 0, 64) + aie.use_lock(%lock_74_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_74_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_74_bpong : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_74_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_74_b_pong, "Acquire", 1) + aie.dma_bd(%buf_74_bpong : memref<64xi16>, 0, 64) + aie.use_lock(%lock_74_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // Tile DMA - %m75 = AIE.mem(%t75) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m75 = aie.mem(%t75) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_75_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_75_aping : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_75_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_75_a_ping, "Acquire", 0) + aie.dma_bd(%buf_75_aping : memref<64xi16>, 0, 64) + aie.use_lock(%lock_75_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_75_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_75_apong : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_75_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_75_a_pong, "Acquire", 0) + aie.dma_bd(%buf_75_apong : memref<64xi16>, 0, 64) + aie.use_lock(%lock_75_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_75_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_75_bping : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_75_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_75_b_ping, "Acquire", 1) + aie.dma_bd(%buf_75_bping : memref<64xi16>, 0, 64) + aie.use_lock(%lock_75_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_75_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_75_bpong : memref<64xi16>, 0, 64) - AIE.use_lock(%lock_75_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_75_b_pong, "Acquire", 1) + aie.dma_bd(%buf_75_bpong : memref<64xi16>, 0, 64) + aie.use_lock(%lock_75_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer { sym_name = "buffer_in" } : memref<512 x i16> - %buffer_out = AIE.external_buffer { sym_name = "buffer_out" } : memref<512 x i16> + %buffer_in = aie.external_buffer { sym_name = "buffer_in" } : memref<512 x i16> + %buffer_out = aie.external_buffer { sym_name = "buffer_out" } : memref<512 x i16> - %lock1 = AIE.lock(%t70, 1) { sym_name = "buffer_in_lock" } - %lock2 = AIE.lock(%t70, 2) { sym_name = "buffer_out_lock" } + %lock1 = aie.lock(%t70, 1) { sym_name = "buffer_in_lock" } + %lock2 = aie.lock(%t70, 2) { sym_name = "buffer_out_lock" } // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, "Acquire", 1) - AIE.dma_bd(%buffer_in : memref<512 x i16>, 0, 512) - AIE.use_lock(%lock1, "Release", 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, "Acquire", 1) + aie.dma_bd(%buffer_in : memref<512 x i16>, 0, 512) + aie.use_lock(%lock1, "Release", 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, "Acquire", 1) - AIE.dma_bd(%buffer_out : memref<512 x i16>, 0, 512) - AIE.use_lock(%lock2, "Release", 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, "Acquire", 1) + aie.dma_bd(%buffer_out : memref<512 x i16>, 0, 512) + aie.use_lock(%lock2, "Release", 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } } diff --git a/reference_designs/idct/objectFifo_circuit_switched_version/aie.mlir b/reference_designs/idct/objectFifo_circuit_switched_version/aie.mlir index c38f32584d..26bfa40c29 100755 --- a/reference_designs/idct/objectFifo_circuit_switched_version/aie.mlir +++ b/reference_designs/idct/objectFifo_circuit_switched_version/aie.mlir @@ -14,32 +14,32 @@ // RUN: %run_on_board ./test.elf module @idct { - %t74 = AIE.tile(7, 4) - %t75 = AIE.tile(7, 5) + %t74 = aie.tile(7, 4) + %t75 = aie.tile(7, 5) - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - AIE.objectfifo @of_in (%t70, {%t73}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_dequant_horizontal (%t73, {%t74}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_horizontal_vertical (%t74, {%t75}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out (%t75, {%t70}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%t70, {%t73}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_dequant_horizontal (%t73, {%t74}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_horizontal_vertical (%t74, {%t75}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_out (%t75, {%t70}, 2 : i32) : !aie.objectfifo> // DDR buffer - %buffer_in = AIE.external_buffer { sym_name = "buffer_in" } : memref<512xi16> - %buffer_out = AIE.external_buffer { sym_name = "buffer_out" } : memref<512xi16> + %buffer_in = aie.external_buffer { sym_name = "buffer_in" } : memref<512xi16> + %buffer_out = aie.external_buffer { sym_name = "buffer_out" } : memref<512xi16> - AIE.objectfifo.register_external_buffers @of_in (%t70, {%buffer_in}) : (memref<512xi16>) - AIE.objectfifo.register_external_buffers @of_out (%t70, {%buffer_out}) : (memref<512xi16>) + aie.objectfifo.register_external_buffers @of_in (%t70, {%buffer_in}) : (memref<512xi16>) + aie.objectfifo.register_external_buffers @of_out (%t70, {%buffer_out}) : (memref<512xi16>) func.func private @dequant_8x8(%A: memref<64xi16>, %B: memref<64xi16>) -> () func.func private @idct_8x8_mmult_h(%A: memref<64xi16>, %B: memref<64xi16>) -> () func.func private @idct_8x8_mmult_v(%A: memref<64xi16>, %B: memref<64xi16>) -> () func.func private @pass(%A: memref<64xi16>, %B: memref<64xi16>) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %lb = arith.constant 0 : index %ub = arith.constant 8 : index %step = arith.constant 1 : index @@ -51,21 +51,21 @@ module @idct { %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - %inputSubview = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<64xi16> - %outputSubview = AIE.objectfifo.acquire @of_dequant_horizontal (Produce, 1) : !AIE.objectfifosubview> - %output = AIE.objectfifo.subview.access %outputSubview[0] : !AIE.objectfifosubview> -> memref<64xi16> + %inputSubview = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<64xi16> + %outputSubview = aie.objectfifo.acquire @of_dequant_horizontal (Produce, 1) : !aie.objectfifosubview> + %output = aie.objectfifo.subview.access %outputSubview[0] : !aie.objectfifosubview> -> memref<64xi16> func.call @dequant_8x8(%input, %output) : (memref<64xi16>, memref<64xi16>) -> () - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_dequant_horizontal (Produce, 1) + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_dequant_horizontal (Produce, 1) } - AIE.end + aie.end } { link_with="dequant.o" } - %c74 = AIE.core(%t74) { + %c74 = aie.core(%t74) { %lb = arith.constant 0 : index %ub = arith.constant 8 : index %step = arith.constant 1 : index @@ -77,21 +77,21 @@ module @idct { %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - %inputSubview = AIE.objectfifo.acquire @of_dequant_horizontal (Consume, 1) : !AIE.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<64xi16> - %outputSubview = AIE.objectfifo.acquire @of_horizontal_vertical (Produce, 1) : !AIE.objectfifosubview> - %output = AIE.objectfifo.subview.access %outputSubview[0] : !AIE.objectfifosubview> -> memref<64xi16> + %inputSubview = aie.objectfifo.acquire @of_dequant_horizontal (Consume, 1) : !aie.objectfifosubview> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<64xi16> + %outputSubview = aie.objectfifo.acquire @of_horizontal_vertical (Produce, 1) : !aie.objectfifosubview> + %output = aie.objectfifo.subview.access %outputSubview[0] : !aie.objectfifosubview> -> memref<64xi16> func.call @idct_8x8_mmult_h(%input, %output) : (memref<64xi16>, memref<64xi16>) -> () - AIE.objectfifo.release @of_dequant_horizontal (Consume, 1) - AIE.objectfifo.release @of_horizontal_vertical (Produce, 1) + aie.objectfifo.release @of_dequant_horizontal (Consume, 1) + aie.objectfifo.release @of_horizontal_vertical (Produce, 1) } - AIE.end + aie.end } { link_with="idct_horizontal.o" } - %c75 = AIE.core(%t75) { + %c75 = aie.core(%t75) { %lb = arith.constant 0 : index %ub = arith.constant 8 : index %step = arith.constant 1 : index @@ -103,17 +103,17 @@ module @idct { %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - %inputSubview = AIE.objectfifo.acquire @of_horizontal_vertical (Consume, 1) : !AIE.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<64xi16> - %outputSubview = AIE.objectfifo.acquire @of_out (Produce, 1) : !AIE.objectfifosubview> - %output = AIE.objectfifo.subview.access %outputSubview[0] : !AIE.objectfifosubview> -> memref<64xi16> + %inputSubview = aie.objectfifo.acquire @of_horizontal_vertical (Consume, 1) : !aie.objectfifosubview> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<64xi16> + %outputSubview = aie.objectfifo.acquire @of_out (Produce, 1) : !aie.objectfifosubview> + %output = aie.objectfifo.subview.access %outputSubview[0] : !aie.objectfifosubview> -> memref<64xi16> func.call @idct_8x8_mmult_v(%input, %output) : (memref<64xi16>, memref<64xi16>) -> () - AIE.objectfifo.release @of_horizontal_vertical (Consume, 1) - AIE.objectfifo.release @of_out (Produce, 1) + aie.objectfifo.release @of_horizontal_vertical (Consume, 1) + aie.objectfifo.release @of_out (Produce, 1) } - AIE.end + aie.end } { link_with="idct_vertical.o" } } diff --git a/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_1080.mlir b/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_1080.mlir index 2d22daf520..bf55d34f7f 100644 --- a/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_1080.mlir +++ b/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_1080.mlir @@ -12,19 +12,19 @@ // AIE tiles, buffers, and communication in an AI Engine design module @passThroughLine_aie2 { - AIE.device(ipu) { + aie.device(ipu) { // declare kernel external kernel function func.func private @passThroughLine(%in: memref<1920xui8>, %out: memref<1920xui8>, %tilewidth: i32) -> () // Declare tile object of the AIE class located at position col 1, row 4 - %tile00 = AIE.tile(0, 0) - %tile02 = AIE.tile(0, 2) + %tile00 = aie.tile(0, 0) + %tile02 = aie.tile(0, 2) - AIE.objectFifo @inOF(%tile00, {%tile02}, 2 : i32) : !AIE.objectFifo> - AIE.objectFifo @outOF(%tile02, {%tile00}, 2 : i32) : !AIE.objectFifo> + aie.objectFifo @inOF(%tile00, {%tile02}, 2 : i32) : !aie.objectFifo> + aie.objectFifo @outOF(%tile02, {%tile00}, 2 : i32) : !aie.objectFifo> // Define the algorithm for the core of tile(0,2) - %core02 = AIE.core(%tile02) { + %core02 = aie.core(%tile02) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %tileheight = arith.constant 1080 : index @@ -32,18 +32,18 @@ module @passThroughLine_aie2 { scf.for %iter = %c0 to %tileheight step %c1 { // Acquire objectFifos and get subviews - %subviewIn = AIE.objectFifo.acquire @inOF(Consume, 1) : !AIE.objectFifoSubview> - %elemIn = AIE.objectFifo.subview.access %subviewIn[0] : !AIE.objectFifoSubview> -> memref<1920xui8> - %subviewOut = AIE.objectFifo.acquire @outOF(Produce, 1) : !AIE.objectFifoSubview> - %elemOut = AIE.objectFifo.subview.access %subviewOut[0] : !AIE.objectFifoSubview> -> memref<1920xui8> + %subviewIn = aie.objectFifo.acquire @inOF(Consume, 1) : !aie.objectFifoSubview> + %elemIn = aie.objectFifo.subview.access %subviewIn[0] : !aie.objectFifoSubview> -> memref<1920xui8> + %subviewOut = aie.objectFifo.acquire @outOF(Produce, 1) : !aie.objectFifoSubview> + %elemOut = aie.objectFifo.subview.access %subviewOut[0] : !aie.objectFifoSubview> -> memref<1920xui8> func.call @passThroughLine(%elemIn, %elemOut, %tilewidth) : (memref<1920xui8>, memref<1920xui8>, i32) -> () // Release objectFifos - AIE.objectFifo.release @inOF(Consume, 1) - AIE.objectFifo.release @outOF(Produce, 1) + aie.objectFifo.release @inOF(Consume, 1) + aie.objectFifo.release @outOF(Produce, 1) } - AIE.end + aie.end } { link_with="passThrough.cc.o" } // indicate kernel object name used by this core func.func @sequence(%in : memref<518400xi32>, %arg1 : memref<1xi32>, %out : memref<518400xi32>) { @@ -53,9 +53,9 @@ module @passThroughLine_aie2 { %tilewidth = arith.constant 480 : i32 // in 32b words so tileWidth/4 //dma_memcpy_nd ([offset in 32b words][length in 32b words][stride in 32b words]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<518400xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<518400xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<518400xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<518400xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} return } } diff --git a/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_8k.mlir b/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_8k.mlir index 003dbbf977..e868530c82 100644 --- a/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_8k.mlir +++ b/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_8k.mlir @@ -12,19 +12,19 @@ // AIE tiles, buffers, and communication in an AI Engine design module @passThroughLine_aie2 { - AIE.device(ipu) { + aie.device(ipu) { // declare kernel external kernel function func.func private @passThroughLine(%in: memref<7680xui8>, %out: memref<7680xui8>, %tilewidth: i32) -> () // Declare tile object of the AIE class located at position col 1, row 4 - %tile00 = AIE.tile(0, 0) - %tile02 = AIE.tile(0, 2) + %tile00 = aie.tile(0, 0) + %tile02 = aie.tile(0, 2) - AIE.objectFifo @inOF(%tile00, {%tile02}, 2 : i32) : !AIE.objectFifo> - AIE.objectFifo @outOF(%tile02, {%tile00}, 2 : i32) : !AIE.objectFifo> + aie.objectFifo @inOF(%tile00, {%tile02}, 2 : i32) : !aie.objectFifo> + aie.objectFifo @outOF(%tile02, {%tile00}, 2 : i32) : !aie.objectFifo> // Define the algorithm for the core of tile(0,2) - %core02 = AIE.core(%tile02) { + %core02 = aie.core(%tile02) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %tileheight = arith.constant 1080 : index @@ -32,18 +32,18 @@ module @passThroughLine_aie2 { scf.for %iter = %c0 to %tileheight step %c1 { // Acquire objectFifos and get subviews - %subviewIn = AIE.objectFifo.acquire @inOF(Consume, 1) : !AIE.objectFifoSubview> - %elemIn = AIE.objectFifo.subview.access %subviewIn[0] : !AIE.objectFifoSubview> -> memref<7680xui8> - %subviewOut = AIE.objectFifo.acquire @outOF(Produce, 1) : !AIE.objectFifoSubview> - %elemOut = AIE.objectFifo.subview.access %subviewOut[0] : !AIE.objectFifoSubview> -> memref<7680xui8> + %subviewIn = aie.objectFifo.acquire @inOF(Consume, 1) : !aie.objectFifoSubview> + %elemIn = aie.objectFifo.subview.access %subviewIn[0] : !aie.objectFifoSubview> -> memref<7680xui8> + %subviewOut = aie.objectFifo.acquire @outOF(Produce, 1) : !aie.objectFifoSubview> + %elemOut = aie.objectFifo.subview.access %subviewOut[0] : !aie.objectFifoSubview> -> memref<7680xui8> func.call @passThroughLine(%elemIn, %elemOut, %tilewidth) : (memref<7680xui8>, memref<7680xui8>, i32) -> () // Release objectFifos - AIE.objectFifo.release @inOF(Consume, 1) - AIE.objectFifo.release @outOF(Produce, 1) + aie.objectFifo.release @inOF(Consume, 1) + aie.objectFifo.release @outOF(Produce, 1) } - AIE.end + aie.end } { link_with="passThrough.cc.o" } // indicate kernel object name used by this core func.func @sequence(%in : memref<2073600xi32>, %arg1 : memref<1xi32>, %out : memref<2073600xi32>) { @@ -54,11 +54,11 @@ module @passThroughLine_aie2 { %totalLenRGBA = arith.constant 2073600 : i32 //dma_memcpy_nd ([offset in 32b words][length in 32b words][stride in 32b words]) - //AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - //AIEX.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %c1, %totalLenRGBA][%c0, %c0, %c0]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %c1, %totalLenRGBA][%c0, %c0, %c0]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} + //aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + //aiex.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %c1, %totalLenRGBA][%c0, %c0, %c0]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %c1, %totalLenRGBA][%c0, %c0, %c0]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<2073600xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} return } } diff --git a/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_tiny.mlir b/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_tiny.mlir index e1011b0b09..957bd664af 100644 --- a/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_tiny.mlir +++ b/reference_designs/ipu-xrt/vision_pipelines/passthrough/aie2_lineBased_8b_tiny.mlir @@ -12,19 +12,19 @@ // AIE tiles, buffers, and communication in an AI Engine design module @passThroughLine_aie2 { - AIE.device(ipu) { + aie.device(ipu) { // declare kernel external kernel function func.func private @passThroughLine(%in: memref<512xui8>, %out: memref<512xui8>, %tilewidth: i32) -> () // Declare tile object of the AIE class located at position col 1, row 4 - %tile00 = AIE.tile(0, 0) - %tile02 = AIE.tile(0, 2) + %tile00 = aie.tile(0, 0) + %tile02 = aie.tile(0, 2) - AIE.objectFifo @inOF(%tile00, {%tile02}, 2 : i32) : !AIE.objectFifo> - AIE.objectFifo @outOF(%tile02, {%tile00}, 2 : i32) : !AIE.objectFifo> + aie.objectFifo @inOF(%tile00, {%tile02}, 2 : i32) : !aie.objectFifo> + aie.objectFifo @outOF(%tile02, {%tile00}, 2 : i32) : !aie.objectFifo> // Define the algorithm for the core of tile(0,2) - %core02 = AIE.core(%tile02) { + %core02 = aie.core(%tile02) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %tileheight = arith.constant 9 : index @@ -32,18 +32,18 @@ module @passThroughLine_aie2 { scf.for %iter = %c0 to %tileheight step %c1 { // Acquire objectFifos and get subviews - %subviewIn = AIE.objectFifo.acquire @inOF(Consume, 1) : !AIE.objectFifoSubview> - %elemIn = AIE.objectFifo.subview.access %subviewIn[0] : !AIE.objectFifoSubview> -> memref<512xui8> - %subviewOut = AIE.objectFifo.acquire @outOF(Produce, 1) : !AIE.objectFifoSubview> - %elemOut = AIE.objectFifo.subview.access %subviewOut[0] : !AIE.objectFifoSubview> -> memref<512xui8> + %subviewIn = aie.objectFifo.acquire @inOF(Consume, 1) : !aie.objectFifoSubview> + %elemIn = aie.objectFifo.subview.access %subviewIn[0] : !aie.objectFifoSubview> -> memref<512xui8> + %subviewOut = aie.objectFifo.acquire @outOF(Produce, 1) : !aie.objectFifoSubview> + %elemOut = aie.objectFifo.subview.access %subviewOut[0] : !aie.objectFifoSubview> -> memref<512xui8> func.call @passThroughLine(%elemIn, %elemOut, %tilewidth) : (memref<512xui8>, memref<512xui8>, i32) -> () // Release objectFifos - AIE.objectFifo.release @inOF(Consume, 1) - AIE.objectFifo.release @outOF(Produce, 1) + aie.objectFifo.release @inOF(Consume, 1) + aie.objectFifo.release @outOF(Produce, 1) } - AIE.end + aie.end } { link_with="passThrough.cc.o" } // indicate kernel object name used by this core func.func @sequence(%in : memref<1152xi32>, %arg1 : memref<1xi32>, %out : memref<1152xi32>) { @@ -53,9 +53,9 @@ module @passThroughLine_aie2 { %tilewidth = arith.constant 128 : i32 // in 32b words so tileWidth/4 //dma_memcpy_nd ([offset in 32b words][length in 32b words][stride in 32b words]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<1152xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<1152xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @inOF, id = 1 : i32 } : (i32, i32, memref<1152xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0, %c0, %c0, %c0][%c1, %c1, %tileheight, %tilewidth][%c0, %c0, %tilewidth]) { metadata = @outOF, id = 0 : i32 } : (i32, i32, memref<1152xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} return } } diff --git a/reference_designs/prime_sieve_large/aie.mlir b/reference_designs/prime_sieve_large/aie.mlir index fe0dbeb139..6da87b5aa9 100644 --- a/reference_designs/prime_sieve_large/aie.mlir +++ b/reference_designs/prime_sieve_large/aie.mlir @@ -16,1210 +16,1210 @@ // RUN: %run_on_board ./test.elf module @test16_prime_sieve_large { - %tile0_1 = AIE.tile(0, 1) - %tile0_2 = AIE.tile(0, 2) - %tile0_3 = AIE.tile(0, 3) - %tile0_4 = AIE.tile(0, 4) - %tile0_5 = AIE.tile(0, 5) - %tile0_6 = AIE.tile(0, 6) - %tile0_7 = AIE.tile(0, 7) - %tile0_8 = AIE.tile(0, 8) - %tile1_1 = AIE.tile(1, 1) - %tile1_2 = AIE.tile(1, 2) - %tile1_3 = AIE.tile(1, 3) - %tile1_4 = AIE.tile(1, 4) - %tile1_5 = AIE.tile(1, 5) - %tile1_6 = AIE.tile(1, 6) - %tile1_7 = AIE.tile(1, 7) - %tile1_8 = AIE.tile(1, 8) - %tile2_1 = AIE.tile(2, 1) - %tile2_2 = AIE.tile(2, 2) - %tile2_3 = AIE.tile(2, 3) - %tile2_4 = AIE.tile(2, 4) - %tile2_5 = AIE.tile(2, 5) - %tile2_6 = AIE.tile(2, 6) - %tile2_7 = AIE.tile(2, 7) - %tile2_8 = AIE.tile(2, 8) - %tile3_1 = AIE.tile(3, 1) - %tile3_2 = AIE.tile(3, 2) - %tile3_3 = AIE.tile(3, 3) - %tile3_4 = AIE.tile(3, 4) - %tile3_5 = AIE.tile(3, 5) - %tile3_6 = AIE.tile(3, 6) - %tile3_7 = AIE.tile(3, 7) - %tile3_8 = AIE.tile(3, 8) - %tile4_1 = AIE.tile(4, 1) - %tile4_2 = AIE.tile(4, 2) - %tile4_3 = AIE.tile(4, 3) - %tile4_4 = AIE.tile(4, 4) - %tile4_5 = AIE.tile(4, 5) - %tile4_6 = AIE.tile(4, 6) - %tile4_7 = AIE.tile(4, 7) - %tile4_8 = AIE.tile(4, 8) - %tile5_1 = AIE.tile(5, 1) - %tile5_2 = AIE.tile(5, 2) - %tile5_3 = AIE.tile(5, 3) - %tile5_4 = AIE.tile(5, 4) - %tile5_5 = AIE.tile(5, 5) - %tile5_6 = AIE.tile(5, 6) - %tile5_7 = AIE.tile(5, 7) - %tile5_8 = AIE.tile(5, 8) - %tile6_1 = AIE.tile(6, 1) - %tile6_2 = AIE.tile(6, 2) - %tile6_3 = AIE.tile(6, 3) - %tile6_4 = AIE.tile(6, 4) - %tile6_5 = AIE.tile(6, 5) - %tile6_6 = AIE.tile(6, 6) - %tile6_7 = AIE.tile(6, 7) - %tile6_8 = AIE.tile(6, 8) - %tile7_1 = AIE.tile(7, 1) - %tile7_2 = AIE.tile(7, 2) - %tile7_3 = AIE.tile(7, 3) - %tile7_4 = AIE.tile(7, 4) - %tile7_5 = AIE.tile(7, 5) - %tile7_6 = AIE.tile(7, 6) - %tile7_7 = AIE.tile(7, 7) - %tile7_8 = AIE.tile(7, 8) - %tile8_1 = AIE.tile(8, 1) - %tile8_2 = AIE.tile(8, 2) - %tile8_3 = AIE.tile(8, 3) - %tile8_4 = AIE.tile(8, 4) - %tile8_5 = AIE.tile(8, 5) - %tile8_6 = AIE.tile(8, 6) - %tile8_7 = AIE.tile(8, 7) - %tile8_8 = AIE.tile(8, 8) - %tile9_1 = AIE.tile(9, 1) - %tile9_2 = AIE.tile(9, 2) - %tile9_3 = AIE.tile(9, 3) - %tile9_4 = AIE.tile(9, 4) - %tile9_5 = AIE.tile(9, 5) - %tile9_6 = AIE.tile(9, 6) - %tile9_7 = AIE.tile(9, 7) - %tile9_8 = AIE.tile(9, 8) - %tile10_1 = AIE.tile(10, 1) - %tile10_2 = AIE.tile(10, 2) - %tile10_3 = AIE.tile(10, 3) - %tile10_4 = AIE.tile(10, 4) - %tile10_5 = AIE.tile(10, 5) - %tile10_6 = AIE.tile(10, 6) - %tile10_7 = AIE.tile(10, 7) - %tile10_8 = AIE.tile(10, 8) - %tile11_1 = AIE.tile(11, 1) - %tile11_2 = AIE.tile(11, 2) - %tile11_3 = AIE.tile(11, 3) - %tile11_4 = AIE.tile(11, 4) - %tile11_5 = AIE.tile(11, 5) - %tile11_6 = AIE.tile(11, 6) - %tile11_7 = AIE.tile(11, 7) - %tile11_8 = AIE.tile(11, 8) - %tile12_1 = AIE.tile(12, 1) - %tile12_2 = AIE.tile(12, 2) - %tile12_3 = AIE.tile(12, 3) - %tile12_4 = AIE.tile(12, 4) - %tile12_5 = AIE.tile(12, 5) - %tile12_6 = AIE.tile(12, 6) - %tile12_7 = AIE.tile(12, 7) - %tile12_8 = AIE.tile(12, 8) - %tile13_1 = AIE.tile(13, 1) - %tile13_2 = AIE.tile(13, 2) - %tile13_3 = AIE.tile(13, 3) - %tile13_4 = AIE.tile(13, 4) - %tile13_5 = AIE.tile(13, 5) - %tile13_6 = AIE.tile(13, 6) - %tile13_7 = AIE.tile(13, 7) - %tile13_8 = AIE.tile(13, 8) - %tile14_1 = AIE.tile(14, 1) - %tile14_2 = AIE.tile(14, 2) - %tile14_3 = AIE.tile(14, 3) - %tile14_4 = AIE.tile(14, 4) - %tile14_5 = AIE.tile(14, 5) - %tile14_6 = AIE.tile(14, 6) - %tile14_7 = AIE.tile(14, 7) - %tile14_8 = AIE.tile(14, 8) - %tile15_1 = AIE.tile(15, 1) - %tile15_2 = AIE.tile(15, 2) - %tile15_3 = AIE.tile(15, 3) - %tile15_4 = AIE.tile(15, 4) - %tile15_5 = AIE.tile(15, 5) - %tile15_6 = AIE.tile(15, 6) - %tile15_7 = AIE.tile(15, 7) - %tile15_8 = AIE.tile(15, 8) - %tile16_1 = AIE.tile(16, 1) - %tile16_2 = AIE.tile(16, 2) - %tile16_3 = AIE.tile(16, 3) - %tile16_4 = AIE.tile(16, 4) - %tile16_5 = AIE.tile(16, 5) - %tile16_6 = AIE.tile(16, 6) - %tile16_7 = AIE.tile(16, 7) - %tile16_8 = AIE.tile(16, 8) - %tile17_1 = AIE.tile(17, 1) - %tile17_2 = AIE.tile(17, 2) - %tile17_3 = AIE.tile(17, 3) - %tile17_4 = AIE.tile(17, 4) - %tile17_5 = AIE.tile(17, 5) - %tile17_6 = AIE.tile(17, 6) - %tile17_7 = AIE.tile(17, 7) - %tile17_8 = AIE.tile(17, 8) - %tile18_1 = AIE.tile(18, 1) - %tile18_2 = AIE.tile(18, 2) - %tile18_3 = AIE.tile(18, 3) - %tile18_4 = AIE.tile(18, 4) - %tile18_5 = AIE.tile(18, 5) - %tile18_6 = AIE.tile(18, 6) - %tile18_7 = AIE.tile(18, 7) - %tile18_8 = AIE.tile(18, 8) - %tile19_1 = AIE.tile(19, 1) - %tile19_2 = AIE.tile(19, 2) - %tile19_3 = AIE.tile(19, 3) - %tile19_4 = AIE.tile(19, 4) - %tile19_5 = AIE.tile(19, 5) - %tile19_6 = AIE.tile(19, 6) - %tile19_7 = AIE.tile(19, 7) - %tile19_8 = AIE.tile(19, 8) - %tile20_1 = AIE.tile(20, 1) - %tile20_2 = AIE.tile(20, 2) - %tile20_3 = AIE.tile(20, 3) - %tile20_4 = AIE.tile(20, 4) - %tile20_5 = AIE.tile(20, 5) - %tile20_6 = AIE.tile(20, 6) - %tile20_7 = AIE.tile(20, 7) - %tile20_8 = AIE.tile(20, 8) - %tile21_1 = AIE.tile(21, 1) - %tile21_2 = AIE.tile(21, 2) - %tile21_3 = AIE.tile(21, 3) - %tile21_4 = AIE.tile(21, 4) - %tile21_5 = AIE.tile(21, 5) - %tile21_6 = AIE.tile(21, 6) - %tile21_7 = AIE.tile(21, 7) - %tile21_8 = AIE.tile(21, 8) - %tile22_1 = AIE.tile(22, 1) - %tile22_2 = AIE.tile(22, 2) - %tile22_3 = AIE.tile(22, 3) - %tile22_4 = AIE.tile(22, 4) - %tile22_5 = AIE.tile(22, 5) - %tile22_6 = AIE.tile(22, 6) - %tile22_7 = AIE.tile(22, 7) - %tile22_8 = AIE.tile(22, 8) - %tile23_1 = AIE.tile(23, 1) - %tile23_2 = AIE.tile(23, 2) - %tile23_3 = AIE.tile(23, 3) - %tile23_4 = AIE.tile(23, 4) - %tile23_5 = AIE.tile(23, 5) - %tile23_6 = AIE.tile(23, 6) - %tile23_7 = AIE.tile(23, 7) - %tile23_8 = AIE.tile(23, 8) - %tile24_1 = AIE.tile(24, 1) - %tile24_2 = AIE.tile(24, 2) - %tile24_3 = AIE.tile(24, 3) - %tile24_4 = AIE.tile(24, 4) - %tile24_5 = AIE.tile(24, 5) - %tile24_6 = AIE.tile(24, 6) - %tile24_7 = AIE.tile(24, 7) - %tile24_8 = AIE.tile(24, 8) - %tile25_1 = AIE.tile(25, 1) - %tile25_2 = AIE.tile(25, 2) - %tile25_3 = AIE.tile(25, 3) - %tile25_4 = AIE.tile(25, 4) - %tile25_5 = AIE.tile(25, 5) - %tile25_6 = AIE.tile(25, 6) - %tile25_7 = AIE.tile(25, 7) - %tile25_8 = AIE.tile(25, 8) - %tile26_1 = AIE.tile(26, 1) - %tile26_2 = AIE.tile(26, 2) - %tile26_3 = AIE.tile(26, 3) - %tile26_4 = AIE.tile(26, 4) - %tile26_5 = AIE.tile(26, 5) - %tile26_6 = AIE.tile(26, 6) - %tile26_7 = AIE.tile(26, 7) - %tile26_8 = AIE.tile(26, 8) - %tile27_1 = AIE.tile(27, 1) - %tile27_2 = AIE.tile(27, 2) - %tile27_3 = AIE.tile(27, 3) - %tile27_4 = AIE.tile(27, 4) - %tile27_5 = AIE.tile(27, 5) - %tile27_6 = AIE.tile(27, 6) - %tile27_7 = AIE.tile(27, 7) - %tile27_8 = AIE.tile(27, 8) - %tile28_1 = AIE.tile(28, 1) - %tile28_2 = AIE.tile(28, 2) - %tile28_3 = AIE.tile(28, 3) - %tile28_4 = AIE.tile(28, 4) - %tile28_5 = AIE.tile(28, 5) - %tile28_6 = AIE.tile(28, 6) - %tile28_7 = AIE.tile(28, 7) - %tile28_8 = AIE.tile(28, 8) - %tile29_1 = AIE.tile(29, 1) - %tile29_2 = AIE.tile(29, 2) - %tile29_3 = AIE.tile(29, 3) - %tile29_4 = AIE.tile(29, 4) - %tile29_5 = AIE.tile(29, 5) - %tile29_6 = AIE.tile(29, 6) - %tile29_7 = AIE.tile(29, 7) - %tile29_8 = AIE.tile(29, 8) - %tile30_1 = AIE.tile(30, 1) - %tile30_2 = AIE.tile(30, 2) - %tile30_3 = AIE.tile(30, 3) - %tile30_4 = AIE.tile(30, 4) - %tile30_5 = AIE.tile(30, 5) - %tile30_6 = AIE.tile(30, 6) - %tile30_7 = AIE.tile(30, 7) - %tile30_8 = AIE.tile(30, 8) - %tile31_1 = AIE.tile(31, 1) - %tile31_2 = AIE.tile(31, 2) - %tile31_3 = AIE.tile(31, 3) - %tile31_4 = AIE.tile(31, 4) - %tile31_5 = AIE.tile(31, 5) - %tile31_6 = AIE.tile(31, 6) - %tile31_7 = AIE.tile(31, 7) - %tile31_8 = AIE.tile(31, 8) - %tile32_1 = AIE.tile(32, 1) - %tile32_2 = AIE.tile(32, 2) - %tile32_3 = AIE.tile(32, 3) - %tile32_4 = AIE.tile(32, 4) - %tile32_5 = AIE.tile(32, 5) - %tile32_6 = AIE.tile(32, 6) - %tile32_7 = AIE.tile(32, 7) - %tile32_8 = AIE.tile(32, 8) - %tile33_1 = AIE.tile(33, 1) - %tile33_2 = AIE.tile(33, 2) - %tile33_3 = AIE.tile(33, 3) - %tile33_4 = AIE.tile(33, 4) - %tile33_5 = AIE.tile(33, 5) - %tile33_6 = AIE.tile(33, 6) - %tile33_7 = AIE.tile(33, 7) - %tile33_8 = AIE.tile(33, 8) - %tile34_1 = AIE.tile(34, 1) - %tile34_2 = AIE.tile(34, 2) - %tile34_3 = AIE.tile(34, 3) - %tile34_4 = AIE.tile(34, 4) - %tile34_5 = AIE.tile(34, 5) - %tile34_6 = AIE.tile(34, 6) - %tile34_7 = AIE.tile(34, 7) - %tile34_8 = AIE.tile(34, 8) - %tile35_1 = AIE.tile(35, 1) - %tile35_2 = AIE.tile(35, 2) - %tile35_3 = AIE.tile(35, 3) - %tile35_4 = AIE.tile(35, 4) - %tile35_5 = AIE.tile(35, 5) - %tile35_6 = AIE.tile(35, 6) - %tile35_7 = AIE.tile(35, 7) - %tile35_8 = AIE.tile(35, 8) - %tile36_1 = AIE.tile(36, 1) - %tile36_2 = AIE.tile(36, 2) - %tile36_3 = AIE.tile(36, 3) - %tile36_4 = AIE.tile(36, 4) - %tile36_5 = AIE.tile(36, 5) - %tile36_6 = AIE.tile(36, 6) - %tile36_7 = AIE.tile(36, 7) - %tile36_8 = AIE.tile(36, 8) - %tile37_1 = AIE.tile(37, 1) - %tile37_2 = AIE.tile(37, 2) - %tile37_3 = AIE.tile(37, 3) - %tile37_4 = AIE.tile(37, 4) - %tile37_5 = AIE.tile(37, 5) - %tile37_6 = AIE.tile(37, 6) - %tile37_7 = AIE.tile(37, 7) - %tile37_8 = AIE.tile(37, 8) - %tile38_1 = AIE.tile(38, 1) - %tile38_2 = AIE.tile(38, 2) - %tile38_3 = AIE.tile(38, 3) - %tile38_4 = AIE.tile(38, 4) - %tile38_5 = AIE.tile(38, 5) - %tile38_6 = AIE.tile(38, 6) - %tile38_7 = AIE.tile(38, 7) - %tile38_8 = AIE.tile(38, 8) - %tile39_1 = AIE.tile(39, 1) - %tile39_2 = AIE.tile(39, 2) - %tile39_3 = AIE.tile(39, 3) - %tile39_4 = AIE.tile(39, 4) - %tile39_5 = AIE.tile(39, 5) - %tile39_6 = AIE.tile(39, 6) - %tile39_7 = AIE.tile(39, 7) - %tile39_8 = AIE.tile(39, 8) - %tile40_1 = AIE.tile(40, 1) - %tile40_2 = AIE.tile(40, 2) - %tile40_3 = AIE.tile(40, 3) - %tile40_4 = AIE.tile(40, 4) - %tile40_5 = AIE.tile(40, 5) - %tile40_6 = AIE.tile(40, 6) - %tile40_7 = AIE.tile(40, 7) - %tile40_8 = AIE.tile(40, 8) - %tile41_1 = AIE.tile(41, 1) - %tile41_2 = AIE.tile(41, 2) - %tile41_3 = AIE.tile(41, 3) - %tile41_4 = AIE.tile(41, 4) - %tile41_5 = AIE.tile(41, 5) - %tile41_6 = AIE.tile(41, 6) - %tile41_7 = AIE.tile(41, 7) - %tile41_8 = AIE.tile(41, 8) - %tile42_1 = AIE.tile(42, 1) - %tile42_2 = AIE.tile(42, 2) - %tile42_3 = AIE.tile(42, 3) - %tile42_4 = AIE.tile(42, 4) - %tile42_5 = AIE.tile(42, 5) - %tile42_6 = AIE.tile(42, 6) - %tile42_7 = AIE.tile(42, 7) - %tile42_8 = AIE.tile(42, 8) - %tile43_1 = AIE.tile(43, 1) - %tile43_2 = AIE.tile(43, 2) - %tile43_3 = AIE.tile(43, 3) - %tile43_4 = AIE.tile(43, 4) - %tile43_5 = AIE.tile(43, 5) - %tile43_6 = AIE.tile(43, 6) - %tile43_7 = AIE.tile(43, 7) - %tile43_8 = AIE.tile(43, 8) - %tile44_1 = AIE.tile(44, 1) - %tile44_2 = AIE.tile(44, 2) - %tile44_3 = AIE.tile(44, 3) - %tile44_4 = AIE.tile(44, 4) - %tile44_5 = AIE.tile(44, 5) - %tile44_6 = AIE.tile(44, 6) - %tile44_7 = AIE.tile(44, 7) - %tile44_8 = AIE.tile(44, 8) - %tile45_1 = AIE.tile(45, 1) - %tile45_2 = AIE.tile(45, 2) - %tile45_3 = AIE.tile(45, 3) - %tile45_4 = AIE.tile(45, 4) - %tile45_5 = AIE.tile(45, 5) - %tile45_6 = AIE.tile(45, 6) - %tile45_7 = AIE.tile(45, 7) - %tile45_8 = AIE.tile(45, 8) - %tile46_1 = AIE.tile(46, 1) - %tile46_2 = AIE.tile(46, 2) - %tile46_3 = AIE.tile(46, 3) - %tile46_4 = AIE.tile(46, 4) - %tile46_5 = AIE.tile(46, 5) - %tile46_6 = AIE.tile(46, 6) - %tile46_7 = AIE.tile(46, 7) - %tile46_8 = AIE.tile(46, 8) - %tile47_1 = AIE.tile(47, 1) - %tile47_2 = AIE.tile(47, 2) - %tile47_3 = AIE.tile(47, 3) - %tile47_4 = AIE.tile(47, 4) - %tile47_5 = AIE.tile(47, 5) - %tile47_6 = AIE.tile(47, 6) - %tile47_7 = AIE.tile(47, 7) - %tile47_8 = AIE.tile(47, 8) - %tile48_1 = AIE.tile(48, 1) - %tile48_2 = AIE.tile(48, 2) - %tile48_3 = AIE.tile(48, 3) - %tile48_4 = AIE.tile(48, 4) - %tile48_5 = AIE.tile(48, 5) - %tile48_6 = AIE.tile(48, 6) - %tile48_7 = AIE.tile(48, 7) - %tile48_8 = AIE.tile(48, 8) - %tile49_1 = AIE.tile(49, 1) - %tile49_2 = AIE.tile(49, 2) - %tile49_3 = AIE.tile(49, 3) - %tile49_4 = AIE.tile(49, 4) - %tile49_5 = AIE.tile(49, 5) - %tile49_6 = AIE.tile(49, 6) - %tile49_7 = AIE.tile(49, 7) - %tile49_8 = AIE.tile(49, 8) - - %lock0_1 = AIE.lock(%tile0_1) - %lock0_2 = AIE.lock(%tile0_2) - %lock0_3 = AIE.lock(%tile0_3) - %lock0_4 = AIE.lock(%tile0_4) - %lock0_5 = AIE.lock(%tile0_5) - %lock0_6 = AIE.lock(%tile0_6) - %lock0_7 = AIE.lock(%tile0_7) - %lock0_8 = AIE.lock(%tile1_8) - %lock1_8 = AIE.lock(%tile1_8) - %lock1_7 = AIE.lock(%tile1_7) - %lock1_6 = AIE.lock(%tile1_6) - %lock1_5 = AIE.lock(%tile1_5) - %lock1_4 = AIE.lock(%tile1_4) - %lock1_3 = AIE.lock(%tile1_3) - %lock1_2 = AIE.lock(%tile1_2) - %lock1_1 = AIE.lock(%tile1_1) - %lock2_1 = AIE.lock(%tile2_1) - %lock2_2 = AIE.lock(%tile2_2) - %lock2_3 = AIE.lock(%tile2_3) - %lock2_4 = AIE.lock(%tile2_4) - %lock2_5 = AIE.lock(%tile2_5) - %lock2_6 = AIE.lock(%tile2_6) - %lock2_7 = AIE.lock(%tile2_7) - %lock2_8 = AIE.lock(%tile3_8) - %lock3_8 = AIE.lock(%tile3_8) - %lock3_7 = AIE.lock(%tile3_7) - %lock3_6 = AIE.lock(%tile3_6) - %lock3_5 = AIE.lock(%tile3_5) - %lock3_4 = AIE.lock(%tile3_4) - %lock3_3 = AIE.lock(%tile3_3) - %lock3_2 = AIE.lock(%tile3_2) - %lock3_1 = AIE.lock(%tile3_1) - %lock4_1 = AIE.lock(%tile4_1) - %lock4_2 = AIE.lock(%tile4_2) - %lock4_3 = AIE.lock(%tile4_3) - %lock4_4 = AIE.lock(%tile4_4) - %lock4_5 = AIE.lock(%tile4_5) - %lock4_6 = AIE.lock(%tile4_6) - %lock4_7 = AIE.lock(%tile4_7) - %lock4_8 = AIE.lock(%tile5_8) - %lock5_8 = AIE.lock(%tile5_8) - %lock5_7 = AIE.lock(%tile5_7) - %lock5_6 = AIE.lock(%tile5_6) - %lock5_5 = AIE.lock(%tile5_5) - %lock5_4 = AIE.lock(%tile5_4) - %lock5_3 = AIE.lock(%tile5_3) - %lock5_2 = AIE.lock(%tile5_2) - %lock5_1 = AIE.lock(%tile5_1) - %lock6_1 = AIE.lock(%tile6_1) - %lock6_2 = AIE.lock(%tile6_2) - %lock6_3 = AIE.lock(%tile6_3) - %lock6_4 = AIE.lock(%tile6_4) - %lock6_5 = AIE.lock(%tile6_5) - %lock6_6 = AIE.lock(%tile6_6) - %lock6_7 = AIE.lock(%tile6_7) - %lock6_8 = AIE.lock(%tile7_8) - %lock7_8 = AIE.lock(%tile7_8) - %lock7_7 = AIE.lock(%tile7_7) - %lock7_6 = AIE.lock(%tile7_6) - %lock7_5 = AIE.lock(%tile7_5) - %lock7_4 = AIE.lock(%tile7_4) - %lock7_3 = AIE.lock(%tile7_3) - %lock7_2 = AIE.lock(%tile7_2) - %lock7_1 = AIE.lock(%tile7_1) - %lock8_1 = AIE.lock(%tile8_1) - %lock8_2 = AIE.lock(%tile8_2) - %lock8_3 = AIE.lock(%tile8_3) - %lock8_4 = AIE.lock(%tile8_4) - %lock8_5 = AIE.lock(%tile8_5) - %lock8_6 = AIE.lock(%tile8_6) - %lock8_7 = AIE.lock(%tile8_7) - %lock8_8 = AIE.lock(%tile9_8) - %lock9_8 = AIE.lock(%tile9_8) - %lock9_7 = AIE.lock(%tile9_7) - %lock9_6 = AIE.lock(%tile9_6) - %lock9_5 = AIE.lock(%tile9_5) - %lock9_4 = AIE.lock(%tile9_4) - %lock9_3 = AIE.lock(%tile9_3) - %lock9_2 = AIE.lock(%tile9_2) - %lock9_1 = AIE.lock(%tile9_1) - %lock10_1 = AIE.lock(%tile10_1) - %lock10_2 = AIE.lock(%tile10_2) - %lock10_3 = AIE.lock(%tile10_3) - %lock10_4 = AIE.lock(%tile10_4) - %lock10_5 = AIE.lock(%tile10_5) - %lock10_6 = AIE.lock(%tile10_6) - %lock10_7 = AIE.lock(%tile10_7) - %lock10_8 = AIE.lock(%tile11_8) - %lock11_8 = AIE.lock(%tile11_8) - %lock11_7 = AIE.lock(%tile11_7) - %lock11_6 = AIE.lock(%tile11_6) - %lock11_5 = AIE.lock(%tile11_5) - %lock11_4 = AIE.lock(%tile11_4) - %lock11_3 = AIE.lock(%tile11_3) - %lock11_2 = AIE.lock(%tile11_2) - %lock11_1 = AIE.lock(%tile11_1) - %lock12_1 = AIE.lock(%tile12_1) - %lock12_2 = AIE.lock(%tile12_2) - %lock12_3 = AIE.lock(%tile12_3) - %lock12_4 = AIE.lock(%tile12_4) - %lock12_5 = AIE.lock(%tile12_5) - %lock12_6 = AIE.lock(%tile12_6) - %lock12_7 = AIE.lock(%tile12_7) - %lock12_8 = AIE.lock(%tile13_8) - %lock13_8 = AIE.lock(%tile13_8) - %lock13_7 = AIE.lock(%tile13_7) - %lock13_6 = AIE.lock(%tile13_6) - %lock13_5 = AIE.lock(%tile13_5) - %lock13_4 = AIE.lock(%tile13_4) - %lock13_3 = AIE.lock(%tile13_3) - %lock13_2 = AIE.lock(%tile13_2) - %lock13_1 = AIE.lock(%tile13_1) - %lock14_1 = AIE.lock(%tile14_1) - %lock14_2 = AIE.lock(%tile14_2) - %lock14_3 = AIE.lock(%tile14_3) - %lock14_4 = AIE.lock(%tile14_4) - %lock14_5 = AIE.lock(%tile14_5) - %lock14_6 = AIE.lock(%tile14_6) - %lock14_7 = AIE.lock(%tile14_7) - %lock14_8 = AIE.lock(%tile15_8) - %lock15_8 = AIE.lock(%tile15_8) - %lock15_7 = AIE.lock(%tile15_7) - %lock15_6 = AIE.lock(%tile15_6) - %lock15_5 = AIE.lock(%tile15_5) - %lock15_4 = AIE.lock(%tile15_4) - %lock15_3 = AIE.lock(%tile15_3) - %lock15_2 = AIE.lock(%tile15_2) - %lock15_1 = AIE.lock(%tile15_1) - %lock16_1 = AIE.lock(%tile16_1) - %lock16_2 = AIE.lock(%tile16_2) - %lock16_3 = AIE.lock(%tile16_3) - %lock16_4 = AIE.lock(%tile16_4) - %lock16_5 = AIE.lock(%tile16_5) - %lock16_6 = AIE.lock(%tile16_6) - %lock16_7 = AIE.lock(%tile16_7) - %lock16_8 = AIE.lock(%tile17_8) - %lock17_8 = AIE.lock(%tile17_8) - %lock17_7 = AIE.lock(%tile17_7) - %lock17_6 = AIE.lock(%tile17_6) - %lock17_5 = AIE.lock(%tile17_5) - %lock17_4 = AIE.lock(%tile17_4) - %lock17_3 = AIE.lock(%tile17_3) - %lock17_2 = AIE.lock(%tile17_2) - %lock17_1 = AIE.lock(%tile17_1) - %lock18_1 = AIE.lock(%tile18_1) - %lock18_2 = AIE.lock(%tile18_2) - %lock18_3 = AIE.lock(%tile18_3) - %lock18_4 = AIE.lock(%tile18_4) - %lock18_5 = AIE.lock(%tile18_5) - %lock18_6 = AIE.lock(%tile18_6) - %lock18_7 = AIE.lock(%tile18_7) - %lock18_8 = AIE.lock(%tile19_8) - %lock19_8 = AIE.lock(%tile19_8) - %lock19_7 = AIE.lock(%tile19_7) - %lock19_6 = AIE.lock(%tile19_6) - %lock19_5 = AIE.lock(%tile19_5) - %lock19_4 = AIE.lock(%tile19_4) - %lock19_3 = AIE.lock(%tile19_3) - %lock19_2 = AIE.lock(%tile19_2) - %lock19_1 = AIE.lock(%tile19_1) - %lock20_1 = AIE.lock(%tile20_1) - %lock20_2 = AIE.lock(%tile20_2) - %lock20_3 = AIE.lock(%tile20_3) - %lock20_4 = AIE.lock(%tile20_4) - %lock20_5 = AIE.lock(%tile20_5) - %lock20_6 = AIE.lock(%tile20_6) - %lock20_7 = AIE.lock(%tile20_7) - %lock20_8 = AIE.lock(%tile21_8) - %lock21_8 = AIE.lock(%tile21_8) - %lock21_7 = AIE.lock(%tile21_7) - %lock21_6 = AIE.lock(%tile21_6) - %lock21_5 = AIE.lock(%tile21_5) - %lock21_4 = AIE.lock(%tile21_4) - %lock21_3 = AIE.lock(%tile21_3) - %lock21_2 = AIE.lock(%tile21_2) - %lock21_1 = AIE.lock(%tile21_1) - %lock22_1 = AIE.lock(%tile22_1) - %lock22_2 = AIE.lock(%tile22_2) - %lock22_3 = AIE.lock(%tile22_3) - %lock22_4 = AIE.lock(%tile22_4) - %lock22_5 = AIE.lock(%tile22_5) - %lock22_6 = AIE.lock(%tile22_6) - %lock22_7 = AIE.lock(%tile22_7) - %lock22_8 = AIE.lock(%tile23_8) - %lock23_8 = AIE.lock(%tile23_8) - %lock23_7 = AIE.lock(%tile23_7) - %lock23_6 = AIE.lock(%tile23_6) - %lock23_5 = AIE.lock(%tile23_5) - %lock23_4 = AIE.lock(%tile23_4) - %lock23_3 = AIE.lock(%tile23_3) - %lock23_2 = AIE.lock(%tile23_2) - %lock23_1 = AIE.lock(%tile23_1) - %lock24_1 = AIE.lock(%tile24_1) - %lock24_2 = AIE.lock(%tile24_2) - %lock24_3 = AIE.lock(%tile24_3) - %lock24_4 = AIE.lock(%tile24_4) - %lock24_5 = AIE.lock(%tile24_5) - %lock24_6 = AIE.lock(%tile24_6) - %lock24_7 = AIE.lock(%tile24_7) - %lock24_8 = AIE.lock(%tile25_8) - %lock25_8 = AIE.lock(%tile25_8) - %lock25_7 = AIE.lock(%tile25_7) - %lock25_6 = AIE.lock(%tile25_6) - %lock25_5 = AIE.lock(%tile25_5) - %lock25_4 = AIE.lock(%tile25_4) - %lock25_3 = AIE.lock(%tile25_3) - %lock25_2 = AIE.lock(%tile25_2) - %lock25_1 = AIE.lock(%tile25_1) - %lock26_1 = AIE.lock(%tile26_1) - %lock26_2 = AIE.lock(%tile26_2) - %lock26_3 = AIE.lock(%tile26_3) - %lock26_4 = AIE.lock(%tile26_4) - %lock26_5 = AIE.lock(%tile26_5) - %lock26_6 = AIE.lock(%tile26_6) - %lock26_7 = AIE.lock(%tile26_7) - %lock26_8 = AIE.lock(%tile27_8) - %lock27_8 = AIE.lock(%tile27_8) - %lock27_7 = AIE.lock(%tile27_7) - %lock27_6 = AIE.lock(%tile27_6) - %lock27_5 = AIE.lock(%tile27_5) - %lock27_4 = AIE.lock(%tile27_4) - %lock27_3 = AIE.lock(%tile27_3) - %lock27_2 = AIE.lock(%tile27_2) - %lock27_1 = AIE.lock(%tile27_1) - %lock28_1 = AIE.lock(%tile28_1) - %lock28_2 = AIE.lock(%tile28_2) - %lock28_3 = AIE.lock(%tile28_3) - %lock28_4 = AIE.lock(%tile28_4) - %lock28_5 = AIE.lock(%tile28_5) - %lock28_6 = AIE.lock(%tile28_6) - %lock28_7 = AIE.lock(%tile28_7) - %lock28_8 = AIE.lock(%tile29_8) - %lock29_8 = AIE.lock(%tile29_8) - %lock29_7 = AIE.lock(%tile29_7) - %lock29_6 = AIE.lock(%tile29_6) - %lock29_5 = AIE.lock(%tile29_5) - %lock29_4 = AIE.lock(%tile29_4) - %lock29_3 = AIE.lock(%tile29_3) - %lock29_2 = AIE.lock(%tile29_2) - %lock29_1 = AIE.lock(%tile29_1) - %lock30_1 = AIE.lock(%tile30_1) - %lock30_2 = AIE.lock(%tile30_2) - %lock30_3 = AIE.lock(%tile30_3) - %lock30_4 = AIE.lock(%tile30_4) - %lock30_5 = AIE.lock(%tile30_5) - %lock30_6 = AIE.lock(%tile30_6) - %lock30_7 = AIE.lock(%tile30_7) - %lock30_8 = AIE.lock(%tile31_8) - %lock31_8 = AIE.lock(%tile31_8) - %lock31_7 = AIE.lock(%tile31_7) - %lock31_6 = AIE.lock(%tile31_6) - %lock31_5 = AIE.lock(%tile31_5) - %lock31_4 = AIE.lock(%tile31_4) - %lock31_3 = AIE.lock(%tile31_3) - %lock31_2 = AIE.lock(%tile31_2) - %lock31_1 = AIE.lock(%tile31_1) - %lock32_1 = AIE.lock(%tile32_1) - %lock32_2 = AIE.lock(%tile32_2) - %lock32_3 = AIE.lock(%tile32_3) - %lock32_4 = AIE.lock(%tile32_4) - %lock32_5 = AIE.lock(%tile32_5) - %lock32_6 = AIE.lock(%tile32_6) - %lock32_7 = AIE.lock(%tile32_7) - %lock32_8 = AIE.lock(%tile33_8) - %lock33_8 = AIE.lock(%tile33_8) - %lock33_7 = AIE.lock(%tile33_7) - %lock33_6 = AIE.lock(%tile33_6) - %lock33_5 = AIE.lock(%tile33_5) - %lock33_4 = AIE.lock(%tile33_4) - %lock33_3 = AIE.lock(%tile33_3) - %lock33_2 = AIE.lock(%tile33_2) - %lock33_1 = AIE.lock(%tile33_1) - %lock34_1 = AIE.lock(%tile34_1) - %lock34_2 = AIE.lock(%tile34_2) - %lock34_3 = AIE.lock(%tile34_3) - %lock34_4 = AIE.lock(%tile34_4) - %lock34_5 = AIE.lock(%tile34_5) - %lock34_6 = AIE.lock(%tile34_6) - %lock34_7 = AIE.lock(%tile34_7) - %lock34_8 = AIE.lock(%tile35_8) - %lock35_8 = AIE.lock(%tile35_8) - %lock35_7 = AIE.lock(%tile35_7) - %lock35_6 = AIE.lock(%tile35_6) - %lock35_5 = AIE.lock(%tile35_5) - %lock35_4 = AIE.lock(%tile35_4) - %lock35_3 = AIE.lock(%tile35_3) - %lock35_2 = AIE.lock(%tile35_2) - %lock35_1 = AIE.lock(%tile35_1) - %lock36_1 = AIE.lock(%tile36_1) - %lock36_2 = AIE.lock(%tile36_2) - %lock36_3 = AIE.lock(%tile36_3) - %lock36_4 = AIE.lock(%tile36_4) - %lock36_5 = AIE.lock(%tile36_5) - %lock36_6 = AIE.lock(%tile36_6) - %lock36_7 = AIE.lock(%tile36_7) - %lock36_8 = AIE.lock(%tile37_8) - %lock37_8 = AIE.lock(%tile37_8) - %lock37_7 = AIE.lock(%tile37_7) - %lock37_6 = AIE.lock(%tile37_6) - %lock37_5 = AIE.lock(%tile37_5) - %lock37_4 = AIE.lock(%tile37_4) - %lock37_3 = AIE.lock(%tile37_3) - %lock37_2 = AIE.lock(%tile37_2) - %lock37_1 = AIE.lock(%tile37_1) - %lock38_1 = AIE.lock(%tile38_1) - %lock38_2 = AIE.lock(%tile38_2) - %lock38_3 = AIE.lock(%tile38_3) - %lock38_4 = AIE.lock(%tile38_4) - %lock38_5 = AIE.lock(%tile38_5) - %lock38_6 = AIE.lock(%tile38_6) - %lock38_7 = AIE.lock(%tile38_7) - %lock38_8 = AIE.lock(%tile39_8) - %lock39_8 = AIE.lock(%tile39_8) - %lock39_7 = AIE.lock(%tile39_7) - %lock39_6 = AIE.lock(%tile39_6) - %lock39_5 = AIE.lock(%tile39_5) - %lock39_4 = AIE.lock(%tile39_4) - %lock39_3 = AIE.lock(%tile39_3) - %lock39_2 = AIE.lock(%tile39_2) - %lock39_1 = AIE.lock(%tile39_1) - %lock40_1 = AIE.lock(%tile40_1) - %lock40_2 = AIE.lock(%tile40_2) - %lock40_3 = AIE.lock(%tile40_3) - %lock40_4 = AIE.lock(%tile40_4) - %lock40_5 = AIE.lock(%tile40_5) - %lock40_6 = AIE.lock(%tile40_6) - %lock40_7 = AIE.lock(%tile40_7) - %lock40_8 = AIE.lock(%tile41_8) - %lock41_8 = AIE.lock(%tile41_8) - %lock41_7 = AIE.lock(%tile41_7) - %lock41_6 = AIE.lock(%tile41_6) - %lock41_5 = AIE.lock(%tile41_5) - %lock41_4 = AIE.lock(%tile41_4) - %lock41_3 = AIE.lock(%tile41_3) - %lock41_2 = AIE.lock(%tile41_2) - %lock41_1 = AIE.lock(%tile41_1) - %lock42_1 = AIE.lock(%tile42_1) - %lock42_2 = AIE.lock(%tile42_2) - %lock42_3 = AIE.lock(%tile42_3) - %lock42_4 = AIE.lock(%tile42_4) - %lock42_5 = AIE.lock(%tile42_5) - %lock42_6 = AIE.lock(%tile42_6) - %lock42_7 = AIE.lock(%tile42_7) - %lock42_8 = AIE.lock(%tile43_8) - %lock43_8 = AIE.lock(%tile43_8) - %lock43_7 = AIE.lock(%tile43_7) - %lock43_6 = AIE.lock(%tile43_6) - %lock43_5 = AIE.lock(%tile43_5) - %lock43_4 = AIE.lock(%tile43_4) - %lock43_3 = AIE.lock(%tile43_3) - %lock43_2 = AIE.lock(%tile43_2) - %lock43_1 = AIE.lock(%tile43_1) - %lock44_1 = AIE.lock(%tile44_1) - %lock44_2 = AIE.lock(%tile44_2) - %lock44_3 = AIE.lock(%tile44_3) - %lock44_4 = AIE.lock(%tile44_4) - %lock44_5 = AIE.lock(%tile44_5) - %lock44_6 = AIE.lock(%tile44_6) - %lock44_7 = AIE.lock(%tile44_7) - %lock44_8 = AIE.lock(%tile45_8) - %lock45_8 = AIE.lock(%tile45_8) - %lock45_7 = AIE.lock(%tile45_7) - %lock45_6 = AIE.lock(%tile45_6) - %lock45_5 = AIE.lock(%tile45_5) - %lock45_4 = AIE.lock(%tile45_4) - %lock45_3 = AIE.lock(%tile45_3) - %lock45_2 = AIE.lock(%tile45_2) - %lock45_1 = AIE.lock(%tile45_1) - %lock46_1 = AIE.lock(%tile46_1) - %lock46_2 = AIE.lock(%tile46_2) - %lock46_3 = AIE.lock(%tile46_3) - %lock46_4 = AIE.lock(%tile46_4) - %lock46_5 = AIE.lock(%tile46_5) - %lock46_6 = AIE.lock(%tile46_6) - %lock46_7 = AIE.lock(%tile46_7) - %lock46_8 = AIE.lock(%tile47_8) - %lock47_8 = AIE.lock(%tile47_8) - %lock47_7 = AIE.lock(%tile47_7) - %lock47_6 = AIE.lock(%tile47_6) - %lock47_5 = AIE.lock(%tile47_5) - %lock47_4 = AIE.lock(%tile47_4) - %lock47_3 = AIE.lock(%tile47_3) - %lock47_2 = AIE.lock(%tile47_2) - %lock47_1 = AIE.lock(%tile47_1) - %lock48_1 = AIE.lock(%tile48_1) - %lock48_2 = AIE.lock(%tile48_2) - %lock48_3 = AIE.lock(%tile48_3) - %lock48_4 = AIE.lock(%tile48_4) - %lock48_5 = AIE.lock(%tile48_5) - %lock48_6 = AIE.lock(%tile48_6) - %lock48_7 = AIE.lock(%tile48_7) - %lock48_8 = AIE.lock(%tile49_8) - %lock49_8 = AIE.lock(%tile49_8) - %lock49_7 = AIE.lock(%tile49_7) - %lock49_6 = AIE.lock(%tile49_6) - %lock49_5 = AIE.lock(%tile49_5) - %lock49_4 = AIE.lock(%tile49_4) - %lock49_3 = AIE.lock(%tile49_3) - %lock49_2 = AIE.lock(%tile49_2) - %lock49_1 = AIE.lock(%tile49_1) { sym_name = "prime_output_lock" } - - %buf0_1 = AIE.buffer(%tile0_1) { sym_name = "a" } : memref<3072xi32> - %buf0_2 = AIE.buffer(%tile0_2) { sym_name = "prime2" } : memref<3072xi32> - %buf0_3 = AIE.buffer(%tile0_3) { sym_name = "prime3" } : memref<3072xi32> - %buf0_4 = AIE.buffer(%tile0_4) { sym_name = "prime5" } : memref<3072xi32> - %buf0_5 = AIE.buffer(%tile0_5) { sym_name = "prime7" } : memref<3072xi32> - %buf0_6 = AIE.buffer(%tile0_6) { sym_name = "prime11" } : memref<3072xi32> - %buf0_7 = AIE.buffer(%tile0_7) { sym_name = "prime13" } : memref<3072xi32> - %buf0_8 = AIE.buffer(%tile1_8) { sym_name = "prime17" } : memref<3072xi32> - %buf1_8 = AIE.buffer(%tile1_8) { sym_name = "prime19" } : memref<3072xi32> - %buf1_7 = AIE.buffer(%tile1_7) { sym_name = "prime23" } : memref<3072xi32> - %buf1_6 = AIE.buffer(%tile1_6) { sym_name = "prime29" } : memref<3072xi32> - %buf1_5 = AIE.buffer(%tile1_5) { sym_name = "prime31" } : memref<3072xi32> - %buf1_4 = AIE.buffer(%tile1_4) { sym_name = "prime37" } : memref<3072xi32> - %buf1_3 = AIE.buffer(%tile1_3) { sym_name = "prime41" } : memref<3072xi32> - %buf1_2 = AIE.buffer(%tile1_2) { sym_name = "prime43" } : memref<3072xi32> - %buf1_1 = AIE.buffer(%tile1_1) { sym_name = "prime47" } : memref<3072xi32> - %buf2_1 = AIE.buffer(%tile2_1) { sym_name = "prime53" } : memref<3072xi32> - %buf2_2 = AIE.buffer(%tile2_2) { sym_name = "prime59" } : memref<3072xi32> - %buf2_3 = AIE.buffer(%tile2_3) { sym_name = "prime61" } : memref<3072xi32> - %buf2_4 = AIE.buffer(%tile2_4) { sym_name = "prime67" } : memref<3072xi32> - %buf2_5 = AIE.buffer(%tile2_5) { sym_name = "prime71" } : memref<3072xi32> - %buf2_6 = AIE.buffer(%tile2_6) { sym_name = "prime73" } : memref<3072xi32> - %buf2_7 = AIE.buffer(%tile2_7) { sym_name = "prime79" } : memref<3072xi32> - %buf2_8 = AIE.buffer(%tile3_8) { sym_name = "prime83" } : memref<3072xi32> - %buf3_8 = AIE.buffer(%tile3_8) { sym_name = "prime89" } : memref<3072xi32> - %buf3_7 = AIE.buffer(%tile3_7) { sym_name = "prime97" } : memref<3072xi32> - %buf3_6 = AIE.buffer(%tile3_6) { sym_name = "prime101" } : memref<3072xi32> - %buf3_5 = AIE.buffer(%tile3_5) { sym_name = "prime103" } : memref<3072xi32> - %buf3_4 = AIE.buffer(%tile3_4) { sym_name = "prime107" } : memref<3072xi32> - %buf3_3 = AIE.buffer(%tile3_3) { sym_name = "prime109" } : memref<3072xi32> - %buf3_2 = AIE.buffer(%tile3_2) { sym_name = "prime113" } : memref<3072xi32> - %buf3_1 = AIE.buffer(%tile3_1) { sym_name = "prime127" } : memref<3072xi32> - %buf4_1 = AIE.buffer(%tile4_1) { sym_name = "prime131" } : memref<3072xi32> - %buf4_2 = AIE.buffer(%tile4_2) { sym_name = "prime137" } : memref<3072xi32> - %buf4_3 = AIE.buffer(%tile4_3) { sym_name = "prime139" } : memref<3072xi32> - %buf4_4 = AIE.buffer(%tile4_4) { sym_name = "prime149" } : memref<3072xi32> - %buf4_5 = AIE.buffer(%tile4_5) { sym_name = "prime151" } : memref<3072xi32> - %buf4_6 = AIE.buffer(%tile4_6) { sym_name = "prime157" } : memref<3072xi32> - %buf4_7 = AIE.buffer(%tile4_7) { sym_name = "prime163" } : memref<3072xi32> - %buf4_8 = AIE.buffer(%tile5_8) { sym_name = "prime167" } : memref<3072xi32> - %buf5_8 = AIE.buffer(%tile5_8) { sym_name = "prime173" } : memref<3072xi32> - %buf5_7 = AIE.buffer(%tile5_7) { sym_name = "prime179" } : memref<3072xi32> - %buf5_6 = AIE.buffer(%tile5_6) { sym_name = "prime181" } : memref<3072xi32> - %buf5_5 = AIE.buffer(%tile5_5) { sym_name = "prime191" } : memref<3072xi32> - %buf5_4 = AIE.buffer(%tile5_4) { sym_name = "prime193" } : memref<3072xi32> - %buf5_3 = AIE.buffer(%tile5_3) { sym_name = "prime197" } : memref<3072xi32> - %buf5_2 = AIE.buffer(%tile5_2) { sym_name = "prime199" } : memref<3072xi32> - %buf5_1 = AIE.buffer(%tile5_1) { sym_name = "prime211" } : memref<3072xi32> - %buf6_1 = AIE.buffer(%tile6_1) { sym_name = "prime223" } : memref<3072xi32> - %buf6_2 = AIE.buffer(%tile6_2) { sym_name = "prime227" } : memref<3072xi32> - %buf6_3 = AIE.buffer(%tile6_3) { sym_name = "prime229" } : memref<3072xi32> - %buf6_4 = AIE.buffer(%tile6_4) { sym_name = "prime233" } : memref<3072xi32> - %buf6_5 = AIE.buffer(%tile6_5) { sym_name = "prime239" } : memref<3072xi32> - %buf6_6 = AIE.buffer(%tile6_6) { sym_name = "prime241" } : memref<3072xi32> - %buf6_7 = AIE.buffer(%tile6_7) { sym_name = "prime251" } : memref<3072xi32> - %buf6_8 = AIE.buffer(%tile7_8) { sym_name = "prime257" } : memref<3072xi32> - %buf7_8 = AIE.buffer(%tile7_8) { sym_name = "prime263" } : memref<3072xi32> - %buf7_7 = AIE.buffer(%tile7_7) { sym_name = "prime269" } : memref<3072xi32> - %buf7_6 = AIE.buffer(%tile7_6) { sym_name = "prime271" } : memref<3072xi32> - %buf7_5 = AIE.buffer(%tile7_5) { sym_name = "prime277" } : memref<3072xi32> - %buf7_4 = AIE.buffer(%tile7_4) { sym_name = "prime281" } : memref<3072xi32> - %buf7_3 = AIE.buffer(%tile7_3) { sym_name = "prime283" } : memref<3072xi32> - %buf7_2 = AIE.buffer(%tile7_2) { sym_name = "prime293" } : memref<3072xi32> - %buf7_1 = AIE.buffer(%tile7_1) { sym_name = "prime307" } : memref<3072xi32> - %buf8_1 = AIE.buffer(%tile8_1) { sym_name = "prime311" } : memref<3072xi32> - %buf8_2 = AIE.buffer(%tile8_2) { sym_name = "prime313" } : memref<3072xi32> - %buf8_3 = AIE.buffer(%tile8_3) { sym_name = "prime317" } : memref<3072xi32> - %buf8_4 = AIE.buffer(%tile8_4) { sym_name = "prime331" } : memref<3072xi32> - %buf8_5 = AIE.buffer(%tile8_5) { sym_name = "prime337" } : memref<3072xi32> - %buf8_6 = AIE.buffer(%tile8_6) { sym_name = "prime347" } : memref<3072xi32> - %buf8_7 = AIE.buffer(%tile8_7) { sym_name = "prime349" } : memref<3072xi32> - %buf8_8 = AIE.buffer(%tile9_8) { sym_name = "prime353" } : memref<3072xi32> - %buf9_8 = AIE.buffer(%tile9_8) { sym_name = "prime359" } : memref<3072xi32> - %buf9_7 = AIE.buffer(%tile9_7) { sym_name = "prime367" } : memref<3072xi32> - %buf9_6 = AIE.buffer(%tile9_6) { sym_name = "prime373" } : memref<3072xi32> - %buf9_5 = AIE.buffer(%tile9_5) { sym_name = "prime379" } : memref<3072xi32> - %buf9_4 = AIE.buffer(%tile9_4) { sym_name = "prime383" } : memref<3072xi32> - %buf9_3 = AIE.buffer(%tile9_3) { sym_name = "prime389" } : memref<3072xi32> - %buf9_2 = AIE.buffer(%tile9_2) { sym_name = "prime397" } : memref<3072xi32> - %buf9_1 = AIE.buffer(%tile9_1) { sym_name = "prime401" } : memref<3072xi32> - %buf10_1 = AIE.buffer(%tile10_1) { sym_name = "prime409" } : memref<3072xi32> - %buf10_2 = AIE.buffer(%tile10_2) { sym_name = "prime419" } : memref<3072xi32> - %buf10_3 = AIE.buffer(%tile10_3) { sym_name = "prime421" } : memref<3072xi32> - %buf10_4 = AIE.buffer(%tile10_4) { sym_name = "prime431" } : memref<3072xi32> - %buf10_5 = AIE.buffer(%tile10_5) { sym_name = "prime433" } : memref<3072xi32> - %buf10_6 = AIE.buffer(%tile10_6) { sym_name = "prime439" } : memref<3072xi32> - %buf10_7 = AIE.buffer(%tile10_7) { sym_name = "prime443" } : memref<3072xi32> - %buf10_8 = AIE.buffer(%tile11_8) { sym_name = "prime449" } : memref<3072xi32> - %buf11_8 = AIE.buffer(%tile11_8) { sym_name = "prime457" } : memref<3072xi32> - %buf11_7 = AIE.buffer(%tile11_7) { sym_name = "prime461" } : memref<3072xi32> - %buf11_6 = AIE.buffer(%tile11_6) { sym_name = "prime463" } : memref<3072xi32> - %buf11_5 = AIE.buffer(%tile11_5) { sym_name = "prime467" } : memref<3072xi32> - %buf11_4 = AIE.buffer(%tile11_4) { sym_name = "prime479" } : memref<3072xi32> - %buf11_3 = AIE.buffer(%tile11_3) { sym_name = "prime487" } : memref<3072xi32> - %buf11_2 = AIE.buffer(%tile11_2) { sym_name = "prime491" } : memref<3072xi32> - %buf11_1 = AIE.buffer(%tile11_1) { sym_name = "prime499" } : memref<3072xi32> - %buf12_1 = AIE.buffer(%tile12_1) { sym_name = "prime503" } : memref<3072xi32> - %buf12_2 = AIE.buffer(%tile12_2) { sym_name = "prime509" } : memref<3072xi32> - %buf12_3 = AIE.buffer(%tile12_3) { sym_name = "prime521" } : memref<3072xi32> - %buf12_4 = AIE.buffer(%tile12_4) { sym_name = "prime523" } : memref<3072xi32> - %buf12_5 = AIE.buffer(%tile12_5) { sym_name = "prime541" } : memref<3072xi32> - %buf12_6 = AIE.buffer(%tile12_6) { sym_name = "prime547" } : memref<3072xi32> - %buf12_7 = AIE.buffer(%tile12_7) { sym_name = "prime557" } : memref<3072xi32> - %buf12_8 = AIE.buffer(%tile13_8) { sym_name = "prime563" } : memref<3072xi32> - %buf13_8 = AIE.buffer(%tile13_8) { sym_name = "prime569" } : memref<3072xi32> - %buf13_7 = AIE.buffer(%tile13_7) { sym_name = "prime571" } : memref<3072xi32> - %buf13_6 = AIE.buffer(%tile13_6) { sym_name = "prime577" } : memref<3072xi32> - %buf13_5 = AIE.buffer(%tile13_5) { sym_name = "prime587" } : memref<3072xi32> - %buf13_4 = AIE.buffer(%tile13_4) { sym_name = "prime593" } : memref<3072xi32> - %buf13_3 = AIE.buffer(%tile13_3) { sym_name = "prime599" } : memref<3072xi32> - %buf13_2 = AIE.buffer(%tile13_2) { sym_name = "prime601" } : memref<3072xi32> - %buf13_1 = AIE.buffer(%tile13_1) { sym_name = "prime607" } : memref<3072xi32> - %buf14_1 = AIE.buffer(%tile14_1) { sym_name = "prime613" } : memref<3072xi32> - %buf14_2 = AIE.buffer(%tile14_2) { sym_name = "prime617" } : memref<3072xi32> - %buf14_3 = AIE.buffer(%tile14_3) { sym_name = "prime619" } : memref<3072xi32> - %buf14_4 = AIE.buffer(%tile14_4) { sym_name = "prime631" } : memref<3072xi32> - %buf14_5 = AIE.buffer(%tile14_5) { sym_name = "prime641" } : memref<3072xi32> - %buf14_6 = AIE.buffer(%tile14_6) { sym_name = "prime643" } : memref<3072xi32> - %buf14_7 = AIE.buffer(%tile14_7) { sym_name = "prime647" } : memref<3072xi32> - %buf14_8 = AIE.buffer(%tile15_8) { sym_name = "prime653" } : memref<3072xi32> - %buf15_8 = AIE.buffer(%tile15_8) { sym_name = "prime659" } : memref<3072xi32> - %buf15_7 = AIE.buffer(%tile15_7) { sym_name = "prime661" } : memref<3072xi32> - %buf15_6 = AIE.buffer(%tile15_6) { sym_name = "prime673" } : memref<3072xi32> - %buf15_5 = AIE.buffer(%tile15_5) { sym_name = "prime677" } : memref<3072xi32> - %buf15_4 = AIE.buffer(%tile15_4) { sym_name = "prime683" } : memref<3072xi32> - %buf15_3 = AIE.buffer(%tile15_3) { sym_name = "prime691" } : memref<3072xi32> - %buf15_2 = AIE.buffer(%tile15_2) { sym_name = "prime701" } : memref<3072xi32> - %buf15_1 = AIE.buffer(%tile15_1) { sym_name = "prime709" } : memref<3072xi32> - %buf16_1 = AIE.buffer(%tile16_1) { sym_name = "prime719" } : memref<3072xi32> - %buf16_2 = AIE.buffer(%tile16_2) { sym_name = "prime727" } : memref<3072xi32> - %buf16_3 = AIE.buffer(%tile16_3) { sym_name = "prime733" } : memref<3072xi32> - %buf16_4 = AIE.buffer(%tile16_4) { sym_name = "prime739" } : memref<3072xi32> - %buf16_5 = AIE.buffer(%tile16_5) { sym_name = "prime743" } : memref<3072xi32> - %buf16_6 = AIE.buffer(%tile16_6) { sym_name = "prime751" } : memref<3072xi32> - %buf16_7 = AIE.buffer(%tile16_7) { sym_name = "prime757" } : memref<3072xi32> - %buf16_8 = AIE.buffer(%tile17_8) { sym_name = "prime761" } : memref<3072xi32> - %buf17_8 = AIE.buffer(%tile17_8) { sym_name = "prime769" } : memref<3072xi32> - %buf17_7 = AIE.buffer(%tile17_7) { sym_name = "prime773" } : memref<3072xi32> - %buf17_6 = AIE.buffer(%tile17_6) { sym_name = "prime787" } : memref<3072xi32> - %buf17_5 = AIE.buffer(%tile17_5) { sym_name = "prime797" } : memref<3072xi32> - %buf17_4 = AIE.buffer(%tile17_4) { sym_name = "prime809" } : memref<3072xi32> - %buf17_3 = AIE.buffer(%tile17_3) { sym_name = "prime811" } : memref<3072xi32> - %buf17_2 = AIE.buffer(%tile17_2) { sym_name = "prime821" } : memref<3072xi32> - %buf17_1 = AIE.buffer(%tile17_1) { sym_name = "prime823" } : memref<3072xi32> - %buf18_1 = AIE.buffer(%tile18_1) { sym_name = "prime827" } : memref<3072xi32> - %buf18_2 = AIE.buffer(%tile18_2) { sym_name = "prime829" } : memref<3072xi32> - %buf18_3 = AIE.buffer(%tile18_3) { sym_name = "prime839" } : memref<3072xi32> - %buf18_4 = AIE.buffer(%tile18_4) { sym_name = "prime853" } : memref<3072xi32> - %buf18_5 = AIE.buffer(%tile18_5) { sym_name = "prime857" } : memref<3072xi32> - %buf18_6 = AIE.buffer(%tile18_6) { sym_name = "prime859" } : memref<3072xi32> - %buf18_7 = AIE.buffer(%tile18_7) { sym_name = "prime863" } : memref<3072xi32> - %buf18_8 = AIE.buffer(%tile19_8) { sym_name = "prime877" } : memref<3072xi32> - %buf19_8 = AIE.buffer(%tile19_8) { sym_name = "prime881" } : memref<3072xi32> - %buf19_7 = AIE.buffer(%tile19_7) { sym_name = "prime883" } : memref<3072xi32> - %buf19_6 = AIE.buffer(%tile19_6) { sym_name = "prime887" } : memref<3072xi32> - %buf19_5 = AIE.buffer(%tile19_5) { sym_name = "prime907" } : memref<3072xi32> - %buf19_4 = AIE.buffer(%tile19_4) { sym_name = "prime911" } : memref<3072xi32> - %buf19_3 = AIE.buffer(%tile19_3) { sym_name = "prime919" } : memref<3072xi32> - %buf19_2 = AIE.buffer(%tile19_2) { sym_name = "prime929" } : memref<3072xi32> - %buf19_1 = AIE.buffer(%tile19_1) { sym_name = "prime937" } : memref<3072xi32> - %buf20_1 = AIE.buffer(%tile20_1) { sym_name = "prime941" } : memref<3072xi32> - %buf20_2 = AIE.buffer(%tile20_2) { sym_name = "prime947" } : memref<3072xi32> - %buf20_3 = AIE.buffer(%tile20_3) { sym_name = "prime953" } : memref<3072xi32> - %buf20_4 = AIE.buffer(%tile20_4) { sym_name = "prime967" } : memref<3072xi32> - %buf20_5 = AIE.buffer(%tile20_5) { sym_name = "prime971" } : memref<3072xi32> - %buf20_6 = AIE.buffer(%tile20_6) { sym_name = "prime977" } : memref<3072xi32> - %buf20_7 = AIE.buffer(%tile20_7) { sym_name = "prime983" } : memref<3072xi32> - %buf20_8 = AIE.buffer(%tile21_8) { sym_name = "prime991" } : memref<3072xi32> - %buf21_8 = AIE.buffer(%tile21_8) { sym_name = "prime997" } : memref<3072xi32> - %buf21_7 = AIE.buffer(%tile21_7) { sym_name = "prime1009" } : memref<3072xi32> - %buf21_6 = AIE.buffer(%tile21_6) { sym_name = "prime1013" } : memref<3072xi32> - %buf21_5 = AIE.buffer(%tile21_5) { sym_name = "prime1019" } : memref<3072xi32> - %buf21_4 = AIE.buffer(%tile21_4) { sym_name = "prime1021" } : memref<3072xi32> - %buf21_3 = AIE.buffer(%tile21_3) { sym_name = "prime1031" } : memref<3072xi32> - %buf21_2 = AIE.buffer(%tile21_2) { sym_name = "prime1033" } : memref<3072xi32> - %buf21_1 = AIE.buffer(%tile21_1) { sym_name = "prime1039" } : memref<3072xi32> - %buf22_1 = AIE.buffer(%tile22_1) { sym_name = "prime1049" } : memref<3072xi32> - %buf22_2 = AIE.buffer(%tile22_2) { sym_name = "prime1051" } : memref<3072xi32> - %buf22_3 = AIE.buffer(%tile22_3) { sym_name = "prime1061" } : memref<3072xi32> - %buf22_4 = AIE.buffer(%tile22_4) { sym_name = "prime1063" } : memref<3072xi32> - %buf22_5 = AIE.buffer(%tile22_5) { sym_name = "prime1069" } : memref<3072xi32> - %buf22_6 = AIE.buffer(%tile22_6) { sym_name = "prime1087" } : memref<3072xi32> - %buf22_7 = AIE.buffer(%tile22_7) { sym_name = "prime1091" } : memref<3072xi32> - %buf22_8 = AIE.buffer(%tile23_8) { sym_name = "prime1093" } : memref<3072xi32> - %buf23_8 = AIE.buffer(%tile23_8) { sym_name = "prime1097" } : memref<3072xi32> - %buf23_7 = AIE.buffer(%tile23_7) { sym_name = "prime1103" } : memref<3072xi32> - %buf23_6 = AIE.buffer(%tile23_6) { sym_name = "prime1109" } : memref<3072xi32> - %buf23_5 = AIE.buffer(%tile23_5) { sym_name = "prime1117" } : memref<3072xi32> - %buf23_4 = AIE.buffer(%tile23_4) { sym_name = "prime1123" } : memref<3072xi32> - %buf23_3 = AIE.buffer(%tile23_3) { sym_name = "prime1129" } : memref<3072xi32> - %buf23_2 = AIE.buffer(%tile23_2) { sym_name = "prime1151" } : memref<3072xi32> - %buf23_1 = AIE.buffer(%tile23_1) { sym_name = "prime1153" } : memref<3072xi32> - %buf24_1 = AIE.buffer(%tile24_1) { sym_name = "prime1163" } : memref<3072xi32> - %buf24_2 = AIE.buffer(%tile24_2) { sym_name = "prime1171" } : memref<3072xi32> - %buf24_3 = AIE.buffer(%tile24_3) { sym_name = "prime1181" } : memref<3072xi32> - %buf24_4 = AIE.buffer(%tile24_4) { sym_name = "prime1187" } : memref<3072xi32> - %buf24_5 = AIE.buffer(%tile24_5) { sym_name = "prime1193" } : memref<3072xi32> - %buf24_6 = AIE.buffer(%tile24_6) { sym_name = "prime1201" } : memref<3072xi32> - %buf24_7 = AIE.buffer(%tile24_7) { sym_name = "prime1213" } : memref<3072xi32> - %buf24_8 = AIE.buffer(%tile25_8) { sym_name = "prime1217" } : memref<3072xi32> - %buf25_8 = AIE.buffer(%tile25_8) { sym_name = "prime1223" } : memref<3072xi32> - %buf25_7 = AIE.buffer(%tile25_7) { sym_name = "prime1229" } : memref<3072xi32> - %buf25_6 = AIE.buffer(%tile25_6) { sym_name = "prime1231" } : memref<3072xi32> - %buf25_5 = AIE.buffer(%tile25_5) { sym_name = "prime1237" } : memref<3072xi32> - %buf25_4 = AIE.buffer(%tile25_4) { sym_name = "prime1249" } : memref<3072xi32> - %buf25_3 = AIE.buffer(%tile25_3) { sym_name = "prime1259" } : memref<3072xi32> - %buf25_2 = AIE.buffer(%tile25_2) { sym_name = "prime1277" } : memref<3072xi32> - %buf25_1 = AIE.buffer(%tile25_1) { sym_name = "prime1279" } : memref<3072xi32> - %buf26_1 = AIE.buffer(%tile26_1) { sym_name = "prime1283" } : memref<3072xi32> - %buf26_2 = AIE.buffer(%tile26_2) { sym_name = "prime1289" } : memref<3072xi32> - %buf26_3 = AIE.buffer(%tile26_3) { sym_name = "prime1291" } : memref<3072xi32> - %buf26_4 = AIE.buffer(%tile26_4) { sym_name = "prime1297" } : memref<3072xi32> - %buf26_5 = AIE.buffer(%tile26_5) { sym_name = "prime1301" } : memref<3072xi32> - %buf26_6 = AIE.buffer(%tile26_6) { sym_name = "prime1303" } : memref<3072xi32> - %buf26_7 = AIE.buffer(%tile26_7) { sym_name = "prime1307" } : memref<3072xi32> - %buf26_8 = AIE.buffer(%tile27_8) { sym_name = "prime1319" } : memref<3072xi32> - %buf27_8 = AIE.buffer(%tile27_8) { sym_name = "prime1321" } : memref<3072xi32> - %buf27_7 = AIE.buffer(%tile27_7) { sym_name = "prime1327" } : memref<3072xi32> - %buf27_6 = AIE.buffer(%tile27_6) { sym_name = "prime1361" } : memref<3072xi32> - %buf27_5 = AIE.buffer(%tile27_5) { sym_name = "prime1367" } : memref<3072xi32> - %buf27_4 = AIE.buffer(%tile27_4) { sym_name = "prime1373" } : memref<3072xi32> - %buf27_3 = AIE.buffer(%tile27_3) { sym_name = "prime1381" } : memref<3072xi32> - %buf27_2 = AIE.buffer(%tile27_2) { sym_name = "prime1399" } : memref<3072xi32> - %buf27_1 = AIE.buffer(%tile27_1) { sym_name = "prime1409" } : memref<3072xi32> - %buf28_1 = AIE.buffer(%tile28_1) { sym_name = "prime1423" } : memref<3072xi32> - %buf28_2 = AIE.buffer(%tile28_2) { sym_name = "prime1427" } : memref<3072xi32> - %buf28_3 = AIE.buffer(%tile28_3) { sym_name = "prime1429" } : memref<3072xi32> - %buf28_4 = AIE.buffer(%tile28_4) { sym_name = "prime1433" } : memref<3072xi32> - %buf28_5 = AIE.buffer(%tile28_5) { sym_name = "prime1439" } : memref<3072xi32> - %buf28_6 = AIE.buffer(%tile28_6) { sym_name = "prime1447" } : memref<3072xi32> - %buf28_7 = AIE.buffer(%tile28_7) { sym_name = "prime1451" } : memref<3072xi32> - %buf28_8 = AIE.buffer(%tile29_8) { sym_name = "prime1453" } : memref<3072xi32> - %buf29_8 = AIE.buffer(%tile29_8) { sym_name = "prime1459" } : memref<3072xi32> - %buf29_7 = AIE.buffer(%tile29_7) { sym_name = "prime1471" } : memref<3072xi32> - %buf29_6 = AIE.buffer(%tile29_6) { sym_name = "prime1481" } : memref<3072xi32> - %buf29_5 = AIE.buffer(%tile29_5) { sym_name = "prime1483" } : memref<3072xi32> - %buf29_4 = AIE.buffer(%tile29_4) { sym_name = "prime1487" } : memref<3072xi32> - %buf29_3 = AIE.buffer(%tile29_3) { sym_name = "prime1489" } : memref<3072xi32> - %buf29_2 = AIE.buffer(%tile29_2) { sym_name = "prime1493" } : memref<3072xi32> - %buf29_1 = AIE.buffer(%tile29_1) { sym_name = "prime1499" } : memref<3072xi32> - %buf30_1 = AIE.buffer(%tile30_1) { sym_name = "prime1511" } : memref<3072xi32> - %buf30_2 = AIE.buffer(%tile30_2) { sym_name = "prime1523" } : memref<3072xi32> - %buf30_3 = AIE.buffer(%tile30_3) { sym_name = "prime1531" } : memref<3072xi32> - %buf30_4 = AIE.buffer(%tile30_4) { sym_name = "prime1543" } : memref<3072xi32> - %buf30_5 = AIE.buffer(%tile30_5) { sym_name = "prime1549" } : memref<3072xi32> - %buf30_6 = AIE.buffer(%tile30_6) { sym_name = "prime1553" } : memref<3072xi32> - %buf30_7 = AIE.buffer(%tile30_7) { sym_name = "prime1559" } : memref<3072xi32> - %buf30_8 = AIE.buffer(%tile31_8) { sym_name = "prime1567" } : memref<3072xi32> - %buf31_8 = AIE.buffer(%tile31_8) { sym_name = "prime1571" } : memref<3072xi32> - %buf31_7 = AIE.buffer(%tile31_7) { sym_name = "prime1579" } : memref<3072xi32> - %buf31_6 = AIE.buffer(%tile31_6) { sym_name = "prime1583" } : memref<3072xi32> - %buf31_5 = AIE.buffer(%tile31_5) { sym_name = "prime1597" } : memref<3072xi32> - %buf31_4 = AIE.buffer(%tile31_4) { sym_name = "prime1601" } : memref<3072xi32> - %buf31_3 = AIE.buffer(%tile31_3) { sym_name = "prime1607" } : memref<3072xi32> - %buf31_2 = AIE.buffer(%tile31_2) { sym_name = "prime1609" } : memref<3072xi32> - %buf31_1 = AIE.buffer(%tile31_1) { sym_name = "prime1613" } : memref<3072xi32> - %buf32_1 = AIE.buffer(%tile32_1) { sym_name = "prime1619" } : memref<3072xi32> - %buf32_2 = AIE.buffer(%tile32_2) { sym_name = "prime1621" } : memref<3072xi32> - %buf32_3 = AIE.buffer(%tile32_3) { sym_name = "prime1627" } : memref<3072xi32> - %buf32_4 = AIE.buffer(%tile32_4) { sym_name = "prime1637" } : memref<3072xi32> - %buf32_5 = AIE.buffer(%tile32_5) { sym_name = "prime1657" } : memref<3072xi32> - %buf32_6 = AIE.buffer(%tile32_6) { sym_name = "prime1663" } : memref<3072xi32> - %buf32_7 = AIE.buffer(%tile32_7) { sym_name = "prime1667" } : memref<3072xi32> - %buf32_8 = AIE.buffer(%tile33_8) { sym_name = "prime1669" } : memref<3072xi32> - %buf33_8 = AIE.buffer(%tile33_8) { sym_name = "prime1693" } : memref<3072xi32> - %buf33_7 = AIE.buffer(%tile33_7) { sym_name = "prime1697" } : memref<3072xi32> - %buf33_6 = AIE.buffer(%tile33_6) { sym_name = "prime1699" } : memref<3072xi32> - %buf33_5 = AIE.buffer(%tile33_5) { sym_name = "prime1709" } : memref<3072xi32> - %buf33_4 = AIE.buffer(%tile33_4) { sym_name = "prime1721" } : memref<3072xi32> - %buf33_3 = AIE.buffer(%tile33_3) { sym_name = "prime1723" } : memref<3072xi32> - %buf33_2 = AIE.buffer(%tile33_2) { sym_name = "prime1733" } : memref<3072xi32> - %buf33_1 = AIE.buffer(%tile33_1) { sym_name = "prime1741" } : memref<3072xi32> - %buf34_1 = AIE.buffer(%tile34_1) { sym_name = "prime1747" } : memref<3072xi32> - %buf34_2 = AIE.buffer(%tile34_2) { sym_name = "prime1753" } : memref<3072xi32> - %buf34_3 = AIE.buffer(%tile34_3) { sym_name = "prime1759" } : memref<3072xi32> - %buf34_4 = AIE.buffer(%tile34_4) { sym_name = "prime1777" } : memref<3072xi32> - %buf34_5 = AIE.buffer(%tile34_5) { sym_name = "prime1783" } : memref<3072xi32> - %buf34_6 = AIE.buffer(%tile34_6) { sym_name = "prime1787" } : memref<3072xi32> - %buf34_7 = AIE.buffer(%tile34_7) { sym_name = "prime1789" } : memref<3072xi32> - %buf34_8 = AIE.buffer(%tile35_8) { sym_name = "prime1801" } : memref<3072xi32> - %buf35_8 = AIE.buffer(%tile35_8) { sym_name = "prime1811" } : memref<3072xi32> - %buf35_7 = AIE.buffer(%tile35_7) { sym_name = "prime1823" } : memref<3072xi32> - %buf35_6 = AIE.buffer(%tile35_6) { sym_name = "prime1831" } : memref<3072xi32> - %buf35_5 = AIE.buffer(%tile35_5) { sym_name = "prime1847" } : memref<3072xi32> - %buf35_4 = AIE.buffer(%tile35_4) { sym_name = "prime1861" } : memref<3072xi32> - %buf35_3 = AIE.buffer(%tile35_3) { sym_name = "prime1867" } : memref<3072xi32> - %buf35_2 = AIE.buffer(%tile35_2) { sym_name = "prime1871" } : memref<3072xi32> - %buf35_1 = AIE.buffer(%tile35_1) { sym_name = "prime1873" } : memref<3072xi32> - %buf36_1 = AIE.buffer(%tile36_1) { sym_name = "prime1877" } : memref<3072xi32> - %buf36_2 = AIE.buffer(%tile36_2) { sym_name = "prime1879" } : memref<3072xi32> - %buf36_3 = AIE.buffer(%tile36_3) { sym_name = "prime1889" } : memref<3072xi32> - %buf36_4 = AIE.buffer(%tile36_4) { sym_name = "prime1901" } : memref<3072xi32> - %buf36_5 = AIE.buffer(%tile36_5) { sym_name = "prime1907" } : memref<3072xi32> - %buf36_6 = AIE.buffer(%tile36_6) { sym_name = "prime1913" } : memref<3072xi32> - %buf36_7 = AIE.buffer(%tile36_7) { sym_name = "prime1931" } : memref<3072xi32> - %buf36_8 = AIE.buffer(%tile37_8) { sym_name = "prime1933" } : memref<3072xi32> - %buf37_8 = AIE.buffer(%tile37_8) { sym_name = "prime1949" } : memref<3072xi32> - %buf37_7 = AIE.buffer(%tile37_7) { sym_name = "prime1951" } : memref<3072xi32> - %buf37_6 = AIE.buffer(%tile37_6) { sym_name = "prime1973" } : memref<3072xi32> - %buf37_5 = AIE.buffer(%tile37_5) { sym_name = "prime1979" } : memref<3072xi32> - %buf37_4 = AIE.buffer(%tile37_4) { sym_name = "prime1987" } : memref<3072xi32> - %buf37_3 = AIE.buffer(%tile37_3) { sym_name = "prime1993" } : memref<3072xi32> - %buf37_2 = AIE.buffer(%tile37_2) { sym_name = "prime1997" } : memref<3072xi32> - %buf37_1 = AIE.buffer(%tile37_1) { sym_name = "prime1999" } : memref<3072xi32> - %buf38_1 = AIE.buffer(%tile38_1) { sym_name = "prime2003" } : memref<3072xi32> - %buf38_2 = AIE.buffer(%tile38_2) { sym_name = "prime2011" } : memref<3072xi32> - %buf38_3 = AIE.buffer(%tile38_3) { sym_name = "prime2017" } : memref<3072xi32> - %buf38_4 = AIE.buffer(%tile38_4) { sym_name = "prime2027" } : memref<3072xi32> - %buf38_5 = AIE.buffer(%tile38_5) { sym_name = "prime2029" } : memref<3072xi32> - %buf38_6 = AIE.buffer(%tile38_6) { sym_name = "prime2039" } : memref<3072xi32> - %buf38_7 = AIE.buffer(%tile38_7) { sym_name = "prime2053" } : memref<3072xi32> - %buf38_8 = AIE.buffer(%tile39_8) { sym_name = "prime2063" } : memref<3072xi32> - %buf39_8 = AIE.buffer(%tile39_8) { sym_name = "prime2069" } : memref<3072xi32> - %buf39_7 = AIE.buffer(%tile39_7) { sym_name = "prime2081" } : memref<3072xi32> - %buf39_6 = AIE.buffer(%tile39_6) { sym_name = "prime2083" } : memref<3072xi32> - %buf39_5 = AIE.buffer(%tile39_5) { sym_name = "prime2087" } : memref<3072xi32> - %buf39_4 = AIE.buffer(%tile39_4) { sym_name = "prime2089" } : memref<3072xi32> - %buf39_3 = AIE.buffer(%tile39_3) { sym_name = "prime2099" } : memref<3072xi32> - %buf39_2 = AIE.buffer(%tile39_2) { sym_name = "prime2111" } : memref<3072xi32> - %buf39_1 = AIE.buffer(%tile39_1) { sym_name = "prime2113" } : memref<3072xi32> - %buf40_1 = AIE.buffer(%tile40_1) { sym_name = "prime2129" } : memref<3072xi32> - %buf40_2 = AIE.buffer(%tile40_2) { sym_name = "prime2131" } : memref<3072xi32> - %buf40_3 = AIE.buffer(%tile40_3) { sym_name = "prime2137" } : memref<3072xi32> - %buf40_4 = AIE.buffer(%tile40_4) { sym_name = "prime2141" } : memref<3072xi32> - %buf40_5 = AIE.buffer(%tile40_5) { sym_name = "prime2143" } : memref<3072xi32> - %buf40_6 = AIE.buffer(%tile40_6) { sym_name = "prime2153" } : memref<3072xi32> - %buf40_7 = AIE.buffer(%tile40_7) { sym_name = "prime2161" } : memref<3072xi32> - %buf40_8 = AIE.buffer(%tile41_8) { sym_name = "prime2179" } : memref<3072xi32> - %buf41_8 = AIE.buffer(%tile41_8) { sym_name = "prime2203" } : memref<3072xi32> - %buf41_7 = AIE.buffer(%tile41_7) { sym_name = "prime2207" } : memref<3072xi32> - %buf41_6 = AIE.buffer(%tile41_6) { sym_name = "prime2213" } : memref<3072xi32> - %buf41_5 = AIE.buffer(%tile41_5) { sym_name = "prime2221" } : memref<3072xi32> - %buf41_4 = AIE.buffer(%tile41_4) { sym_name = "prime2237" } : memref<3072xi32> - %buf41_3 = AIE.buffer(%tile41_3) { sym_name = "prime2239" } : memref<3072xi32> - %buf41_2 = AIE.buffer(%tile41_2) { sym_name = "prime2243" } : memref<3072xi32> - %buf41_1 = AIE.buffer(%tile41_1) { sym_name = "prime2251" } : memref<3072xi32> - %buf42_1 = AIE.buffer(%tile42_1) { sym_name = "prime2267" } : memref<3072xi32> - %buf42_2 = AIE.buffer(%tile42_2) { sym_name = "prime2269" } : memref<3072xi32> - %buf42_3 = AIE.buffer(%tile42_3) { sym_name = "prime2273" } : memref<3072xi32> - %buf42_4 = AIE.buffer(%tile42_4) { sym_name = "prime2281" } : memref<3072xi32> - %buf42_5 = AIE.buffer(%tile42_5) { sym_name = "prime2287" } : memref<3072xi32> - %buf42_6 = AIE.buffer(%tile42_6) { sym_name = "prime2293" } : memref<3072xi32> - %buf42_7 = AIE.buffer(%tile42_7) { sym_name = "prime2297" } : memref<3072xi32> - %buf42_8 = AIE.buffer(%tile43_8) { sym_name = "prime2309" } : memref<3072xi32> - %buf43_8 = AIE.buffer(%tile43_8) { sym_name = "prime2311" } : memref<3072xi32> - %buf43_7 = AIE.buffer(%tile43_7) { sym_name = "prime2333" } : memref<3072xi32> - %buf43_6 = AIE.buffer(%tile43_6) { sym_name = "prime2339" } : memref<3072xi32> - %buf43_5 = AIE.buffer(%tile43_5) { sym_name = "prime2341" } : memref<3072xi32> - %buf43_4 = AIE.buffer(%tile43_4) { sym_name = "prime2347" } : memref<3072xi32> - %buf43_3 = AIE.buffer(%tile43_3) { sym_name = "prime2351" } : memref<3072xi32> - %buf43_2 = AIE.buffer(%tile43_2) { sym_name = "prime2357" } : memref<3072xi32> - %buf43_1 = AIE.buffer(%tile43_1) { sym_name = "prime2371" } : memref<3072xi32> - %buf44_1 = AIE.buffer(%tile44_1) { sym_name = "prime2377" } : memref<3072xi32> - %buf44_2 = AIE.buffer(%tile44_2) { sym_name = "prime2381" } : memref<3072xi32> - %buf44_3 = AIE.buffer(%tile44_3) { sym_name = "prime2383" } : memref<3072xi32> - %buf44_4 = AIE.buffer(%tile44_4) { sym_name = "prime2389" } : memref<3072xi32> - %buf44_5 = AIE.buffer(%tile44_5) { sym_name = "prime2393" } : memref<3072xi32> - %buf44_6 = AIE.buffer(%tile44_6) { sym_name = "prime2399" } : memref<3072xi32> - %buf44_7 = AIE.buffer(%tile44_7) { sym_name = "prime2411" } : memref<3072xi32> - %buf44_8 = AIE.buffer(%tile45_8) { sym_name = "prime2417" } : memref<3072xi32> - %buf45_8 = AIE.buffer(%tile45_8) { sym_name = "prime2423" } : memref<3072xi32> - %buf45_7 = AIE.buffer(%tile45_7) { sym_name = "prime2437" } : memref<3072xi32> - %buf45_6 = AIE.buffer(%tile45_6) { sym_name = "prime2441" } : memref<3072xi32> - %buf45_5 = AIE.buffer(%tile45_5) { sym_name = "prime2447" } : memref<3072xi32> - %buf45_4 = AIE.buffer(%tile45_4) { sym_name = "prime2459" } : memref<3072xi32> - %buf45_3 = AIE.buffer(%tile45_3) { sym_name = "prime2467" } : memref<3072xi32> - %buf45_2 = AIE.buffer(%tile45_2) { sym_name = "prime2473" } : memref<3072xi32> - %buf45_1 = AIE.buffer(%tile45_1) { sym_name = "prime2477" } : memref<3072xi32> - %buf46_1 = AIE.buffer(%tile46_1) { sym_name = "prime2503" } : memref<3072xi32> - %buf46_2 = AIE.buffer(%tile46_2) { sym_name = "prime2521" } : memref<3072xi32> - %buf46_3 = AIE.buffer(%tile46_3) { sym_name = "prime2531" } : memref<3072xi32> - %buf46_4 = AIE.buffer(%tile46_4) { sym_name = "prime2539" } : memref<3072xi32> - %buf46_5 = AIE.buffer(%tile46_5) { sym_name = "prime2543" } : memref<3072xi32> - %buf46_6 = AIE.buffer(%tile46_6) { sym_name = "prime2549" } : memref<3072xi32> - %buf46_7 = AIE.buffer(%tile46_7) { sym_name = "prime2551" } : memref<3072xi32> - %buf46_8 = AIE.buffer(%tile47_8) { sym_name = "prime2557" } : memref<3072xi32> - %buf47_8 = AIE.buffer(%tile47_8) { sym_name = "prime2579" } : memref<3072xi32> - %buf47_7 = AIE.buffer(%tile47_7) { sym_name = "prime2591" } : memref<3072xi32> - %buf47_6 = AIE.buffer(%tile47_6) { sym_name = "prime2593" } : memref<3072xi32> - %buf47_5 = AIE.buffer(%tile47_5) { sym_name = "prime2609" } : memref<3072xi32> - %buf47_4 = AIE.buffer(%tile47_4) { sym_name = "prime2617" } : memref<3072xi32> - %buf47_3 = AIE.buffer(%tile47_3) { sym_name = "prime2621" } : memref<3072xi32> - %buf47_2 = AIE.buffer(%tile47_2) { sym_name = "prime2633" } : memref<3072xi32> - %buf47_1 = AIE.buffer(%tile47_1) { sym_name = "prime2647" } : memref<3072xi32> - %buf48_1 = AIE.buffer(%tile48_1) { sym_name = "prime2657" } : memref<3072xi32> - %buf48_2 = AIE.buffer(%tile48_2) { sym_name = "prime2659" } : memref<3072xi32> - %buf48_3 = AIE.buffer(%tile48_3) { sym_name = "prime2663" } : memref<3072xi32> - %buf48_4 = AIE.buffer(%tile48_4) { sym_name = "prime2671" } : memref<3072xi32> - %buf48_5 = AIE.buffer(%tile48_5) { sym_name = "prime2677" } : memref<3072xi32> - %buf48_6 = AIE.buffer(%tile48_6) { sym_name = "prime2683" } : memref<3072xi32> - %buf48_7 = AIE.buffer(%tile48_7) { sym_name = "prime2687" } : memref<3072xi32> - %buf48_8 = AIE.buffer(%tile49_8) { sym_name = "prime2689" } : memref<3072xi32> - %buf49_8 = AIE.buffer(%tile49_8) { sym_name = "prime2693" } : memref<3072xi32> - %buf49_7 = AIE.buffer(%tile49_7) { sym_name = "prime2699" } : memref<3072xi32> - %buf49_6 = AIE.buffer(%tile49_6) { sym_name = "prime2707" } : memref<3072xi32> - %buf49_5 = AIE.buffer(%tile49_5) { sym_name = "prime2711" } : memref<3072xi32> - %buf49_4 = AIE.buffer(%tile49_4) { sym_name = "prime2713" } : memref<3072xi32> - %buf49_3 = AIE.buffer(%tile49_3) { sym_name = "prime2719" } : memref<3072xi32> - %buf49_2 = AIE.buffer(%tile49_2) { sym_name = "prime2729" } : memref<3072xi32> - %buf49_1 = AIE.buffer(%tile49_1) { sym_name = "prime_output" } : memref<3072xi32> + %tile0_1 = aie.tile(0, 1) + %tile0_2 = aie.tile(0, 2) + %tile0_3 = aie.tile(0, 3) + %tile0_4 = aie.tile(0, 4) + %tile0_5 = aie.tile(0, 5) + %tile0_6 = aie.tile(0, 6) + %tile0_7 = aie.tile(0, 7) + %tile0_8 = aie.tile(0, 8) + %tile1_1 = aie.tile(1, 1) + %tile1_2 = aie.tile(1, 2) + %tile1_3 = aie.tile(1, 3) + %tile1_4 = aie.tile(1, 4) + %tile1_5 = aie.tile(1, 5) + %tile1_6 = aie.tile(1, 6) + %tile1_7 = aie.tile(1, 7) + %tile1_8 = aie.tile(1, 8) + %tile2_1 = aie.tile(2, 1) + %tile2_2 = aie.tile(2, 2) + %tile2_3 = aie.tile(2, 3) + %tile2_4 = aie.tile(2, 4) + %tile2_5 = aie.tile(2, 5) + %tile2_6 = aie.tile(2, 6) + %tile2_7 = aie.tile(2, 7) + %tile2_8 = aie.tile(2, 8) + %tile3_1 = aie.tile(3, 1) + %tile3_2 = aie.tile(3, 2) + %tile3_3 = aie.tile(3, 3) + %tile3_4 = aie.tile(3, 4) + %tile3_5 = aie.tile(3, 5) + %tile3_6 = aie.tile(3, 6) + %tile3_7 = aie.tile(3, 7) + %tile3_8 = aie.tile(3, 8) + %tile4_1 = aie.tile(4, 1) + %tile4_2 = aie.tile(4, 2) + %tile4_3 = aie.tile(4, 3) + %tile4_4 = aie.tile(4, 4) + %tile4_5 = aie.tile(4, 5) + %tile4_6 = aie.tile(4, 6) + %tile4_7 = aie.tile(4, 7) + %tile4_8 = aie.tile(4, 8) + %tile5_1 = aie.tile(5, 1) + %tile5_2 = aie.tile(5, 2) + %tile5_3 = aie.tile(5, 3) + %tile5_4 = aie.tile(5, 4) + %tile5_5 = aie.tile(5, 5) + %tile5_6 = aie.tile(5, 6) + %tile5_7 = aie.tile(5, 7) + %tile5_8 = aie.tile(5, 8) + %tile6_1 = aie.tile(6, 1) + %tile6_2 = aie.tile(6, 2) + %tile6_3 = aie.tile(6, 3) + %tile6_4 = aie.tile(6, 4) + %tile6_5 = aie.tile(6, 5) + %tile6_6 = aie.tile(6, 6) + %tile6_7 = aie.tile(6, 7) + %tile6_8 = aie.tile(6, 8) + %tile7_1 = aie.tile(7, 1) + %tile7_2 = aie.tile(7, 2) + %tile7_3 = aie.tile(7, 3) + %tile7_4 = aie.tile(7, 4) + %tile7_5 = aie.tile(7, 5) + %tile7_6 = aie.tile(7, 6) + %tile7_7 = aie.tile(7, 7) + %tile7_8 = aie.tile(7, 8) + %tile8_1 = aie.tile(8, 1) + %tile8_2 = aie.tile(8, 2) + %tile8_3 = aie.tile(8, 3) + %tile8_4 = aie.tile(8, 4) + %tile8_5 = aie.tile(8, 5) + %tile8_6 = aie.tile(8, 6) + %tile8_7 = aie.tile(8, 7) + %tile8_8 = aie.tile(8, 8) + %tile9_1 = aie.tile(9, 1) + %tile9_2 = aie.tile(9, 2) + %tile9_3 = aie.tile(9, 3) + %tile9_4 = aie.tile(9, 4) + %tile9_5 = aie.tile(9, 5) + %tile9_6 = aie.tile(9, 6) + %tile9_7 = aie.tile(9, 7) + %tile9_8 = aie.tile(9, 8) + %tile10_1 = aie.tile(10, 1) + %tile10_2 = aie.tile(10, 2) + %tile10_3 = aie.tile(10, 3) + %tile10_4 = aie.tile(10, 4) + %tile10_5 = aie.tile(10, 5) + %tile10_6 = aie.tile(10, 6) + %tile10_7 = aie.tile(10, 7) + %tile10_8 = aie.tile(10, 8) + %tile11_1 = aie.tile(11, 1) + %tile11_2 = aie.tile(11, 2) + %tile11_3 = aie.tile(11, 3) + %tile11_4 = aie.tile(11, 4) + %tile11_5 = aie.tile(11, 5) + %tile11_6 = aie.tile(11, 6) + %tile11_7 = aie.tile(11, 7) + %tile11_8 = aie.tile(11, 8) + %tile12_1 = aie.tile(12, 1) + %tile12_2 = aie.tile(12, 2) + %tile12_3 = aie.tile(12, 3) + %tile12_4 = aie.tile(12, 4) + %tile12_5 = aie.tile(12, 5) + %tile12_6 = aie.tile(12, 6) + %tile12_7 = aie.tile(12, 7) + %tile12_8 = aie.tile(12, 8) + %tile13_1 = aie.tile(13, 1) + %tile13_2 = aie.tile(13, 2) + %tile13_3 = aie.tile(13, 3) + %tile13_4 = aie.tile(13, 4) + %tile13_5 = aie.tile(13, 5) + %tile13_6 = aie.tile(13, 6) + %tile13_7 = aie.tile(13, 7) + %tile13_8 = aie.tile(13, 8) + %tile14_1 = aie.tile(14, 1) + %tile14_2 = aie.tile(14, 2) + %tile14_3 = aie.tile(14, 3) + %tile14_4 = aie.tile(14, 4) + %tile14_5 = aie.tile(14, 5) + %tile14_6 = aie.tile(14, 6) + %tile14_7 = aie.tile(14, 7) + %tile14_8 = aie.tile(14, 8) + %tile15_1 = aie.tile(15, 1) + %tile15_2 = aie.tile(15, 2) + %tile15_3 = aie.tile(15, 3) + %tile15_4 = aie.tile(15, 4) + %tile15_5 = aie.tile(15, 5) + %tile15_6 = aie.tile(15, 6) + %tile15_7 = aie.tile(15, 7) + %tile15_8 = aie.tile(15, 8) + %tile16_1 = aie.tile(16, 1) + %tile16_2 = aie.tile(16, 2) + %tile16_3 = aie.tile(16, 3) + %tile16_4 = aie.tile(16, 4) + %tile16_5 = aie.tile(16, 5) + %tile16_6 = aie.tile(16, 6) + %tile16_7 = aie.tile(16, 7) + %tile16_8 = aie.tile(16, 8) + %tile17_1 = aie.tile(17, 1) + %tile17_2 = aie.tile(17, 2) + %tile17_3 = aie.tile(17, 3) + %tile17_4 = aie.tile(17, 4) + %tile17_5 = aie.tile(17, 5) + %tile17_6 = aie.tile(17, 6) + %tile17_7 = aie.tile(17, 7) + %tile17_8 = aie.tile(17, 8) + %tile18_1 = aie.tile(18, 1) + %tile18_2 = aie.tile(18, 2) + %tile18_3 = aie.tile(18, 3) + %tile18_4 = aie.tile(18, 4) + %tile18_5 = aie.tile(18, 5) + %tile18_6 = aie.tile(18, 6) + %tile18_7 = aie.tile(18, 7) + %tile18_8 = aie.tile(18, 8) + %tile19_1 = aie.tile(19, 1) + %tile19_2 = aie.tile(19, 2) + %tile19_3 = aie.tile(19, 3) + %tile19_4 = aie.tile(19, 4) + %tile19_5 = aie.tile(19, 5) + %tile19_6 = aie.tile(19, 6) + %tile19_7 = aie.tile(19, 7) + %tile19_8 = aie.tile(19, 8) + %tile20_1 = aie.tile(20, 1) + %tile20_2 = aie.tile(20, 2) + %tile20_3 = aie.tile(20, 3) + %tile20_4 = aie.tile(20, 4) + %tile20_5 = aie.tile(20, 5) + %tile20_6 = aie.tile(20, 6) + %tile20_7 = aie.tile(20, 7) + %tile20_8 = aie.tile(20, 8) + %tile21_1 = aie.tile(21, 1) + %tile21_2 = aie.tile(21, 2) + %tile21_3 = aie.tile(21, 3) + %tile21_4 = aie.tile(21, 4) + %tile21_5 = aie.tile(21, 5) + %tile21_6 = aie.tile(21, 6) + %tile21_7 = aie.tile(21, 7) + %tile21_8 = aie.tile(21, 8) + %tile22_1 = aie.tile(22, 1) + %tile22_2 = aie.tile(22, 2) + %tile22_3 = aie.tile(22, 3) + %tile22_4 = aie.tile(22, 4) + %tile22_5 = aie.tile(22, 5) + %tile22_6 = aie.tile(22, 6) + %tile22_7 = aie.tile(22, 7) + %tile22_8 = aie.tile(22, 8) + %tile23_1 = aie.tile(23, 1) + %tile23_2 = aie.tile(23, 2) + %tile23_3 = aie.tile(23, 3) + %tile23_4 = aie.tile(23, 4) + %tile23_5 = aie.tile(23, 5) + %tile23_6 = aie.tile(23, 6) + %tile23_7 = aie.tile(23, 7) + %tile23_8 = aie.tile(23, 8) + %tile24_1 = aie.tile(24, 1) + %tile24_2 = aie.tile(24, 2) + %tile24_3 = aie.tile(24, 3) + %tile24_4 = aie.tile(24, 4) + %tile24_5 = aie.tile(24, 5) + %tile24_6 = aie.tile(24, 6) + %tile24_7 = aie.tile(24, 7) + %tile24_8 = aie.tile(24, 8) + %tile25_1 = aie.tile(25, 1) + %tile25_2 = aie.tile(25, 2) + %tile25_3 = aie.tile(25, 3) + %tile25_4 = aie.tile(25, 4) + %tile25_5 = aie.tile(25, 5) + %tile25_6 = aie.tile(25, 6) + %tile25_7 = aie.tile(25, 7) + %tile25_8 = aie.tile(25, 8) + %tile26_1 = aie.tile(26, 1) + %tile26_2 = aie.tile(26, 2) + %tile26_3 = aie.tile(26, 3) + %tile26_4 = aie.tile(26, 4) + %tile26_5 = aie.tile(26, 5) + %tile26_6 = aie.tile(26, 6) + %tile26_7 = aie.tile(26, 7) + %tile26_8 = aie.tile(26, 8) + %tile27_1 = aie.tile(27, 1) + %tile27_2 = aie.tile(27, 2) + %tile27_3 = aie.tile(27, 3) + %tile27_4 = aie.tile(27, 4) + %tile27_5 = aie.tile(27, 5) + %tile27_6 = aie.tile(27, 6) + %tile27_7 = aie.tile(27, 7) + %tile27_8 = aie.tile(27, 8) + %tile28_1 = aie.tile(28, 1) + %tile28_2 = aie.tile(28, 2) + %tile28_3 = aie.tile(28, 3) + %tile28_4 = aie.tile(28, 4) + %tile28_5 = aie.tile(28, 5) + %tile28_6 = aie.tile(28, 6) + %tile28_7 = aie.tile(28, 7) + %tile28_8 = aie.tile(28, 8) + %tile29_1 = aie.tile(29, 1) + %tile29_2 = aie.tile(29, 2) + %tile29_3 = aie.tile(29, 3) + %tile29_4 = aie.tile(29, 4) + %tile29_5 = aie.tile(29, 5) + %tile29_6 = aie.tile(29, 6) + %tile29_7 = aie.tile(29, 7) + %tile29_8 = aie.tile(29, 8) + %tile30_1 = aie.tile(30, 1) + %tile30_2 = aie.tile(30, 2) + %tile30_3 = aie.tile(30, 3) + %tile30_4 = aie.tile(30, 4) + %tile30_5 = aie.tile(30, 5) + %tile30_6 = aie.tile(30, 6) + %tile30_7 = aie.tile(30, 7) + %tile30_8 = aie.tile(30, 8) + %tile31_1 = aie.tile(31, 1) + %tile31_2 = aie.tile(31, 2) + %tile31_3 = aie.tile(31, 3) + %tile31_4 = aie.tile(31, 4) + %tile31_5 = aie.tile(31, 5) + %tile31_6 = aie.tile(31, 6) + %tile31_7 = aie.tile(31, 7) + %tile31_8 = aie.tile(31, 8) + %tile32_1 = aie.tile(32, 1) + %tile32_2 = aie.tile(32, 2) + %tile32_3 = aie.tile(32, 3) + %tile32_4 = aie.tile(32, 4) + %tile32_5 = aie.tile(32, 5) + %tile32_6 = aie.tile(32, 6) + %tile32_7 = aie.tile(32, 7) + %tile32_8 = aie.tile(32, 8) + %tile33_1 = aie.tile(33, 1) + %tile33_2 = aie.tile(33, 2) + %tile33_3 = aie.tile(33, 3) + %tile33_4 = aie.tile(33, 4) + %tile33_5 = aie.tile(33, 5) + %tile33_6 = aie.tile(33, 6) + %tile33_7 = aie.tile(33, 7) + %tile33_8 = aie.tile(33, 8) + %tile34_1 = aie.tile(34, 1) + %tile34_2 = aie.tile(34, 2) + %tile34_3 = aie.tile(34, 3) + %tile34_4 = aie.tile(34, 4) + %tile34_5 = aie.tile(34, 5) + %tile34_6 = aie.tile(34, 6) + %tile34_7 = aie.tile(34, 7) + %tile34_8 = aie.tile(34, 8) + %tile35_1 = aie.tile(35, 1) + %tile35_2 = aie.tile(35, 2) + %tile35_3 = aie.tile(35, 3) + %tile35_4 = aie.tile(35, 4) + %tile35_5 = aie.tile(35, 5) + %tile35_6 = aie.tile(35, 6) + %tile35_7 = aie.tile(35, 7) + %tile35_8 = aie.tile(35, 8) + %tile36_1 = aie.tile(36, 1) + %tile36_2 = aie.tile(36, 2) + %tile36_3 = aie.tile(36, 3) + %tile36_4 = aie.tile(36, 4) + %tile36_5 = aie.tile(36, 5) + %tile36_6 = aie.tile(36, 6) + %tile36_7 = aie.tile(36, 7) + %tile36_8 = aie.tile(36, 8) + %tile37_1 = aie.tile(37, 1) + %tile37_2 = aie.tile(37, 2) + %tile37_3 = aie.tile(37, 3) + %tile37_4 = aie.tile(37, 4) + %tile37_5 = aie.tile(37, 5) + %tile37_6 = aie.tile(37, 6) + %tile37_7 = aie.tile(37, 7) + %tile37_8 = aie.tile(37, 8) + %tile38_1 = aie.tile(38, 1) + %tile38_2 = aie.tile(38, 2) + %tile38_3 = aie.tile(38, 3) + %tile38_4 = aie.tile(38, 4) + %tile38_5 = aie.tile(38, 5) + %tile38_6 = aie.tile(38, 6) + %tile38_7 = aie.tile(38, 7) + %tile38_8 = aie.tile(38, 8) + %tile39_1 = aie.tile(39, 1) + %tile39_2 = aie.tile(39, 2) + %tile39_3 = aie.tile(39, 3) + %tile39_4 = aie.tile(39, 4) + %tile39_5 = aie.tile(39, 5) + %tile39_6 = aie.tile(39, 6) + %tile39_7 = aie.tile(39, 7) + %tile39_8 = aie.tile(39, 8) + %tile40_1 = aie.tile(40, 1) + %tile40_2 = aie.tile(40, 2) + %tile40_3 = aie.tile(40, 3) + %tile40_4 = aie.tile(40, 4) + %tile40_5 = aie.tile(40, 5) + %tile40_6 = aie.tile(40, 6) + %tile40_7 = aie.tile(40, 7) + %tile40_8 = aie.tile(40, 8) + %tile41_1 = aie.tile(41, 1) + %tile41_2 = aie.tile(41, 2) + %tile41_3 = aie.tile(41, 3) + %tile41_4 = aie.tile(41, 4) + %tile41_5 = aie.tile(41, 5) + %tile41_6 = aie.tile(41, 6) + %tile41_7 = aie.tile(41, 7) + %tile41_8 = aie.tile(41, 8) + %tile42_1 = aie.tile(42, 1) + %tile42_2 = aie.tile(42, 2) + %tile42_3 = aie.tile(42, 3) + %tile42_4 = aie.tile(42, 4) + %tile42_5 = aie.tile(42, 5) + %tile42_6 = aie.tile(42, 6) + %tile42_7 = aie.tile(42, 7) + %tile42_8 = aie.tile(42, 8) + %tile43_1 = aie.tile(43, 1) + %tile43_2 = aie.tile(43, 2) + %tile43_3 = aie.tile(43, 3) + %tile43_4 = aie.tile(43, 4) + %tile43_5 = aie.tile(43, 5) + %tile43_6 = aie.tile(43, 6) + %tile43_7 = aie.tile(43, 7) + %tile43_8 = aie.tile(43, 8) + %tile44_1 = aie.tile(44, 1) + %tile44_2 = aie.tile(44, 2) + %tile44_3 = aie.tile(44, 3) + %tile44_4 = aie.tile(44, 4) + %tile44_5 = aie.tile(44, 5) + %tile44_6 = aie.tile(44, 6) + %tile44_7 = aie.tile(44, 7) + %tile44_8 = aie.tile(44, 8) + %tile45_1 = aie.tile(45, 1) + %tile45_2 = aie.tile(45, 2) + %tile45_3 = aie.tile(45, 3) + %tile45_4 = aie.tile(45, 4) + %tile45_5 = aie.tile(45, 5) + %tile45_6 = aie.tile(45, 6) + %tile45_7 = aie.tile(45, 7) + %tile45_8 = aie.tile(45, 8) + %tile46_1 = aie.tile(46, 1) + %tile46_2 = aie.tile(46, 2) + %tile46_3 = aie.tile(46, 3) + %tile46_4 = aie.tile(46, 4) + %tile46_5 = aie.tile(46, 5) + %tile46_6 = aie.tile(46, 6) + %tile46_7 = aie.tile(46, 7) + %tile46_8 = aie.tile(46, 8) + %tile47_1 = aie.tile(47, 1) + %tile47_2 = aie.tile(47, 2) + %tile47_3 = aie.tile(47, 3) + %tile47_4 = aie.tile(47, 4) + %tile47_5 = aie.tile(47, 5) + %tile47_6 = aie.tile(47, 6) + %tile47_7 = aie.tile(47, 7) + %tile47_8 = aie.tile(47, 8) + %tile48_1 = aie.tile(48, 1) + %tile48_2 = aie.tile(48, 2) + %tile48_3 = aie.tile(48, 3) + %tile48_4 = aie.tile(48, 4) + %tile48_5 = aie.tile(48, 5) + %tile48_6 = aie.tile(48, 6) + %tile48_7 = aie.tile(48, 7) + %tile48_8 = aie.tile(48, 8) + %tile49_1 = aie.tile(49, 1) + %tile49_2 = aie.tile(49, 2) + %tile49_3 = aie.tile(49, 3) + %tile49_4 = aie.tile(49, 4) + %tile49_5 = aie.tile(49, 5) + %tile49_6 = aie.tile(49, 6) + %tile49_7 = aie.tile(49, 7) + %tile49_8 = aie.tile(49, 8) + + %lock0_1 = aie.lock(%tile0_1) + %lock0_2 = aie.lock(%tile0_2) + %lock0_3 = aie.lock(%tile0_3) + %lock0_4 = aie.lock(%tile0_4) + %lock0_5 = aie.lock(%tile0_5) + %lock0_6 = aie.lock(%tile0_6) + %lock0_7 = aie.lock(%tile0_7) + %lock0_8 = aie.lock(%tile1_8) + %lock1_8 = aie.lock(%tile1_8) + %lock1_7 = aie.lock(%tile1_7) + %lock1_6 = aie.lock(%tile1_6) + %lock1_5 = aie.lock(%tile1_5) + %lock1_4 = aie.lock(%tile1_4) + %lock1_3 = aie.lock(%tile1_3) + %lock1_2 = aie.lock(%tile1_2) + %lock1_1 = aie.lock(%tile1_1) + %lock2_1 = aie.lock(%tile2_1) + %lock2_2 = aie.lock(%tile2_2) + %lock2_3 = aie.lock(%tile2_3) + %lock2_4 = aie.lock(%tile2_4) + %lock2_5 = aie.lock(%tile2_5) + %lock2_6 = aie.lock(%tile2_6) + %lock2_7 = aie.lock(%tile2_7) + %lock2_8 = aie.lock(%tile3_8) + %lock3_8 = aie.lock(%tile3_8) + %lock3_7 = aie.lock(%tile3_7) + %lock3_6 = aie.lock(%tile3_6) + %lock3_5 = aie.lock(%tile3_5) + %lock3_4 = aie.lock(%tile3_4) + %lock3_3 = aie.lock(%tile3_3) + %lock3_2 = aie.lock(%tile3_2) + %lock3_1 = aie.lock(%tile3_1) + %lock4_1 = aie.lock(%tile4_1) + %lock4_2 = aie.lock(%tile4_2) + %lock4_3 = aie.lock(%tile4_3) + %lock4_4 = aie.lock(%tile4_4) + %lock4_5 = aie.lock(%tile4_5) + %lock4_6 = aie.lock(%tile4_6) + %lock4_7 = aie.lock(%tile4_7) + %lock4_8 = aie.lock(%tile5_8) + %lock5_8 = aie.lock(%tile5_8) + %lock5_7 = aie.lock(%tile5_7) + %lock5_6 = aie.lock(%tile5_6) + %lock5_5 = aie.lock(%tile5_5) + %lock5_4 = aie.lock(%tile5_4) + %lock5_3 = aie.lock(%tile5_3) + %lock5_2 = aie.lock(%tile5_2) + %lock5_1 = aie.lock(%tile5_1) + %lock6_1 = aie.lock(%tile6_1) + %lock6_2 = aie.lock(%tile6_2) + %lock6_3 = aie.lock(%tile6_3) + %lock6_4 = aie.lock(%tile6_4) + %lock6_5 = aie.lock(%tile6_5) + %lock6_6 = aie.lock(%tile6_6) + %lock6_7 = aie.lock(%tile6_7) + %lock6_8 = aie.lock(%tile7_8) + %lock7_8 = aie.lock(%tile7_8) + %lock7_7 = aie.lock(%tile7_7) + %lock7_6 = aie.lock(%tile7_6) + %lock7_5 = aie.lock(%tile7_5) + %lock7_4 = aie.lock(%tile7_4) + %lock7_3 = aie.lock(%tile7_3) + %lock7_2 = aie.lock(%tile7_2) + %lock7_1 = aie.lock(%tile7_1) + %lock8_1 = aie.lock(%tile8_1) + %lock8_2 = aie.lock(%tile8_2) + %lock8_3 = aie.lock(%tile8_3) + %lock8_4 = aie.lock(%tile8_4) + %lock8_5 = aie.lock(%tile8_5) + %lock8_6 = aie.lock(%tile8_6) + %lock8_7 = aie.lock(%tile8_7) + %lock8_8 = aie.lock(%tile9_8) + %lock9_8 = aie.lock(%tile9_8) + %lock9_7 = aie.lock(%tile9_7) + %lock9_6 = aie.lock(%tile9_6) + %lock9_5 = aie.lock(%tile9_5) + %lock9_4 = aie.lock(%tile9_4) + %lock9_3 = aie.lock(%tile9_3) + %lock9_2 = aie.lock(%tile9_2) + %lock9_1 = aie.lock(%tile9_1) + %lock10_1 = aie.lock(%tile10_1) + %lock10_2 = aie.lock(%tile10_2) + %lock10_3 = aie.lock(%tile10_3) + %lock10_4 = aie.lock(%tile10_4) + %lock10_5 = aie.lock(%tile10_5) + %lock10_6 = aie.lock(%tile10_6) + %lock10_7 = aie.lock(%tile10_7) + %lock10_8 = aie.lock(%tile11_8) + %lock11_8 = aie.lock(%tile11_8) + %lock11_7 = aie.lock(%tile11_7) + %lock11_6 = aie.lock(%tile11_6) + %lock11_5 = aie.lock(%tile11_5) + %lock11_4 = aie.lock(%tile11_4) + %lock11_3 = aie.lock(%tile11_3) + %lock11_2 = aie.lock(%tile11_2) + %lock11_1 = aie.lock(%tile11_1) + %lock12_1 = aie.lock(%tile12_1) + %lock12_2 = aie.lock(%tile12_2) + %lock12_3 = aie.lock(%tile12_3) + %lock12_4 = aie.lock(%tile12_4) + %lock12_5 = aie.lock(%tile12_5) + %lock12_6 = aie.lock(%tile12_6) + %lock12_7 = aie.lock(%tile12_7) + %lock12_8 = aie.lock(%tile13_8) + %lock13_8 = aie.lock(%tile13_8) + %lock13_7 = aie.lock(%tile13_7) + %lock13_6 = aie.lock(%tile13_6) + %lock13_5 = aie.lock(%tile13_5) + %lock13_4 = aie.lock(%tile13_4) + %lock13_3 = aie.lock(%tile13_3) + %lock13_2 = aie.lock(%tile13_2) + %lock13_1 = aie.lock(%tile13_1) + %lock14_1 = aie.lock(%tile14_1) + %lock14_2 = aie.lock(%tile14_2) + %lock14_3 = aie.lock(%tile14_3) + %lock14_4 = aie.lock(%tile14_4) + %lock14_5 = aie.lock(%tile14_5) + %lock14_6 = aie.lock(%tile14_6) + %lock14_7 = aie.lock(%tile14_7) + %lock14_8 = aie.lock(%tile15_8) + %lock15_8 = aie.lock(%tile15_8) + %lock15_7 = aie.lock(%tile15_7) + %lock15_6 = aie.lock(%tile15_6) + %lock15_5 = aie.lock(%tile15_5) + %lock15_4 = aie.lock(%tile15_4) + %lock15_3 = aie.lock(%tile15_3) + %lock15_2 = aie.lock(%tile15_2) + %lock15_1 = aie.lock(%tile15_1) + %lock16_1 = aie.lock(%tile16_1) + %lock16_2 = aie.lock(%tile16_2) + %lock16_3 = aie.lock(%tile16_3) + %lock16_4 = aie.lock(%tile16_4) + %lock16_5 = aie.lock(%tile16_5) + %lock16_6 = aie.lock(%tile16_6) + %lock16_7 = aie.lock(%tile16_7) + %lock16_8 = aie.lock(%tile17_8) + %lock17_8 = aie.lock(%tile17_8) + %lock17_7 = aie.lock(%tile17_7) + %lock17_6 = aie.lock(%tile17_6) + %lock17_5 = aie.lock(%tile17_5) + %lock17_4 = aie.lock(%tile17_4) + %lock17_3 = aie.lock(%tile17_3) + %lock17_2 = aie.lock(%tile17_2) + %lock17_1 = aie.lock(%tile17_1) + %lock18_1 = aie.lock(%tile18_1) + %lock18_2 = aie.lock(%tile18_2) + %lock18_3 = aie.lock(%tile18_3) + %lock18_4 = aie.lock(%tile18_4) + %lock18_5 = aie.lock(%tile18_5) + %lock18_6 = aie.lock(%tile18_6) + %lock18_7 = aie.lock(%tile18_7) + %lock18_8 = aie.lock(%tile19_8) + %lock19_8 = aie.lock(%tile19_8) + %lock19_7 = aie.lock(%tile19_7) + %lock19_6 = aie.lock(%tile19_6) + %lock19_5 = aie.lock(%tile19_5) + %lock19_4 = aie.lock(%tile19_4) + %lock19_3 = aie.lock(%tile19_3) + %lock19_2 = aie.lock(%tile19_2) + %lock19_1 = aie.lock(%tile19_1) + %lock20_1 = aie.lock(%tile20_1) + %lock20_2 = aie.lock(%tile20_2) + %lock20_3 = aie.lock(%tile20_3) + %lock20_4 = aie.lock(%tile20_4) + %lock20_5 = aie.lock(%tile20_5) + %lock20_6 = aie.lock(%tile20_6) + %lock20_7 = aie.lock(%tile20_7) + %lock20_8 = aie.lock(%tile21_8) + %lock21_8 = aie.lock(%tile21_8) + %lock21_7 = aie.lock(%tile21_7) + %lock21_6 = aie.lock(%tile21_6) + %lock21_5 = aie.lock(%tile21_5) + %lock21_4 = aie.lock(%tile21_4) + %lock21_3 = aie.lock(%tile21_3) + %lock21_2 = aie.lock(%tile21_2) + %lock21_1 = aie.lock(%tile21_1) + %lock22_1 = aie.lock(%tile22_1) + %lock22_2 = aie.lock(%tile22_2) + %lock22_3 = aie.lock(%tile22_3) + %lock22_4 = aie.lock(%tile22_4) + %lock22_5 = aie.lock(%tile22_5) + %lock22_6 = aie.lock(%tile22_6) + %lock22_7 = aie.lock(%tile22_7) + %lock22_8 = aie.lock(%tile23_8) + %lock23_8 = aie.lock(%tile23_8) + %lock23_7 = aie.lock(%tile23_7) + %lock23_6 = aie.lock(%tile23_6) + %lock23_5 = aie.lock(%tile23_5) + %lock23_4 = aie.lock(%tile23_4) + %lock23_3 = aie.lock(%tile23_3) + %lock23_2 = aie.lock(%tile23_2) + %lock23_1 = aie.lock(%tile23_1) + %lock24_1 = aie.lock(%tile24_1) + %lock24_2 = aie.lock(%tile24_2) + %lock24_3 = aie.lock(%tile24_3) + %lock24_4 = aie.lock(%tile24_4) + %lock24_5 = aie.lock(%tile24_5) + %lock24_6 = aie.lock(%tile24_6) + %lock24_7 = aie.lock(%tile24_7) + %lock24_8 = aie.lock(%tile25_8) + %lock25_8 = aie.lock(%tile25_8) + %lock25_7 = aie.lock(%tile25_7) + %lock25_6 = aie.lock(%tile25_6) + %lock25_5 = aie.lock(%tile25_5) + %lock25_4 = aie.lock(%tile25_4) + %lock25_3 = aie.lock(%tile25_3) + %lock25_2 = aie.lock(%tile25_2) + %lock25_1 = aie.lock(%tile25_1) + %lock26_1 = aie.lock(%tile26_1) + %lock26_2 = aie.lock(%tile26_2) + %lock26_3 = aie.lock(%tile26_3) + %lock26_4 = aie.lock(%tile26_4) + %lock26_5 = aie.lock(%tile26_5) + %lock26_6 = aie.lock(%tile26_6) + %lock26_7 = aie.lock(%tile26_7) + %lock26_8 = aie.lock(%tile27_8) + %lock27_8 = aie.lock(%tile27_8) + %lock27_7 = aie.lock(%tile27_7) + %lock27_6 = aie.lock(%tile27_6) + %lock27_5 = aie.lock(%tile27_5) + %lock27_4 = aie.lock(%tile27_4) + %lock27_3 = aie.lock(%tile27_3) + %lock27_2 = aie.lock(%tile27_2) + %lock27_1 = aie.lock(%tile27_1) + %lock28_1 = aie.lock(%tile28_1) + %lock28_2 = aie.lock(%tile28_2) + %lock28_3 = aie.lock(%tile28_3) + %lock28_4 = aie.lock(%tile28_4) + %lock28_5 = aie.lock(%tile28_5) + %lock28_6 = aie.lock(%tile28_6) + %lock28_7 = aie.lock(%tile28_7) + %lock28_8 = aie.lock(%tile29_8) + %lock29_8 = aie.lock(%tile29_8) + %lock29_7 = aie.lock(%tile29_7) + %lock29_6 = aie.lock(%tile29_6) + %lock29_5 = aie.lock(%tile29_5) + %lock29_4 = aie.lock(%tile29_4) + %lock29_3 = aie.lock(%tile29_3) + %lock29_2 = aie.lock(%tile29_2) + %lock29_1 = aie.lock(%tile29_1) + %lock30_1 = aie.lock(%tile30_1) + %lock30_2 = aie.lock(%tile30_2) + %lock30_3 = aie.lock(%tile30_3) + %lock30_4 = aie.lock(%tile30_4) + %lock30_5 = aie.lock(%tile30_5) + %lock30_6 = aie.lock(%tile30_6) + %lock30_7 = aie.lock(%tile30_7) + %lock30_8 = aie.lock(%tile31_8) + %lock31_8 = aie.lock(%tile31_8) + %lock31_7 = aie.lock(%tile31_7) + %lock31_6 = aie.lock(%tile31_6) + %lock31_5 = aie.lock(%tile31_5) + %lock31_4 = aie.lock(%tile31_4) + %lock31_3 = aie.lock(%tile31_3) + %lock31_2 = aie.lock(%tile31_2) + %lock31_1 = aie.lock(%tile31_1) + %lock32_1 = aie.lock(%tile32_1) + %lock32_2 = aie.lock(%tile32_2) + %lock32_3 = aie.lock(%tile32_3) + %lock32_4 = aie.lock(%tile32_4) + %lock32_5 = aie.lock(%tile32_5) + %lock32_6 = aie.lock(%tile32_6) + %lock32_7 = aie.lock(%tile32_7) + %lock32_8 = aie.lock(%tile33_8) + %lock33_8 = aie.lock(%tile33_8) + %lock33_7 = aie.lock(%tile33_7) + %lock33_6 = aie.lock(%tile33_6) + %lock33_5 = aie.lock(%tile33_5) + %lock33_4 = aie.lock(%tile33_4) + %lock33_3 = aie.lock(%tile33_3) + %lock33_2 = aie.lock(%tile33_2) + %lock33_1 = aie.lock(%tile33_1) + %lock34_1 = aie.lock(%tile34_1) + %lock34_2 = aie.lock(%tile34_2) + %lock34_3 = aie.lock(%tile34_3) + %lock34_4 = aie.lock(%tile34_4) + %lock34_5 = aie.lock(%tile34_5) + %lock34_6 = aie.lock(%tile34_6) + %lock34_7 = aie.lock(%tile34_7) + %lock34_8 = aie.lock(%tile35_8) + %lock35_8 = aie.lock(%tile35_8) + %lock35_7 = aie.lock(%tile35_7) + %lock35_6 = aie.lock(%tile35_6) + %lock35_5 = aie.lock(%tile35_5) + %lock35_4 = aie.lock(%tile35_4) + %lock35_3 = aie.lock(%tile35_3) + %lock35_2 = aie.lock(%tile35_2) + %lock35_1 = aie.lock(%tile35_1) + %lock36_1 = aie.lock(%tile36_1) + %lock36_2 = aie.lock(%tile36_2) + %lock36_3 = aie.lock(%tile36_3) + %lock36_4 = aie.lock(%tile36_4) + %lock36_5 = aie.lock(%tile36_5) + %lock36_6 = aie.lock(%tile36_6) + %lock36_7 = aie.lock(%tile36_7) + %lock36_8 = aie.lock(%tile37_8) + %lock37_8 = aie.lock(%tile37_8) + %lock37_7 = aie.lock(%tile37_7) + %lock37_6 = aie.lock(%tile37_6) + %lock37_5 = aie.lock(%tile37_5) + %lock37_4 = aie.lock(%tile37_4) + %lock37_3 = aie.lock(%tile37_3) + %lock37_2 = aie.lock(%tile37_2) + %lock37_1 = aie.lock(%tile37_1) + %lock38_1 = aie.lock(%tile38_1) + %lock38_2 = aie.lock(%tile38_2) + %lock38_3 = aie.lock(%tile38_3) + %lock38_4 = aie.lock(%tile38_4) + %lock38_5 = aie.lock(%tile38_5) + %lock38_6 = aie.lock(%tile38_6) + %lock38_7 = aie.lock(%tile38_7) + %lock38_8 = aie.lock(%tile39_8) + %lock39_8 = aie.lock(%tile39_8) + %lock39_7 = aie.lock(%tile39_7) + %lock39_6 = aie.lock(%tile39_6) + %lock39_5 = aie.lock(%tile39_5) + %lock39_4 = aie.lock(%tile39_4) + %lock39_3 = aie.lock(%tile39_3) + %lock39_2 = aie.lock(%tile39_2) + %lock39_1 = aie.lock(%tile39_1) + %lock40_1 = aie.lock(%tile40_1) + %lock40_2 = aie.lock(%tile40_2) + %lock40_3 = aie.lock(%tile40_3) + %lock40_4 = aie.lock(%tile40_4) + %lock40_5 = aie.lock(%tile40_5) + %lock40_6 = aie.lock(%tile40_6) + %lock40_7 = aie.lock(%tile40_7) + %lock40_8 = aie.lock(%tile41_8) + %lock41_8 = aie.lock(%tile41_8) + %lock41_7 = aie.lock(%tile41_7) + %lock41_6 = aie.lock(%tile41_6) + %lock41_5 = aie.lock(%tile41_5) + %lock41_4 = aie.lock(%tile41_4) + %lock41_3 = aie.lock(%tile41_3) + %lock41_2 = aie.lock(%tile41_2) + %lock41_1 = aie.lock(%tile41_1) + %lock42_1 = aie.lock(%tile42_1) + %lock42_2 = aie.lock(%tile42_2) + %lock42_3 = aie.lock(%tile42_3) + %lock42_4 = aie.lock(%tile42_4) + %lock42_5 = aie.lock(%tile42_5) + %lock42_6 = aie.lock(%tile42_6) + %lock42_7 = aie.lock(%tile42_7) + %lock42_8 = aie.lock(%tile43_8) + %lock43_8 = aie.lock(%tile43_8) + %lock43_7 = aie.lock(%tile43_7) + %lock43_6 = aie.lock(%tile43_6) + %lock43_5 = aie.lock(%tile43_5) + %lock43_4 = aie.lock(%tile43_4) + %lock43_3 = aie.lock(%tile43_3) + %lock43_2 = aie.lock(%tile43_2) + %lock43_1 = aie.lock(%tile43_1) + %lock44_1 = aie.lock(%tile44_1) + %lock44_2 = aie.lock(%tile44_2) + %lock44_3 = aie.lock(%tile44_3) + %lock44_4 = aie.lock(%tile44_4) + %lock44_5 = aie.lock(%tile44_5) + %lock44_6 = aie.lock(%tile44_6) + %lock44_7 = aie.lock(%tile44_7) + %lock44_8 = aie.lock(%tile45_8) + %lock45_8 = aie.lock(%tile45_8) + %lock45_7 = aie.lock(%tile45_7) + %lock45_6 = aie.lock(%tile45_6) + %lock45_5 = aie.lock(%tile45_5) + %lock45_4 = aie.lock(%tile45_4) + %lock45_3 = aie.lock(%tile45_3) + %lock45_2 = aie.lock(%tile45_2) + %lock45_1 = aie.lock(%tile45_1) + %lock46_1 = aie.lock(%tile46_1) + %lock46_2 = aie.lock(%tile46_2) + %lock46_3 = aie.lock(%tile46_3) + %lock46_4 = aie.lock(%tile46_4) + %lock46_5 = aie.lock(%tile46_5) + %lock46_6 = aie.lock(%tile46_6) + %lock46_7 = aie.lock(%tile46_7) + %lock46_8 = aie.lock(%tile47_8) + %lock47_8 = aie.lock(%tile47_8) + %lock47_7 = aie.lock(%tile47_7) + %lock47_6 = aie.lock(%tile47_6) + %lock47_5 = aie.lock(%tile47_5) + %lock47_4 = aie.lock(%tile47_4) + %lock47_3 = aie.lock(%tile47_3) + %lock47_2 = aie.lock(%tile47_2) + %lock47_1 = aie.lock(%tile47_1) + %lock48_1 = aie.lock(%tile48_1) + %lock48_2 = aie.lock(%tile48_2) + %lock48_3 = aie.lock(%tile48_3) + %lock48_4 = aie.lock(%tile48_4) + %lock48_5 = aie.lock(%tile48_5) + %lock48_6 = aie.lock(%tile48_6) + %lock48_7 = aie.lock(%tile48_7) + %lock48_8 = aie.lock(%tile49_8) + %lock49_8 = aie.lock(%tile49_8) + %lock49_7 = aie.lock(%tile49_7) + %lock49_6 = aie.lock(%tile49_6) + %lock49_5 = aie.lock(%tile49_5) + %lock49_4 = aie.lock(%tile49_4) + %lock49_3 = aie.lock(%tile49_3) + %lock49_2 = aie.lock(%tile49_2) + %lock49_1 = aie.lock(%tile49_1) { sym_name = "prime_output_lock" } + + %buf0_1 = aie.buffer(%tile0_1) { sym_name = "a" } : memref<3072xi32> + %buf0_2 = aie.buffer(%tile0_2) { sym_name = "prime2" } : memref<3072xi32> + %buf0_3 = aie.buffer(%tile0_3) { sym_name = "prime3" } : memref<3072xi32> + %buf0_4 = aie.buffer(%tile0_4) { sym_name = "prime5" } : memref<3072xi32> + %buf0_5 = aie.buffer(%tile0_5) { sym_name = "prime7" } : memref<3072xi32> + %buf0_6 = aie.buffer(%tile0_6) { sym_name = "prime11" } : memref<3072xi32> + %buf0_7 = aie.buffer(%tile0_7) { sym_name = "prime13" } : memref<3072xi32> + %buf0_8 = aie.buffer(%tile1_8) { sym_name = "prime17" } : memref<3072xi32> + %buf1_8 = aie.buffer(%tile1_8) { sym_name = "prime19" } : memref<3072xi32> + %buf1_7 = aie.buffer(%tile1_7) { sym_name = "prime23" } : memref<3072xi32> + %buf1_6 = aie.buffer(%tile1_6) { sym_name = "prime29" } : memref<3072xi32> + %buf1_5 = aie.buffer(%tile1_5) { sym_name = "prime31" } : memref<3072xi32> + %buf1_4 = aie.buffer(%tile1_4) { sym_name = "prime37" } : memref<3072xi32> + %buf1_3 = aie.buffer(%tile1_3) { sym_name = "prime41" } : memref<3072xi32> + %buf1_2 = aie.buffer(%tile1_2) { sym_name = "prime43" } : memref<3072xi32> + %buf1_1 = aie.buffer(%tile1_1) { sym_name = "prime47" } : memref<3072xi32> + %buf2_1 = aie.buffer(%tile2_1) { sym_name = "prime53" } : memref<3072xi32> + %buf2_2 = aie.buffer(%tile2_2) { sym_name = "prime59" } : memref<3072xi32> + %buf2_3 = aie.buffer(%tile2_3) { sym_name = "prime61" } : memref<3072xi32> + %buf2_4 = aie.buffer(%tile2_4) { sym_name = "prime67" } : memref<3072xi32> + %buf2_5 = aie.buffer(%tile2_5) { sym_name = "prime71" } : memref<3072xi32> + %buf2_6 = aie.buffer(%tile2_6) { sym_name = "prime73" } : memref<3072xi32> + %buf2_7 = aie.buffer(%tile2_7) { sym_name = "prime79" } : memref<3072xi32> + %buf2_8 = aie.buffer(%tile3_8) { sym_name = "prime83" } : memref<3072xi32> + %buf3_8 = aie.buffer(%tile3_8) { sym_name = "prime89" } : memref<3072xi32> + %buf3_7 = aie.buffer(%tile3_7) { sym_name = "prime97" } : memref<3072xi32> + %buf3_6 = aie.buffer(%tile3_6) { sym_name = "prime101" } : memref<3072xi32> + %buf3_5 = aie.buffer(%tile3_5) { sym_name = "prime103" } : memref<3072xi32> + %buf3_4 = aie.buffer(%tile3_4) { sym_name = "prime107" } : memref<3072xi32> + %buf3_3 = aie.buffer(%tile3_3) { sym_name = "prime109" } : memref<3072xi32> + %buf3_2 = aie.buffer(%tile3_2) { sym_name = "prime113" } : memref<3072xi32> + %buf3_1 = aie.buffer(%tile3_1) { sym_name = "prime127" } : memref<3072xi32> + %buf4_1 = aie.buffer(%tile4_1) { sym_name = "prime131" } : memref<3072xi32> + %buf4_2 = aie.buffer(%tile4_2) { sym_name = "prime137" } : memref<3072xi32> + %buf4_3 = aie.buffer(%tile4_3) { sym_name = "prime139" } : memref<3072xi32> + %buf4_4 = aie.buffer(%tile4_4) { sym_name = "prime149" } : memref<3072xi32> + %buf4_5 = aie.buffer(%tile4_5) { sym_name = "prime151" } : memref<3072xi32> + %buf4_6 = aie.buffer(%tile4_6) { sym_name = "prime157" } : memref<3072xi32> + %buf4_7 = aie.buffer(%tile4_7) { sym_name = "prime163" } : memref<3072xi32> + %buf4_8 = aie.buffer(%tile5_8) { sym_name = "prime167" } : memref<3072xi32> + %buf5_8 = aie.buffer(%tile5_8) { sym_name = "prime173" } : memref<3072xi32> + %buf5_7 = aie.buffer(%tile5_7) { sym_name = "prime179" } : memref<3072xi32> + %buf5_6 = aie.buffer(%tile5_6) { sym_name = "prime181" } : memref<3072xi32> + %buf5_5 = aie.buffer(%tile5_5) { sym_name = "prime191" } : memref<3072xi32> + %buf5_4 = aie.buffer(%tile5_4) { sym_name = "prime193" } : memref<3072xi32> + %buf5_3 = aie.buffer(%tile5_3) { sym_name = "prime197" } : memref<3072xi32> + %buf5_2 = aie.buffer(%tile5_2) { sym_name = "prime199" } : memref<3072xi32> + %buf5_1 = aie.buffer(%tile5_1) { sym_name = "prime211" } : memref<3072xi32> + %buf6_1 = aie.buffer(%tile6_1) { sym_name = "prime223" } : memref<3072xi32> + %buf6_2 = aie.buffer(%tile6_2) { sym_name = "prime227" } : memref<3072xi32> + %buf6_3 = aie.buffer(%tile6_3) { sym_name = "prime229" } : memref<3072xi32> + %buf6_4 = aie.buffer(%tile6_4) { sym_name = "prime233" } : memref<3072xi32> + %buf6_5 = aie.buffer(%tile6_5) { sym_name = "prime239" } : memref<3072xi32> + %buf6_6 = aie.buffer(%tile6_6) { sym_name = "prime241" } : memref<3072xi32> + %buf6_7 = aie.buffer(%tile6_7) { sym_name = "prime251" } : memref<3072xi32> + %buf6_8 = aie.buffer(%tile7_8) { sym_name = "prime257" } : memref<3072xi32> + %buf7_8 = aie.buffer(%tile7_8) { sym_name = "prime263" } : memref<3072xi32> + %buf7_7 = aie.buffer(%tile7_7) { sym_name = "prime269" } : memref<3072xi32> + %buf7_6 = aie.buffer(%tile7_6) { sym_name = "prime271" } : memref<3072xi32> + %buf7_5 = aie.buffer(%tile7_5) { sym_name = "prime277" } : memref<3072xi32> + %buf7_4 = aie.buffer(%tile7_4) { sym_name = "prime281" } : memref<3072xi32> + %buf7_3 = aie.buffer(%tile7_3) { sym_name = "prime283" } : memref<3072xi32> + %buf7_2 = aie.buffer(%tile7_2) { sym_name = "prime293" } : memref<3072xi32> + %buf7_1 = aie.buffer(%tile7_1) { sym_name = "prime307" } : memref<3072xi32> + %buf8_1 = aie.buffer(%tile8_1) { sym_name = "prime311" } : memref<3072xi32> + %buf8_2 = aie.buffer(%tile8_2) { sym_name = "prime313" } : memref<3072xi32> + %buf8_3 = aie.buffer(%tile8_3) { sym_name = "prime317" } : memref<3072xi32> + %buf8_4 = aie.buffer(%tile8_4) { sym_name = "prime331" } : memref<3072xi32> + %buf8_5 = aie.buffer(%tile8_5) { sym_name = "prime337" } : memref<3072xi32> + %buf8_6 = aie.buffer(%tile8_6) { sym_name = "prime347" } : memref<3072xi32> + %buf8_7 = aie.buffer(%tile8_7) { sym_name = "prime349" } : memref<3072xi32> + %buf8_8 = aie.buffer(%tile9_8) { sym_name = "prime353" } : memref<3072xi32> + %buf9_8 = aie.buffer(%tile9_8) { sym_name = "prime359" } : memref<3072xi32> + %buf9_7 = aie.buffer(%tile9_7) { sym_name = "prime367" } : memref<3072xi32> + %buf9_6 = aie.buffer(%tile9_6) { sym_name = "prime373" } : memref<3072xi32> + %buf9_5 = aie.buffer(%tile9_5) { sym_name = "prime379" } : memref<3072xi32> + %buf9_4 = aie.buffer(%tile9_4) { sym_name = "prime383" } : memref<3072xi32> + %buf9_3 = aie.buffer(%tile9_3) { sym_name = "prime389" } : memref<3072xi32> + %buf9_2 = aie.buffer(%tile9_2) { sym_name = "prime397" } : memref<3072xi32> + %buf9_1 = aie.buffer(%tile9_1) { sym_name = "prime401" } : memref<3072xi32> + %buf10_1 = aie.buffer(%tile10_1) { sym_name = "prime409" } : memref<3072xi32> + %buf10_2 = aie.buffer(%tile10_2) { sym_name = "prime419" } : memref<3072xi32> + %buf10_3 = aie.buffer(%tile10_3) { sym_name = "prime421" } : memref<3072xi32> + %buf10_4 = aie.buffer(%tile10_4) { sym_name = "prime431" } : memref<3072xi32> + %buf10_5 = aie.buffer(%tile10_5) { sym_name = "prime433" } : memref<3072xi32> + %buf10_6 = aie.buffer(%tile10_6) { sym_name = "prime439" } : memref<3072xi32> + %buf10_7 = aie.buffer(%tile10_7) { sym_name = "prime443" } : memref<3072xi32> + %buf10_8 = aie.buffer(%tile11_8) { sym_name = "prime449" } : memref<3072xi32> + %buf11_8 = aie.buffer(%tile11_8) { sym_name = "prime457" } : memref<3072xi32> + %buf11_7 = aie.buffer(%tile11_7) { sym_name = "prime461" } : memref<3072xi32> + %buf11_6 = aie.buffer(%tile11_6) { sym_name = "prime463" } : memref<3072xi32> + %buf11_5 = aie.buffer(%tile11_5) { sym_name = "prime467" } : memref<3072xi32> + %buf11_4 = aie.buffer(%tile11_4) { sym_name = "prime479" } : memref<3072xi32> + %buf11_3 = aie.buffer(%tile11_3) { sym_name = "prime487" } : memref<3072xi32> + %buf11_2 = aie.buffer(%tile11_2) { sym_name = "prime491" } : memref<3072xi32> + %buf11_1 = aie.buffer(%tile11_1) { sym_name = "prime499" } : memref<3072xi32> + %buf12_1 = aie.buffer(%tile12_1) { sym_name = "prime503" } : memref<3072xi32> + %buf12_2 = aie.buffer(%tile12_2) { sym_name = "prime509" } : memref<3072xi32> + %buf12_3 = aie.buffer(%tile12_3) { sym_name = "prime521" } : memref<3072xi32> + %buf12_4 = aie.buffer(%tile12_4) { sym_name = "prime523" } : memref<3072xi32> + %buf12_5 = aie.buffer(%tile12_5) { sym_name = "prime541" } : memref<3072xi32> + %buf12_6 = aie.buffer(%tile12_6) { sym_name = "prime547" } : memref<3072xi32> + %buf12_7 = aie.buffer(%tile12_7) { sym_name = "prime557" } : memref<3072xi32> + %buf12_8 = aie.buffer(%tile13_8) { sym_name = "prime563" } : memref<3072xi32> + %buf13_8 = aie.buffer(%tile13_8) { sym_name = "prime569" } : memref<3072xi32> + %buf13_7 = aie.buffer(%tile13_7) { sym_name = "prime571" } : memref<3072xi32> + %buf13_6 = aie.buffer(%tile13_6) { sym_name = "prime577" } : memref<3072xi32> + %buf13_5 = aie.buffer(%tile13_5) { sym_name = "prime587" } : memref<3072xi32> + %buf13_4 = aie.buffer(%tile13_4) { sym_name = "prime593" } : memref<3072xi32> + %buf13_3 = aie.buffer(%tile13_3) { sym_name = "prime599" } : memref<3072xi32> + %buf13_2 = aie.buffer(%tile13_2) { sym_name = "prime601" } : memref<3072xi32> + %buf13_1 = aie.buffer(%tile13_1) { sym_name = "prime607" } : memref<3072xi32> + %buf14_1 = aie.buffer(%tile14_1) { sym_name = "prime613" } : memref<3072xi32> + %buf14_2 = aie.buffer(%tile14_2) { sym_name = "prime617" } : memref<3072xi32> + %buf14_3 = aie.buffer(%tile14_3) { sym_name = "prime619" } : memref<3072xi32> + %buf14_4 = aie.buffer(%tile14_4) { sym_name = "prime631" } : memref<3072xi32> + %buf14_5 = aie.buffer(%tile14_5) { sym_name = "prime641" } : memref<3072xi32> + %buf14_6 = aie.buffer(%tile14_6) { sym_name = "prime643" } : memref<3072xi32> + %buf14_7 = aie.buffer(%tile14_7) { sym_name = "prime647" } : memref<3072xi32> + %buf14_8 = aie.buffer(%tile15_8) { sym_name = "prime653" } : memref<3072xi32> + %buf15_8 = aie.buffer(%tile15_8) { sym_name = "prime659" } : memref<3072xi32> + %buf15_7 = aie.buffer(%tile15_7) { sym_name = "prime661" } : memref<3072xi32> + %buf15_6 = aie.buffer(%tile15_6) { sym_name = "prime673" } : memref<3072xi32> + %buf15_5 = aie.buffer(%tile15_5) { sym_name = "prime677" } : memref<3072xi32> + %buf15_4 = aie.buffer(%tile15_4) { sym_name = "prime683" } : memref<3072xi32> + %buf15_3 = aie.buffer(%tile15_3) { sym_name = "prime691" } : memref<3072xi32> + %buf15_2 = aie.buffer(%tile15_2) { sym_name = "prime701" } : memref<3072xi32> + %buf15_1 = aie.buffer(%tile15_1) { sym_name = "prime709" } : memref<3072xi32> + %buf16_1 = aie.buffer(%tile16_1) { sym_name = "prime719" } : memref<3072xi32> + %buf16_2 = aie.buffer(%tile16_2) { sym_name = "prime727" } : memref<3072xi32> + %buf16_3 = aie.buffer(%tile16_3) { sym_name = "prime733" } : memref<3072xi32> + %buf16_4 = aie.buffer(%tile16_4) { sym_name = "prime739" } : memref<3072xi32> + %buf16_5 = aie.buffer(%tile16_5) { sym_name = "prime743" } : memref<3072xi32> + %buf16_6 = aie.buffer(%tile16_6) { sym_name = "prime751" } : memref<3072xi32> + %buf16_7 = aie.buffer(%tile16_7) { sym_name = "prime757" } : memref<3072xi32> + %buf16_8 = aie.buffer(%tile17_8) { sym_name = "prime761" } : memref<3072xi32> + %buf17_8 = aie.buffer(%tile17_8) { sym_name = "prime769" } : memref<3072xi32> + %buf17_7 = aie.buffer(%tile17_7) { sym_name = "prime773" } : memref<3072xi32> + %buf17_6 = aie.buffer(%tile17_6) { sym_name = "prime787" } : memref<3072xi32> + %buf17_5 = aie.buffer(%tile17_5) { sym_name = "prime797" } : memref<3072xi32> + %buf17_4 = aie.buffer(%tile17_4) { sym_name = "prime809" } : memref<3072xi32> + %buf17_3 = aie.buffer(%tile17_3) { sym_name = "prime811" } : memref<3072xi32> + %buf17_2 = aie.buffer(%tile17_2) { sym_name = "prime821" } : memref<3072xi32> + %buf17_1 = aie.buffer(%tile17_1) { sym_name = "prime823" } : memref<3072xi32> + %buf18_1 = aie.buffer(%tile18_1) { sym_name = "prime827" } : memref<3072xi32> + %buf18_2 = aie.buffer(%tile18_2) { sym_name = "prime829" } : memref<3072xi32> + %buf18_3 = aie.buffer(%tile18_3) { sym_name = "prime839" } : memref<3072xi32> + %buf18_4 = aie.buffer(%tile18_4) { sym_name = "prime853" } : memref<3072xi32> + %buf18_5 = aie.buffer(%tile18_5) { sym_name = "prime857" } : memref<3072xi32> + %buf18_6 = aie.buffer(%tile18_6) { sym_name = "prime859" } : memref<3072xi32> + %buf18_7 = aie.buffer(%tile18_7) { sym_name = "prime863" } : memref<3072xi32> + %buf18_8 = aie.buffer(%tile19_8) { sym_name = "prime877" } : memref<3072xi32> + %buf19_8 = aie.buffer(%tile19_8) { sym_name = "prime881" } : memref<3072xi32> + %buf19_7 = aie.buffer(%tile19_7) { sym_name = "prime883" } : memref<3072xi32> + %buf19_6 = aie.buffer(%tile19_6) { sym_name = "prime887" } : memref<3072xi32> + %buf19_5 = aie.buffer(%tile19_5) { sym_name = "prime907" } : memref<3072xi32> + %buf19_4 = aie.buffer(%tile19_4) { sym_name = "prime911" } : memref<3072xi32> + %buf19_3 = aie.buffer(%tile19_3) { sym_name = "prime919" } : memref<3072xi32> + %buf19_2 = aie.buffer(%tile19_2) { sym_name = "prime929" } : memref<3072xi32> + %buf19_1 = aie.buffer(%tile19_1) { sym_name = "prime937" } : memref<3072xi32> + %buf20_1 = aie.buffer(%tile20_1) { sym_name = "prime941" } : memref<3072xi32> + %buf20_2 = aie.buffer(%tile20_2) { sym_name = "prime947" } : memref<3072xi32> + %buf20_3 = aie.buffer(%tile20_3) { sym_name = "prime953" } : memref<3072xi32> + %buf20_4 = aie.buffer(%tile20_4) { sym_name = "prime967" } : memref<3072xi32> + %buf20_5 = aie.buffer(%tile20_5) { sym_name = "prime971" } : memref<3072xi32> + %buf20_6 = aie.buffer(%tile20_6) { sym_name = "prime977" } : memref<3072xi32> + %buf20_7 = aie.buffer(%tile20_7) { sym_name = "prime983" } : memref<3072xi32> + %buf20_8 = aie.buffer(%tile21_8) { sym_name = "prime991" } : memref<3072xi32> + %buf21_8 = aie.buffer(%tile21_8) { sym_name = "prime997" } : memref<3072xi32> + %buf21_7 = aie.buffer(%tile21_7) { sym_name = "prime1009" } : memref<3072xi32> + %buf21_6 = aie.buffer(%tile21_6) { sym_name = "prime1013" } : memref<3072xi32> + %buf21_5 = aie.buffer(%tile21_5) { sym_name = "prime1019" } : memref<3072xi32> + %buf21_4 = aie.buffer(%tile21_4) { sym_name = "prime1021" } : memref<3072xi32> + %buf21_3 = aie.buffer(%tile21_3) { sym_name = "prime1031" } : memref<3072xi32> + %buf21_2 = aie.buffer(%tile21_2) { sym_name = "prime1033" } : memref<3072xi32> + %buf21_1 = aie.buffer(%tile21_1) { sym_name = "prime1039" } : memref<3072xi32> + %buf22_1 = aie.buffer(%tile22_1) { sym_name = "prime1049" } : memref<3072xi32> + %buf22_2 = aie.buffer(%tile22_2) { sym_name = "prime1051" } : memref<3072xi32> + %buf22_3 = aie.buffer(%tile22_3) { sym_name = "prime1061" } : memref<3072xi32> + %buf22_4 = aie.buffer(%tile22_4) { sym_name = "prime1063" } : memref<3072xi32> + %buf22_5 = aie.buffer(%tile22_5) { sym_name = "prime1069" } : memref<3072xi32> + %buf22_6 = aie.buffer(%tile22_6) { sym_name = "prime1087" } : memref<3072xi32> + %buf22_7 = aie.buffer(%tile22_7) { sym_name = "prime1091" } : memref<3072xi32> + %buf22_8 = aie.buffer(%tile23_8) { sym_name = "prime1093" } : memref<3072xi32> + %buf23_8 = aie.buffer(%tile23_8) { sym_name = "prime1097" } : memref<3072xi32> + %buf23_7 = aie.buffer(%tile23_7) { sym_name = "prime1103" } : memref<3072xi32> + %buf23_6 = aie.buffer(%tile23_6) { sym_name = "prime1109" } : memref<3072xi32> + %buf23_5 = aie.buffer(%tile23_5) { sym_name = "prime1117" } : memref<3072xi32> + %buf23_4 = aie.buffer(%tile23_4) { sym_name = "prime1123" } : memref<3072xi32> + %buf23_3 = aie.buffer(%tile23_3) { sym_name = "prime1129" } : memref<3072xi32> + %buf23_2 = aie.buffer(%tile23_2) { sym_name = "prime1151" } : memref<3072xi32> + %buf23_1 = aie.buffer(%tile23_1) { sym_name = "prime1153" } : memref<3072xi32> + %buf24_1 = aie.buffer(%tile24_1) { sym_name = "prime1163" } : memref<3072xi32> + %buf24_2 = aie.buffer(%tile24_2) { sym_name = "prime1171" } : memref<3072xi32> + %buf24_3 = aie.buffer(%tile24_3) { sym_name = "prime1181" } : memref<3072xi32> + %buf24_4 = aie.buffer(%tile24_4) { sym_name = "prime1187" } : memref<3072xi32> + %buf24_5 = aie.buffer(%tile24_5) { sym_name = "prime1193" } : memref<3072xi32> + %buf24_6 = aie.buffer(%tile24_6) { sym_name = "prime1201" } : memref<3072xi32> + %buf24_7 = aie.buffer(%tile24_7) { sym_name = "prime1213" } : memref<3072xi32> + %buf24_8 = aie.buffer(%tile25_8) { sym_name = "prime1217" } : memref<3072xi32> + %buf25_8 = aie.buffer(%tile25_8) { sym_name = "prime1223" } : memref<3072xi32> + %buf25_7 = aie.buffer(%tile25_7) { sym_name = "prime1229" } : memref<3072xi32> + %buf25_6 = aie.buffer(%tile25_6) { sym_name = "prime1231" } : memref<3072xi32> + %buf25_5 = aie.buffer(%tile25_5) { sym_name = "prime1237" } : memref<3072xi32> + %buf25_4 = aie.buffer(%tile25_4) { sym_name = "prime1249" } : memref<3072xi32> + %buf25_3 = aie.buffer(%tile25_3) { sym_name = "prime1259" } : memref<3072xi32> + %buf25_2 = aie.buffer(%tile25_2) { sym_name = "prime1277" } : memref<3072xi32> + %buf25_1 = aie.buffer(%tile25_1) { sym_name = "prime1279" } : memref<3072xi32> + %buf26_1 = aie.buffer(%tile26_1) { sym_name = "prime1283" } : memref<3072xi32> + %buf26_2 = aie.buffer(%tile26_2) { sym_name = "prime1289" } : memref<3072xi32> + %buf26_3 = aie.buffer(%tile26_3) { sym_name = "prime1291" } : memref<3072xi32> + %buf26_4 = aie.buffer(%tile26_4) { sym_name = "prime1297" } : memref<3072xi32> + %buf26_5 = aie.buffer(%tile26_5) { sym_name = "prime1301" } : memref<3072xi32> + %buf26_6 = aie.buffer(%tile26_6) { sym_name = "prime1303" } : memref<3072xi32> + %buf26_7 = aie.buffer(%tile26_7) { sym_name = "prime1307" } : memref<3072xi32> + %buf26_8 = aie.buffer(%tile27_8) { sym_name = "prime1319" } : memref<3072xi32> + %buf27_8 = aie.buffer(%tile27_8) { sym_name = "prime1321" } : memref<3072xi32> + %buf27_7 = aie.buffer(%tile27_7) { sym_name = "prime1327" } : memref<3072xi32> + %buf27_6 = aie.buffer(%tile27_6) { sym_name = "prime1361" } : memref<3072xi32> + %buf27_5 = aie.buffer(%tile27_5) { sym_name = "prime1367" } : memref<3072xi32> + %buf27_4 = aie.buffer(%tile27_4) { sym_name = "prime1373" } : memref<3072xi32> + %buf27_3 = aie.buffer(%tile27_3) { sym_name = "prime1381" } : memref<3072xi32> + %buf27_2 = aie.buffer(%tile27_2) { sym_name = "prime1399" } : memref<3072xi32> + %buf27_1 = aie.buffer(%tile27_1) { sym_name = "prime1409" } : memref<3072xi32> + %buf28_1 = aie.buffer(%tile28_1) { sym_name = "prime1423" } : memref<3072xi32> + %buf28_2 = aie.buffer(%tile28_2) { sym_name = "prime1427" } : memref<3072xi32> + %buf28_3 = aie.buffer(%tile28_3) { sym_name = "prime1429" } : memref<3072xi32> + %buf28_4 = aie.buffer(%tile28_4) { sym_name = "prime1433" } : memref<3072xi32> + %buf28_5 = aie.buffer(%tile28_5) { sym_name = "prime1439" } : memref<3072xi32> + %buf28_6 = aie.buffer(%tile28_6) { sym_name = "prime1447" } : memref<3072xi32> + %buf28_7 = aie.buffer(%tile28_7) { sym_name = "prime1451" } : memref<3072xi32> + %buf28_8 = aie.buffer(%tile29_8) { sym_name = "prime1453" } : memref<3072xi32> + %buf29_8 = aie.buffer(%tile29_8) { sym_name = "prime1459" } : memref<3072xi32> + %buf29_7 = aie.buffer(%tile29_7) { sym_name = "prime1471" } : memref<3072xi32> + %buf29_6 = aie.buffer(%tile29_6) { sym_name = "prime1481" } : memref<3072xi32> + %buf29_5 = aie.buffer(%tile29_5) { sym_name = "prime1483" } : memref<3072xi32> + %buf29_4 = aie.buffer(%tile29_4) { sym_name = "prime1487" } : memref<3072xi32> + %buf29_3 = aie.buffer(%tile29_3) { sym_name = "prime1489" } : memref<3072xi32> + %buf29_2 = aie.buffer(%tile29_2) { sym_name = "prime1493" } : memref<3072xi32> + %buf29_1 = aie.buffer(%tile29_1) { sym_name = "prime1499" } : memref<3072xi32> + %buf30_1 = aie.buffer(%tile30_1) { sym_name = "prime1511" } : memref<3072xi32> + %buf30_2 = aie.buffer(%tile30_2) { sym_name = "prime1523" } : memref<3072xi32> + %buf30_3 = aie.buffer(%tile30_3) { sym_name = "prime1531" } : memref<3072xi32> + %buf30_4 = aie.buffer(%tile30_4) { sym_name = "prime1543" } : memref<3072xi32> + %buf30_5 = aie.buffer(%tile30_5) { sym_name = "prime1549" } : memref<3072xi32> + %buf30_6 = aie.buffer(%tile30_6) { sym_name = "prime1553" } : memref<3072xi32> + %buf30_7 = aie.buffer(%tile30_7) { sym_name = "prime1559" } : memref<3072xi32> + %buf30_8 = aie.buffer(%tile31_8) { sym_name = "prime1567" } : memref<3072xi32> + %buf31_8 = aie.buffer(%tile31_8) { sym_name = "prime1571" } : memref<3072xi32> + %buf31_7 = aie.buffer(%tile31_7) { sym_name = "prime1579" } : memref<3072xi32> + %buf31_6 = aie.buffer(%tile31_6) { sym_name = "prime1583" } : memref<3072xi32> + %buf31_5 = aie.buffer(%tile31_5) { sym_name = "prime1597" } : memref<3072xi32> + %buf31_4 = aie.buffer(%tile31_4) { sym_name = "prime1601" } : memref<3072xi32> + %buf31_3 = aie.buffer(%tile31_3) { sym_name = "prime1607" } : memref<3072xi32> + %buf31_2 = aie.buffer(%tile31_2) { sym_name = "prime1609" } : memref<3072xi32> + %buf31_1 = aie.buffer(%tile31_1) { sym_name = "prime1613" } : memref<3072xi32> + %buf32_1 = aie.buffer(%tile32_1) { sym_name = "prime1619" } : memref<3072xi32> + %buf32_2 = aie.buffer(%tile32_2) { sym_name = "prime1621" } : memref<3072xi32> + %buf32_3 = aie.buffer(%tile32_3) { sym_name = "prime1627" } : memref<3072xi32> + %buf32_4 = aie.buffer(%tile32_4) { sym_name = "prime1637" } : memref<3072xi32> + %buf32_5 = aie.buffer(%tile32_5) { sym_name = "prime1657" } : memref<3072xi32> + %buf32_6 = aie.buffer(%tile32_6) { sym_name = "prime1663" } : memref<3072xi32> + %buf32_7 = aie.buffer(%tile32_7) { sym_name = "prime1667" } : memref<3072xi32> + %buf32_8 = aie.buffer(%tile33_8) { sym_name = "prime1669" } : memref<3072xi32> + %buf33_8 = aie.buffer(%tile33_8) { sym_name = "prime1693" } : memref<3072xi32> + %buf33_7 = aie.buffer(%tile33_7) { sym_name = "prime1697" } : memref<3072xi32> + %buf33_6 = aie.buffer(%tile33_6) { sym_name = "prime1699" } : memref<3072xi32> + %buf33_5 = aie.buffer(%tile33_5) { sym_name = "prime1709" } : memref<3072xi32> + %buf33_4 = aie.buffer(%tile33_4) { sym_name = "prime1721" } : memref<3072xi32> + %buf33_3 = aie.buffer(%tile33_3) { sym_name = "prime1723" } : memref<3072xi32> + %buf33_2 = aie.buffer(%tile33_2) { sym_name = "prime1733" } : memref<3072xi32> + %buf33_1 = aie.buffer(%tile33_1) { sym_name = "prime1741" } : memref<3072xi32> + %buf34_1 = aie.buffer(%tile34_1) { sym_name = "prime1747" } : memref<3072xi32> + %buf34_2 = aie.buffer(%tile34_2) { sym_name = "prime1753" } : memref<3072xi32> + %buf34_3 = aie.buffer(%tile34_3) { sym_name = "prime1759" } : memref<3072xi32> + %buf34_4 = aie.buffer(%tile34_4) { sym_name = "prime1777" } : memref<3072xi32> + %buf34_5 = aie.buffer(%tile34_5) { sym_name = "prime1783" } : memref<3072xi32> + %buf34_6 = aie.buffer(%tile34_6) { sym_name = "prime1787" } : memref<3072xi32> + %buf34_7 = aie.buffer(%tile34_7) { sym_name = "prime1789" } : memref<3072xi32> + %buf34_8 = aie.buffer(%tile35_8) { sym_name = "prime1801" } : memref<3072xi32> + %buf35_8 = aie.buffer(%tile35_8) { sym_name = "prime1811" } : memref<3072xi32> + %buf35_7 = aie.buffer(%tile35_7) { sym_name = "prime1823" } : memref<3072xi32> + %buf35_6 = aie.buffer(%tile35_6) { sym_name = "prime1831" } : memref<3072xi32> + %buf35_5 = aie.buffer(%tile35_5) { sym_name = "prime1847" } : memref<3072xi32> + %buf35_4 = aie.buffer(%tile35_4) { sym_name = "prime1861" } : memref<3072xi32> + %buf35_3 = aie.buffer(%tile35_3) { sym_name = "prime1867" } : memref<3072xi32> + %buf35_2 = aie.buffer(%tile35_2) { sym_name = "prime1871" } : memref<3072xi32> + %buf35_1 = aie.buffer(%tile35_1) { sym_name = "prime1873" } : memref<3072xi32> + %buf36_1 = aie.buffer(%tile36_1) { sym_name = "prime1877" } : memref<3072xi32> + %buf36_2 = aie.buffer(%tile36_2) { sym_name = "prime1879" } : memref<3072xi32> + %buf36_3 = aie.buffer(%tile36_3) { sym_name = "prime1889" } : memref<3072xi32> + %buf36_4 = aie.buffer(%tile36_4) { sym_name = "prime1901" } : memref<3072xi32> + %buf36_5 = aie.buffer(%tile36_5) { sym_name = "prime1907" } : memref<3072xi32> + %buf36_6 = aie.buffer(%tile36_6) { sym_name = "prime1913" } : memref<3072xi32> + %buf36_7 = aie.buffer(%tile36_7) { sym_name = "prime1931" } : memref<3072xi32> + %buf36_8 = aie.buffer(%tile37_8) { sym_name = "prime1933" } : memref<3072xi32> + %buf37_8 = aie.buffer(%tile37_8) { sym_name = "prime1949" } : memref<3072xi32> + %buf37_7 = aie.buffer(%tile37_7) { sym_name = "prime1951" } : memref<3072xi32> + %buf37_6 = aie.buffer(%tile37_6) { sym_name = "prime1973" } : memref<3072xi32> + %buf37_5 = aie.buffer(%tile37_5) { sym_name = "prime1979" } : memref<3072xi32> + %buf37_4 = aie.buffer(%tile37_4) { sym_name = "prime1987" } : memref<3072xi32> + %buf37_3 = aie.buffer(%tile37_3) { sym_name = "prime1993" } : memref<3072xi32> + %buf37_2 = aie.buffer(%tile37_2) { sym_name = "prime1997" } : memref<3072xi32> + %buf37_1 = aie.buffer(%tile37_1) { sym_name = "prime1999" } : memref<3072xi32> + %buf38_1 = aie.buffer(%tile38_1) { sym_name = "prime2003" } : memref<3072xi32> + %buf38_2 = aie.buffer(%tile38_2) { sym_name = "prime2011" } : memref<3072xi32> + %buf38_3 = aie.buffer(%tile38_3) { sym_name = "prime2017" } : memref<3072xi32> + %buf38_4 = aie.buffer(%tile38_4) { sym_name = "prime2027" } : memref<3072xi32> + %buf38_5 = aie.buffer(%tile38_5) { sym_name = "prime2029" } : memref<3072xi32> + %buf38_6 = aie.buffer(%tile38_6) { sym_name = "prime2039" } : memref<3072xi32> + %buf38_7 = aie.buffer(%tile38_7) { sym_name = "prime2053" } : memref<3072xi32> + %buf38_8 = aie.buffer(%tile39_8) { sym_name = "prime2063" } : memref<3072xi32> + %buf39_8 = aie.buffer(%tile39_8) { sym_name = "prime2069" } : memref<3072xi32> + %buf39_7 = aie.buffer(%tile39_7) { sym_name = "prime2081" } : memref<3072xi32> + %buf39_6 = aie.buffer(%tile39_6) { sym_name = "prime2083" } : memref<3072xi32> + %buf39_5 = aie.buffer(%tile39_5) { sym_name = "prime2087" } : memref<3072xi32> + %buf39_4 = aie.buffer(%tile39_4) { sym_name = "prime2089" } : memref<3072xi32> + %buf39_3 = aie.buffer(%tile39_3) { sym_name = "prime2099" } : memref<3072xi32> + %buf39_2 = aie.buffer(%tile39_2) { sym_name = "prime2111" } : memref<3072xi32> + %buf39_1 = aie.buffer(%tile39_1) { sym_name = "prime2113" } : memref<3072xi32> + %buf40_1 = aie.buffer(%tile40_1) { sym_name = "prime2129" } : memref<3072xi32> + %buf40_2 = aie.buffer(%tile40_2) { sym_name = "prime2131" } : memref<3072xi32> + %buf40_3 = aie.buffer(%tile40_3) { sym_name = "prime2137" } : memref<3072xi32> + %buf40_4 = aie.buffer(%tile40_4) { sym_name = "prime2141" } : memref<3072xi32> + %buf40_5 = aie.buffer(%tile40_5) { sym_name = "prime2143" } : memref<3072xi32> + %buf40_6 = aie.buffer(%tile40_6) { sym_name = "prime2153" } : memref<3072xi32> + %buf40_7 = aie.buffer(%tile40_7) { sym_name = "prime2161" } : memref<3072xi32> + %buf40_8 = aie.buffer(%tile41_8) { sym_name = "prime2179" } : memref<3072xi32> + %buf41_8 = aie.buffer(%tile41_8) { sym_name = "prime2203" } : memref<3072xi32> + %buf41_7 = aie.buffer(%tile41_7) { sym_name = "prime2207" } : memref<3072xi32> + %buf41_6 = aie.buffer(%tile41_6) { sym_name = "prime2213" } : memref<3072xi32> + %buf41_5 = aie.buffer(%tile41_5) { sym_name = "prime2221" } : memref<3072xi32> + %buf41_4 = aie.buffer(%tile41_4) { sym_name = "prime2237" } : memref<3072xi32> + %buf41_3 = aie.buffer(%tile41_3) { sym_name = "prime2239" } : memref<3072xi32> + %buf41_2 = aie.buffer(%tile41_2) { sym_name = "prime2243" } : memref<3072xi32> + %buf41_1 = aie.buffer(%tile41_1) { sym_name = "prime2251" } : memref<3072xi32> + %buf42_1 = aie.buffer(%tile42_1) { sym_name = "prime2267" } : memref<3072xi32> + %buf42_2 = aie.buffer(%tile42_2) { sym_name = "prime2269" } : memref<3072xi32> + %buf42_3 = aie.buffer(%tile42_3) { sym_name = "prime2273" } : memref<3072xi32> + %buf42_4 = aie.buffer(%tile42_4) { sym_name = "prime2281" } : memref<3072xi32> + %buf42_5 = aie.buffer(%tile42_5) { sym_name = "prime2287" } : memref<3072xi32> + %buf42_6 = aie.buffer(%tile42_6) { sym_name = "prime2293" } : memref<3072xi32> + %buf42_7 = aie.buffer(%tile42_7) { sym_name = "prime2297" } : memref<3072xi32> + %buf42_8 = aie.buffer(%tile43_8) { sym_name = "prime2309" } : memref<3072xi32> + %buf43_8 = aie.buffer(%tile43_8) { sym_name = "prime2311" } : memref<3072xi32> + %buf43_7 = aie.buffer(%tile43_7) { sym_name = "prime2333" } : memref<3072xi32> + %buf43_6 = aie.buffer(%tile43_6) { sym_name = "prime2339" } : memref<3072xi32> + %buf43_5 = aie.buffer(%tile43_5) { sym_name = "prime2341" } : memref<3072xi32> + %buf43_4 = aie.buffer(%tile43_4) { sym_name = "prime2347" } : memref<3072xi32> + %buf43_3 = aie.buffer(%tile43_3) { sym_name = "prime2351" } : memref<3072xi32> + %buf43_2 = aie.buffer(%tile43_2) { sym_name = "prime2357" } : memref<3072xi32> + %buf43_1 = aie.buffer(%tile43_1) { sym_name = "prime2371" } : memref<3072xi32> + %buf44_1 = aie.buffer(%tile44_1) { sym_name = "prime2377" } : memref<3072xi32> + %buf44_2 = aie.buffer(%tile44_2) { sym_name = "prime2381" } : memref<3072xi32> + %buf44_3 = aie.buffer(%tile44_3) { sym_name = "prime2383" } : memref<3072xi32> + %buf44_4 = aie.buffer(%tile44_4) { sym_name = "prime2389" } : memref<3072xi32> + %buf44_5 = aie.buffer(%tile44_5) { sym_name = "prime2393" } : memref<3072xi32> + %buf44_6 = aie.buffer(%tile44_6) { sym_name = "prime2399" } : memref<3072xi32> + %buf44_7 = aie.buffer(%tile44_7) { sym_name = "prime2411" } : memref<3072xi32> + %buf44_8 = aie.buffer(%tile45_8) { sym_name = "prime2417" } : memref<3072xi32> + %buf45_8 = aie.buffer(%tile45_8) { sym_name = "prime2423" } : memref<3072xi32> + %buf45_7 = aie.buffer(%tile45_7) { sym_name = "prime2437" } : memref<3072xi32> + %buf45_6 = aie.buffer(%tile45_6) { sym_name = "prime2441" } : memref<3072xi32> + %buf45_5 = aie.buffer(%tile45_5) { sym_name = "prime2447" } : memref<3072xi32> + %buf45_4 = aie.buffer(%tile45_4) { sym_name = "prime2459" } : memref<3072xi32> + %buf45_3 = aie.buffer(%tile45_3) { sym_name = "prime2467" } : memref<3072xi32> + %buf45_2 = aie.buffer(%tile45_2) { sym_name = "prime2473" } : memref<3072xi32> + %buf45_1 = aie.buffer(%tile45_1) { sym_name = "prime2477" } : memref<3072xi32> + %buf46_1 = aie.buffer(%tile46_1) { sym_name = "prime2503" } : memref<3072xi32> + %buf46_2 = aie.buffer(%tile46_2) { sym_name = "prime2521" } : memref<3072xi32> + %buf46_3 = aie.buffer(%tile46_3) { sym_name = "prime2531" } : memref<3072xi32> + %buf46_4 = aie.buffer(%tile46_4) { sym_name = "prime2539" } : memref<3072xi32> + %buf46_5 = aie.buffer(%tile46_5) { sym_name = "prime2543" } : memref<3072xi32> + %buf46_6 = aie.buffer(%tile46_6) { sym_name = "prime2549" } : memref<3072xi32> + %buf46_7 = aie.buffer(%tile46_7) { sym_name = "prime2551" } : memref<3072xi32> + %buf46_8 = aie.buffer(%tile47_8) { sym_name = "prime2557" } : memref<3072xi32> + %buf47_8 = aie.buffer(%tile47_8) { sym_name = "prime2579" } : memref<3072xi32> + %buf47_7 = aie.buffer(%tile47_7) { sym_name = "prime2591" } : memref<3072xi32> + %buf47_6 = aie.buffer(%tile47_6) { sym_name = "prime2593" } : memref<3072xi32> + %buf47_5 = aie.buffer(%tile47_5) { sym_name = "prime2609" } : memref<3072xi32> + %buf47_4 = aie.buffer(%tile47_4) { sym_name = "prime2617" } : memref<3072xi32> + %buf47_3 = aie.buffer(%tile47_3) { sym_name = "prime2621" } : memref<3072xi32> + %buf47_2 = aie.buffer(%tile47_2) { sym_name = "prime2633" } : memref<3072xi32> + %buf47_1 = aie.buffer(%tile47_1) { sym_name = "prime2647" } : memref<3072xi32> + %buf48_1 = aie.buffer(%tile48_1) { sym_name = "prime2657" } : memref<3072xi32> + %buf48_2 = aie.buffer(%tile48_2) { sym_name = "prime2659" } : memref<3072xi32> + %buf48_3 = aie.buffer(%tile48_3) { sym_name = "prime2663" } : memref<3072xi32> + %buf48_4 = aie.buffer(%tile48_4) { sym_name = "prime2671" } : memref<3072xi32> + %buf48_5 = aie.buffer(%tile48_5) { sym_name = "prime2677" } : memref<3072xi32> + %buf48_6 = aie.buffer(%tile48_6) { sym_name = "prime2683" } : memref<3072xi32> + %buf48_7 = aie.buffer(%tile48_7) { sym_name = "prime2687" } : memref<3072xi32> + %buf48_8 = aie.buffer(%tile49_8) { sym_name = "prime2689" } : memref<3072xi32> + %buf49_8 = aie.buffer(%tile49_8) { sym_name = "prime2693" } : memref<3072xi32> + %buf49_7 = aie.buffer(%tile49_7) { sym_name = "prime2699" } : memref<3072xi32> + %buf49_6 = aie.buffer(%tile49_6) { sym_name = "prime2707" } : memref<3072xi32> + %buf49_5 = aie.buffer(%tile49_5) { sym_name = "prime2711" } : memref<3072xi32> + %buf49_4 = aie.buffer(%tile49_4) { sym_name = "prime2713" } : memref<3072xi32> + %buf49_3 = aie.buffer(%tile49_3) { sym_name = "prime2719" } : memref<3072xi32> + %buf49_2 = aie.buffer(%tile49_2) { sym_name = "prime2729" } : memref<3072xi32> + %buf49_1 = aie.buffer(%tile49_1) { sym_name = "prime_output" } : memref<3072xi32> - %core0_1 = AIE.core(%tile0_1) { + %core0_1 = aie.core(%tile0_1) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %cend = arith.constant 3072: index @@ -1236,8 +1236,8 @@ module @test16_prime_sieve_large { memref.store %sum_iter, %buf0_1[%arg0] : memref<3072xi32> scf.yield %sum_next : i32 } - AIE.use_lock(%lock0_1, "Release", 1) - AIE.end + aie.use_lock(%lock0_1, "Release", 1) + aie.end } func.func @do_sieve(%bufin: memref<3072xi32>, %bufout:memref<3072xi32>) -> () { %c0 = arith.constant 0 : index @@ -1298,3595 +1298,3595 @@ module @test16_prime_sieve_large { return } - %core0_2 = AIE.core(%tile0_2) { - AIE.use_lock(%lock0_1, "Acquire", 1) - AIE.use_lock(%lock0_2, "Acquire", 0) + %core0_2 = aie.core(%tile0_2) { + aie.use_lock(%lock0_1, "Acquire", 1) + aie.use_lock(%lock0_2, "Acquire", 0) func.call @do_sieve(%buf0_1, %buf0_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_1, "Release", 0) - AIE.use_lock(%lock0_2, "Release", 1) - AIE.end + aie.use_lock(%lock0_1, "Release", 0) + aie.use_lock(%lock0_2, "Release", 1) + aie.end } - %core0_3 = AIE.core(%tile0_3) { - AIE.use_lock(%lock0_2, "Acquire", 1) - AIE.use_lock(%lock0_3, "Acquire", 0) + %core0_3 = aie.core(%tile0_3) { + aie.use_lock(%lock0_2, "Acquire", 1) + aie.use_lock(%lock0_3, "Acquire", 0) func.call @do_sieve(%buf0_2, %buf0_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_2, "Release", 0) - AIE.use_lock(%lock0_3, "Release", 1) - AIE.end + aie.use_lock(%lock0_2, "Release", 0) + aie.use_lock(%lock0_3, "Release", 1) + aie.end } - %core0_4 = AIE.core(%tile0_4) { - AIE.use_lock(%lock0_3, "Acquire", 1) - AIE.use_lock(%lock0_4, "Acquire", 0) + %core0_4 = aie.core(%tile0_4) { + aie.use_lock(%lock0_3, "Acquire", 1) + aie.use_lock(%lock0_4, "Acquire", 0) func.call @do_sieve(%buf0_3, %buf0_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_3, "Release", 0) - AIE.use_lock(%lock0_4, "Release", 1) - AIE.end + aie.use_lock(%lock0_3, "Release", 0) + aie.use_lock(%lock0_4, "Release", 1) + aie.end } - %core0_5 = AIE.core(%tile0_5) { - AIE.use_lock(%lock0_4, "Acquire", 1) - AIE.use_lock(%lock0_5, "Acquire", 0) + %core0_5 = aie.core(%tile0_5) { + aie.use_lock(%lock0_4, "Acquire", 1) + aie.use_lock(%lock0_5, "Acquire", 0) func.call @do_sieve(%buf0_4, %buf0_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_4, "Release", 0) - AIE.use_lock(%lock0_5, "Release", 1) - AIE.end + aie.use_lock(%lock0_4, "Release", 0) + aie.use_lock(%lock0_5, "Release", 1) + aie.end } - %core0_6 = AIE.core(%tile0_6) { - AIE.use_lock(%lock0_5, "Acquire", 1) - AIE.use_lock(%lock0_6, "Acquire", 0) + %core0_6 = aie.core(%tile0_6) { + aie.use_lock(%lock0_5, "Acquire", 1) + aie.use_lock(%lock0_6, "Acquire", 0) func.call @do_sieve(%buf0_5, %buf0_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_5, "Release", 0) - AIE.use_lock(%lock0_6, "Release", 1) - AIE.end + aie.use_lock(%lock0_5, "Release", 0) + aie.use_lock(%lock0_6, "Release", 1) + aie.end } - %core0_7 = AIE.core(%tile0_7) { - AIE.use_lock(%lock0_6, "Acquire", 1) - AIE.use_lock(%lock0_7, "Acquire", 0) + %core0_7 = aie.core(%tile0_7) { + aie.use_lock(%lock0_6, "Acquire", 1) + aie.use_lock(%lock0_7, "Acquire", 0) func.call @do_sieve(%buf0_6, %buf0_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_6, "Release", 0) - AIE.use_lock(%lock0_7, "Release", 1) - AIE.end + aie.use_lock(%lock0_6, "Release", 0) + aie.use_lock(%lock0_7, "Release", 1) + aie.end } - %core0_8 = AIE.core(%tile0_8) { - AIE.use_lock(%lock0_7, "Acquire", 1) - AIE.use_lock(%lock0_8, "Acquire", 0) + %core0_8 = aie.core(%tile0_8) { + aie.use_lock(%lock0_7, "Acquire", 1) + aie.use_lock(%lock0_8, "Acquire", 0) func.call @do_sieve(%buf0_7, %buf0_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_7, "Release", 0) - AIE.use_lock(%lock0_8, "Release", 1) - AIE.end + aie.use_lock(%lock0_7, "Release", 0) + aie.use_lock(%lock0_8, "Release", 1) + aie.end } - %core1_8 = AIE.core(%tile1_8) { - AIE.use_lock(%lock0_8, "Acquire", 1) - AIE.use_lock(%lock1_8, "Acquire", 0) + %core1_8 = aie.core(%tile1_8) { + aie.use_lock(%lock0_8, "Acquire", 1) + aie.use_lock(%lock1_8, "Acquire", 0) func.call @do_sieve(%buf0_8, %buf1_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock0_8, "Release", 0) - AIE.use_lock(%lock1_8, "Release", 1) - AIE.end + aie.use_lock(%lock0_8, "Release", 0) + aie.use_lock(%lock1_8, "Release", 1) + aie.end } - %core1_7 = AIE.core(%tile1_7) { - AIE.use_lock(%lock1_8, "Acquire", 1) - AIE.use_lock(%lock1_7, "Acquire", 0) + %core1_7 = aie.core(%tile1_7) { + aie.use_lock(%lock1_8, "Acquire", 1) + aie.use_lock(%lock1_7, "Acquire", 0) func.call @do_sieve(%buf1_8, %buf1_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_8, "Release", 0) - AIE.use_lock(%lock1_7, "Release", 1) - AIE.end + aie.use_lock(%lock1_8, "Release", 0) + aie.use_lock(%lock1_7, "Release", 1) + aie.end } - %core1_6 = AIE.core(%tile1_6) { - AIE.use_lock(%lock1_7, "Acquire", 1) - AIE.use_lock(%lock1_6, "Acquire", 0) + %core1_6 = aie.core(%tile1_6) { + aie.use_lock(%lock1_7, "Acquire", 1) + aie.use_lock(%lock1_6, "Acquire", 0) func.call @do_sieve(%buf1_7, %buf1_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_7, "Release", 0) - AIE.use_lock(%lock1_6, "Release", 1) - AIE.end + aie.use_lock(%lock1_7, "Release", 0) + aie.use_lock(%lock1_6, "Release", 1) + aie.end } - %core1_5 = AIE.core(%tile1_5) { - AIE.use_lock(%lock1_6, "Acquire", 1) - AIE.use_lock(%lock1_5, "Acquire", 0) + %core1_5 = aie.core(%tile1_5) { + aie.use_lock(%lock1_6, "Acquire", 1) + aie.use_lock(%lock1_5, "Acquire", 0) func.call @do_sieve(%buf1_6, %buf1_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_6, "Release", 0) - AIE.use_lock(%lock1_5, "Release", 1) - AIE.end + aie.use_lock(%lock1_6, "Release", 0) + aie.use_lock(%lock1_5, "Release", 1) + aie.end } - %core1_4 = AIE.core(%tile1_4) { - AIE.use_lock(%lock1_5, "Acquire", 1) - AIE.use_lock(%lock1_4, "Acquire", 0) + %core1_4 = aie.core(%tile1_4) { + aie.use_lock(%lock1_5, "Acquire", 1) + aie.use_lock(%lock1_4, "Acquire", 0) func.call @do_sieve(%buf1_5, %buf1_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_5, "Release", 0) - AIE.use_lock(%lock1_4, "Release", 1) - AIE.end + aie.use_lock(%lock1_5, "Release", 0) + aie.use_lock(%lock1_4, "Release", 1) + aie.end } - %core1_3 = AIE.core(%tile1_3) { - AIE.use_lock(%lock1_4, "Acquire", 1) - AIE.use_lock(%lock1_3, "Acquire", 0) + %core1_3 = aie.core(%tile1_3) { + aie.use_lock(%lock1_4, "Acquire", 1) + aie.use_lock(%lock1_3, "Acquire", 0) func.call @do_sieve(%buf1_4, %buf1_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_4, "Release", 0) - AIE.use_lock(%lock1_3, "Release", 1) - AIE.end + aie.use_lock(%lock1_4, "Release", 0) + aie.use_lock(%lock1_3, "Release", 1) + aie.end } - %core1_2 = AIE.core(%tile1_2) { - AIE.use_lock(%lock1_3, "Acquire", 1) - AIE.use_lock(%lock1_2, "Acquire", 0) + %core1_2 = aie.core(%tile1_2) { + aie.use_lock(%lock1_3, "Acquire", 1) + aie.use_lock(%lock1_2, "Acquire", 0) func.call @do_sieve(%buf1_3, %buf1_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_3, "Release", 0) - AIE.use_lock(%lock1_2, "Release", 1) - AIE.end + aie.use_lock(%lock1_3, "Release", 0) + aie.use_lock(%lock1_2, "Release", 1) + aie.end } - %core1_1 = AIE.core(%tile1_1) { - AIE.use_lock(%lock1_2, "Acquire", 1) - AIE.use_lock(%lock1_1, "Acquire", 0) + %core1_1 = aie.core(%tile1_1) { + aie.use_lock(%lock1_2, "Acquire", 1) + aie.use_lock(%lock1_1, "Acquire", 0) func.call @do_sieve(%buf1_2, %buf1_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_2, "Release", 0) - AIE.use_lock(%lock1_1, "Release", 1) - AIE.end + aie.use_lock(%lock1_2, "Release", 0) + aie.use_lock(%lock1_1, "Release", 1) + aie.end } - %core2_1 = AIE.core(%tile2_1) { - AIE.use_lock(%lock1_1, "Acquire", 1) - AIE.use_lock(%lock2_1, "Acquire", 0) + %core2_1 = aie.core(%tile2_1) { + aie.use_lock(%lock1_1, "Acquire", 1) + aie.use_lock(%lock2_1, "Acquire", 0) func.call @do_sieve(%buf1_1, %buf2_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock1_1, "Release", 0) - AIE.use_lock(%lock2_1, "Release", 1) - AIE.end + aie.use_lock(%lock1_1, "Release", 0) + aie.use_lock(%lock2_1, "Release", 1) + aie.end } - %core2_2 = AIE.core(%tile2_2) { - AIE.use_lock(%lock2_1, "Acquire", 1) - AIE.use_lock(%lock2_2, "Acquire", 0) + %core2_2 = aie.core(%tile2_2) { + aie.use_lock(%lock2_1, "Acquire", 1) + aie.use_lock(%lock2_2, "Acquire", 0) func.call @do_sieve(%buf2_1, %buf2_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_1, "Release", 0) - AIE.use_lock(%lock2_2, "Release", 1) - AIE.end + aie.use_lock(%lock2_1, "Release", 0) + aie.use_lock(%lock2_2, "Release", 1) + aie.end } - %core2_3 = AIE.core(%tile2_3) { - AIE.use_lock(%lock2_2, "Acquire", 1) - AIE.use_lock(%lock2_3, "Acquire", 0) + %core2_3 = aie.core(%tile2_3) { + aie.use_lock(%lock2_2, "Acquire", 1) + aie.use_lock(%lock2_3, "Acquire", 0) func.call @do_sieve(%buf2_2, %buf2_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_2, "Release", 0) - AIE.use_lock(%lock2_3, "Release", 1) - AIE.end + aie.use_lock(%lock2_2, "Release", 0) + aie.use_lock(%lock2_3, "Release", 1) + aie.end } - %core2_4 = AIE.core(%tile2_4) { - AIE.use_lock(%lock2_3, "Acquire", 1) - AIE.use_lock(%lock2_4, "Acquire", 0) + %core2_4 = aie.core(%tile2_4) { + aie.use_lock(%lock2_3, "Acquire", 1) + aie.use_lock(%lock2_4, "Acquire", 0) func.call @do_sieve(%buf2_3, %buf2_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_3, "Release", 0) - AIE.use_lock(%lock2_4, "Release", 1) - AIE.end + aie.use_lock(%lock2_3, "Release", 0) + aie.use_lock(%lock2_4, "Release", 1) + aie.end } - %core2_5 = AIE.core(%tile2_5) { - AIE.use_lock(%lock2_4, "Acquire", 1) - AIE.use_lock(%lock2_5, "Acquire", 0) + %core2_5 = aie.core(%tile2_5) { + aie.use_lock(%lock2_4, "Acquire", 1) + aie.use_lock(%lock2_5, "Acquire", 0) func.call @do_sieve(%buf2_4, %buf2_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_4, "Release", 0) - AIE.use_lock(%lock2_5, "Release", 1) - AIE.end + aie.use_lock(%lock2_4, "Release", 0) + aie.use_lock(%lock2_5, "Release", 1) + aie.end } - %core2_6 = AIE.core(%tile2_6) { - AIE.use_lock(%lock2_5, "Acquire", 1) - AIE.use_lock(%lock2_6, "Acquire", 0) + %core2_6 = aie.core(%tile2_6) { + aie.use_lock(%lock2_5, "Acquire", 1) + aie.use_lock(%lock2_6, "Acquire", 0) func.call @do_sieve(%buf2_5, %buf2_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_5, "Release", 0) - AIE.use_lock(%lock2_6, "Release", 1) - AIE.end + aie.use_lock(%lock2_5, "Release", 0) + aie.use_lock(%lock2_6, "Release", 1) + aie.end } - %core2_7 = AIE.core(%tile2_7) { - AIE.use_lock(%lock2_6, "Acquire", 1) - AIE.use_lock(%lock2_7, "Acquire", 0) + %core2_7 = aie.core(%tile2_7) { + aie.use_lock(%lock2_6, "Acquire", 1) + aie.use_lock(%lock2_7, "Acquire", 0) func.call @do_sieve(%buf2_6, %buf2_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_6, "Release", 0) - AIE.use_lock(%lock2_7, "Release", 1) - AIE.end + aie.use_lock(%lock2_6, "Release", 0) + aie.use_lock(%lock2_7, "Release", 1) + aie.end } - %core2_8 = AIE.core(%tile2_8) { - AIE.use_lock(%lock2_7, "Acquire", 1) - AIE.use_lock(%lock2_8, "Acquire", 0) + %core2_8 = aie.core(%tile2_8) { + aie.use_lock(%lock2_7, "Acquire", 1) + aie.use_lock(%lock2_8, "Acquire", 0) func.call @do_sieve(%buf2_7, %buf2_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_7, "Release", 0) - AIE.use_lock(%lock2_8, "Release", 1) - AIE.end + aie.use_lock(%lock2_7, "Release", 0) + aie.use_lock(%lock2_8, "Release", 1) + aie.end } - %core3_8 = AIE.core(%tile3_8) { - AIE.use_lock(%lock2_8, "Acquire", 1) - AIE.use_lock(%lock3_8, "Acquire", 0) + %core3_8 = aie.core(%tile3_8) { + aie.use_lock(%lock2_8, "Acquire", 1) + aie.use_lock(%lock3_8, "Acquire", 0) func.call @do_sieve(%buf2_8, %buf3_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock2_8, "Release", 0) - AIE.use_lock(%lock3_8, "Release", 1) - AIE.end + aie.use_lock(%lock2_8, "Release", 0) + aie.use_lock(%lock3_8, "Release", 1) + aie.end } - %core3_7 = AIE.core(%tile3_7) { - AIE.use_lock(%lock3_8, "Acquire", 1) - AIE.use_lock(%lock3_7, "Acquire", 0) + %core3_7 = aie.core(%tile3_7) { + aie.use_lock(%lock3_8, "Acquire", 1) + aie.use_lock(%lock3_7, "Acquire", 0) func.call @do_sieve(%buf3_8, %buf3_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_8, "Release", 0) - AIE.use_lock(%lock3_7, "Release", 1) - AIE.end + aie.use_lock(%lock3_8, "Release", 0) + aie.use_lock(%lock3_7, "Release", 1) + aie.end } - %core3_6 = AIE.core(%tile3_6) { - AIE.use_lock(%lock3_7, "Acquire", 1) - AIE.use_lock(%lock3_6, "Acquire", 0) + %core3_6 = aie.core(%tile3_6) { + aie.use_lock(%lock3_7, "Acquire", 1) + aie.use_lock(%lock3_6, "Acquire", 0) func.call @do_sieve(%buf3_7, %buf3_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_7, "Release", 0) - AIE.use_lock(%lock3_6, "Release", 1) - AIE.end + aie.use_lock(%lock3_7, "Release", 0) + aie.use_lock(%lock3_6, "Release", 1) + aie.end } - %core3_5 = AIE.core(%tile3_5) { - AIE.use_lock(%lock3_6, "Acquire", 1) - AIE.use_lock(%lock3_5, "Acquire", 0) + %core3_5 = aie.core(%tile3_5) { + aie.use_lock(%lock3_6, "Acquire", 1) + aie.use_lock(%lock3_5, "Acquire", 0) func.call @do_sieve(%buf3_6, %buf3_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_6, "Release", 0) - AIE.use_lock(%lock3_5, "Release", 1) - AIE.end + aie.use_lock(%lock3_6, "Release", 0) + aie.use_lock(%lock3_5, "Release", 1) + aie.end } - %core3_4 = AIE.core(%tile3_4) { - AIE.use_lock(%lock3_5, "Acquire", 1) - AIE.use_lock(%lock3_4, "Acquire", 0) + %core3_4 = aie.core(%tile3_4) { + aie.use_lock(%lock3_5, "Acquire", 1) + aie.use_lock(%lock3_4, "Acquire", 0) func.call @do_sieve(%buf3_5, %buf3_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_5, "Release", 0) - AIE.use_lock(%lock3_4, "Release", 1) - AIE.end + aie.use_lock(%lock3_5, "Release", 0) + aie.use_lock(%lock3_4, "Release", 1) + aie.end } - %core3_3 = AIE.core(%tile3_3) { - AIE.use_lock(%lock3_4, "Acquire", 1) - AIE.use_lock(%lock3_3, "Acquire", 0) + %core3_3 = aie.core(%tile3_3) { + aie.use_lock(%lock3_4, "Acquire", 1) + aie.use_lock(%lock3_3, "Acquire", 0) func.call @do_sieve(%buf3_4, %buf3_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_4, "Release", 0) - AIE.use_lock(%lock3_3, "Release", 1) - AIE.end + aie.use_lock(%lock3_4, "Release", 0) + aie.use_lock(%lock3_3, "Release", 1) + aie.end } - %core3_2 = AIE.core(%tile3_2) { - AIE.use_lock(%lock3_3, "Acquire", 1) - AIE.use_lock(%lock3_2, "Acquire", 0) + %core3_2 = aie.core(%tile3_2) { + aie.use_lock(%lock3_3, "Acquire", 1) + aie.use_lock(%lock3_2, "Acquire", 0) func.call @do_sieve(%buf3_3, %buf3_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_3, "Release", 0) - AIE.use_lock(%lock3_2, "Release", 1) - AIE.end + aie.use_lock(%lock3_3, "Release", 0) + aie.use_lock(%lock3_2, "Release", 1) + aie.end } - %core3_1 = AIE.core(%tile3_1) { - AIE.use_lock(%lock3_2, "Acquire", 1) - AIE.use_lock(%lock3_1, "Acquire", 0) + %core3_1 = aie.core(%tile3_1) { + aie.use_lock(%lock3_2, "Acquire", 1) + aie.use_lock(%lock3_1, "Acquire", 0) func.call @do_sieve(%buf3_2, %buf3_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_2, "Release", 0) - AIE.use_lock(%lock3_1, "Release", 1) - AIE.end + aie.use_lock(%lock3_2, "Release", 0) + aie.use_lock(%lock3_1, "Release", 1) + aie.end } - %core4_1 = AIE.core(%tile4_1) { - AIE.use_lock(%lock3_1, "Acquire", 1) - AIE.use_lock(%lock4_1, "Acquire", 0) + %core4_1 = aie.core(%tile4_1) { + aie.use_lock(%lock3_1, "Acquire", 1) + aie.use_lock(%lock4_1, "Acquire", 0) func.call @do_sieve(%buf3_1, %buf4_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock3_1, "Release", 0) - AIE.use_lock(%lock4_1, "Release", 1) - AIE.end + aie.use_lock(%lock3_1, "Release", 0) + aie.use_lock(%lock4_1, "Release", 1) + aie.end } - %core4_2 = AIE.core(%tile4_2) { - AIE.use_lock(%lock4_1, "Acquire", 1) - AIE.use_lock(%lock4_2, "Acquire", 0) + %core4_2 = aie.core(%tile4_2) { + aie.use_lock(%lock4_1, "Acquire", 1) + aie.use_lock(%lock4_2, "Acquire", 0) func.call @do_sieve(%buf4_1, %buf4_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_1, "Release", 0) - AIE.use_lock(%lock4_2, "Release", 1) - AIE.end + aie.use_lock(%lock4_1, "Release", 0) + aie.use_lock(%lock4_2, "Release", 1) + aie.end } - %core4_3 = AIE.core(%tile4_3) { - AIE.use_lock(%lock4_2, "Acquire", 1) - AIE.use_lock(%lock4_3, "Acquire", 0) + %core4_3 = aie.core(%tile4_3) { + aie.use_lock(%lock4_2, "Acquire", 1) + aie.use_lock(%lock4_3, "Acquire", 0) func.call @do_sieve(%buf4_2, %buf4_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_2, "Release", 0) - AIE.use_lock(%lock4_3, "Release", 1) - AIE.end + aie.use_lock(%lock4_2, "Release", 0) + aie.use_lock(%lock4_3, "Release", 1) + aie.end } - %core4_4 = AIE.core(%tile4_4) { - AIE.use_lock(%lock4_3, "Acquire", 1) - AIE.use_lock(%lock4_4, "Acquire", 0) + %core4_4 = aie.core(%tile4_4) { + aie.use_lock(%lock4_3, "Acquire", 1) + aie.use_lock(%lock4_4, "Acquire", 0) func.call @do_sieve(%buf4_3, %buf4_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_3, "Release", 0) - AIE.use_lock(%lock4_4, "Release", 1) - AIE.end + aie.use_lock(%lock4_3, "Release", 0) + aie.use_lock(%lock4_4, "Release", 1) + aie.end } - %core4_5 = AIE.core(%tile4_5) { - AIE.use_lock(%lock4_4, "Acquire", 1) - AIE.use_lock(%lock4_5, "Acquire", 0) + %core4_5 = aie.core(%tile4_5) { + aie.use_lock(%lock4_4, "Acquire", 1) + aie.use_lock(%lock4_5, "Acquire", 0) func.call @do_sieve(%buf4_4, %buf4_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_4, "Release", 0) - AIE.use_lock(%lock4_5, "Release", 1) - AIE.end + aie.use_lock(%lock4_4, "Release", 0) + aie.use_lock(%lock4_5, "Release", 1) + aie.end } - %core4_6 = AIE.core(%tile4_6) { - AIE.use_lock(%lock4_5, "Acquire", 1) - AIE.use_lock(%lock4_6, "Acquire", 0) + %core4_6 = aie.core(%tile4_6) { + aie.use_lock(%lock4_5, "Acquire", 1) + aie.use_lock(%lock4_6, "Acquire", 0) func.call @do_sieve(%buf4_5, %buf4_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_5, "Release", 0) - AIE.use_lock(%lock4_6, "Release", 1) - AIE.end + aie.use_lock(%lock4_5, "Release", 0) + aie.use_lock(%lock4_6, "Release", 1) + aie.end } - %core4_7 = AIE.core(%tile4_7) { - AIE.use_lock(%lock4_6, "Acquire", 1) - AIE.use_lock(%lock4_7, "Acquire", 0) + %core4_7 = aie.core(%tile4_7) { + aie.use_lock(%lock4_6, "Acquire", 1) + aie.use_lock(%lock4_7, "Acquire", 0) func.call @do_sieve(%buf4_6, %buf4_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_6, "Release", 0) - AIE.use_lock(%lock4_7, "Release", 1) - AIE.end + aie.use_lock(%lock4_6, "Release", 0) + aie.use_lock(%lock4_7, "Release", 1) + aie.end } - %core4_8 = AIE.core(%tile4_8) { - AIE.use_lock(%lock4_7, "Acquire", 1) - AIE.use_lock(%lock4_8, "Acquire", 0) + %core4_8 = aie.core(%tile4_8) { + aie.use_lock(%lock4_7, "Acquire", 1) + aie.use_lock(%lock4_8, "Acquire", 0) func.call @do_sieve(%buf4_7, %buf4_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_7, "Release", 0) - AIE.use_lock(%lock4_8, "Release", 1) - AIE.end + aie.use_lock(%lock4_7, "Release", 0) + aie.use_lock(%lock4_8, "Release", 1) + aie.end } - %core5_8 = AIE.core(%tile5_8) { - AIE.use_lock(%lock4_8, "Acquire", 1) - AIE.use_lock(%lock5_8, "Acquire", 0) + %core5_8 = aie.core(%tile5_8) { + aie.use_lock(%lock4_8, "Acquire", 1) + aie.use_lock(%lock5_8, "Acquire", 0) func.call @do_sieve(%buf4_8, %buf5_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock4_8, "Release", 0) - AIE.use_lock(%lock5_8, "Release", 1) - AIE.end + aie.use_lock(%lock4_8, "Release", 0) + aie.use_lock(%lock5_8, "Release", 1) + aie.end } - %core5_7 = AIE.core(%tile5_7) { - AIE.use_lock(%lock5_8, "Acquire", 1) - AIE.use_lock(%lock5_7, "Acquire", 0) + %core5_7 = aie.core(%tile5_7) { + aie.use_lock(%lock5_8, "Acquire", 1) + aie.use_lock(%lock5_7, "Acquire", 0) func.call @do_sieve(%buf5_8, %buf5_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_8, "Release", 0) - AIE.use_lock(%lock5_7, "Release", 1) - AIE.end + aie.use_lock(%lock5_8, "Release", 0) + aie.use_lock(%lock5_7, "Release", 1) + aie.end } - %core5_6 = AIE.core(%tile5_6) { - AIE.use_lock(%lock5_7, "Acquire", 1) - AIE.use_lock(%lock5_6, "Acquire", 0) + %core5_6 = aie.core(%tile5_6) { + aie.use_lock(%lock5_7, "Acquire", 1) + aie.use_lock(%lock5_6, "Acquire", 0) func.call @do_sieve(%buf5_7, %buf5_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_7, "Release", 0) - AIE.use_lock(%lock5_6, "Release", 1) - AIE.end + aie.use_lock(%lock5_7, "Release", 0) + aie.use_lock(%lock5_6, "Release", 1) + aie.end } - %core5_5 = AIE.core(%tile5_5) { - AIE.use_lock(%lock5_6, "Acquire", 1) - AIE.use_lock(%lock5_5, "Acquire", 0) + %core5_5 = aie.core(%tile5_5) { + aie.use_lock(%lock5_6, "Acquire", 1) + aie.use_lock(%lock5_5, "Acquire", 0) func.call @do_sieve(%buf5_6, %buf5_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_6, "Release", 0) - AIE.use_lock(%lock5_5, "Release", 1) - AIE.end + aie.use_lock(%lock5_6, "Release", 0) + aie.use_lock(%lock5_5, "Release", 1) + aie.end } - %core5_4 = AIE.core(%tile5_4) { - AIE.use_lock(%lock5_5, "Acquire", 1) - AIE.use_lock(%lock5_4, "Acquire", 0) + %core5_4 = aie.core(%tile5_4) { + aie.use_lock(%lock5_5, "Acquire", 1) + aie.use_lock(%lock5_4, "Acquire", 0) func.call @do_sieve(%buf5_5, %buf5_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_5, "Release", 0) - AIE.use_lock(%lock5_4, "Release", 1) - AIE.end + aie.use_lock(%lock5_5, "Release", 0) + aie.use_lock(%lock5_4, "Release", 1) + aie.end } - %core5_3 = AIE.core(%tile5_3) { - AIE.use_lock(%lock5_4, "Acquire", 1) - AIE.use_lock(%lock5_3, "Acquire", 0) + %core5_3 = aie.core(%tile5_3) { + aie.use_lock(%lock5_4, "Acquire", 1) + aie.use_lock(%lock5_3, "Acquire", 0) func.call @do_sieve(%buf5_4, %buf5_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_4, "Release", 0) - AIE.use_lock(%lock5_3, "Release", 1) - AIE.end + aie.use_lock(%lock5_4, "Release", 0) + aie.use_lock(%lock5_3, "Release", 1) + aie.end } - %core5_2 = AIE.core(%tile5_2) { - AIE.use_lock(%lock5_3, "Acquire", 1) - AIE.use_lock(%lock5_2, "Acquire", 0) + %core5_2 = aie.core(%tile5_2) { + aie.use_lock(%lock5_3, "Acquire", 1) + aie.use_lock(%lock5_2, "Acquire", 0) func.call @do_sieve(%buf5_3, %buf5_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_3, "Release", 0) - AIE.use_lock(%lock5_2, "Release", 1) - AIE.end + aie.use_lock(%lock5_3, "Release", 0) + aie.use_lock(%lock5_2, "Release", 1) + aie.end } - %core5_1 = AIE.core(%tile5_1) { - AIE.use_lock(%lock5_2, "Acquire", 1) - AIE.use_lock(%lock5_1, "Acquire", 0) + %core5_1 = aie.core(%tile5_1) { + aie.use_lock(%lock5_2, "Acquire", 1) + aie.use_lock(%lock5_1, "Acquire", 0) func.call @do_sieve(%buf5_2, %buf5_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_2, "Release", 0) - AIE.use_lock(%lock5_1, "Release", 1) - AIE.end + aie.use_lock(%lock5_2, "Release", 0) + aie.use_lock(%lock5_1, "Release", 1) + aie.end } - %core6_1 = AIE.core(%tile6_1) { - AIE.use_lock(%lock5_1, "Acquire", 1) - AIE.use_lock(%lock6_1, "Acquire", 0) + %core6_1 = aie.core(%tile6_1) { + aie.use_lock(%lock5_1, "Acquire", 1) + aie.use_lock(%lock6_1, "Acquire", 0) func.call @do_sieve(%buf5_1, %buf6_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock5_1, "Release", 0) - AIE.use_lock(%lock6_1, "Release", 1) - AIE.end + aie.use_lock(%lock5_1, "Release", 0) + aie.use_lock(%lock6_1, "Release", 1) + aie.end } - %core6_2 = AIE.core(%tile6_2) { - AIE.use_lock(%lock6_1, "Acquire", 1) - AIE.use_lock(%lock6_2, "Acquire", 0) + %core6_2 = aie.core(%tile6_2) { + aie.use_lock(%lock6_1, "Acquire", 1) + aie.use_lock(%lock6_2, "Acquire", 0) func.call @do_sieve(%buf6_1, %buf6_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_1, "Release", 0) - AIE.use_lock(%lock6_2, "Release", 1) - AIE.end + aie.use_lock(%lock6_1, "Release", 0) + aie.use_lock(%lock6_2, "Release", 1) + aie.end } - %core6_3 = AIE.core(%tile6_3) { - AIE.use_lock(%lock6_2, "Acquire", 1) - AIE.use_lock(%lock6_3, "Acquire", 0) + %core6_3 = aie.core(%tile6_3) { + aie.use_lock(%lock6_2, "Acquire", 1) + aie.use_lock(%lock6_3, "Acquire", 0) func.call @do_sieve(%buf6_2, %buf6_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_2, "Release", 0) - AIE.use_lock(%lock6_3, "Release", 1) - AIE.end + aie.use_lock(%lock6_2, "Release", 0) + aie.use_lock(%lock6_3, "Release", 1) + aie.end } - %core6_4 = AIE.core(%tile6_4) { - AIE.use_lock(%lock6_3, "Acquire", 1) - AIE.use_lock(%lock6_4, "Acquire", 0) + %core6_4 = aie.core(%tile6_4) { + aie.use_lock(%lock6_3, "Acquire", 1) + aie.use_lock(%lock6_4, "Acquire", 0) func.call @do_sieve(%buf6_3, %buf6_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_3, "Release", 0) - AIE.use_lock(%lock6_4, "Release", 1) - AIE.end + aie.use_lock(%lock6_3, "Release", 0) + aie.use_lock(%lock6_4, "Release", 1) + aie.end } - %core6_5 = AIE.core(%tile6_5) { - AIE.use_lock(%lock6_4, "Acquire", 1) - AIE.use_lock(%lock6_5, "Acquire", 0) + %core6_5 = aie.core(%tile6_5) { + aie.use_lock(%lock6_4, "Acquire", 1) + aie.use_lock(%lock6_5, "Acquire", 0) func.call @do_sieve(%buf6_4, %buf6_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_4, "Release", 0) - AIE.use_lock(%lock6_5, "Release", 1) - AIE.end + aie.use_lock(%lock6_4, "Release", 0) + aie.use_lock(%lock6_5, "Release", 1) + aie.end } - %core6_6 = AIE.core(%tile6_6) { - AIE.use_lock(%lock6_5, "Acquire", 1) - AIE.use_lock(%lock6_6, "Acquire", 0) + %core6_6 = aie.core(%tile6_6) { + aie.use_lock(%lock6_5, "Acquire", 1) + aie.use_lock(%lock6_6, "Acquire", 0) func.call @do_sieve(%buf6_5, %buf6_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_5, "Release", 0) - AIE.use_lock(%lock6_6, "Release", 1) - AIE.end + aie.use_lock(%lock6_5, "Release", 0) + aie.use_lock(%lock6_6, "Release", 1) + aie.end } - %core6_7 = AIE.core(%tile6_7) { - AIE.use_lock(%lock6_6, "Acquire", 1) - AIE.use_lock(%lock6_7, "Acquire", 0) + %core6_7 = aie.core(%tile6_7) { + aie.use_lock(%lock6_6, "Acquire", 1) + aie.use_lock(%lock6_7, "Acquire", 0) func.call @do_sieve(%buf6_6, %buf6_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_6, "Release", 0) - AIE.use_lock(%lock6_7, "Release", 1) - AIE.end + aie.use_lock(%lock6_6, "Release", 0) + aie.use_lock(%lock6_7, "Release", 1) + aie.end } - %core6_8 = AIE.core(%tile6_8) { - AIE.use_lock(%lock6_7, "Acquire", 1) - AIE.use_lock(%lock6_8, "Acquire", 0) + %core6_8 = aie.core(%tile6_8) { + aie.use_lock(%lock6_7, "Acquire", 1) + aie.use_lock(%lock6_8, "Acquire", 0) func.call @do_sieve(%buf6_7, %buf6_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_7, "Release", 0) - AIE.use_lock(%lock6_8, "Release", 1) - AIE.end + aie.use_lock(%lock6_7, "Release", 0) + aie.use_lock(%lock6_8, "Release", 1) + aie.end } - %core7_8 = AIE.core(%tile7_8) { - AIE.use_lock(%lock6_8, "Acquire", 1) - AIE.use_lock(%lock7_8, "Acquire", 0) + %core7_8 = aie.core(%tile7_8) { + aie.use_lock(%lock6_8, "Acquire", 1) + aie.use_lock(%lock7_8, "Acquire", 0) func.call @do_sieve(%buf6_8, %buf7_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock6_8, "Release", 0) - AIE.use_lock(%lock7_8, "Release", 1) - AIE.end + aie.use_lock(%lock6_8, "Release", 0) + aie.use_lock(%lock7_8, "Release", 1) + aie.end } - %core7_7 = AIE.core(%tile7_7) { - AIE.use_lock(%lock7_8, "Acquire", 1) - AIE.use_lock(%lock7_7, "Acquire", 0) + %core7_7 = aie.core(%tile7_7) { + aie.use_lock(%lock7_8, "Acquire", 1) + aie.use_lock(%lock7_7, "Acquire", 0) func.call @do_sieve(%buf7_8, %buf7_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_8, "Release", 0) - AIE.use_lock(%lock7_7, "Release", 1) - AIE.end + aie.use_lock(%lock7_8, "Release", 0) + aie.use_lock(%lock7_7, "Release", 1) + aie.end } - %core7_6 = AIE.core(%tile7_6) { - AIE.use_lock(%lock7_7, "Acquire", 1) - AIE.use_lock(%lock7_6, "Acquire", 0) + %core7_6 = aie.core(%tile7_6) { + aie.use_lock(%lock7_7, "Acquire", 1) + aie.use_lock(%lock7_6, "Acquire", 0) func.call @do_sieve(%buf7_7, %buf7_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_7, "Release", 0) - AIE.use_lock(%lock7_6, "Release", 1) - AIE.end + aie.use_lock(%lock7_7, "Release", 0) + aie.use_lock(%lock7_6, "Release", 1) + aie.end } - %core7_5 = AIE.core(%tile7_5) { - AIE.use_lock(%lock7_6, "Acquire", 1) - AIE.use_lock(%lock7_5, "Acquire", 0) + %core7_5 = aie.core(%tile7_5) { + aie.use_lock(%lock7_6, "Acquire", 1) + aie.use_lock(%lock7_5, "Acquire", 0) func.call @do_sieve(%buf7_6, %buf7_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_6, "Release", 0) - AIE.use_lock(%lock7_5, "Release", 1) - AIE.end + aie.use_lock(%lock7_6, "Release", 0) + aie.use_lock(%lock7_5, "Release", 1) + aie.end } - %core7_4 = AIE.core(%tile7_4) { - AIE.use_lock(%lock7_5, "Acquire", 1) - AIE.use_lock(%lock7_4, "Acquire", 0) + %core7_4 = aie.core(%tile7_4) { + aie.use_lock(%lock7_5, "Acquire", 1) + aie.use_lock(%lock7_4, "Acquire", 0) func.call @do_sieve(%buf7_5, %buf7_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_5, "Release", 0) - AIE.use_lock(%lock7_4, "Release", 1) - AIE.end + aie.use_lock(%lock7_5, "Release", 0) + aie.use_lock(%lock7_4, "Release", 1) + aie.end } - %core7_3 = AIE.core(%tile7_3) { - AIE.use_lock(%lock7_4, "Acquire", 1) - AIE.use_lock(%lock7_3, "Acquire", 0) + %core7_3 = aie.core(%tile7_3) { + aie.use_lock(%lock7_4, "Acquire", 1) + aie.use_lock(%lock7_3, "Acquire", 0) func.call @do_sieve(%buf7_4, %buf7_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_4, "Release", 0) - AIE.use_lock(%lock7_3, "Release", 1) - AIE.end + aie.use_lock(%lock7_4, "Release", 0) + aie.use_lock(%lock7_3, "Release", 1) + aie.end } - %core7_2 = AIE.core(%tile7_2) { - AIE.use_lock(%lock7_3, "Acquire", 1) - AIE.use_lock(%lock7_2, "Acquire", 0) + %core7_2 = aie.core(%tile7_2) { + aie.use_lock(%lock7_3, "Acquire", 1) + aie.use_lock(%lock7_2, "Acquire", 0) func.call @do_sieve(%buf7_3, %buf7_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_3, "Release", 0) - AIE.use_lock(%lock7_2, "Release", 1) - AIE.end + aie.use_lock(%lock7_3, "Release", 0) + aie.use_lock(%lock7_2, "Release", 1) + aie.end } - %core7_1 = AIE.core(%tile7_1) { - AIE.use_lock(%lock7_2, "Acquire", 1) - AIE.use_lock(%lock7_1, "Acquire", 0) + %core7_1 = aie.core(%tile7_1) { + aie.use_lock(%lock7_2, "Acquire", 1) + aie.use_lock(%lock7_1, "Acquire", 0) func.call @do_sieve(%buf7_2, %buf7_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_2, "Release", 0) - AIE.use_lock(%lock7_1, "Release", 1) - AIE.end + aie.use_lock(%lock7_2, "Release", 0) + aie.use_lock(%lock7_1, "Release", 1) + aie.end } - %core8_1 = AIE.core(%tile8_1) { - AIE.use_lock(%lock7_1, "Acquire", 1) - AIE.use_lock(%lock8_1, "Acquire", 0) + %core8_1 = aie.core(%tile8_1) { + aie.use_lock(%lock7_1, "Acquire", 1) + aie.use_lock(%lock8_1, "Acquire", 0) func.call @do_sieve(%buf7_1, %buf8_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock7_1, "Release", 0) - AIE.use_lock(%lock8_1, "Release", 1) - AIE.end + aie.use_lock(%lock7_1, "Release", 0) + aie.use_lock(%lock8_1, "Release", 1) + aie.end } - %core8_2 = AIE.core(%tile8_2) { - AIE.use_lock(%lock8_1, "Acquire", 1) - AIE.use_lock(%lock8_2, "Acquire", 0) + %core8_2 = aie.core(%tile8_2) { + aie.use_lock(%lock8_1, "Acquire", 1) + aie.use_lock(%lock8_2, "Acquire", 0) func.call @do_sieve(%buf8_1, %buf8_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_1, "Release", 0) - AIE.use_lock(%lock8_2, "Release", 1) - AIE.end + aie.use_lock(%lock8_1, "Release", 0) + aie.use_lock(%lock8_2, "Release", 1) + aie.end } - %core8_3 = AIE.core(%tile8_3) { - AIE.use_lock(%lock8_2, "Acquire", 1) - AIE.use_lock(%lock8_3, "Acquire", 0) + %core8_3 = aie.core(%tile8_3) { + aie.use_lock(%lock8_2, "Acquire", 1) + aie.use_lock(%lock8_3, "Acquire", 0) func.call @do_sieve(%buf8_2, %buf8_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_2, "Release", 0) - AIE.use_lock(%lock8_3, "Release", 1) - AIE.end + aie.use_lock(%lock8_2, "Release", 0) + aie.use_lock(%lock8_3, "Release", 1) + aie.end } - %core8_4 = AIE.core(%tile8_4) { - AIE.use_lock(%lock8_3, "Acquire", 1) - AIE.use_lock(%lock8_4, "Acquire", 0) + %core8_4 = aie.core(%tile8_4) { + aie.use_lock(%lock8_3, "Acquire", 1) + aie.use_lock(%lock8_4, "Acquire", 0) func.call @do_sieve(%buf8_3, %buf8_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_3, "Release", 0) - AIE.use_lock(%lock8_4, "Release", 1) - AIE.end + aie.use_lock(%lock8_3, "Release", 0) + aie.use_lock(%lock8_4, "Release", 1) + aie.end } - %core8_5 = AIE.core(%tile8_5) { - AIE.use_lock(%lock8_4, "Acquire", 1) - AIE.use_lock(%lock8_5, "Acquire", 0) + %core8_5 = aie.core(%tile8_5) { + aie.use_lock(%lock8_4, "Acquire", 1) + aie.use_lock(%lock8_5, "Acquire", 0) func.call @do_sieve(%buf8_4, %buf8_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_4, "Release", 0) - AIE.use_lock(%lock8_5, "Release", 1) - AIE.end + aie.use_lock(%lock8_4, "Release", 0) + aie.use_lock(%lock8_5, "Release", 1) + aie.end } - %core8_6 = AIE.core(%tile8_6) { - AIE.use_lock(%lock8_5, "Acquire", 1) - AIE.use_lock(%lock8_6, "Acquire", 0) + %core8_6 = aie.core(%tile8_6) { + aie.use_lock(%lock8_5, "Acquire", 1) + aie.use_lock(%lock8_6, "Acquire", 0) func.call @do_sieve(%buf8_5, %buf8_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_5, "Release", 0) - AIE.use_lock(%lock8_6, "Release", 1) - AIE.end + aie.use_lock(%lock8_5, "Release", 0) + aie.use_lock(%lock8_6, "Release", 1) + aie.end } - %core8_7 = AIE.core(%tile8_7) { - AIE.use_lock(%lock8_6, "Acquire", 1) - AIE.use_lock(%lock8_7, "Acquire", 0) + %core8_7 = aie.core(%tile8_7) { + aie.use_lock(%lock8_6, "Acquire", 1) + aie.use_lock(%lock8_7, "Acquire", 0) func.call @do_sieve(%buf8_6, %buf8_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_6, "Release", 0) - AIE.use_lock(%lock8_7, "Release", 1) - AIE.end + aie.use_lock(%lock8_6, "Release", 0) + aie.use_lock(%lock8_7, "Release", 1) + aie.end } - %core8_8 = AIE.core(%tile8_8) { - AIE.use_lock(%lock8_7, "Acquire", 1) - AIE.use_lock(%lock8_8, "Acquire", 0) + %core8_8 = aie.core(%tile8_8) { + aie.use_lock(%lock8_7, "Acquire", 1) + aie.use_lock(%lock8_8, "Acquire", 0) func.call @do_sieve(%buf8_7, %buf8_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_7, "Release", 0) - AIE.use_lock(%lock8_8, "Release", 1) - AIE.end + aie.use_lock(%lock8_7, "Release", 0) + aie.use_lock(%lock8_8, "Release", 1) + aie.end } - %core9_8 = AIE.core(%tile9_8) { - AIE.use_lock(%lock8_8, "Acquire", 1) - AIE.use_lock(%lock9_8, "Acquire", 0) + %core9_8 = aie.core(%tile9_8) { + aie.use_lock(%lock8_8, "Acquire", 1) + aie.use_lock(%lock9_8, "Acquire", 0) func.call @do_sieve(%buf8_8, %buf9_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock8_8, "Release", 0) - AIE.use_lock(%lock9_8, "Release", 1) - AIE.end + aie.use_lock(%lock8_8, "Release", 0) + aie.use_lock(%lock9_8, "Release", 1) + aie.end } - %core9_7 = AIE.core(%tile9_7) { - AIE.use_lock(%lock9_8, "Acquire", 1) - AIE.use_lock(%lock9_7, "Acquire", 0) + %core9_7 = aie.core(%tile9_7) { + aie.use_lock(%lock9_8, "Acquire", 1) + aie.use_lock(%lock9_7, "Acquire", 0) func.call @do_sieve(%buf9_8, %buf9_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_8, "Release", 0) - AIE.use_lock(%lock9_7, "Release", 1) - AIE.end + aie.use_lock(%lock9_8, "Release", 0) + aie.use_lock(%lock9_7, "Release", 1) + aie.end } - %core9_6 = AIE.core(%tile9_6) { - AIE.use_lock(%lock9_7, "Acquire", 1) - AIE.use_lock(%lock9_6, "Acquire", 0) + %core9_6 = aie.core(%tile9_6) { + aie.use_lock(%lock9_7, "Acquire", 1) + aie.use_lock(%lock9_6, "Acquire", 0) func.call @do_sieve(%buf9_7, %buf9_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_7, "Release", 0) - AIE.use_lock(%lock9_6, "Release", 1) - AIE.end + aie.use_lock(%lock9_7, "Release", 0) + aie.use_lock(%lock9_6, "Release", 1) + aie.end } - %core9_5 = AIE.core(%tile9_5) { - AIE.use_lock(%lock9_6, "Acquire", 1) - AIE.use_lock(%lock9_5, "Acquire", 0) + %core9_5 = aie.core(%tile9_5) { + aie.use_lock(%lock9_6, "Acquire", 1) + aie.use_lock(%lock9_5, "Acquire", 0) func.call @do_sieve(%buf9_6, %buf9_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_6, "Release", 0) - AIE.use_lock(%lock9_5, "Release", 1) - AIE.end + aie.use_lock(%lock9_6, "Release", 0) + aie.use_lock(%lock9_5, "Release", 1) + aie.end } - %core9_4 = AIE.core(%tile9_4) { - AIE.use_lock(%lock9_5, "Acquire", 1) - AIE.use_lock(%lock9_4, "Acquire", 0) + %core9_4 = aie.core(%tile9_4) { + aie.use_lock(%lock9_5, "Acquire", 1) + aie.use_lock(%lock9_4, "Acquire", 0) func.call @do_sieve(%buf9_5, %buf9_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_5, "Release", 0) - AIE.use_lock(%lock9_4, "Release", 1) - AIE.end + aie.use_lock(%lock9_5, "Release", 0) + aie.use_lock(%lock9_4, "Release", 1) + aie.end } - %core9_3 = AIE.core(%tile9_3) { - AIE.use_lock(%lock9_4, "Acquire", 1) - AIE.use_lock(%lock9_3, "Acquire", 0) + %core9_3 = aie.core(%tile9_3) { + aie.use_lock(%lock9_4, "Acquire", 1) + aie.use_lock(%lock9_3, "Acquire", 0) func.call @do_sieve(%buf9_4, %buf9_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_4, "Release", 0) - AIE.use_lock(%lock9_3, "Release", 1) - AIE.end + aie.use_lock(%lock9_4, "Release", 0) + aie.use_lock(%lock9_3, "Release", 1) + aie.end } - %core9_2 = AIE.core(%tile9_2) { - AIE.use_lock(%lock9_3, "Acquire", 1) - AIE.use_lock(%lock9_2, "Acquire", 0) + %core9_2 = aie.core(%tile9_2) { + aie.use_lock(%lock9_3, "Acquire", 1) + aie.use_lock(%lock9_2, "Acquire", 0) func.call @do_sieve(%buf9_3, %buf9_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_3, "Release", 0) - AIE.use_lock(%lock9_2, "Release", 1) - AIE.end + aie.use_lock(%lock9_3, "Release", 0) + aie.use_lock(%lock9_2, "Release", 1) + aie.end } - %core9_1 = AIE.core(%tile9_1) { - AIE.use_lock(%lock9_2, "Acquire", 1) - AIE.use_lock(%lock9_1, "Acquire", 0) + %core9_1 = aie.core(%tile9_1) { + aie.use_lock(%lock9_2, "Acquire", 1) + aie.use_lock(%lock9_1, "Acquire", 0) func.call @do_sieve(%buf9_2, %buf9_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_2, "Release", 0) - AIE.use_lock(%lock9_1, "Release", 1) - AIE.end + aie.use_lock(%lock9_2, "Release", 0) + aie.use_lock(%lock9_1, "Release", 1) + aie.end } - %core10_1 = AIE.core(%tile10_1) { - AIE.use_lock(%lock9_1, "Acquire", 1) - AIE.use_lock(%lock10_1, "Acquire", 0) + %core10_1 = aie.core(%tile10_1) { + aie.use_lock(%lock9_1, "Acquire", 1) + aie.use_lock(%lock10_1, "Acquire", 0) func.call @do_sieve(%buf9_1, %buf10_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock9_1, "Release", 0) - AIE.use_lock(%lock10_1, "Release", 1) - AIE.end + aie.use_lock(%lock9_1, "Release", 0) + aie.use_lock(%lock10_1, "Release", 1) + aie.end } - %core10_2 = AIE.core(%tile10_2) { - AIE.use_lock(%lock10_1, "Acquire", 1) - AIE.use_lock(%lock10_2, "Acquire", 0) + %core10_2 = aie.core(%tile10_2) { + aie.use_lock(%lock10_1, "Acquire", 1) + aie.use_lock(%lock10_2, "Acquire", 0) func.call @do_sieve(%buf10_1, %buf10_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_1, "Release", 0) - AIE.use_lock(%lock10_2, "Release", 1) - AIE.end + aie.use_lock(%lock10_1, "Release", 0) + aie.use_lock(%lock10_2, "Release", 1) + aie.end } - %core10_3 = AIE.core(%tile10_3) { - AIE.use_lock(%lock10_2, "Acquire", 1) - AIE.use_lock(%lock10_3, "Acquire", 0) + %core10_3 = aie.core(%tile10_3) { + aie.use_lock(%lock10_2, "Acquire", 1) + aie.use_lock(%lock10_3, "Acquire", 0) func.call @do_sieve(%buf10_2, %buf10_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_2, "Release", 0) - AIE.use_lock(%lock10_3, "Release", 1) - AIE.end + aie.use_lock(%lock10_2, "Release", 0) + aie.use_lock(%lock10_3, "Release", 1) + aie.end } - %core10_4 = AIE.core(%tile10_4) { - AIE.use_lock(%lock10_3, "Acquire", 1) - AIE.use_lock(%lock10_4, "Acquire", 0) + %core10_4 = aie.core(%tile10_4) { + aie.use_lock(%lock10_3, "Acquire", 1) + aie.use_lock(%lock10_4, "Acquire", 0) func.call @do_sieve(%buf10_3, %buf10_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_3, "Release", 0) - AIE.use_lock(%lock10_4, "Release", 1) - AIE.end + aie.use_lock(%lock10_3, "Release", 0) + aie.use_lock(%lock10_4, "Release", 1) + aie.end } - %core10_5 = AIE.core(%tile10_5) { - AIE.use_lock(%lock10_4, "Acquire", 1) - AIE.use_lock(%lock10_5, "Acquire", 0) + %core10_5 = aie.core(%tile10_5) { + aie.use_lock(%lock10_4, "Acquire", 1) + aie.use_lock(%lock10_5, "Acquire", 0) func.call @do_sieve(%buf10_4, %buf10_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_4, "Release", 0) - AIE.use_lock(%lock10_5, "Release", 1) - AIE.end + aie.use_lock(%lock10_4, "Release", 0) + aie.use_lock(%lock10_5, "Release", 1) + aie.end } - %core10_6 = AIE.core(%tile10_6) { - AIE.use_lock(%lock10_5, "Acquire", 1) - AIE.use_lock(%lock10_6, "Acquire", 0) + %core10_6 = aie.core(%tile10_6) { + aie.use_lock(%lock10_5, "Acquire", 1) + aie.use_lock(%lock10_6, "Acquire", 0) func.call @do_sieve(%buf10_5, %buf10_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_5, "Release", 0) - AIE.use_lock(%lock10_6, "Release", 1) - AIE.end + aie.use_lock(%lock10_5, "Release", 0) + aie.use_lock(%lock10_6, "Release", 1) + aie.end } - %core10_7 = AIE.core(%tile10_7) { - AIE.use_lock(%lock10_6, "Acquire", 1) - AIE.use_lock(%lock10_7, "Acquire", 0) + %core10_7 = aie.core(%tile10_7) { + aie.use_lock(%lock10_6, "Acquire", 1) + aie.use_lock(%lock10_7, "Acquire", 0) func.call @do_sieve(%buf10_6, %buf10_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_6, "Release", 0) - AIE.use_lock(%lock10_7, "Release", 1) - AIE.end + aie.use_lock(%lock10_6, "Release", 0) + aie.use_lock(%lock10_7, "Release", 1) + aie.end } - %core10_8 = AIE.core(%tile10_8) { - AIE.use_lock(%lock10_7, "Acquire", 1) - AIE.use_lock(%lock10_8, "Acquire", 0) + %core10_8 = aie.core(%tile10_8) { + aie.use_lock(%lock10_7, "Acquire", 1) + aie.use_lock(%lock10_8, "Acquire", 0) func.call @do_sieve(%buf10_7, %buf10_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_7, "Release", 0) - AIE.use_lock(%lock10_8, "Release", 1) - AIE.end + aie.use_lock(%lock10_7, "Release", 0) + aie.use_lock(%lock10_8, "Release", 1) + aie.end } - %core11_8 = AIE.core(%tile11_8) { - AIE.use_lock(%lock10_8, "Acquire", 1) - AIE.use_lock(%lock11_8, "Acquire", 0) + %core11_8 = aie.core(%tile11_8) { + aie.use_lock(%lock10_8, "Acquire", 1) + aie.use_lock(%lock11_8, "Acquire", 0) func.call @do_sieve(%buf10_8, %buf11_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock10_8, "Release", 0) - AIE.use_lock(%lock11_8, "Release", 1) - AIE.end + aie.use_lock(%lock10_8, "Release", 0) + aie.use_lock(%lock11_8, "Release", 1) + aie.end } - %core11_7 = AIE.core(%tile11_7) { - AIE.use_lock(%lock11_8, "Acquire", 1) - AIE.use_lock(%lock11_7, "Acquire", 0) + %core11_7 = aie.core(%tile11_7) { + aie.use_lock(%lock11_8, "Acquire", 1) + aie.use_lock(%lock11_7, "Acquire", 0) func.call @do_sieve(%buf11_8, %buf11_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_8, "Release", 0) - AIE.use_lock(%lock11_7, "Release", 1) - AIE.end + aie.use_lock(%lock11_8, "Release", 0) + aie.use_lock(%lock11_7, "Release", 1) + aie.end } - %core11_6 = AIE.core(%tile11_6) { - AIE.use_lock(%lock11_7, "Acquire", 1) - AIE.use_lock(%lock11_6, "Acquire", 0) + %core11_6 = aie.core(%tile11_6) { + aie.use_lock(%lock11_7, "Acquire", 1) + aie.use_lock(%lock11_6, "Acquire", 0) func.call @do_sieve(%buf11_7, %buf11_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_7, "Release", 0) - AIE.use_lock(%lock11_6, "Release", 1) - AIE.end + aie.use_lock(%lock11_7, "Release", 0) + aie.use_lock(%lock11_6, "Release", 1) + aie.end } - %core11_5 = AIE.core(%tile11_5) { - AIE.use_lock(%lock11_6, "Acquire", 1) - AIE.use_lock(%lock11_5, "Acquire", 0) + %core11_5 = aie.core(%tile11_5) { + aie.use_lock(%lock11_6, "Acquire", 1) + aie.use_lock(%lock11_5, "Acquire", 0) func.call @do_sieve(%buf11_6, %buf11_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_6, "Release", 0) - AIE.use_lock(%lock11_5, "Release", 1) - AIE.end + aie.use_lock(%lock11_6, "Release", 0) + aie.use_lock(%lock11_5, "Release", 1) + aie.end } - %core11_4 = AIE.core(%tile11_4) { - AIE.use_lock(%lock11_5, "Acquire", 1) - AIE.use_lock(%lock11_4, "Acquire", 0) + %core11_4 = aie.core(%tile11_4) { + aie.use_lock(%lock11_5, "Acquire", 1) + aie.use_lock(%lock11_4, "Acquire", 0) func.call @do_sieve(%buf11_5, %buf11_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_5, "Release", 0) - AIE.use_lock(%lock11_4, "Release", 1) - AIE.end + aie.use_lock(%lock11_5, "Release", 0) + aie.use_lock(%lock11_4, "Release", 1) + aie.end } - %core11_3 = AIE.core(%tile11_3) { - AIE.use_lock(%lock11_4, "Acquire", 1) - AIE.use_lock(%lock11_3, "Acquire", 0) + %core11_3 = aie.core(%tile11_3) { + aie.use_lock(%lock11_4, "Acquire", 1) + aie.use_lock(%lock11_3, "Acquire", 0) func.call @do_sieve(%buf11_4, %buf11_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_4, "Release", 0) - AIE.use_lock(%lock11_3, "Release", 1) - AIE.end + aie.use_lock(%lock11_4, "Release", 0) + aie.use_lock(%lock11_3, "Release", 1) + aie.end } - %core11_2 = AIE.core(%tile11_2) { - AIE.use_lock(%lock11_3, "Acquire", 1) - AIE.use_lock(%lock11_2, "Acquire", 0) + %core11_2 = aie.core(%tile11_2) { + aie.use_lock(%lock11_3, "Acquire", 1) + aie.use_lock(%lock11_2, "Acquire", 0) func.call @do_sieve(%buf11_3, %buf11_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_3, "Release", 0) - AIE.use_lock(%lock11_2, "Release", 1) - AIE.end + aie.use_lock(%lock11_3, "Release", 0) + aie.use_lock(%lock11_2, "Release", 1) + aie.end } - %core11_1 = AIE.core(%tile11_1) { - AIE.use_lock(%lock11_2, "Acquire", 1) - AIE.use_lock(%lock11_1, "Acquire", 0) + %core11_1 = aie.core(%tile11_1) { + aie.use_lock(%lock11_2, "Acquire", 1) + aie.use_lock(%lock11_1, "Acquire", 0) func.call @do_sieve(%buf11_2, %buf11_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_2, "Release", 0) - AIE.use_lock(%lock11_1, "Release", 1) - AIE.end + aie.use_lock(%lock11_2, "Release", 0) + aie.use_lock(%lock11_1, "Release", 1) + aie.end } - %core12_1 = AIE.core(%tile12_1) { - AIE.use_lock(%lock11_1, "Acquire", 1) - AIE.use_lock(%lock12_1, "Acquire", 0) + %core12_1 = aie.core(%tile12_1) { + aie.use_lock(%lock11_1, "Acquire", 1) + aie.use_lock(%lock12_1, "Acquire", 0) func.call @do_sieve(%buf11_1, %buf12_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock11_1, "Release", 0) - AIE.use_lock(%lock12_1, "Release", 1) - AIE.end + aie.use_lock(%lock11_1, "Release", 0) + aie.use_lock(%lock12_1, "Release", 1) + aie.end } - %core12_2 = AIE.core(%tile12_2) { - AIE.use_lock(%lock12_1, "Acquire", 1) - AIE.use_lock(%lock12_2, "Acquire", 0) + %core12_2 = aie.core(%tile12_2) { + aie.use_lock(%lock12_1, "Acquire", 1) + aie.use_lock(%lock12_2, "Acquire", 0) func.call @do_sieve(%buf12_1, %buf12_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_1, "Release", 0) - AIE.use_lock(%lock12_2, "Release", 1) - AIE.end + aie.use_lock(%lock12_1, "Release", 0) + aie.use_lock(%lock12_2, "Release", 1) + aie.end } - %core12_3 = AIE.core(%tile12_3) { - AIE.use_lock(%lock12_2, "Acquire", 1) - AIE.use_lock(%lock12_3, "Acquire", 0) + %core12_3 = aie.core(%tile12_3) { + aie.use_lock(%lock12_2, "Acquire", 1) + aie.use_lock(%lock12_3, "Acquire", 0) func.call @do_sieve(%buf12_2, %buf12_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_2, "Release", 0) - AIE.use_lock(%lock12_3, "Release", 1) - AIE.end + aie.use_lock(%lock12_2, "Release", 0) + aie.use_lock(%lock12_3, "Release", 1) + aie.end } - %core12_4 = AIE.core(%tile12_4) { - AIE.use_lock(%lock12_3, "Acquire", 1) - AIE.use_lock(%lock12_4, "Acquire", 0) + %core12_4 = aie.core(%tile12_4) { + aie.use_lock(%lock12_3, "Acquire", 1) + aie.use_lock(%lock12_4, "Acquire", 0) func.call @do_sieve(%buf12_3, %buf12_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_3, "Release", 0) - AIE.use_lock(%lock12_4, "Release", 1) - AIE.end + aie.use_lock(%lock12_3, "Release", 0) + aie.use_lock(%lock12_4, "Release", 1) + aie.end } - %core12_5 = AIE.core(%tile12_5) { - AIE.use_lock(%lock12_4, "Acquire", 1) - AIE.use_lock(%lock12_5, "Acquire", 0) + %core12_5 = aie.core(%tile12_5) { + aie.use_lock(%lock12_4, "Acquire", 1) + aie.use_lock(%lock12_5, "Acquire", 0) func.call @do_sieve(%buf12_4, %buf12_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_4, "Release", 0) - AIE.use_lock(%lock12_5, "Release", 1) - AIE.end + aie.use_lock(%lock12_4, "Release", 0) + aie.use_lock(%lock12_5, "Release", 1) + aie.end } - %core12_6 = AIE.core(%tile12_6) { - AIE.use_lock(%lock12_5, "Acquire", 1) - AIE.use_lock(%lock12_6, "Acquire", 0) + %core12_6 = aie.core(%tile12_6) { + aie.use_lock(%lock12_5, "Acquire", 1) + aie.use_lock(%lock12_6, "Acquire", 0) func.call @do_sieve(%buf12_5, %buf12_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_5, "Release", 0) - AIE.use_lock(%lock12_6, "Release", 1) - AIE.end + aie.use_lock(%lock12_5, "Release", 0) + aie.use_lock(%lock12_6, "Release", 1) + aie.end } - %core12_7 = AIE.core(%tile12_7) { - AIE.use_lock(%lock12_6, "Acquire", 1) - AIE.use_lock(%lock12_7, "Acquire", 0) + %core12_7 = aie.core(%tile12_7) { + aie.use_lock(%lock12_6, "Acquire", 1) + aie.use_lock(%lock12_7, "Acquire", 0) func.call @do_sieve(%buf12_6, %buf12_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_6, "Release", 0) - AIE.use_lock(%lock12_7, "Release", 1) - AIE.end + aie.use_lock(%lock12_6, "Release", 0) + aie.use_lock(%lock12_7, "Release", 1) + aie.end } - %core12_8 = AIE.core(%tile12_8) { - AIE.use_lock(%lock12_7, "Acquire", 1) - AIE.use_lock(%lock12_8, "Acquire", 0) + %core12_8 = aie.core(%tile12_8) { + aie.use_lock(%lock12_7, "Acquire", 1) + aie.use_lock(%lock12_8, "Acquire", 0) func.call @do_sieve(%buf12_7, %buf12_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_7, "Release", 0) - AIE.use_lock(%lock12_8, "Release", 1) - AIE.end + aie.use_lock(%lock12_7, "Release", 0) + aie.use_lock(%lock12_8, "Release", 1) + aie.end } - %core13_8 = AIE.core(%tile13_8) { - AIE.use_lock(%lock12_8, "Acquire", 1) - AIE.use_lock(%lock13_8, "Acquire", 0) + %core13_8 = aie.core(%tile13_8) { + aie.use_lock(%lock12_8, "Acquire", 1) + aie.use_lock(%lock13_8, "Acquire", 0) func.call @do_sieve(%buf12_8, %buf13_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock12_8, "Release", 0) - AIE.use_lock(%lock13_8, "Release", 1) - AIE.end + aie.use_lock(%lock12_8, "Release", 0) + aie.use_lock(%lock13_8, "Release", 1) + aie.end } - %core13_7 = AIE.core(%tile13_7) { - AIE.use_lock(%lock13_8, "Acquire", 1) - AIE.use_lock(%lock13_7, "Acquire", 0) + %core13_7 = aie.core(%tile13_7) { + aie.use_lock(%lock13_8, "Acquire", 1) + aie.use_lock(%lock13_7, "Acquire", 0) func.call @do_sieve(%buf13_8, %buf13_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_8, "Release", 0) - AIE.use_lock(%lock13_7, "Release", 1) - AIE.end + aie.use_lock(%lock13_8, "Release", 0) + aie.use_lock(%lock13_7, "Release", 1) + aie.end } - %core13_6 = AIE.core(%tile13_6) { - AIE.use_lock(%lock13_7, "Acquire", 1) - AIE.use_lock(%lock13_6, "Acquire", 0) + %core13_6 = aie.core(%tile13_6) { + aie.use_lock(%lock13_7, "Acquire", 1) + aie.use_lock(%lock13_6, "Acquire", 0) func.call @do_sieve(%buf13_7, %buf13_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_7, "Release", 0) - AIE.use_lock(%lock13_6, "Release", 1) - AIE.end + aie.use_lock(%lock13_7, "Release", 0) + aie.use_lock(%lock13_6, "Release", 1) + aie.end } - %core13_5 = AIE.core(%tile13_5) { - AIE.use_lock(%lock13_6, "Acquire", 1) - AIE.use_lock(%lock13_5, "Acquire", 0) + %core13_5 = aie.core(%tile13_5) { + aie.use_lock(%lock13_6, "Acquire", 1) + aie.use_lock(%lock13_5, "Acquire", 0) func.call @do_sieve(%buf13_6, %buf13_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_6, "Release", 0) - AIE.use_lock(%lock13_5, "Release", 1) - AIE.end + aie.use_lock(%lock13_6, "Release", 0) + aie.use_lock(%lock13_5, "Release", 1) + aie.end } - %core13_4 = AIE.core(%tile13_4) { - AIE.use_lock(%lock13_5, "Acquire", 1) - AIE.use_lock(%lock13_4, "Acquire", 0) + %core13_4 = aie.core(%tile13_4) { + aie.use_lock(%lock13_5, "Acquire", 1) + aie.use_lock(%lock13_4, "Acquire", 0) func.call @do_sieve(%buf13_5, %buf13_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_5, "Release", 0) - AIE.use_lock(%lock13_4, "Release", 1) - AIE.end + aie.use_lock(%lock13_5, "Release", 0) + aie.use_lock(%lock13_4, "Release", 1) + aie.end } - %core13_3 = AIE.core(%tile13_3) { - AIE.use_lock(%lock13_4, "Acquire", 1) - AIE.use_lock(%lock13_3, "Acquire", 0) + %core13_3 = aie.core(%tile13_3) { + aie.use_lock(%lock13_4, "Acquire", 1) + aie.use_lock(%lock13_3, "Acquire", 0) func.call @do_sieve(%buf13_4, %buf13_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_4, "Release", 0) - AIE.use_lock(%lock13_3, "Release", 1) - AIE.end + aie.use_lock(%lock13_4, "Release", 0) + aie.use_lock(%lock13_3, "Release", 1) + aie.end } - %core13_2 = AIE.core(%tile13_2) { - AIE.use_lock(%lock13_3, "Acquire", 1) - AIE.use_lock(%lock13_2, "Acquire", 0) + %core13_2 = aie.core(%tile13_2) { + aie.use_lock(%lock13_3, "Acquire", 1) + aie.use_lock(%lock13_2, "Acquire", 0) func.call @do_sieve(%buf13_3, %buf13_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_3, "Release", 0) - AIE.use_lock(%lock13_2, "Release", 1) - AIE.end + aie.use_lock(%lock13_3, "Release", 0) + aie.use_lock(%lock13_2, "Release", 1) + aie.end } - %core13_1 = AIE.core(%tile13_1) { - AIE.use_lock(%lock13_2, "Acquire", 1) - AIE.use_lock(%lock13_1, "Acquire", 0) + %core13_1 = aie.core(%tile13_1) { + aie.use_lock(%lock13_2, "Acquire", 1) + aie.use_lock(%lock13_1, "Acquire", 0) func.call @do_sieve(%buf13_2, %buf13_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_2, "Release", 0) - AIE.use_lock(%lock13_1, "Release", 1) - AIE.end + aie.use_lock(%lock13_2, "Release", 0) + aie.use_lock(%lock13_1, "Release", 1) + aie.end } - %core14_1 = AIE.core(%tile14_1) { - AIE.use_lock(%lock13_1, "Acquire", 1) - AIE.use_lock(%lock14_1, "Acquire", 0) + %core14_1 = aie.core(%tile14_1) { + aie.use_lock(%lock13_1, "Acquire", 1) + aie.use_lock(%lock14_1, "Acquire", 0) func.call @do_sieve(%buf13_1, %buf14_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock13_1, "Release", 0) - AIE.use_lock(%lock14_1, "Release", 1) - AIE.end + aie.use_lock(%lock13_1, "Release", 0) + aie.use_lock(%lock14_1, "Release", 1) + aie.end } - %core14_2 = AIE.core(%tile14_2) { - AIE.use_lock(%lock14_1, "Acquire", 1) - AIE.use_lock(%lock14_2, "Acquire", 0) + %core14_2 = aie.core(%tile14_2) { + aie.use_lock(%lock14_1, "Acquire", 1) + aie.use_lock(%lock14_2, "Acquire", 0) func.call @do_sieve(%buf14_1, %buf14_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_1, "Release", 0) - AIE.use_lock(%lock14_2, "Release", 1) - AIE.end + aie.use_lock(%lock14_1, "Release", 0) + aie.use_lock(%lock14_2, "Release", 1) + aie.end } - %core14_3 = AIE.core(%tile14_3) { - AIE.use_lock(%lock14_2, "Acquire", 1) - AIE.use_lock(%lock14_3, "Acquire", 0) + %core14_3 = aie.core(%tile14_3) { + aie.use_lock(%lock14_2, "Acquire", 1) + aie.use_lock(%lock14_3, "Acquire", 0) func.call @do_sieve(%buf14_2, %buf14_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_2, "Release", 0) - AIE.use_lock(%lock14_3, "Release", 1) - AIE.end + aie.use_lock(%lock14_2, "Release", 0) + aie.use_lock(%lock14_3, "Release", 1) + aie.end } - %core14_4 = AIE.core(%tile14_4) { - AIE.use_lock(%lock14_3, "Acquire", 1) - AIE.use_lock(%lock14_4, "Acquire", 0) + %core14_4 = aie.core(%tile14_4) { + aie.use_lock(%lock14_3, "Acquire", 1) + aie.use_lock(%lock14_4, "Acquire", 0) func.call @do_sieve(%buf14_3, %buf14_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_3, "Release", 0) - AIE.use_lock(%lock14_4, "Release", 1) - AIE.end + aie.use_lock(%lock14_3, "Release", 0) + aie.use_lock(%lock14_4, "Release", 1) + aie.end } - %core14_5 = AIE.core(%tile14_5) { - AIE.use_lock(%lock14_4, "Acquire", 1) - AIE.use_lock(%lock14_5, "Acquire", 0) + %core14_5 = aie.core(%tile14_5) { + aie.use_lock(%lock14_4, "Acquire", 1) + aie.use_lock(%lock14_5, "Acquire", 0) func.call @do_sieve(%buf14_4, %buf14_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_4, "Release", 0) - AIE.use_lock(%lock14_5, "Release", 1) - AIE.end + aie.use_lock(%lock14_4, "Release", 0) + aie.use_lock(%lock14_5, "Release", 1) + aie.end } - %core14_6 = AIE.core(%tile14_6) { - AIE.use_lock(%lock14_5, "Acquire", 1) - AIE.use_lock(%lock14_6, "Acquire", 0) + %core14_6 = aie.core(%tile14_6) { + aie.use_lock(%lock14_5, "Acquire", 1) + aie.use_lock(%lock14_6, "Acquire", 0) func.call @do_sieve(%buf14_5, %buf14_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_5, "Release", 0) - AIE.use_lock(%lock14_6, "Release", 1) - AIE.end + aie.use_lock(%lock14_5, "Release", 0) + aie.use_lock(%lock14_6, "Release", 1) + aie.end } - %core14_7 = AIE.core(%tile14_7) { - AIE.use_lock(%lock14_6, "Acquire", 1) - AIE.use_lock(%lock14_7, "Acquire", 0) + %core14_7 = aie.core(%tile14_7) { + aie.use_lock(%lock14_6, "Acquire", 1) + aie.use_lock(%lock14_7, "Acquire", 0) func.call @do_sieve(%buf14_6, %buf14_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_6, "Release", 0) - AIE.use_lock(%lock14_7, "Release", 1) - AIE.end + aie.use_lock(%lock14_6, "Release", 0) + aie.use_lock(%lock14_7, "Release", 1) + aie.end } - %core14_8 = AIE.core(%tile14_8) { - AIE.use_lock(%lock14_7, "Acquire", 1) - AIE.use_lock(%lock14_8, "Acquire", 0) + %core14_8 = aie.core(%tile14_8) { + aie.use_lock(%lock14_7, "Acquire", 1) + aie.use_lock(%lock14_8, "Acquire", 0) func.call @do_sieve(%buf14_7, %buf14_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_7, "Release", 0) - AIE.use_lock(%lock14_8, "Release", 1) - AIE.end + aie.use_lock(%lock14_7, "Release", 0) + aie.use_lock(%lock14_8, "Release", 1) + aie.end } - %core15_8 = AIE.core(%tile15_8) { - AIE.use_lock(%lock14_8, "Acquire", 1) - AIE.use_lock(%lock15_8, "Acquire", 0) + %core15_8 = aie.core(%tile15_8) { + aie.use_lock(%lock14_8, "Acquire", 1) + aie.use_lock(%lock15_8, "Acquire", 0) func.call @do_sieve(%buf14_8, %buf15_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock14_8, "Release", 0) - AIE.use_lock(%lock15_8, "Release", 1) - AIE.end + aie.use_lock(%lock14_8, "Release", 0) + aie.use_lock(%lock15_8, "Release", 1) + aie.end } - %core15_7 = AIE.core(%tile15_7) { - AIE.use_lock(%lock15_8, "Acquire", 1) - AIE.use_lock(%lock15_7, "Acquire", 0) + %core15_7 = aie.core(%tile15_7) { + aie.use_lock(%lock15_8, "Acquire", 1) + aie.use_lock(%lock15_7, "Acquire", 0) func.call @do_sieve(%buf15_8, %buf15_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_8, "Release", 0) - AIE.use_lock(%lock15_7, "Release", 1) - AIE.end + aie.use_lock(%lock15_8, "Release", 0) + aie.use_lock(%lock15_7, "Release", 1) + aie.end } - %core15_6 = AIE.core(%tile15_6) { - AIE.use_lock(%lock15_7, "Acquire", 1) - AIE.use_lock(%lock15_6, "Acquire", 0) + %core15_6 = aie.core(%tile15_6) { + aie.use_lock(%lock15_7, "Acquire", 1) + aie.use_lock(%lock15_6, "Acquire", 0) func.call @do_sieve(%buf15_7, %buf15_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_7, "Release", 0) - AIE.use_lock(%lock15_6, "Release", 1) - AIE.end + aie.use_lock(%lock15_7, "Release", 0) + aie.use_lock(%lock15_6, "Release", 1) + aie.end } - %core15_5 = AIE.core(%tile15_5) { - AIE.use_lock(%lock15_6, "Acquire", 1) - AIE.use_lock(%lock15_5, "Acquire", 0) + %core15_5 = aie.core(%tile15_5) { + aie.use_lock(%lock15_6, "Acquire", 1) + aie.use_lock(%lock15_5, "Acquire", 0) func.call @do_sieve(%buf15_6, %buf15_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_6, "Release", 0) - AIE.use_lock(%lock15_5, "Release", 1) - AIE.end + aie.use_lock(%lock15_6, "Release", 0) + aie.use_lock(%lock15_5, "Release", 1) + aie.end } - %core15_4 = AIE.core(%tile15_4) { - AIE.use_lock(%lock15_5, "Acquire", 1) - AIE.use_lock(%lock15_4, "Acquire", 0) + %core15_4 = aie.core(%tile15_4) { + aie.use_lock(%lock15_5, "Acquire", 1) + aie.use_lock(%lock15_4, "Acquire", 0) func.call @do_sieve(%buf15_5, %buf15_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_5, "Release", 0) - AIE.use_lock(%lock15_4, "Release", 1) - AIE.end + aie.use_lock(%lock15_5, "Release", 0) + aie.use_lock(%lock15_4, "Release", 1) + aie.end } - %core15_3 = AIE.core(%tile15_3) { - AIE.use_lock(%lock15_4, "Acquire", 1) - AIE.use_lock(%lock15_3, "Acquire", 0) + %core15_3 = aie.core(%tile15_3) { + aie.use_lock(%lock15_4, "Acquire", 1) + aie.use_lock(%lock15_3, "Acquire", 0) func.call @do_sieve(%buf15_4, %buf15_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_4, "Release", 0) - AIE.use_lock(%lock15_3, "Release", 1) - AIE.end + aie.use_lock(%lock15_4, "Release", 0) + aie.use_lock(%lock15_3, "Release", 1) + aie.end } - %core15_2 = AIE.core(%tile15_2) { - AIE.use_lock(%lock15_3, "Acquire", 1) - AIE.use_lock(%lock15_2, "Acquire", 0) + %core15_2 = aie.core(%tile15_2) { + aie.use_lock(%lock15_3, "Acquire", 1) + aie.use_lock(%lock15_2, "Acquire", 0) func.call @do_sieve(%buf15_3, %buf15_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_3, "Release", 0) - AIE.use_lock(%lock15_2, "Release", 1) - AIE.end + aie.use_lock(%lock15_3, "Release", 0) + aie.use_lock(%lock15_2, "Release", 1) + aie.end } - %core15_1 = AIE.core(%tile15_1) { - AIE.use_lock(%lock15_2, "Acquire", 1) - AIE.use_lock(%lock15_1, "Acquire", 0) + %core15_1 = aie.core(%tile15_1) { + aie.use_lock(%lock15_2, "Acquire", 1) + aie.use_lock(%lock15_1, "Acquire", 0) func.call @do_sieve(%buf15_2, %buf15_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_2, "Release", 0) - AIE.use_lock(%lock15_1, "Release", 1) - AIE.end + aie.use_lock(%lock15_2, "Release", 0) + aie.use_lock(%lock15_1, "Release", 1) + aie.end } - %core16_1 = AIE.core(%tile16_1) { - AIE.use_lock(%lock15_1, "Acquire", 1) - AIE.use_lock(%lock16_1, "Acquire", 0) + %core16_1 = aie.core(%tile16_1) { + aie.use_lock(%lock15_1, "Acquire", 1) + aie.use_lock(%lock16_1, "Acquire", 0) func.call @do_sieve(%buf15_1, %buf16_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock15_1, "Release", 0) - AIE.use_lock(%lock16_1, "Release", 1) - AIE.end + aie.use_lock(%lock15_1, "Release", 0) + aie.use_lock(%lock16_1, "Release", 1) + aie.end } - %core16_2 = AIE.core(%tile16_2) { - AIE.use_lock(%lock16_1, "Acquire", 1) - AIE.use_lock(%lock16_2, "Acquire", 0) + %core16_2 = aie.core(%tile16_2) { + aie.use_lock(%lock16_1, "Acquire", 1) + aie.use_lock(%lock16_2, "Acquire", 0) func.call @do_sieve(%buf16_1, %buf16_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_1, "Release", 0) - AIE.use_lock(%lock16_2, "Release", 1) - AIE.end + aie.use_lock(%lock16_1, "Release", 0) + aie.use_lock(%lock16_2, "Release", 1) + aie.end } - %core16_3 = AIE.core(%tile16_3) { - AIE.use_lock(%lock16_2, "Acquire", 1) - AIE.use_lock(%lock16_3, "Acquire", 0) + %core16_3 = aie.core(%tile16_3) { + aie.use_lock(%lock16_2, "Acquire", 1) + aie.use_lock(%lock16_3, "Acquire", 0) func.call @do_sieve(%buf16_2, %buf16_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_2, "Release", 0) - AIE.use_lock(%lock16_3, "Release", 1) - AIE.end + aie.use_lock(%lock16_2, "Release", 0) + aie.use_lock(%lock16_3, "Release", 1) + aie.end } - %core16_4 = AIE.core(%tile16_4) { - AIE.use_lock(%lock16_3, "Acquire", 1) - AIE.use_lock(%lock16_4, "Acquire", 0) + %core16_4 = aie.core(%tile16_4) { + aie.use_lock(%lock16_3, "Acquire", 1) + aie.use_lock(%lock16_4, "Acquire", 0) func.call @do_sieve(%buf16_3, %buf16_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_3, "Release", 0) - AIE.use_lock(%lock16_4, "Release", 1) - AIE.end + aie.use_lock(%lock16_3, "Release", 0) + aie.use_lock(%lock16_4, "Release", 1) + aie.end } - %core16_5 = AIE.core(%tile16_5) { - AIE.use_lock(%lock16_4, "Acquire", 1) - AIE.use_lock(%lock16_5, "Acquire", 0) + %core16_5 = aie.core(%tile16_5) { + aie.use_lock(%lock16_4, "Acquire", 1) + aie.use_lock(%lock16_5, "Acquire", 0) func.call @do_sieve(%buf16_4, %buf16_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_4, "Release", 0) - AIE.use_lock(%lock16_5, "Release", 1) - AIE.end + aie.use_lock(%lock16_4, "Release", 0) + aie.use_lock(%lock16_5, "Release", 1) + aie.end } - %core16_6 = AIE.core(%tile16_6) { - AIE.use_lock(%lock16_5, "Acquire", 1) - AIE.use_lock(%lock16_6, "Acquire", 0) + %core16_6 = aie.core(%tile16_6) { + aie.use_lock(%lock16_5, "Acquire", 1) + aie.use_lock(%lock16_6, "Acquire", 0) func.call @do_sieve(%buf16_5, %buf16_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_5, "Release", 0) - AIE.use_lock(%lock16_6, "Release", 1) - AIE.end + aie.use_lock(%lock16_5, "Release", 0) + aie.use_lock(%lock16_6, "Release", 1) + aie.end } - %core16_7 = AIE.core(%tile16_7) { - AIE.use_lock(%lock16_6, "Acquire", 1) - AIE.use_lock(%lock16_7, "Acquire", 0) + %core16_7 = aie.core(%tile16_7) { + aie.use_lock(%lock16_6, "Acquire", 1) + aie.use_lock(%lock16_7, "Acquire", 0) func.call @do_sieve(%buf16_6, %buf16_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_6, "Release", 0) - AIE.use_lock(%lock16_7, "Release", 1) - AIE.end + aie.use_lock(%lock16_6, "Release", 0) + aie.use_lock(%lock16_7, "Release", 1) + aie.end } - %core16_8 = AIE.core(%tile16_8) { - AIE.use_lock(%lock16_7, "Acquire", 1) - AIE.use_lock(%lock16_8, "Acquire", 0) + %core16_8 = aie.core(%tile16_8) { + aie.use_lock(%lock16_7, "Acquire", 1) + aie.use_lock(%lock16_8, "Acquire", 0) func.call @do_sieve(%buf16_7, %buf16_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_7, "Release", 0) - AIE.use_lock(%lock16_8, "Release", 1) - AIE.end + aie.use_lock(%lock16_7, "Release", 0) + aie.use_lock(%lock16_8, "Release", 1) + aie.end } - %core17_8 = AIE.core(%tile17_8) { - AIE.use_lock(%lock16_8, "Acquire", 1) - AIE.use_lock(%lock17_8, "Acquire", 0) + %core17_8 = aie.core(%tile17_8) { + aie.use_lock(%lock16_8, "Acquire", 1) + aie.use_lock(%lock17_8, "Acquire", 0) func.call @do_sieve(%buf16_8, %buf17_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock16_8, "Release", 0) - AIE.use_lock(%lock17_8, "Release", 1) - AIE.end + aie.use_lock(%lock16_8, "Release", 0) + aie.use_lock(%lock17_8, "Release", 1) + aie.end } - %core17_7 = AIE.core(%tile17_7) { - AIE.use_lock(%lock17_8, "Acquire", 1) - AIE.use_lock(%lock17_7, "Acquire", 0) + %core17_7 = aie.core(%tile17_7) { + aie.use_lock(%lock17_8, "Acquire", 1) + aie.use_lock(%lock17_7, "Acquire", 0) func.call @do_sieve(%buf17_8, %buf17_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_8, "Release", 0) - AIE.use_lock(%lock17_7, "Release", 1) - AIE.end + aie.use_lock(%lock17_8, "Release", 0) + aie.use_lock(%lock17_7, "Release", 1) + aie.end } - %core17_6 = AIE.core(%tile17_6) { - AIE.use_lock(%lock17_7, "Acquire", 1) - AIE.use_lock(%lock17_6, "Acquire", 0) + %core17_6 = aie.core(%tile17_6) { + aie.use_lock(%lock17_7, "Acquire", 1) + aie.use_lock(%lock17_6, "Acquire", 0) func.call @do_sieve(%buf17_7, %buf17_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_7, "Release", 0) - AIE.use_lock(%lock17_6, "Release", 1) - AIE.end + aie.use_lock(%lock17_7, "Release", 0) + aie.use_lock(%lock17_6, "Release", 1) + aie.end } - %core17_5 = AIE.core(%tile17_5) { - AIE.use_lock(%lock17_6, "Acquire", 1) - AIE.use_lock(%lock17_5, "Acquire", 0) + %core17_5 = aie.core(%tile17_5) { + aie.use_lock(%lock17_6, "Acquire", 1) + aie.use_lock(%lock17_5, "Acquire", 0) func.call @do_sieve(%buf17_6, %buf17_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_6, "Release", 0) - AIE.use_lock(%lock17_5, "Release", 1) - AIE.end + aie.use_lock(%lock17_6, "Release", 0) + aie.use_lock(%lock17_5, "Release", 1) + aie.end } - %core17_4 = AIE.core(%tile17_4) { - AIE.use_lock(%lock17_5, "Acquire", 1) - AIE.use_lock(%lock17_4, "Acquire", 0) + %core17_4 = aie.core(%tile17_4) { + aie.use_lock(%lock17_5, "Acquire", 1) + aie.use_lock(%lock17_4, "Acquire", 0) func.call @do_sieve(%buf17_5, %buf17_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_5, "Release", 0) - AIE.use_lock(%lock17_4, "Release", 1) - AIE.end + aie.use_lock(%lock17_5, "Release", 0) + aie.use_lock(%lock17_4, "Release", 1) + aie.end } - %core17_3 = AIE.core(%tile17_3) { - AIE.use_lock(%lock17_4, "Acquire", 1) - AIE.use_lock(%lock17_3, "Acquire", 0) + %core17_3 = aie.core(%tile17_3) { + aie.use_lock(%lock17_4, "Acquire", 1) + aie.use_lock(%lock17_3, "Acquire", 0) func.call @do_sieve(%buf17_4, %buf17_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_4, "Release", 0) - AIE.use_lock(%lock17_3, "Release", 1) - AIE.end + aie.use_lock(%lock17_4, "Release", 0) + aie.use_lock(%lock17_3, "Release", 1) + aie.end } - %core17_2 = AIE.core(%tile17_2) { - AIE.use_lock(%lock17_3, "Acquire", 1) - AIE.use_lock(%lock17_2, "Acquire", 0) + %core17_2 = aie.core(%tile17_2) { + aie.use_lock(%lock17_3, "Acquire", 1) + aie.use_lock(%lock17_2, "Acquire", 0) func.call @do_sieve(%buf17_3, %buf17_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_3, "Release", 0) - AIE.use_lock(%lock17_2, "Release", 1) - AIE.end + aie.use_lock(%lock17_3, "Release", 0) + aie.use_lock(%lock17_2, "Release", 1) + aie.end } - %core17_1 = AIE.core(%tile17_1) { - AIE.use_lock(%lock17_2, "Acquire", 1) - AIE.use_lock(%lock17_1, "Acquire", 0) + %core17_1 = aie.core(%tile17_1) { + aie.use_lock(%lock17_2, "Acquire", 1) + aie.use_lock(%lock17_1, "Acquire", 0) func.call @do_sieve(%buf17_2, %buf17_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_2, "Release", 0) - AIE.use_lock(%lock17_1, "Release", 1) - AIE.end + aie.use_lock(%lock17_2, "Release", 0) + aie.use_lock(%lock17_1, "Release", 1) + aie.end } - %core18_1 = AIE.core(%tile18_1) { - AIE.use_lock(%lock17_1, "Acquire", 1) - AIE.use_lock(%lock18_1, "Acquire", 0) + %core18_1 = aie.core(%tile18_1) { + aie.use_lock(%lock17_1, "Acquire", 1) + aie.use_lock(%lock18_1, "Acquire", 0) func.call @do_sieve(%buf17_1, %buf18_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock17_1, "Release", 0) - AIE.use_lock(%lock18_1, "Release", 1) - AIE.end + aie.use_lock(%lock17_1, "Release", 0) + aie.use_lock(%lock18_1, "Release", 1) + aie.end } - %core18_2 = AIE.core(%tile18_2) { - AIE.use_lock(%lock18_1, "Acquire", 1) - AIE.use_lock(%lock18_2, "Acquire", 0) + %core18_2 = aie.core(%tile18_2) { + aie.use_lock(%lock18_1, "Acquire", 1) + aie.use_lock(%lock18_2, "Acquire", 0) func.call @do_sieve(%buf18_1, %buf18_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_1, "Release", 0) - AIE.use_lock(%lock18_2, "Release", 1) - AIE.end + aie.use_lock(%lock18_1, "Release", 0) + aie.use_lock(%lock18_2, "Release", 1) + aie.end } - %core18_3 = AIE.core(%tile18_3) { - AIE.use_lock(%lock18_2, "Acquire", 1) - AIE.use_lock(%lock18_3, "Acquire", 0) + %core18_3 = aie.core(%tile18_3) { + aie.use_lock(%lock18_2, "Acquire", 1) + aie.use_lock(%lock18_3, "Acquire", 0) func.call @do_sieve(%buf18_2, %buf18_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_2, "Release", 0) - AIE.use_lock(%lock18_3, "Release", 1) - AIE.end + aie.use_lock(%lock18_2, "Release", 0) + aie.use_lock(%lock18_3, "Release", 1) + aie.end } - %core18_4 = AIE.core(%tile18_4) { - AIE.use_lock(%lock18_3, "Acquire", 1) - AIE.use_lock(%lock18_4, "Acquire", 0) + %core18_4 = aie.core(%tile18_4) { + aie.use_lock(%lock18_3, "Acquire", 1) + aie.use_lock(%lock18_4, "Acquire", 0) func.call @do_sieve(%buf18_3, %buf18_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_3, "Release", 0) - AIE.use_lock(%lock18_4, "Release", 1) - AIE.end + aie.use_lock(%lock18_3, "Release", 0) + aie.use_lock(%lock18_4, "Release", 1) + aie.end } - %core18_5 = AIE.core(%tile18_5) { - AIE.use_lock(%lock18_4, "Acquire", 1) - AIE.use_lock(%lock18_5, "Acquire", 0) + %core18_5 = aie.core(%tile18_5) { + aie.use_lock(%lock18_4, "Acquire", 1) + aie.use_lock(%lock18_5, "Acquire", 0) func.call @do_sieve(%buf18_4, %buf18_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_4, "Release", 0) - AIE.use_lock(%lock18_5, "Release", 1) - AIE.end + aie.use_lock(%lock18_4, "Release", 0) + aie.use_lock(%lock18_5, "Release", 1) + aie.end } - %core18_6 = AIE.core(%tile18_6) { - AIE.use_lock(%lock18_5, "Acquire", 1) - AIE.use_lock(%lock18_6, "Acquire", 0) + %core18_6 = aie.core(%tile18_6) { + aie.use_lock(%lock18_5, "Acquire", 1) + aie.use_lock(%lock18_6, "Acquire", 0) func.call @do_sieve(%buf18_5, %buf18_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_5, "Release", 0) - AIE.use_lock(%lock18_6, "Release", 1) - AIE.end + aie.use_lock(%lock18_5, "Release", 0) + aie.use_lock(%lock18_6, "Release", 1) + aie.end } - %core18_7 = AIE.core(%tile18_7) { - AIE.use_lock(%lock18_6, "Acquire", 1) - AIE.use_lock(%lock18_7, "Acquire", 0) + %core18_7 = aie.core(%tile18_7) { + aie.use_lock(%lock18_6, "Acquire", 1) + aie.use_lock(%lock18_7, "Acquire", 0) func.call @do_sieve(%buf18_6, %buf18_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_6, "Release", 0) - AIE.use_lock(%lock18_7, "Release", 1) - AIE.end + aie.use_lock(%lock18_6, "Release", 0) + aie.use_lock(%lock18_7, "Release", 1) + aie.end } - %core18_8 = AIE.core(%tile18_8) { - AIE.use_lock(%lock18_7, "Acquire", 1) - AIE.use_lock(%lock18_8, "Acquire", 0) + %core18_8 = aie.core(%tile18_8) { + aie.use_lock(%lock18_7, "Acquire", 1) + aie.use_lock(%lock18_8, "Acquire", 0) func.call @do_sieve(%buf18_7, %buf18_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_7, "Release", 0) - AIE.use_lock(%lock18_8, "Release", 1) - AIE.end + aie.use_lock(%lock18_7, "Release", 0) + aie.use_lock(%lock18_8, "Release", 1) + aie.end } - %core19_8 = AIE.core(%tile19_8) { - AIE.use_lock(%lock18_8, "Acquire", 1) - AIE.use_lock(%lock19_8, "Acquire", 0) + %core19_8 = aie.core(%tile19_8) { + aie.use_lock(%lock18_8, "Acquire", 1) + aie.use_lock(%lock19_8, "Acquire", 0) func.call @do_sieve(%buf18_8, %buf19_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock18_8, "Release", 0) - AIE.use_lock(%lock19_8, "Release", 1) - AIE.end + aie.use_lock(%lock18_8, "Release", 0) + aie.use_lock(%lock19_8, "Release", 1) + aie.end } - %core19_7 = AIE.core(%tile19_7) { - AIE.use_lock(%lock19_8, "Acquire", 1) - AIE.use_lock(%lock19_7, "Acquire", 0) + %core19_7 = aie.core(%tile19_7) { + aie.use_lock(%lock19_8, "Acquire", 1) + aie.use_lock(%lock19_7, "Acquire", 0) func.call @do_sieve(%buf19_8, %buf19_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_8, "Release", 0) - AIE.use_lock(%lock19_7, "Release", 1) - AIE.end + aie.use_lock(%lock19_8, "Release", 0) + aie.use_lock(%lock19_7, "Release", 1) + aie.end } - %core19_6 = AIE.core(%tile19_6) { - AIE.use_lock(%lock19_7, "Acquire", 1) - AIE.use_lock(%lock19_6, "Acquire", 0) + %core19_6 = aie.core(%tile19_6) { + aie.use_lock(%lock19_7, "Acquire", 1) + aie.use_lock(%lock19_6, "Acquire", 0) func.call @do_sieve(%buf19_7, %buf19_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_7, "Release", 0) - AIE.use_lock(%lock19_6, "Release", 1) - AIE.end + aie.use_lock(%lock19_7, "Release", 0) + aie.use_lock(%lock19_6, "Release", 1) + aie.end } - %core19_5 = AIE.core(%tile19_5) { - AIE.use_lock(%lock19_6, "Acquire", 1) - AIE.use_lock(%lock19_5, "Acquire", 0) + %core19_5 = aie.core(%tile19_5) { + aie.use_lock(%lock19_6, "Acquire", 1) + aie.use_lock(%lock19_5, "Acquire", 0) func.call @do_sieve(%buf19_6, %buf19_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_6, "Release", 0) - AIE.use_lock(%lock19_5, "Release", 1) - AIE.end + aie.use_lock(%lock19_6, "Release", 0) + aie.use_lock(%lock19_5, "Release", 1) + aie.end } - %core19_4 = AIE.core(%tile19_4) { - AIE.use_lock(%lock19_5, "Acquire", 1) - AIE.use_lock(%lock19_4, "Acquire", 0) + %core19_4 = aie.core(%tile19_4) { + aie.use_lock(%lock19_5, "Acquire", 1) + aie.use_lock(%lock19_4, "Acquire", 0) func.call @do_sieve(%buf19_5, %buf19_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_5, "Release", 0) - AIE.use_lock(%lock19_4, "Release", 1) - AIE.end + aie.use_lock(%lock19_5, "Release", 0) + aie.use_lock(%lock19_4, "Release", 1) + aie.end } - %core19_3 = AIE.core(%tile19_3) { - AIE.use_lock(%lock19_4, "Acquire", 1) - AIE.use_lock(%lock19_3, "Acquire", 0) + %core19_3 = aie.core(%tile19_3) { + aie.use_lock(%lock19_4, "Acquire", 1) + aie.use_lock(%lock19_3, "Acquire", 0) func.call @do_sieve(%buf19_4, %buf19_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_4, "Release", 0) - AIE.use_lock(%lock19_3, "Release", 1) - AIE.end + aie.use_lock(%lock19_4, "Release", 0) + aie.use_lock(%lock19_3, "Release", 1) + aie.end } - %core19_2 = AIE.core(%tile19_2) { - AIE.use_lock(%lock19_3, "Acquire", 1) - AIE.use_lock(%lock19_2, "Acquire", 0) + %core19_2 = aie.core(%tile19_2) { + aie.use_lock(%lock19_3, "Acquire", 1) + aie.use_lock(%lock19_2, "Acquire", 0) func.call @do_sieve(%buf19_3, %buf19_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_3, "Release", 0) - AIE.use_lock(%lock19_2, "Release", 1) - AIE.end + aie.use_lock(%lock19_3, "Release", 0) + aie.use_lock(%lock19_2, "Release", 1) + aie.end } - %core19_1 = AIE.core(%tile19_1) { - AIE.use_lock(%lock19_2, "Acquire", 1) - AIE.use_lock(%lock19_1, "Acquire", 0) + %core19_1 = aie.core(%tile19_1) { + aie.use_lock(%lock19_2, "Acquire", 1) + aie.use_lock(%lock19_1, "Acquire", 0) func.call @do_sieve(%buf19_2, %buf19_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_2, "Release", 0) - AIE.use_lock(%lock19_1, "Release", 1) - AIE.end + aie.use_lock(%lock19_2, "Release", 0) + aie.use_lock(%lock19_1, "Release", 1) + aie.end } - %core20_1 = AIE.core(%tile20_1) { - AIE.use_lock(%lock19_1, "Acquire", 1) - AIE.use_lock(%lock20_1, "Acquire", 0) + %core20_1 = aie.core(%tile20_1) { + aie.use_lock(%lock19_1, "Acquire", 1) + aie.use_lock(%lock20_1, "Acquire", 0) func.call @do_sieve(%buf19_1, %buf20_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock19_1, "Release", 0) - AIE.use_lock(%lock20_1, "Release", 1) - AIE.end + aie.use_lock(%lock19_1, "Release", 0) + aie.use_lock(%lock20_1, "Release", 1) + aie.end } - %core20_2 = AIE.core(%tile20_2) { - AIE.use_lock(%lock20_1, "Acquire", 1) - AIE.use_lock(%lock20_2, "Acquire", 0) + %core20_2 = aie.core(%tile20_2) { + aie.use_lock(%lock20_1, "Acquire", 1) + aie.use_lock(%lock20_2, "Acquire", 0) func.call @do_sieve(%buf20_1, %buf20_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_1, "Release", 0) - AIE.use_lock(%lock20_2, "Release", 1) - AIE.end + aie.use_lock(%lock20_1, "Release", 0) + aie.use_lock(%lock20_2, "Release", 1) + aie.end } - %core20_3 = AIE.core(%tile20_3) { - AIE.use_lock(%lock20_2, "Acquire", 1) - AIE.use_lock(%lock20_3, "Acquire", 0) + %core20_3 = aie.core(%tile20_3) { + aie.use_lock(%lock20_2, "Acquire", 1) + aie.use_lock(%lock20_3, "Acquire", 0) func.call @do_sieve(%buf20_2, %buf20_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_2, "Release", 0) - AIE.use_lock(%lock20_3, "Release", 1) - AIE.end + aie.use_lock(%lock20_2, "Release", 0) + aie.use_lock(%lock20_3, "Release", 1) + aie.end } - %core20_4 = AIE.core(%tile20_4) { - AIE.use_lock(%lock20_3, "Acquire", 1) - AIE.use_lock(%lock20_4, "Acquire", 0) + %core20_4 = aie.core(%tile20_4) { + aie.use_lock(%lock20_3, "Acquire", 1) + aie.use_lock(%lock20_4, "Acquire", 0) func.call @do_sieve(%buf20_3, %buf20_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_3, "Release", 0) - AIE.use_lock(%lock20_4, "Release", 1) - AIE.end + aie.use_lock(%lock20_3, "Release", 0) + aie.use_lock(%lock20_4, "Release", 1) + aie.end } - %core20_5 = AIE.core(%tile20_5) { - AIE.use_lock(%lock20_4, "Acquire", 1) - AIE.use_lock(%lock20_5, "Acquire", 0) + %core20_5 = aie.core(%tile20_5) { + aie.use_lock(%lock20_4, "Acquire", 1) + aie.use_lock(%lock20_5, "Acquire", 0) func.call @do_sieve(%buf20_4, %buf20_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_4, "Release", 0) - AIE.use_lock(%lock20_5, "Release", 1) - AIE.end + aie.use_lock(%lock20_4, "Release", 0) + aie.use_lock(%lock20_5, "Release", 1) + aie.end } - %core20_6 = AIE.core(%tile20_6) { - AIE.use_lock(%lock20_5, "Acquire", 1) - AIE.use_lock(%lock20_6, "Acquire", 0) + %core20_6 = aie.core(%tile20_6) { + aie.use_lock(%lock20_5, "Acquire", 1) + aie.use_lock(%lock20_6, "Acquire", 0) func.call @do_sieve(%buf20_5, %buf20_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_5, "Release", 0) - AIE.use_lock(%lock20_6, "Release", 1) - AIE.end + aie.use_lock(%lock20_5, "Release", 0) + aie.use_lock(%lock20_6, "Release", 1) + aie.end } - %core20_7 = AIE.core(%tile20_7) { - AIE.use_lock(%lock20_6, "Acquire", 1) - AIE.use_lock(%lock20_7, "Acquire", 0) + %core20_7 = aie.core(%tile20_7) { + aie.use_lock(%lock20_6, "Acquire", 1) + aie.use_lock(%lock20_7, "Acquire", 0) func.call @do_sieve(%buf20_6, %buf20_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_6, "Release", 0) - AIE.use_lock(%lock20_7, "Release", 1) - AIE.end + aie.use_lock(%lock20_6, "Release", 0) + aie.use_lock(%lock20_7, "Release", 1) + aie.end } - %core20_8 = AIE.core(%tile20_8) { - AIE.use_lock(%lock20_7, "Acquire", 1) - AIE.use_lock(%lock20_8, "Acquire", 0) + %core20_8 = aie.core(%tile20_8) { + aie.use_lock(%lock20_7, "Acquire", 1) + aie.use_lock(%lock20_8, "Acquire", 0) func.call @do_sieve(%buf20_7, %buf20_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_7, "Release", 0) - AIE.use_lock(%lock20_8, "Release", 1) - AIE.end + aie.use_lock(%lock20_7, "Release", 0) + aie.use_lock(%lock20_8, "Release", 1) + aie.end } - %core21_8 = AIE.core(%tile21_8) { - AIE.use_lock(%lock20_8, "Acquire", 1) - AIE.use_lock(%lock21_8, "Acquire", 0) + %core21_8 = aie.core(%tile21_8) { + aie.use_lock(%lock20_8, "Acquire", 1) + aie.use_lock(%lock21_8, "Acquire", 0) func.call @do_sieve(%buf20_8, %buf21_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock20_8, "Release", 0) - AIE.use_lock(%lock21_8, "Release", 1) - AIE.end + aie.use_lock(%lock20_8, "Release", 0) + aie.use_lock(%lock21_8, "Release", 1) + aie.end } - %core21_7 = AIE.core(%tile21_7) { - AIE.use_lock(%lock21_8, "Acquire", 1) - AIE.use_lock(%lock21_7, "Acquire", 0) + %core21_7 = aie.core(%tile21_7) { + aie.use_lock(%lock21_8, "Acquire", 1) + aie.use_lock(%lock21_7, "Acquire", 0) func.call @do_sieve(%buf21_8, %buf21_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_8, "Release", 0) - AIE.use_lock(%lock21_7, "Release", 1) - AIE.end + aie.use_lock(%lock21_8, "Release", 0) + aie.use_lock(%lock21_7, "Release", 1) + aie.end } - %core21_6 = AIE.core(%tile21_6) { - AIE.use_lock(%lock21_7, "Acquire", 1) - AIE.use_lock(%lock21_6, "Acquire", 0) + %core21_6 = aie.core(%tile21_6) { + aie.use_lock(%lock21_7, "Acquire", 1) + aie.use_lock(%lock21_6, "Acquire", 0) func.call @do_sieve(%buf21_7, %buf21_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_7, "Release", 0) - AIE.use_lock(%lock21_6, "Release", 1) - AIE.end + aie.use_lock(%lock21_7, "Release", 0) + aie.use_lock(%lock21_6, "Release", 1) + aie.end } - %core21_5 = AIE.core(%tile21_5) { - AIE.use_lock(%lock21_6, "Acquire", 1) - AIE.use_lock(%lock21_5, "Acquire", 0) + %core21_5 = aie.core(%tile21_5) { + aie.use_lock(%lock21_6, "Acquire", 1) + aie.use_lock(%lock21_5, "Acquire", 0) func.call @do_sieve(%buf21_6, %buf21_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_6, "Release", 0) - AIE.use_lock(%lock21_5, "Release", 1) - AIE.end + aie.use_lock(%lock21_6, "Release", 0) + aie.use_lock(%lock21_5, "Release", 1) + aie.end } - %core21_4 = AIE.core(%tile21_4) { - AIE.use_lock(%lock21_5, "Acquire", 1) - AIE.use_lock(%lock21_4, "Acquire", 0) + %core21_4 = aie.core(%tile21_4) { + aie.use_lock(%lock21_5, "Acquire", 1) + aie.use_lock(%lock21_4, "Acquire", 0) func.call @do_sieve(%buf21_5, %buf21_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_5, "Release", 0) - AIE.use_lock(%lock21_4, "Release", 1) - AIE.end + aie.use_lock(%lock21_5, "Release", 0) + aie.use_lock(%lock21_4, "Release", 1) + aie.end } - %core21_3 = AIE.core(%tile21_3) { - AIE.use_lock(%lock21_4, "Acquire", 1) - AIE.use_lock(%lock21_3, "Acquire", 0) + %core21_3 = aie.core(%tile21_3) { + aie.use_lock(%lock21_4, "Acquire", 1) + aie.use_lock(%lock21_3, "Acquire", 0) func.call @do_sieve(%buf21_4, %buf21_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_4, "Release", 0) - AIE.use_lock(%lock21_3, "Release", 1) - AIE.end + aie.use_lock(%lock21_4, "Release", 0) + aie.use_lock(%lock21_3, "Release", 1) + aie.end } - %core21_2 = AIE.core(%tile21_2) { - AIE.use_lock(%lock21_3, "Acquire", 1) - AIE.use_lock(%lock21_2, "Acquire", 0) + %core21_2 = aie.core(%tile21_2) { + aie.use_lock(%lock21_3, "Acquire", 1) + aie.use_lock(%lock21_2, "Acquire", 0) func.call @do_sieve(%buf21_3, %buf21_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_3, "Release", 0) - AIE.use_lock(%lock21_2, "Release", 1) - AIE.end + aie.use_lock(%lock21_3, "Release", 0) + aie.use_lock(%lock21_2, "Release", 1) + aie.end } - %core21_1 = AIE.core(%tile21_1) { - AIE.use_lock(%lock21_2, "Acquire", 1) - AIE.use_lock(%lock21_1, "Acquire", 0) + %core21_1 = aie.core(%tile21_1) { + aie.use_lock(%lock21_2, "Acquire", 1) + aie.use_lock(%lock21_1, "Acquire", 0) func.call @do_sieve(%buf21_2, %buf21_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_2, "Release", 0) - AIE.use_lock(%lock21_1, "Release", 1) - AIE.end + aie.use_lock(%lock21_2, "Release", 0) + aie.use_lock(%lock21_1, "Release", 1) + aie.end } - %core22_1 = AIE.core(%tile22_1) { - AIE.use_lock(%lock21_1, "Acquire", 1) - AIE.use_lock(%lock22_1, "Acquire", 0) + %core22_1 = aie.core(%tile22_1) { + aie.use_lock(%lock21_1, "Acquire", 1) + aie.use_lock(%lock22_1, "Acquire", 0) func.call @do_sieve(%buf21_1, %buf22_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock21_1, "Release", 0) - AIE.use_lock(%lock22_1, "Release", 1) - AIE.end + aie.use_lock(%lock21_1, "Release", 0) + aie.use_lock(%lock22_1, "Release", 1) + aie.end } - %core22_2 = AIE.core(%tile22_2) { - AIE.use_lock(%lock22_1, "Acquire", 1) - AIE.use_lock(%lock22_2, "Acquire", 0) + %core22_2 = aie.core(%tile22_2) { + aie.use_lock(%lock22_1, "Acquire", 1) + aie.use_lock(%lock22_2, "Acquire", 0) func.call @do_sieve(%buf22_1, %buf22_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_1, "Release", 0) - AIE.use_lock(%lock22_2, "Release", 1) - AIE.end + aie.use_lock(%lock22_1, "Release", 0) + aie.use_lock(%lock22_2, "Release", 1) + aie.end } - %core22_3 = AIE.core(%tile22_3) { - AIE.use_lock(%lock22_2, "Acquire", 1) - AIE.use_lock(%lock22_3, "Acquire", 0) + %core22_3 = aie.core(%tile22_3) { + aie.use_lock(%lock22_2, "Acquire", 1) + aie.use_lock(%lock22_3, "Acquire", 0) func.call @do_sieve(%buf22_2, %buf22_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_2, "Release", 0) - AIE.use_lock(%lock22_3, "Release", 1) - AIE.end + aie.use_lock(%lock22_2, "Release", 0) + aie.use_lock(%lock22_3, "Release", 1) + aie.end } - %core22_4 = AIE.core(%tile22_4) { - AIE.use_lock(%lock22_3, "Acquire", 1) - AIE.use_lock(%lock22_4, "Acquire", 0) + %core22_4 = aie.core(%tile22_4) { + aie.use_lock(%lock22_3, "Acquire", 1) + aie.use_lock(%lock22_4, "Acquire", 0) func.call @do_sieve(%buf22_3, %buf22_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_3, "Release", 0) - AIE.use_lock(%lock22_4, "Release", 1) - AIE.end + aie.use_lock(%lock22_3, "Release", 0) + aie.use_lock(%lock22_4, "Release", 1) + aie.end } - %core22_5 = AIE.core(%tile22_5) { - AIE.use_lock(%lock22_4, "Acquire", 1) - AIE.use_lock(%lock22_5, "Acquire", 0) + %core22_5 = aie.core(%tile22_5) { + aie.use_lock(%lock22_4, "Acquire", 1) + aie.use_lock(%lock22_5, "Acquire", 0) func.call @do_sieve(%buf22_4, %buf22_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_4, "Release", 0) - AIE.use_lock(%lock22_5, "Release", 1) - AIE.end + aie.use_lock(%lock22_4, "Release", 0) + aie.use_lock(%lock22_5, "Release", 1) + aie.end } - %core22_6 = AIE.core(%tile22_6) { - AIE.use_lock(%lock22_5, "Acquire", 1) - AIE.use_lock(%lock22_6, "Acquire", 0) + %core22_6 = aie.core(%tile22_6) { + aie.use_lock(%lock22_5, "Acquire", 1) + aie.use_lock(%lock22_6, "Acquire", 0) func.call @do_sieve(%buf22_5, %buf22_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_5, "Release", 0) - AIE.use_lock(%lock22_6, "Release", 1) - AIE.end + aie.use_lock(%lock22_5, "Release", 0) + aie.use_lock(%lock22_6, "Release", 1) + aie.end } - %core22_7 = AIE.core(%tile22_7) { - AIE.use_lock(%lock22_6, "Acquire", 1) - AIE.use_lock(%lock22_7, "Acquire", 0) + %core22_7 = aie.core(%tile22_7) { + aie.use_lock(%lock22_6, "Acquire", 1) + aie.use_lock(%lock22_7, "Acquire", 0) func.call @do_sieve(%buf22_6, %buf22_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_6, "Release", 0) - AIE.use_lock(%lock22_7, "Release", 1) - AIE.end + aie.use_lock(%lock22_6, "Release", 0) + aie.use_lock(%lock22_7, "Release", 1) + aie.end } - %core22_8 = AIE.core(%tile22_8) { - AIE.use_lock(%lock22_7, "Acquire", 1) - AIE.use_lock(%lock22_8, "Acquire", 0) + %core22_8 = aie.core(%tile22_8) { + aie.use_lock(%lock22_7, "Acquire", 1) + aie.use_lock(%lock22_8, "Acquire", 0) func.call @do_sieve(%buf22_7, %buf22_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_7, "Release", 0) - AIE.use_lock(%lock22_8, "Release", 1) - AIE.end + aie.use_lock(%lock22_7, "Release", 0) + aie.use_lock(%lock22_8, "Release", 1) + aie.end } - %core23_8 = AIE.core(%tile23_8) { - AIE.use_lock(%lock22_8, "Acquire", 1) - AIE.use_lock(%lock23_8, "Acquire", 0) + %core23_8 = aie.core(%tile23_8) { + aie.use_lock(%lock22_8, "Acquire", 1) + aie.use_lock(%lock23_8, "Acquire", 0) func.call @do_sieve(%buf22_8, %buf23_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock22_8, "Release", 0) - AIE.use_lock(%lock23_8, "Release", 1) - AIE.end + aie.use_lock(%lock22_8, "Release", 0) + aie.use_lock(%lock23_8, "Release", 1) + aie.end } - %core23_7 = AIE.core(%tile23_7) { - AIE.use_lock(%lock23_8, "Acquire", 1) - AIE.use_lock(%lock23_7, "Acquire", 0) + %core23_7 = aie.core(%tile23_7) { + aie.use_lock(%lock23_8, "Acquire", 1) + aie.use_lock(%lock23_7, "Acquire", 0) func.call @do_sieve(%buf23_8, %buf23_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_8, "Release", 0) - AIE.use_lock(%lock23_7, "Release", 1) - AIE.end + aie.use_lock(%lock23_8, "Release", 0) + aie.use_lock(%lock23_7, "Release", 1) + aie.end } - %core23_6 = AIE.core(%tile23_6) { - AIE.use_lock(%lock23_7, "Acquire", 1) - AIE.use_lock(%lock23_6, "Acquire", 0) + %core23_6 = aie.core(%tile23_6) { + aie.use_lock(%lock23_7, "Acquire", 1) + aie.use_lock(%lock23_6, "Acquire", 0) func.call @do_sieve(%buf23_7, %buf23_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_7, "Release", 0) - AIE.use_lock(%lock23_6, "Release", 1) - AIE.end + aie.use_lock(%lock23_7, "Release", 0) + aie.use_lock(%lock23_6, "Release", 1) + aie.end } - %core23_5 = AIE.core(%tile23_5) { - AIE.use_lock(%lock23_6, "Acquire", 1) - AIE.use_lock(%lock23_5, "Acquire", 0) + %core23_5 = aie.core(%tile23_5) { + aie.use_lock(%lock23_6, "Acquire", 1) + aie.use_lock(%lock23_5, "Acquire", 0) func.call @do_sieve(%buf23_6, %buf23_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_6, "Release", 0) - AIE.use_lock(%lock23_5, "Release", 1) - AIE.end + aie.use_lock(%lock23_6, "Release", 0) + aie.use_lock(%lock23_5, "Release", 1) + aie.end } - %core23_4 = AIE.core(%tile23_4) { - AIE.use_lock(%lock23_5, "Acquire", 1) - AIE.use_lock(%lock23_4, "Acquire", 0) + %core23_4 = aie.core(%tile23_4) { + aie.use_lock(%lock23_5, "Acquire", 1) + aie.use_lock(%lock23_4, "Acquire", 0) func.call @do_sieve(%buf23_5, %buf23_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_5, "Release", 0) - AIE.use_lock(%lock23_4, "Release", 1) - AIE.end + aie.use_lock(%lock23_5, "Release", 0) + aie.use_lock(%lock23_4, "Release", 1) + aie.end } - %core23_3 = AIE.core(%tile23_3) { - AIE.use_lock(%lock23_4, "Acquire", 1) - AIE.use_lock(%lock23_3, "Acquire", 0) + %core23_3 = aie.core(%tile23_3) { + aie.use_lock(%lock23_4, "Acquire", 1) + aie.use_lock(%lock23_3, "Acquire", 0) func.call @do_sieve(%buf23_4, %buf23_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_4, "Release", 0) - AIE.use_lock(%lock23_3, "Release", 1) - AIE.end + aie.use_lock(%lock23_4, "Release", 0) + aie.use_lock(%lock23_3, "Release", 1) + aie.end } - %core23_2 = AIE.core(%tile23_2) { - AIE.use_lock(%lock23_3, "Acquire", 1) - AIE.use_lock(%lock23_2, "Acquire", 0) + %core23_2 = aie.core(%tile23_2) { + aie.use_lock(%lock23_3, "Acquire", 1) + aie.use_lock(%lock23_2, "Acquire", 0) func.call @do_sieve(%buf23_3, %buf23_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_3, "Release", 0) - AIE.use_lock(%lock23_2, "Release", 1) - AIE.end + aie.use_lock(%lock23_3, "Release", 0) + aie.use_lock(%lock23_2, "Release", 1) + aie.end } - %core23_1 = AIE.core(%tile23_1) { - AIE.use_lock(%lock23_2, "Acquire", 1) - AIE.use_lock(%lock23_1, "Acquire", 0) + %core23_1 = aie.core(%tile23_1) { + aie.use_lock(%lock23_2, "Acquire", 1) + aie.use_lock(%lock23_1, "Acquire", 0) func.call @do_sieve(%buf23_2, %buf23_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_2, "Release", 0) - AIE.use_lock(%lock23_1, "Release", 1) - AIE.end + aie.use_lock(%lock23_2, "Release", 0) + aie.use_lock(%lock23_1, "Release", 1) + aie.end } - %core24_1 = AIE.core(%tile24_1) { - AIE.use_lock(%lock23_1, "Acquire", 1) - AIE.use_lock(%lock24_1, "Acquire", 0) + %core24_1 = aie.core(%tile24_1) { + aie.use_lock(%lock23_1, "Acquire", 1) + aie.use_lock(%lock24_1, "Acquire", 0) func.call @do_sieve(%buf23_1, %buf24_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock23_1, "Release", 0) - AIE.use_lock(%lock24_1, "Release", 1) - AIE.end + aie.use_lock(%lock23_1, "Release", 0) + aie.use_lock(%lock24_1, "Release", 1) + aie.end } - %core24_2 = AIE.core(%tile24_2) { - AIE.use_lock(%lock24_1, "Acquire", 1) - AIE.use_lock(%lock24_2, "Acquire", 0) + %core24_2 = aie.core(%tile24_2) { + aie.use_lock(%lock24_1, "Acquire", 1) + aie.use_lock(%lock24_2, "Acquire", 0) func.call @do_sieve(%buf24_1, %buf24_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_1, "Release", 0) - AIE.use_lock(%lock24_2, "Release", 1) - AIE.end + aie.use_lock(%lock24_1, "Release", 0) + aie.use_lock(%lock24_2, "Release", 1) + aie.end } - %core24_3 = AIE.core(%tile24_3) { - AIE.use_lock(%lock24_2, "Acquire", 1) - AIE.use_lock(%lock24_3, "Acquire", 0) + %core24_3 = aie.core(%tile24_3) { + aie.use_lock(%lock24_2, "Acquire", 1) + aie.use_lock(%lock24_3, "Acquire", 0) func.call @do_sieve(%buf24_2, %buf24_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_2, "Release", 0) - AIE.use_lock(%lock24_3, "Release", 1) - AIE.end + aie.use_lock(%lock24_2, "Release", 0) + aie.use_lock(%lock24_3, "Release", 1) + aie.end } - %core24_4 = AIE.core(%tile24_4) { - AIE.use_lock(%lock24_3, "Acquire", 1) - AIE.use_lock(%lock24_4, "Acquire", 0) + %core24_4 = aie.core(%tile24_4) { + aie.use_lock(%lock24_3, "Acquire", 1) + aie.use_lock(%lock24_4, "Acquire", 0) func.call @do_sieve(%buf24_3, %buf24_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_3, "Release", 0) - AIE.use_lock(%lock24_4, "Release", 1) - AIE.end + aie.use_lock(%lock24_3, "Release", 0) + aie.use_lock(%lock24_4, "Release", 1) + aie.end } - %core24_5 = AIE.core(%tile24_5) { - AIE.use_lock(%lock24_4, "Acquire", 1) - AIE.use_lock(%lock24_5, "Acquire", 0) + %core24_5 = aie.core(%tile24_5) { + aie.use_lock(%lock24_4, "Acquire", 1) + aie.use_lock(%lock24_5, "Acquire", 0) func.call @do_sieve(%buf24_4, %buf24_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_4, "Release", 0) - AIE.use_lock(%lock24_5, "Release", 1) - AIE.end + aie.use_lock(%lock24_4, "Release", 0) + aie.use_lock(%lock24_5, "Release", 1) + aie.end } - %core24_6 = AIE.core(%tile24_6) { - AIE.use_lock(%lock24_5, "Acquire", 1) - AIE.use_lock(%lock24_6, "Acquire", 0) + %core24_6 = aie.core(%tile24_6) { + aie.use_lock(%lock24_5, "Acquire", 1) + aie.use_lock(%lock24_6, "Acquire", 0) func.call @do_sieve(%buf24_5, %buf24_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_5, "Release", 0) - AIE.use_lock(%lock24_6, "Release", 1) - AIE.end + aie.use_lock(%lock24_5, "Release", 0) + aie.use_lock(%lock24_6, "Release", 1) + aie.end } - %core24_7 = AIE.core(%tile24_7) { - AIE.use_lock(%lock24_6, "Acquire", 1) - AIE.use_lock(%lock24_7, "Acquire", 0) + %core24_7 = aie.core(%tile24_7) { + aie.use_lock(%lock24_6, "Acquire", 1) + aie.use_lock(%lock24_7, "Acquire", 0) func.call @do_sieve(%buf24_6, %buf24_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_6, "Release", 0) - AIE.use_lock(%lock24_7, "Release", 1) - AIE.end + aie.use_lock(%lock24_6, "Release", 0) + aie.use_lock(%lock24_7, "Release", 1) + aie.end } - %core24_8 = AIE.core(%tile24_8) { - AIE.use_lock(%lock24_7, "Acquire", 1) - AIE.use_lock(%lock24_8, "Acquire", 0) + %core24_8 = aie.core(%tile24_8) { + aie.use_lock(%lock24_7, "Acquire", 1) + aie.use_lock(%lock24_8, "Acquire", 0) func.call @do_sieve(%buf24_7, %buf24_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_7, "Release", 0) - AIE.use_lock(%lock24_8, "Release", 1) - AIE.end + aie.use_lock(%lock24_7, "Release", 0) + aie.use_lock(%lock24_8, "Release", 1) + aie.end } - %core25_8 = AIE.core(%tile25_8) { - AIE.use_lock(%lock24_8, "Acquire", 1) - AIE.use_lock(%lock25_8, "Acquire", 0) + %core25_8 = aie.core(%tile25_8) { + aie.use_lock(%lock24_8, "Acquire", 1) + aie.use_lock(%lock25_8, "Acquire", 0) func.call @do_sieve(%buf24_8, %buf25_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock24_8, "Release", 0) - AIE.use_lock(%lock25_8, "Release", 1) - AIE.end + aie.use_lock(%lock24_8, "Release", 0) + aie.use_lock(%lock25_8, "Release", 1) + aie.end } - %core25_7 = AIE.core(%tile25_7) { - AIE.use_lock(%lock25_8, "Acquire", 1) - AIE.use_lock(%lock25_7, "Acquire", 0) + %core25_7 = aie.core(%tile25_7) { + aie.use_lock(%lock25_8, "Acquire", 1) + aie.use_lock(%lock25_7, "Acquire", 0) func.call @do_sieve(%buf25_8, %buf25_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_8, "Release", 0) - AIE.use_lock(%lock25_7, "Release", 1) - AIE.end + aie.use_lock(%lock25_8, "Release", 0) + aie.use_lock(%lock25_7, "Release", 1) + aie.end } - %core25_6 = AIE.core(%tile25_6) { - AIE.use_lock(%lock25_7, "Acquire", 1) - AIE.use_lock(%lock25_6, "Acquire", 0) + %core25_6 = aie.core(%tile25_6) { + aie.use_lock(%lock25_7, "Acquire", 1) + aie.use_lock(%lock25_6, "Acquire", 0) func.call @do_sieve(%buf25_7, %buf25_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_7, "Release", 0) - AIE.use_lock(%lock25_6, "Release", 1) - AIE.end + aie.use_lock(%lock25_7, "Release", 0) + aie.use_lock(%lock25_6, "Release", 1) + aie.end } - %core25_5 = AIE.core(%tile25_5) { - AIE.use_lock(%lock25_6, "Acquire", 1) - AIE.use_lock(%lock25_5, "Acquire", 0) + %core25_5 = aie.core(%tile25_5) { + aie.use_lock(%lock25_6, "Acquire", 1) + aie.use_lock(%lock25_5, "Acquire", 0) func.call @do_sieve(%buf25_6, %buf25_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_6, "Release", 0) - AIE.use_lock(%lock25_5, "Release", 1) - AIE.end + aie.use_lock(%lock25_6, "Release", 0) + aie.use_lock(%lock25_5, "Release", 1) + aie.end } - %core25_4 = AIE.core(%tile25_4) { - AIE.use_lock(%lock25_5, "Acquire", 1) - AIE.use_lock(%lock25_4, "Acquire", 0) + %core25_4 = aie.core(%tile25_4) { + aie.use_lock(%lock25_5, "Acquire", 1) + aie.use_lock(%lock25_4, "Acquire", 0) func.call @do_sieve(%buf25_5, %buf25_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_5, "Release", 0) - AIE.use_lock(%lock25_4, "Release", 1) - AIE.end + aie.use_lock(%lock25_5, "Release", 0) + aie.use_lock(%lock25_4, "Release", 1) + aie.end } - %core25_3 = AIE.core(%tile25_3) { - AIE.use_lock(%lock25_4, "Acquire", 1) - AIE.use_lock(%lock25_3, "Acquire", 0) + %core25_3 = aie.core(%tile25_3) { + aie.use_lock(%lock25_4, "Acquire", 1) + aie.use_lock(%lock25_3, "Acquire", 0) func.call @do_sieve(%buf25_4, %buf25_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_4, "Release", 0) - AIE.use_lock(%lock25_3, "Release", 1) - AIE.end + aie.use_lock(%lock25_4, "Release", 0) + aie.use_lock(%lock25_3, "Release", 1) + aie.end } - %core25_2 = AIE.core(%tile25_2) { - AIE.use_lock(%lock25_3, "Acquire", 1) - AIE.use_lock(%lock25_2, "Acquire", 0) + %core25_2 = aie.core(%tile25_2) { + aie.use_lock(%lock25_3, "Acquire", 1) + aie.use_lock(%lock25_2, "Acquire", 0) func.call @do_sieve(%buf25_3, %buf25_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_3, "Release", 0) - AIE.use_lock(%lock25_2, "Release", 1) - AIE.end + aie.use_lock(%lock25_3, "Release", 0) + aie.use_lock(%lock25_2, "Release", 1) + aie.end } - %core25_1 = AIE.core(%tile25_1) { - AIE.use_lock(%lock25_2, "Acquire", 1) - AIE.use_lock(%lock25_1, "Acquire", 0) + %core25_1 = aie.core(%tile25_1) { + aie.use_lock(%lock25_2, "Acquire", 1) + aie.use_lock(%lock25_1, "Acquire", 0) func.call @do_sieve(%buf25_2, %buf25_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_2, "Release", 0) - AIE.use_lock(%lock25_1, "Release", 1) - AIE.end + aie.use_lock(%lock25_2, "Release", 0) + aie.use_lock(%lock25_1, "Release", 1) + aie.end } - %core26_1 = AIE.core(%tile26_1) { - AIE.use_lock(%lock25_1, "Acquire", 1) - AIE.use_lock(%lock26_1, "Acquire", 0) + %core26_1 = aie.core(%tile26_1) { + aie.use_lock(%lock25_1, "Acquire", 1) + aie.use_lock(%lock26_1, "Acquire", 0) func.call @do_sieve(%buf25_1, %buf26_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock25_1, "Release", 0) - AIE.use_lock(%lock26_1, "Release", 1) - AIE.end + aie.use_lock(%lock25_1, "Release", 0) + aie.use_lock(%lock26_1, "Release", 1) + aie.end } - %core26_2 = AIE.core(%tile26_2) { - AIE.use_lock(%lock26_1, "Acquire", 1) - AIE.use_lock(%lock26_2, "Acquire", 0) + %core26_2 = aie.core(%tile26_2) { + aie.use_lock(%lock26_1, "Acquire", 1) + aie.use_lock(%lock26_2, "Acquire", 0) func.call @do_sieve(%buf26_1, %buf26_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_1, "Release", 0) - AIE.use_lock(%lock26_2, "Release", 1) - AIE.end + aie.use_lock(%lock26_1, "Release", 0) + aie.use_lock(%lock26_2, "Release", 1) + aie.end } - %core26_3 = AIE.core(%tile26_3) { - AIE.use_lock(%lock26_2, "Acquire", 1) - AIE.use_lock(%lock26_3, "Acquire", 0) + %core26_3 = aie.core(%tile26_3) { + aie.use_lock(%lock26_2, "Acquire", 1) + aie.use_lock(%lock26_3, "Acquire", 0) func.call @do_sieve(%buf26_2, %buf26_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_2, "Release", 0) - AIE.use_lock(%lock26_3, "Release", 1) - AIE.end + aie.use_lock(%lock26_2, "Release", 0) + aie.use_lock(%lock26_3, "Release", 1) + aie.end } - %core26_4 = AIE.core(%tile26_4) { - AIE.use_lock(%lock26_3, "Acquire", 1) - AIE.use_lock(%lock26_4, "Acquire", 0) + %core26_4 = aie.core(%tile26_4) { + aie.use_lock(%lock26_3, "Acquire", 1) + aie.use_lock(%lock26_4, "Acquire", 0) func.call @do_sieve(%buf26_3, %buf26_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_3, "Release", 0) - AIE.use_lock(%lock26_4, "Release", 1) - AIE.end + aie.use_lock(%lock26_3, "Release", 0) + aie.use_lock(%lock26_4, "Release", 1) + aie.end } - %core26_5 = AIE.core(%tile26_5) { - AIE.use_lock(%lock26_4, "Acquire", 1) - AIE.use_lock(%lock26_5, "Acquire", 0) + %core26_5 = aie.core(%tile26_5) { + aie.use_lock(%lock26_4, "Acquire", 1) + aie.use_lock(%lock26_5, "Acquire", 0) func.call @do_sieve(%buf26_4, %buf26_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_4, "Release", 0) - AIE.use_lock(%lock26_5, "Release", 1) - AIE.end + aie.use_lock(%lock26_4, "Release", 0) + aie.use_lock(%lock26_5, "Release", 1) + aie.end } - %core26_6 = AIE.core(%tile26_6) { - AIE.use_lock(%lock26_5, "Acquire", 1) - AIE.use_lock(%lock26_6, "Acquire", 0) + %core26_6 = aie.core(%tile26_6) { + aie.use_lock(%lock26_5, "Acquire", 1) + aie.use_lock(%lock26_6, "Acquire", 0) func.call @do_sieve(%buf26_5, %buf26_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_5, "Release", 0) - AIE.use_lock(%lock26_6, "Release", 1) - AIE.end + aie.use_lock(%lock26_5, "Release", 0) + aie.use_lock(%lock26_6, "Release", 1) + aie.end } - %core26_7 = AIE.core(%tile26_7) { - AIE.use_lock(%lock26_6, "Acquire", 1) - AIE.use_lock(%lock26_7, "Acquire", 0) + %core26_7 = aie.core(%tile26_7) { + aie.use_lock(%lock26_6, "Acquire", 1) + aie.use_lock(%lock26_7, "Acquire", 0) func.call @do_sieve(%buf26_6, %buf26_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_6, "Release", 0) - AIE.use_lock(%lock26_7, "Release", 1) - AIE.end + aie.use_lock(%lock26_6, "Release", 0) + aie.use_lock(%lock26_7, "Release", 1) + aie.end } - %core26_8 = AIE.core(%tile26_8) { - AIE.use_lock(%lock26_7, "Acquire", 1) - AIE.use_lock(%lock26_8, "Acquire", 0) + %core26_8 = aie.core(%tile26_8) { + aie.use_lock(%lock26_7, "Acquire", 1) + aie.use_lock(%lock26_8, "Acquire", 0) func.call @do_sieve(%buf26_7, %buf26_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_7, "Release", 0) - AIE.use_lock(%lock26_8, "Release", 1) - AIE.end + aie.use_lock(%lock26_7, "Release", 0) + aie.use_lock(%lock26_8, "Release", 1) + aie.end } - %core27_8 = AIE.core(%tile27_8) { - AIE.use_lock(%lock26_8, "Acquire", 1) - AIE.use_lock(%lock27_8, "Acquire", 0) + %core27_8 = aie.core(%tile27_8) { + aie.use_lock(%lock26_8, "Acquire", 1) + aie.use_lock(%lock27_8, "Acquire", 0) func.call @do_sieve(%buf26_8, %buf27_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock26_8, "Release", 0) - AIE.use_lock(%lock27_8, "Release", 1) - AIE.end + aie.use_lock(%lock26_8, "Release", 0) + aie.use_lock(%lock27_8, "Release", 1) + aie.end } - %core27_7 = AIE.core(%tile27_7) { - AIE.use_lock(%lock27_8, "Acquire", 1) - AIE.use_lock(%lock27_7, "Acquire", 0) + %core27_7 = aie.core(%tile27_7) { + aie.use_lock(%lock27_8, "Acquire", 1) + aie.use_lock(%lock27_7, "Acquire", 0) func.call @do_sieve(%buf27_8, %buf27_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_8, "Release", 0) - AIE.use_lock(%lock27_7, "Release", 1) - AIE.end + aie.use_lock(%lock27_8, "Release", 0) + aie.use_lock(%lock27_7, "Release", 1) + aie.end } - %core27_6 = AIE.core(%tile27_6) { - AIE.use_lock(%lock27_7, "Acquire", 1) - AIE.use_lock(%lock27_6, "Acquire", 0) + %core27_6 = aie.core(%tile27_6) { + aie.use_lock(%lock27_7, "Acquire", 1) + aie.use_lock(%lock27_6, "Acquire", 0) func.call @do_sieve(%buf27_7, %buf27_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_7, "Release", 0) - AIE.use_lock(%lock27_6, "Release", 1) - AIE.end + aie.use_lock(%lock27_7, "Release", 0) + aie.use_lock(%lock27_6, "Release", 1) + aie.end } - %core27_5 = AIE.core(%tile27_5) { - AIE.use_lock(%lock27_6, "Acquire", 1) - AIE.use_lock(%lock27_5, "Acquire", 0) + %core27_5 = aie.core(%tile27_5) { + aie.use_lock(%lock27_6, "Acquire", 1) + aie.use_lock(%lock27_5, "Acquire", 0) func.call @do_sieve(%buf27_6, %buf27_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_6, "Release", 0) - AIE.use_lock(%lock27_5, "Release", 1) - AIE.end + aie.use_lock(%lock27_6, "Release", 0) + aie.use_lock(%lock27_5, "Release", 1) + aie.end } - %core27_4 = AIE.core(%tile27_4) { - AIE.use_lock(%lock27_5, "Acquire", 1) - AIE.use_lock(%lock27_4, "Acquire", 0) + %core27_4 = aie.core(%tile27_4) { + aie.use_lock(%lock27_5, "Acquire", 1) + aie.use_lock(%lock27_4, "Acquire", 0) func.call @do_sieve(%buf27_5, %buf27_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_5, "Release", 0) - AIE.use_lock(%lock27_4, "Release", 1) - AIE.end + aie.use_lock(%lock27_5, "Release", 0) + aie.use_lock(%lock27_4, "Release", 1) + aie.end } - %core27_3 = AIE.core(%tile27_3) { - AIE.use_lock(%lock27_4, "Acquire", 1) - AIE.use_lock(%lock27_3, "Acquire", 0) + %core27_3 = aie.core(%tile27_3) { + aie.use_lock(%lock27_4, "Acquire", 1) + aie.use_lock(%lock27_3, "Acquire", 0) func.call @do_sieve(%buf27_4, %buf27_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_4, "Release", 0) - AIE.use_lock(%lock27_3, "Release", 1) - AIE.end + aie.use_lock(%lock27_4, "Release", 0) + aie.use_lock(%lock27_3, "Release", 1) + aie.end } - %core27_2 = AIE.core(%tile27_2) { - AIE.use_lock(%lock27_3, "Acquire", 1) - AIE.use_lock(%lock27_2, "Acquire", 0) + %core27_2 = aie.core(%tile27_2) { + aie.use_lock(%lock27_3, "Acquire", 1) + aie.use_lock(%lock27_2, "Acquire", 0) func.call @do_sieve(%buf27_3, %buf27_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_3, "Release", 0) - AIE.use_lock(%lock27_2, "Release", 1) - AIE.end + aie.use_lock(%lock27_3, "Release", 0) + aie.use_lock(%lock27_2, "Release", 1) + aie.end } - %core27_1 = AIE.core(%tile27_1) { - AIE.use_lock(%lock27_2, "Acquire", 1) - AIE.use_lock(%lock27_1, "Acquire", 0) + %core27_1 = aie.core(%tile27_1) { + aie.use_lock(%lock27_2, "Acquire", 1) + aie.use_lock(%lock27_1, "Acquire", 0) func.call @do_sieve(%buf27_2, %buf27_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_2, "Release", 0) - AIE.use_lock(%lock27_1, "Release", 1) - AIE.end + aie.use_lock(%lock27_2, "Release", 0) + aie.use_lock(%lock27_1, "Release", 1) + aie.end } - %core28_1 = AIE.core(%tile28_1) { - AIE.use_lock(%lock27_1, "Acquire", 1) - AIE.use_lock(%lock28_1, "Acquire", 0) + %core28_1 = aie.core(%tile28_1) { + aie.use_lock(%lock27_1, "Acquire", 1) + aie.use_lock(%lock28_1, "Acquire", 0) func.call @do_sieve(%buf27_1, %buf28_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock27_1, "Release", 0) - AIE.use_lock(%lock28_1, "Release", 1) - AIE.end + aie.use_lock(%lock27_1, "Release", 0) + aie.use_lock(%lock28_1, "Release", 1) + aie.end } - %core28_2 = AIE.core(%tile28_2) { - AIE.use_lock(%lock28_1, "Acquire", 1) - AIE.use_lock(%lock28_2, "Acquire", 0) + %core28_2 = aie.core(%tile28_2) { + aie.use_lock(%lock28_1, "Acquire", 1) + aie.use_lock(%lock28_2, "Acquire", 0) func.call @do_sieve(%buf28_1, %buf28_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_1, "Release", 0) - AIE.use_lock(%lock28_2, "Release", 1) - AIE.end + aie.use_lock(%lock28_1, "Release", 0) + aie.use_lock(%lock28_2, "Release", 1) + aie.end } - %core28_3 = AIE.core(%tile28_3) { - AIE.use_lock(%lock28_2, "Acquire", 1) - AIE.use_lock(%lock28_3, "Acquire", 0) + %core28_3 = aie.core(%tile28_3) { + aie.use_lock(%lock28_2, "Acquire", 1) + aie.use_lock(%lock28_3, "Acquire", 0) func.call @do_sieve(%buf28_2, %buf28_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_2, "Release", 0) - AIE.use_lock(%lock28_3, "Release", 1) - AIE.end + aie.use_lock(%lock28_2, "Release", 0) + aie.use_lock(%lock28_3, "Release", 1) + aie.end } - %core28_4 = AIE.core(%tile28_4) { - AIE.use_lock(%lock28_3, "Acquire", 1) - AIE.use_lock(%lock28_4, "Acquire", 0) + %core28_4 = aie.core(%tile28_4) { + aie.use_lock(%lock28_3, "Acquire", 1) + aie.use_lock(%lock28_4, "Acquire", 0) func.call @do_sieve(%buf28_3, %buf28_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_3, "Release", 0) - AIE.use_lock(%lock28_4, "Release", 1) - AIE.end + aie.use_lock(%lock28_3, "Release", 0) + aie.use_lock(%lock28_4, "Release", 1) + aie.end } - %core28_5 = AIE.core(%tile28_5) { - AIE.use_lock(%lock28_4, "Acquire", 1) - AIE.use_lock(%lock28_5, "Acquire", 0) + %core28_5 = aie.core(%tile28_5) { + aie.use_lock(%lock28_4, "Acquire", 1) + aie.use_lock(%lock28_5, "Acquire", 0) func.call @do_sieve(%buf28_4, %buf28_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_4, "Release", 0) - AIE.use_lock(%lock28_5, "Release", 1) - AIE.end + aie.use_lock(%lock28_4, "Release", 0) + aie.use_lock(%lock28_5, "Release", 1) + aie.end } - %core28_6 = AIE.core(%tile28_6) { - AIE.use_lock(%lock28_5, "Acquire", 1) - AIE.use_lock(%lock28_6, "Acquire", 0) + %core28_6 = aie.core(%tile28_6) { + aie.use_lock(%lock28_5, "Acquire", 1) + aie.use_lock(%lock28_6, "Acquire", 0) func.call @do_sieve(%buf28_5, %buf28_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_5, "Release", 0) - AIE.use_lock(%lock28_6, "Release", 1) - AIE.end + aie.use_lock(%lock28_5, "Release", 0) + aie.use_lock(%lock28_6, "Release", 1) + aie.end } - %core28_7 = AIE.core(%tile28_7) { - AIE.use_lock(%lock28_6, "Acquire", 1) - AIE.use_lock(%lock28_7, "Acquire", 0) + %core28_7 = aie.core(%tile28_7) { + aie.use_lock(%lock28_6, "Acquire", 1) + aie.use_lock(%lock28_7, "Acquire", 0) func.call @do_sieve(%buf28_6, %buf28_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_6, "Release", 0) - AIE.use_lock(%lock28_7, "Release", 1) - AIE.end + aie.use_lock(%lock28_6, "Release", 0) + aie.use_lock(%lock28_7, "Release", 1) + aie.end } - %core28_8 = AIE.core(%tile28_8) { - AIE.use_lock(%lock28_7, "Acquire", 1) - AIE.use_lock(%lock28_8, "Acquire", 0) + %core28_8 = aie.core(%tile28_8) { + aie.use_lock(%lock28_7, "Acquire", 1) + aie.use_lock(%lock28_8, "Acquire", 0) func.call @do_sieve(%buf28_7, %buf28_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_7, "Release", 0) - AIE.use_lock(%lock28_8, "Release", 1) - AIE.end + aie.use_lock(%lock28_7, "Release", 0) + aie.use_lock(%lock28_8, "Release", 1) + aie.end } - %core29_8 = AIE.core(%tile29_8) { - AIE.use_lock(%lock28_8, "Acquire", 1) - AIE.use_lock(%lock29_8, "Acquire", 0) + %core29_8 = aie.core(%tile29_8) { + aie.use_lock(%lock28_8, "Acquire", 1) + aie.use_lock(%lock29_8, "Acquire", 0) func.call @do_sieve(%buf28_8, %buf29_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock28_8, "Release", 0) - AIE.use_lock(%lock29_8, "Release", 1) - AIE.end + aie.use_lock(%lock28_8, "Release", 0) + aie.use_lock(%lock29_8, "Release", 1) + aie.end } - %core29_7 = AIE.core(%tile29_7) { - AIE.use_lock(%lock29_8, "Acquire", 1) - AIE.use_lock(%lock29_7, "Acquire", 0) + %core29_7 = aie.core(%tile29_7) { + aie.use_lock(%lock29_8, "Acquire", 1) + aie.use_lock(%lock29_7, "Acquire", 0) func.call @do_sieve(%buf29_8, %buf29_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_8, "Release", 0) - AIE.use_lock(%lock29_7, "Release", 1) - AIE.end + aie.use_lock(%lock29_8, "Release", 0) + aie.use_lock(%lock29_7, "Release", 1) + aie.end } - %core29_6 = AIE.core(%tile29_6) { - AIE.use_lock(%lock29_7, "Acquire", 1) - AIE.use_lock(%lock29_6, "Acquire", 0) + %core29_6 = aie.core(%tile29_6) { + aie.use_lock(%lock29_7, "Acquire", 1) + aie.use_lock(%lock29_6, "Acquire", 0) func.call @do_sieve(%buf29_7, %buf29_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_7, "Release", 0) - AIE.use_lock(%lock29_6, "Release", 1) - AIE.end + aie.use_lock(%lock29_7, "Release", 0) + aie.use_lock(%lock29_6, "Release", 1) + aie.end } - %core29_5 = AIE.core(%tile29_5) { - AIE.use_lock(%lock29_6, "Acquire", 1) - AIE.use_lock(%lock29_5, "Acquire", 0) + %core29_5 = aie.core(%tile29_5) { + aie.use_lock(%lock29_6, "Acquire", 1) + aie.use_lock(%lock29_5, "Acquire", 0) func.call @do_sieve(%buf29_6, %buf29_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_6, "Release", 0) - AIE.use_lock(%lock29_5, "Release", 1) - AIE.end + aie.use_lock(%lock29_6, "Release", 0) + aie.use_lock(%lock29_5, "Release", 1) + aie.end } - %core29_4 = AIE.core(%tile29_4) { - AIE.use_lock(%lock29_5, "Acquire", 1) - AIE.use_lock(%lock29_4, "Acquire", 0) + %core29_4 = aie.core(%tile29_4) { + aie.use_lock(%lock29_5, "Acquire", 1) + aie.use_lock(%lock29_4, "Acquire", 0) func.call @do_sieve(%buf29_5, %buf29_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_5, "Release", 0) - AIE.use_lock(%lock29_4, "Release", 1) - AIE.end + aie.use_lock(%lock29_5, "Release", 0) + aie.use_lock(%lock29_4, "Release", 1) + aie.end } - %core29_3 = AIE.core(%tile29_3) { - AIE.use_lock(%lock29_4, "Acquire", 1) - AIE.use_lock(%lock29_3, "Acquire", 0) + %core29_3 = aie.core(%tile29_3) { + aie.use_lock(%lock29_4, "Acquire", 1) + aie.use_lock(%lock29_3, "Acquire", 0) func.call @do_sieve(%buf29_4, %buf29_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_4, "Release", 0) - AIE.use_lock(%lock29_3, "Release", 1) - AIE.end + aie.use_lock(%lock29_4, "Release", 0) + aie.use_lock(%lock29_3, "Release", 1) + aie.end } - %core29_2 = AIE.core(%tile29_2) { - AIE.use_lock(%lock29_3, "Acquire", 1) - AIE.use_lock(%lock29_2, "Acquire", 0) + %core29_2 = aie.core(%tile29_2) { + aie.use_lock(%lock29_3, "Acquire", 1) + aie.use_lock(%lock29_2, "Acquire", 0) func.call @do_sieve(%buf29_3, %buf29_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_3, "Release", 0) - AIE.use_lock(%lock29_2, "Release", 1) - AIE.end + aie.use_lock(%lock29_3, "Release", 0) + aie.use_lock(%lock29_2, "Release", 1) + aie.end } - %core29_1 = AIE.core(%tile29_1) { - AIE.use_lock(%lock29_2, "Acquire", 1) - AIE.use_lock(%lock29_1, "Acquire", 0) + %core29_1 = aie.core(%tile29_1) { + aie.use_lock(%lock29_2, "Acquire", 1) + aie.use_lock(%lock29_1, "Acquire", 0) func.call @do_sieve(%buf29_2, %buf29_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_2, "Release", 0) - AIE.use_lock(%lock29_1, "Release", 1) - AIE.end + aie.use_lock(%lock29_2, "Release", 0) + aie.use_lock(%lock29_1, "Release", 1) + aie.end } - %core30_1 = AIE.core(%tile30_1) { - AIE.use_lock(%lock29_1, "Acquire", 1) - AIE.use_lock(%lock30_1, "Acquire", 0) + %core30_1 = aie.core(%tile30_1) { + aie.use_lock(%lock29_1, "Acquire", 1) + aie.use_lock(%lock30_1, "Acquire", 0) func.call @do_sieve(%buf29_1, %buf30_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock29_1, "Release", 0) - AIE.use_lock(%lock30_1, "Release", 1) - AIE.end + aie.use_lock(%lock29_1, "Release", 0) + aie.use_lock(%lock30_1, "Release", 1) + aie.end } - %core30_2 = AIE.core(%tile30_2) { - AIE.use_lock(%lock30_1, "Acquire", 1) - AIE.use_lock(%lock30_2, "Acquire", 0) + %core30_2 = aie.core(%tile30_2) { + aie.use_lock(%lock30_1, "Acquire", 1) + aie.use_lock(%lock30_2, "Acquire", 0) func.call @do_sieve(%buf30_1, %buf30_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_1, "Release", 0) - AIE.use_lock(%lock30_2, "Release", 1) - AIE.end + aie.use_lock(%lock30_1, "Release", 0) + aie.use_lock(%lock30_2, "Release", 1) + aie.end } - %core30_3 = AIE.core(%tile30_3) { - AIE.use_lock(%lock30_2, "Acquire", 1) - AIE.use_lock(%lock30_3, "Acquire", 0) + %core30_3 = aie.core(%tile30_3) { + aie.use_lock(%lock30_2, "Acquire", 1) + aie.use_lock(%lock30_3, "Acquire", 0) func.call @do_sieve(%buf30_2, %buf30_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_2, "Release", 0) - AIE.use_lock(%lock30_3, "Release", 1) - AIE.end + aie.use_lock(%lock30_2, "Release", 0) + aie.use_lock(%lock30_3, "Release", 1) + aie.end } - %core30_4 = AIE.core(%tile30_4) { - AIE.use_lock(%lock30_3, "Acquire", 1) - AIE.use_lock(%lock30_4, "Acquire", 0) + %core30_4 = aie.core(%tile30_4) { + aie.use_lock(%lock30_3, "Acquire", 1) + aie.use_lock(%lock30_4, "Acquire", 0) func.call @do_sieve(%buf30_3, %buf30_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_3, "Release", 0) - AIE.use_lock(%lock30_4, "Release", 1) - AIE.end + aie.use_lock(%lock30_3, "Release", 0) + aie.use_lock(%lock30_4, "Release", 1) + aie.end } - %core30_5 = AIE.core(%tile30_5) { - AIE.use_lock(%lock30_4, "Acquire", 1) - AIE.use_lock(%lock30_5, "Acquire", 0) + %core30_5 = aie.core(%tile30_5) { + aie.use_lock(%lock30_4, "Acquire", 1) + aie.use_lock(%lock30_5, "Acquire", 0) func.call @do_sieve(%buf30_4, %buf30_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_4, "Release", 0) - AIE.use_lock(%lock30_5, "Release", 1) - AIE.end + aie.use_lock(%lock30_4, "Release", 0) + aie.use_lock(%lock30_5, "Release", 1) + aie.end } - %core30_6 = AIE.core(%tile30_6) { - AIE.use_lock(%lock30_5, "Acquire", 1) - AIE.use_lock(%lock30_6, "Acquire", 0) + %core30_6 = aie.core(%tile30_6) { + aie.use_lock(%lock30_5, "Acquire", 1) + aie.use_lock(%lock30_6, "Acquire", 0) func.call @do_sieve(%buf30_5, %buf30_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_5, "Release", 0) - AIE.use_lock(%lock30_6, "Release", 1) - AIE.end + aie.use_lock(%lock30_5, "Release", 0) + aie.use_lock(%lock30_6, "Release", 1) + aie.end } - %core30_7 = AIE.core(%tile30_7) { - AIE.use_lock(%lock30_6, "Acquire", 1) - AIE.use_lock(%lock30_7, "Acquire", 0) + %core30_7 = aie.core(%tile30_7) { + aie.use_lock(%lock30_6, "Acquire", 1) + aie.use_lock(%lock30_7, "Acquire", 0) func.call @do_sieve(%buf30_6, %buf30_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_6, "Release", 0) - AIE.use_lock(%lock30_7, "Release", 1) - AIE.end + aie.use_lock(%lock30_6, "Release", 0) + aie.use_lock(%lock30_7, "Release", 1) + aie.end } - %core30_8 = AIE.core(%tile30_8) { - AIE.use_lock(%lock30_7, "Acquire", 1) - AIE.use_lock(%lock30_8, "Acquire", 0) + %core30_8 = aie.core(%tile30_8) { + aie.use_lock(%lock30_7, "Acquire", 1) + aie.use_lock(%lock30_8, "Acquire", 0) func.call @do_sieve(%buf30_7, %buf30_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_7, "Release", 0) - AIE.use_lock(%lock30_8, "Release", 1) - AIE.end + aie.use_lock(%lock30_7, "Release", 0) + aie.use_lock(%lock30_8, "Release", 1) + aie.end } - %core31_8 = AIE.core(%tile31_8) { - AIE.use_lock(%lock30_8, "Acquire", 1) - AIE.use_lock(%lock31_8, "Acquire", 0) + %core31_8 = aie.core(%tile31_8) { + aie.use_lock(%lock30_8, "Acquire", 1) + aie.use_lock(%lock31_8, "Acquire", 0) func.call @do_sieve(%buf30_8, %buf31_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock30_8, "Release", 0) - AIE.use_lock(%lock31_8, "Release", 1) - AIE.end + aie.use_lock(%lock30_8, "Release", 0) + aie.use_lock(%lock31_8, "Release", 1) + aie.end } - %core31_7 = AIE.core(%tile31_7) { - AIE.use_lock(%lock31_8, "Acquire", 1) - AIE.use_lock(%lock31_7, "Acquire", 0) + %core31_7 = aie.core(%tile31_7) { + aie.use_lock(%lock31_8, "Acquire", 1) + aie.use_lock(%lock31_7, "Acquire", 0) func.call @do_sieve(%buf31_8, %buf31_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_8, "Release", 0) - AIE.use_lock(%lock31_7, "Release", 1) - AIE.end + aie.use_lock(%lock31_8, "Release", 0) + aie.use_lock(%lock31_7, "Release", 1) + aie.end } - %core31_6 = AIE.core(%tile31_6) { - AIE.use_lock(%lock31_7, "Acquire", 1) - AIE.use_lock(%lock31_6, "Acquire", 0) + %core31_6 = aie.core(%tile31_6) { + aie.use_lock(%lock31_7, "Acquire", 1) + aie.use_lock(%lock31_6, "Acquire", 0) func.call @do_sieve(%buf31_7, %buf31_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_7, "Release", 0) - AIE.use_lock(%lock31_6, "Release", 1) - AIE.end + aie.use_lock(%lock31_7, "Release", 0) + aie.use_lock(%lock31_6, "Release", 1) + aie.end } - %core31_5 = AIE.core(%tile31_5) { - AIE.use_lock(%lock31_6, "Acquire", 1) - AIE.use_lock(%lock31_5, "Acquire", 0) + %core31_5 = aie.core(%tile31_5) { + aie.use_lock(%lock31_6, "Acquire", 1) + aie.use_lock(%lock31_5, "Acquire", 0) func.call @do_sieve(%buf31_6, %buf31_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_6, "Release", 0) - AIE.use_lock(%lock31_5, "Release", 1) - AIE.end + aie.use_lock(%lock31_6, "Release", 0) + aie.use_lock(%lock31_5, "Release", 1) + aie.end } - %core31_4 = AIE.core(%tile31_4) { - AIE.use_lock(%lock31_5, "Acquire", 1) - AIE.use_lock(%lock31_4, "Acquire", 0) + %core31_4 = aie.core(%tile31_4) { + aie.use_lock(%lock31_5, "Acquire", 1) + aie.use_lock(%lock31_4, "Acquire", 0) func.call @do_sieve(%buf31_5, %buf31_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_5, "Release", 0) - AIE.use_lock(%lock31_4, "Release", 1) - AIE.end + aie.use_lock(%lock31_5, "Release", 0) + aie.use_lock(%lock31_4, "Release", 1) + aie.end } - %core31_3 = AIE.core(%tile31_3) { - AIE.use_lock(%lock31_4, "Acquire", 1) - AIE.use_lock(%lock31_3, "Acquire", 0) + %core31_3 = aie.core(%tile31_3) { + aie.use_lock(%lock31_4, "Acquire", 1) + aie.use_lock(%lock31_3, "Acquire", 0) func.call @do_sieve(%buf31_4, %buf31_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_4, "Release", 0) - AIE.use_lock(%lock31_3, "Release", 1) - AIE.end + aie.use_lock(%lock31_4, "Release", 0) + aie.use_lock(%lock31_3, "Release", 1) + aie.end } - %core31_2 = AIE.core(%tile31_2) { - AIE.use_lock(%lock31_3, "Acquire", 1) - AIE.use_lock(%lock31_2, "Acquire", 0) + %core31_2 = aie.core(%tile31_2) { + aie.use_lock(%lock31_3, "Acquire", 1) + aie.use_lock(%lock31_2, "Acquire", 0) func.call @do_sieve(%buf31_3, %buf31_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_3, "Release", 0) - AIE.use_lock(%lock31_2, "Release", 1) - AIE.end + aie.use_lock(%lock31_3, "Release", 0) + aie.use_lock(%lock31_2, "Release", 1) + aie.end } - %core31_1 = AIE.core(%tile31_1) { - AIE.use_lock(%lock31_2, "Acquire", 1) - AIE.use_lock(%lock31_1, "Acquire", 0) + %core31_1 = aie.core(%tile31_1) { + aie.use_lock(%lock31_2, "Acquire", 1) + aie.use_lock(%lock31_1, "Acquire", 0) func.call @do_sieve(%buf31_2, %buf31_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_2, "Release", 0) - AIE.use_lock(%lock31_1, "Release", 1) - AIE.end + aie.use_lock(%lock31_2, "Release", 0) + aie.use_lock(%lock31_1, "Release", 1) + aie.end } - %core32_1 = AIE.core(%tile32_1) { - AIE.use_lock(%lock31_1, "Acquire", 1) - AIE.use_lock(%lock32_1, "Acquire", 0) + %core32_1 = aie.core(%tile32_1) { + aie.use_lock(%lock31_1, "Acquire", 1) + aie.use_lock(%lock32_1, "Acquire", 0) func.call @do_sieve(%buf31_1, %buf32_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock31_1, "Release", 0) - AIE.use_lock(%lock32_1, "Release", 1) - AIE.end + aie.use_lock(%lock31_1, "Release", 0) + aie.use_lock(%lock32_1, "Release", 1) + aie.end } - %core32_2 = AIE.core(%tile32_2) { - AIE.use_lock(%lock32_1, "Acquire", 1) - AIE.use_lock(%lock32_2, "Acquire", 0) + %core32_2 = aie.core(%tile32_2) { + aie.use_lock(%lock32_1, "Acquire", 1) + aie.use_lock(%lock32_2, "Acquire", 0) func.call @do_sieve(%buf32_1, %buf32_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_1, "Release", 0) - AIE.use_lock(%lock32_2, "Release", 1) - AIE.end + aie.use_lock(%lock32_1, "Release", 0) + aie.use_lock(%lock32_2, "Release", 1) + aie.end } - %core32_3 = AIE.core(%tile32_3) { - AIE.use_lock(%lock32_2, "Acquire", 1) - AIE.use_lock(%lock32_3, "Acquire", 0) + %core32_3 = aie.core(%tile32_3) { + aie.use_lock(%lock32_2, "Acquire", 1) + aie.use_lock(%lock32_3, "Acquire", 0) func.call @do_sieve(%buf32_2, %buf32_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_2, "Release", 0) - AIE.use_lock(%lock32_3, "Release", 1) - AIE.end + aie.use_lock(%lock32_2, "Release", 0) + aie.use_lock(%lock32_3, "Release", 1) + aie.end } - %core32_4 = AIE.core(%tile32_4) { - AIE.use_lock(%lock32_3, "Acquire", 1) - AIE.use_lock(%lock32_4, "Acquire", 0) + %core32_4 = aie.core(%tile32_4) { + aie.use_lock(%lock32_3, "Acquire", 1) + aie.use_lock(%lock32_4, "Acquire", 0) func.call @do_sieve(%buf32_3, %buf32_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_3, "Release", 0) - AIE.use_lock(%lock32_4, "Release", 1) - AIE.end + aie.use_lock(%lock32_3, "Release", 0) + aie.use_lock(%lock32_4, "Release", 1) + aie.end } - %core32_5 = AIE.core(%tile32_5) { - AIE.use_lock(%lock32_4, "Acquire", 1) - AIE.use_lock(%lock32_5, "Acquire", 0) + %core32_5 = aie.core(%tile32_5) { + aie.use_lock(%lock32_4, "Acquire", 1) + aie.use_lock(%lock32_5, "Acquire", 0) func.call @do_sieve(%buf32_4, %buf32_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_4, "Release", 0) - AIE.use_lock(%lock32_5, "Release", 1) - AIE.end + aie.use_lock(%lock32_4, "Release", 0) + aie.use_lock(%lock32_5, "Release", 1) + aie.end } - %core32_6 = AIE.core(%tile32_6) { - AIE.use_lock(%lock32_5, "Acquire", 1) - AIE.use_lock(%lock32_6, "Acquire", 0) + %core32_6 = aie.core(%tile32_6) { + aie.use_lock(%lock32_5, "Acquire", 1) + aie.use_lock(%lock32_6, "Acquire", 0) func.call @do_sieve(%buf32_5, %buf32_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_5, "Release", 0) - AIE.use_lock(%lock32_6, "Release", 1) - AIE.end + aie.use_lock(%lock32_5, "Release", 0) + aie.use_lock(%lock32_6, "Release", 1) + aie.end } - %core32_7 = AIE.core(%tile32_7) { - AIE.use_lock(%lock32_6, "Acquire", 1) - AIE.use_lock(%lock32_7, "Acquire", 0) + %core32_7 = aie.core(%tile32_7) { + aie.use_lock(%lock32_6, "Acquire", 1) + aie.use_lock(%lock32_7, "Acquire", 0) func.call @do_sieve(%buf32_6, %buf32_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_6, "Release", 0) - AIE.use_lock(%lock32_7, "Release", 1) - AIE.end + aie.use_lock(%lock32_6, "Release", 0) + aie.use_lock(%lock32_7, "Release", 1) + aie.end } - %core32_8 = AIE.core(%tile32_8) { - AIE.use_lock(%lock32_7, "Acquire", 1) - AIE.use_lock(%lock32_8, "Acquire", 0) + %core32_8 = aie.core(%tile32_8) { + aie.use_lock(%lock32_7, "Acquire", 1) + aie.use_lock(%lock32_8, "Acquire", 0) func.call @do_sieve(%buf32_7, %buf32_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_7, "Release", 0) - AIE.use_lock(%lock32_8, "Release", 1) - AIE.end + aie.use_lock(%lock32_7, "Release", 0) + aie.use_lock(%lock32_8, "Release", 1) + aie.end } - %core33_8 = AIE.core(%tile33_8) { - AIE.use_lock(%lock32_8, "Acquire", 1) - AIE.use_lock(%lock33_8, "Acquire", 0) + %core33_8 = aie.core(%tile33_8) { + aie.use_lock(%lock32_8, "Acquire", 1) + aie.use_lock(%lock33_8, "Acquire", 0) func.call @do_sieve(%buf32_8, %buf33_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock32_8, "Release", 0) - AIE.use_lock(%lock33_8, "Release", 1) - AIE.end + aie.use_lock(%lock32_8, "Release", 0) + aie.use_lock(%lock33_8, "Release", 1) + aie.end } - %core33_7 = AIE.core(%tile33_7) { - AIE.use_lock(%lock33_8, "Acquire", 1) - AIE.use_lock(%lock33_7, "Acquire", 0) + %core33_7 = aie.core(%tile33_7) { + aie.use_lock(%lock33_8, "Acquire", 1) + aie.use_lock(%lock33_7, "Acquire", 0) func.call @do_sieve(%buf33_8, %buf33_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_8, "Release", 0) - AIE.use_lock(%lock33_7, "Release", 1) - AIE.end + aie.use_lock(%lock33_8, "Release", 0) + aie.use_lock(%lock33_7, "Release", 1) + aie.end } - %core33_6 = AIE.core(%tile33_6) { - AIE.use_lock(%lock33_7, "Acquire", 1) - AIE.use_lock(%lock33_6, "Acquire", 0) + %core33_6 = aie.core(%tile33_6) { + aie.use_lock(%lock33_7, "Acquire", 1) + aie.use_lock(%lock33_6, "Acquire", 0) func.call @do_sieve(%buf33_7, %buf33_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_7, "Release", 0) - AIE.use_lock(%lock33_6, "Release", 1) - AIE.end + aie.use_lock(%lock33_7, "Release", 0) + aie.use_lock(%lock33_6, "Release", 1) + aie.end } - %core33_5 = AIE.core(%tile33_5) { - AIE.use_lock(%lock33_6, "Acquire", 1) - AIE.use_lock(%lock33_5, "Acquire", 0) + %core33_5 = aie.core(%tile33_5) { + aie.use_lock(%lock33_6, "Acquire", 1) + aie.use_lock(%lock33_5, "Acquire", 0) func.call @do_sieve(%buf33_6, %buf33_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_6, "Release", 0) - AIE.use_lock(%lock33_5, "Release", 1) - AIE.end + aie.use_lock(%lock33_6, "Release", 0) + aie.use_lock(%lock33_5, "Release", 1) + aie.end } - %core33_4 = AIE.core(%tile33_4) { - AIE.use_lock(%lock33_5, "Acquire", 1) - AIE.use_lock(%lock33_4, "Acquire", 0) + %core33_4 = aie.core(%tile33_4) { + aie.use_lock(%lock33_5, "Acquire", 1) + aie.use_lock(%lock33_4, "Acquire", 0) func.call @do_sieve(%buf33_5, %buf33_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_5, "Release", 0) - AIE.use_lock(%lock33_4, "Release", 1) - AIE.end + aie.use_lock(%lock33_5, "Release", 0) + aie.use_lock(%lock33_4, "Release", 1) + aie.end } - %core33_3 = AIE.core(%tile33_3) { - AIE.use_lock(%lock33_4, "Acquire", 1) - AIE.use_lock(%lock33_3, "Acquire", 0) + %core33_3 = aie.core(%tile33_3) { + aie.use_lock(%lock33_4, "Acquire", 1) + aie.use_lock(%lock33_3, "Acquire", 0) func.call @do_sieve(%buf33_4, %buf33_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_4, "Release", 0) - AIE.use_lock(%lock33_3, "Release", 1) - AIE.end + aie.use_lock(%lock33_4, "Release", 0) + aie.use_lock(%lock33_3, "Release", 1) + aie.end } - %core33_2 = AIE.core(%tile33_2) { - AIE.use_lock(%lock33_3, "Acquire", 1) - AIE.use_lock(%lock33_2, "Acquire", 0) + %core33_2 = aie.core(%tile33_2) { + aie.use_lock(%lock33_3, "Acquire", 1) + aie.use_lock(%lock33_2, "Acquire", 0) func.call @do_sieve(%buf33_3, %buf33_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_3, "Release", 0) - AIE.use_lock(%lock33_2, "Release", 1) - AIE.end + aie.use_lock(%lock33_3, "Release", 0) + aie.use_lock(%lock33_2, "Release", 1) + aie.end } - %core33_1 = AIE.core(%tile33_1) { - AIE.use_lock(%lock33_2, "Acquire", 1) - AIE.use_lock(%lock33_1, "Acquire", 0) + %core33_1 = aie.core(%tile33_1) { + aie.use_lock(%lock33_2, "Acquire", 1) + aie.use_lock(%lock33_1, "Acquire", 0) func.call @do_sieve(%buf33_2, %buf33_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_2, "Release", 0) - AIE.use_lock(%lock33_1, "Release", 1) - AIE.end + aie.use_lock(%lock33_2, "Release", 0) + aie.use_lock(%lock33_1, "Release", 1) + aie.end } - %core34_1 = AIE.core(%tile34_1) { - AIE.use_lock(%lock33_1, "Acquire", 1) - AIE.use_lock(%lock34_1, "Acquire", 0) + %core34_1 = aie.core(%tile34_1) { + aie.use_lock(%lock33_1, "Acquire", 1) + aie.use_lock(%lock34_1, "Acquire", 0) func.call @do_sieve(%buf33_1, %buf34_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock33_1, "Release", 0) - AIE.use_lock(%lock34_1, "Release", 1) - AIE.end + aie.use_lock(%lock33_1, "Release", 0) + aie.use_lock(%lock34_1, "Release", 1) + aie.end } - %core34_2 = AIE.core(%tile34_2) { - AIE.use_lock(%lock34_1, "Acquire", 1) - AIE.use_lock(%lock34_2, "Acquire", 0) + %core34_2 = aie.core(%tile34_2) { + aie.use_lock(%lock34_1, "Acquire", 1) + aie.use_lock(%lock34_2, "Acquire", 0) func.call @do_sieve(%buf34_1, %buf34_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_1, "Release", 0) - AIE.use_lock(%lock34_2, "Release", 1) - AIE.end + aie.use_lock(%lock34_1, "Release", 0) + aie.use_lock(%lock34_2, "Release", 1) + aie.end } - %core34_3 = AIE.core(%tile34_3) { - AIE.use_lock(%lock34_2, "Acquire", 1) - AIE.use_lock(%lock34_3, "Acquire", 0) + %core34_3 = aie.core(%tile34_3) { + aie.use_lock(%lock34_2, "Acquire", 1) + aie.use_lock(%lock34_3, "Acquire", 0) func.call @do_sieve(%buf34_2, %buf34_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_2, "Release", 0) - AIE.use_lock(%lock34_3, "Release", 1) - AIE.end + aie.use_lock(%lock34_2, "Release", 0) + aie.use_lock(%lock34_3, "Release", 1) + aie.end } - %core34_4 = AIE.core(%tile34_4) { - AIE.use_lock(%lock34_3, "Acquire", 1) - AIE.use_lock(%lock34_4, "Acquire", 0) + %core34_4 = aie.core(%tile34_4) { + aie.use_lock(%lock34_3, "Acquire", 1) + aie.use_lock(%lock34_4, "Acquire", 0) func.call @do_sieve(%buf34_3, %buf34_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_3, "Release", 0) - AIE.use_lock(%lock34_4, "Release", 1) - AIE.end + aie.use_lock(%lock34_3, "Release", 0) + aie.use_lock(%lock34_4, "Release", 1) + aie.end } - %core34_5 = AIE.core(%tile34_5) { - AIE.use_lock(%lock34_4, "Acquire", 1) - AIE.use_lock(%lock34_5, "Acquire", 0) + %core34_5 = aie.core(%tile34_5) { + aie.use_lock(%lock34_4, "Acquire", 1) + aie.use_lock(%lock34_5, "Acquire", 0) func.call @do_sieve(%buf34_4, %buf34_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_4, "Release", 0) - AIE.use_lock(%lock34_5, "Release", 1) - AIE.end + aie.use_lock(%lock34_4, "Release", 0) + aie.use_lock(%lock34_5, "Release", 1) + aie.end } - %core34_6 = AIE.core(%tile34_6) { - AIE.use_lock(%lock34_5, "Acquire", 1) - AIE.use_lock(%lock34_6, "Acquire", 0) + %core34_6 = aie.core(%tile34_6) { + aie.use_lock(%lock34_5, "Acquire", 1) + aie.use_lock(%lock34_6, "Acquire", 0) func.call @do_sieve(%buf34_5, %buf34_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_5, "Release", 0) - AIE.use_lock(%lock34_6, "Release", 1) - AIE.end + aie.use_lock(%lock34_5, "Release", 0) + aie.use_lock(%lock34_6, "Release", 1) + aie.end } - %core34_7 = AIE.core(%tile34_7) { - AIE.use_lock(%lock34_6, "Acquire", 1) - AIE.use_lock(%lock34_7, "Acquire", 0) + %core34_7 = aie.core(%tile34_7) { + aie.use_lock(%lock34_6, "Acquire", 1) + aie.use_lock(%lock34_7, "Acquire", 0) func.call @do_sieve(%buf34_6, %buf34_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_6, "Release", 0) - AIE.use_lock(%lock34_7, "Release", 1) - AIE.end + aie.use_lock(%lock34_6, "Release", 0) + aie.use_lock(%lock34_7, "Release", 1) + aie.end } - %core34_8 = AIE.core(%tile34_8) { - AIE.use_lock(%lock34_7, "Acquire", 1) - AIE.use_lock(%lock34_8, "Acquire", 0) + %core34_8 = aie.core(%tile34_8) { + aie.use_lock(%lock34_7, "Acquire", 1) + aie.use_lock(%lock34_8, "Acquire", 0) func.call @do_sieve(%buf34_7, %buf34_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_7, "Release", 0) - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_7, "Release", 0) + aie.use_lock(%lock34_8, "Release", 1) + aie.end } - %core35_8 = AIE.core(%tile35_8) { - AIE.use_lock(%lock34_8, "Acquire", 1) - AIE.use_lock(%lock35_8, "Acquire", 0) + %core35_8 = aie.core(%tile35_8) { + aie.use_lock(%lock34_8, "Acquire", 1) + aie.use_lock(%lock35_8, "Acquire", 0) func.call @do_sieve(%buf34_8, %buf35_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock34_8, "Release", 0) - AIE.use_lock(%lock35_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_8, "Release", 0) + aie.use_lock(%lock35_8, "Release", 1) + aie.end } - %core35_7 = AIE.core(%tile35_7) { - AIE.use_lock(%lock35_8, "Acquire", 1) - AIE.use_lock(%lock35_7, "Acquire", 0) + %core35_7 = aie.core(%tile35_7) { + aie.use_lock(%lock35_8, "Acquire", 1) + aie.use_lock(%lock35_7, "Acquire", 0) func.call @do_sieve(%buf35_8, %buf35_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_8, "Release", 0) - AIE.use_lock(%lock35_7, "Release", 1) - AIE.end + aie.use_lock(%lock35_8, "Release", 0) + aie.use_lock(%lock35_7, "Release", 1) + aie.end } - %core35_6 = AIE.core(%tile35_6) { - AIE.use_lock(%lock35_7, "Acquire", 1) - AIE.use_lock(%lock35_6, "Acquire", 0) + %core35_6 = aie.core(%tile35_6) { + aie.use_lock(%lock35_7, "Acquire", 1) + aie.use_lock(%lock35_6, "Acquire", 0) func.call @do_sieve(%buf35_7, %buf35_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_7, "Release", 0) - AIE.use_lock(%lock35_6, "Release", 1) - AIE.end + aie.use_lock(%lock35_7, "Release", 0) + aie.use_lock(%lock35_6, "Release", 1) + aie.end } - %core35_5 = AIE.core(%tile35_5) { - AIE.use_lock(%lock35_6, "Acquire", 1) - AIE.use_lock(%lock35_5, "Acquire", 0) + %core35_5 = aie.core(%tile35_5) { + aie.use_lock(%lock35_6, "Acquire", 1) + aie.use_lock(%lock35_5, "Acquire", 0) func.call @do_sieve(%buf35_6, %buf35_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_6, "Release", 0) - AIE.use_lock(%lock35_5, "Release", 1) - AIE.end + aie.use_lock(%lock35_6, "Release", 0) + aie.use_lock(%lock35_5, "Release", 1) + aie.end } - %core35_4 = AIE.core(%tile35_4) { - AIE.use_lock(%lock35_5, "Acquire", 1) - AIE.use_lock(%lock35_4, "Acquire", 0) + %core35_4 = aie.core(%tile35_4) { + aie.use_lock(%lock35_5, "Acquire", 1) + aie.use_lock(%lock35_4, "Acquire", 0) func.call @do_sieve(%buf35_5, %buf35_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_5, "Release", 0) - AIE.use_lock(%lock35_4, "Release", 1) - AIE.end + aie.use_lock(%lock35_5, "Release", 0) + aie.use_lock(%lock35_4, "Release", 1) + aie.end } - %core35_3 = AIE.core(%tile35_3) { - AIE.use_lock(%lock35_4, "Acquire", 1) - AIE.use_lock(%lock35_3, "Acquire", 0) + %core35_3 = aie.core(%tile35_3) { + aie.use_lock(%lock35_4, "Acquire", 1) + aie.use_lock(%lock35_3, "Acquire", 0) func.call @do_sieve(%buf35_4, %buf35_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_4, "Release", 0) - AIE.use_lock(%lock35_3, "Release", 1) - AIE.end + aie.use_lock(%lock35_4, "Release", 0) + aie.use_lock(%lock35_3, "Release", 1) + aie.end } - %core35_2 = AIE.core(%tile35_2) { - AIE.use_lock(%lock35_3, "Acquire", 1) - AIE.use_lock(%lock35_2, "Acquire", 0) + %core35_2 = aie.core(%tile35_2) { + aie.use_lock(%lock35_3, "Acquire", 1) + aie.use_lock(%lock35_2, "Acquire", 0) func.call @do_sieve(%buf35_3, %buf35_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_3, "Release", 0) - AIE.use_lock(%lock35_2, "Release", 1) - AIE.end + aie.use_lock(%lock35_3, "Release", 0) + aie.use_lock(%lock35_2, "Release", 1) + aie.end } - %core35_1 = AIE.core(%tile35_1) { - AIE.use_lock(%lock35_2, "Acquire", 1) - AIE.use_lock(%lock35_1, "Acquire", 0) + %core35_1 = aie.core(%tile35_1) { + aie.use_lock(%lock35_2, "Acquire", 1) + aie.use_lock(%lock35_1, "Acquire", 0) func.call @do_sieve(%buf35_2, %buf35_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_2, "Release", 0) - AIE.use_lock(%lock35_1, "Release", 1) - AIE.end + aie.use_lock(%lock35_2, "Release", 0) + aie.use_lock(%lock35_1, "Release", 1) + aie.end } - %core36_1 = AIE.core(%tile36_1) { - AIE.use_lock(%lock35_1, "Acquire", 1) - AIE.use_lock(%lock36_1, "Acquire", 0) + %core36_1 = aie.core(%tile36_1) { + aie.use_lock(%lock35_1, "Acquire", 1) + aie.use_lock(%lock36_1, "Acquire", 0) func.call @do_sieve(%buf35_1, %buf36_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock35_1, "Release", 0) - AIE.use_lock(%lock36_1, "Release", 1) - AIE.end + aie.use_lock(%lock35_1, "Release", 0) + aie.use_lock(%lock36_1, "Release", 1) + aie.end } - %core36_2 = AIE.core(%tile36_2) { - AIE.use_lock(%lock36_1, "Acquire", 1) - AIE.use_lock(%lock36_2, "Acquire", 0) + %core36_2 = aie.core(%tile36_2) { + aie.use_lock(%lock36_1, "Acquire", 1) + aie.use_lock(%lock36_2, "Acquire", 0) func.call @do_sieve(%buf36_1, %buf36_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_1, "Release", 0) - AIE.use_lock(%lock36_2, "Release", 1) - AIE.end + aie.use_lock(%lock36_1, "Release", 0) + aie.use_lock(%lock36_2, "Release", 1) + aie.end } - %core36_3 = AIE.core(%tile36_3) { - AIE.use_lock(%lock36_2, "Acquire", 1) - AIE.use_lock(%lock36_3, "Acquire", 0) + %core36_3 = aie.core(%tile36_3) { + aie.use_lock(%lock36_2, "Acquire", 1) + aie.use_lock(%lock36_3, "Acquire", 0) func.call @do_sieve(%buf36_2, %buf36_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_2, "Release", 0) - AIE.use_lock(%lock36_3, "Release", 1) - AIE.end + aie.use_lock(%lock36_2, "Release", 0) + aie.use_lock(%lock36_3, "Release", 1) + aie.end } - %core36_4 = AIE.core(%tile36_4) { - AIE.use_lock(%lock36_3, "Acquire", 1) - AIE.use_lock(%lock36_4, "Acquire", 0) + %core36_4 = aie.core(%tile36_4) { + aie.use_lock(%lock36_3, "Acquire", 1) + aie.use_lock(%lock36_4, "Acquire", 0) func.call @do_sieve(%buf36_3, %buf36_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_3, "Release", 0) - AIE.use_lock(%lock36_4, "Release", 1) - AIE.end + aie.use_lock(%lock36_3, "Release", 0) + aie.use_lock(%lock36_4, "Release", 1) + aie.end } - %core36_5 = AIE.core(%tile36_5) { - AIE.use_lock(%lock36_4, "Acquire", 1) - AIE.use_lock(%lock36_5, "Acquire", 0) + %core36_5 = aie.core(%tile36_5) { + aie.use_lock(%lock36_4, "Acquire", 1) + aie.use_lock(%lock36_5, "Acquire", 0) func.call @do_sieve(%buf36_4, %buf36_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_4, "Release", 0) - AIE.use_lock(%lock36_5, "Release", 1) - AIE.end + aie.use_lock(%lock36_4, "Release", 0) + aie.use_lock(%lock36_5, "Release", 1) + aie.end } - %core36_6 = AIE.core(%tile36_6) { - AIE.use_lock(%lock36_5, "Acquire", 1) - AIE.use_lock(%lock36_6, "Acquire", 0) + %core36_6 = aie.core(%tile36_6) { + aie.use_lock(%lock36_5, "Acquire", 1) + aie.use_lock(%lock36_6, "Acquire", 0) func.call @do_sieve(%buf36_5, %buf36_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_5, "Release", 0) - AIE.use_lock(%lock36_6, "Release", 1) - AIE.end + aie.use_lock(%lock36_5, "Release", 0) + aie.use_lock(%lock36_6, "Release", 1) + aie.end } - %core36_7 = AIE.core(%tile36_7) { - AIE.use_lock(%lock36_6, "Acquire", 1) - AIE.use_lock(%lock36_7, "Acquire", 0) + %core36_7 = aie.core(%tile36_7) { + aie.use_lock(%lock36_6, "Acquire", 1) + aie.use_lock(%lock36_7, "Acquire", 0) func.call @do_sieve(%buf36_6, %buf36_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_6, "Release", 0) - AIE.use_lock(%lock36_7, "Release", 1) - AIE.end + aie.use_lock(%lock36_6, "Release", 0) + aie.use_lock(%lock36_7, "Release", 1) + aie.end } - %core36_8 = AIE.core(%tile36_8) { - AIE.use_lock(%lock36_7, "Acquire", 1) - AIE.use_lock(%lock36_8, "Acquire", 0) + %core36_8 = aie.core(%tile36_8) { + aie.use_lock(%lock36_7, "Acquire", 1) + aie.use_lock(%lock36_8, "Acquire", 0) func.call @do_sieve(%buf36_7, %buf36_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_7, "Release", 0) - AIE.use_lock(%lock36_8, "Release", 1) - AIE.end + aie.use_lock(%lock36_7, "Release", 0) + aie.use_lock(%lock36_8, "Release", 1) + aie.end } - %core37_8 = AIE.core(%tile37_8) { - AIE.use_lock(%lock36_8, "Acquire", 1) - AIE.use_lock(%lock37_8, "Acquire", 0) + %core37_8 = aie.core(%tile37_8) { + aie.use_lock(%lock36_8, "Acquire", 1) + aie.use_lock(%lock37_8, "Acquire", 0) func.call @do_sieve(%buf36_8, %buf37_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock36_8, "Release", 0) - AIE.use_lock(%lock37_8, "Release", 1) - AIE.end + aie.use_lock(%lock36_8, "Release", 0) + aie.use_lock(%lock37_8, "Release", 1) + aie.end } - %core37_7 = AIE.core(%tile37_7) { - AIE.use_lock(%lock37_8, "Acquire", 1) - AIE.use_lock(%lock37_7, "Acquire", 0) + %core37_7 = aie.core(%tile37_7) { + aie.use_lock(%lock37_8, "Acquire", 1) + aie.use_lock(%lock37_7, "Acquire", 0) func.call @do_sieve(%buf37_8, %buf37_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_8, "Release", 0) - AIE.use_lock(%lock37_7, "Release", 1) - AIE.end + aie.use_lock(%lock37_8, "Release", 0) + aie.use_lock(%lock37_7, "Release", 1) + aie.end } - %core37_6 = AIE.core(%tile37_6) { - AIE.use_lock(%lock37_7, "Acquire", 1) - AIE.use_lock(%lock37_6, "Acquire", 0) + %core37_6 = aie.core(%tile37_6) { + aie.use_lock(%lock37_7, "Acquire", 1) + aie.use_lock(%lock37_6, "Acquire", 0) func.call @do_sieve(%buf37_7, %buf37_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_7, "Release", 0) - AIE.use_lock(%lock37_6, "Release", 1) - AIE.end + aie.use_lock(%lock37_7, "Release", 0) + aie.use_lock(%lock37_6, "Release", 1) + aie.end } - %core37_5 = AIE.core(%tile37_5) { - AIE.use_lock(%lock37_6, "Acquire", 1) - AIE.use_lock(%lock37_5, "Acquire", 0) + %core37_5 = aie.core(%tile37_5) { + aie.use_lock(%lock37_6, "Acquire", 1) + aie.use_lock(%lock37_5, "Acquire", 0) func.call @do_sieve(%buf37_6, %buf37_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_6, "Release", 0) - AIE.use_lock(%lock37_5, "Release", 1) - AIE.end + aie.use_lock(%lock37_6, "Release", 0) + aie.use_lock(%lock37_5, "Release", 1) + aie.end } - %core37_4 = AIE.core(%tile37_4) { - AIE.use_lock(%lock37_5, "Acquire", 1) - AIE.use_lock(%lock37_4, "Acquire", 0) + %core37_4 = aie.core(%tile37_4) { + aie.use_lock(%lock37_5, "Acquire", 1) + aie.use_lock(%lock37_4, "Acquire", 0) func.call @do_sieve(%buf37_5, %buf37_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_5, "Release", 0) - AIE.use_lock(%lock37_4, "Release", 1) - AIE.end + aie.use_lock(%lock37_5, "Release", 0) + aie.use_lock(%lock37_4, "Release", 1) + aie.end } - %core37_3 = AIE.core(%tile37_3) { - AIE.use_lock(%lock37_4, "Acquire", 1) - AIE.use_lock(%lock37_3, "Acquire", 0) + %core37_3 = aie.core(%tile37_3) { + aie.use_lock(%lock37_4, "Acquire", 1) + aie.use_lock(%lock37_3, "Acquire", 0) func.call @do_sieve(%buf37_4, %buf37_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_4, "Release", 0) - AIE.use_lock(%lock37_3, "Release", 1) - AIE.end + aie.use_lock(%lock37_4, "Release", 0) + aie.use_lock(%lock37_3, "Release", 1) + aie.end } - %core37_2 = AIE.core(%tile37_2) { - AIE.use_lock(%lock37_3, "Acquire", 1) - AIE.use_lock(%lock37_2, "Acquire", 0) + %core37_2 = aie.core(%tile37_2) { + aie.use_lock(%lock37_3, "Acquire", 1) + aie.use_lock(%lock37_2, "Acquire", 0) func.call @do_sieve(%buf37_3, %buf37_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_3, "Release", 0) - AIE.use_lock(%lock37_2, "Release", 1) - AIE.end + aie.use_lock(%lock37_3, "Release", 0) + aie.use_lock(%lock37_2, "Release", 1) + aie.end } - %core37_1 = AIE.core(%tile37_1) { - AIE.use_lock(%lock37_2, "Acquire", 1) - AIE.use_lock(%lock37_1, "Acquire", 0) + %core37_1 = aie.core(%tile37_1) { + aie.use_lock(%lock37_2, "Acquire", 1) + aie.use_lock(%lock37_1, "Acquire", 0) func.call @do_sieve(%buf37_2, %buf37_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_2, "Release", 0) - AIE.use_lock(%lock37_1, "Release", 1) - AIE.end + aie.use_lock(%lock37_2, "Release", 0) + aie.use_lock(%lock37_1, "Release", 1) + aie.end } - %core38_1 = AIE.core(%tile38_1) { - AIE.use_lock(%lock37_1, "Acquire", 1) - AIE.use_lock(%lock38_1, "Acquire", 0) + %core38_1 = aie.core(%tile38_1) { + aie.use_lock(%lock37_1, "Acquire", 1) + aie.use_lock(%lock38_1, "Acquire", 0) func.call @do_sieve(%buf37_1, %buf38_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock37_1, "Release", 0) - AIE.use_lock(%lock38_1, "Release", 1) - AIE.end + aie.use_lock(%lock37_1, "Release", 0) + aie.use_lock(%lock38_1, "Release", 1) + aie.end } - %core38_2 = AIE.core(%tile38_2) { - AIE.use_lock(%lock38_1, "Acquire", 1) - AIE.use_lock(%lock38_2, "Acquire", 0) + %core38_2 = aie.core(%tile38_2) { + aie.use_lock(%lock38_1, "Acquire", 1) + aie.use_lock(%lock38_2, "Acquire", 0) func.call @do_sieve(%buf38_1, %buf38_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_1, "Release", 0) - AIE.use_lock(%lock38_2, "Release", 1) - AIE.end + aie.use_lock(%lock38_1, "Release", 0) + aie.use_lock(%lock38_2, "Release", 1) + aie.end } - %core38_3 = AIE.core(%tile38_3) { - AIE.use_lock(%lock38_2, "Acquire", 1) - AIE.use_lock(%lock38_3, "Acquire", 0) + %core38_3 = aie.core(%tile38_3) { + aie.use_lock(%lock38_2, "Acquire", 1) + aie.use_lock(%lock38_3, "Acquire", 0) func.call @do_sieve(%buf38_2, %buf38_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_2, "Release", 0) - AIE.use_lock(%lock38_3, "Release", 1) - AIE.end + aie.use_lock(%lock38_2, "Release", 0) + aie.use_lock(%lock38_3, "Release", 1) + aie.end } - %core38_4 = AIE.core(%tile38_4) { - AIE.use_lock(%lock38_3, "Acquire", 1) - AIE.use_lock(%lock38_4, "Acquire", 0) + %core38_4 = aie.core(%tile38_4) { + aie.use_lock(%lock38_3, "Acquire", 1) + aie.use_lock(%lock38_4, "Acquire", 0) func.call @do_sieve(%buf38_3, %buf38_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_3, "Release", 0) - AIE.use_lock(%lock38_4, "Release", 1) - AIE.end + aie.use_lock(%lock38_3, "Release", 0) + aie.use_lock(%lock38_4, "Release", 1) + aie.end } - %core38_5 = AIE.core(%tile38_5) { - AIE.use_lock(%lock38_4, "Acquire", 1) - AIE.use_lock(%lock38_5, "Acquire", 0) + %core38_5 = aie.core(%tile38_5) { + aie.use_lock(%lock38_4, "Acquire", 1) + aie.use_lock(%lock38_5, "Acquire", 0) func.call @do_sieve(%buf38_4, %buf38_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_4, "Release", 0) - AIE.use_lock(%lock38_5, "Release", 1) - AIE.end + aie.use_lock(%lock38_4, "Release", 0) + aie.use_lock(%lock38_5, "Release", 1) + aie.end } - %core38_6 = AIE.core(%tile38_6) { - AIE.use_lock(%lock38_5, "Acquire", 1) - AIE.use_lock(%lock38_6, "Acquire", 0) + %core38_6 = aie.core(%tile38_6) { + aie.use_lock(%lock38_5, "Acquire", 1) + aie.use_lock(%lock38_6, "Acquire", 0) func.call @do_sieve(%buf38_5, %buf38_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_5, "Release", 0) - AIE.use_lock(%lock38_6, "Release", 1) - AIE.end + aie.use_lock(%lock38_5, "Release", 0) + aie.use_lock(%lock38_6, "Release", 1) + aie.end } - %core38_7 = AIE.core(%tile38_7) { - AIE.use_lock(%lock38_6, "Acquire", 1) - AIE.use_lock(%lock38_7, "Acquire", 0) + %core38_7 = aie.core(%tile38_7) { + aie.use_lock(%lock38_6, "Acquire", 1) + aie.use_lock(%lock38_7, "Acquire", 0) func.call @do_sieve(%buf38_6, %buf38_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_6, "Release", 0) - AIE.use_lock(%lock38_7, "Release", 1) - AIE.end + aie.use_lock(%lock38_6, "Release", 0) + aie.use_lock(%lock38_7, "Release", 1) + aie.end } - %core38_8 = AIE.core(%tile38_8) { - AIE.use_lock(%lock38_7, "Acquire", 1) - AIE.use_lock(%lock38_8, "Acquire", 0) + %core38_8 = aie.core(%tile38_8) { + aie.use_lock(%lock38_7, "Acquire", 1) + aie.use_lock(%lock38_8, "Acquire", 0) func.call @do_sieve(%buf38_7, %buf38_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_7, "Release", 0) - AIE.use_lock(%lock38_8, "Release", 1) - AIE.end + aie.use_lock(%lock38_7, "Release", 0) + aie.use_lock(%lock38_8, "Release", 1) + aie.end } - %core39_8 = AIE.core(%tile39_8) { - AIE.use_lock(%lock38_8, "Acquire", 1) - AIE.use_lock(%lock39_8, "Acquire", 0) + %core39_8 = aie.core(%tile39_8) { + aie.use_lock(%lock38_8, "Acquire", 1) + aie.use_lock(%lock39_8, "Acquire", 0) func.call @do_sieve(%buf38_8, %buf39_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock38_8, "Release", 0) - AIE.use_lock(%lock39_8, "Release", 1) - AIE.end + aie.use_lock(%lock38_8, "Release", 0) + aie.use_lock(%lock39_8, "Release", 1) + aie.end } - %core39_7 = AIE.core(%tile39_7) { - AIE.use_lock(%lock39_8, "Acquire", 1) - AIE.use_lock(%lock39_7, "Acquire", 0) + %core39_7 = aie.core(%tile39_7) { + aie.use_lock(%lock39_8, "Acquire", 1) + aie.use_lock(%lock39_7, "Acquire", 0) func.call @do_sieve(%buf39_8, %buf39_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_8, "Release", 0) - AIE.use_lock(%lock39_7, "Release", 1) - AIE.end + aie.use_lock(%lock39_8, "Release", 0) + aie.use_lock(%lock39_7, "Release", 1) + aie.end } - %core39_6 = AIE.core(%tile39_6) { - AIE.use_lock(%lock39_7, "Acquire", 1) - AIE.use_lock(%lock39_6, "Acquire", 0) + %core39_6 = aie.core(%tile39_6) { + aie.use_lock(%lock39_7, "Acquire", 1) + aie.use_lock(%lock39_6, "Acquire", 0) func.call @do_sieve(%buf39_7, %buf39_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_7, "Release", 0) - AIE.use_lock(%lock39_6, "Release", 1) - AIE.end + aie.use_lock(%lock39_7, "Release", 0) + aie.use_lock(%lock39_6, "Release", 1) + aie.end } - %core39_5 = AIE.core(%tile39_5) { - AIE.use_lock(%lock39_6, "Acquire", 1) - AIE.use_lock(%lock39_5, "Acquire", 0) + %core39_5 = aie.core(%tile39_5) { + aie.use_lock(%lock39_6, "Acquire", 1) + aie.use_lock(%lock39_5, "Acquire", 0) func.call @do_sieve(%buf39_6, %buf39_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_6, "Release", 0) - AIE.use_lock(%lock39_5, "Release", 1) - AIE.end + aie.use_lock(%lock39_6, "Release", 0) + aie.use_lock(%lock39_5, "Release", 1) + aie.end } - %core39_4 = AIE.core(%tile39_4) { - AIE.use_lock(%lock39_5, "Acquire", 1) - AIE.use_lock(%lock39_4, "Acquire", 0) + %core39_4 = aie.core(%tile39_4) { + aie.use_lock(%lock39_5, "Acquire", 1) + aie.use_lock(%lock39_4, "Acquire", 0) func.call @do_sieve(%buf39_5, %buf39_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_5, "Release", 0) - AIE.use_lock(%lock39_4, "Release", 1) - AIE.end + aie.use_lock(%lock39_5, "Release", 0) + aie.use_lock(%lock39_4, "Release", 1) + aie.end } - %core39_3 = AIE.core(%tile39_3) { - AIE.use_lock(%lock39_4, "Acquire", 1) - AIE.use_lock(%lock39_3, "Acquire", 0) + %core39_3 = aie.core(%tile39_3) { + aie.use_lock(%lock39_4, "Acquire", 1) + aie.use_lock(%lock39_3, "Acquire", 0) func.call @do_sieve(%buf39_4, %buf39_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_4, "Release", 0) - AIE.use_lock(%lock39_3, "Release", 1) - AIE.end + aie.use_lock(%lock39_4, "Release", 0) + aie.use_lock(%lock39_3, "Release", 1) + aie.end } - %core39_2 = AIE.core(%tile39_2) { - AIE.use_lock(%lock39_3, "Acquire", 1) - AIE.use_lock(%lock39_2, "Acquire", 0) + %core39_2 = aie.core(%tile39_2) { + aie.use_lock(%lock39_3, "Acquire", 1) + aie.use_lock(%lock39_2, "Acquire", 0) func.call @do_sieve(%buf39_3, %buf39_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_3, "Release", 0) - AIE.use_lock(%lock39_2, "Release", 1) - AIE.end + aie.use_lock(%lock39_3, "Release", 0) + aie.use_lock(%lock39_2, "Release", 1) + aie.end } - %core39_1 = AIE.core(%tile39_1) { - AIE.use_lock(%lock39_2, "Acquire", 1) - AIE.use_lock(%lock39_1, "Acquire", 0) + %core39_1 = aie.core(%tile39_1) { + aie.use_lock(%lock39_2, "Acquire", 1) + aie.use_lock(%lock39_1, "Acquire", 0) func.call @do_sieve(%buf39_2, %buf39_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_2, "Release", 0) - AIE.use_lock(%lock39_1, "Release", 1) - AIE.end + aie.use_lock(%lock39_2, "Release", 0) + aie.use_lock(%lock39_1, "Release", 1) + aie.end } - %core40_1 = AIE.core(%tile40_1) { - AIE.use_lock(%lock39_1, "Acquire", 1) - AIE.use_lock(%lock40_1, "Acquire", 0) + %core40_1 = aie.core(%tile40_1) { + aie.use_lock(%lock39_1, "Acquire", 1) + aie.use_lock(%lock40_1, "Acquire", 0) func.call @do_sieve(%buf39_1, %buf40_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock39_1, "Release", 0) - AIE.use_lock(%lock40_1, "Release", 1) - AIE.end + aie.use_lock(%lock39_1, "Release", 0) + aie.use_lock(%lock40_1, "Release", 1) + aie.end } - %core40_2 = AIE.core(%tile40_2) { - AIE.use_lock(%lock40_1, "Acquire", 1) - AIE.use_lock(%lock40_2, "Acquire", 0) + %core40_2 = aie.core(%tile40_2) { + aie.use_lock(%lock40_1, "Acquire", 1) + aie.use_lock(%lock40_2, "Acquire", 0) func.call @do_sieve(%buf40_1, %buf40_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_1, "Release", 0) - AIE.use_lock(%lock40_2, "Release", 1) - AIE.end + aie.use_lock(%lock40_1, "Release", 0) + aie.use_lock(%lock40_2, "Release", 1) + aie.end } - %core40_3 = AIE.core(%tile40_3) { - AIE.use_lock(%lock40_2, "Acquire", 1) - AIE.use_lock(%lock40_3, "Acquire", 0) + %core40_3 = aie.core(%tile40_3) { + aie.use_lock(%lock40_2, "Acquire", 1) + aie.use_lock(%lock40_3, "Acquire", 0) func.call @do_sieve(%buf40_2, %buf40_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_2, "Release", 0) - AIE.use_lock(%lock40_3, "Release", 1) - AIE.end + aie.use_lock(%lock40_2, "Release", 0) + aie.use_lock(%lock40_3, "Release", 1) + aie.end } - %core40_4 = AIE.core(%tile40_4) { - AIE.use_lock(%lock40_3, "Acquire", 1) - AIE.use_lock(%lock40_4, "Acquire", 0) + %core40_4 = aie.core(%tile40_4) { + aie.use_lock(%lock40_3, "Acquire", 1) + aie.use_lock(%lock40_4, "Acquire", 0) func.call @do_sieve(%buf40_3, %buf40_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_3, "Release", 0) - AIE.use_lock(%lock40_4, "Release", 1) - AIE.end + aie.use_lock(%lock40_3, "Release", 0) + aie.use_lock(%lock40_4, "Release", 1) + aie.end } - %core40_5 = AIE.core(%tile40_5) { - AIE.use_lock(%lock40_4, "Acquire", 1) - AIE.use_lock(%lock40_5, "Acquire", 0) + %core40_5 = aie.core(%tile40_5) { + aie.use_lock(%lock40_4, "Acquire", 1) + aie.use_lock(%lock40_5, "Acquire", 0) func.call @do_sieve(%buf40_4, %buf40_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_4, "Release", 0) - AIE.use_lock(%lock40_5, "Release", 1) - AIE.end + aie.use_lock(%lock40_4, "Release", 0) + aie.use_lock(%lock40_5, "Release", 1) + aie.end } - %core40_6 = AIE.core(%tile40_6) { - AIE.use_lock(%lock40_5, "Acquire", 1) - AIE.use_lock(%lock40_6, "Acquire", 0) + %core40_6 = aie.core(%tile40_6) { + aie.use_lock(%lock40_5, "Acquire", 1) + aie.use_lock(%lock40_6, "Acquire", 0) func.call @do_sieve(%buf40_5, %buf40_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_5, "Release", 0) - AIE.use_lock(%lock40_6, "Release", 1) - AIE.end + aie.use_lock(%lock40_5, "Release", 0) + aie.use_lock(%lock40_6, "Release", 1) + aie.end } - %core40_7 = AIE.core(%tile40_7) { - AIE.use_lock(%lock40_6, "Acquire", 1) - AIE.use_lock(%lock40_7, "Acquire", 0) + %core40_7 = aie.core(%tile40_7) { + aie.use_lock(%lock40_6, "Acquire", 1) + aie.use_lock(%lock40_7, "Acquire", 0) func.call @do_sieve(%buf40_6, %buf40_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_6, "Release", 0) - AIE.use_lock(%lock40_7, "Release", 1) - AIE.end + aie.use_lock(%lock40_6, "Release", 0) + aie.use_lock(%lock40_7, "Release", 1) + aie.end } - %core40_8 = AIE.core(%tile40_8) { - AIE.use_lock(%lock40_7, "Acquire", 1) - AIE.use_lock(%lock40_8, "Acquire", 0) + %core40_8 = aie.core(%tile40_8) { + aie.use_lock(%lock40_7, "Acquire", 1) + aie.use_lock(%lock40_8, "Acquire", 0) func.call @do_sieve(%buf40_7, %buf40_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_7, "Release", 0) - AIE.use_lock(%lock40_8, "Release", 1) - AIE.end + aie.use_lock(%lock40_7, "Release", 0) + aie.use_lock(%lock40_8, "Release", 1) + aie.end } - %core41_8 = AIE.core(%tile41_8) { - AIE.use_lock(%lock40_8, "Acquire", 1) - AIE.use_lock(%lock41_8, "Acquire", 0) + %core41_8 = aie.core(%tile41_8) { + aie.use_lock(%lock40_8, "Acquire", 1) + aie.use_lock(%lock41_8, "Acquire", 0) func.call @do_sieve(%buf40_8, %buf41_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock40_8, "Release", 0) - AIE.use_lock(%lock41_8, "Release", 1) - AIE.end + aie.use_lock(%lock40_8, "Release", 0) + aie.use_lock(%lock41_8, "Release", 1) + aie.end } - %core41_7 = AIE.core(%tile41_7) { - AIE.use_lock(%lock41_8, "Acquire", 1) - AIE.use_lock(%lock41_7, "Acquire", 0) + %core41_7 = aie.core(%tile41_7) { + aie.use_lock(%lock41_8, "Acquire", 1) + aie.use_lock(%lock41_7, "Acquire", 0) func.call @do_sieve(%buf41_8, %buf41_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_8, "Release", 0) - AIE.use_lock(%lock41_7, "Release", 1) - AIE.end + aie.use_lock(%lock41_8, "Release", 0) + aie.use_lock(%lock41_7, "Release", 1) + aie.end } - %core41_6 = AIE.core(%tile41_6) { - AIE.use_lock(%lock41_7, "Acquire", 1) - AIE.use_lock(%lock41_6, "Acquire", 0) + %core41_6 = aie.core(%tile41_6) { + aie.use_lock(%lock41_7, "Acquire", 1) + aie.use_lock(%lock41_6, "Acquire", 0) func.call @do_sieve(%buf41_7, %buf41_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_7, "Release", 0) - AIE.use_lock(%lock41_6, "Release", 1) - AIE.end + aie.use_lock(%lock41_7, "Release", 0) + aie.use_lock(%lock41_6, "Release", 1) + aie.end } - %core41_5 = AIE.core(%tile41_5) { - AIE.use_lock(%lock41_6, "Acquire", 1) - AIE.use_lock(%lock41_5, "Acquire", 0) + %core41_5 = aie.core(%tile41_5) { + aie.use_lock(%lock41_6, "Acquire", 1) + aie.use_lock(%lock41_5, "Acquire", 0) func.call @do_sieve(%buf41_6, %buf41_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_6, "Release", 0) - AIE.use_lock(%lock41_5, "Release", 1) - AIE.end + aie.use_lock(%lock41_6, "Release", 0) + aie.use_lock(%lock41_5, "Release", 1) + aie.end } - %core41_4 = AIE.core(%tile41_4) { - AIE.use_lock(%lock41_5, "Acquire", 1) - AIE.use_lock(%lock41_4, "Acquire", 0) + %core41_4 = aie.core(%tile41_4) { + aie.use_lock(%lock41_5, "Acquire", 1) + aie.use_lock(%lock41_4, "Acquire", 0) func.call @do_sieve(%buf41_5, %buf41_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_5, "Release", 0) - AIE.use_lock(%lock41_4, "Release", 1) - AIE.end + aie.use_lock(%lock41_5, "Release", 0) + aie.use_lock(%lock41_4, "Release", 1) + aie.end } - %core41_3 = AIE.core(%tile41_3) { - AIE.use_lock(%lock41_4, "Acquire", 1) - AIE.use_lock(%lock41_3, "Acquire", 0) + %core41_3 = aie.core(%tile41_3) { + aie.use_lock(%lock41_4, "Acquire", 1) + aie.use_lock(%lock41_3, "Acquire", 0) func.call @do_sieve(%buf41_4, %buf41_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_4, "Release", 0) - AIE.use_lock(%lock41_3, "Release", 1) - AIE.end + aie.use_lock(%lock41_4, "Release", 0) + aie.use_lock(%lock41_3, "Release", 1) + aie.end } - %core41_2 = AIE.core(%tile41_2) { - AIE.use_lock(%lock41_3, "Acquire", 1) - AIE.use_lock(%lock41_2, "Acquire", 0) + %core41_2 = aie.core(%tile41_2) { + aie.use_lock(%lock41_3, "Acquire", 1) + aie.use_lock(%lock41_2, "Acquire", 0) func.call @do_sieve(%buf41_3, %buf41_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_3, "Release", 0) - AIE.use_lock(%lock41_2, "Release", 1) - AIE.end + aie.use_lock(%lock41_3, "Release", 0) + aie.use_lock(%lock41_2, "Release", 1) + aie.end } - %core41_1 = AIE.core(%tile41_1) { - AIE.use_lock(%lock41_2, "Acquire", 1) - AIE.use_lock(%lock41_1, "Acquire", 0) + %core41_1 = aie.core(%tile41_1) { + aie.use_lock(%lock41_2, "Acquire", 1) + aie.use_lock(%lock41_1, "Acquire", 0) func.call @do_sieve(%buf41_2, %buf41_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_2, "Release", 0) - AIE.use_lock(%lock41_1, "Release", 1) - AIE.end + aie.use_lock(%lock41_2, "Release", 0) + aie.use_lock(%lock41_1, "Release", 1) + aie.end } - %core42_1 = AIE.core(%tile42_1) { - AIE.use_lock(%lock41_1, "Acquire", 1) - AIE.use_lock(%lock42_1, "Acquire", 0) + %core42_1 = aie.core(%tile42_1) { + aie.use_lock(%lock41_1, "Acquire", 1) + aie.use_lock(%lock42_1, "Acquire", 0) func.call @do_sieve(%buf41_1, %buf42_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock41_1, "Release", 0) - AIE.use_lock(%lock42_1, "Release", 1) - AIE.end + aie.use_lock(%lock41_1, "Release", 0) + aie.use_lock(%lock42_1, "Release", 1) + aie.end } - %core42_2 = AIE.core(%tile42_2) { - AIE.use_lock(%lock42_1, "Acquire", 1) - AIE.use_lock(%lock42_2, "Acquire", 0) + %core42_2 = aie.core(%tile42_2) { + aie.use_lock(%lock42_1, "Acquire", 1) + aie.use_lock(%lock42_2, "Acquire", 0) func.call @do_sieve(%buf42_1, %buf42_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_1, "Release", 0) - AIE.use_lock(%lock42_2, "Release", 1) - AIE.end + aie.use_lock(%lock42_1, "Release", 0) + aie.use_lock(%lock42_2, "Release", 1) + aie.end } - %core42_3 = AIE.core(%tile42_3) { - AIE.use_lock(%lock42_2, "Acquire", 1) - AIE.use_lock(%lock42_3, "Acquire", 0) + %core42_3 = aie.core(%tile42_3) { + aie.use_lock(%lock42_2, "Acquire", 1) + aie.use_lock(%lock42_3, "Acquire", 0) func.call @do_sieve(%buf42_2, %buf42_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_2, "Release", 0) - AIE.use_lock(%lock42_3, "Release", 1) - AIE.end + aie.use_lock(%lock42_2, "Release", 0) + aie.use_lock(%lock42_3, "Release", 1) + aie.end } - %core42_4 = AIE.core(%tile42_4) { - AIE.use_lock(%lock42_3, "Acquire", 1) - AIE.use_lock(%lock42_4, "Acquire", 0) + %core42_4 = aie.core(%tile42_4) { + aie.use_lock(%lock42_3, "Acquire", 1) + aie.use_lock(%lock42_4, "Acquire", 0) func.call @do_sieve(%buf42_3, %buf42_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_3, "Release", 0) - AIE.use_lock(%lock42_4, "Release", 1) - AIE.end + aie.use_lock(%lock42_3, "Release", 0) + aie.use_lock(%lock42_4, "Release", 1) + aie.end } - %core42_5 = AIE.core(%tile42_5) { - AIE.use_lock(%lock42_4, "Acquire", 1) - AIE.use_lock(%lock42_5, "Acquire", 0) + %core42_5 = aie.core(%tile42_5) { + aie.use_lock(%lock42_4, "Acquire", 1) + aie.use_lock(%lock42_5, "Acquire", 0) func.call @do_sieve(%buf42_4, %buf42_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_4, "Release", 0) - AIE.use_lock(%lock42_5, "Release", 1) - AIE.end + aie.use_lock(%lock42_4, "Release", 0) + aie.use_lock(%lock42_5, "Release", 1) + aie.end } - %core42_6 = AIE.core(%tile42_6) { - AIE.use_lock(%lock42_5, "Acquire", 1) - AIE.use_lock(%lock42_6, "Acquire", 0) + %core42_6 = aie.core(%tile42_6) { + aie.use_lock(%lock42_5, "Acquire", 1) + aie.use_lock(%lock42_6, "Acquire", 0) func.call @do_sieve(%buf42_5, %buf42_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_5, "Release", 0) - AIE.use_lock(%lock42_6, "Release", 1) - AIE.end + aie.use_lock(%lock42_5, "Release", 0) + aie.use_lock(%lock42_6, "Release", 1) + aie.end } - %core42_7 = AIE.core(%tile42_7) { - AIE.use_lock(%lock42_6, "Acquire", 1) - AIE.use_lock(%lock42_7, "Acquire", 0) + %core42_7 = aie.core(%tile42_7) { + aie.use_lock(%lock42_6, "Acquire", 1) + aie.use_lock(%lock42_7, "Acquire", 0) func.call @do_sieve(%buf42_6, %buf42_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_6, "Release", 0) - AIE.use_lock(%lock42_7, "Release", 1) - AIE.end + aie.use_lock(%lock42_6, "Release", 0) + aie.use_lock(%lock42_7, "Release", 1) + aie.end } - %core42_8 = AIE.core(%tile42_8) { - AIE.use_lock(%lock42_7, "Acquire", 1) - AIE.use_lock(%lock42_8, "Acquire", 0) + %core42_8 = aie.core(%tile42_8) { + aie.use_lock(%lock42_7, "Acquire", 1) + aie.use_lock(%lock42_8, "Acquire", 0) func.call @do_sieve(%buf42_7, %buf42_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_7, "Release", 0) - AIE.use_lock(%lock42_8, "Release", 1) - AIE.end + aie.use_lock(%lock42_7, "Release", 0) + aie.use_lock(%lock42_8, "Release", 1) + aie.end } - %core43_8 = AIE.core(%tile43_8) { - AIE.use_lock(%lock42_8, "Acquire", 1) - AIE.use_lock(%lock43_8, "Acquire", 0) + %core43_8 = aie.core(%tile43_8) { + aie.use_lock(%lock42_8, "Acquire", 1) + aie.use_lock(%lock43_8, "Acquire", 0) func.call @do_sieve(%buf42_8, %buf43_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock42_8, "Release", 0) - AIE.use_lock(%lock43_8, "Release", 1) - AIE.end + aie.use_lock(%lock42_8, "Release", 0) + aie.use_lock(%lock43_8, "Release", 1) + aie.end } - %core43_7 = AIE.core(%tile43_7) { - AIE.use_lock(%lock43_8, "Acquire", 1) - AIE.use_lock(%lock43_7, "Acquire", 0) + %core43_7 = aie.core(%tile43_7) { + aie.use_lock(%lock43_8, "Acquire", 1) + aie.use_lock(%lock43_7, "Acquire", 0) func.call @do_sieve(%buf43_8, %buf43_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_8, "Release", 0) - AIE.use_lock(%lock43_7, "Release", 1) - AIE.end + aie.use_lock(%lock43_8, "Release", 0) + aie.use_lock(%lock43_7, "Release", 1) + aie.end } - %core43_6 = AIE.core(%tile43_6) { - AIE.use_lock(%lock43_7, "Acquire", 1) - AIE.use_lock(%lock43_6, "Acquire", 0) + %core43_6 = aie.core(%tile43_6) { + aie.use_lock(%lock43_7, "Acquire", 1) + aie.use_lock(%lock43_6, "Acquire", 0) func.call @do_sieve(%buf43_7, %buf43_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_7, "Release", 0) - AIE.use_lock(%lock43_6, "Release", 1) - AIE.end + aie.use_lock(%lock43_7, "Release", 0) + aie.use_lock(%lock43_6, "Release", 1) + aie.end } - %core43_5 = AIE.core(%tile43_5) { - AIE.use_lock(%lock43_6, "Acquire", 1) - AIE.use_lock(%lock43_5, "Acquire", 0) + %core43_5 = aie.core(%tile43_5) { + aie.use_lock(%lock43_6, "Acquire", 1) + aie.use_lock(%lock43_5, "Acquire", 0) func.call @do_sieve(%buf43_6, %buf43_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_6, "Release", 0) - AIE.use_lock(%lock43_5, "Release", 1) - AIE.end + aie.use_lock(%lock43_6, "Release", 0) + aie.use_lock(%lock43_5, "Release", 1) + aie.end } - %core43_4 = AIE.core(%tile43_4) { - AIE.use_lock(%lock43_5, "Acquire", 1) - AIE.use_lock(%lock43_4, "Acquire", 0) + %core43_4 = aie.core(%tile43_4) { + aie.use_lock(%lock43_5, "Acquire", 1) + aie.use_lock(%lock43_4, "Acquire", 0) func.call @do_sieve(%buf43_5, %buf43_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_5, "Release", 0) - AIE.use_lock(%lock43_4, "Release", 1) - AIE.end + aie.use_lock(%lock43_5, "Release", 0) + aie.use_lock(%lock43_4, "Release", 1) + aie.end } - %core43_3 = AIE.core(%tile43_3) { - AIE.use_lock(%lock43_4, "Acquire", 1) - AIE.use_lock(%lock43_3, "Acquire", 0) + %core43_3 = aie.core(%tile43_3) { + aie.use_lock(%lock43_4, "Acquire", 1) + aie.use_lock(%lock43_3, "Acquire", 0) func.call @do_sieve(%buf43_4, %buf43_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_4, "Release", 0) - AIE.use_lock(%lock43_3, "Release", 1) - AIE.end + aie.use_lock(%lock43_4, "Release", 0) + aie.use_lock(%lock43_3, "Release", 1) + aie.end } - %core43_2 = AIE.core(%tile43_2) { - AIE.use_lock(%lock43_3, "Acquire", 1) - AIE.use_lock(%lock43_2, "Acquire", 0) + %core43_2 = aie.core(%tile43_2) { + aie.use_lock(%lock43_3, "Acquire", 1) + aie.use_lock(%lock43_2, "Acquire", 0) func.call @do_sieve(%buf43_3, %buf43_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_3, "Release", 0) - AIE.use_lock(%lock43_2, "Release", 1) - AIE.end + aie.use_lock(%lock43_3, "Release", 0) + aie.use_lock(%lock43_2, "Release", 1) + aie.end } - %core43_1 = AIE.core(%tile43_1) { - AIE.use_lock(%lock43_2, "Acquire", 1) - AIE.use_lock(%lock43_1, "Acquire", 0) + %core43_1 = aie.core(%tile43_1) { + aie.use_lock(%lock43_2, "Acquire", 1) + aie.use_lock(%lock43_1, "Acquire", 0) func.call @do_sieve(%buf43_2, %buf43_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_2, "Release", 0) - AIE.use_lock(%lock43_1, "Release", 1) - AIE.end + aie.use_lock(%lock43_2, "Release", 0) + aie.use_lock(%lock43_1, "Release", 1) + aie.end } - %core44_1 = AIE.core(%tile44_1) { - AIE.use_lock(%lock43_1, "Acquire", 1) - AIE.use_lock(%lock44_1, "Acquire", 0) + %core44_1 = aie.core(%tile44_1) { + aie.use_lock(%lock43_1, "Acquire", 1) + aie.use_lock(%lock44_1, "Acquire", 0) func.call @do_sieve(%buf43_1, %buf44_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock43_1, "Release", 0) - AIE.use_lock(%lock44_1, "Release", 1) - AIE.end + aie.use_lock(%lock43_1, "Release", 0) + aie.use_lock(%lock44_1, "Release", 1) + aie.end } - %core44_2 = AIE.core(%tile44_2) { - AIE.use_lock(%lock44_1, "Acquire", 1) - AIE.use_lock(%lock44_2, "Acquire", 0) + %core44_2 = aie.core(%tile44_2) { + aie.use_lock(%lock44_1, "Acquire", 1) + aie.use_lock(%lock44_2, "Acquire", 0) func.call @do_sieve(%buf44_1, %buf44_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_1, "Release", 0) - AIE.use_lock(%lock44_2, "Release", 1) - AIE.end + aie.use_lock(%lock44_1, "Release", 0) + aie.use_lock(%lock44_2, "Release", 1) + aie.end } - %core44_3 = AIE.core(%tile44_3) { - AIE.use_lock(%lock44_2, "Acquire", 1) - AIE.use_lock(%lock44_3, "Acquire", 0) + %core44_3 = aie.core(%tile44_3) { + aie.use_lock(%lock44_2, "Acquire", 1) + aie.use_lock(%lock44_3, "Acquire", 0) func.call @do_sieve(%buf44_2, %buf44_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_2, "Release", 0) - AIE.use_lock(%lock44_3, "Release", 1) - AIE.end + aie.use_lock(%lock44_2, "Release", 0) + aie.use_lock(%lock44_3, "Release", 1) + aie.end } - %core44_4 = AIE.core(%tile44_4) { - AIE.use_lock(%lock44_3, "Acquire", 1) - AIE.use_lock(%lock44_4, "Acquire", 0) + %core44_4 = aie.core(%tile44_4) { + aie.use_lock(%lock44_3, "Acquire", 1) + aie.use_lock(%lock44_4, "Acquire", 0) func.call @do_sieve(%buf44_3, %buf44_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_3, "Release", 0) - AIE.use_lock(%lock44_4, "Release", 1) - AIE.end + aie.use_lock(%lock44_3, "Release", 0) + aie.use_lock(%lock44_4, "Release", 1) + aie.end } - %core44_5 = AIE.core(%tile44_5) { - AIE.use_lock(%lock44_4, "Acquire", 1) - AIE.use_lock(%lock44_5, "Acquire", 0) + %core44_5 = aie.core(%tile44_5) { + aie.use_lock(%lock44_4, "Acquire", 1) + aie.use_lock(%lock44_5, "Acquire", 0) func.call @do_sieve(%buf44_4, %buf44_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_4, "Release", 0) - AIE.use_lock(%lock44_5, "Release", 1) - AIE.end + aie.use_lock(%lock44_4, "Release", 0) + aie.use_lock(%lock44_5, "Release", 1) + aie.end } - %core44_6 = AIE.core(%tile44_6) { - AIE.use_lock(%lock44_5, "Acquire", 1) - AIE.use_lock(%lock44_6, "Acquire", 0) + %core44_6 = aie.core(%tile44_6) { + aie.use_lock(%lock44_5, "Acquire", 1) + aie.use_lock(%lock44_6, "Acquire", 0) func.call @do_sieve(%buf44_5, %buf44_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_5, "Release", 0) - AIE.use_lock(%lock44_6, "Release", 1) - AIE.end + aie.use_lock(%lock44_5, "Release", 0) + aie.use_lock(%lock44_6, "Release", 1) + aie.end } - %core44_7 = AIE.core(%tile44_7) { - AIE.use_lock(%lock44_6, "Acquire", 1) - AIE.use_lock(%lock44_7, "Acquire", 0) + %core44_7 = aie.core(%tile44_7) { + aie.use_lock(%lock44_6, "Acquire", 1) + aie.use_lock(%lock44_7, "Acquire", 0) func.call @do_sieve(%buf44_6, %buf44_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_6, "Release", 0) - AIE.use_lock(%lock44_7, "Release", 1) - AIE.end + aie.use_lock(%lock44_6, "Release", 0) + aie.use_lock(%lock44_7, "Release", 1) + aie.end } - %core44_8 = AIE.core(%tile44_8) { - AIE.use_lock(%lock44_7, "Acquire", 1) - AIE.use_lock(%lock44_8, "Acquire", 0) + %core44_8 = aie.core(%tile44_8) { + aie.use_lock(%lock44_7, "Acquire", 1) + aie.use_lock(%lock44_8, "Acquire", 0) func.call @do_sieve(%buf44_7, %buf44_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_7, "Release", 0) - AIE.use_lock(%lock44_8, "Release", 1) - AIE.end + aie.use_lock(%lock44_7, "Release", 0) + aie.use_lock(%lock44_8, "Release", 1) + aie.end } - %core45_8 = AIE.core(%tile45_8) { - AIE.use_lock(%lock44_8, "Acquire", 1) - AIE.use_lock(%lock45_8, "Acquire", 0) + %core45_8 = aie.core(%tile45_8) { + aie.use_lock(%lock44_8, "Acquire", 1) + aie.use_lock(%lock45_8, "Acquire", 0) func.call @do_sieve(%buf44_8, %buf45_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock44_8, "Release", 0) - AIE.use_lock(%lock45_8, "Release", 1) - AIE.end + aie.use_lock(%lock44_8, "Release", 0) + aie.use_lock(%lock45_8, "Release", 1) + aie.end } - %core45_7 = AIE.core(%tile45_7) { - AIE.use_lock(%lock45_8, "Acquire", 1) - AIE.use_lock(%lock45_7, "Acquire", 0) + %core45_7 = aie.core(%tile45_7) { + aie.use_lock(%lock45_8, "Acquire", 1) + aie.use_lock(%lock45_7, "Acquire", 0) func.call @do_sieve(%buf45_8, %buf45_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_8, "Release", 0) - AIE.use_lock(%lock45_7, "Release", 1) - AIE.end + aie.use_lock(%lock45_8, "Release", 0) + aie.use_lock(%lock45_7, "Release", 1) + aie.end } - %core45_6 = AIE.core(%tile45_6) { - AIE.use_lock(%lock45_7, "Acquire", 1) - AIE.use_lock(%lock45_6, "Acquire", 0) + %core45_6 = aie.core(%tile45_6) { + aie.use_lock(%lock45_7, "Acquire", 1) + aie.use_lock(%lock45_6, "Acquire", 0) func.call @do_sieve(%buf45_7, %buf45_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_7, "Release", 0) - AIE.use_lock(%lock45_6, "Release", 1) - AIE.end + aie.use_lock(%lock45_7, "Release", 0) + aie.use_lock(%lock45_6, "Release", 1) + aie.end } - %core45_5 = AIE.core(%tile45_5) { - AIE.use_lock(%lock45_6, "Acquire", 1) - AIE.use_lock(%lock45_5, "Acquire", 0) + %core45_5 = aie.core(%tile45_5) { + aie.use_lock(%lock45_6, "Acquire", 1) + aie.use_lock(%lock45_5, "Acquire", 0) func.call @do_sieve(%buf45_6, %buf45_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_6, "Release", 0) - AIE.use_lock(%lock45_5, "Release", 1) - AIE.end + aie.use_lock(%lock45_6, "Release", 0) + aie.use_lock(%lock45_5, "Release", 1) + aie.end } - %core45_4 = AIE.core(%tile45_4) { - AIE.use_lock(%lock45_5, "Acquire", 1) - AIE.use_lock(%lock45_4, "Acquire", 0) + %core45_4 = aie.core(%tile45_4) { + aie.use_lock(%lock45_5, "Acquire", 1) + aie.use_lock(%lock45_4, "Acquire", 0) func.call @do_sieve(%buf45_5, %buf45_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_5, "Release", 0) - AIE.use_lock(%lock45_4, "Release", 1) - AIE.end + aie.use_lock(%lock45_5, "Release", 0) + aie.use_lock(%lock45_4, "Release", 1) + aie.end } - %core45_3 = AIE.core(%tile45_3) { - AIE.use_lock(%lock45_4, "Acquire", 1) - AIE.use_lock(%lock45_3, "Acquire", 0) + %core45_3 = aie.core(%tile45_3) { + aie.use_lock(%lock45_4, "Acquire", 1) + aie.use_lock(%lock45_3, "Acquire", 0) func.call @do_sieve(%buf45_4, %buf45_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_4, "Release", 0) - AIE.use_lock(%lock45_3, "Release", 1) - AIE.end + aie.use_lock(%lock45_4, "Release", 0) + aie.use_lock(%lock45_3, "Release", 1) + aie.end } - %core45_2 = AIE.core(%tile45_2) { - AIE.use_lock(%lock45_3, "Acquire", 1) - AIE.use_lock(%lock45_2, "Acquire", 0) + %core45_2 = aie.core(%tile45_2) { + aie.use_lock(%lock45_3, "Acquire", 1) + aie.use_lock(%lock45_2, "Acquire", 0) func.call @do_sieve(%buf45_3, %buf45_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_3, "Release", 0) - AIE.use_lock(%lock45_2, "Release", 1) - AIE.end + aie.use_lock(%lock45_3, "Release", 0) + aie.use_lock(%lock45_2, "Release", 1) + aie.end } - %core45_1 = AIE.core(%tile45_1) { - AIE.use_lock(%lock45_2, "Acquire", 1) - AIE.use_lock(%lock45_1, "Acquire", 0) + %core45_1 = aie.core(%tile45_1) { + aie.use_lock(%lock45_2, "Acquire", 1) + aie.use_lock(%lock45_1, "Acquire", 0) func.call @do_sieve(%buf45_2, %buf45_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_2, "Release", 0) - AIE.use_lock(%lock45_1, "Release", 1) - AIE.end + aie.use_lock(%lock45_2, "Release", 0) + aie.use_lock(%lock45_1, "Release", 1) + aie.end } - %core46_1 = AIE.core(%tile46_1) { - AIE.use_lock(%lock45_1, "Acquire", 1) - AIE.use_lock(%lock46_1, "Acquire", 0) + %core46_1 = aie.core(%tile46_1) { + aie.use_lock(%lock45_1, "Acquire", 1) + aie.use_lock(%lock46_1, "Acquire", 0) func.call @do_sieve(%buf45_1, %buf46_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock45_1, "Release", 0) - AIE.use_lock(%lock46_1, "Release", 1) - AIE.end + aie.use_lock(%lock45_1, "Release", 0) + aie.use_lock(%lock46_1, "Release", 1) + aie.end } - %core46_2 = AIE.core(%tile46_2) { - AIE.use_lock(%lock46_1, "Acquire", 1) - AIE.use_lock(%lock46_2, "Acquire", 0) + %core46_2 = aie.core(%tile46_2) { + aie.use_lock(%lock46_1, "Acquire", 1) + aie.use_lock(%lock46_2, "Acquire", 0) func.call @do_sieve(%buf46_1, %buf46_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_1, "Release", 0) - AIE.use_lock(%lock46_2, "Release", 1) - AIE.end + aie.use_lock(%lock46_1, "Release", 0) + aie.use_lock(%lock46_2, "Release", 1) + aie.end } - %core46_3 = AIE.core(%tile46_3) { - AIE.use_lock(%lock46_2, "Acquire", 1) - AIE.use_lock(%lock46_3, "Acquire", 0) + %core46_3 = aie.core(%tile46_3) { + aie.use_lock(%lock46_2, "Acquire", 1) + aie.use_lock(%lock46_3, "Acquire", 0) func.call @do_sieve(%buf46_2, %buf46_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_2, "Release", 0) - AIE.use_lock(%lock46_3, "Release", 1) - AIE.end + aie.use_lock(%lock46_2, "Release", 0) + aie.use_lock(%lock46_3, "Release", 1) + aie.end } - %core46_4 = AIE.core(%tile46_4) { - AIE.use_lock(%lock46_3, "Acquire", 1) - AIE.use_lock(%lock46_4, "Acquire", 0) + %core46_4 = aie.core(%tile46_4) { + aie.use_lock(%lock46_3, "Acquire", 1) + aie.use_lock(%lock46_4, "Acquire", 0) func.call @do_sieve(%buf46_3, %buf46_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_3, "Release", 0) - AIE.use_lock(%lock46_4, "Release", 1) - AIE.end + aie.use_lock(%lock46_3, "Release", 0) + aie.use_lock(%lock46_4, "Release", 1) + aie.end } - %core46_5 = AIE.core(%tile46_5) { - AIE.use_lock(%lock46_4, "Acquire", 1) - AIE.use_lock(%lock46_5, "Acquire", 0) + %core46_5 = aie.core(%tile46_5) { + aie.use_lock(%lock46_4, "Acquire", 1) + aie.use_lock(%lock46_5, "Acquire", 0) func.call @do_sieve(%buf46_4, %buf46_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_4, "Release", 0) - AIE.use_lock(%lock46_5, "Release", 1) - AIE.end + aie.use_lock(%lock46_4, "Release", 0) + aie.use_lock(%lock46_5, "Release", 1) + aie.end } - %core46_6 = AIE.core(%tile46_6) { - AIE.use_lock(%lock46_5, "Acquire", 1) - AIE.use_lock(%lock46_6, "Acquire", 0) + %core46_6 = aie.core(%tile46_6) { + aie.use_lock(%lock46_5, "Acquire", 1) + aie.use_lock(%lock46_6, "Acquire", 0) func.call @do_sieve(%buf46_5, %buf46_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_5, "Release", 0) - AIE.use_lock(%lock46_6, "Release", 1) - AIE.end + aie.use_lock(%lock46_5, "Release", 0) + aie.use_lock(%lock46_6, "Release", 1) + aie.end } - %core46_7 = AIE.core(%tile46_7) { - AIE.use_lock(%lock46_6, "Acquire", 1) - AIE.use_lock(%lock46_7, "Acquire", 0) + %core46_7 = aie.core(%tile46_7) { + aie.use_lock(%lock46_6, "Acquire", 1) + aie.use_lock(%lock46_7, "Acquire", 0) func.call @do_sieve(%buf46_6, %buf46_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_6, "Release", 0) - AIE.use_lock(%lock46_7, "Release", 1) - AIE.end + aie.use_lock(%lock46_6, "Release", 0) + aie.use_lock(%lock46_7, "Release", 1) + aie.end } - %core46_8 = AIE.core(%tile46_8) { - AIE.use_lock(%lock46_7, "Acquire", 1) - AIE.use_lock(%lock46_8, "Acquire", 0) + %core46_8 = aie.core(%tile46_8) { + aie.use_lock(%lock46_7, "Acquire", 1) + aie.use_lock(%lock46_8, "Acquire", 0) func.call @do_sieve(%buf46_7, %buf46_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_7, "Release", 0) - AIE.use_lock(%lock46_8, "Release", 1) - AIE.end + aie.use_lock(%lock46_7, "Release", 0) + aie.use_lock(%lock46_8, "Release", 1) + aie.end } - %core47_8 = AIE.core(%tile47_8) { - AIE.use_lock(%lock46_8, "Acquire", 1) - AIE.use_lock(%lock47_8, "Acquire", 0) + %core47_8 = aie.core(%tile47_8) { + aie.use_lock(%lock46_8, "Acquire", 1) + aie.use_lock(%lock47_8, "Acquire", 0) func.call @do_sieve(%buf46_8, %buf47_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock46_8, "Release", 0) - AIE.use_lock(%lock47_8, "Release", 1) - AIE.end + aie.use_lock(%lock46_8, "Release", 0) + aie.use_lock(%lock47_8, "Release", 1) + aie.end } - %core47_7 = AIE.core(%tile47_7) { - AIE.use_lock(%lock47_8, "Acquire", 1) - AIE.use_lock(%lock47_7, "Acquire", 0) + %core47_7 = aie.core(%tile47_7) { + aie.use_lock(%lock47_8, "Acquire", 1) + aie.use_lock(%lock47_7, "Acquire", 0) func.call @do_sieve(%buf47_8, %buf47_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_8, "Release", 0) - AIE.use_lock(%lock47_7, "Release", 1) - AIE.end + aie.use_lock(%lock47_8, "Release", 0) + aie.use_lock(%lock47_7, "Release", 1) + aie.end } - %core47_6 = AIE.core(%tile47_6) { - AIE.use_lock(%lock47_7, "Acquire", 1) - AIE.use_lock(%lock47_6, "Acquire", 0) + %core47_6 = aie.core(%tile47_6) { + aie.use_lock(%lock47_7, "Acquire", 1) + aie.use_lock(%lock47_6, "Acquire", 0) func.call @do_sieve(%buf47_7, %buf47_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_7, "Release", 0) - AIE.use_lock(%lock47_6, "Release", 1) - AIE.end + aie.use_lock(%lock47_7, "Release", 0) + aie.use_lock(%lock47_6, "Release", 1) + aie.end } - %core47_5 = AIE.core(%tile47_5) { - AIE.use_lock(%lock47_6, "Acquire", 1) - AIE.use_lock(%lock47_5, "Acquire", 0) + %core47_5 = aie.core(%tile47_5) { + aie.use_lock(%lock47_6, "Acquire", 1) + aie.use_lock(%lock47_5, "Acquire", 0) func.call @do_sieve(%buf47_6, %buf47_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_6, "Release", 0) - AIE.use_lock(%lock47_5, "Release", 1) - AIE.end + aie.use_lock(%lock47_6, "Release", 0) + aie.use_lock(%lock47_5, "Release", 1) + aie.end } - %core47_4 = AIE.core(%tile47_4) { - AIE.use_lock(%lock47_5, "Acquire", 1) - AIE.use_lock(%lock47_4, "Acquire", 0) + %core47_4 = aie.core(%tile47_4) { + aie.use_lock(%lock47_5, "Acquire", 1) + aie.use_lock(%lock47_4, "Acquire", 0) func.call @do_sieve(%buf47_5, %buf47_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_5, "Release", 0) - AIE.use_lock(%lock47_4, "Release", 1) - AIE.end + aie.use_lock(%lock47_5, "Release", 0) + aie.use_lock(%lock47_4, "Release", 1) + aie.end } - %core47_3 = AIE.core(%tile47_3) { - AIE.use_lock(%lock47_4, "Acquire", 1) - AIE.use_lock(%lock47_3, "Acquire", 0) + %core47_3 = aie.core(%tile47_3) { + aie.use_lock(%lock47_4, "Acquire", 1) + aie.use_lock(%lock47_3, "Acquire", 0) func.call @do_sieve(%buf47_4, %buf47_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_4, "Release", 0) - AIE.use_lock(%lock47_3, "Release", 1) - AIE.end + aie.use_lock(%lock47_4, "Release", 0) + aie.use_lock(%lock47_3, "Release", 1) + aie.end } - %core47_2 = AIE.core(%tile47_2) { - AIE.use_lock(%lock47_3, "Acquire", 1) - AIE.use_lock(%lock47_2, "Acquire", 0) + %core47_2 = aie.core(%tile47_2) { + aie.use_lock(%lock47_3, "Acquire", 1) + aie.use_lock(%lock47_2, "Acquire", 0) func.call @do_sieve(%buf47_3, %buf47_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_3, "Release", 0) - AIE.use_lock(%lock47_2, "Release", 1) - AIE.end + aie.use_lock(%lock47_3, "Release", 0) + aie.use_lock(%lock47_2, "Release", 1) + aie.end } - %core47_1 = AIE.core(%tile47_1) { - AIE.use_lock(%lock47_2, "Acquire", 1) - AIE.use_lock(%lock47_1, "Acquire", 0) + %core47_1 = aie.core(%tile47_1) { + aie.use_lock(%lock47_2, "Acquire", 1) + aie.use_lock(%lock47_1, "Acquire", 0) func.call @do_sieve(%buf47_2, %buf47_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_2, "Release", 0) - AIE.use_lock(%lock47_1, "Release", 1) - AIE.end + aie.use_lock(%lock47_2, "Release", 0) + aie.use_lock(%lock47_1, "Release", 1) + aie.end } - %core48_1 = AIE.core(%tile48_1) { - AIE.use_lock(%lock47_1, "Acquire", 1) - AIE.use_lock(%lock48_1, "Acquire", 0) + %core48_1 = aie.core(%tile48_1) { + aie.use_lock(%lock47_1, "Acquire", 1) + aie.use_lock(%lock48_1, "Acquire", 0) func.call @do_sieve(%buf47_1, %buf48_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock47_1, "Release", 0) - AIE.use_lock(%lock48_1, "Release", 1) - AIE.end + aie.use_lock(%lock47_1, "Release", 0) + aie.use_lock(%lock48_1, "Release", 1) + aie.end } - %core48_2 = AIE.core(%tile48_2) { - AIE.use_lock(%lock48_1, "Acquire", 1) - AIE.use_lock(%lock48_2, "Acquire", 0) + %core48_2 = aie.core(%tile48_2) { + aie.use_lock(%lock48_1, "Acquire", 1) + aie.use_lock(%lock48_2, "Acquire", 0) func.call @do_sieve(%buf48_1, %buf48_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_1, "Release", 0) - AIE.use_lock(%lock48_2, "Release", 1) - AIE.end + aie.use_lock(%lock48_1, "Release", 0) + aie.use_lock(%lock48_2, "Release", 1) + aie.end } - %core48_3 = AIE.core(%tile48_3) { - AIE.use_lock(%lock48_2, "Acquire", 1) - AIE.use_lock(%lock48_3, "Acquire", 0) + %core48_3 = aie.core(%tile48_3) { + aie.use_lock(%lock48_2, "Acquire", 1) + aie.use_lock(%lock48_3, "Acquire", 0) func.call @do_sieve(%buf48_2, %buf48_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_2, "Release", 0) - AIE.use_lock(%lock48_3, "Release", 1) - AIE.end + aie.use_lock(%lock48_2, "Release", 0) + aie.use_lock(%lock48_3, "Release", 1) + aie.end } - %core48_4 = AIE.core(%tile48_4) { - AIE.use_lock(%lock48_3, "Acquire", 1) - AIE.use_lock(%lock48_4, "Acquire", 0) + %core48_4 = aie.core(%tile48_4) { + aie.use_lock(%lock48_3, "Acquire", 1) + aie.use_lock(%lock48_4, "Acquire", 0) func.call @do_sieve(%buf48_3, %buf48_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_3, "Release", 0) - AIE.use_lock(%lock48_4, "Release", 1) - AIE.end + aie.use_lock(%lock48_3, "Release", 0) + aie.use_lock(%lock48_4, "Release", 1) + aie.end } - %core48_5 = AIE.core(%tile48_5) { - AIE.use_lock(%lock48_4, "Acquire", 1) - AIE.use_lock(%lock48_5, "Acquire", 0) + %core48_5 = aie.core(%tile48_5) { + aie.use_lock(%lock48_4, "Acquire", 1) + aie.use_lock(%lock48_5, "Acquire", 0) func.call @do_sieve(%buf48_4, %buf48_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_4, "Release", 0) - AIE.use_lock(%lock48_5, "Release", 1) - AIE.end + aie.use_lock(%lock48_4, "Release", 0) + aie.use_lock(%lock48_5, "Release", 1) + aie.end } - %core48_6 = AIE.core(%tile48_6) { - AIE.use_lock(%lock48_5, "Acquire", 1) - AIE.use_lock(%lock48_6, "Acquire", 0) + %core48_6 = aie.core(%tile48_6) { + aie.use_lock(%lock48_5, "Acquire", 1) + aie.use_lock(%lock48_6, "Acquire", 0) func.call @do_sieve(%buf48_5, %buf48_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_5, "Release", 0) - AIE.use_lock(%lock48_6, "Release", 1) - AIE.end + aie.use_lock(%lock48_5, "Release", 0) + aie.use_lock(%lock48_6, "Release", 1) + aie.end } - %core48_7 = AIE.core(%tile48_7) { - AIE.use_lock(%lock48_6, "Acquire", 1) - AIE.use_lock(%lock48_7, "Acquire", 0) + %core48_7 = aie.core(%tile48_7) { + aie.use_lock(%lock48_6, "Acquire", 1) + aie.use_lock(%lock48_7, "Acquire", 0) func.call @do_sieve(%buf48_6, %buf48_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_6, "Release", 0) - AIE.use_lock(%lock48_7, "Release", 1) - AIE.end + aie.use_lock(%lock48_6, "Release", 0) + aie.use_lock(%lock48_7, "Release", 1) + aie.end } - %core48_8 = AIE.core(%tile48_8) { - AIE.use_lock(%lock48_7, "Acquire", 1) - AIE.use_lock(%lock48_8, "Acquire", 0) + %core48_8 = aie.core(%tile48_8) { + aie.use_lock(%lock48_7, "Acquire", 1) + aie.use_lock(%lock48_8, "Acquire", 0) func.call @do_sieve(%buf48_7, %buf48_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_7, "Release", 0) - AIE.use_lock(%lock48_8, "Release", 1) - AIE.end + aie.use_lock(%lock48_7, "Release", 0) + aie.use_lock(%lock48_8, "Release", 1) + aie.end } - %core49_8 = AIE.core(%tile49_8) { - AIE.use_lock(%lock48_8, "Acquire", 1) - AIE.use_lock(%lock49_8, "Acquire", 0) + %core49_8 = aie.core(%tile49_8) { + aie.use_lock(%lock48_8, "Acquire", 1) + aie.use_lock(%lock49_8, "Acquire", 0) func.call @do_sieve(%buf48_8, %buf49_8) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock48_8, "Release", 0) - AIE.use_lock(%lock49_8, "Release", 1) - AIE.end + aie.use_lock(%lock48_8, "Release", 0) + aie.use_lock(%lock49_8, "Release", 1) + aie.end } - %core49_7 = AIE.core(%tile49_7) { - AIE.use_lock(%lock49_8, "Acquire", 1) - AIE.use_lock(%lock49_7, "Acquire", 0) + %core49_7 = aie.core(%tile49_7) { + aie.use_lock(%lock49_8, "Acquire", 1) + aie.use_lock(%lock49_7, "Acquire", 0) func.call @do_sieve(%buf49_8, %buf49_7) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock49_8, "Release", 0) - AIE.use_lock(%lock49_7, "Release", 1) - AIE.end + aie.use_lock(%lock49_8, "Release", 0) + aie.use_lock(%lock49_7, "Release", 1) + aie.end } - %core49_6 = AIE.core(%tile49_6) { - AIE.use_lock(%lock49_7, "Acquire", 1) - AIE.use_lock(%lock49_6, "Acquire", 0) + %core49_6 = aie.core(%tile49_6) { + aie.use_lock(%lock49_7, "Acquire", 1) + aie.use_lock(%lock49_6, "Acquire", 0) func.call @do_sieve(%buf49_7, %buf49_6) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock49_7, "Release", 0) - AIE.use_lock(%lock49_6, "Release", 1) - AIE.end + aie.use_lock(%lock49_7, "Release", 0) + aie.use_lock(%lock49_6, "Release", 1) + aie.end } - %core49_5 = AIE.core(%tile49_5) { - AIE.use_lock(%lock49_6, "Acquire", 1) - AIE.use_lock(%lock49_5, "Acquire", 0) + %core49_5 = aie.core(%tile49_5) { + aie.use_lock(%lock49_6, "Acquire", 1) + aie.use_lock(%lock49_5, "Acquire", 0) func.call @do_sieve(%buf49_6, %buf49_5) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock49_6, "Release", 0) - AIE.use_lock(%lock49_5, "Release", 1) - AIE.end + aie.use_lock(%lock49_6, "Release", 0) + aie.use_lock(%lock49_5, "Release", 1) + aie.end } - %core49_4 = AIE.core(%tile49_4) { - AIE.use_lock(%lock49_5, "Acquire", 1) - AIE.use_lock(%lock49_4, "Acquire", 0) + %core49_4 = aie.core(%tile49_4) { + aie.use_lock(%lock49_5, "Acquire", 1) + aie.use_lock(%lock49_4, "Acquire", 0) func.call @do_sieve(%buf49_5, %buf49_4) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock49_5, "Release", 0) - AIE.use_lock(%lock49_4, "Release", 1) - AIE.end + aie.use_lock(%lock49_5, "Release", 0) + aie.use_lock(%lock49_4, "Release", 1) + aie.end } - %core49_3 = AIE.core(%tile49_3) { - AIE.use_lock(%lock49_4, "Acquire", 1) - AIE.use_lock(%lock49_3, "Acquire", 0) + %core49_3 = aie.core(%tile49_3) { + aie.use_lock(%lock49_4, "Acquire", 1) + aie.use_lock(%lock49_3, "Acquire", 0) func.call @do_sieve(%buf49_4, %buf49_3) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock49_4, "Release", 0) - AIE.use_lock(%lock49_3, "Release", 1) - AIE.end + aie.use_lock(%lock49_4, "Release", 0) + aie.use_lock(%lock49_3, "Release", 1) + aie.end } - %core49_2 = AIE.core(%tile49_2) { - AIE.use_lock(%lock49_3, "Acquire", 1) - AIE.use_lock(%lock49_2, "Acquire", 0) + %core49_2 = aie.core(%tile49_2) { + aie.use_lock(%lock49_3, "Acquire", 1) + aie.use_lock(%lock49_2, "Acquire", 0) func.call @do_sieve(%buf49_3, %buf49_2) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock49_3, "Release", 0) - AIE.use_lock(%lock49_2, "Release", 1) - AIE.end + aie.use_lock(%lock49_3, "Release", 0) + aie.use_lock(%lock49_2, "Release", 1) + aie.end } - %core49_1 = AIE.core(%tile49_1) { - AIE.use_lock(%lock49_2, "Acquire", 1) - AIE.use_lock(%lock49_1, "Acquire", 0) + %core49_1 = aie.core(%tile49_1) { + aie.use_lock(%lock49_2, "Acquire", 1) + aie.use_lock(%lock49_1, "Acquire", 0) func.call @do_sieve(%buf49_2, %buf49_1) : (memref<3072xi32>, memref<3072xi32>) -> () - AIE.use_lock(%lock49_2, "Release", 0) - AIE.use_lock(%lock49_1, "Release", 1) - AIE.end + aie.use_lock(%lock49_2, "Release", 0) + aie.use_lock(%lock49_1, "Release", 1) + aie.end } } diff --git a/test/Conversion/DmaToIpu/aiert_insts.mlir b/test/Conversion/DmaToIpu/aiert_insts.mlir index 2a65f4a35a..d9cfc10f3a 100644 --- a/test/Conversion/DmaToIpu/aiert_insts.mlir +++ b/test/Conversion/DmaToIpu/aiert_insts.mlir @@ -7,13 +7,13 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-dma-to-ipu %s | FileCheck %s -// CHECK: AIEX.ipu.writebd_shimtile {bd_id = 1 : i32, buffer_length = 32 : i32, buffer_offset = 0 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 0 : i32, d1_stepsize = 0 : i32, d1_wrap = 0 : i32, d2_stepsize = 0 : i32, ddr_id = 2 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: AIEX.ipu.write32 {address = 119300 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483649 : ui32} -// CHECK: AIEX.ipu.writebd_shimtile {bd_id = 0 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 2 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: AIEX.ipu.write32 {address = 119316 : ui32, column = 0 : i32, row = 0 : i32, value = 0 : ui32} +// CHECK: aiex.ipu.writebd_shimtile {bd_id = 1 : i32, buffer_length = 32 : i32, buffer_offset = 0 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 0 : i32, d1_stepsize = 0 : i32, d1_wrap = 0 : i32, d2_stepsize = 0 : i32, ddr_id = 2 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} +// CHECK: aiex.ipu.write32 {address = 119300 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483649 : ui32} +// CHECK: aiex.ipu.writebd_shimtile {bd_id = 0 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 2 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} +// CHECK: aiex.ipu.write32 {address = 119316 : ui32, column = 0 : i32, row = 0 : i32, value = 0 : ui32} module { - AIE.device(ipu) { + aie.device(ipu) { memref.global "public" @of_toMem : memref<32xi32> memref.global "public" @of_fromMem : memref<32xi32> func.func @sequence(%in : memref<4x2x8xi32>, %buf : memref<32xi32>, %out : memref<64xi32>) { @@ -24,11 +24,11 @@ module { %c8 = arith.constant 8 : i32 %c16 = arith.constant 16 : i32 %c32 = arith.constant 32 : i32 - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c32][%c0,%c0,%c0]) { metadata = @of_toMem, id = 1 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c2,%c0,%c0][%c1,%c2,%c2,%c8][%c0,%c16,%c8]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<4x2x8xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c32][%c0,%c0,%c0]) { metadata = @of_toMem, id = 1 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c2,%c0,%c0][%c1,%c2,%c2,%c8][%c0,%c16,%c8]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<4x2x8xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) - AIE.shim_dma_allocation @of_toMem (S2MM, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_toMem (S2MM, 0, 0) } } diff --git a/test/Conversion/DmaToIpu/bad_rtp_write.mlir b/test/Conversion/DmaToIpu/bad_rtp_write.mlir index 3121b4e313..a28466af13 100644 --- a/test/Conversion/DmaToIpu/bad_rtp_write.mlir +++ b/test/Conversion/DmaToIpu/bad_rtp_write.mlir @@ -8,11 +8,11 @@ // RUN: aie-opt --aie-dma-to-ipu -verify-diagnostics %s -AIE.device(ipu) { +aie.device(ipu) { func.func @sequence() { - // expected-error@+2 {{'AIEX.ipu.rtp_write' op RTP buffer address cannot be found. Has an RTP buffer been allocated?}} - // expected-error@+1 {{failed to legalize operation 'AIEX.ipu.rtp_write' that was explicitly marked illegal}} - AIEX.ipu.rtp_write(0, 2, 4, 99) { buffer_sym_name = "RTP" } + // expected-error@+2 {{'aiex.ipu.rtp_write' op RTP buffer address cannot be found. Has an RTP buffer been allocated?}} + // expected-error@+1 {{failed to legalize operation 'aiex.ipu.rtp_write' that was explicitly marked illegal}} + aiex.ipu.rtp_write(0, 2, 4, 99) { buffer_sym_name = "RTP" } return } } diff --git a/test/Conversion/DmaToIpu/dma_to_ipu.mlir b/test/Conversion/DmaToIpu/dma_to_ipu.mlir index 874fac95e3..d6401d655e 100644 --- a/test/Conversion/DmaToIpu/dma_to_ipu.mlir +++ b/test/Conversion/DmaToIpu/dma_to_ipu.mlir @@ -12,13 +12,13 @@ // TODO - more // CHECK-LABEL: test0 -// CHECK: AIEX.ipu.writebd_shimtile +// CHECK: aiex.ipu.writebd_shimtile // CHECK-SAME: ddr_id = 0 : i32 // CHECK-SAME: valid_bd = 1 : i32 -// CHECK: AIEX.ipu.writebd_shimtile +// CHECK: aiex.ipu.writebd_shimtile // CHECK-SAME: ddr_id = 1 : i32 module { -AIE.device(ipu) { +aie.device(ipu) { memref.global "public" @toMem : memref<16xi32> memref.global "public" @fromMem : memref<16xi32> func.func @test0(%arg0: memref<16xi32>, %arg1: memref<16xi32>) { @@ -26,11 +26,11 @@ AIE.device(ipu) { %c64_i32 = arith.constant 64 : i32 %c0_i32 = arith.constant 0 : i32 %c1_i32 = arith.constant 1 : i32 - AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32][%c1_i32, %c1_i32, %c16_i32, %c16_i32][%c0_i32, %c0_i32, %c64_i32]) { metadata = @toMem, id = 1 : i32 } : (i32, i32, memref<16xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) - AIEX.ipu.dma_memcpy_nd(%c0_i32, %c1_i32, %arg1[%c0_i32, %c0_i32, %c0_i32, %c16_i32][%c1_i32, %c1_i32, %c16_i32, %c16_i32][%c0_i32, %c0_i32, %c64_i32]) { metadata = @fromMem, id = 0 : i32 } : (i32, i32, memref<16xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) + aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32][%c1_i32, %c1_i32, %c16_i32, %c16_i32][%c0_i32, %c0_i32, %c64_i32]) { metadata = @toMem, id = 1 : i32 } : (i32, i32, memref<16xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) + aiex.ipu.dma_memcpy_nd(%c0_i32, %c1_i32, %arg1[%c0_i32, %c0_i32, %c0_i32, %c16_i32][%c1_i32, %c1_i32, %c16_i32, %c16_i32][%c0_i32, %c0_i32, %c64_i32]) { metadata = @fromMem, id = 0 : i32 } : (i32, i32, memref<16xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) return } - AIE.shim_dma_allocation @fromMem (MM2S, 0, 0) - AIE.shim_dma_allocation @toMem (S2MM, 0, 0) + aie.shim_dma_allocation @fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @toMem (S2MM, 0, 0) } } diff --git a/test/Conversion/DmaToIpu/push_to_queue.mlir b/test/Conversion/DmaToIpu/push_to_queue.mlir index ea43621d75..841d9e7a0f 100644 --- a/test/Conversion/DmaToIpu/push_to_queue.mlir +++ b/test/Conversion/DmaToIpu/push_to_queue.mlir @@ -7,19 +7,19 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-dma-to-ipu %s | FileCheck %s -// CHECK: AIEX.ipu.write32 {address = 119308 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483651 : ui32} -// CHECK: AIEX.ipu.write32 {address = 119316 : ui32, column = 2 : i32, row = 0 : i32, value = 196610 : ui32} +// CHECK: aiex.ipu.write32 {address = 119308 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483651 : ui32} +// CHECK: aiex.ipu.write32 {address = 119316 : ui32, column = 2 : i32, row = 0 : i32, value = 196610 : ui32} module { - AIE.device(ipu) { + aie.device(ipu) { memref.global "public" @toMem : memref<32xi32> memref.global "public" @fromMem : memref<32xi32> func.func @sequence() { - AIEX.ipu.shimtile_push_queue {metadata = @toMem, issue_token = true, repeat_count = 0 : i32, bd_id = 3 : i32 } - AIEX.ipu.shimtile_push_queue {metadata = @fromMem, issue_token = false, repeat_count = 3 : i32, bd_id = 2 : i32 } + aiex.ipu.shimtile_push_queue {metadata = @toMem, issue_token = true, repeat_count = 0 : i32, bd_id = 3 : i32 } + aiex.ipu.shimtile_push_queue {metadata = @fromMem, issue_token = false, repeat_count = 3 : i32, bd_id = 2 : i32 } return } - AIE.shim_dma_allocation @fromMem (MM2S, 0, 2) - AIE.shim_dma_allocation @toMem (S2MM, 1, 0) + aie.shim_dma_allocation @fromMem (MM2S, 0, 2) + aie.shim_dma_allocation @toMem (S2MM, 1, 0) } } diff --git a/test/Conversion/DmaToIpu/rtp_write.mlir b/test/Conversion/DmaToIpu/rtp_write.mlir index ed23a14987..9aba5ad4e7 100644 --- a/test/Conversion/DmaToIpu/rtp_write.mlir +++ b/test/Conversion/DmaToIpu/rtp_write.mlir @@ -7,18 +7,18 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-dma-to-ipu %s | FileCheck %s -// CHECK: AIEX.ipu.write32 {address = 1536 : ui32, column = 2 : i32, row = 3 : i32, value = 50 : ui32} -// CHECK: AIEX.ipu.write32 {address = 3216 : ui32, column = 0 : i32, row = 2 : i32, value = 99 : ui32} +// CHECK: aiex.ipu.write32 {address = 1536 : ui32, column = 2 : i32, row = 3 : i32, value = 50 : ui32} +// CHECK: aiex.ipu.write32 {address = 3216 : ui32, column = 0 : i32, row = 2 : i32, value = 99 : ui32} module { - AIE.device(ipu) { - %0 = AIE.tile(2, 3) - %1 = AIE.buffer(%0) {address = 1536 : i32, sym_name = "rtp"} : memref<16xi32> - %2 = AIE.tile(0, 2) - %3 = AIE.buffer(%2) {address = 3200 : i32, sym_name = "RTP"} : memref<16xi32> + aie.device(ipu) { + %0 = aie.tile(2, 3) + %1 = aie.buffer(%0) {address = 1536 : i32, sym_name = "rtp"} : memref<16xi32> + %2 = aie.tile(0, 2) + %3 = aie.buffer(%2) {address = 3200 : i32, sym_name = "RTP"} : memref<16xi32> func.func @sequence() { - AIEX.ipu.rtp_write(2, 3, 0, 50) { buffer_sym_name = "rtp" } - AIEX.ipu.rtp_write(0, 2, 4, 99) { buffer_sym_name = "RTP" } + aiex.ipu.rtp_write(2, 3, 0, 50) { buffer_sym_name = "rtp" } + aiex.ipu.rtp_write(0, 2, 4, 99) { buffer_sym_name = "RTP" } return } } diff --git a/test/Integration/julia_by_lines/aie.mlir b/test/Integration/julia_by_lines/aie.mlir index 5a244daa57..361ff61b07 100644 --- a/test/Integration/julia_by_lines/aie.mlir +++ b/test/Integration/julia_by_lines/aie.mlir @@ -14,17 +14,17 @@ // RUN: %run_on_board ./test.elf module @test { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<32x32xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "debuf" } : memref<32x32xf32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<32x32xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "debuf" } : memref<32x32xf32> - %lock13_3 = AIE.lock(%tile13, 3) + %lock13_3 = aie.lock(%tile13, 3) func.func private @func(%A: memref<32x32xi32>, %MinRe : f32, %MaxRe : f32, %MinIm : f32, %MaxIm : f32) -> () func.func private @do_line(%A: memref<32x32xi32>, %MinRe : f32, %StepRe : f32, %Im : f32, %cols : i32) -> () - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %MinRe = arith.constant -1.5 : f32 %MaxRe = arith.constant 0.5 : f32 %MinIm = arith.constant -1.0 : f32 @@ -45,11 +45,11 @@ module @test { %sum = scf.for %iv = %lb to %ub step %step iter_args(%Im = %MinIm) -> (f32) { %Im_next = arith.addf %Im, %StepIm : f32 - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire + aie.use_lock(%lock13_3, "Acquire", 1) // acquire func.call @do_line(%buf13_0, %MinRe, %StepRe, %Im, %size) : (memref<32x32xi32>, f32, f32, f32, i32) -> () - AIE.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_3, "Release", 0) // release for write scf.yield %Im_next : f32 } - AIE.end + aie.end } { link_with="kernel.o" } } diff --git a/test/Targets/AIEGenerateCDO/packet_header.mlir b/test/Targets/AIEGenerateCDO/packet_header.mlir index cdd0a6bf12..74da162ade 100644 --- a/test/Targets/AIEGenerateCDO/packet_header.mlir +++ b/test/Targets/AIEGenerateCDO/packet_header.mlir @@ -22,54 +22,54 @@ //CHECK: /* drop_header */ XAIE_SS_PKT_DONOT_DROP_HEADER module { - AIE.device(ipu) { - %0 = AIE.tile(0, 0) - %1 = AIE.shim_mux(%0) { - AIE.connect + aie.device(ipu) { + %0 = aie.tile(0, 0) + %1 = aie.shim_mux(%0) { + aie.connect } - %2 = AIE.switchbox(%0) { - %7 = AIE.amsel<0> (0) - %8 = AIE.masterset(North : 0, %7) - AIE.packet_rules(South : 3) { - AIE.rule(31, 1, %7) + %2 = aie.switchbox(%0) { + %7 = aie.amsel<0> (0) + %8 = aie.masterset(North : 0, %7) + aie.packet_rules(South : 3) { + aie.rule(31, 1, %7) } } - %3 = AIE.tile(0, 1) - %4 = AIE.switchbox(%3) { - %7 = AIE.amsel<0> (0) - %8 = AIE.amsel<0> (1) - %9 = AIE.masterset(DMA : 0, %7) - %10 = AIE.masterset(North : 0, %8) - AIE.packet_rules(DMA : 0) { - AIE.rule(31, 2, %8) + %3 = aie.tile(0, 1) + %4 = aie.switchbox(%3) { + %7 = aie.amsel<0> (0) + %8 = aie.amsel<0> (1) + %9 = aie.masterset(DMA : 0, %7) + %10 = aie.masterset(North : 0, %8) + aie.packet_rules(DMA : 0) { + aie.rule(31, 2, %8) } - AIE.packet_rules(South : 0) { - AIE.rule(31, 1, %7) + aie.packet_rules(South : 0) { + aie.rule(31, 1, %7) } } - %5 = AIE.tile(0, 2) - %6 = AIE.switchbox(%5) { - %7 = AIE.amsel<0> (0) - %8 = AIE.masterset(DMA : 0, %7) {keep_pkt_header = true} - AIE.packet_rules(South : 0) { - AIE.rule(31, 2, %7) + %5 = aie.tile(0, 2) + %6 = aie.switchbox(%5) { + %7 = aie.amsel<0> (0) + %8 = aie.masterset(DMA : 0, %7) {keep_pkt_header = true} + aie.packet_rules(South : 0) { + aie.rule(31, 2, %7) } } - AIE.wire(%1 : North, %2 : South) - AIE.wire(%0 : DMA, %1 : DMA) - AIE.wire(%3 : Core, %4 : Core) - AIE.wire(%3 : DMA, %4 : DMA) - AIE.wire(%2 : North, %4 : South) - AIE.wire(%5 : Core, %6 : Core) - AIE.wire(%5 : DMA, %6 : DMA) - AIE.wire(%4 : North, %6 : South) - AIE.packet_flow(1) { - AIE.packet_source<%0, DMA : 0> - AIE.packet_dest<%3, DMA : 0> + aie.wire(%1 : North, %2 : South) + aie.wire(%0 : DMA, %1 : DMA) + aie.wire(%3 : Core, %4 : Core) + aie.wire(%3 : DMA, %4 : DMA) + aie.wire(%2 : North, %4 : South) + aie.wire(%5 : Core, %6 : Core) + aie.wire(%5 : DMA, %6 : DMA) + aie.wire(%4 : North, %6 : South) + aie.packet_flow(1) { + aie.packet_source<%0, DMA : 0> + aie.packet_dest<%3, DMA : 0> } - AIE.packet_flow(2) { - AIE.packet_source<%3, DMA : 0> - AIE.packet_dest<%5, DMA : 0> + aie.packet_flow(2) { + aie.packet_source<%3, DMA : 0> + aie.packet_dest<%5, DMA : 0> } } } diff --git a/test/Targets/AIEGenerateJSON/shim_alloc.mlir b/test/Targets/AIEGenerateJSON/shim_alloc.mlir index eb19c7d790..a8231d7b91 100644 --- a/test/Targets/AIEGenerateJSON/shim_alloc.mlir +++ b/test/Targets/AIEGenerateJSON/shim_alloc.mlir @@ -36,10 +36,10 @@ // CHECK: } module @alloc { - AIE.device(xcve2302) { - AIE.shim_dma_allocation @of_out_1(S2MM, 1, 2) - AIE.shim_dma_allocation @of_in_1(MM2S, 1, 2) - AIE.shim_dma_allocation @of_out_0(S2MM, 0, 2) - AIE.shim_dma_allocation @of_in_0(MM2S, 0, 2) + aie.device(xcve2302) { + aie.shim_dma_allocation @of_out_1(S2MM, 1, 2) + aie.shim_dma_allocation @of_in_1(MM2S, 1, 2) + aie.shim_dma_allocation @of_out_0(S2MM, 0, 2) + aie.shim_dma_allocation @of_in_0(MM2S, 0, 2) } } \ No newline at end of file diff --git a/test/Targets/AIEGenerateTargetArch/aie.mlir b/test/Targets/AIEGenerateTargetArch/aie.mlir index 78852b59f2..0d2d312c92 100644 --- a/test/Targets/AIEGenerateTargetArch/aie.mlir +++ b/test/Targets/AIEGenerateTargetArch/aie.mlir @@ -12,5 +12,5 @@ // CHECK: AIE module { - %01 = AIE.tile(0, 1) + %01 = aie.tile(0, 1) } diff --git a/test/Targets/AIEGenerateTargetArch/aie2.mlir b/test/Targets/AIEGenerateTargetArch/aie2.mlir index f7821d3f08..9b3ee74748 100644 --- a/test/Targets/AIEGenerateTargetArch/aie2.mlir +++ b/test/Targets/AIEGenerateTargetArch/aie2.mlir @@ -12,7 +12,7 @@ // CHECK: AIE2 module { - AIE.device(xcve2802) { - %01 = AIE.tile(0, 1) + aie.device(xcve2802) { + %01 = aie.tile(0, 1) } } diff --git a/test/Targets/AIEGenerateXAIE/aie2_nd_DMA.mlir b/test/Targets/AIEGenerateXAIE/aie2_nd_DMA.mlir index 22b0f8d22e..8b336b2316 100644 --- a/test/Targets/AIEGenerateXAIE/aie2_nd_DMA.mlir +++ b/test/Targets/AIEGenerateXAIE/aie2_nd_DMA.mlir @@ -22,48 +22,48 @@ // CHECK: __mlir_aie_try(XAie_DmaSetMultiDimAddr(&(dma_tile21_bd0), &dma_tile_2_1_bd_0_tensor, 0x82000, /* len */ 128 * 4)); module @aie_module { - AIE.device(xcve2302) { - %t01 = AIE.tile(2, 1) - %buf01_0 = AIE.buffer(%t01) { address = 8192 : i32, sym_name = "in" } : memref<16xi32> - %buf01_1 = AIE.buffer(%t01) { address = 1824 : i32, sym_name = "out" } : memref<16xi32> + aie.device(xcve2302) { + %t01 = aie.tile(2, 1) + %buf01_0 = aie.buffer(%t01) { address = 8192 : i32, sym_name = "in" } : memref<16xi32> + %buf01_1 = aie.buffer(%t01) { address = 1824 : i32, sym_name = "out" } : memref<16xi32> %trhesholdValue = arith.constant 100 : i16 - %l01_0 = AIE.lock(%t01, 0) { init = 1 : i32 } - %l01_1 = AIE.lock(%t01, 1) - %l01_2 = AIE.lock(%t01, 2) { init = 1 : i32 } - %l01_3 = AIE.lock(%t01, 3) + %l01_0 = aie.lock(%t01, 0) { init = 1 : i32 } + %l01_1 = aie.lock(%t01, 1) + %l01_2 = aie.lock(%t01, 2) { init = 1 : i32 } + %l01_3 = aie.lock(%t01, 3) - %m01 = AIE.memtile_dma(%t01) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^dma0) + %m01 = aie.memtile_dma(%t01) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^dma0) ^dma0: - %memSrcDma = AIE.dma_start(MM2S, 1, ^bd1, ^dma1) + %memSrcDma = aie.dma_start(MM2S, 1, ^bd1, ^dma1) ^dma1: - %memDstDma = AIE.dma_start(S2MM, 1, ^bd2, ^dma2) + %memDstDma = aie.dma_start(S2MM, 1, ^bd2, ^dma2) ^dma2: - %dstDma = AIE.dma_start(MM2S, 0, ^bd3, ^end) + %dstDma = aie.dma_start(MM2S, 0, ^bd3, ^end) ^bd0: - AIE.use_lock(%l01_0, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_0 : memref<16xi32>, 0, 128, [, , , ]) - AIE.use_lock(%l01_1, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%l01_0, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_0 : memref<16xi32>, 0, 128, [, , , ]) + aie.use_lock(%l01_1, "Release", 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%l01_1, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_0 : memref<16xi32>, 0, 16) - AIE.use_lock(%l01_0, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%l01_1, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_0 : memref<16xi32>, 0, 16) + aie.use_lock(%l01_0, "Release", 1) + aie.next_bd ^bd1 ^bd2: - AIE.use_lock(%l01_2, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) - AIE.use_lock(%l01_3, "Release", 1) - AIE.next_bd ^bd2 + aie.use_lock(%l01_2, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) + aie.use_lock(%l01_3, "Release", 1) + aie.next_bd ^bd2 ^bd3: - AIE.use_lock(%l01_3, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) - AIE.use_lock(%l01_2, "Release", 1) - AIE.next_bd ^bd3 + aie.use_lock(%l01_3, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) + aie.use_lock(%l01_2, "Release", 1) + aie.next_bd ^bd3 ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/aie2_tileDMA.mlir b/test/Targets/AIEGenerateXAIE/aie2_tileDMA.mlir index 05646a4998..26e4cc58d0 100644 --- a/test/Targets/AIEGenerateXAIE/aie2_tileDMA.mlir +++ b/test/Targets/AIEGenerateXAIE/aie2_tileDMA.mlir @@ -21,25 +21,25 @@ // CHECK: __mlir_aie_try(XAie_DmaChannelEnable(&(ctx->DevInst), XAie_TileLoc(7,3), /* ChNum */ 0, /* dmaDir */ DMA_S2MM)); module @aie_module { - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) - %buf_a_ping = AIE.buffer(%t73) {address = 1824 : i32, sym_name = "a_ping" } : memref<256xi32> + %buf_a_ping = aie.buffer(%t73) {address = 1824 : i32, sym_name = "a_ping" } : memref<256xi32> - %lock_a_write = AIE.lock(%t73, 3) { init = 1 : i32 } - %lock_a_read = AIE.lock(%t73, 4) + %lock_a_write = aie.lock(%t73, 3) { init = 1 : i32 } + %lock_a_read = aie.lock(%t73, 4) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: // Note: acquire and release are different locks. - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/aie2_tileDMA2.mlir b/test/Targets/AIEGenerateXAIE/aie2_tileDMA2.mlir index 4371010e5c..be6679abd6 100644 --- a/test/Targets/AIEGenerateXAIE/aie2_tileDMA2.mlir +++ b/test/Targets/AIEGenerateXAIE/aie2_tileDMA2.mlir @@ -22,25 +22,25 @@ // CHECK: __mlir_aie_try(XAie_DmaChannelEnable(&(ctx->DevInst), XAie_TileLoc(7,3), /* ChNum */ 0, /* dmaDir */ DMA_S2MM)); module @aie_module { - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) - %buf_a_ping = AIE.buffer(%t73) {address = 1824 : i32, sym_name = "a_ping" } : memref<256xi32> + %buf_a_ping = aie.buffer(%t73) {address = 1824 : i32, sym_name = "a_ping" } : memref<256xi32> - %lock_a_write = AIE.lock(%t73, 3) { init = 1 : i32 } - %lock_a_read = AIE.lock(%t73, 4) + %lock_a_write = aie.lock(%t73, 3) { init = 1 : i32 } + %lock_a_read = aie.lock(%t73, 4) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: // Note: acquire and release are different locks. - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) - // AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) + // aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/aie2_tileDMA3.mlir b/test/Targets/AIEGenerateXAIE/aie2_tileDMA3.mlir index 8c926c0246..00d52ed1a2 100644 --- a/test/Targets/AIEGenerateXAIE/aie2_tileDMA3.mlir +++ b/test/Targets/AIEGenerateXAIE/aie2_tileDMA3.mlir @@ -22,25 +22,25 @@ // CHECK: __mlir_aie_try(XAie_DmaChannelEnable(&(ctx->DevInst), XAie_TileLoc(7,3), /* ChNum */ 0, /* dmaDir */ DMA_S2MM)); module @aie_module { - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) - %buf_a_ping = AIE.buffer(%t73) {address = 1824 : i32, sym_name = "a_ping" } : memref<256xi32> + %buf_a_ping = aie.buffer(%t73) {address = 1824 : i32, sym_name = "a_ping" } : memref<256xi32> - %lock_a_write = AIE.lock(%t73, 3) { init = 1 : i32 } - %lock_a_read = AIE.lock(%t73, 4) + %lock_a_write = aie.lock(%t73, 3) { init = 1 : i32 } + %lock_a_read = aie.lock(%t73, 4) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: // Note: acquire and release are different locks. - //AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^end + //aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/aie2_tileDMA_locks.mlir b/test/Targets/AIEGenerateXAIE/aie2_tileDMA_locks.mlir index d288a425f9..d7f46ce4e9 100644 --- a/test/Targets/AIEGenerateXAIE/aie2_tileDMA_locks.mlir +++ b/test/Targets/AIEGenerateXAIE/aie2_tileDMA_locks.mlir @@ -21,45 +21,45 @@ // CHECK: XAie_DmaChannelEnable(&(ctx->DevInst), XAie_TileLoc(7,4), /* ChNum */ 0, /* dmaDir */ DMA_S2MM) module @aie_module { - AIE.device(xcve2802) { - %t63 = AIE.tile(6, 4) - %t73 = AIE.tile(7, 4) - %t72 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 5) + aie.device(xcve2802) { + %t63 = aie.tile(6, 4) + %t73 = aie.tile(7, 4) + %t72 = aie.tile(7, 3) + %t74 = aie.tile(7, 5) - %buf_e = AIE.buffer(%t63) {address = 0 : i32, sym_name = "east" } : memref<256xi32> - %buf_l = AIE.buffer(%t73) {address = 1824 : i32, sym_name = "local" } : memref<256xi32> - %buf_n = AIE.buffer(%t74) {address = 0 : i32, sym_name = "north" } : memref<256xi32> - %buf_s = AIE.buffer(%t72) {address = 0 : i32, sym_name = "south" } : memref<256xi32> + %buf_e = aie.buffer(%t63) {address = 0 : i32, sym_name = "east" } : memref<256xi32> + %buf_l = aie.buffer(%t73) {address = 1824 : i32, sym_name = "local" } : memref<256xi32> + %buf_n = aie.buffer(%t74) {address = 0 : i32, sym_name = "north" } : memref<256xi32> + %buf_s = aie.buffer(%t72) {address = 0 : i32, sym_name = "south" } : memref<256xi32> - %lock_e = AIE.lock(%t63, 0) - %lock_l1 = AIE.lock(%t73, 3) - %lock_l2 = AIE.lock(%t73, 4) - %lock_n = AIE.lock(%t74, 0) - %lock_s = AIE.lock(%t72, 0) + %lock_e = aie.lock(%t63, 0) + %lock_l1 = aie.lock(%t73, 3) + %lock_l2 = aie.lock(%t73, 4) + %lock_n = aie.lock(%t74, 0) + %lock_s = aie.lock(%t72, 0) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock_l1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_l2, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_l1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_l2, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_l1, Release, 1) - AIE.next_bd ^bd2 + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_l1, Release, 1) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_l1, Release, 1) - AIE.next_bd ^bd3 + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_l1, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_l1, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_l1, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/memTileDMA.mlir b/test/Targets/AIEGenerateXAIE/memTileDMA.mlir index 1f7d6c3228..3ef0df299d 100644 --- a/test/Targets/AIEGenerateXAIE/memTileDMA.mlir +++ b/test/Targets/AIEGenerateXAIE/memTileDMA.mlir @@ -10,7 +10,7 @@ // RUN: aie-translate --aie-generate-xaie %s | FileCheck %s -// AIE.end is not the last block. +// aie.end is not the last block. // CHECK: XAie_DmaDesc [[bd0:.*]]; // CHECK: __mlir_aie_try(XAie_DmaDescInit(&(ctx->DevInst), &([[bd0]]), XAie_TileLoc(2,1))); @@ -38,46 +38,46 @@ module @aie_module { - AIE.device(xcve2302) { - %t01 = AIE.tile(2, 1) - %buf01_0 = AIE.buffer(%t01) { address = 8192 : i32, sym_name = "in" } : memref<16xi32> - %buf01_1 = AIE.buffer(%t01) { address = 1824 : i32, sym_name = "out" } : memref<16xi32> + aie.device(xcve2302) { + %t01 = aie.tile(2, 1) + %buf01_0 = aie.buffer(%t01) { address = 8192 : i32, sym_name = "in" } : memref<16xi32> + %buf01_1 = aie.buffer(%t01) { address = 1824 : i32, sym_name = "out" } : memref<16xi32> - %l01_0 = AIE.lock(%t01, 0) { init = 1 : i32 } - %l01_1 = AIE.lock(%t01, 1) - %l01_2 = AIE.lock(%t01, 2) { init = 1 : i32 } - %l01_3 = AIE.lock(%t01, 3) + %l01_0 = aie.lock(%t01, 0) { init = 1 : i32 } + %l01_1 = aie.lock(%t01, 1) + %l01_2 = aie.lock(%t01, 2) { init = 1 : i32 } + %l01_3 = aie.lock(%t01, 3) - %m01 = AIE.memtile_dma(%t01) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^dma0) + %m01 = aie.memtile_dma(%t01) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^dma0) ^dma0: - %memSrcDma = AIE.dma_start(MM2S, 1, ^bd1, ^dma1) + %memSrcDma = aie.dma_start(MM2S, 1, ^bd1, ^dma1) ^dma1: - %memDstDma = AIE.dma_start(S2MM, 1, ^bd2, ^dma2) + %memDstDma = aie.dma_start(S2MM, 1, ^bd2, ^dma2) ^dma2: - %dstDma = AIE.dma_start(MM2S, 0, ^bd3, ^end) + %dstDma = aie.dma_start(MM2S, 0, ^bd3, ^end) ^bd0: - AIE.use_lock(%l01_0, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_0 : memref<16xi32>, 0, 16) - AIE.use_lock(%l01_1, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%l01_0, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_0 : memref<16xi32>, 0, 16) + aie.use_lock(%l01_1, "Release", 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%l01_1, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_0 : memref<16xi32>, 0, 16) - AIE.use_lock(%l01_0, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%l01_1, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_0 : memref<16xi32>, 0, 16) + aie.use_lock(%l01_0, "Release", 1) + aie.next_bd ^bd1 ^bd2: - AIE.use_lock(%l01_2, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) - AIE.use_lock(%l01_3, "Release", 1) - AIE.next_bd ^bd2 + aie.use_lock(%l01_2, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) + aie.use_lock(%l01_3, "Release", 1) + aie.next_bd ^bd2 ^bd3: - AIE.use_lock(%l01_3, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) - AIE.use_lock(%l01_2, "Release", 1) - AIE.next_bd ^bd3 + aie.use_lock(%l01_3, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf01_1 : memref<16xi32>, 0, 16) + aie.use_lock(%l01_2, "Release", 1) + aie.next_bd ^bd3 ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/memTileDMA2.mlir b/test/Targets/AIEGenerateXAIE/memTileDMA2.mlir index 85ac627367..aff0040436 100644 --- a/test/Targets/AIEGenerateXAIE/memTileDMA2.mlir +++ b/test/Targets/AIEGenerateXAIE/memTileDMA2.mlir @@ -38,34 +38,34 @@ // CHECK: XAie_DmaWriteBd(&(ctx->DevInst), &([[bd2]]), XAie_TileLoc(2,1), /* bd */ 2) module @aie_module { - AIE.device(xcve2802) { - %t00 = AIE.tile(1, 1) - %t01 = AIE.tile(2, 1) - %t02 = AIE.tile(3, 1) - %buf_w = AIE.buffer(%t00) { address = 0 : i32, sym_name = "west" } : memref<16xi32> - %buf_l = AIE.buffer(%t01) { address = 0 : i32, sym_name = "local" } : memref<16xi32> - %buf_e = AIE.buffer(%t02) { address = 0 : i32, sym_name = "east" } : memref<16xi32> + aie.device(xcve2802) { + %t00 = aie.tile(1, 1) + %t01 = aie.tile(2, 1) + %t02 = aie.tile(3, 1) + %buf_w = aie.buffer(%t00) { address = 0 : i32, sym_name = "west" } : memref<16xi32> + %buf_l = aie.buffer(%t01) { address = 0 : i32, sym_name = "local" } : memref<16xi32> + %buf_e = aie.buffer(%t02) { address = 0 : i32, sym_name = "east" } : memref<16xi32> - %lock_w = AIE.lock(%t00, 0) - %lock_l = AIE.lock(%t01, 0) - %lock_e = AIE.lock(%t02, 0) + %lock_w = aie.lock(%t00, 0) + %lock_l = aie.lock(%t01, 0) + %lock_e = aie.lock(%t02, 0) - %m01 = AIE.memtile_dma(%t01) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m01 = aie.memtile_dma(%t01) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.dma_bd(%buf_w : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_w, "Release", 1) - AIE.next_bd ^bd1 + aie.dma_bd(%buf_w : memref<16xi32>, 0, 16) + aie.use_lock(%lock_w, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf_l : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_l, "Release", 1) - AIE.next_bd ^bd2 + aie.dma_bd(%buf_l : memref<16xi32>, 0, 16) + aie.use_lock(%lock_l, "Release", 1) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf_e : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_e, "Release", 1) - AIE.next_bd ^end + aie.dma_bd(%buf_e : memref<16xi32>, 0, 16) + aie.use_lock(%lock_e, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/packet_drop_header.mlir b/test/Targets/AIEGenerateXAIE/packet_drop_header.mlir index 55139c3fa6..ecc4063fb8 100644 --- a/test/Targets/AIEGenerateXAIE/packet_drop_header.mlir +++ b/test/Targets/AIEGenerateXAIE/packet_drop_header.mlir @@ -33,53 +33,53 @@ // to drop headers when the packet's destination is a DMA. // module @aie_module { - AIE.device(xcvc1902) { - %0 = AIE.tile(7, 0) - %1 = AIE.switchbox(%0) { - %7 = AIE.amsel<0> (0) - %8 = AIE.amsel<0> (1) - %9 = AIE.masterset(South : 0, %8) - %10 = AIE.masterset(North : 0, %7) - AIE.packet_rules(North : 0) { - AIE.rule(31, 10, %8) + aie.device(xcvc1902) { + %0 = aie.tile(7, 0) + %1 = aie.switchbox(%0) { + %7 = aie.amsel<0> (0) + %8 = aie.amsel<0> (1) + %9 = aie.masterset(South : 0, %8) + %10 = aie.masterset(North : 0, %7) + aie.packet_rules(North : 0) { + aie.rule(31, 10, %8) } - AIE.packet_rules(South : 4) { - AIE.rule(31, 3, %7) + aie.packet_rules(South : 4) { + aie.rule(31, 3, %7) } } - %2 = AIE.tile(7, 1) - %3 = AIE.switchbox(%2) { - %7 = AIE.amsel<0> (0) - %8 = AIE.amsel<0> (1) - %9 = AIE.masterset(DMA : 0, %7) - %10 = AIE.masterset(South : 0, %8) - AIE.packet_rules(DMA : 0) { - AIE.rule(31, 10, %8) + %2 = aie.tile(7, 1) + %3 = aie.switchbox(%2) { + %7 = aie.amsel<0> (0) + %8 = aie.amsel<0> (1) + %9 = aie.masterset(DMA : 0, %7) + %10 = aie.masterset(South : 0, %8) + aie.packet_rules(DMA : 0) { + aie.rule(31, 10, %8) } - AIE.packet_rules(South : 0) { - AIE.rule(31, 3, %7) + aie.packet_rules(South : 0) { + aie.rule(31, 3, %7) } } - %4 = AIE.lock(%2, 1) - %5 = AIE.buffer(%2) {address = 3072 : i32, sym_name = "buf1"} : memref<16xi32, 2> - %6 = AIE.mem(%2) { - %7 = AIE.dma_start(S2MM, 0, ^bb2, ^bb1) + %4 = aie.lock(%2, 1) + %5 = aie.buffer(%2) {address = 3072 : i32, sym_name = "buf1"} : memref<16xi32, 2> + %6 = aie.mem(%2) { + %7 = aie.dma_start(S2MM, 0, ^bb2, ^bb1) ^bb1: // pred: ^bb0 - %8 = AIE.dma_start(MM2S, 0, ^bb3, ^bb4) + %8 = aie.dma_start(MM2S, 0, ^bb3, ^bb4) ^bb2: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%4, Acquire, 0) - AIE.dma_bd_packet(2, 3) - AIE.dma_bd(%5 : memref<16xi32, 2>, 0, 16) - AIE.use_lock(%4, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%4, Acquire, 0) + aie.dma_bd_packet(2, 3) + aie.dma_bd(%5 : memref<16xi32, 2>, 0, 16) + aie.use_lock(%4, Release, 1) + aie.next_bd ^bb2 ^bb3: // 2 preds: ^bb1, ^bb3 - AIE.use_lock(%4, Acquire, 1) - AIE.dma_bd_packet(6, 10) - AIE.dma_bd(%5 : memref<16xi32, 2>, 0, 16) - AIE.use_lock(%4, Release, 0) - AIE.next_bd ^bb3 + aie.use_lock(%4, Acquire, 1) + aie.dma_bd_packet(6, 10) + aie.dma_bd(%5 : memref<16xi32, 2>, 0, 16) + aie.use_lock(%4, Release, 0) + aie.next_bd ^bb3 ^bb4: // pred: ^bb1 - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/packet_shim_header.mlir b/test/Targets/AIEGenerateXAIE/packet_shim_header.mlir index 0d90fbdfec..912ef14a48 100644 --- a/test/Targets/AIEGenerateXAIE/packet_shim_header.mlir +++ b/test/Targets/AIEGenerateXAIE/packet_shim_header.mlir @@ -34,50 +34,50 @@ // to insert packet headers for shim DMA BDs. // module @aie_module { - AIE.device(xcvc1902) { - %0 = AIE.tile(7, 0) - %1 = AIE.shim_mux(%0) { - AIE.connect + aie.device(xcvc1902) { + %0 = aie.tile(7, 0) + %1 = aie.shim_mux(%0) { + aie.connect } - %2 = AIE.switchbox(%0) { - %10 = AIE.amsel<0> (0) - %11 = AIE.masterset(North : 0, %10) - AIE.packet_rules(South : 3) { - AIE.rule(31, 10, %10) + %2 = aie.switchbox(%0) { + %10 = aie.amsel<0> (0) + %11 = aie.masterset(North : 0, %10) + aie.packet_rules(South : 3) { + aie.rule(31, 10, %10) } } - %3 = AIE.tile(7, 1) - %4 = AIE.switchbox(%3) { - %10 = AIE.amsel<0> (0) - %11 = AIE.masterset(DMA : 0, %10) - AIE.packet_rules(South : 0) { - AIE.rule(31, 10, %10) + %3 = aie.tile(7, 1) + %4 = aie.switchbox(%3) { + %10 = aie.amsel<0> (0) + %11 = aie.masterset(DMA : 0, %10) + aie.packet_rules(South : 0) { + aie.rule(31, 10, %10) } } - %5 = AIE.lock(%3, 1) - %6 = AIE.buffer(%3) {address = 3072 : i32, sym_name = "buf1"} : memref<32xi32, 2> - %7 = AIE.external_buffer {sym_name = "buf"} : memref<32xi32> - %8 = AIE.mem(%3) { - %10 = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) + %5 = aie.lock(%3, 1) + %6 = aie.buffer(%3) {address = 3072 : i32, sym_name = "buf1"} : memref<32xi32, 2> + %7 = aie.external_buffer {sym_name = "buf"} : memref<32xi32> + %8 = aie.mem(%3) { + %10 = aie.dma_start(S2MM, 0, ^bb1, ^bb2) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%5, Acquire, 0) - AIE.dma_bd(%6 : memref<32xi32, 2>, 0, 32) - AIE.use_lock(%5, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%5, Acquire, 0) + aie.dma_bd(%6 : memref<32xi32, 2>, 0, 32) + aie.use_lock(%5, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb0 - AIE.end + aie.end } - %9 = AIE.shim_dma(%0) { - %10 = AIE.lock(%0, 1) - %11 = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) + %9 = aie.shim_dma(%0) { + %10 = aie.lock(%0, 1) + %11 = aie.dma_start(MM2S, 0, ^bb1, ^bb2) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%10, Acquire, 1) - AIE.dma_bd_packet(6, 10) - AIE.dma_bd(%7 : memref<32xi32>, 0, 32) - AIE.use_lock(%10, Release, 0) - AIE.next_bd ^bb1 + aie.use_lock(%10, Acquire, 1) + aie.dma_bd_packet(6, 10) + aie.dma_bd(%7 : memref<32xi32>, 0, 32) + aie.use_lock(%10, Release, 0) + aie.next_bd ^bb1 ^bb2: // pred: ^bb0 - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/plio_shim.mlir b/test/Targets/AIEGenerateXAIE/plio_shim.mlir index c9b348bc66..b548461a9c 100644 --- a/test/Targets/AIEGenerateXAIE/plio_shim.mlir +++ b/test/Targets/AIEGenerateXAIE/plio_shim.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // -// This tests the lowering from AIE.switchbox ops to configuration register +// This tests the lowering from aie.switchbox ops to configuration register // writes for LibXAIEV1. This test targets PL shim tiles that only contain // stream switches that connect the AIE array to PL. // @@ -27,16 +27,16 @@ // CHECK: __mlir_aie_try(XAie_StrmConnCctEnable(&(ctx->DevInst), XAie_TileLoc(x,y), NORTH, 0, SOUTH, 0)); module { - AIE.device(xcvc1902) { - %t40 = AIE.tile(4, 0) - %t41 = AIE.tile(4, 1) - %4 = AIE.switchbox(%t40) { - AIE.connect - AIE.connect + aie.device(xcvc1902) { + %t40 = aie.tile(4, 0) + %t41 = aie.tile(4, 1) + %4 = aie.switchbox(%t40) { + aie.connect + aie.connect } - %5 = AIE.switchbox(%t41) { - AIE.connect - AIE.connect + %5 = aie.switchbox(%t41) { + aie.connect + aie.connect } } } diff --git a/test/Targets/AIEGenerateXAIE/plio_shimmux.mlir b/test/Targets/AIEGenerateXAIE/plio_shimmux.mlir index 14566acb88..c0f035882b 100644 --- a/test/Targets/AIEGenerateXAIE/plio_shimmux.mlir +++ b/test/Targets/AIEGenerateXAIE/plio_shimmux.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // -// This tests the lowering from AIE.switchbox ops to configuration register +// This tests the lowering from aie.switchbox ops to configuration register // writes for LibXAIEV1. This test targets NoC shim tiles that must configure // stream switches, and for some PLIOs the shim_mux, to connect AIE array // streams to PL. @@ -29,17 +29,17 @@ // CHECK: __mlir_aie_try(XAie_EnableAieToShimDmaStrmPort(&(ctx->DevInst), XAie_TileLoc(x,y), 2)); module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) - %4 = AIE.switchbox(%t20) { - AIE.connect + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) + %4 = aie.switchbox(%t20) { + aie.connect } - %5 = AIE.switchbox(%t21) { - AIE.connect + %5 = aie.switchbox(%t21) { + aie.connect } - %6 = AIE.shim_mux(%t20) { - AIE.connect + %6 = aie.shim_mux(%t20) { + aie.connect } } } diff --git a/test/Targets/AIEGenerateXAIE/shim.mlir b/test/Targets/AIEGenerateXAIE/shim.mlir index 5650f66d2d..f9cf7ec751 100644 --- a/test/Targets/AIEGenerateXAIE/shim.mlir +++ b/test/Targets/AIEGenerateXAIE/shim.mlir @@ -39,47 +39,47 @@ module { - AIE.device(xcvc1902) { - %buffer = AIE.external_buffer { sym_name = "buf" } : memref<16 x f32> - %t21 = AIE.tile(2, 1) - %t20 = AIE.tile(2, 0) - %c21 = AIE.core(%t21) { - AIE.end + aie.device(xcvc1902) { + %buffer = aie.external_buffer { sym_name = "buf" } : memref<16 x f32> + %t21 = aie.tile(2, 1) + %t20 = aie.tile(2, 0) + %c21 = aie.core(%t21) { + aie.end } - %s21 = AIE.switchbox(%t21) { - AIE.connect + %s21 = aie.switchbox(%t21) { + aie.connect } - %s20 = AIE.switchbox(%t20) { - AIE.connect + %s20 = aie.switchbox(%t20) { + aie.connect } - %mux = AIE.shim_mux(%t20) { - AIE.connect + %mux = aie.shim_mux(%t20) { + aie.connect } - %dma = AIE.shim_dma(%t20) { - %lock0 = AIE.lock(%t20, 0) - %lock1 = AIE.lock(%t20, 1) + %dma = aie.shim_dma(%t20) { + %lock0 = aie.lock(%t20, 0) + %lock1 = aie.lock(%t20, 1) - AIE.dma_start(S2MM, 0, ^bd0, ^dma0) + aie.dma_start(S2MM, 0, ^bd0, ^dma0) ^dma0: - AIE.dma_start(MM2S, 0, ^bd1, ^end) + aie.dma_start(MM2S, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock0, Acquire, 0) - AIE.dma_bd(%buffer : memref<16 x f32>, 0, 16) - AIE.use_lock(%lock0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock0, Acquire, 0) + aie.dma_bd(%buffer : memref<16 x f32>, 0, 16) + aie.use_lock(%lock0, Release, 1) + aie.next_bd ^bd0 ^bd1: - // AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer : memref<16 x f32>, 0, 4) - // AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd1 + // aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer : memref<16 x f32>, 0, 4) + // aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } - AIE.wire(%s21 : South, %s20 : North) - AIE.wire(%s20 : South, %mux : North) - AIE.wire(%mux : DMA, %dma : DMA) - AIE.wire(%mux : South, %t20 : DMA) - AIE.wire(%s21 : Core, %c21 : Core) - AIE.wire(%s21 : Core, %t21 : Core) + aie.wire(%s21 : South, %s20 : North) + aie.wire(%s20 : South, %mux : North) + aie.wire(%mux : DMA, %dma : DMA) + aie.wire(%mux : South, %t20 : DMA) + aie.wire(%s21 : Core, %c21 : Core) + aie.wire(%s21 : Core, %t21 : Core) } } diff --git a/test/Targets/AIEGenerateXAIE/shim_dma_packet.mlir b/test/Targets/AIEGenerateXAIE/shim_dma_packet.mlir index 16b57bf93e..2ccf0c2a1d 100644 --- a/test/Targets/AIEGenerateXAIE/shim_dma_packet.mlir +++ b/test/Targets/AIEGenerateXAIE/shim_dma_packet.mlir @@ -25,22 +25,22 @@ module { - AIE.device(xcvc1902) { - %buf = AIE.external_buffer { sym_name = "buf" } : memref<32x32xi32> + aie.device(xcvc1902) { + %buf = aie.external_buffer { sym_name = "buf" } : memref<32x32xi32> - %tile70 = AIE.tile(7, 0) - %lock70 = AIE.lock(%tile70, 0) + %tile70 = aie.tile(7, 0) + %lock70 = aie.lock(%tile70, 0) - %shimdma70 = AIE.shim_dma(%tile70) { - AIE.dma_start(MM2S, 0, ^bb1, ^bb2) + %shimdma70 = aie.shim_dma(%tile70) { + aie.dma_start(MM2S, 0, ^bb1, ^bb2) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%lock70, Acquire, 1) - AIE.dma_bd_packet(0, 2) - AIE.dma_bd(%buf : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%lock70, Release, 0) - AIE.next_bd ^bb1 + aie.use_lock(%lock70, Acquire, 1) + aie.dma_bd_packet(0, 2) + aie.dma_bd(%buf : memref<32x32xi32>, 0, 1024) + aie.use_lock(%lock70, Release, 0) + aie.next_bd ^bb1 ^bb2: // pred: ^bb0 - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/shimmux.mlir b/test/Targets/AIEGenerateXAIE/shimmux.mlir index b4829d9bfc..ed639227bf 100644 --- a/test/Targets/AIEGenerateXAIE/shimmux.mlir +++ b/test/Targets/AIEGenerateXAIE/shimmux.mlir @@ -16,10 +16,10 @@ // CHECK: __mlir_aie_try(XAie_EnableShimDmaToAieStrmPort(&(ctx->DevInst), XAie_TileLoc(x,y), 3)); module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %mux = AIE.shim_mux(%t20) { - AIE.connect + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %mux = aie.shim_mux(%t20) { + aie.connect } } } diff --git a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir index d423867529..416a6358d4 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir @@ -12,21 +12,21 @@ // CHECK: used in a DMA block that have multiple locks. module @test_error_dma_multi_lock { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %l33_0 = AIE.lock(%t33, 0) - %l33_1 = AIE.lock(%t33, 1) - AIE.mem(%t33) { - AIE.dma_start(MM2S, 0, ^bb1, ^end) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %l33_0 = aie.lock(%t33, 0) + %l33_1 = aie.lock(%t33, 1) + aie.mem(%t33) { + aie.dma_start(MM2S, 0, ^bb1, ^end) ^bb1: - AIE.use_lock(%l33_0, Acquire, 1) + aie.use_lock(%l33_0, Acquire, 1) // This should fail because only one lock can be used in a DmaBd - AIE.use_lock(%l33_1, Acquire, 1) - AIE.use_lock(%l33_0, Release, 0) - AIE.use_lock(%l33_1, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l33_1, Acquire, 1) + aie.use_lock(%l33_0, Release, 0) + aie.use_lock(%l33_1, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir index 36adcc555b..7248e878d5 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir @@ -12,20 +12,20 @@ // CHECK: acquires/releases the lock in a DMA block from/to multiple states. module @test_error_dma_multi_state { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %l33_0 = AIE.lock(%t33, 0) - AIE.mem(%t33) { - AIE.dma_start(MM2S, 0, ^bb1, ^end) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %l33_0 = aie.lock(%t33, 0) + aie.mem(%t33) { + aie.dma_start(MM2S, 0, ^bb1, ^end) ^bb1: - AIE.use_lock(%l33_0, Acquire, 0) + aie.use_lock(%l33_0, Acquire, 0) // This should fail because only one state can be acquired in a DmaBd - AIE.use_lock(%l33_0, Acquire, 1) - AIE.use_lock(%l33_0, Release, 0) - AIE.use_lock(%l33_0, Release, 1) - AIE.next_bd ^end + aie.use_lock(%l33_0, Acquire, 1) + aie.use_lock(%l33_0, Release, 0) + aie.use_lock(%l33_0, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir index 103c95ff50..8d46c4026a 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir @@ -12,21 +12,21 @@ // CHECK: used in a DMA block that have multiple locks. module @test_error_shimdma_multi_lock { - AIE.device(xcvc1902) { - %t30 = AIE.tile(3, 0) - %l30_0 = AIE.lock(%t30, 0) - %l30_1 = AIE.lock(%t30, 1) - AIE.shim_dma(%t30) { - AIE.dma_start(MM2S, 0, ^bb1, ^end) + aie.device(xcvc1902) { + %t30 = aie.tile(3, 0) + %l30_0 = aie.lock(%t30, 0) + %l30_1 = aie.lock(%t30, 1) + aie.shim_dma(%t30) { + aie.dma_start(MM2S, 0, ^bb1, ^end) ^bb1: - AIE.use_lock(%l30_0, Acquire, 1) + aie.use_lock(%l30_0, Acquire, 1) // This should fail because only one state can be acquired in a ShimBd - AIE.use_lock(%l30_1, Acquire, 1) - AIE.use_lock(%l30_0, Release, 0) - AIE.use_lock(%l30_1, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l30_1, Acquire, 1) + aie.use_lock(%l30_0, Release, 0) + aie.use_lock(%l30_1, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir index 2e6dd50bef..cc87629ee0 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir @@ -12,20 +12,20 @@ // CHECK: acquires/releases the lock in a DMA block from/to multiple states. module @test_error_shimdma_multi_state { - AIE.device(xcvc1902) { - %t30 = AIE.tile(3, 0) - %l30_0 = AIE.lock(%t30, 0) - AIE.shim_dma(%t30) { - AIE.dma_start(MM2S, 0, ^bb1, ^end) + aie.device(xcvc1902) { + %t30 = aie.tile(3, 0) + %l30_0 = aie.lock(%t30, 0) + aie.shim_dma(%t30) { + aie.dma_start(MM2S, 0, ^bb1, ^end) ^bb1: - AIE.use_lock(%l30_0, Acquire, 0) + aie.use_lock(%l30_0, Acquire, 0) // This should fail because only one lock can be used in a ShimBd - AIE.use_lock(%l30_0, Acquire, 1) - AIE.use_lock(%l30_0, Release, 0) - AIE.use_lock(%l30_0, Release, 1) - AIE.next_bd ^end + aie.use_lock(%l30_0, Acquire, 1) + aie.use_lock(%l30_0, Release, 0) + aie.use_lock(%l30_0, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/test_explicit_elf.mlir b/test/Targets/AIEGenerateXAIE/test_explicit_elf.mlir index 76ae44b4e2..7ba0bdba9a 100644 --- a/test/Targets/AIEGenerateXAIE/test_explicit_elf.mlir +++ b/test/Targets/AIEGenerateXAIE/test_explicit_elf.mlir @@ -19,10 +19,10 @@ // CHECK: __mlir_aie_try(XAie_CoreEnable(&(ctx->DevInst), XAie_TileLoc(3,3))); module @test_xaie0 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - AIE.core(%t33) { - AIE.end + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + aie.core(%t33) { + aie.end } { elf_file = "test.elf" } } } diff --git a/test/Targets/AIEGenerateXAIE/test_herd_xaie0.mlir b/test/Targets/AIEGenerateXAIE/test_herd_xaie0.mlir index 6e7e42d027..9f4e2f3be4 100644 --- a/test/Targets/AIEGenerateXAIE/test_herd_xaie0.mlir +++ b/test/Targets/AIEGenerateXAIE/test_herd_xaie0.mlir @@ -189,119 +189,119 @@ // Row Y+1: ifm[0][0-3] // Row Y: pp[0][0-3] module @test_herd_xaie0 { - AIE.device(xcvc1902) { - %0 = AIE.herd[4][1] { sym_name = "pp" } // herd ping-pong - %1 = AIE.herd[4][1] { sym_name = "ifm" } // herd input-feature-map - %2 = AIE.herd[4][4] { sym_name = "compute" } // herd compute + aie.device(xcvc1902) { + %0 = aie.herd[4][1] { sym_name = "pp" } // herd ping-pong + %1 = aie.herd[4][1] { sym_name = "ifm" } // herd input-feature-map + %2 = aie.herd[4][4] { sym_name = "compute" } // herd compute // Route <%1, DMA : 0> to <%2, DMA : 0> - %ix0 = AIE.iter(0, 1, 1) - %iy0 = AIE.iter(0, 1, 1) - %sel0 = AIE.select(%1, %ix0, %iy0) - AIE.switchbox(%sel0) { - AIE.connect + %ix0 = aie.iter(0, 1, 1) + %iy0 = aie.iter(0, 1, 1) + %sel0 = aie.select(%1, %ix0, %iy0) + aie.switchbox(%sel0) { + aie.connect } - %ix1 = AIE.iter(0, 3, 1) - %iy1 = AIE.iter(0, 1, 1) - %sel1 = AIE.select(%2, %ix1, %iy1) - AIE.switchbox(%sel1) { - AIE.connect - AIE.connect + %ix1 = aie.iter(0, 3, 1) + %iy1 = aie.iter(0, 1, 1) + %sel1 = aie.select(%2, %ix1, %iy1) + aie.switchbox(%sel1) { + aie.connect + aie.connect } - %ix2 = AIE.iter(3, 4, 1) - %iy2 = AIE.iter(0, 1, 1) - %sel2 = AIE.select(%2, %ix2, %iy2) - AIE.switchbox(%sel2) { - AIE.connect + %ix2 = aie.iter(3, 4, 1) + %iy2 = aie.iter(0, 1, 1) + %sel2 = aie.select(%2, %ix2, %iy2) + aie.switchbox(%sel2) { + aie.connect } // Route <%0, DMA: 0> to <%1, DMA: 1> - %ix3 = AIE.iter(0, 1, 1) - %iy3 = AIE.iter(0, 1, 1) - %sel3 = AIE.select(%0, %ix3, %iy3) - AIE.switchbox(%sel3) { - AIE.connect + %ix3 = aie.iter(0, 1, 1) + %iy3 = aie.iter(0, 1, 1) + %sel3 = aie.select(%0, %ix3, %iy3) + aie.switchbox(%sel3) { + aie.connect } // Route <%0, DMA: 0> to <%1, DMA: 1> - %ix4 = AIE.iter(0, 1, 1) - %iy4 = AIE.iter(0, 1, 1) - %sel4 = AIE.select(%0, %ix4, %iy4) - AIE.switchbox(%sel4) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %ix4 = aie.iter(0, 1, 1) + %iy4 = aie.iter(0, 1, 1) + %sel4 = aie.select(%0, %ix4, %iy4) + aie.switchbox(%sel4) { + aie.connect + aie.connect + aie.connect + aie.connect } - %ix5 = AIE.iter(0, 1, 1) - %iy5 = AIE.iter(1, 2, 1) - %sel5 = AIE.select(%0, %ix5, %iy5) - AIE.switchbox(%sel5) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %ix5 = aie.iter(0, 1, 1) + %iy5 = aie.iter(1, 2, 1) + %sel5 = aie.select(%0, %ix5, %iy5) + aie.switchbox(%sel5) { + aie.connect + aie.connect + aie.connect + aie.connect } - %ix6 = AIE.iter(1, 2, 1) - %iy6 = AIE.iter(0, 1, 1) - %sel6 = AIE.select(%0, %ix6, %iy6) - AIE.switchbox(%sel3) { - AIE.connect - AIE.connect - AIE.connect + %ix6 = aie.iter(1, 2, 1) + %iy6 = aie.iter(0, 1, 1) + %sel6 = aie.select(%0, %ix6, %iy6) + aie.switchbox(%sel3) { + aie.connect + aie.connect + aie.connect } - %ix7 = AIE.iter(2, 3, 1) - %iy7 = AIE.iter(0, 1, 1) - %sel7 = AIE.select(%0, %ix7, %iy7) - AIE.switchbox(%sel3) { - AIE.connect - AIE.connect + %ix7 = aie.iter(2, 3, 1) + %iy7 = aie.iter(0, 1, 1) + %sel7 = aie.select(%0, %ix7, %iy7) + aie.switchbox(%sel3) { + aie.connect + aie.connect } - %ix8 = AIE.iter(3, 4, 1) - %iy8 = AIE.iter(0, 1, 1) - %sel8 = AIE.select(%0, %ix8, %iy8) - AIE.switchbox(%sel8) { - AIE.connect + %ix8 = aie.iter(3, 4, 1) + %iy8 = aie.iter(0, 1, 1) + %sel8 = aie.select(%0, %ix8, %iy8) + aie.switchbox(%sel8) { + aie.connect } - %ix9 = AIE.iter(0, 1, 1) - %iy9 = AIE.iter(0, 1, 1) - %sel9 = AIE.select(%2, %ix9, %iy9) - AIE.switchbox(%sel9) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %ix9 = aie.iter(0, 1, 1) + %iy9 = aie.iter(0, 1, 1) + %sel9 = aie.select(%2, %ix9, %iy9) + aie.switchbox(%sel9) { + aie.connect + aie.connect + aie.connect + aie.connect } - %ix10 = AIE.iter(0, 1, 1) - %iy10 = AIE.iter(1, 2, 1) - %sel10 = AIE.select(%2, %ix10, %iy10) - AIE.switchbox(%sel10) { - AIE.connect - AIE.connect - AIE.connect + %ix10 = aie.iter(0, 1, 1) + %iy10 = aie.iter(1, 2, 1) + %sel10 = aie.select(%2, %ix10, %iy10) + aie.switchbox(%sel10) { + aie.connect + aie.connect + aie.connect } - %ix11 = AIE.iter(0, 1, 1) - %iy11 = AIE.iter(2, 3, 1) - %sel11 = AIE.select(%2, %ix11, %iy11) - AIE.switchbox(%sel10) { - AIE.connect - AIE.connect + %ix11 = aie.iter(0, 1, 1) + %iy11 = aie.iter(2, 3, 1) + %sel11 = aie.select(%2, %ix11, %iy11) + aie.switchbox(%sel10) { + aie.connect + aie.connect } - %ix12 = AIE.iter(0, 1, 1) - %iy12 = AIE.iter(2, 3, 1) - %sel12 = AIE.select(%2, %ix12, %iy12) - AIE.switchbox(%sel10) { - AIE.connect + %ix12 = aie.iter(0, 1, 1) + %iy12 = aie.iter(2, 3, 1) + %sel12 = aie.select(%2, %ix12, %iy12) + aie.switchbox(%sel10) { + aie.connect } } } diff --git a/test/Targets/AIEGenerateXAIE/test_lock_init.mlir b/test/Targets/AIEGenerateXAIE/test_lock_init.mlir index 3949e74ffd..97a998825c 100644 --- a/test/Targets/AIEGenerateXAIE/test_lock_init.mlir +++ b/test/Targets/AIEGenerateXAIE/test_lock_init.mlir @@ -12,8 +12,8 @@ // CHECK: __mlir_aie_try(XAie_LockSetValue(&(ctx->DevInst), XAie_TileLoc(3,3), XAie_LockInit(0, 1))); module @test_lock_init { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %l33_0 = AIE.lock(%t33, 0) { init = 1 : i32 } + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %l33_0 = aie.lock(%t33, 0) { init = 1 : i32 } } } diff --git a/test/Targets/AIEGenerateXAIE/test_ps0_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps0_xaie.mlir index 8f5f535d46..115bef8a9c 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps0_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps0_xaie.mlir @@ -22,34 +22,34 @@ // one-to-many, single arbiter module @test_ps0_xaie { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) - %a0_1 = AIE.amsel<0>(1) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) + %a0_1 = aie.amsel<0>(1) - AIE.masterset(Core : 0, %a0_0) - AIE.masterset(Core : 1, %a0_1) + aie.masterset(Core : 0, %a0_0) + aie.masterset(Core : 1, %a0_1) - AIE.packet_rules(West : 0) { - AIE.rule(0x1F, 0x0, %a0_0) - AIE.rule(0x1F, 0x1, %a0_1) + aie.packet_rules(West : 0) { + aie.rule(0x1F, 0x0, %a0_0) + aie.rule(0x1F, 0x1, %a0_1) } } } } //module @test_ps0_logical { -// %t11 = AIE.tile(1, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t11, West : 0> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x0) { +// aie.packet_source<%t11, West : 0> +// aie.packet_dest<%t11, Core : 0> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t11, West : 0> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x1) { +// aie.packet_source<%t11, West : 0> +// aie.packet_dest<%t11, Core : 1> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_ps1_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps1_xaie.mlir index f685a99951..848ac5644f 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps1_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps1_xaie.mlir @@ -25,40 +25,40 @@ // one-to-many, multiple arbiter module @test_ps1_xaie { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) - AIE.switchbox(%t01) { - AIE.connect + aie.switchbox(%t01) { + aie.connect } - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) - %a1_0 = AIE.amsel<1>(0) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) + %a1_0 = aie.amsel<1>(0) - AIE.masterset(Core : 0, %a0_0) - AIE.masterset(Core : 1, %a1_0) + aie.masterset(Core : 0, %a0_0) + aie.masterset(Core : 1, %a1_0) - AIE.packet_rules(West : 0) { - AIE.rule(0x1F, 0x0, %a0_0) - AIE.rule(0x1F, 0x1, %a1_0) + aie.packet_rules(West : 0) { + aie.rule(0x1F, 0x0, %a0_0) + aie.rule(0x1F, 0x1, %a1_0) } } } } //module @test_ps1_logical { -// %t01 = AIE.tile(0, 1) -// %t11 = AIE.tile(1, 1) +// %t01 = aie.tile(0, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x1) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 1> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_ps2_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps2_xaie.mlir index 2362c06b97..e20dd26bc5 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps2_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps2_xaie.mlir @@ -25,42 +25,42 @@ // many-to-one, single arbiter module @test_ps2_xaie { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) - AIE.switchbox(%t01) { - AIE.connect - AIE.connect + aie.switchbox(%t01) { + aie.connect + aie.connect } - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) - AIE.masterset(Core : 0, %a0_0) + aie.masterset(Core : 0, %a0_0) - AIE.packet_rules(West : 0) { - AIE.rule(0x1F, 0x0, %a0_0) + aie.packet_rules(West : 0) { + aie.rule(0x1F, 0x0, %a0_0) } - AIE.packet_rules(West : 1) { - AIE.rule(0x1F, 0x1, %a0_0) + aie.packet_rules(West : 1) { + aie.rule(0x1F, 0x1, %a0_0) } } } } //module @test_ps2_logical { -// %t01 = AIE.tile(0, 1) -// %t11 = AIE.tile(1, 1) +// %t01 = aie.tile(0, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t01, DMA : 1> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x1) { +// aie.packet_source<%t01, DMA : 1> +// aie.packet_dest<%t11, Core : 0> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_ps3_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps3_xaie.mlir index a50cf1a4fe..34e428e664 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps3_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps3_xaie.mlir @@ -25,41 +25,41 @@ // partial multicast module @test_ps3_xaie { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) - AIE.switchbox(%t01) { - AIE.connect + aie.switchbox(%t01) { + aie.connect } - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) - %a0_1 = AIE.amsel<0>(1) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) + %a0_1 = aie.amsel<0>(1) - AIE.masterset(Core : 0, %a0_0) - AIE.masterset(Core : 1, %a0_0, %a0_1) + aie.masterset(Core : 0, %a0_0) + aie.masterset(Core : 1, %a0_0, %a0_1) - AIE.packet_rules(West : 0) { - AIE.rule(0x1F, 0x0, %a0_0) - AIE.rule(0x1F, 0x1, %a0_1) + aie.packet_rules(West : 0) { + aie.rule(0x1F, 0x0, %a0_0) + aie.rule(0x1F, 0x1, %a0_1) } } } } //module @test_ps3_logical { -// %t01 = AIE.tile(0, 1) -// %t11 = AIE.tile(1, 1) +// %t01 = aie.tile(0, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> +// aie.packet_dest<%t11, Core : 1> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x1) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 1> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_ps4_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps4_xaie.mlir index 8873907479..e20b75479d 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps4_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps4_xaie.mlir @@ -26,45 +26,45 @@ // many-to-many, 2 streams, 1 arbiter module @test_ps4_xaie { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) - AIE.switchbox(%t01) { - AIE.connect - AIE.connect + aie.switchbox(%t01) { + aie.connect + aie.connect } - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) - %a0_1 = AIE.amsel<0>(1) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) + %a0_1 = aie.amsel<0>(1) - AIE.masterset(Core : 0, %a0_0) - AIE.masterset(Core : 1, %a0_0, %a0_1) + aie.masterset(Core : 0, %a0_0) + aie.masterset(Core : 1, %a0_0, %a0_1) - AIE.packet_rules(West : 0) { - AIE.rule(0x1F, 0x0, %a0_0) // multi-cast + aie.packet_rules(West : 0) { + aie.rule(0x1F, 0x0, %a0_0) // multi-cast } - AIE.packet_rules(West : 1) { - AIE.rule(0x1F, 0x1, %a0_1) + aie.packet_rules(West : 1) { + aie.rule(0x1F, 0x1, %a0_1) } } } } //module @test_ps4_logical { -// %t01 = AIE.tile(0, 1) -// %t11 = AIE.tile(1, 1) +// %t01 = aie.tile(0, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> +// aie.packet_dest<%t11, Core : 1> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t01, DMA : 1> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x1) { +// aie.packet_source<%t01, DMA : 1> +// aie.packet_dest<%t11, Core : 1> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_ps5_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps5_xaie.mlir index 44c6f2d959..31327ebcbf 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps5_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps5_xaie.mlir @@ -28,50 +28,50 @@ // many-to-many, 3 streams, 2 arbiters module @test_ps5_xaie { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) - AIE.switchbox(%t01) { - AIE.connect - AIE.connect + aie.switchbox(%t01) { + aie.connect + aie.connect } - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) - %a1_0 = AIE.amsel<1>(0) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) + %a1_0 = aie.amsel<1>(0) - AIE.masterset(Core : 0, %a0_0) - AIE.masterset(Core : 1, %a1_0) + aie.masterset(Core : 0, %a0_0) + aie.masterset(Core : 1, %a1_0) - AIE.packet_rules(West : 0) { - AIE.rule(0x1F, 0x0, %a0_0) - AIE.rule(0x1F, 0x1, %a1_0) + aie.packet_rules(West : 0) { + aie.rule(0x1F, 0x0, %a0_0) + aie.rule(0x1F, 0x1, %a1_0) } - AIE.packet_rules(West : 1) { - AIE.rule(0x1F, 0x0, %a1_0) + aie.packet_rules(West : 1) { + aie.rule(0x1F, 0x0, %a1_0) } } } } //module @test_ps5_logical { -// %t01 = AIE.tile(0, 1) -// %t11 = AIE.tile(1, 1) +// %t01 = aie.tile(0, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x1) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 1> // } // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 1> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 1> +// aie.packet_dest<%t11, Core : 1> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_ps6_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps6_xaie.mlir index 11155c4645..e67d723da9 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps6_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps6_xaie.mlir @@ -28,50 +28,50 @@ // many-to-many, 3 streams, 1 arbiters module @test_ps6_xaie { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) - AIE.switchbox(%t01) { - AIE.connect - AIE.connect + aie.switchbox(%t01) { + aie.connect + aie.connect } - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) - %a0_1 = AIE.amsel<0>(1) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) + %a0_1 = aie.amsel<0>(1) - AIE.masterset(Core : 0, %a0_0) - AIE.masterset(Core : 1, %a0_1) + aie.masterset(Core : 0, %a0_0) + aie.masterset(Core : 1, %a0_1) - AIE.packet_rules(West : 0) { - AIE.rule(0x1F, 0x0, %a0_0) - AIE.rule(0x1F, 0x1, %a0_1) + aie.packet_rules(West : 0) { + aie.rule(0x1F, 0x0, %a0_0) + aie.rule(0x1F, 0x1, %a0_1) } - AIE.packet_rules(West : 1) { - AIE.rule(0x1F, 0x0, %a0_1) + aie.packet_rules(West : 1) { + aie.rule(0x1F, 0x0, %a0_1) } } } } //module @test_ps6_logical { -// %t01 = AIE.tile(0, 1) -// %t11 = AIE.tile(1, 1) +// %t01 = aie.tile(0, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x1) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 1> // } // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 1> -// AIE.packet_dest<%t11, Core : 1> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 1> +// aie.packet_dest<%t11, Core : 1> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_ps7_xaie.mlir b/test/Targets/AIEGenerateXAIE/test_ps7_xaie.mlir index 7abf4f4379..ba696b20d5 100644 --- a/test/Targets/AIEGenerateXAIE/test_ps7_xaie.mlir +++ b/test/Targets/AIEGenerateXAIE/test_ps7_xaie.mlir @@ -25,47 +25,47 @@ // many-to-one, 3 streams, 1 arbiters module @test_ps7_xaie { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) - AIE.switchbox(%t01) { - AIE.connect - AIE.connect + aie.switchbox(%t01) { + aie.connect + aie.connect } - AIE.switchbox(%t11) { - %a0_0 = AIE.amsel<0>(0) + aie.switchbox(%t11) { + %a0_0 = aie.amsel<0>(0) - AIE.masterset(Core : 0, %a0_0) + aie.masterset(Core : 0, %a0_0) - AIE.packet_rules(West : 0) { - AIE.rule(0x1E, 0x0, %a0_0) + aie.packet_rules(West : 0) { + aie.rule(0x1E, 0x0, %a0_0) } - AIE.packet_rules(West : 1) { - AIE.rule(0x1F, 0x2, %a0_0) + aie.packet_rules(West : 1) { + aie.rule(0x1F, 0x2, %a0_0) } } } } //module @test_ps7_logical { -// %t01 = AIE.tile(0, 1) -// %t11 = AIE.tile(1, 1) +// %t01 = aie.tile(0, 1) +// %t11 = aie.tile(1, 1) // -// AIE.packet_flow(0x0) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x0) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> // } // -// AIE.packet_flow(0x1) { -// AIE.packet_source<%t01, DMA : 0> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x1) { +// aie.packet_source<%t01, DMA : 0> +// aie.packet_dest<%t11, Core : 0> // } // -// AIE.packet_flow(0x2) { -// AIE.packet_source<%t01, DMA : 1> -// AIE.packet_dest<%t11, Core : 0> +// aie.packet_flow(0x2) { +// aie.packet_source<%t01, DMA : 1> +// aie.packet_dest<%t11, Core : 0> // } //} diff --git a/test/Targets/AIEGenerateXAIE/test_xaie1.mlir b/test/Targets/AIEGenerateXAIE/test_xaie1.mlir index 7ded1b7dfc..92190151ee 100644 --- a/test/Targets/AIEGenerateXAIE/test_xaie1.mlir +++ b/test/Targets/AIEGenerateXAIE/test_xaie1.mlir @@ -21,22 +21,22 @@ // CHECK: __mlir_aie_try(XAie_DmaChannelEnable(&(ctx->DevInst), XAie_TileLoc(3,3), {{.*}} 0, /* dmaDir */ DMA_MM2S)); module @test_xaie1 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) - %buf33_0 = AIE.buffer(%t33) {address = 4096 : i32, sym_name = "buf33_0"} : memref<256xi32> - %buf33_1 = AIE.buffer(%t33) {address = 5120 : i32, sym_name = "buf33_1"} : memref<256xi32> - %l33_0 = AIE.lock(%t33, 0) + %buf33_0 = aie.buffer(%t33) {address = 4096 : i32, sym_name = "buf33_0"} : memref<256xi32> + %buf33_1 = aie.buffer(%t33) {address = 5120 : i32, sym_name = "buf33_1"} : memref<256xi32> + %l33_0 = aie.lock(%t33, 0) - %m33 = AIE.mem(%t33) { - %srcDma = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %m33 = aie.mem(%t33) { + %srcDma = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l33_0, Acquire, 0) - AIE.dma_bd(%buf33_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_0, Release, 1) - AIE.next_bd ^end + aie.use_lock(%l33_0, Acquire, 0) + aie.dma_bd(%buf33_1 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_0, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/Targets/AIEGenerateXAIE/test_xaie2.mlir b/test/Targets/AIEGenerateXAIE/test_xaie2.mlir index 1b2e1f01ae..c88a37b01f 100644 --- a/test/Targets/AIEGenerateXAIE/test_xaie2.mlir +++ b/test/Targets/AIEGenerateXAIE/test_xaie2.mlir @@ -29,29 +29,29 @@ // CHECK: __mlir_aie_try(XAie_DmaChannelEnable(&(ctx->DevInst), XAie_TileLoc(3,3), {{.*}}0, {{.*}}DMA_S2MM)); module @test_xaie2 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) - %buf33_0 = AIE.buffer(%t33) { address = 0x1000, sym_name = "buff33_0" }: memref<256xi32> - %buf33_1 = AIE.buffer(%t33) { address = 0x1400, sym_name = "buff33_1" }: memref<16xi32> + %buf33_0 = aie.buffer(%t33) { address = 0x1000, sym_name = "buff33_0" }: memref<256xi32> + %buf33_1 = aie.buffer(%t33) { address = 0x1400, sym_name = "buff33_1" }: memref<16xi32> - %l33_0 = AIE.lock(%t33, 0) - %l33_1 = AIE.lock(%t33, 1) + %l33_0 = aie.lock(%t33, 0) + %l33_1 = aie.lock(%t33, 1) - %m33 = AIE.mem(%t33) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m33 = aie.mem(%t33) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l33_0, Acquire, 0) - AIE.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_0, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%l33_0, Acquire, 0) + aie.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_0, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%l33_0, Acquire, 0) - AIE.dma_bd(%buf33_1 : memref<16xi32>, 0, 4) - AIE.use_lock(%l33_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%l33_0, Acquire, 0) + aie.dma_bd(%buf33_1 : memref<16xi32>, 0, 4) + aie.use_lock(%l33_0, Release, 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/test_xaie3.mlir b/test/Targets/AIEGenerateXAIE/test_xaie3.mlir index 0ce5fda1d7..f3b8924528 100644 --- a/test/Targets/AIEGenerateXAIE/test_xaie3.mlir +++ b/test/Targets/AIEGenerateXAIE/test_xaie3.mlir @@ -15,23 +15,23 @@ // CHECK: __mlir_aie_try(XAie_DmaSetLock(&([[bd0]]), XAie_LockInit(0,1),XAie_LockInit(0,0))); module @test_xaie3 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %t44 = AIE.tile(4, 4) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %t44 = aie.tile(4, 4) - %buf33_0 = AIE.buffer(%t33) { address = 0, sym_name = "buf33_0" }: memref<256xi32> + %buf33_0 = aie.buffer(%t33) { address = 0, sym_name = "buf33_0" }: memref<256xi32> - %l33_0 = AIE.lock(%t33, 0) + %l33_0 = aie.lock(%t33, 0) - %m33 = AIE.mem(%t33) { - %srcDma = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %m33 = aie.mem(%t33) { + %srcDma = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l33_0, Acquire, 1) - AIE.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_0, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l33_0, Acquire, 1) + aie.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_0, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/test_xaie4.mlir b/test/Targets/AIEGenerateXAIE/test_xaie4.mlir index 57c4278614..e9c957c7fd 100644 --- a/test/Targets/AIEGenerateXAIE/test_xaie4.mlir +++ b/test/Targets/AIEGenerateXAIE/test_xaie4.mlir @@ -31,32 +31,32 @@ // CHECK: __mlir_aie_try(XAie_DmaChannelEnable(&(ctx->DevInst), XAie_TileLoc(3,3), {{.*}}0, {{.*}}DMA_S2MM)); module @test_xaie3 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %t44 = AIE.tile(4, 4) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %t44 = aie.tile(4, 4) - %buf33_0 = AIE.buffer(%t33) {address = 0x1000, sym_name = "buf33_0" } : memref<256xi32> - %buf33_1 = AIE.buffer(%t33) {address = 0x1400, sym_name = "buf33_1" } : memref<256xi32> + %buf33_0 = aie.buffer(%t33) {address = 0x1000, sym_name = "buf33_0" } : memref<256xi32> + %buf33_1 = aie.buffer(%t33) {address = 0x1400, sym_name = "buf33_1" } : memref<256xi32> - %l33_0 = AIE.lock(%t33, 0) - %l33_1 = AIE.lock(%t33, 1) + %l33_0 = aie.lock(%t33, 0) + %l33_1 = aie.lock(%t33, 1) - %m33 = AIE.mem(%t33) { - %srcDma = AIE.dma_start(MM2S, 0, ^bd0, ^dma0) + %m33 = aie.mem(%t33) { + %srcDma = aie.dma_start(MM2S, 0, ^bd0, ^dma0) ^dma0: - %destDma = AIE.dma_start(S2MM, 0, ^bd1, ^end) + %destDma = aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%l33_0, Acquire, 1) - AIE.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_0, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l33_0, Acquire, 1) + aie.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_0, Release, 0) + aie.next_bd ^end ^bd1: - AIE.use_lock(%l33_1, Acquire, 1) - AIE.dma_bd(%buf33_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_1, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l33_1, Acquire, 1) + aie.dma_bd(%buf33_1 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_1, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/Targets/AIEGenerateXAIE/tileDMA.mlir b/test/Targets/AIEGenerateXAIE/tileDMA.mlir index 9ac63cf030..4712b03340 100644 --- a/test/Targets/AIEGenerateXAIE/tileDMA.mlir +++ b/test/Targets/AIEGenerateXAIE/tileDMA.mlir @@ -10,7 +10,7 @@ // RUN: aie-translate --aie-generate-xaie %s | FileCheck %s -// AIE.end is not the last block. +// aie.end is not the last block. // CHECK: XAie_DmaDesc [[bd0:.*]]; // CHECK: __mlir_aie_try(XAie_DmaDescInit(&(ctx->DevInst), &([[bd0]]), XAie_TileLoc(8,3))); @@ -24,28 +24,28 @@ module @aie_module { - AIE.device(xcvc1902) { - %0 = AIE.tile(8, 3) - %24 = AIE.buffer(%0) {address = 4096 : i32, sym_name = "buf6"} : memref<64xi32, 2> - %25 = AIE.lock(%0, 0) - %26 = AIE.buffer(%0) {address = 4352 : i32, sym_name = "buf7"} : memref<64xi32, 2> - %27 = AIE.lock(%0, 1) - %28 = AIE.mem(%0) { - %38 = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) + aie.device(xcvc1902) { + %0 = aie.tile(8, 3) + %24 = aie.buffer(%0) {address = 4096 : i32, sym_name = "buf6"} : memref<64xi32, 2> + %25 = aie.lock(%0, 0) + %26 = aie.buffer(%0) {address = 4352 : i32, sym_name = "buf7"} : memref<64xi32, 2> + %27 = aie.lock(%0, 1) + %28 = aie.mem(%0) { + %38 = aie.dma_start(S2MM, 0, ^bb1, ^bb3) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%25, Acquire, 0) - AIE.dma_bd(%24 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%25, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%25, Acquire, 0) + aie.dma_bd(%24 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%25, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb3 - AIE.end + aie.end ^bb3: // pred: ^bb0 - %39 = AIE.dma_start(MM2S, 0, ^bb4, ^bb2) + %39 = aie.dma_start(MM2S, 0, ^bb4, ^bb2) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%27, Acquire, 1) - AIE.dma_bd(%26 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%27, Release, 0) - AIE.next_bd ^bb4 + aie.use_lock(%27, Acquire, 1) + aie.dma_bd(%26 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%27, Release, 0) + aie.next_bd ^bb4 } } } diff --git a/test/Targets/IPU/ipu_instgen.mlir b/test/Targets/IPU/ipu_instgen.mlir index 434d3c1a88..dc69afe9b7 100644 --- a/test/Targets/IPU/ipu_instgen.mlir +++ b/test/Targets/IPU/ipu_instgen.mlir @@ -10,7 +10,7 @@ // RUN: aie-translate --aie-ipu-instgen %s | FileCheck %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @test0(%arg0: memref<16xf32>, %arg1: memref<16xf32>) { // look for the prolog. @@ -48,7 +48,7 @@ module { // CHECK: 00000009 // CHECK: 2CD0000C // CHECK: 2E107041 - AIEX.ipu.writebd_shimtile { bd_id = 6 : i32, + aiex.ipu.writebd_shimtile { bd_id = 6 : i32, buffer_length = 1 : i32, buffer_offset = 2 : i32, enable_packet = 0 : i32, @@ -77,10 +77,10 @@ module { // CHECK: 02030400 // CHECK: ABC00DEF // CHECK: 00000042 - AIEX.ipu.write32 { column = 3 : i32, row = 4 : i32, address = 0xabc00def : ui32, value = 0x42 : ui32 } + aiex.ipu.write32 { column = 3 : i32, row = 4 : i32, address = 0xabc00def : ui32, value = 0x42 : ui32 } // CHECK: 03030401 // CHECK: 05010200 - AIEX.ipu.sync { column = 3 : i32, row = 4 : i32, direction = 1 : i32, channel = 5 : i32, column_num = 1 : i32, row_num = 2 : i32 } + aiex.ipu.sync { column = 3 : i32, row = 4 : i32, direction = 1 : i32, channel = 5 : i32, column_num = 1 : i32, row_num = 2 : i32 } return } } diff --git a/test/aiecc/simple.mlir b/test/aiecc/simple.mlir index 1b5da1dbc1..78c6e94c66 100644 --- a/test/aiecc/simple.mlir +++ b/test/aiecc/simple.mlir @@ -28,12 +28,12 @@ // NOCOMPILE-NOT: {{^[^ ]*llc}} module { - %12 = AIE.tile(1, 2) - %buf = AIE.buffer(%12) : memref<256xi32> - %4 = AIE.core(%12) { + %12 = aie.tile(1, 2) + %buf = aie.buffer(%12) : memref<256xi32> + %4 = aie.core(%12) { %0 = arith.constant 0 : i32 %1 = arith.constant 0 : index memref.store %0, %buf[%1] : memref<256xi32> - AIE.end + aie.end } } diff --git a/test/aiecc/simple_aie2.mlir b/test/aiecc/simple_aie2.mlir index adb4386cc8..7e0e0f9da0 100644 --- a/test/aiecc/simple_aie2.mlir +++ b/test/aiecc/simple_aie2.mlir @@ -27,14 +27,14 @@ // NOCOMPILE-NOT: {{^[^ ]*llc}} module { - AIE.device(xcve2302) { - %12 = AIE.tile(1, 2) - %buf = AIE.buffer(%12) : memref<256xi32> - %4 = AIE.core(%12) { + aie.device(xcve2302) { + %12 = aie.tile(1, 2) + %buf = aie.buffer(%12) : memref<256xi32> + %4 = aie.core(%12) { %0 = arith.constant 0 : i32 %1 = arith.constant 0 : index memref.store %0, %buf[%1] : memref<256xi32> - AIE.end + aie.end } } } diff --git a/test/assign-buffer-addresses/error.mlir b/test/assign-buffer-addresses/error.mlir index 8c3d49316b..901481da18 100644 --- a/test/assign-buffer-addresses/error.mlir +++ b/test/assign-buffer-addresses/error.mlir @@ -9,25 +9,25 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --aie-assign-buffer-addresses %s 2>&1 | FileCheck %s -// CHECK: error: 'AIE.tile' op allocated buffers exceeded available memory +// CHECK: error: 'aie.tile' op allocated buffers exceeded available memory // CHECK: (stack) : 0x0-0x3FF (1024 bytes) // CHECK: b : 0x400-0x83FF (32768 bytes) // CHECK: c : 0x8400-0x841F (32 bytes) // CHECK: a : 0x8420-0x842F (16 bytes) module @test { - AIE.device(xcvc1902) { - %0 = AIE.tile(3, 3) - %b1 = AIE.buffer(%0) { sym_name = "a" } : memref<16xi8> - %1 = AIE.buffer(%0) { sym_name = "b" } : memref<8192xi32> - %b2 = AIE.buffer(%0) { sym_name = "c" } : memref<16xi16> - %3 = AIE.tile(4, 4) - %4 = AIE.buffer(%3) : memref<500xi32> - AIE.core(%0) { - AIE.end + aie.device(xcvc1902) { + %0 = aie.tile(3, 3) + %b1 = aie.buffer(%0) { sym_name = "a" } : memref<16xi8> + %1 = aie.buffer(%0) { sym_name = "b" } : memref<8192xi32> + %b2 = aie.buffer(%0) { sym_name = "c" } : memref<16xi16> + %3 = aie.tile(4, 4) + %4 = aie.buffer(%3) : memref<500xi32> + aie.core(%0) { + aie.end } - AIE.core(%3) { - AIE.end + aie.core(%3) { + aie.end } } } diff --git a/test/assign-buffer-addresses/memtile_error.mlir b/test/assign-buffer-addresses/memtile_error.mlir index b444dea405..029e256896 100644 --- a/test/assign-buffer-addresses/memtile_error.mlir +++ b/test/assign-buffer-addresses/memtile_error.mlir @@ -9,14 +9,14 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --aie-assign-buffer-addresses %s 2>&1 | FileCheck %s -// CHECK: error: 'AIE.tile' op allocated buffers exceeded available memory +// CHECK: error: 'aie.tile' op allocated buffers exceeded available memory module @test { - AIE.device(xcve2302) { - %0 = AIE.tile(3, 1) - %b1 = AIE.buffer(%0) { sym_name = "a" } : memref<132000xi32> - AIE.memtile_dma(%0) { - AIE.end + aie.device(xcve2302) { + %0 = aie.tile(3, 1) + %b1 = aie.buffer(%0) { sym_name = "a" } : memref<132000xi32> + aie.memtile_dma(%0) { + aie.end } } } diff --git a/test/assign-buffer-addresses/memtile_simple.mlir b/test/assign-buffer-addresses/memtile_simple.mlir index 57023e2b08..4e7562476c 100644 --- a/test/assign-buffer-addresses/memtile_simple.mlir +++ b/test/assign-buffer-addresses/memtile_simple.mlir @@ -9,14 +9,14 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-assign-buffer-addresses %s 2>&1 | FileCheck %s -// CHECK: {{.*}} AIE.buffer({{.*}}) {address = 0 : i32, sym_name = "a"} : memref<65536xi32> +// CHECK: {{.*}} aie.buffer({{.*}}) {address = 0 : i32, sym_name = "a"} : memref<65536xi32> module @test { - AIE.device(xcve2302) { - %0 = AIE.tile(3, 1) - %b1 = AIE.buffer(%0) { sym_name = "a" } : memref<65536xi32> - AIE.memtile_dma(%0) { - AIE.end + aie.device(xcve2302) { + %0 = aie.tile(3, 1) + %b1 = aie.buffer(%0) { sym_name = "a" } : memref<65536xi32> + aie.memtile_dma(%0) { + aie.end } } } diff --git a/test/assign-buffer-addresses/simple.mlir b/test/assign-buffer-addresses/simple.mlir index fa90697263..917c7d03c5 100644 --- a/test/assign-buffer-addresses/simple.mlir +++ b/test/assign-buffer-addresses/simple.mlir @@ -9,24 +9,24 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-assign-buffer-addresses %s | FileCheck %s -// CHECK: {{.*}} AIE.buffer({{.*}}) {address = 3104 : i32, sym_name = "a"} : memref<16xi8> -// CHECK: {{.*}} AIE.buffer({{.*}}) {address = 1024 : i32, sym_name = "b"} : memref<512xi32> -// CHECK: {{.*}} AIE.buffer({{.*}}) {address = 3072 : i32, sym_name = "c"} : memref<16xi16> -// CHECK: {{.*}} AIE.buffer({{.*}}) {address = 1024 : i32, sym_name = "_anonymous0"} : memref<500xi32> +// CHECK: {{.*}} aie.buffer({{.*}}) {address = 3104 : i32, sym_name = "a"} : memref<16xi8> +// CHECK: {{.*}} aie.buffer({{.*}}) {address = 1024 : i32, sym_name = "b"} : memref<512xi32> +// CHECK: {{.*}} aie.buffer({{.*}}) {address = 3072 : i32, sym_name = "c"} : memref<16xi16> +// CHECK: {{.*}} aie.buffer({{.*}}) {address = 1024 : i32, sym_name = "_anonymous0"} : memref<500xi32> module @test { - AIE.device(xcvc1902) { - %0 = AIE.tile(3, 3) - %b1 = AIE.buffer(%0) { sym_name = "a" } : memref<16xi8> - %1 = AIE.buffer(%0) { sym_name = "b" } : memref<512xi32> - %b2 = AIE.buffer(%0) { sym_name = "c" } : memref<16xi16> - %3 = AIE.tile(4, 4) - %4 = AIE.buffer(%3) : memref<500xi32> - AIE.core(%0) { - AIE.end + aie.device(xcvc1902) { + %0 = aie.tile(3, 3) + %b1 = aie.buffer(%0) { sym_name = "a" } : memref<16xi8> + %1 = aie.buffer(%0) { sym_name = "b" } : memref<512xi32> + %b2 = aie.buffer(%0) { sym_name = "c" } : memref<16xi16> + %3 = aie.tile(4, 4) + %4 = aie.buffer(%3) : memref<500xi32> + aie.core(%0) { + aie.end } - AIE.core(%3) { - AIE.end + aie.core(%3) { + aie.end } } } diff --git a/test/assign-lock-ids/assign-lockIDs.mlir b/test/assign-lock-ids/assign-lockIDs.mlir index d58415e509..2fdbb3a7aa 100644 --- a/test/assign-lock-ids/assign-lockIDs.mlir +++ b/test/assign-lock-ids/assign-lockIDs.mlir @@ -9,114 +9,114 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-assign-lock-ids --split-input-file %s | FileCheck %s -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_0]], 2) -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 1) -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_1]], 0) -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_1]], 1) -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_1]], 4) -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_1]], 2) -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_1]], 3) -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_1]], 5) -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_1]], 6) -// CHECK: %[[VAL_14:.*]] = AIE.lock(%[[VAL_1]], 7) -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_1]], 10) -// CHECK: %[[VAL_16:.*]] = AIE.lock(%[[VAL_1]], 11) -// CHECK: %[[VAL_17:.*]] = AIE.lock(%[[VAL_1]], 8) -// CHECK: %[[VAL_18:.*]] = AIE.lock(%[[VAL_1]], 9) -// CHECK: %[[VAL_19:.*]] = AIE.lock(%[[VAL_1]], 12) -// CHECK: %[[VAL_20:.*]] = AIE.lock(%[[VAL_1]], 13) -// CHECK: %[[VAL_21:.*]] = AIE.lock(%[[VAL_1]], 14) -// CHECK: %[[VAL_22:.*]] = AIE.lock(%[[VAL_1]], 15) -// CHECK: %[[VAL_23:.*]] = AIE.lock(%[[VAL_2]], 0) -// CHECK: %[[VAL_24:.*]] = AIE.lock(%[[VAL_2]], 1) -// CHECK: %[[VAL_25:.*]] = AIE.lock(%[[VAL_2]], 9) -// CHECK: %[[VAL_26:.*]] = AIE.lock(%[[VAL_2]], 2) -// CHECK: %[[VAL_27:.*]] = AIE.lock(%[[VAL_3]], 0) -// CHECK: %[[VAL_28:.*]] = AIE.lock(%[[VAL_3]], 1) -// CHECK: %[[VAL_29:.*]] = AIE.lock(%[[VAL_3]], 2) -// CHECK: %[[VAL_30:.*]] = AIE.lock(%[[VAL_3]], 3) -// CHECK: %[[VAL_31:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_32:.*]] = AIE.lock(%[[VAL_31]], 0) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_0]], 2) +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 1) +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_1]], 0) +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_1]], 1) +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_1]], 4) +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_1]], 2) +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_1]], 3) +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_1]], 5) +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_1]], 6) +// CHECK: %[[VAL_14:.*]] = aie.lock(%[[VAL_1]], 7) +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_1]], 10) +// CHECK: %[[VAL_16:.*]] = aie.lock(%[[VAL_1]], 11) +// CHECK: %[[VAL_17:.*]] = aie.lock(%[[VAL_1]], 8) +// CHECK: %[[VAL_18:.*]] = aie.lock(%[[VAL_1]], 9) +// CHECK: %[[VAL_19:.*]] = aie.lock(%[[VAL_1]], 12) +// CHECK: %[[VAL_20:.*]] = aie.lock(%[[VAL_1]], 13) +// CHECK: %[[VAL_21:.*]] = aie.lock(%[[VAL_1]], 14) +// CHECK: %[[VAL_22:.*]] = aie.lock(%[[VAL_1]], 15) +// CHECK: %[[VAL_23:.*]] = aie.lock(%[[VAL_2]], 0) +// CHECK: %[[VAL_24:.*]] = aie.lock(%[[VAL_2]], 1) +// CHECK: %[[VAL_25:.*]] = aie.lock(%[[VAL_2]], 9) +// CHECK: %[[VAL_26:.*]] = aie.lock(%[[VAL_2]], 2) +// CHECK: %[[VAL_27:.*]] = aie.lock(%[[VAL_3]], 0) +// CHECK: %[[VAL_28:.*]] = aie.lock(%[[VAL_3]], 1) +// CHECK: %[[VAL_29:.*]] = aie.lock(%[[VAL_3]], 2) +// CHECK: %[[VAL_30:.*]] = aie.lock(%[[VAL_3]], 3) +// CHECK: %[[VAL_31:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_32:.*]] = aie.lock(%[[VAL_31]], 0) module @test_assign_lockIDs { - AIE.device(xcvc1902) { - %t22 = AIE.tile(2, 2) - %t23 = AIE.tile(2, 3) - %t33 = AIE.tile(3, 3) - %t34 = AIE.tile(3, 4) + aie.device(xcvc1902) { + %t22 = aie.tile(2, 2) + %t23 = aie.tile(2, 3) + %t33 = aie.tile(3, 3) + %t34 = aie.tile(3, 4) - %l22_0 = AIE.lock(%t22, 0) - %l22_2 = AIE.lock(%t22, 2) - %l22_1 = AIE.lock(%t22) + %l22_0 = aie.lock(%t22, 0) + %l22_2 = aie.lock(%t22, 2) + %l22_1 = aie.lock(%t22) - %l23_0 = AIE.lock(%t23) - %l23_1 = AIE.lock(%t23) - %l23_4 = AIE.lock(%t23, 4) - %l23_2 = AIE.lock(%t23) - %l23_3 = AIE.lock(%t23) - %l23_5 = AIE.lock(%t23) - %l23_6 = AIE.lock(%t23) - %l23_7 = AIE.lock(%t23) - %l23_10 = AIE.lock(%t23) - %l23_11 = AIE.lock(%t23) - %l23_8 = AIE.lock(%t23, 8) - %l23_9 = AIE.lock(%t23, 9) - %l23_12 = AIE.lock(%t23) - %l23_13 = AIE.lock(%t23) - %l23_14 = AIE.lock(%t23) - %l23_15 = AIE.lock(%t23) + %l23_0 = aie.lock(%t23) + %l23_1 = aie.lock(%t23) + %l23_4 = aie.lock(%t23, 4) + %l23_2 = aie.lock(%t23) + %l23_3 = aie.lock(%t23) + %l23_5 = aie.lock(%t23) + %l23_6 = aie.lock(%t23) + %l23_7 = aie.lock(%t23) + %l23_10 = aie.lock(%t23) + %l23_11 = aie.lock(%t23) + %l23_8 = aie.lock(%t23, 8) + %l23_9 = aie.lock(%t23, 9) + %l23_12 = aie.lock(%t23) + %l23_13 = aie.lock(%t23) + %l23_14 = aie.lock(%t23) + %l23_15 = aie.lock(%t23) - %l33_0 = AIE.lock(%t33, 0) - %l33_1 = AIE.lock(%t33) - %l33_9 = AIE.lock(%t33, 9) - %l33_2 = AIE.lock(%t33) + %l33_0 = aie.lock(%t33, 0) + %l33_1 = aie.lock(%t33) + %l33_9 = aie.lock(%t33, 9) + %l33_2 = aie.lock(%t33) - %l34_0 = AIE.lock(%t34) - %l34_1 = AIE.lock(%t34) - %l34_2 = AIE.lock(%t34) - %l34_3 = AIE.lock(%t34) + %l34_0 = aie.lock(%t34) + %l34_1 = aie.lock(%t34) + %l34_2 = aie.lock(%t34) + %l34_3 = aie.lock(%t34) - %t60 = AIE.tile(6, 0) - %l60 = AIE.lock(%t60) + %t60 = aie.tile(6, 0) + %l60 = aie.lock(%t60) } } // ----- module @memTileTest { - AIE.device(xcve2802) { + aie.device(xcve2802) { // Memory tiles on xcve have 64 locks. - %tmemtile = AIE.tile(1,1) - %l0 = AIE.lock(%tmemtile, 1) - %l1 = AIE.lock(%tmemtile, 0) - %l2 = AIE.lock(%tmemtile) - %l3 = AIE.lock(%tmemtile) - %l4 = AIE.lock(%tmemtile) - %l5 = AIE.lock(%tmemtile) - %l6 = AIE.lock(%tmemtile) - %l7 = AIE.lock(%tmemtile) - %l8 = AIE.lock(%tmemtile) - %l9 = AIE.lock(%tmemtile) - %l10 = AIE.lock(%tmemtile) - %l11 = AIE.lock(%tmemtile) - %l12 = AIE.lock(%tmemtile) - %l13 = AIE.lock(%tmemtile) - %l14 = AIE.lock(%tmemtile,33) - %l15 = AIE.lock(%tmemtile) - %l16 = AIE.lock(%tmemtile) - %l17 = AIE.lock(%tmemtile) - %l18 = AIE.lock(%tmemtile) - %l19 = AIE.lock(%tmemtile,2) + %tmemtile = aie.tile(1,1) + %l0 = aie.lock(%tmemtile, 1) + %l1 = aie.lock(%tmemtile, 0) + %l2 = aie.lock(%tmemtile) + %l3 = aie.lock(%tmemtile) + %l4 = aie.lock(%tmemtile) + %l5 = aie.lock(%tmemtile) + %l6 = aie.lock(%tmemtile) + %l7 = aie.lock(%tmemtile) + %l8 = aie.lock(%tmemtile) + %l9 = aie.lock(%tmemtile) + %l10 = aie.lock(%tmemtile) + %l11 = aie.lock(%tmemtile) + %l12 = aie.lock(%tmemtile) + %l13 = aie.lock(%tmemtile) + %l14 = aie.lock(%tmemtile,33) + %l15 = aie.lock(%tmemtile) + %l16 = aie.lock(%tmemtile) + %l17 = aie.lock(%tmemtile) + %l18 = aie.lock(%tmemtile) + %l19 = aie.lock(%tmemtile,2) } } // CHECK-LABEL: memTileTest -// CHECK-COUNT-20: AIE.lock -// CHECK-NOT: AIE.lock +// CHECK-COUNT-20: aie.lock +// CHECK-NOT: aie.lock diff --git a/test/assign-lock-ids/invalid.mlir b/test/assign-lock-ids/invalid.mlir index 65cf456460..9b84044442 100644 --- a/test/assign-lock-ids/invalid.mlir +++ b/test/assign-lock-ids/invalid.mlir @@ -1,65 +1,65 @@ // RUN: aie-opt --aie-assign-lock-ids %s -split-input-file -verify-diagnostics -AIE.device(xcve2802) { +aie.device(xcve2802) { // expected-note @below {{because only 16 locks available in this tile}} - %tMemTile = AIE.tile(4,4) - %l0 = AIE.lock(%tMemTile) - %l1 = AIE.lock(%tMemTile) - %l2 = AIE.lock(%tMemTile) - %l3 = AIE.lock(%tMemTile) - %l4 = AIE.lock(%tMemTile) - %l5 = AIE.lock(%tMemTile) - %l6 = AIE.lock(%tMemTile) - %l7 = AIE.lock(%tMemTile) - %l8 = AIE.lock(%tMemTile) - %l9 = AIE.lock(%tMemTile) - %l10 = AIE.lock(%tMemTile) - %l11 = AIE.lock(%tMemTile) - %l12 = AIE.lock(%tMemTile) - %l13 = AIE.lock(%tMemTile) - %l14 = AIE.lock(%tMemTile) - %l15 = AIE.lock(%tMemTile) + %tMemTile = aie.tile(4,4) + %l0 = aie.lock(%tMemTile) + %l1 = aie.lock(%tMemTile) + %l2 = aie.lock(%tMemTile) + %l3 = aie.lock(%tMemTile) + %l4 = aie.lock(%tMemTile) + %l5 = aie.lock(%tMemTile) + %l6 = aie.lock(%tMemTile) + %l7 = aie.lock(%tMemTile) + %l8 = aie.lock(%tMemTile) + %l9 = aie.lock(%tMemTile) + %l10 = aie.lock(%tMemTile) + %l11 = aie.lock(%tMemTile) + %l12 = aie.lock(%tMemTile) + %l13 = aie.lock(%tMemTile) + %l14 = aie.lock(%tMemTile) + %l15 = aie.lock(%tMemTile) // expected-error @below {{not allocated a lock}} - %l16 = AIE.lock(%tMemTile) - %l17 = AIE.lock(%tMemTile) - %l18 = AIE.lock(%tMemTile) - %l19 = AIE.lock(%tMemTile) + %l16 = aie.lock(%tMemTile) + %l17 = aie.lock(%tMemTile) + %l18 = aie.lock(%tMemTile) + %l19 = aie.lock(%tMemTile) } // ----- -AIE.device(xcve2802) { +aie.device(xcve2802) { // expected-note @below {{because only 16 locks available in this tile}} - %tMemTile = AIE.tile(4,4) - %l0 = AIE.lock(%tMemTile) - %l1 = AIE.lock(%tMemTile, 1) - %l2 = AIE.lock(%tMemTile) - %l3 = AIE.lock(%tMemTile) - %l4 = AIE.lock(%tMemTile) - %l5 = AIE.lock(%tMemTile) - %l6 = AIE.lock(%tMemTile) - %l7 = AIE.lock(%tMemTile, 2) - %l8 = AIE.lock(%tMemTile) - %l9 = AIE.lock(%tMemTile) - %l10 = AIE.lock(%tMemTile, 15) - %l11 = AIE.lock(%tMemTile) - %l12 = AIE.lock(%tMemTile) - %l13 = AIE.lock(%tMemTile) - %l14 = AIE.lock(%tMemTile) + %tMemTile = aie.tile(4,4) + %l0 = aie.lock(%tMemTile) + %l1 = aie.lock(%tMemTile, 1) + %l2 = aie.lock(%tMemTile) + %l3 = aie.lock(%tMemTile) + %l4 = aie.lock(%tMemTile) + %l5 = aie.lock(%tMemTile) + %l6 = aie.lock(%tMemTile) + %l7 = aie.lock(%tMemTile, 2) + %l8 = aie.lock(%tMemTile) + %l9 = aie.lock(%tMemTile) + %l10 = aie.lock(%tMemTile, 15) + %l11 = aie.lock(%tMemTile) + %l12 = aie.lock(%tMemTile) + %l13 = aie.lock(%tMemTile) + %l14 = aie.lock(%tMemTile) // expected-error @below {{not allocated a lock}} - %l15 = AIE.lock(%tMemTile) - %l16 = AIE.lock(%tMemTile) - %l17 = AIE.lock(%tMemTile, 3) - %l18 = AIE.lock(%tMemTile) - %l19 = AIE.lock(%tMemTile) + %l15 = aie.lock(%tMemTile) + %l16 = aie.lock(%tMemTile) + %l17 = aie.lock(%tMemTile, 3) + %l18 = aie.lock(%tMemTile) + %l19 = aie.lock(%tMemTile) } // ----- -AIE.device(xcve2802) { +aie.device(xcve2802) { //expected-note @below {{tile has lock ops assigned to same lock}} - %t22 = AIE.tile(2,2) - %l0 = AIE.lock(%t22, 7) + %t22 = aie.tile(2,2) + %l0 = aie.lock(%t22, 7) // expected-error @below {{is assigned to the same lock (7) as another op}} - %l1 = AIE.lock(%t22, 7) + %l1 = aie.lock(%t22, 7) } diff --git a/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir b/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir index c917b6a7f0..c4bbfd2840 100755 --- a/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir +++ b/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir @@ -13,52 +13,52 @@ module @benchmark01_DDR_SHIM_fill_rate { - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - //%t72 = AIE.tile(7, 2) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + //%t72 = aie.tile(7, 2) - %buffer = AIE.external_buffer {sym_name = "buffer" } : memref<7168xi32> + %buffer = aie.external_buffer {sym_name = "buffer" } : memref<7168xi32> // Fixup - %sw = AIE.switchbox(%t70) { - AIE.connect<"South" : 3, "North" : 3> + %sw = aie.switchbox(%t70) { + aie.connect<"South" : 3, "North" : 3> } - %mux = AIE.shim_mux(%t70) { - AIE.connect<"DMA" : 0, "North": 3> + %mux = aie.shim_mux(%t70) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma = AIE.switchbox(%t71) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma = aie.switchbox(%t71) { + aie.connect<"South" : 3, "DMA" : 0> } - %dma = AIE.shim_dma(%t70) { - %lock1 = AIE.lock(%t70, 1) + %dma = aie.shim_dma(%t70) { + %lock1 = aie.lock(%t70, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %buf71_0 = AIE.buffer(%t71) {sym_name = "buf71_0" } : memref<7168xi32> + %buf71_0 = aie.buffer(%t71) {sym_name = "buf71_0" } : memref<7168xi32> - %l71_0 = AIE.lock(%t71, 0) - %l71_1 = AIE.lock(%t71, 1) + %l71_0 = aie.lock(%t71, 0) + %l71_1 = aie.lock(%t71, 1) - %m71 = AIE.mem(%t71) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m71 = aie.mem(%t71) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l71_0, "Acquire", 0) - AIE.dma_bd(%buf71_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l71_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l71_0, "Acquire", 0) + aie.dma_bd(%buf71_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l71_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir b/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir index 1cc09cbde0..6df5516d63 100755 --- a/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir +++ b/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir @@ -12,51 +12,51 @@ // RUN: %run_on_board ./test.elf module @benchmark_02_LM2DDR { - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) - %lock_a_ping = AIE.lock(%t71, 3) // a_ping + %lock_a_ping = aie.lock(%t71, 3) // a_ping - %buf71_0 = AIE.buffer(%t71) {sym_name = "buf71_0" } : memref<7168xi32> + %buf71_0 = aie.buffer(%t71) {sym_name = "buf71_0" } : memref<7168xi32> //Declare the buffers - %buffer_out = AIE.external_buffer {sym_name = "buffer" } : memref<7168xi32> + %buffer_out = aie.external_buffer {sym_name = "buffer" } : memref<7168xi32> - %m71 = AIE.mem(%t71) { - %srcDma = AIE.dma_start(MM2S, 1, ^bd0, ^end) + %m71 = aie.mem(%t71) { + %srcDma = aie.dma_start(MM2S, 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf71_0 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf71_0 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %dma = AIE.shim_dma(%t70) { - %lock1 = AIE.lock(%t70, 2) + %dma = aie.shim_dma(%t70) { + %lock1 = aie.lock(%t70, 2) - AIE.dma_start(S2MM, 0, ^bd0, ^end) + aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } // Shim DMA connection to kernel - %sw2 = AIE.switchbox(%t71){ - AIE.connect<"DMA" : 1, "South" : 2> + %sw2 = aie.switchbox(%t71){ + aie.connect<"DMA" : 1, "South" : 2> } - %sw1 = AIE.switchbox(%t70) { - AIE.connect<"North" : 2, "South" : 2> + %sw1 = aie.switchbox(%t70) { + aie.connect<"North" : 2, "South" : 2> } - %mux1 = AIE.shim_mux (%t70) { - AIE.connect<"North" : 2, "DMA" : 0> + %mux1 = aie.shim_mux (%t70) { + aie.connect<"North" : 2, "DMA" : 0> } } diff --git a/test/benchmarks/03_Flood_DDR/aie.mlir b/test/benchmarks/03_Flood_DDR/aie.mlir index 9f71ab32dc..952a76d1ea 100755 --- a/test/benchmarks/03_Flood_DDR/aie.mlir +++ b/test/benchmarks/03_Flood_DDR/aie.mlir @@ -14,702 +14,702 @@ module @benchmark03_Flood_DDR { - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) - %sw2 = AIE.switchbox(%t20) { - AIE.connect<"South" : 3, "North" : 3> + %sw2 = aie.switchbox(%t20) { + aie.connect<"South" : 3, "North" : 3> } - %mux2 = AIE.shim_mux(%t20) { - AIE.connect<"DMA" : 0, "North": 3> + %mux2 = aie.shim_mux(%t20) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma2 = AIE.switchbox(%t21) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma2 = aie.switchbox(%t21) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf21_0 = AIE.buffer(%t21) {sym_name = "buf21_0" } : memref<7168xi32> - %l21_0 = AIE.lock(%t21, 0) + %buf21_0 = aie.buffer(%t21) {sym_name = "buf21_0" } : memref<7168xi32> + %l21_0 = aie.lock(%t21, 0) - %m21 = AIE.mem(%t21) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m21 = aie.mem(%t21) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l21_0, "Acquire", 0) - AIE.dma_bd(%buf21_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l21_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l21_0, "Acquire", 0) + aie.dma_bd(%buf21_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l21_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_20 = AIE.external_buffer {sym_name = "buffer_out_20" } : memref<7168xi32> - %l20 = AIE.lock(%t20, 1) - %dma20 = AIE.shim_dma(%t20) { + %buffer_out_20 = aie.external_buffer {sym_name = "buffer_out_20" } : memref<7168xi32> + %l20 = aie.lock(%t20, 1) + %dma20 = aie.shim_dma(%t20) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l20, Acquire, 1) - AIE.dma_bd(%buffer_out_20 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%l20, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%l20, Acquire, 1) + aie.dma_bd(%buffer_out_20 : memref<7168xi32>, 0, 7168) + aie.use_lock(%l20, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t30 = AIE.tile(3, 0) - %t31 = AIE.tile(3, 1) + %t30 = aie.tile(3, 0) + %t31 = aie.tile(3, 1) - %sw3 = AIE.switchbox(%t30) { - AIE.connect<"South" : 3, "North" : 3> + %sw3 = aie.switchbox(%t30) { + aie.connect<"South" : 3, "North" : 3> } - %mux3 = AIE.shim_mux(%t30) { - AIE.connect<"DMA" : 0, "North": 3> + %mux3 = aie.shim_mux(%t30) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma3 = AIE.switchbox(%t31) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma3 = aie.switchbox(%t31) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf31_0 = AIE.buffer(%t31) {sym_name = "buf31_0" } : memref<7168xi32> - %l31_0 = AIE.lock(%t31, 0) + %buf31_0 = aie.buffer(%t31) {sym_name = "buf31_0" } : memref<7168xi32> + %l31_0 = aie.lock(%t31, 0) - %m31 = AIE.mem(%t31) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m31 = aie.mem(%t31) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l31_0, "Acquire", 0) - AIE.dma_bd(%buf31_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l31_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l31_0, "Acquire", 0) + aie.dma_bd(%buf31_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l31_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_30 = AIE.external_buffer {sym_name = "buffer_out_30" } : memref<7168xi32> - %dma30 = AIE.shim_dma(%t30) { - %lock1 = AIE.lock(%t30, 1) + %buffer_out_30 = aie.external_buffer {sym_name = "buffer_out_30" } : memref<7168xi32> + %dma30 = aie.shim_dma(%t30) { + %lock1 = aie.lock(%t30, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_30 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_30 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t60 = AIE.tile(6, 0) - %t61 = AIE.tile(6, 1) + %t60 = aie.tile(6, 0) + %t61 = aie.tile(6, 1) - %sw6 = AIE.switchbox(%t60) { - AIE.connect<"South" : 3, "North" : 3> + %sw6 = aie.switchbox(%t60) { + aie.connect<"South" : 3, "North" : 3> } - %mux6 = AIE.shim_mux(%t60) { - AIE.connect<"DMA" : 0, "North": 3> + %mux6 = aie.shim_mux(%t60) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma6 = AIE.switchbox(%t61) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma6 = aie.switchbox(%t61) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf61_0 = AIE.buffer(%t61) {sym_name = "buf61_0" } : memref<7168xi32> - %l61_0 = AIE.lock(%t61, 0) + %buf61_0 = aie.buffer(%t61) {sym_name = "buf61_0" } : memref<7168xi32> + %l61_0 = aie.lock(%t61, 0) - %m61 = AIE.mem(%t61) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m61 = aie.mem(%t61) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l61_0, "Acquire", 0) - AIE.dma_bd(%buf61_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l61_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l61_0, "Acquire", 0) + aie.dma_bd(%buf61_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l61_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_60 = AIE.external_buffer {sym_name = "buffer_out_60" } : memref<7168xi32> - %dma60 = AIE.shim_dma(%t60) { - %lock1 = AIE.lock(%t60, 1) + %buffer_out_60 = aie.external_buffer {sym_name = "buffer_out_60" } : memref<7168xi32> + %dma60 = aie.shim_dma(%t60) { + %lock1 = aie.lock(%t60, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_60 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_60 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) - %sw = AIE.switchbox(%t70) { - AIE.connect<"South" : 3, "North" : 3> + %sw = aie.switchbox(%t70) { + aie.connect<"South" : 3, "North" : 3> } - %mux = AIE.shim_mux(%t70) { - AIE.connect<"DMA" : 0, "North": 3> + %mux = aie.shim_mux(%t70) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma = AIE.switchbox(%t71) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma = aie.switchbox(%t71) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf71_0 = AIE.buffer(%t71) {sym_name = "buf71_0" } : memref<7168xi32> + %buf71_0 = aie.buffer(%t71) {sym_name = "buf71_0" } : memref<7168xi32> - %l71_0 = AIE.lock(%t71, 0) + %l71_0 = aie.lock(%t71, 0) - %m71 = AIE.mem(%t71) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m71 = aie.mem(%t71) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l71_0, "Acquire", 0) - AIE.dma_bd(%buf71_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l71_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l71_0, "Acquire", 0) + aie.dma_bd(%buf71_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l71_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_70 = AIE.external_buffer {sym_name = "buffer_out_70" } : memref<7168xi32> - %dma70 = AIE.shim_dma(%t70) { - %lock1 = AIE.lock(%t70, 1) + %buffer_out_70 = aie.external_buffer {sym_name = "buffer_out_70" } : memref<7168xi32> + %dma70 = aie.shim_dma(%t70) { + %lock1 = aie.lock(%t70, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_70 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_70 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t100 = AIE.tile(10, 0) - %t101 = AIE.tile(10, 1) + %t100 = aie.tile(10, 0) + %t101 = aie.tile(10, 1) - %sw10 = AIE.switchbox(%t100) { - AIE.connect<"South" : 3, "North" : 3> + %sw10 = aie.switchbox(%t100) { + aie.connect<"South" : 3, "North" : 3> } - %mux10 = AIE.shim_mux(%t100) { - AIE.connect<"DMA" : 0, "North": 3> + %mux10 = aie.shim_mux(%t100) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma10 = AIE.switchbox(%t101) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma10 = aie.switchbox(%t101) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf101_0 = AIE.buffer(%t101) {sym_name = "buf101_0" } : memref<7168xi32> + %buf101_0 = aie.buffer(%t101) {sym_name = "buf101_0" } : memref<7168xi32> - %l101_0 = AIE.lock(%t101, 0) + %l101_0 = aie.lock(%t101, 0) - %m101 = AIE.mem(%t101) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m101 = aie.mem(%t101) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l101_0, "Acquire", 0) - AIE.dma_bd(%buf101_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l101_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l101_0, "Acquire", 0) + aie.dma_bd(%buf101_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l101_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_100 = AIE.external_buffer {sym_name = "buffer_out_100" } : memref<7168xi32> - %dma100 = AIE.shim_dma(%t100) { - %lock1 = AIE.lock(%t100, 1) + %buffer_out_100 = aie.external_buffer {sym_name = "buffer_out_100" } : memref<7168xi32> + %dma100 = aie.shim_dma(%t100) { + %lock1 = aie.lock(%t100, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_100 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_100 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t110 = AIE.tile(11, 0) - %t111 = AIE.tile(11, 1) + %t110 = aie.tile(11, 0) + %t111 = aie.tile(11, 1) - %sw11 = AIE.switchbox(%t110) { - AIE.connect<"South" : 3, "North" : 3> + %sw11 = aie.switchbox(%t110) { + aie.connect<"South" : 3, "North" : 3> } - %mux11 = AIE.shim_mux(%t110) { - AIE.connect<"DMA" : 0, "North": 3> + %mux11 = aie.shim_mux(%t110) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma11 = AIE.switchbox(%t111) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma11 = aie.switchbox(%t111) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf111_0 = AIE.buffer(%t111) {sym_name = "buf111_0" } : memref<7168xi32> - %l111_0 = AIE.lock(%t111, 0) + %buf111_0 = aie.buffer(%t111) {sym_name = "buf111_0" } : memref<7168xi32> + %l111_0 = aie.lock(%t111, 0) - %m111 = AIE.mem(%t111) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m111 = aie.mem(%t111) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l111_0, "Acquire", 0) - AIE.dma_bd(%buf111_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l111_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l111_0, "Acquire", 0) + aie.dma_bd(%buf111_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l111_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_110 = AIE.external_buffer {sym_name = "buffer_out_110" } : memref<7168xi32> - %dma110 = AIE.shim_dma(%t110) { - %lock1 = AIE.lock(%t110, 1) + %buffer_out_110 = aie.external_buffer {sym_name = "buffer_out_110" } : memref<7168xi32> + %dma110 = aie.shim_dma(%t110) { + %lock1 = aie.lock(%t110, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_110 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_110 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t180 = AIE.tile(18, 0) - %t181 = AIE.tile(18, 1) + %t180 = aie.tile(18, 0) + %t181 = aie.tile(18, 1) - %sw18 = AIE.switchbox(%t180) { - AIE.connect<"South" : 3, "North" : 3> + %sw18 = aie.switchbox(%t180) { + aie.connect<"South" : 3, "North" : 3> } - %mux18 = AIE.shim_mux(%t180) { - AIE.connect<"DMA" : 0, "North": 3> + %mux18 = aie.shim_mux(%t180) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma18 = AIE.switchbox(%t181) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma18 = aie.switchbox(%t181) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf181_0 = AIE.buffer(%t181) {sym_name = "buf181_0" } : memref<7168xi32> - %l181_0 = AIE.lock(%t181, 0) + %buf181_0 = aie.buffer(%t181) {sym_name = "buf181_0" } : memref<7168xi32> + %l181_0 = aie.lock(%t181, 0) - %m181 = AIE.mem(%t181) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m181 = aie.mem(%t181) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l181_0, "Acquire", 0) - AIE.dma_bd(%buf181_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l181_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l181_0, "Acquire", 0) + aie.dma_bd(%buf181_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l181_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_180 = AIE.external_buffer {sym_name = "buffer_out_180" } : memref<7168xi32> - %dma180 = AIE.shim_dma(%t180) { - %lock1 = AIE.lock(%t180, 1) + %buffer_out_180 = aie.external_buffer {sym_name = "buffer_out_180" } : memref<7168xi32> + %dma180 = aie.shim_dma(%t180) { + %lock1 = aie.lock(%t180, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_180 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_180 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t190 = AIE.tile(19, 0) - %t191 = AIE.tile(19, 1) + %t190 = aie.tile(19, 0) + %t191 = aie.tile(19, 1) - %sw19 = AIE.switchbox(%t190) { - AIE.connect<"South" : 3, "North" : 3> + %sw19 = aie.switchbox(%t190) { + aie.connect<"South" : 3, "North" : 3> } - %mux19 = AIE.shim_mux(%t190) { - AIE.connect<"DMA" : 0, "North": 3> + %mux19 = aie.shim_mux(%t190) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma19 = AIE.switchbox(%t191) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma19 = aie.switchbox(%t191) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf191_0 = AIE.buffer(%t191) {sym_name = "buf191_0" } : memref<7168xi32> - %l191_0 = AIE.lock(%t191, 0) + %buf191_0 = aie.buffer(%t191) {sym_name = "buf191_0" } : memref<7168xi32> + %l191_0 = aie.lock(%t191, 0) - %m191 = AIE.mem(%t191) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m191 = aie.mem(%t191) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l191_0, "Acquire", 0) - AIE.dma_bd(%buf191_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l191_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l191_0, "Acquire", 0) + aie.dma_bd(%buf191_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l191_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_190 = AIE.external_buffer {sym_name = "buffer_out_190" } : memref<7168xi32> - %dma190 = AIE.shim_dma(%t190) { - %lock1 = AIE.lock(%t190, 1) + %buffer_out_190 = aie.external_buffer {sym_name = "buffer_out_190" } : memref<7168xi32> + %dma190 = aie.shim_dma(%t190) { + %lock1 = aie.lock(%t190, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_190 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_190 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t260 = AIE.tile(26, 0) - %t261 = AIE.tile(26, 1) + %t260 = aie.tile(26, 0) + %t261 = aie.tile(26, 1) - %sw26 = AIE.switchbox(%t260) { - AIE.connect<"South" : 3, "North" : 3> + %sw26 = aie.switchbox(%t260) { + aie.connect<"South" : 3, "North" : 3> } - %mux26 = AIE.shim_mux(%t260) { - AIE.connect<"DMA" : 0, "North": 3> + %mux26 = aie.shim_mux(%t260) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma26 = AIE.switchbox(%t261) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma26 = aie.switchbox(%t261) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf261_0 = AIE.buffer(%t261) {sym_name = "buf261_0" } : memref<7168xi32> - %l261_0 = AIE.lock(%t261, 0) + %buf261_0 = aie.buffer(%t261) {sym_name = "buf261_0" } : memref<7168xi32> + %l261_0 = aie.lock(%t261, 0) - %m261 = AIE.mem(%t261) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m261 = aie.mem(%t261) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l261_0, "Acquire", 0) - AIE.dma_bd(%buf261_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l261_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l261_0, "Acquire", 0) + aie.dma_bd(%buf261_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l261_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_260 = AIE.external_buffer {sym_name = "buffer_out_260" } : memref<7168xi32> - %dma260 = AIE.shim_dma(%t260) { - %lock1 = AIE.lock(%t260, 1) + %buffer_out_260 = aie.external_buffer {sym_name = "buffer_out_260" } : memref<7168xi32> + %dma260 = aie.shim_dma(%t260) { + %lock1 = aie.lock(%t260, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_260 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_260 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t270 = AIE.tile(27, 0) - %t271 = AIE.tile(27, 1) + %t270 = aie.tile(27, 0) + %t271 = aie.tile(27, 1) - %sw27 = AIE.switchbox(%t270) { - AIE.connect<"South" : 3, "North" : 3> + %sw27 = aie.switchbox(%t270) { + aie.connect<"South" : 3, "North" : 3> } - %mux27 = AIE.shim_mux(%t270) { - AIE.connect<"DMA" : 0, "North": 3> + %mux27 = aie.shim_mux(%t270) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma27 = AIE.switchbox(%t271) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma27 = aie.switchbox(%t271) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf271_0 = AIE.buffer(%t271) {sym_name = "buf271_0" } : memref<7168xi32> - %l271_0 = AIE.lock(%t271, 0) + %buf271_0 = aie.buffer(%t271) {sym_name = "buf271_0" } : memref<7168xi32> + %l271_0 = aie.lock(%t271, 0) - %m271 = AIE.mem(%t271) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m271 = aie.mem(%t271) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l271_0, "Acquire", 0) - AIE.dma_bd(%buf271_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l271_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l271_0, "Acquire", 0) + aie.dma_bd(%buf271_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l271_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_270 = AIE.external_buffer {sym_name = "buffer_out_270" } : memref<7168xi32> - %dma270 = AIE.shim_dma(%t270) { - %lock1 = AIE.lock(%t270, 1) + %buffer_out_270 = aie.external_buffer {sym_name = "buffer_out_270" } : memref<7168xi32> + %dma270 = aie.shim_dma(%t270) { + %lock1 = aie.lock(%t270, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_270 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_270 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t340 = AIE.tile(34, 0) - %t341 = AIE.tile(34, 1) + %t340 = aie.tile(34, 0) + %t341 = aie.tile(34, 1) - %sw34 = AIE.switchbox(%t340) { - AIE.connect<"South" : 3, "North" : 3> + %sw34 = aie.switchbox(%t340) { + aie.connect<"South" : 3, "North" : 3> } - %mux34 = AIE.shim_mux(%t340) { - AIE.connect<"DMA" : 0, "North": 3> + %mux34 = aie.shim_mux(%t340) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma34 = AIE.switchbox(%t341) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma34 = aie.switchbox(%t341) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf341_0 = AIE.buffer(%t341) {sym_name = "buf341_0" } : memref<7168xi32> - %l341_0 = AIE.lock(%t341, 0) + %buf341_0 = aie.buffer(%t341) {sym_name = "buf341_0" } : memref<7168xi32> + %l341_0 = aie.lock(%t341, 0) - %m341 = AIE.mem(%t341) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m341 = aie.mem(%t341) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l341_0, "Acquire", 0) - AIE.dma_bd(%buf341_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l341_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l341_0, "Acquire", 0) + aie.dma_bd(%buf341_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l341_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_340 = AIE.external_buffer {sym_name = "buffer_out_340" } : memref<7168xi32> - %dma340 = AIE.shim_dma(%t340) { - %lock1 = AIE.lock(%t340, 1) + %buffer_out_340 = aie.external_buffer {sym_name = "buffer_out_340" } : memref<7168xi32> + %dma340 = aie.shim_dma(%t340) { + %lock1 = aie.lock(%t340, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_340 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_340 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t350 = AIE.tile(35, 0) - %t351 = AIE.tile(35, 1) + %t350 = aie.tile(35, 0) + %t351 = aie.tile(35, 1) - %sw35 = AIE.switchbox(%t350) { - AIE.connect<"South" : 3, "North" : 3> + %sw35 = aie.switchbox(%t350) { + aie.connect<"South" : 3, "North" : 3> } - %mux35 = AIE.shim_mux(%t350) { - AIE.connect<"DMA" : 0, "North": 3> + %mux35 = aie.shim_mux(%t350) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma35 = AIE.switchbox(%t351) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma35 = aie.switchbox(%t351) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf351_0 = AIE.buffer(%t351) {sym_name = "buf351_0" } : memref<7168xi32> - %l351_0 = AIE.lock(%t351, 0) + %buf351_0 = aie.buffer(%t351) {sym_name = "buf351_0" } : memref<7168xi32> + %l351_0 = aie.lock(%t351, 0) - %m351 = AIE.mem(%t351) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m351 = aie.mem(%t351) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l351_0, "Acquire", 0) - AIE.dma_bd(%buf351_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l351_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l351_0, "Acquire", 0) + aie.dma_bd(%buf351_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l351_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_350 = AIE.external_buffer {sym_name = "buffer_out_350" } : memref<7168xi32> - %dma350 = AIE.shim_dma(%t350) { - %lock1 = AIE.lock(%t350, 1) + %buffer_out_350 = aie.external_buffer {sym_name = "buffer_out_350" } : memref<7168xi32> + %dma350 = aie.shim_dma(%t350) { + %lock1 = aie.lock(%t350, 1) - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_350 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_350 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t420 = AIE.tile(42, 0) - %t421 = AIE.tile(42, 1) + %t420 = aie.tile(42, 0) + %t421 = aie.tile(42, 1) - %sw42 = AIE.switchbox(%t420) { - AIE.connect<"South" : 3, "North" : 3> + %sw42 = aie.switchbox(%t420) { + aie.connect<"South" : 3, "North" : 3> } - %buf421_0 = AIE.buffer(%t421) {sym_name = "buf421_0" } : memref<7168xi32> - %l421 = AIE.lock(%t421, 1) - %m421 = AIE.mem(%t421) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %buf421_0 = aie.buffer(%t421) {sym_name = "buf421_0" } : memref<7168xi32> + %l421 = aie.lock(%t421, 1) + %m421 = aie.mem(%t421) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l421, "Acquire", 0) - AIE.dma_bd(%buf421_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l421, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l421, "Acquire", 0) + aie.dma_bd(%buf421_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l421, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_420 = AIE.external_buffer {sym_name = "buffer_out_420" } : memref<7168xi32> - %lock1 = AIE.lock(%t420, 1) - %dma420 = AIE.shim_dma(%t420) { + %buffer_out_420 = aie.external_buffer {sym_name = "buffer_out_420" } : memref<7168xi32> + %lock1 = aie.lock(%t420, 1) + %dma420 = aie.shim_dma(%t420) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_out_420 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_out_420 : memref<7168xi32>, 0, 7168) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t430 = AIE.tile(43, 0) - %t431 = AIE.tile(43, 1) + %t430 = aie.tile(43, 0) + %t431 = aie.tile(43, 1) - %sw43 = AIE.switchbox(%t430) { - AIE.connect<"South" : 3, "North" : 3> + %sw43 = aie.switchbox(%t430) { + aie.connect<"South" : 3, "North" : 3> } - %mux43 = AIE.shim_mux(%t430) { - AIE.connect<"DMA" : 0, "North": 3> + %mux43 = aie.shim_mux(%t430) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma43 = AIE.switchbox(%t431) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma43 = aie.switchbox(%t431) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf431_0 = AIE.buffer(%t431) {sym_name = "buf431_0" } : memref<7168xi32> - %l431_0 = AIE.lock(%t431, 0) + %buf431_0 = aie.buffer(%t431) {sym_name = "buf431_0" } : memref<7168xi32> + %l431_0 = aie.lock(%t431, 0) - %m431 = AIE.mem(%t431) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m431 = aie.mem(%t431) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l431_0, "Acquire", 0) - AIE.dma_bd(%buf431_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l431_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l431_0, "Acquire", 0) + aie.dma_bd(%buf431_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l431_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_430 = AIE.external_buffer {sym_name = "buffer_out_430" } : memref<7168xi32> - %l430 = AIE.lock(%t430, 1) - %dma430 = AIE.shim_dma(%t430) { + %buffer_out_430 = aie.external_buffer {sym_name = "buffer_out_430" } : memref<7168xi32> + %l430 = aie.lock(%t430, 1) + %dma430 = aie.shim_dma(%t430) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l430, Acquire, 1) - AIE.dma_bd(%buffer_out_430 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%l430, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%l430, Acquire, 1) + aie.dma_bd(%buffer_out_430 : memref<7168xi32>, 0, 7168) + aie.use_lock(%l430, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t460 = AIE.tile(46, 0) - %t461 = AIE.tile(46, 1) + %t460 = aie.tile(46, 0) + %t461 = aie.tile(46, 1) - %sw46 = AIE.switchbox(%t460) { - AIE.connect<"South" : 3, "North" : 3> + %sw46 = aie.switchbox(%t460) { + aie.connect<"South" : 3, "North" : 3> } - %mux46 = AIE.shim_mux(%t460) { - AIE.connect<"DMA" : 0, "North": 3> + %mux46 = aie.shim_mux(%t460) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma46 = AIE.switchbox(%t461) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma46 = aie.switchbox(%t461) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf461_0 = AIE.buffer(%t461) {sym_name = "buf461_0" } : memref<7168xi32> - %l461_0 = AIE.lock(%t461, 0) + %buf461_0 = aie.buffer(%t461) {sym_name = "buf461_0" } : memref<7168xi32> + %l461_0 = aie.lock(%t461, 0) - %m461 = AIE.mem(%t461) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m461 = aie.mem(%t461) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l461_0, "Acquire", 0) - AIE.dma_bd(%buf461_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l461_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l461_0, "Acquire", 0) + aie.dma_bd(%buf461_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l461_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_460 = AIE.external_buffer {sym_name = "buffer_out_460" } : memref<7168xi32> - %l460 = AIE.lock(%t460, 1) - %dma460 = AIE.shim_dma(%t460) { + %buffer_out_460 = aie.external_buffer {sym_name = "buffer_out_460" } : memref<7168xi32> + %l460 = aie.lock(%t460, 1) + %dma460 = aie.shim_dma(%t460) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l460, Acquire, 1) - AIE.dma_bd(%buffer_out_460 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%l460, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%l460, Acquire, 1) + aie.dma_bd(%buffer_out_460 : memref<7168xi32>, 0, 7168) + aie.use_lock(%l460, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %t470 = AIE.tile(47, 0) - %t471 = AIE.tile(47, 1) + %t470 = aie.tile(47, 0) + %t471 = aie.tile(47, 1) - %sw47 = AIE.switchbox(%t470) { - AIE.connect<"South" : 3, "North" : 3> + %sw47 = aie.switchbox(%t470) { + aie.connect<"South" : 3, "North" : 3> } - %mux47 = AIE.shim_mux(%t470) { - AIE.connect<"DMA" : 0, "North": 3> + %mux47 = aie.shim_mux(%t470) { + aie.connect<"DMA" : 0, "North": 3> } - %swdma47 = AIE.switchbox(%t471) { - AIE.connect<"South" : 3, "DMA" : 0> + %swdma47 = aie.switchbox(%t471) { + aie.connect<"South" : 3, "DMA" : 0> } - %buf471_0 = AIE.buffer(%t471) {sym_name = "buf471_0" } : memref<7168xi32> - %l471_0 = AIE.lock(%t471, 0) + %buf471_0 = aie.buffer(%t471) {sym_name = "buf471_0" } : memref<7168xi32> + %l471_0 = aie.lock(%t471, 0) - %m471 = AIE.mem(%t471) { - %srcDma = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m471 = aie.mem(%t471) { + %srcDma = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l471_0, "Acquire", 0) - AIE.dma_bd(%buf471_0 : memref< 7168xi32>, 0, 7168) - AIE.use_lock(%l471_0, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l471_0, "Acquire", 0) + aie.dma_bd(%buf471_0 : memref< 7168xi32>, 0, 7168) + aie.use_lock(%l471_0, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %buffer_out_470 = AIE.external_buffer {sym_name = "buffer_out_470" } : memref<7168xi32> - %l470 = AIE.lock(%t470, 1) - %dma470 = AIE.shim_dma(%t470) { + %buffer_out_470 = aie.external_buffer {sym_name = "buffer_out_470" } : memref<7168xi32> + %l470 = aie.lock(%t470, 1) + %dma470 = aie.shim_dma(%t470) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l470, Acquire, 1) - AIE.dma_bd(%buffer_out_470 : memref<7168xi32>, 0, 7168) - AIE.use_lock(%l470, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%l470, Acquire, 1) + aie.dma_bd(%buffer_out_470 : memref<7168xi32>, 0, 7168) + aie.use_lock(%l470, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } } diff --git a/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir b/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir index 5ae1971973..7375379230 100755 --- a/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir +++ b/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir @@ -12,44 +12,44 @@ // RUN: %run_on_board ./test.elf module @test04_tile_tiledma { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a13" } : memref<512xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a13" } : memref<512xi32> - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "input_lock" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "input_lock" } - AIE.switchbox(%tile13) { AIE.connect<"DMA": 0, "North": 1> } - AIE.switchbox(%tile14) { AIE.connect<"South": 1, "DMA": 1> } + aie.switchbox(%tile13) { aie.connect<"DMA": 0, "North": 1> } + aie.switchbox(%tile14) { aie.connect<"South": 1, "DMA": 1> } - %mem13 = AIE.mem(%tile13) { - %dma0 = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %mem13 = aie.mem(%tile13) { + %dma0 = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock13_5, "Acquire", 1) - AIE.dma_bd(%buf13_0 : memref<512xi32>, 0, 512) - AIE.use_lock(%lock13_5, "Release", 0) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock13_5, "Acquire", 1) + aie.dma_bd(%buf13_0 : memref<512xi32>, 0, 512) + aie.use_lock(%lock13_5, "Release", 0) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } - %lock14_6 = AIE.lock(%tile14, 6) // interbuffer lock - %lock14_7 = AIE.lock(%tile14, 7) // interbuffer lock - %buf14_0 = AIE.buffer(%tile14) { sym_name = "a14" } : memref<512xi32> - %buf14_1 = AIE.buffer(%tile14) { sym_name = "b14" } : memref<256xi32> + %lock14_6 = aie.lock(%tile14, 6) // interbuffer lock + %lock14_7 = aie.lock(%tile14, 7) // interbuffer lock + %buf14_0 = aie.buffer(%tile14) { sym_name = "a14" } : memref<512xi32> + %buf14_1 = aie.buffer(%tile14) { sym_name = "b14" } : memref<256xi32> - %mem14 = AIE.mem(%tile14) { - %dma0 = AIE.dma_start(S2MM, 1, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + %dma0 = aie.dma_start(S2MM, 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_6, "Acquire", 0) - AIE.dma_bd(%buf14_0: memref<512xi32>, 0, 512) - AIE.use_lock(%lock14_6, "Release", 1) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock14_6, "Acquire", 0) + aie.dma_bd(%buf14_0: memref<512xi32>, 0, 512) + aie.use_lock(%lock14_6, "Release", 1) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } diff --git a/test/benchmarks/05_Core_Startup/aie.mlir b/test/benchmarks/05_Core_Startup/aie.mlir index ee052bdeba..8e57490b60 100755 --- a/test/benchmarks/05_Core_Startup/aie.mlir +++ b/test/benchmarks/05_Core_Startup/aie.mlir @@ -12,11 +12,11 @@ // RUN: %run_on_board ./test.elf module @benchmark05_core_startup { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %core13 = AIE.core(%tile13) { - AIE.end + %core13 = aie.core(%tile13) { + aie.end } } \ No newline at end of file diff --git a/test/benchmarks/06_Buffer_Store/aie.mlir b/test/benchmarks/06_Buffer_Store/aie.mlir index 92beaaeac3..14313588bd 100755 --- a/test/benchmarks/06_Buffer_Store/aie.mlir +++ b/test/benchmarks/06_Buffer_Store/aie.mlir @@ -12,14 +12,14 @@ // RUN: %run_on_board ./test.elf module @benchmark06_buffer_store { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %val1 = arith.constant 7 : i32 %idx1 = arith.constant 3 : index memref.store %val1, %buf13_0[%idx1] : memref<256xi32> - AIE.end + aie.end } } \ No newline at end of file diff --git a/test/benchmarks/07_Lock_Acquire/aie.mlir b/test/benchmarks/07_Lock_Acquire/aie.mlir index 32964b726e..fb6cb17616 100755 --- a/test/benchmarks/07_Lock_Acquire/aie.mlir +++ b/test/benchmarks/07_Lock_Acquire/aie.mlir @@ -12,12 +12,12 @@ // RUN: %run_on_board ./test.elf module @benchmark07_lock_acquire { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %l13_0 = AIE.lock(%tile13, 0) + %l13_0 = aie.lock(%tile13, 0) -AIE.core(%tile13) { - AIE.use_lock(%l13_0, "Acquire", 0) - AIE.end +aie.core(%tile13) { + aie.use_lock(%l13_0, "Acquire", 0) + aie.end } } \ No newline at end of file diff --git a/test/benchmarks/08_Lock_Release/aie.mlir b/test/benchmarks/08_Lock_Release/aie.mlir index d93c7413da..68f83760e8 100755 --- a/test/benchmarks/08_Lock_Release/aie.mlir +++ b/test/benchmarks/08_Lock_Release/aie.mlir @@ -12,12 +12,12 @@ // RUN: %run_on_board ./test.elf module @benchmark06_lock_release { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %l13_0 = AIE.lock(%tile13, 0) + %l13_0 = aie.lock(%tile13, 0) -AIE.core(%tile13) { - AIE.use_lock(%l13_0, "Release", 0) - AIE.end +aie.core(%tile13) { + aie.use_lock(%l13_0, "Release", 0) + aie.end } } \ No newline at end of file diff --git a/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir b/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir index 1d18cecca6..56f0c4ca34 100755 --- a/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir +++ b/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir @@ -13,11 +13,11 @@ module @benchmark09_shim_broadcast { - %t70 = AIE.tile(7, 0) - %t72 = AIE.tile(7, 2) - %t3 = AIE.tile(3,0) - %60 = AIE.tile(6,0) - AIE.lock(%t72, 1) { sym_name = "lock1" } - AIE.lock(%t72, 2) { sym_name = "lock2" } + %t70 = aie.tile(7, 0) + %t72 = aie.tile(7, 2) + %t3 = aie.tile(3,0) + %60 = aie.tile(6,0) + aie.lock(%t72, 1) { sym_name = "lock1" } + aie.lock(%t72, 2) { sym_name = "lock2" } } diff --git a/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir b/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir index bb28b58869..702d7d9b46 100755 --- a/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir +++ b/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir @@ -12,9 +12,9 @@ // RUN: %run_on_board ./test.elf module @benchmark10_tile_broadcast_horizontal { - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t83 = AIE.tile(8,3) + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t83 = aie.tile(8,3) } diff --git a/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir b/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir index 11126bb60d..40c5bceda6 100755 --- a/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir +++ b/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir @@ -12,10 +12,10 @@ // RUN: %run_on_board ./test.elf module @benchmark11_tile_broadcast_vertical { - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7,4) - %t75 = AIE.tile(7,5) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7,4) + %t75 = aie.tile(7,5) } diff --git a/test/benchmarks/12_Stream_Delay/aie.mlir b/test/benchmarks/12_Stream_Delay/aie.mlir index 1fff7549f1..9065afa98b 100755 --- a/test/benchmarks/12_Stream_Delay/aie.mlir +++ b/test/benchmarks/12_Stream_Delay/aie.mlir @@ -12,51 +12,51 @@ // RUN: %run_on_board ./test.elf module @test12_stream_delay { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) - %tile33 = AIE.tile(3, 3) + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) + %tile33 = aie.tile(3, 3) - %tile43 = AIE.tile(4, 3) + %tile43 = aie.tile(4, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a13" } : memref<512xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a13" } : memref<512xi32> - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "input_lock" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "input_lock" } - AIE.switchbox(%tile13) { AIE.connect<"DMA": 0, "East": 1> } - AIE.switchbox(%tile23) { AIE.connect<"West": 1, "East": 1> } - AIE.switchbox(%tile33) { AIE.connect<"West": 1, "East": 1> } - AIE.switchbox(%tile43) { AIE.connect<"West": 1, "DMA": 1> } + aie.switchbox(%tile13) { aie.connect<"DMA": 0, "East": 1> } + aie.switchbox(%tile23) { aie.connect<"West": 1, "East": 1> } + aie.switchbox(%tile33) { aie.connect<"West": 1, "East": 1> } + aie.switchbox(%tile43) { aie.connect<"West": 1, "DMA": 1> } - %mem13 = AIE.mem(%tile13) { - %dma0 = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %mem13 = aie.mem(%tile13) { + %dma0 = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock13_5, "Acquire", 1) - AIE.dma_bd(%buf13_0 : memref<512xi32>, 0, 512) - AIE.use_lock(%lock13_5, "Release", 0) - AIE.next_bd ^end + aie.use_lock(%lock13_5, "Acquire", 1) + aie.dma_bd(%buf13_0 : memref<512xi32>, 0, 512) + aie.use_lock(%lock13_5, "Release", 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %lock43_6 = AIE.lock(%tile43, 6) // interbuffer lock - %lock43_7 = AIE.lock(%tile43, 7) // interbuffer lock - %buf43_0 = AIE.buffer(%tile43) { sym_name = "a43" } : memref<512xi32> - %buf43_1 = AIE.buffer(%tile43) { sym_name = "b43" } : memref<256xi32> + %lock43_6 = aie.lock(%tile43, 6) // interbuffer lock + %lock43_7 = aie.lock(%tile43, 7) // interbuffer lock + %buf43_0 = aie.buffer(%tile43) { sym_name = "a43" } : memref<512xi32> + %buf43_1 = aie.buffer(%tile43) { sym_name = "b43" } : memref<256xi32> - %mem43 = AIE.mem(%tile43) { + %mem43 = aie.mem(%tile43) { - %dma0 = AIE.dma_start(S2MM, 1, ^bd0, ^end) + %dma0 = aie.dma_start(S2MM, 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock43_6, "Acquire", 0) - AIE.dma_bd(%buf43_0: memref<512xi32>, 0, 512) - AIE.use_lock(%lock43_6, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%lock43_6, "Acquire", 0) + aie.dma_bd(%buf43_0: memref<512xi32>, 0, 512) + aie.use_lock(%lock43_6, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } diff --git a/test/benchmarks/13_Program_Counter/aie.mlir b/test/benchmarks/13_Program_Counter/aie.mlir index 2df131f14c..a461eac676 100755 --- a/test/benchmarks/13_Program_Counter/aie.mlir +++ b/test/benchmarks/13_Program_Counter/aie.mlir @@ -12,18 +12,18 @@ // RUN: %run_on_board ./test.elf module @benchmark13_program_counter { - %t73 = AIE.tile(7, 3) + %t73 = aie.tile(7, 3) - %buf73_0 = AIE.buffer(%t73) { sym_name = "a" } : memref<256xi32> + %buf73_0 = aie.buffer(%t73) { sym_name = "a" } : memref<256xi32> - %core73 = AIE.core(%t73) { + %core73 = aie.core(%t73) { %val1 = arith.constant 7 : i32 %idx1 = arith.constant 3 : index %2 = arith.addi %val1, %val1 : i32 memref.store %2, %buf73_0[%idx1] : memref<256xi32> - AIE.end + aie.end } } \ No newline at end of file diff --git a/test/benchmarks/14_Timer/aie.mlir b/test/benchmarks/14_Timer/aie.mlir index dd95f108fd..e162899467 100755 --- a/test/benchmarks/14_Timer/aie.mlir +++ b/test/benchmarks/14_Timer/aie.mlir @@ -12,18 +12,18 @@ // RUN: %run_on_board ./test.elf module @benchmark14_timer { - %t73 = AIE.tile(7, 3) + %t73 = aie.tile(7, 3) - %buf73_0 = AIE.buffer(%t73) { sym_name = "a" } : memref<256xi32> + %buf73_0 = aie.buffer(%t73) { sym_name = "a" } : memref<256xi32> - %core73 = AIE.core(%t73) { + %core73 = aie.core(%t73) { %val1 = arith.constant 7 : i32 %idx1 = arith.constant 3 : index %2 = arith.addi %val1, %val1 : i32 memref.store %2, %buf73_0[%idx1] : memref<256xi32> - AIE.end + aie.end } } \ No newline at end of file diff --git a/test/canonicalize-device/canonicalize-device.mlir b/test/canonicalize-device/canonicalize-device.mlir index 7ad225b987..61a7460b0b 100644 --- a/test/canonicalize-device/canonicalize-device.mlir +++ b/test/canonicalize-device/canonicalize-device.mlir @@ -10,26 +10,26 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-canonicalize-device %s | FileCheck %s -// CHECK: AIE.device(xcvc1902) { -// CHECK: %[[T0:.*]] = AIE.tile(0, 1) -// CHECK: %[[T1:.*]] = AIE.tile(1, 2) -// CHECK: %[[T2:.*]] = AIE.tile(0, 2) -// CHECK: AIE.flow(%[[T0]], DMA : 0, %[[T1]], Core : 1) -// CHECK: AIE.packet_flow(16) { -// CHECK: AIE.packet_source<%[[T0]], Core : 0> -// CHECK: AIE.packet_dest<%[[T1]], Core : 0> -// CHECK: AIE.packet_dest<%[[T2]], DMA : 1> +// CHECK: aie.device(xcvc1902) { +// CHECK: %[[T0:.*]] = aie.tile(0, 1) +// CHECK: %[[T1:.*]] = aie.tile(1, 2) +// CHECK: %[[T2:.*]] = aie.tile(0, 2) +// CHECK: aie.flow(%[[T0]], DMA : 0, %[[T1]], Core : 1) +// CHECK: aie.packet_flow(16) { +// CHECK: aie.packet_source<%[[T0]], Core : 0> +// CHECK: aie.packet_dest<%[[T1]], Core : 0> +// CHECK: aie.packet_dest<%[[T2]], DMA : 1> // CHECK: } // CHECK: } module { - %01 = AIE.tile(0, 1) - %12 = AIE.tile(1, 2) - %02 = AIE.tile(0, 2) - AIE.flow(%01, DMA : 0, %12, Core : 1) - AIE.packet_flow(0x10) { - AIE.packet_source < %01, Core : 0> - AIE.packet_dest < %12, Core : 0> - AIE.packet_dest < %02, DMA : 1> + %01 = aie.tile(0, 1) + %12 = aie.tile(1, 2) + %02 = aie.tile(0, 2) + aie.flow(%01, DMA : 0, %12, Core : 1) + aie.packet_flow(0x10) { + aie.packet_source < %01, Core : 0> + aie.packet_dest < %12, Core : 0> + aie.packet_dest < %02, DMA : 1> } } diff --git a/test/convolution.mlir b/test/convolution.mlir index 0fbdb33ff2..1c8ac12f89 100644 --- a/test/convolution.mlir +++ b/test/convolution.mlir @@ -19,46 +19,46 @@ // rule(10000|getRow(), %1); // } module { - %01 = AIE.tile(0, 1) - %02 = AIE.tile(0, 2) - %03 = AIE.tile(0, 3) - %04 = AIE.tile(0, 4) - %11 = AIE.tile(1, 1) - %12 = AIE.tile(1, 2) - %13 = AIE.tile(1, 3) - %14 = AIE.tile(1, 4) - %21 = AIE.tile(2, 1) - %22 = AIE.tile(2, 2) - %23 = AIE.tile(2, 3) - %24 = AIE.tile(2, 4) - %31 = AIE.tile(3, 1) - %32 = AIE.tile(3, 2) - %33 = AIE.tile(3, 3) - %34 = AIE.tile(3, 4) - %p0 = AIE.plio(0) - %p1 = AIE.plio(1) - %p2 = AIE.plio(2) - %p3 = AIE.plio(3) + %01 = aie.tile(0, 1) + %02 = aie.tile(0, 2) + %03 = aie.tile(0, 3) + %04 = aie.tile(0, 4) + %11 = aie.tile(1, 1) + %12 = aie.tile(1, 2) + %13 = aie.tile(1, 3) + %14 = aie.tile(1, 4) + %21 = aie.tile(2, 1) + %22 = aie.tile(2, 2) + %23 = aie.tile(2, 3) + %24 = aie.tile(2, 4) + %31 = aie.tile(3, 1) + %32 = aie.tile(3, 2) + %33 = aie.tile(3, 3) + %34 = aie.tile(3, 4) + %p0 = aie.plio(0) + %p1 = aie.plio(1) + %p2 = aie.plio(2) + %p3 = aie.plio(3) // North flowing input activations - AIE.flow(%p0, North : 0, %01, Core : 1) - AIE.flow(%p0, North : 0, %11, Core : 1) - AIE.flow(%p0, North : 0, %21, Core : 1) - AIE.flow(%p0, North : 0, %31, Core : 1) - AIE.flow(%p1, North : 0, %02, Core : 1) - AIE.flow(%p1, North : 0, %12, Core : 1) - AIE.flow(%p1, North : 0, %22, Core : 1) - AIE.flow(%p1, North : 0, %32, Core : 1) - AIE.flow(%p2, North : 0, %03, Core : 1) - AIE.flow(%p2, North : 0, %13, Core : 1) - AIE.flow(%p2, North : 0, %23, Core : 1) - AIE.flow(%p2, North : 0, %33, Core : 1) - AIE.flow(%p3, North : 0, %04, Core : 1) - AIE.flow(%p3, North : 0, %14, Core : 1) - AIE.flow(%p3, North : 0, %24, Core : 1) - AIE.flow(%p3, North : 0, %34, Core : 1) + aie.flow(%p0, North : 0, %01, Core : 1) + aie.flow(%p0, North : 0, %11, Core : 1) + aie.flow(%p0, North : 0, %21, Core : 1) + aie.flow(%p0, North : 0, %31, Core : 1) + aie.flow(%p1, North : 0, %02, Core : 1) + aie.flow(%p1, North : 0, %12, Core : 1) + aie.flow(%p1, North : 0, %22, Core : 1) + aie.flow(%p1, North : 0, %32, Core : 1) + aie.flow(%p2, North : 0, %03, Core : 1) + aie.flow(%p2, North : 0, %13, Core : 1) + aie.flow(%p2, North : 0, %23, Core : 1) + aie.flow(%p2, North : 0, %33, Core : 1) + aie.flow(%p3, North : 0, %04, Core : 1) + aie.flow(%p3, North : 0, %14, Core : 1) + aie.flow(%p3, North : 0, %24, Core : 1) + aie.flow(%p3, North : 0, %34, Core : 1) // South-west flowing results - AIE.flow(%34, Core : 0, %p3, South : 0) - AIE.flow(%33, Core : 0, %p2, South : 0) - AIE.flow(%32, Core : 0, %p1, South : 0) - AIE.flow(%31, Core : 0, %p0, South : 0) + aie.flow(%34, Core : 0, %p3, South : 0) + aie.flow(%33, Core : 0, %p2, South : 0) + aie.flow(%32, Core : 0, %p1, South : 0) + aie.flow(%31, Core : 0, %p0, South : 0) } diff --git a/test/convolution2.mlir b/test/convolution2.mlir index 837847eda4..5b13283168 100644 --- a/test/convolution2.mlir +++ b/test/convolution2.mlir @@ -20,60 +20,60 @@ // } // for(i: 1:8) // for(j: 1:50) { -// out[i][j] = AIE.tile() +// out[i][j] = aie.tile() // } // flow(out[i][4], out[i][6]) // } module { - %21 = AIE.tile(2, 1) - %22 = AIE.tile(2, 2) - %23 = AIE.tile(2, 3) - %24 = AIE.tile(2, 4) - %25 = AIE.tile(2, 5) - %26 = AIE.tile(2, 6) - %31 = AIE.tile(3, 1) - %32 = AIE.tile(3, 2) - %33 = AIE.tile(3, 3) - %34 = AIE.tile(3, 4) - %35 = AIE.tile(3, 5) - %36 = AIE.tile(3, 6) - %41 = AIE.tile(4, 1) - %42 = AIE.tile(4, 2) - %43 = AIE.tile(4, 3) - %44 = AIE.tile(4, 4) - %45 = AIE.tile(4, 5) - %46 = AIE.tile(4, 6) - %51 = AIE.tile(5, 1) - %52 = AIE.tile(5, 2) - %53 = AIE.tile(5, 3) - %54 = AIE.tile(5, 4) - %55 = AIE.tile(5, 5) - %56 = AIE.tile(5, 6) - %p0 = AIE.plio(0) - %p1 = AIE.plio(1) - %p2 = AIE.plio(2) - %p3 = AIE.plio(3) + %21 = aie.tile(2, 1) + %22 = aie.tile(2, 2) + %23 = aie.tile(2, 3) + %24 = aie.tile(2, 4) + %25 = aie.tile(2, 5) + %26 = aie.tile(2, 6) + %31 = aie.tile(3, 1) + %32 = aie.tile(3, 2) + %33 = aie.tile(3, 3) + %34 = aie.tile(3, 4) + %35 = aie.tile(3, 5) + %36 = aie.tile(3, 6) + %41 = aie.tile(4, 1) + %42 = aie.tile(4, 2) + %43 = aie.tile(4, 3) + %44 = aie.tile(4, 4) + %45 = aie.tile(4, 5) + %46 = aie.tile(4, 6) + %51 = aie.tile(5, 1) + %52 = aie.tile(5, 2) + %53 = aie.tile(5, 3) + %54 = aie.tile(5, 4) + %55 = aie.tile(5, 5) + %56 = aie.tile(5, 6) + %p0 = aie.plio(0) + %p1 = aie.plio(1) + %p2 = aie.plio(2) + %p3 = aie.plio(3) - AIE.flow(%21, DMA : 0, %23, DMA : 1) - AIE.flow(%22, DMA : 0, %23, DMA : 0) - AIE.flow(%22, DMA : 0, %24, DMA : 0) - AIE.flow(%22, DMA : 0, %25, DMA : 0) - AIE.flow(%22, DMA : 0, %26, DMA : 0) - AIE.flow(%31, DMA : 0, %24, DMA : 1) - AIE.flow(%32, DMA : 0, %33, DMA : 0) - AIE.flow(%32, DMA : 0, %34, DMA : 0) - AIE.flow(%32, DMA : 0, %35, DMA : 0) - AIE.flow(%32, DMA : 0, %36, DMA : 0) - AIE.flow(%41, DMA : 0, %25, DMA : 1) - AIE.flow(%42, DMA : 0, %43, DMA : 0) - AIE.flow(%42, DMA : 0, %44, DMA : 0) - AIE.flow(%42, DMA : 0, %45, DMA : 0) - AIE.flow(%42, DMA : 0, %46, DMA : 0) - AIE.flow(%51, DMA : 0, %26, DMA : 1) - AIE.flow(%52, DMA : 0, %53, DMA : 0) - AIE.flow(%52, DMA : 0, %54, DMA : 0) - AIE.flow(%52, DMA : 0, %55, DMA : 0) - AIE.flow(%52, DMA : 0, %56, DMA : 0) + aie.flow(%21, DMA : 0, %23, DMA : 1) + aie.flow(%22, DMA : 0, %23, DMA : 0) + aie.flow(%22, DMA : 0, %24, DMA : 0) + aie.flow(%22, DMA : 0, %25, DMA : 0) + aie.flow(%22, DMA : 0, %26, DMA : 0) + aie.flow(%31, DMA : 0, %24, DMA : 1) + aie.flow(%32, DMA : 0, %33, DMA : 0) + aie.flow(%32, DMA : 0, %34, DMA : 0) + aie.flow(%32, DMA : 0, %35, DMA : 0) + aie.flow(%32, DMA : 0, %36, DMA : 0) + aie.flow(%41, DMA : 0, %25, DMA : 1) + aie.flow(%42, DMA : 0, %43, DMA : 0) + aie.flow(%42, DMA : 0, %44, DMA : 0) + aie.flow(%42, DMA : 0, %45, DMA : 0) + aie.flow(%42, DMA : 0, %46, DMA : 0) + aie.flow(%51, DMA : 0, %26, DMA : 1) + aie.flow(%52, DMA : 0, %53, DMA : 0) + aie.flow(%52, DMA : 0, %54, DMA : 0) + aie.flow(%52, DMA : 0, %55, DMA : 0) + aie.flow(%52, DMA : 0, %56, DMA : 0) } diff --git a/test/create-broadcast-packet/test_broad_packet.mlir b/test/create-broadcast-packet/test_broad_packet.mlir index 44428261e9..8c27c24f2b 100644 --- a/test/create-broadcast-packet/test_broad_packet.mlir +++ b/test/create-broadcast-packet/test_broad_packet.mlir @@ -1,19 +1,19 @@ // RUN: aie-opt --aie-lower-broadcast-packet %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(6, 4) -// CHECK: %[[VAL_2:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_3:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(7, 4) -// CHECK: AIE.packet_flow(1) { -// CHECK: AIE.packet_source<%[[VAL_2]], DMA : 0> -// CHECK: AIE.packet_dest<%[[VAL_4]], DMA : 0> -// CHECK: AIE.packet_dest<%[[VAL_1]], DMA : 0> +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(6, 4) +// CHECK: %[[VAL_2:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_3:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(7, 4) +// CHECK: aie.packet_flow(1) { +// CHECK: aie.packet_source<%[[VAL_2]], DMA : 0> +// CHECK: aie.packet_dest<%[[VAL_4]], DMA : 0> +// CHECK: aie.packet_dest<%[[VAL_1]], DMA : 0> // CHECK: } -// CHECK: AIE.packet_flow(0) { -// CHECK: AIE.packet_source<%[[VAL_2]], DMA : 0> -// CHECK: AIE.packet_dest<%[[VAL_3]], DMA : 0> -// CHECK: AIE.packet_dest<%[[VAL_0]], DMA : 0> +// CHECK: aie.packet_flow(0) { +// CHECK: aie.packet_source<%[[VAL_2]], DMA : 0> +// CHECK: aie.packet_dest<%[[VAL_3]], DMA : 0> +// CHECK: aie.packet_dest<%[[VAL_0]], DMA : 0> // CHECK: } // CHECK: } @@ -23,20 +23,20 @@ //(6, 4) and (7, 4) are in stream with ID 1. That means that pair (6, 3), (7, 3) //and pair (6, 4) and (7, 4) will time-multiplexed use tile DMA 0 of (7,2). module @test_broadcast_packet { - AIE.device(xcvc1902) { - %t63 = AIE.tile(6, 3) - %t64 = AIE.tile(6, 4) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - AIEX.broadcast_packet(%t72, "DMA" : 0){ - AIEX.bp_id(0x0){ - AIEX.bp_dest<%t73, "DMA" : 0> - AIEX.bp_dest<%t63, "DMA" : 0> + aie.device(xcvc1902) { + %t63 = aie.tile(6, 3) + %t64 = aie.tile(6, 4) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + aiex.broadcast_packet(%t72, "DMA" : 0){ + aiex.bp_id(0x0){ + aiex.bp_dest<%t73, "DMA" : 0> + aiex.bp_dest<%t63, "DMA" : 0> } - AIEX.bp_id(0x1){ - AIEX.bp_dest<%t74, "DMA" : 0> - AIEX.bp_dest<%t64, "DMA" : 0> + aiex.bp_id(0x1){ + aiex.bp_dest<%t74, "DMA" : 0> + aiex.bp_dest<%t64, "DMA" : 0> } } } diff --git a/test/create-cores/duplicate_dma.mlir b/test/create-cores/duplicate_dma.mlir index 1a16942b17..f68073c79d 100644 --- a/test/create-cores/duplicate_dma.mlir +++ b/test/create-cores/duplicate_dma.mlir @@ -9,28 +9,28 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --aie-create-cores --aie-lower-memcpy %s 2>&1 | FileCheck %s -// CHECK: error: 'AIE.dma_start' op duplicate DMA channel MM2S0 not allowed +// CHECK: error: 'aie.dma_start' op duplicate DMA channel MM2S0 not allowed module @duplicate_dma { - AIE.device(xcvc1902) { - %0 = AIE.tile(1, 1) - %1 = AIE.buffer(%0) : memref<256xi32> - %2 = AIE.mem(%0) { - %15 = AIE.dma_start(MM2S, 0, ^bb1, ^bb4) + aie.device(xcvc1902) { + %0 = aie.tile(1, 1) + %1 = aie.buffer(%0) : memref<256xi32> + %2 = aie.mem(%0) { + %15 = aie.dma_start(MM2S, 0, ^bb1, ^bb4) ^bb1: // pred: ^bb0 - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%1 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^bb2 + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%1 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^bb2 ^bb2: - %16 = AIE.dma_start(MM2S, 0, ^bb3, ^bb4) + %16 = aie.dma_start(MM2S, 0, ^bb3, ^bb4) ^bb3: - AIEX.useToken @token1(Acquire, 1) - AIE.dma_bd(%1 : memref<256xi32>, 0, 256) - AIEX.useToken @token1(Release, 2) - AIE.next_bd ^bb4 + aiex.useToken @token1(Acquire, 1) + aie.dma_bd(%1 : memref<256xi32>, 0, 256) + aiex.useToken @token1(Release, 2) + aie.next_bd ^bb4 ^bb4: // 4 preds: ^bb0, ^bb1, ^bb2, ^bb3 - AIE.end + aie.end } } } \ No newline at end of file diff --git a/test/create-cores/hello_world.mlir b/test/create-cores/hello_world.mlir index 48644558be..39083a89f4 100644 --- a/test/create-cores/hello_world.mlir +++ b/test/create-cores/hello_world.mlir @@ -11,82 +11,82 @@ // RUN: aie-opt --aie-create-cores --aie-lower-memcpy %s | FileCheck %s // CHECK-LABEL: module @hello_world { -// CHECK: %[[VAL_0:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<512xi32> -// CHECK: %[[VAL_2:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_3:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_0:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<512xi32> +// CHECK: %[[VAL_2:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_3:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_1]] : memref<512xi32>, 0, 512) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_1]] : memref<512xi32>, 0, 512) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_4]]) : memref<512xi32> -// CHECK: %[[VAL_6:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_7:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_4:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_4]]) : memref<512xi32> +// CHECK: %[[VAL_6:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_7:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<512xi32>, 0, 512) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<512xi32>, 0, 512) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: %[[VAL_8:.*]] = memref.alloc() : memref<512xi32> // CHECK: %[[VAL_9:.*]] = memref.alloc() : memref<512xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: %[[VAL_10:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIEX.useToken @token0(Acquire, 0) +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: %[[VAL_10:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aiex.useToken @token0(Acquire, 0) // CHECK: %[[VAL_11:.*]] = arith.constant 16 : index // CHECK: %[[VAL_12:.*]] = arith.constant 1 : i32 // CHECK: memref.store %[[VAL_12]], %[[VAL_1]]{{\[}}%[[VAL_11]]] : memref<512xi32> -// CHECK: AIEX.useToken @token0(Release, 1) -// CHECK: AIE.end +// CHECK: aiex.useToken @token0(Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_13:.*]] = AIE.core(%[[VAL_4]]) { -// CHECK: AIEX.useToken @token0(Acquire, 2) +// CHECK: %[[VAL_13:.*]] = aie.core(%[[VAL_4]]) { +// CHECK: aiex.useToken @token0(Acquire, 2) // CHECK: %[[VAL_14:.*]] = arith.constant 16 : index // CHECK: %[[VAL_15:.*]] = memref.load %[[VAL_5]]{{\[}}%[[VAL_14]]] : memref<512xi32> -// CHECK: AIEX.useToken @token0(Release, 3) -// CHECK: AIE.end +// CHECK: aiex.useToken @token0(Release, 3) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) // CHECK: } module @hello_world { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { - %tile33 = AIE.tile(3, 3) - %tile44 = AIE.tile(4, 4) + %tile33 = aie.tile(3, 3) + %tile44 = aie.tile(4, 4) %buf0 = memref.alloc() : memref<512xi32> %buf1 = memref.alloc() : memref<512xi32> - AIEX.token(0) { sym_name="token0" } + aiex.token(0) { sym_name="token0" } func.func @producer(%arg0: memref<512xi32>) -> () { - AIEX.useToken @token0(Acquire, 0) + aiex.useToken @token0(Acquire, 0) %i = arith.constant 16 : index %val = arith.constant 1 : i32 memref.store %val, %arg0[%i] : memref<512xi32> - AIEX.useToken @token0(Release, 1) + aiex.useToken @token0(Release, 1) return } func.func @consumer(%arg0: memref<512xi32>) -> () { - AIEX.useToken @token0(Acquire, 2) + aiex.useToken @token0(Acquire, 2) %i = arith.constant 16 : index %val = memref.load %arg0[%i] : memref<512xi32> - AIEX.useToken @token0(Release, 3) + aiex.useToken @token0(Release, 3) return } func.call @producer(%buf0) { aie.x = 3, aie.y = 3 } : (memref<512xi32>) -> () // write 1 to buf[16] func.call @consumer(%buf1) { aie.x = 4, aie.y = 4 } : (memref<512xi32>) -> () // read buf[16] - AIEX.memcpy @token0(1, 2) (%tile33 : <%buf0, 0, 512>, %tile44 : <%buf1, 0, 512>) : (memref<512xi32>, memref<512xi32>) + aiex.memcpy @token0(1, 2) (%tile33 : <%buf0, 0, 512>, %tile44 : <%buf1, 0, 512>) : (memref<512xi32>, memref<512xi32>) } } diff --git a/test/create-cores/test_core0.mlir b/test/create-cores/test_core0.mlir index 5f820f9f50..fbeb3d7a0f 100644 --- a/test/create-cores/test_core0.mlir +++ b/test/create-cores/test_core0.mlir @@ -11,17 +11,17 @@ // RUN: aie-opt --aie-create-cores %s | FileCheck %s // CHECK-LABEL: module @test_core0 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_2:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: AIE.end +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_2:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: aie.end // CHECK: } // CHECK: %[[VAL_3:.*]] = memref.alloc() : memref<256xi32> // CHECK: func.func @host_task() { // CHECK: return // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.end +// CHECK: %[[VAL_4:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.end // CHECK: } // CHECK: func.call @host_task() : () -> () // CHECK: } @@ -35,7 +35,7 @@ // - clone function body into core's region; map the function arguments to the // corresponding newly created buffer ops module @test_core0 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { %buf = memref.alloc() : memref<256xi32> func.func @aie_task(%arg0: memref<256xi32>) -> () { diff --git a/test/create-cores/test_core1.mlir b/test/create-cores/test_core1.mlir index 85c5563ed2..9757f93d30 100644 --- a/test/create-cores/test_core1.mlir +++ b/test/create-cores/test_core1.mlir @@ -11,23 +11,23 @@ // RUN: aie-opt --aie-create-cores %s | FileCheck %s // CHECK-LABEL: module @test_core1 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) : memref<1xi32> -// CHECK: %[[VAL_3:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: AIE.end +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) : memref<1xi32> +// CHECK: %[[VAL_3:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: aie.end // CHECK: } // CHECK: %[[VAL_4:.*]] = memref.alloc() : memref<256xi32> // CHECK: func.func @host_task() { // CHECK: return // CHECK: } // CHECK: %[[VAL_5:.*]] = arith.constant 0 : i32 -// CHECK: %[[VAL_6:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_6:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_7:.*]] = arith.constant 0 : index // CHECK: %[[VAL_8:.*]] = memref.load %[[VAL_2]]{{\[}}%[[VAL_7]]] : memref<1xi32> // CHECK: %[[VAL_9:.*]] = arith.constant 10 : index // CHECK: memref.store %[[VAL_8]], %[[VAL_1]]{{\[}}%[[VAL_9]]] : memref<256xi32> -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: func.call @host_task() : () -> () // CHECK: } @@ -38,7 +38,7 @@ // We promote the scalar argument to memref kind (single-element) // For now, we only support scalar type of int type or float type module @test_core1 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { %buf = memref.alloc() : memref<256xi32> func.func @aie_task(%arg0: memref<256xi32>, %arg1: i32) -> () { diff --git a/test/create-cores/test_dma0.mlir b/test/create-cores/test_dma0.mlir index eb83faa3eb..cd8040badc 100644 --- a/test/create-cores/test_dma0.mlir +++ b/test/create-cores/test_dma0.mlir @@ -11,43 +11,43 @@ // RUN: aie-opt --aie-create-cores --aie-lower-memcpy %s | FileCheck %s // CHECK-LABEL: module @test_dma0 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_2:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_3:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_2:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_3:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_4]]) : memref<256xi32> -// CHECK: %[[VAL_6:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_7:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_4:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_4]]) : memref<256xi32> +// CHECK: %[[VAL_6:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_7:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: %[[VAL_8:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_9:.*]] = memref.alloc() : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: %[[VAL_10:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIEX.useToken @token0(Acquire, 0) -// CHECK: AIEX.useToken @token0(Release, 1) -// CHECK: AIE.end +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: %[[VAL_10:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aiex.useToken @token0(Acquire, 0) +// CHECK: aiex.useToken @token0(Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) -// CHECK: %[[VAL_11:.*]] = AIE.core(%[[VAL_4]]) { -// CHECK: AIEX.useToken @token0(Acquire, 2) -// CHECK: AIEX.useToken @token0(Release, 3) -// CHECK: AIE.end +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) +// CHECK: %[[VAL_11:.*]] = aie.core(%[[VAL_4]]) { +// CHECK: aiex.useToken @token0(Acquire, 2) +// CHECK: aiex.useToken @token0(Release, 3) +// CHECK: aie.end // CHECK: } // CHECK: } @@ -67,32 +67,32 @@ // Using Blocks also allows us to inject lock/token Ops more naturally (instead of having to create // a new op with locking mechanism -- which is clunky and makes it harder to do locking analysis ...) module @test_dma0 { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) - %t22 = AIE.tile(2, 2) + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) + %t22 = aie.tile(2, 2) %buf0 = memref.alloc() : memref<256xi32> %buf1 = memref.alloc() : memref<256xi32> - AIEX.token(0) { sym_name="token0" } + aiex.token(0) { sym_name="token0" } func.func @task0(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 0) + aiex.useToken @token0(Acquire, 0) // code - AIEX.useToken @token0(Release, 1) + aiex.useToken @token0(Release, 1) return } func.func @task1(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 2) + aiex.useToken @token0(Acquire, 2) // code - AIEX.useToken @token0(Release, 3) + aiex.useToken @token0(Release, 3) return } func.call @task0(%buf0) { aie.x = 1, aie.y = 1 } : (memref<256xi32>) -> () - AIEX.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t22 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t22 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) func.call @task1(%buf1) { aie.x = 2, aie.y = 2 } : (memref<256xi32>) -> () } } diff --git a/test/create-cores/test_dma1.mlir b/test/create-cores/test_dma1.mlir index 0c76266934..218866533e 100644 --- a/test/create-cores/test_dma1.mlir +++ b/test/create-cores/test_dma1.mlir @@ -14,72 +14,72 @@ // FIXCore : DMA ops have issues here: reuse of DMAs is bad, also should chain from one DMA op to the next. // CHECK-LABEL: module @test_dma1 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_2:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_3:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_2:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_3:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb2: -// CHECK: %[[VAL_4:.*]] = AIE.dma_start(MM2S, 0, ^bb3, ^bb4) +// CHECK: %[[VAL_4:.*]] = aie.dma_start(MM2S, 0, ^bb3, ^bb4) // CHECK: ^bb3: -// CHECK: AIEX.useToken @token1(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token1(Release, 2) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aiex.useToken @token1(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token1(Release, 2) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_5]]) : memref<256xi32> -// CHECK: %[[VAL_7:.*]] = AIE.mem(%[[VAL_5]]) { -// CHECK: %[[VAL_8:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_5:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_5]]) : memref<256xi32> +// CHECK: %[[VAL_7:.*]] = aie.mem(%[[VAL_5]]) { +// CHECK: %[[VAL_8:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_9:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_9]]) : memref<256xi32> -// CHECK: %[[VAL_11:.*]] = AIE.mem(%[[VAL_9]]) { -// CHECK: %[[VAL_12:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_9:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_9]]) : memref<256xi32> +// CHECK: %[[VAL_11:.*]] = aie.mem(%[[VAL_9]]) { +// CHECK: %[[VAL_12:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token1(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token1(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token1(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token1(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: %[[VAL_13:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_14:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_15:.*]] = memref.alloc() : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: AIEX.token(0) {sym_name = "token1"} -// CHECK: %[[VAL_16:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIEX.useToken @token0(Acquire, 0) -// CHECK: AIEX.useToken @token1(Acquire, 0) -// CHECK: AIEX.useToken @token0(Release, 1) -// CHECK: AIEX.useToken @token1(Release, 1) -// CHECK: AIE.end +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: aiex.token(0) {sym_name = "token1"} +// CHECK: %[[VAL_16:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aiex.useToken @token0(Acquire, 0) +// CHECK: aiex.useToken @token1(Acquire, 0) +// CHECK: aiex.useToken @token0(Release, 1) +// CHECK: aiex.useToken @token1(Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_5]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_9]], DMA : 0) -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_5]]) { -// CHECK: AIEX.useToken @token0(Acquire, 2) -// CHECK: AIEX.useToken @token0(Release, 3) -// CHECK: AIE.end +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_5]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_9]], DMA : 0) +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_5]]) { +// CHECK: aiex.useToken @token0(Acquire, 2) +// CHECK: aiex.useToken @token0(Release, 3) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_9]]) { -// CHECK: AIEX.useToken @token1(Acquire, 2) -// CHECK: AIEX.useToken @token1(Release, 3) -// CHECK: AIE.end +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_9]]) { +// CHECK: aiex.useToken @token1(Acquire, 2) +// CHECK: aiex.useToken @token1(Release, 3) +// CHECK: aie.end // CHECK: } // CHECK: } @@ -88,44 +88,44 @@ // Lowering AIE::memcpy to AIE::DMAStartOp and AIE::DMABDOp // single producer, multiple consumers module @test_dma1 { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) // producer - %t22 = AIE.tile(2, 2) // consumer - %t33 = AIE.tile(3, 3) // consumer + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) // producer + %t22 = aie.tile(2, 2) // consumer + %t33 = aie.tile(3, 3) // consumer %buf0 = memref.alloc() : memref<256xi32> %buf1 = memref.alloc() : memref<256xi32> %buf2 = memref.alloc() : memref<256xi32> - AIEX.token(0) { sym_name="token0" } - AIEX.token(0) { sym_name="token1" } + aiex.token(0) { sym_name="token0" } + aiex.token(0) { sym_name="token1" } func.func @task0(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token1(Acquire, 0) + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token1(Acquire, 0) // code - AIEX.useToken @token0(Release, 1) - AIEX.useToken @token1(Release, 1) + aiex.useToken @token0(Release, 1) + aiex.useToken @token1(Release, 1) return } func.func @task1(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 2) + aiex.useToken @token0(Acquire, 2) // code - AIEX.useToken @token0(Release, 3) + aiex.useToken @token0(Release, 3) return } func.func @task2(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token1(Acquire, 2) + aiex.useToken @token1(Acquire, 2) // code - AIEX.useToken @token1(Release, 3) + aiex.useToken @token1(Release, 3) return } func.call @task0(%buf0) { aie.x = 1, aie.y = 1 } : (memref<256xi32>) -> () - AIEX.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t22 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) - AIEX.memcpy @token1(1, 2) (%t11 : <%buf0, 0, 256>, %t33 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t22 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token1(1, 2) (%t11 : <%buf0, 0, 256>, %t33 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) func.call @task1(%buf1) { aie.x = 2, aie.y = 2 } : (memref<256xi32>) -> () func.call @task2(%buf2) { aie.x = 3, aie.y = 3 } : (memref<256xi32>) -> () } diff --git a/test/create-cores/test_dma2.mlir b/test/create-cores/test_dma2.mlir index 9e76aed40b..d47af5c57a 100644 --- a/test/create-cores/test_dma2.mlir +++ b/test/create-cores/test_dma2.mlir @@ -12,74 +12,74 @@ // RUN: aie-opt --aie-create-cores %s | FileCheck %s // CHECK-LABEL: module @test_dma2 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_2:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_3:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_2:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_3:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_4]]) : memref<256xi32> -// CHECK: %[[VAL_6:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_7:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_4:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_4]]) : memref<256xi32> +// CHECK: %[[VAL_6:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_7:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token1(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token1(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token1(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token1(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_8:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_8]]) : memref<256xi32> -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_8]]) : memref<256xi32> -// CHECK: %[[VAL_11:.*]] = AIE.mem(%[[VAL_8]]) { -// CHECK: %[[VAL_12:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_8:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_8]]) : memref<256xi32> +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_8]]) : memref<256xi32> +// CHECK: %[[VAL_11:.*]] = aie.mem(%[[VAL_8]]) { +// CHECK: %[[VAL_12:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb2: -// CHECK: %[[VAL_13:.*]] = AIE.dma_start(S2MM, 0, ^bb3, ^bb4) +// CHECK: %[[VAL_13:.*]] = aie.dma_start(S2MM, 0, ^bb3, ^bb4) // CHECK: ^bb3: -// CHECK: AIEX.useToken @token1(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token1(Release, 2) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aiex.useToken @token1(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token1(Release, 2) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: %[[VAL_14:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_15:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_16:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_17:.*]] = memref.alloc() : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: AIEX.token(0) {sym_name = "token1"} -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIEX.useToken @token0(Acquire, 0) -// CHECK: AIEX.useToken @token0(Release, 1) -// CHECK: AIE.end +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: aiex.token(0) {sym_name = "token1"} +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aiex.useToken @token0(Acquire, 0) +// CHECK: aiex.useToken @token0(Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.core(%[[VAL_4]]) { -// CHECK: AIEX.useToken @token1(Acquire, 0) -// CHECK: AIEX.useToken @token1(Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_19:.*]] = aie.core(%[[VAL_4]]) { +// CHECK: aiex.useToken @token1(Acquire, 0) +// CHECK: aiex.useToken @token1(Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_8]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_4]], DMA : 0, %[[VAL_8]], DMA : 1) -// CHECK: %[[VAL_20:.*]] = AIE.core(%[[VAL_8]]) { -// CHECK: AIEX.useToken @token0(Acquire, 2) -// CHECK: AIEX.useToken @token1(Acquire, 2) -// CHECK: AIEX.useToken @token0(Release, 3) -// CHECK: AIEX.useToken @token1(Release, 3) -// CHECK: AIE.end +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_8]], DMA : 0) +// CHECK: aie.flow(%[[VAL_4]], DMA : 0, %[[VAL_8]], DMA : 1) +// CHECK: %[[VAL_20:.*]] = aie.core(%[[VAL_8]]) { +// CHECK: aiex.useToken @token0(Acquire, 2) +// CHECK: aiex.useToken @token1(Acquire, 2) +// CHECK: aiex.useToken @token0(Release, 3) +// CHECK: aiex.useToken @token1(Release, 3) +// CHECK: aie.end // CHECK: } // CHECK: } @@ -89,46 +89,46 @@ // Lowering AIE::memcpy to AIE::DMAStartOp and AIE::DMABDOp // multiple producers, single consumer module @test_dma2 { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) // producer - %t22 = AIE.tile(2, 2) // producer - %t33 = AIE.tile(3, 3) // consumer + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) // producer + %t22 = aie.tile(2, 2) // producer + %t33 = aie.tile(3, 3) // consumer %buf0 = memref.alloc() : memref<256xi32> %buf1 = memref.alloc() : memref<256xi32> %buf2 = memref.alloc() : memref<256xi32> %buf3 = memref.alloc() : memref<256xi32> - AIEX.token(0) { sym_name="token0" } - AIEX.token(0) { sym_name="token1" } + aiex.token(0) { sym_name="token0" } + aiex.token(0) { sym_name="token1" } func.func @task0(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 0) + aiex.useToken @token0(Acquire, 0) // code - AIEX.useToken @token0(Release, 1) + aiex.useToken @token0(Release, 1) return } func.func @task1(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token1(Acquire, 0) + aiex.useToken @token1(Acquire, 0) // code - AIEX.useToken @token1(Release, 1) + aiex.useToken @token1(Release, 1) return } func.func @task2(%arg0: memref<256xi32>, %arg1: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token1(Acquire, 2) + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token1(Acquire, 2) // code - AIEX.useToken @token0(Release, 3) - AIEX.useToken @token1(Release, 3) + aiex.useToken @token0(Release, 3) + aiex.useToken @token1(Release, 3) return } func.call @task0(%buf0) { aie.x = 1, aie.y = 1 } : (memref<256xi32>) -> () func.call @task1(%buf1) { aie.x = 2, aie.y = 2 } : (memref<256xi32>) -> () - AIEX.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t33 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) - AIEX.memcpy @token1(1, 2) (%t22 : <%buf1, 0, 256>, %t33 : <%buf3, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t33 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token1(1, 2) (%t22 : <%buf1, 0, 256>, %t33 : <%buf3, 0, 256>) : (memref<256xi32>, memref<256xi32>) func.call @task2(%buf2, %buf3) { aie.x = 3, aie.y = 3 } : (memref<256xi32>, memref<256xi32>) -> () } } diff --git a/test/create-cores/test_dma3.mlir b/test/create-cores/test_dma3.mlir index 1d83a5903f..5cd4638a7b 100644 --- a/test/create-cores/test_dma3.mlir +++ b/test/create-cores/test_dma3.mlir @@ -12,69 +12,69 @@ // RUN: aie-opt --aie-create-cores %s | FileCheck %s // CHECK-LABEL: module @test_dma3 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_2:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_3:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_2:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_3:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_1]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_4]]) : memref<256xi32> -// CHECK: %[[VAL_6:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_7:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_4:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_4]]) : memref<256xi32> +// CHECK: %[[VAL_6:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_7:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 2) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aiex.useToken @token0(Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 2) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb2: -// CHECK: %[[VAL_8:.*]] = AIE.dma_start(MM2S, 0, ^bb3, ^bb4) +// CHECK: %[[VAL_8:.*]] = aie.dma_start(MM2S, 0, ^bb3, ^bb4) // CHECK: ^bb3: -// CHECK: AIEX.useToken @token0(Acquire, 3) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 4) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aiex.useToken @token0(Acquire, 3) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 4) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_9:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_9]]) : memref<256xi32> -// CHECK: %[[VAL_11:.*]] = AIE.mem(%[[VAL_9]]) { -// CHECK: %[[VAL_12:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_9:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_9]]) : memref<256xi32> +// CHECK: %[[VAL_11:.*]] = aie.mem(%[[VAL_9]]) { +// CHECK: %[[VAL_12:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIEX.useToken @token0(Acquire, 3) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) -// CHECK: AIEX.useToken @token0(Release, 4) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aiex.useToken @token0(Acquire, 3) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) +// CHECK: aiex.useToken @token0(Release, 4) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: %[[VAL_13:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_14:.*]] = memref.alloc() : memref<256xi32> // CHECK: %[[VAL_15:.*]] = memref.alloc() : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: %[[VAL_16:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIEX.useToken @token0(Acquire, 0) -// CHECK: AIEX.useToken @token0(Release, 1) -// CHECK: AIE.end +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: %[[VAL_16:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aiex.useToken @token0(Acquire, 0) +// CHECK: aiex.useToken @token0(Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_4]]) { -// CHECK: AIEX.useToken @token0(Acquire, 2) -// CHECK: AIEX.useToken @token0(Release, 3) -// CHECK: AIE.end +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_4]]) { +// CHECK: aiex.useToken @token0(Acquire, 2) +// CHECK: aiex.useToken @token0(Release, 3) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_4]], DMA : 0, %[[VAL_9]], DMA : 0) -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_9]]) { -// CHECK: AIEX.useToken @token0(Acquire, 4) -// CHECK: AIEX.useToken @token0(Release, 5) -// CHECK: AIE.end +// CHECK: aie.flow(%[[VAL_4]], DMA : 0, %[[VAL_9]], DMA : 0) +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_9]]) { +// CHECK: aiex.useToken @token0(Acquire, 4) +// CHECK: aiex.useToken @token0(Release, 5) +// CHECK: aie.end // CHECK: } // CHECK: } @@ -83,42 +83,42 @@ // Lowering AIE::memcpy to AIE::DMAStartOp and AIE::DMABDOp // producer --> consumer/producer --> consumer module @test_dma3 { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) // producer - %t22 = AIE.tile(2, 2) // consumer/producer - %t33 = AIE.tile(3, 3) // consumer + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) // producer + %t22 = aie.tile(2, 2) // consumer/producer + %t33 = aie.tile(3, 3) // consumer %buf0 = memref.alloc() : memref<256xi32> %buf1 = memref.alloc() : memref<256xi32> %buf2 = memref.alloc() : memref<256xi32> - AIEX.token(0) { sym_name="token0" } + aiex.token(0) { sym_name="token0" } func.func @task0(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 0) + aiex.useToken @token0(Acquire, 0) // code - AIEX.useToken @token0(Release, 1) + aiex.useToken @token0(Release, 1) return } func.func @task1(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 2) + aiex.useToken @token0(Acquire, 2) // code - AIEX.useToken @token0(Release, 3) + aiex.useToken @token0(Release, 3) return } func.func @task2(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 4) + aiex.useToken @token0(Acquire, 4) // code - AIEX.useToken @token0(Release, 5) + aiex.useToken @token0(Release, 5) return } func.call @task0(%buf0) { aie.x = 1, aie.y = 1 } : (memref<256xi32>) -> () - AIEX.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t22 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token0(1, 2) (%t11 : <%buf0, 0, 256>, %t22 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) func.call @task1(%buf1) { aie.x = 2, aie.y = 2 } : (memref<256xi32>) -> () - AIEX.memcpy @token0(3, 4) (%t22 : <%buf1, 0, 256>, %t33 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token0(3, 4) (%t22 : <%buf1, 0, 256>, %t33 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) func.call @task2(%buf2) { aie.x = 3, aie.y = 3 } : (memref<256xi32>) -> () } } diff --git a/test/create-flows/broadcast.mlir b/test/create-flows/broadcast.mlir index 90795f232d..bcad48440b 100644 --- a/test/create-flows/broadcast.mlir +++ b/test/create-flows/broadcast.mlir @@ -9,64 +9,64 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T03:.*]] = AIE.tile(0, 3) -// CHECK: %[[T02:.*]] = AIE.tile(0, 2) -// CHECK: %[[T00:.*]] = AIE.tile(0, 0) -// CHECK: %[[T13:.*]] = AIE.tile(1, 3) -// CHECK: %[[T11:.*]] = AIE.tile(1, 1) -// CHECK: %[[T10:.*]] = AIE.tile(1, 0) -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: %[[T31:.*]] = AIE.tile(3, 1) -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T71:.*]] = AIE.tile(7, 1) -// CHECK: %[[T72:.*]] = AIE.tile(7, 2) -// CHECK: %[[T73:.*]] = AIE.tile(7, 3) -// CHECK: %[[T80:.*]] = AIE.tile(8, 0) -// CHECK: %[[T82:.*]] = AIE.tile(8, 2) -// CHECK: %[[T83:.*]] = AIE.tile(8, 3) +// CHECK: %[[T03:.*]] = aie.tile(0, 3) +// CHECK: %[[T02:.*]] = aie.tile(0, 2) +// CHECK: %[[T00:.*]] = aie.tile(0, 0) +// CHECK: %[[T13:.*]] = aie.tile(1, 3) +// CHECK: %[[T11:.*]] = aie.tile(1, 1) +// CHECK: %[[T10:.*]] = aie.tile(1, 0) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: %[[T31:.*]] = aie.tile(3, 1) +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T71:.*]] = aie.tile(7, 1) +// CHECK: %[[T72:.*]] = aie.tile(7, 2) +// CHECK: %[[T73:.*]] = aie.tile(7, 3) +// CHECK: %[[T80:.*]] = aie.tile(8, 0) +// CHECK: %[[T82:.*]] = aie.tile(8, 2) +// CHECK: %[[T83:.*]] = aie.tile(8, 3) // -// CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T71]], DMA : 0) -// CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T82]], DMA : 0) -// CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T31]], DMA : 0) -// CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T13]], DMA : 0) -// CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T83]], DMA : 1) -// CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T22]], DMA : 1) -// CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T31]], DMA : 1) -// CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T02]], DMA : 1) +// CHECK: aie.flow(%[[T20]], DMA : 0, %[[T71]], DMA : 0) +// CHECK: aie.flow(%[[T20]], DMA : 0, %[[T82]], DMA : 0) +// CHECK: aie.flow(%[[T20]], DMA : 0, %[[T31]], DMA : 0) +// CHECK: aie.flow(%[[T20]], DMA : 0, %[[T13]], DMA : 0) +// CHECK: aie.flow(%[[T60]], DMA : 0, %[[T83]], DMA : 1) +// CHECK: aie.flow(%[[T60]], DMA : 0, %[[T22]], DMA : 1) +// CHECK: aie.flow(%[[T60]], DMA : 0, %[[T31]], DMA : 1) +// CHECK: aie.flow(%[[T60]], DMA : 0, %[[T02]], DMA : 1) module { - AIE.device(xcvc1902) { - %t03 = AIE.tile(0, 3) - %t02 = AIE.tile(0, 2) - %t00 = AIE.tile(0, 0) - %t13 = AIE.tile(1, 3) - %t11 = AIE.tile(1, 1) - %t10 = AIE.tile(1, 0) - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t22 = AIE.tile(2, 2) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t80 = AIE.tile(8, 0) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) + aie.device(xcvc1902) { + %t03 = aie.tile(0, 3) + %t02 = aie.tile(0, 2) + %t00 = aie.tile(0, 0) + %t13 = aie.tile(1, 3) + %t11 = aie.tile(1, 1) + %t10 = aie.tile(1, 0) + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t22 = aie.tile(2, 2) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t80 = aie.tile(8, 0) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) - AIE.flow(%t20, DMA : 0, %t13, DMA : 0) - AIE.flow(%t20, DMA : 0, %t31, DMA : 0) - AIE.flow(%t20, DMA : 0, %t71, DMA : 0) - AIE.flow(%t20, DMA : 0, %t82, DMA : 0) + aie.flow(%t20, DMA : 0, %t13, DMA : 0) + aie.flow(%t20, DMA : 0, %t31, DMA : 0) + aie.flow(%t20, DMA : 0, %t71, DMA : 0) + aie.flow(%t20, DMA : 0, %t82, DMA : 0) - AIE.flow(%t60, DMA : 0, %t02, DMA : 1) - AIE.flow(%t60, DMA : 0, %t83, DMA : 1) - AIE.flow(%t60, DMA : 0, %t22, DMA : 1) - AIE.flow(%t60, DMA : 0, %t31, DMA : 1) + aie.flow(%t60, DMA : 0, %t02, DMA : 1) + aie.flow(%t60, DMA : 0, %t83, DMA : 1) + aie.flow(%t60, DMA : 0, %t22, DMA : 1) + aie.flow(%t60, DMA : 0, %t31, DMA : 1) } } diff --git a/test/create-flows/flow_test_1.mlir b/test/create-flows/flow_test_1.mlir index d42f602e5c..6d3b4731b9 100644 --- a/test/create-flows/flow_test_1.mlir +++ b/test/create-flows/flow_test_1.mlir @@ -9,93 +9,93 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -//CHECK: %[[t20:.*]] = AIE.tile(2, 0) -//CHECK: %[[t30:.*]] = AIE.tile(3, 0) -//CHECK: %[[t34:.*]] = AIE.tile(3, 4) -//CHECK: %[[t43:.*]] = AIE.tile(4, 3) -//CHECK: %[[t44:.*]] = AIE.tile(4, 4) -//CHECK: %[[t54:.*]] = AIE.tile(5, 4) -//CHECK: %[[t60:.*]] = AIE.tile(6, 0) -//CHECK: %[[t63:.*]] = AIE.tile(6, 3) -//CHECK: %[[t70:.*]] = AIE.tile(7, 0) -//CHECK: %[[t72:.*]] = AIE.tile(7, 2) -//CHECK: %[[t83:.*]] = AIE.tile(8, 3) -//CHECK: %[[t84:.*]] = AIE.tile(8, 4) +//CHECK: %[[t20:.*]] = aie.tile(2, 0) +//CHECK: %[[t30:.*]] = aie.tile(3, 0) +//CHECK: %[[t34:.*]] = aie.tile(3, 4) +//CHECK: %[[t43:.*]] = aie.tile(4, 3) +//CHECK: %[[t44:.*]] = aie.tile(4, 4) +//CHECK: %[[t54:.*]] = aie.tile(5, 4) +//CHECK: %[[t60:.*]] = aie.tile(6, 0) +//CHECK: %[[t63:.*]] = aie.tile(6, 3) +//CHECK: %[[t70:.*]] = aie.tile(7, 0) +//CHECK: %[[t72:.*]] = aie.tile(7, 2) +//CHECK: %[[t83:.*]] = aie.tile(8, 3) +//CHECK: %[[t84:.*]] = aie.tile(8, 4) -// CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t63]], DMA : 0) -// CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 0) -// CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t72]], DMA : 0) -// CHECK: AIE.flow(%[[t30]], DMA : 1, %[[t54]], DMA : 0) +// CHECK: aie.flow(%[[t20]], DMA : 0, %[[t63]], DMA : 0) +// CHECK: aie.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 0) +// CHECK: aie.flow(%[[t30]], DMA : 0, %[[t72]], DMA : 0) +// CHECK: aie.flow(%[[t30]], DMA : 1, %[[t54]], DMA : 0) -// CHECK: AIE.flow(%[[t34]], Core : 0, %[[t63]], Core : 1) -// CHECK: AIE.flow(%[[t34]], DMA : 1, %[[t70]], DMA : 0) -// CHECK: AIE.flow(%[[t43]], Core : 0, %[[t84]], Core : 1) -// CHECK: AIE.flow(%[[t43]], DMA : 1, %[[t60]], DMA : 1) +// CHECK: aie.flow(%[[t34]], Core : 0, %[[t63]], Core : 1) +// CHECK: aie.flow(%[[t34]], DMA : 1, %[[t70]], DMA : 0) +// CHECK: aie.flow(%[[t43]], Core : 0, %[[t84]], Core : 1) +// CHECK: aie.flow(%[[t43]], DMA : 1, %[[t60]], DMA : 1) -// CHECK: AIE.flow(%[[t44]], Core : 0, %[[t54]], Core : 1) -// CHECK: AIE.flow(%[[t44]], DMA : 1, %[[t60]], DMA : 0) -// CHECK: AIE.flow(%[[t54]], Core : 0, %[[t43]], Core : 1) -// CHECK: AIE.flow(%[[t54]], DMA : 1, %[[t30]], DMA : 1) +// CHECK: aie.flow(%[[t44]], Core : 0, %[[t54]], Core : 1) +// CHECK: aie.flow(%[[t44]], DMA : 1, %[[t60]], DMA : 0) +// CHECK: aie.flow(%[[t54]], Core : 0, %[[t43]], Core : 1) +// CHECK: aie.flow(%[[t54]], DMA : 1, %[[t30]], DMA : 1) -// CHECK: AIE.flow(%[[t60]], DMA : 0, %[[t44]], DMA : 0) -// CHECK: AIE.flow(%[[t60]], DMA : 1, %[[t43]], DMA : 0) -// CHECK: AIE.flow(%[[t63]], Core : 0, %[[t34]], Core : 1) -// CHECK: AIE.flow(%[[t63]], DMA : 1, %[[t20]], DMA : 1) +// CHECK: aie.flow(%[[t60]], DMA : 0, %[[t44]], DMA : 0) +// CHECK: aie.flow(%[[t60]], DMA : 1, %[[t43]], DMA : 0) +// CHECK: aie.flow(%[[t63]], Core : 0, %[[t34]], Core : 1) +// CHECK: aie.flow(%[[t63]], DMA : 1, %[[t20]], DMA : 1) -// CHECK: AIE.flow(%[[t70]], DMA : 0, %[[t34]], DMA : 0) -// CHECK: AIE.flow(%[[t70]], DMA : 1, %[[t84]], DMA : 0) -// CHECK: AIE.flow(%[[t72]], Core : 0, %[[t83]], Core : 1) -// CHECK: AIE.flow(%[[t72]], DMA : 1, %[[t30]], DMA : 0) +// CHECK: aie.flow(%[[t70]], DMA : 0, %[[t34]], DMA : 0) +// CHECK: aie.flow(%[[t70]], DMA : 1, %[[t84]], DMA : 0) +// CHECK: aie.flow(%[[t72]], Core : 0, %[[t83]], Core : 1) +// CHECK: aie.flow(%[[t72]], DMA : 1, %[[t30]], DMA : 0) -// CHECK: AIE.flow(%[[t83]], Core : 0, %[[t44]], Core : 1) -// CHECK: AIE.flow(%[[t83]], DMA : 1, %[[t20]], DMA : 0) -// CHECK: AIE.flow(%[[t84]], Core : 0, %[[t72]], Core : 1) -// CHECK: AIE.flow(%[[t84]], DMA : 1, %[[t70]], DMA : 1) +// CHECK: aie.flow(%[[t83]], Core : 0, %[[t44]], Core : 1) +// CHECK: aie.flow(%[[t83]], DMA : 1, %[[t20]], DMA : 0) +// CHECK: aie.flow(%[[t84]], Core : 0, %[[t72]], Core : 1) +// CHECK: aie.flow(%[[t84]], DMA : 1, %[[t70]], DMA : 1) module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t34 = AIE.tile(3, 4) - %t43 = AIE.tile(4, 3) - %t44 = AIE.tile(4, 4) - %t54 = AIE.tile(5, 4) - %t60 = AIE.tile(6, 0) - %t63 = AIE.tile(6, 3) - %t70 = AIE.tile(7, 0) - %t72 = AIE.tile(7, 2) - %t83 = AIE.tile(8, 3) - %t84 = AIE.tile(8, 4) + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t34 = aie.tile(3, 4) + %t43 = aie.tile(4, 3) + %t44 = aie.tile(4, 4) + %t54 = aie.tile(5, 4) + %t60 = aie.tile(6, 0) + %t63 = aie.tile(6, 3) + %t70 = aie.tile(7, 0) + %t72 = aie.tile(7, 2) + %t83 = aie.tile(8, 3) + %t84 = aie.tile(8, 4) - AIE.flow(%t20, DMA : 0, %t63, DMA : 0) - AIE.flow(%t20, DMA : 1, %t83, DMA : 0) - AIE.flow(%t30, DMA : 0, %t72, DMA : 0) - AIE.flow(%t30, DMA : 1, %t54, DMA : 0) + aie.flow(%t20, DMA : 0, %t63, DMA : 0) + aie.flow(%t20, DMA : 1, %t83, DMA : 0) + aie.flow(%t30, DMA : 0, %t72, DMA : 0) + aie.flow(%t30, DMA : 1, %t54, DMA : 0) - AIE.flow(%t34, Core : 0, %t63, Core : 1) - AIE.flow(%t34, DMA : 1, %t70, DMA : 0) - AIE.flow(%t43, Core : 0, %t84, Core : 1) - AIE.flow(%t43, DMA : 1, %t60, DMA : 1) + aie.flow(%t34, Core : 0, %t63, Core : 1) + aie.flow(%t34, DMA : 1, %t70, DMA : 0) + aie.flow(%t43, Core : 0, %t84, Core : 1) + aie.flow(%t43, DMA : 1, %t60, DMA : 1) - AIE.flow(%t44, Core : 0, %t54, Core : 1) - AIE.flow(%t44, DMA : 1, %t60, DMA : 0) - AIE.flow(%t54, Core : 0, %t43, Core : 1) - AIE.flow(%t54, DMA : 1, %t30, DMA : 1) + aie.flow(%t44, Core : 0, %t54, Core : 1) + aie.flow(%t44, DMA : 1, %t60, DMA : 0) + aie.flow(%t54, Core : 0, %t43, Core : 1) + aie.flow(%t54, DMA : 1, %t30, DMA : 1) - AIE.flow(%t60, DMA : 0, %t44, DMA : 0) - AIE.flow(%t60, DMA : 1, %t43, DMA : 0) - AIE.flow(%t63, Core : 0, %t34, Core : 1) - AIE.flow(%t63, DMA : 1, %t20, DMA : 1) + aie.flow(%t60, DMA : 0, %t44, DMA : 0) + aie.flow(%t60, DMA : 1, %t43, DMA : 0) + aie.flow(%t63, Core : 0, %t34, Core : 1) + aie.flow(%t63, DMA : 1, %t20, DMA : 1) - AIE.flow(%t70, DMA : 0, %t34, DMA : 0) - AIE.flow(%t70, DMA : 1, %t84, DMA : 0) - AIE.flow(%t72, Core : 0, %t83, Core : 1) - AIE.flow(%t72, DMA : 1, %t30, DMA : 0) + aie.flow(%t70, DMA : 0, %t34, DMA : 0) + aie.flow(%t70, DMA : 1, %t84, DMA : 0) + aie.flow(%t72, Core : 0, %t83, Core : 1) + aie.flow(%t72, DMA : 1, %t30, DMA : 0) - AIE.flow(%t83, Core : 0, %t44, Core : 1) - AIE.flow(%t83, DMA : 1, %t20, DMA : 0) - AIE.flow(%t84, Core : 0, %t72, Core : 1) - AIE.flow(%t84, DMA : 1, %t70, DMA : 1) + aie.flow(%t83, Core : 0, %t44, Core : 1) + aie.flow(%t83, DMA : 1, %t20, DMA : 0) + aie.flow(%t84, Core : 0, %t72, Core : 1) + aie.flow(%t84, DMA : 1, %t70, DMA : 1) } } \ No newline at end of file diff --git a/test/create-flows/flow_test_2.mlir b/test/create-flows/flow_test_2.mlir index 9c5aa7536a..33f6944a73 100644 --- a/test/create-flows/flow_test_2.mlir +++ b/test/create-flows/flow_test_2.mlir @@ -9,99 +9,99 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -//CHECK: %[[t01:.*]] = AIE.tile(0, 1) -//CHECK: %[[t02:.*]] = AIE.tile(0, 2) -//CHECK: %[[t03:.*]] = AIE.tile(0, 3) -//CHECK: %[[t04:.*]] = AIE.tile(0, 4) -//CHECK: %[[t11:.*]] = AIE.tile(1, 1) -//CHECK: %[[t12:.*]] = AIE.tile(1, 2) -//CHECK: %[[t13:.*]] = AIE.tile(1, 3) -//CHECK: %[[t14:.*]] = AIE.tile(1, 4) -//CHECK: %[[t20:.*]] = AIE.tile(2, 0) -//CHECK: %[[t21:.*]] = AIE.tile(2, 1) -//CHECK: %[[t22:.*]] = AIE.tile(2, 2) -//CHECK: %[[t23:.*]] = AIE.tile(2, 3) -//CHECK: %[[t24:.*]] = AIE.tile(2, 4) -//CHECK: %[[t30:.*]] = AIE.tile(3, 0) -//CHECK: %[[t31:.*]] = AIE.tile(3, 1) -//CHECK: %[[t32:.*]] = AIE.tile(3, 2) -//CHECK: %[[t33:.*]] = AIE.tile(3, 3) -//CHECK: %[[t34:.*]] = AIE.tile(3, 4) +//CHECK: %[[t01:.*]] = aie.tile(0, 1) +//CHECK: %[[t02:.*]] = aie.tile(0, 2) +//CHECK: %[[t03:.*]] = aie.tile(0, 3) +//CHECK: %[[t04:.*]] = aie.tile(0, 4) +//CHECK: %[[t11:.*]] = aie.tile(1, 1) +//CHECK: %[[t12:.*]] = aie.tile(1, 2) +//CHECK: %[[t13:.*]] = aie.tile(1, 3) +//CHECK: %[[t14:.*]] = aie.tile(1, 4) +//CHECK: %[[t20:.*]] = aie.tile(2, 0) +//CHECK: %[[t21:.*]] = aie.tile(2, 1) +//CHECK: %[[t22:.*]] = aie.tile(2, 2) +//CHECK: %[[t23:.*]] = aie.tile(2, 3) +//CHECK: %[[t24:.*]] = aie.tile(2, 4) +//CHECK: %[[t30:.*]] = aie.tile(3, 0) +//CHECK: %[[t31:.*]] = aie.tile(3, 1) +//CHECK: %[[t32:.*]] = aie.tile(3, 2) +//CHECK: %[[t33:.*]] = aie.tile(3, 3) +//CHECK: %[[t34:.*]] = aie.tile(3, 4) -//CHECK: AIE.flow(%[[t01]], Core : 0, %[[t12]], Core : 0) -//CHECK: AIE.flow(%[[t02]], DMA : 0, %[[t20]], DMA : 0) -//CHECK: AIE.flow(%[[t04]], Core : 0, %[[t13]], Core : 0) -//CHECK: AIE.flow(%[[t11]], Core : 0, %[[t01]], Core : 0) -//CHECK: AIE.flow(%[[t12]], Core : 0, %[[t02]], Core : 0) -//CHECK: AIE.flow(%[[t13]], DMA : 0, %[[t20]], DMA : 1) -//CHECK: AIE.flow(%[[t14]], Core : 0, %[[t04]], Core : 0) -//CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t11]], DMA : 0) -//CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t14]], DMA : 0) -//CHECK: AIE.flow(%[[t21]], Core : 0, %[[t33]], Core : 0) -//CHECK: AIE.flow(%[[t22]], Core : 0, %[[t34]], Core : 0) -//CHECK: AIE.flow(%[[t23]], Core : 1, %[[t34]], Core : 1) -//CHECK: AIE.flow(%[[t23]], DMA : 0, %[[t30]], DMA : 0) -//CHECK: AIE.flow(%[[t24]], Core : 0, %[[t23]], Core : 0) -//CHECK: AIE.flow(%[[t24]], Core : 1, %[[t33]], Core : 1) -//CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t21]], DMA : 0) -//CHECK: AIE.flow(%[[t30]], DMA : 1, %[[t31]], DMA : 1) -//CHECK: AIE.flow(%[[t31]], Core : 1, %[[t23]], Core : 1) -//CHECK: AIE.flow(%[[t32]], DMA : 1, %[[t30]], DMA : 1) -//CHECK: AIE.flow(%[[t33]], Core : 0, %[[t22]], Core : 0) -//CHECK: AIE.flow(%[[t33]], Core : 1, %[[t32]], Core : 1) -//CHECK: AIE.flow(%[[t34]], Core : 0, %[[t24]], Core : 0) -//CHECK: AIE.flow(%[[t34]], Core : 1, %[[t24]], Core : 1) +//CHECK: aie.flow(%[[t01]], Core : 0, %[[t12]], Core : 0) +//CHECK: aie.flow(%[[t02]], DMA : 0, %[[t20]], DMA : 0) +//CHECK: aie.flow(%[[t04]], Core : 0, %[[t13]], Core : 0) +//CHECK: aie.flow(%[[t11]], Core : 0, %[[t01]], Core : 0) +//CHECK: aie.flow(%[[t12]], Core : 0, %[[t02]], Core : 0) +//CHECK: aie.flow(%[[t13]], DMA : 0, %[[t20]], DMA : 1) +//CHECK: aie.flow(%[[t14]], Core : 0, %[[t04]], Core : 0) +//CHECK: aie.flow(%[[t20]], DMA : 0, %[[t11]], DMA : 0) +//CHECK: aie.flow(%[[t20]], DMA : 1, %[[t14]], DMA : 0) +//CHECK: aie.flow(%[[t21]], Core : 0, %[[t33]], Core : 0) +//CHECK: aie.flow(%[[t22]], Core : 0, %[[t34]], Core : 0) +//CHECK: aie.flow(%[[t23]], Core : 1, %[[t34]], Core : 1) +//CHECK: aie.flow(%[[t23]], DMA : 0, %[[t30]], DMA : 0) +//CHECK: aie.flow(%[[t24]], Core : 0, %[[t23]], Core : 0) +//CHECK: aie.flow(%[[t24]], Core : 1, %[[t33]], Core : 1) +//CHECK: aie.flow(%[[t30]], DMA : 0, %[[t21]], DMA : 0) +//CHECK: aie.flow(%[[t30]], DMA : 1, %[[t31]], DMA : 1) +//CHECK: aie.flow(%[[t31]], Core : 1, %[[t23]], Core : 1) +//CHECK: aie.flow(%[[t32]], DMA : 1, %[[t30]], DMA : 1) +//CHECK: aie.flow(%[[t33]], Core : 0, %[[t22]], Core : 0) +//CHECK: aie.flow(%[[t33]], Core : 1, %[[t32]], Core : 1) +//CHECK: aie.flow(%[[t34]], Core : 0, %[[t24]], Core : 0) +//CHECK: aie.flow(%[[t34]], Core : 1, %[[t24]], Core : 1) module { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t04 = AIE.tile(0, 4) - %t11 = AIE.tile(1, 1) - %t12 = AIE.tile(1, 2) - %t13 = AIE.tile(1, 3) - %t14 = AIE.tile(1, 4) - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 2) - %t23 = AIE.tile(2, 3) - %t24 = AIE.tile(2, 4) - %t30 = AIE.tile(3, 0) - %t31 = AIE.tile(3, 1) - %t32 = AIE.tile(3, 2) - %t33 = AIE.tile(3, 3) - %t34 = AIE.tile(3, 4) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t04 = aie.tile(0, 4) + %t11 = aie.tile(1, 1) + %t12 = aie.tile(1, 2) + %t13 = aie.tile(1, 3) + %t14 = aie.tile(1, 4) + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) + %t22 = aie.tile(2, 2) + %t23 = aie.tile(2, 3) + %t24 = aie.tile(2, 4) + %t30 = aie.tile(3, 0) + %t31 = aie.tile(3, 1) + %t32 = aie.tile(3, 2) + %t33 = aie.tile(3, 3) + %t34 = aie.tile(3, 4) //TASK 1 - AIE.flow(%t20, DMA : 0, %t11, DMA : 0) - AIE.flow(%t11, Core : 0, %t01, Core : 0) - AIE.flow(%t01, Core : 0, %t12, Core : 0) - AIE.flow(%t12, Core : 0, %t02, Core : 0) - AIE.flow(%t02, DMA : 0, %t20, DMA : 0) + aie.flow(%t20, DMA : 0, %t11, DMA : 0) + aie.flow(%t11, Core : 0, %t01, Core : 0) + aie.flow(%t01, Core : 0, %t12, Core : 0) + aie.flow(%t12, Core : 0, %t02, Core : 0) + aie.flow(%t02, DMA : 0, %t20, DMA : 0) //TASK 2 - AIE.flow(%t20, DMA : 1, %t14, DMA : 0) - AIE.flow(%t14, Core : 0, %t04, Core : 0) - AIE.flow(%t04, Core : 0, %t13, Core : 0) - AIE.flow(%t13, DMA : 0, %t20, DMA : 1) + aie.flow(%t20, DMA : 1, %t14, DMA : 0) + aie.flow(%t14, Core : 0, %t04, Core : 0) + aie.flow(%t04, Core : 0, %t13, Core : 0) + aie.flow(%t13, DMA : 0, %t20, DMA : 1) //TASK 3 - AIE.flow(%t30, DMA : 0, %t21, DMA : 0) - AIE.flow(%t21, Core : 0, %t33, Core : 0) - AIE.flow(%t33, Core : 0, %t22, Core : 0) - AIE.flow(%t22, Core : 0, %t34, Core : 0) - AIE.flow(%t34, Core : 0, %t24, Core : 0) - AIE.flow(%t24, Core : 0, %t23, Core : 0) - AIE.flow(%t23, DMA : 0, %t30, DMA : 0) + aie.flow(%t30, DMA : 0, %t21, DMA : 0) + aie.flow(%t21, Core : 0, %t33, Core : 0) + aie.flow(%t33, Core : 0, %t22, Core : 0) + aie.flow(%t22, Core : 0, %t34, Core : 0) + aie.flow(%t34, Core : 0, %t24, Core : 0) + aie.flow(%t24, Core : 0, %t23, Core : 0) + aie.flow(%t23, DMA : 0, %t30, DMA : 0) //TASK 4 - AIE.flow(%t30, DMA : 1, %t31, DMA : 1) - AIE.flow(%t31, Core : 1, %t23, Core : 1) - AIE.flow(%t23, Core : 1, %t34, Core : 1) - AIE.flow(%t34, Core : 1, %t24, Core : 1) - AIE.flow(%t24, Core : 1, %t33, Core : 1) - AIE.flow(%t33, Core : 1, %t32, Core : 1) - AIE.flow(%t32, DMA : 1, %t30, DMA : 1) + aie.flow(%t30, DMA : 1, %t31, DMA : 1) + aie.flow(%t31, Core : 1, %t23, Core : 1) + aie.flow(%t23, Core : 1, %t34, Core : 1) + aie.flow(%t34, Core : 1, %t24, Core : 1) + aie.flow(%t24, Core : 1, %t33, Core : 1) + aie.flow(%t33, Core : 1, %t32, Core : 1) + aie.flow(%t32, DMA : 1, %t30, DMA : 1) } } \ No newline at end of file diff --git a/test/create-flows/flow_test_3.mlir b/test/create-flows/flow_test_3.mlir index e1ad1af142..f9a159aedc 100644 --- a/test/create-flows/flow_test_3.mlir +++ b/test/create-flows/flow_test_3.mlir @@ -9,101 +9,101 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -//CHECK: %[[t01:.*]] = AIE.tile(0, 1) -//CHECK: %[[t02:.*]] = AIE.tile(0, 2) -//CHECK: %[[t03:.*]] = AIE.tile(0, 3) -//CHECK: %[[t04:.*]] = AIE.tile(0, 4) -//CHECK: %[[t11:.*]] = AIE.tile(1, 1) -//CHECK: %[[t12:.*]] = AIE.tile(1, 2) -//CHECK: %[[t13:.*]] = AIE.tile(1, 3) -//CHECK: %[[t14:.*]] = AIE.tile(1, 4) -//CHECK: %[[t20:.*]] = AIE.tile(2, 0) -//CHECK: %[[t21:.*]] = AIE.tile(2, 1) -//CHECK: %[[t22:.*]] = AIE.tile(2, 2) -//CHECK: %[[t23:.*]] = AIE.tile(2, 3) -//CHECK: %[[t24:.*]] = AIE.tile(2, 4) -//CHECK: %[[t30:.*]] = AIE.tile(3, 0) -//CHECK: %[[t71:.*]] = AIE.tile(7, 1) -//CHECK: %[[t72:.*]] = AIE.tile(7, 2) -//CHECK: %[[t73:.*]] = AIE.tile(7, 3) -//CHECK: %[[t74:.*]] = AIE.tile(7, 4) -//CHECK: %[[t81:.*]] = AIE.tile(8, 1) -//CHECK: %[[t82:.*]] = AIE.tile(8, 2) -//CHECK: %[[t83:.*]] = AIE.tile(8, 3) -//CHECK: %[[t84:.*]] = AIE.tile(8, 4) +//CHECK: %[[t01:.*]] = aie.tile(0, 1) +//CHECK: %[[t02:.*]] = aie.tile(0, 2) +//CHECK: %[[t03:.*]] = aie.tile(0, 3) +//CHECK: %[[t04:.*]] = aie.tile(0, 4) +//CHECK: %[[t11:.*]] = aie.tile(1, 1) +//CHECK: %[[t12:.*]] = aie.tile(1, 2) +//CHECK: %[[t13:.*]] = aie.tile(1, 3) +//CHECK: %[[t14:.*]] = aie.tile(1, 4) +//CHECK: %[[t20:.*]] = aie.tile(2, 0) +//CHECK: %[[t21:.*]] = aie.tile(2, 1) +//CHECK: %[[t22:.*]] = aie.tile(2, 2) +//CHECK: %[[t23:.*]] = aie.tile(2, 3) +//CHECK: %[[t24:.*]] = aie.tile(2, 4) +//CHECK: %[[t30:.*]] = aie.tile(3, 0) +//CHECK: %[[t71:.*]] = aie.tile(7, 1) +//CHECK: %[[t72:.*]] = aie.tile(7, 2) +//CHECK: %[[t73:.*]] = aie.tile(7, 3) +//CHECK: %[[t74:.*]] = aie.tile(7, 4) +//CHECK: %[[t81:.*]] = aie.tile(8, 1) +//CHECK: %[[t82:.*]] = aie.tile(8, 2) +//CHECK: %[[t83:.*]] = aie.tile(8, 3) +//CHECK: %[[t84:.*]] = aie.tile(8, 4) -//CHECK: AIE.flow(%[[t01]], Core : 0, %[[t83]], Core : 0) -//CHECK: AIE.flow(%[[t01]], Core : 1, %[[t72]], Core : 1) -//CHECK: AIE.flow(%[[t02]], Core : 1, %[[t24]], Core : 1) -//CHECK: AIE.flow(%[[t03]], Core : 0, %[[t71]], Core : 0) -//CHECK: AIE.flow(%[[t11]], Core : 0, %[[t24]], Core : 0) -//CHECK: AIE.flow(%[[t14]], Core : 0, %[[t01]], Core : 0) -//CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t03]], DMA : 0) -//CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 1) -//CHECK: AIE.flow(%[[t21]], Core : 0, %[[t73]], Core : 0) -//CHECK: AIE.flow(%[[t24]], Core : 1, %[[t71]], Core : 1) -//CHECK: AIE.flow(%[[t24]], DMA : 0, %[[t20]], DMA : 0) -//CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t14]], DMA : 0) -//CHECK: AIE.flow(%[[t71]], Core : 0, %[[t84]], Core : 0) -//CHECK: AIE.flow(%[[t71]], Core : 1, %[[t84]], Core : 1) -//CHECK: AIE.flow(%[[t72]], Core : 1, %[[t02]], Core : 1) -//CHECK: AIE.flow(%[[t73]], Core : 0, %[[t82]], Core : 0) -//CHECK: AIE.flow(%[[t82]], DMA : 0, %[[t30]], DMA : 0) -//CHECK: AIE.flow(%[[t83]], Core : 0, %[[t21]], Core : 0) -//CHECK: AIE.flow(%[[t83]], Core : 1, %[[t01]], Core : 1) -//CHECK: AIE.flow(%[[t84]], Core : 0, %[[t11]], Core : 0) -//CHECK: AIE.flow(%[[t84]], DMA : 1, %[[t20]], DMA : 1) +//CHECK: aie.flow(%[[t01]], Core : 0, %[[t83]], Core : 0) +//CHECK: aie.flow(%[[t01]], Core : 1, %[[t72]], Core : 1) +//CHECK: aie.flow(%[[t02]], Core : 1, %[[t24]], Core : 1) +//CHECK: aie.flow(%[[t03]], Core : 0, %[[t71]], Core : 0) +//CHECK: aie.flow(%[[t11]], Core : 0, %[[t24]], Core : 0) +//CHECK: aie.flow(%[[t14]], Core : 0, %[[t01]], Core : 0) +//CHECK: aie.flow(%[[t20]], DMA : 0, %[[t03]], DMA : 0) +//CHECK: aie.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 1) +//CHECK: aie.flow(%[[t21]], Core : 0, %[[t73]], Core : 0) +//CHECK: aie.flow(%[[t24]], Core : 1, %[[t71]], Core : 1) +//CHECK: aie.flow(%[[t24]], DMA : 0, %[[t20]], DMA : 0) +//CHECK: aie.flow(%[[t30]], DMA : 0, %[[t14]], DMA : 0) +//CHECK: aie.flow(%[[t71]], Core : 0, %[[t84]], Core : 0) +//CHECK: aie.flow(%[[t71]], Core : 1, %[[t84]], Core : 1) +//CHECK: aie.flow(%[[t72]], Core : 1, %[[t02]], Core : 1) +//CHECK: aie.flow(%[[t73]], Core : 0, %[[t82]], Core : 0) +//CHECK: aie.flow(%[[t82]], DMA : 0, %[[t30]], DMA : 0) +//CHECK: aie.flow(%[[t83]], Core : 0, %[[t21]], Core : 0) +//CHECK: aie.flow(%[[t83]], Core : 1, %[[t01]], Core : 1) +//CHECK: aie.flow(%[[t84]], Core : 0, %[[t11]], Core : 0) +//CHECK: aie.flow(%[[t84]], DMA : 1, %[[t20]], DMA : 1) module { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t04 = AIE.tile(0, 4) - %t11 = AIE.tile(1, 1) - %t12 = AIE.tile(1, 2) - %t13 = AIE.tile(1, 3) - %t14 = AIE.tile(1, 4) - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 2) - %t23 = AIE.tile(2, 3) - %t24 = AIE.tile(2, 4) - %t30 = AIE.tile(3, 0) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - %t81 = AIE.tile(8, 1) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) - %t84 = AIE.tile(8, 4) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t04 = aie.tile(0, 4) + %t11 = aie.tile(1, 1) + %t12 = aie.tile(1, 2) + %t13 = aie.tile(1, 3) + %t14 = aie.tile(1, 4) + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) + %t22 = aie.tile(2, 2) + %t23 = aie.tile(2, 3) + %t24 = aie.tile(2, 4) + %t30 = aie.tile(3, 0) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + %t81 = aie.tile(8, 1) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) + %t84 = aie.tile(8, 4) //TASK 1 - AIE.flow(%t20, DMA : 0, %t03, DMA : 0) - AIE.flow(%t03, Core : 0, %t71, Core : 0) - AIE.flow(%t71, Core : 0, %t84, Core : 0) - AIE.flow(%t84, Core : 0, %t11, Core : 0) - AIE.flow(%t11, Core : 0, %t24, Core : 0) - AIE.flow(%t24, DMA : 0, %t20, DMA : 0) + aie.flow(%t20, DMA : 0, %t03, DMA : 0) + aie.flow(%t03, Core : 0, %t71, Core : 0) + aie.flow(%t71, Core : 0, %t84, Core : 0) + aie.flow(%t84, Core : 0, %t11, Core : 0) + aie.flow(%t11, Core : 0, %t24, Core : 0) + aie.flow(%t24, DMA : 0, %t20, DMA : 0) //TASK 2 - AIE.flow(%t30, DMA : 0, %t14, DMA : 0) - AIE.flow(%t14, Core : 0, %t01, Core : 0) - AIE.flow(%t01, Core : 0, %t83, Core : 0) - AIE.flow(%t83, Core : 0, %t21, Core : 0) - AIE.flow(%t21, Core : 0, %t73, Core : 0) - AIE.flow(%t73, Core : 0, %t82, Core : 0) - AIE.flow(%t82, DMA : 0, %t30, DMA : 0) + aie.flow(%t30, DMA : 0, %t14, DMA : 0) + aie.flow(%t14, Core : 0, %t01, Core : 0) + aie.flow(%t01, Core : 0, %t83, Core : 0) + aie.flow(%t83, Core : 0, %t21, Core : 0) + aie.flow(%t21, Core : 0, %t73, Core : 0) + aie.flow(%t73, Core : 0, %t82, Core : 0) + aie.flow(%t82, DMA : 0, %t30, DMA : 0) //TASK 3 - AIE.flow(%t20, DMA : 1, %t83, DMA : 1) - AIE.flow(%t83, Core : 1, %t01, Core : 1) - AIE.flow(%t01, Core : 1, %t72, Core : 1) - AIE.flow(%t72, Core : 1, %t02, Core : 1) - AIE.flow(%t02, Core : 1, %t24, Core : 1) - AIE.flow(%t24, Core : 1, %t71, Core : 1) - AIE.flow(%t71, Core : 1, %t84, Core : 1) - AIE.flow(%t84, DMA : 1, %t20, DMA : 1) + aie.flow(%t20, DMA : 1, %t83, DMA : 1) + aie.flow(%t83, Core : 1, %t01, Core : 1) + aie.flow(%t01, Core : 1, %t72, Core : 1) + aie.flow(%t72, Core : 1, %t02, Core : 1) + aie.flow(%t02, Core : 1, %t24, Core : 1) + aie.flow(%t24, Core : 1, %t71, Core : 1) + aie.flow(%t71, Core : 1, %t84, Core : 1) + aie.flow(%t84, DMA : 1, %t20, DMA : 1) } } \ No newline at end of file diff --git a/test/create-flows/many_flows.mlir b/test/create-flows/many_flows.mlir index 355c565532..82f16679bb 100644 --- a/test/create-flows/many_flows.mlir +++ b/test/create-flows/many_flows.mlir @@ -9,62 +9,62 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T02:.*]] = AIE.tile(0, 2) -// CHECK: %[[T03:.*]] = AIE.tile(0, 3) -// CHECK: %[[T11:.*]] = AIE.tile(1, 1) -// CHECK: %[[T13:.*]] = AIE.tile(1, 3) -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %[[T31:.*]] = AIE.tile(3, 1) -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T73:.*]] = AIE.tile(7, 3) -// CHECK: AIE.flow(%[[T02]], Core : 1, %[[T22]], Core : 1) -// CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) -// CHECK: AIE.flow(%[[T03]], Core : 0, %[[T13]], Core : 0) -// CHECK: AIE.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) -// CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T70]], DMA : 0) -// CHECK: AIE.flow(%[[T13]], Core : 1, %[[T22]], Core : 0) -// CHECK: AIE.flow(%[[T13]], DMA : 0, %[[T70]], DMA : 1) -// CHECK: AIE.flow(%[[T22]], DMA : 0, %[[T60]], DMA : 1) -// CHECK: AIE.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) -// CHECK: AIE.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) -// CHECK: AIE.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) -// CHECK: AIE.flow(%[[T73]], Core : 1, %[[T31]], Core : 1) -// CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T20]], DMA : 0) -// CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T30]], DMA : 0) +// CHECK: %[[T02:.*]] = aie.tile(0, 2) +// CHECK: %[[T03:.*]] = aie.tile(0, 3) +// CHECK: %[[T11:.*]] = aie.tile(1, 1) +// CHECK: %[[T13:.*]] = aie.tile(1, 3) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %[[T31:.*]] = aie.tile(3, 1) +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T73:.*]] = aie.tile(7, 3) +// CHECK: aie.flow(%[[T02]], Core : 1, %[[T22]], Core : 1) +// CHECK: aie.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) +// CHECK: aie.flow(%[[T03]], Core : 0, %[[T13]], Core : 0) +// CHECK: aie.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) +// CHECK: aie.flow(%[[T03]], DMA : 0, %[[T70]], DMA : 0) +// CHECK: aie.flow(%[[T13]], Core : 1, %[[T22]], Core : 0) +// CHECK: aie.flow(%[[T13]], DMA : 0, %[[T70]], DMA : 1) +// CHECK: aie.flow(%[[T22]], DMA : 0, %[[T60]], DMA : 1) +// CHECK: aie.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) +// CHECK: aie.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) +// CHECK: aie.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) +// CHECK: aie.flow(%[[T73]], Core : 1, %[[T31]], Core : 1) +// CHECK: aie.flow(%[[T73]], DMA : 0, %[[T20]], DMA : 0) +// CHECK: aie.flow(%[[T73]], DMA : 1, %[[T30]], DMA : 0) module { - AIE.device(xcvc1902) { - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t11 = AIE.tile(1, 1) - %t13 = AIE.tile(1, 3) - %t20 = AIE.tile(2, 0) - %t22 = AIE.tile(2, 2) - %t30 = AIE.tile(3, 0) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t73 = AIE.tile(7, 3) + aie.device(xcvc1902) { + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t11 = aie.tile(1, 1) + %t13 = aie.tile(1, 3) + %t20 = aie.tile(2, 0) + %t22 = aie.tile(2, 2) + %t30 = aie.tile(3, 0) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t73 = aie.tile(7, 3) - AIE.flow(%t03, DMA : 0, %t70, DMA : 0) - AIE.flow(%t13, DMA : 0, %t70, DMA : 1) - AIE.flow(%t02, DMA : 0, %t60, DMA : 0) - AIE.flow(%t22, DMA : 0, %t60, DMA : 1) + aie.flow(%t03, DMA : 0, %t70, DMA : 0) + aie.flow(%t13, DMA : 0, %t70, DMA : 1) + aie.flow(%t02, DMA : 0, %t60, DMA : 0) + aie.flow(%t22, DMA : 0, %t60, DMA : 1) - AIE.flow(%t03, Core : 0, %t13, Core : 0) - AIE.flow(%t03, Core : 1, %t02, Core : 0) - AIE.flow(%t13, Core : 1, %t22, Core : 0) - AIE.flow(%t02, Core : 1, %t22, Core : 1) + aie.flow(%t03, Core : 0, %t13, Core : 0) + aie.flow(%t03, Core : 1, %t02, Core : 0) + aie.flow(%t13, Core : 1, %t22, Core : 0) + aie.flow(%t02, Core : 1, %t22, Core : 1) - AIE.flow(%t73, DMA : 0, %t20, DMA : 0) - AIE.flow(%t73, DMA : 1, %t30, DMA : 0) - AIE.flow(%t31, DMA : 0, %t20, DMA : 1) - AIE.flow(%t31, DMA : 1, %t30, DMA : 1) + aie.flow(%t73, DMA : 0, %t20, DMA : 0) + aie.flow(%t73, DMA : 1, %t30, DMA : 0) + aie.flow(%t31, DMA : 0, %t20, DMA : 1) + aie.flow(%t31, DMA : 1, %t30, DMA : 1) - AIE.flow(%t73, Core : 0, %t31, Core : 0) - AIE.flow(%t73, Core : 1, %t31, Core : 1) + aie.flow(%t73, Core : 0, %t31, Core : 0) + aie.flow(%t73, Core : 1, %t31, Core : 1) } } diff --git a/test/create-flows/many_flows2.mlir b/test/create-flows/many_flows2.mlir index d22bdb7a54..85df663dad 100644 --- a/test/create-flows/many_flows2.mlir +++ b/test/create-flows/many_flows2.mlir @@ -9,63 +9,63 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T02:.*]] = AIE.tile(0, 2) -// CHECK: %[[T03:.*]] = AIE.tile(0, 3) -// CHECK: %[[T11:.*]] = AIE.tile(1, 1) -// CHECK: %[[T13:.*]] = AIE.tile(1, 3) -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %[[T31:.*]] = AIE.tile(3, 1) -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T73:.*]] = AIE.tile(7, 3) +// CHECK: %[[T02:.*]] = aie.tile(0, 2) +// CHECK: %[[T03:.*]] = aie.tile(0, 3) +// CHECK: %[[T11:.*]] = aie.tile(1, 1) +// CHECK: %[[T13:.*]] = aie.tile(1, 3) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %[[T31:.*]] = aie.tile(3, 1) +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T73:.*]] = aie.tile(7, 3) // -// CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) -// CHECK: AIE.flow(%[[T03]], Core : 0, %[[T02]], Core : 1) -// CHECK: AIE.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) -// CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T30]], DMA : 0) -// CHECK: AIE.flow(%[[T03]], DMA : 1, %[[T70]], DMA : 1) -// CHECK: AIE.flow(%[[T13]], Core : 1, %[[T31]], Core : 1) -// CHECK: AIE.flow(%[[T22]], Core : 0, %[[T13]], Core : 0) -// CHECK: AIE.flow(%[[T22]], DMA : 0, %[[T20]], DMA : 0) -// CHECK: AIE.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) -// CHECK: AIE.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) -// CHECK: AIE.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) -// CHECK: AIE.flow(%[[T73]], Core : 1, %[[T22]], Core : 1) -// CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T60]], DMA : 1) -// CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 0) +// CHECK: aie.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) +// CHECK: aie.flow(%[[T03]], Core : 0, %[[T02]], Core : 1) +// CHECK: aie.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) +// CHECK: aie.flow(%[[T03]], DMA : 0, %[[T30]], DMA : 0) +// CHECK: aie.flow(%[[T03]], DMA : 1, %[[T70]], DMA : 1) +// CHECK: aie.flow(%[[T13]], Core : 1, %[[T31]], Core : 1) +// CHECK: aie.flow(%[[T22]], Core : 0, %[[T13]], Core : 0) +// CHECK: aie.flow(%[[T22]], DMA : 0, %[[T20]], DMA : 0) +// CHECK: aie.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) +// CHECK: aie.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) +// CHECK: aie.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) +// CHECK: aie.flow(%[[T73]], Core : 1, %[[T22]], Core : 1) +// CHECK: aie.flow(%[[T73]], DMA : 0, %[[T60]], DMA : 1) +// CHECK: aie.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 0) module { - AIE.device(xcvc1902) { - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t11 = AIE.tile(1, 1) - %t13 = AIE.tile(1, 3) - %t20 = AIE.tile(2, 0) - %t22 = AIE.tile(2, 2) - %t30 = AIE.tile(3, 0) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t73 = AIE.tile(7, 3) + aie.device(xcvc1902) { + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t11 = aie.tile(1, 1) + %t13 = aie.tile(1, 3) + %t20 = aie.tile(2, 0) + %t22 = aie.tile(2, 2) + %t30 = aie.tile(3, 0) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t73 = aie.tile(7, 3) - AIE.flow(%t03, DMA : 0, %t30, DMA : 0) - AIE.flow(%t03, DMA : 1, %t70, DMA : 1) - AIE.flow(%t02, DMA : 0, %t60, DMA : 0) - AIE.flow(%t22, DMA : 0, %t20, DMA : 0) + aie.flow(%t03, DMA : 0, %t30, DMA : 0) + aie.flow(%t03, DMA : 1, %t70, DMA : 1) + aie.flow(%t02, DMA : 0, %t60, DMA : 0) + aie.flow(%t22, DMA : 0, %t20, DMA : 0) - AIE.flow(%t22, Core : 0, %t13, Core : 0) - AIE.flow(%t03, Core : 1, %t02, Core : 0) - AIE.flow(%t73, Core : 0, %t31, Core : 0) - AIE.flow(%t73, Core : 1, %t22, Core : 1) + aie.flow(%t22, Core : 0, %t13, Core : 0) + aie.flow(%t03, Core : 1, %t02, Core : 0) + aie.flow(%t73, Core : 0, %t31, Core : 0) + aie.flow(%t73, Core : 1, %t22, Core : 1) - AIE.flow(%t73, DMA : 0, %t60, DMA : 1) - AIE.flow(%t73, DMA : 1, %t70, DMA : 0) - AIE.flow(%t31, DMA : 0, %t20, DMA : 1) - AIE.flow(%t31, DMA : 1, %t30, DMA : 1) + aie.flow(%t73, DMA : 0, %t60, DMA : 1) + aie.flow(%t73, DMA : 1, %t70, DMA : 0) + aie.flow(%t31, DMA : 0, %t20, DMA : 1) + aie.flow(%t31, DMA : 1, %t30, DMA : 1) - AIE.flow(%t03, Core : 0, %t02, Core : 1) - AIE.flow(%t13, Core : 1, %t31, Core : 1) + aie.flow(%t03, Core : 0, %t02, Core : 1) + aie.flow(%t13, Core : 1, %t31, Core : 1) } } diff --git a/test/create-flows/maxiter_err_test.mlir b/test/create-flows/maxiter_err_test.mlir index 74c9982998..57303f5d69 100644 --- a/test/create-flows/maxiter_err_test.mlir +++ b/test/create-flows/maxiter_err_test.mlir @@ -12,70 +12,70 @@ // CHECK: error: Unable to find a legal routing module { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) - %t21 = AIE.tile(2, 1) - %t31 = AIE.tile(3, 1) - %t41 = AIE.tile(4, 1) - %t51 = AIE.tile(5, 1) - %t61 = AIE.tile(6, 1) - %t71 = AIE.tile(7, 1) - %t81 = AIE.tile(8, 1) - %t02 = AIE.tile(0, 2) - %t12 = AIE.tile(1, 2) - %t22 = AIE.tile(2, 2) - %t32 = AIE.tile(3, 2) - %t42 = AIE.tile(4, 2) - %t52 = AIE.tile(5, 2) - %t62 = AIE.tile(6, 2) - %t72 = AIE.tile(7, 2) - %t82 = AIE.tile(8, 2) - %t03 = AIE.tile(0, 3) - %t13 = AIE.tile(1, 3) - %t23 = AIE.tile(2, 3) - %t33 = AIE.tile(3, 3) - %t43 = AIE.tile(4, 3) - %t53 = AIE.tile(5, 3) - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t83 = AIE.tile(8, 3) - %t04 = AIE.tile(0, 4) - %t14 = AIE.tile(1, 4) - %t24 = AIE.tile(2, 4) - %t34 = AIE.tile(3, 4) - %t44 = AIE.tile(4, 4) - %t54 = AIE.tile(5, 4) - %t64 = AIE.tile(6, 4) - %t74 = AIE.tile(7, 4) - %t84 = AIE.tile(8, 4) - %t20 = AIE.tile(2, 0) - %t60 = AIE.tile(6, 0) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) + %t21 = aie.tile(2, 1) + %t31 = aie.tile(3, 1) + %t41 = aie.tile(4, 1) + %t51 = aie.tile(5, 1) + %t61 = aie.tile(6, 1) + %t71 = aie.tile(7, 1) + %t81 = aie.tile(8, 1) + %t02 = aie.tile(0, 2) + %t12 = aie.tile(1, 2) + %t22 = aie.tile(2, 2) + %t32 = aie.tile(3, 2) + %t42 = aie.tile(4, 2) + %t52 = aie.tile(5, 2) + %t62 = aie.tile(6, 2) + %t72 = aie.tile(7, 2) + %t82 = aie.tile(8, 2) + %t03 = aie.tile(0, 3) + %t13 = aie.tile(1, 3) + %t23 = aie.tile(2, 3) + %t33 = aie.tile(3, 3) + %t43 = aie.tile(4, 3) + %t53 = aie.tile(5, 3) + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t83 = aie.tile(8, 3) + %t04 = aie.tile(0, 4) + %t14 = aie.tile(1, 4) + %t24 = aie.tile(2, 4) + %t34 = aie.tile(3, 4) + %t44 = aie.tile(4, 4) + %t54 = aie.tile(5, 4) + %t64 = aie.tile(6, 4) + %t74 = aie.tile(7, 4) + %t84 = aie.tile(8, 4) + %t20 = aie.tile(2, 0) + %t60 = aie.tile(6, 0) - AIE.flow(%t01, DMA : 0, %t51, DMA : 0) - AIE.flow(%t11, DMA : 0, %t61, DMA : 0) - AIE.flow(%t21, DMA : 0, %t71, DMA : 0) - AIE.flow(%t31, DMA : 0, %t81, DMA : 0) - AIE.flow(%t41, DMA : 0, %t81, DMA : 1) + aie.flow(%t01, DMA : 0, %t51, DMA : 0) + aie.flow(%t11, DMA : 0, %t61, DMA : 0) + aie.flow(%t21, DMA : 0, %t71, DMA : 0) + aie.flow(%t31, DMA : 0, %t81, DMA : 0) + aie.flow(%t41, DMA : 0, %t81, DMA : 1) - AIE.flow(%t02, DMA : 0, %t52, DMA : 0) - AIE.flow(%t12, DMA : 0, %t62, DMA : 0) - AIE.flow(%t22, DMA : 0, %t72, DMA : 0) - AIE.flow(%t32, DMA : 0, %t82, DMA : 0) - AIE.flow(%t42, DMA : 0, %t82, DMA : 1) + aie.flow(%t02, DMA : 0, %t52, DMA : 0) + aie.flow(%t12, DMA : 0, %t62, DMA : 0) + aie.flow(%t22, DMA : 0, %t72, DMA : 0) + aie.flow(%t32, DMA : 0, %t82, DMA : 0) + aie.flow(%t42, DMA : 0, %t82, DMA : 1) - AIE.flow(%t03, DMA : 0, %t53, DMA : 0) - AIE.flow(%t13, DMA : 0, %t63, DMA : 0) - AIE.flow(%t23, DMA : 0, %t73, DMA : 0) - AIE.flow(%t33, DMA : 0, %t83, DMA : 0) - AIE.flow(%t43, DMA : 0, %t83, DMA : 1) + aie.flow(%t03, DMA : 0, %t53, DMA : 0) + aie.flow(%t13, DMA : 0, %t63, DMA : 0) + aie.flow(%t23, DMA : 0, %t73, DMA : 0) + aie.flow(%t33, DMA : 0, %t83, DMA : 0) + aie.flow(%t43, DMA : 0, %t83, DMA : 1) - AIE.flow(%t04, DMA : 0, %t54, DMA : 0) - AIE.flow(%t14, DMA : 0, %t64, DMA : 0) - AIE.flow(%t24, DMA : 0, %t74, DMA : 0) - AIE.flow(%t34, DMA : 0, %t84, DMA : 0) - AIE.flow(%t44, DMA : 0, %t84, DMA : 1) + aie.flow(%t04, DMA : 0, %t54, DMA : 0) + aie.flow(%t14, DMA : 0, %t64, DMA : 0) + aie.flow(%t24, DMA : 0, %t74, DMA : 0) + aie.flow(%t34, DMA : 0, %t84, DMA : 0) + aie.flow(%t44, DMA : 0, %t84, DMA : 1) - AIE.flow(%t20, DMA : 0, %t60, DMA : 0) + aie.flow(%t20, DMA : 0, %t60, DMA : 0) } } diff --git a/test/create-flows/memtile.mlir b/test/create-flows/memtile.mlir index 94a165606e..b26398cbad 100644 --- a/test/create-flows/memtile.mlir +++ b/test/create-flows/memtile.mlir @@ -9,45 +9,45 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T04:.*]] = AIE.tile(0, 4) -// CHECK: %[[T03:.*]] = AIE.tile(0, 3) -// CHECK: %[[T02:.*]] = AIE.tile(0, 2) -// CHECK: %[[T01:.*]] = AIE.tile(0, 1) +// CHECK: %[[T04:.*]] = aie.tile(0, 4) +// CHECK: %[[T03:.*]] = aie.tile(0, 3) +// CHECK: %[[T02:.*]] = aie.tile(0, 2) +// CHECK: %[[T01:.*]] = aie.tile(0, 1) // -// CHECK: AIE.flow(%[[T04]], DMA : 0, %[[T02]], DMA : 4) -// CHECK: AIE.flow(%[[T04]], DMA : 1, %[[T02]], DMA : 5) -// CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T02]], DMA : 2) -// CHECK: AIE.flow(%[[T03]], DMA : 1, %[[T02]], DMA : 3) -// CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T01]], DMA : 0) -// CHECK: AIE.flow(%[[T02]], DMA : 1, %[[T01]], DMA : 1) -// CHECK: AIE.flow(%[[T02]], DMA : 2, %[[T03]], DMA : 0) -// CHECK: AIE.flow(%[[T02]], DMA : 3, %[[T03]], DMA : 1) -// CHECK: AIE.flow(%[[T02]], DMA : 4, %[[T04]], DMA : 0) -// CHECK: AIE.flow(%[[T02]], DMA : 5, %[[T04]], DMA : 1) -// CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T02]], DMA : 0) -// CHECK: AIE.flow(%[[T01]], DMA : 1, %[[T02]], DMA : 1) +// CHECK: aie.flow(%[[T04]], DMA : 0, %[[T02]], DMA : 4) +// CHECK: aie.flow(%[[T04]], DMA : 1, %[[T02]], DMA : 5) +// CHECK: aie.flow(%[[T03]], DMA : 0, %[[T02]], DMA : 2) +// CHECK: aie.flow(%[[T03]], DMA : 1, %[[T02]], DMA : 3) +// CHECK: aie.flow(%[[T02]], DMA : 0, %[[T01]], DMA : 0) +// CHECK: aie.flow(%[[T02]], DMA : 1, %[[T01]], DMA : 1) +// CHECK: aie.flow(%[[T02]], DMA : 2, %[[T03]], DMA : 0) +// CHECK: aie.flow(%[[T02]], DMA : 3, %[[T03]], DMA : 1) +// CHECK: aie.flow(%[[T02]], DMA : 4, %[[T04]], DMA : 0) +// CHECK: aie.flow(%[[T02]], DMA : 5, %[[T04]], DMA : 1) +// CHECK: aie.flow(%[[T01]], DMA : 0, %[[T02]], DMA : 0) +// CHECK: aie.flow(%[[T01]], DMA : 1, %[[T02]], DMA : 1) module { - AIE.device(xcve2802) { - %t04 = AIE.tile(0, 4) - %t03 = AIE.tile(0, 3) - %t02 = AIE.tile(0, 2) - %t01 = AIE.tile(0, 1) + aie.device(xcve2802) { + %t04 = aie.tile(0, 4) + %t03 = aie.tile(0, 3) + %t02 = aie.tile(0, 2) + %t01 = aie.tile(0, 1) - AIE.flow(%t01, DMA : 0, %t02, DMA : 0) - AIE.flow(%t01, DMA : 1, %t02, DMA : 1) - AIE.flow(%t02, DMA : 0, %t01, DMA : 0) - AIE.flow(%t02, DMA : 1, %t01, DMA : 1) + aie.flow(%t01, DMA : 0, %t02, DMA : 0) + aie.flow(%t01, DMA : 1, %t02, DMA : 1) + aie.flow(%t02, DMA : 0, %t01, DMA : 0) + aie.flow(%t02, DMA : 1, %t01, DMA : 1) - AIE.flow(%t02, DMA : 2, %t03, DMA : 0) - AIE.flow(%t02, DMA : 3, %t03, DMA : 1) - AIE.flow(%t03, DMA : 0, %t02, DMA : 2) - AIE.flow(%t03, DMA : 1, %t02, DMA : 3) + aie.flow(%t02, DMA : 2, %t03, DMA : 0) + aie.flow(%t02, DMA : 3, %t03, DMA : 1) + aie.flow(%t03, DMA : 0, %t02, DMA : 2) + aie.flow(%t03, DMA : 1, %t02, DMA : 3) - AIE.flow(%t02, DMA : 4, %t04, DMA : 0) - AIE.flow(%t02, DMA : 5, %t04, DMA : 1) - AIE.flow(%t04, DMA : 0, %t02, DMA : 4) - AIE.flow(%t04, DMA : 1, %t02, DMA : 5) + aie.flow(%t02, DMA : 4, %t04, DMA : 0) + aie.flow(%t02, DMA : 5, %t04, DMA : 1) + aie.flow(%t04, DMA : 0, %t02, DMA : 4) + aie.flow(%t04, DMA : 1, %t02, DMA : 5) } } diff --git a/test/create-flows/memtile_routing_constraints.mlir b/test/create-flows/memtile_routing_constraints.mlir index a42fd885f1..9806089ff2 100644 --- a/test/create-flows/memtile_routing_constraints.mlir +++ b/test/create-flows/memtile_routing_constraints.mlir @@ -10,35 +10,35 @@ // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T24:.*]] = AIE.tile(2, 4) -// CHECK: %[[T23:.*]] = AIE.tile(2, 3) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: %[[T21:.*]] = AIE.tile(2, 1) -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: AIE.switchbox(%[[T21]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[T24:.*]] = aie.tile(2, 4) +// CHECK: %[[T23:.*]] = aie.tile(2, 3) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: %[[T21:.*]] = aie.tile(2, 1) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: aie.switchbox(%[[T21]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.switchbox(%[[T22]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: aie.switchbox(%[[T22]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.switchbox(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: aie.switchbox(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.switchbox(%[[T23]]) { -// CHECK: AIE.connect +// CHECK: aie.switchbox(%[[T23]]) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcve2802) { - %t04 = AIE.tile(2, 4) - %t03 = AIE.tile(2, 3) - %t02 = AIE.tile(2, 2) - %t01 = AIE.tile(2, 1) - %t00 = AIE.tile(2, 0) + aie.device(xcve2802) { + %t04 = aie.tile(2, 4) + %t03 = aie.tile(2, 3) + %t02 = aie.tile(2, 2) + %t01 = aie.tile(2, 1) + %t00 = aie.tile(2, 0) - AIE.flow(%t02, DMA : 0, %t01, DMA : 0) - AIE.flow(%t03, DMA : 0, %t00, DMA : 0) + aie.flow(%t02, DMA : 0, %t01, DMA : 0) + aie.flow(%t03, DMA : 0, %t00, DMA : 0) } } diff --git a/test/create-flows/mmult.mlir b/test/create-flows/mmult.mlir index aa53e6bd5e..e74232077b 100644 --- a/test/create-flows/mmult.mlir +++ b/test/create-flows/mmult.mlir @@ -10,253 +10,253 @@ // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T1:.*]] = AIE.tile(7, 0) -// CHECK: %[[T3:.*]] = AIE.tile(8, 3) -// CHECK: %[[T15:.*]] = AIE.tile(6, 0) -// CHECK: %[[T17:.*]] = AIE.tile(7, 3) -// CHECK: %[[T29:.*]] = AIE.tile(3, 0) -// CHECK: %[[T31:.*]] = AIE.tile(8, 2) -// CHECK: %[[T43:.*]] = AIE.tile(2, 0) -// CHECK: %[[T45:.*]] = AIE.tile(7, 2) +// CHECK: %[[T1:.*]] = aie.tile(7, 0) +// CHECK: %[[T3:.*]] = aie.tile(8, 3) +// CHECK: %[[T15:.*]] = aie.tile(6, 0) +// CHECK: %[[T17:.*]] = aie.tile(7, 3) +// CHECK: %[[T29:.*]] = aie.tile(3, 0) +// CHECK: %[[T31:.*]] = aie.tile(8, 2) +// CHECK: %[[T43:.*]] = aie.tile(2, 0) +// CHECK: %[[T45:.*]] = aie.tile(7, 2) // -// CHECK: AIE.flow(%[[T1]], DMA : 0, %[[T3]], DMA : 0) -// CHECK: AIE.flow(%[[T1]], DMA : 1, %[[T3]], DMA : 1) -// CHECK: AIE.flow(%[[T3]], DMA : 0, %[[T29]], DMA : 1) -// CHECK: AIE.flow(%[[T15]], DMA : 0, %[[T17]], DMA : 0) -// CHECK: AIE.flow(%[[T15]], DMA : 1, %[[T17]], DMA : 1) -// CHECK: AIE.flow(%[[T17]], DMA : 0, %[[T29]], DMA : 0) -// CHECK: AIE.flow(%[[T29]], DMA : 0, %[[T31]], DMA : 0) -// CHECK: AIE.flow(%[[T29]], DMA : 1, %[[T31]], DMA : 1) -// CHECK: AIE.flow(%[[T31]], DMA : 0, %[[T43]], DMA : 1) -// CHECK: AIE.flow(%[[T43]], DMA : 0, %[[T45]], DMA : 0) -// CHECK: AIE.flow(%[[T43]], DMA : 1, %[[T45]], DMA : 1) -// CHECK: AIE.flow(%[[T45]], DMA : 0, %[[T43]], DMA : 0) +// CHECK: aie.flow(%[[T1]], DMA : 0, %[[T3]], DMA : 0) +// CHECK: aie.flow(%[[T1]], DMA : 1, %[[T3]], DMA : 1) +// CHECK: aie.flow(%[[T3]], DMA : 0, %[[T29]], DMA : 1) +// CHECK: aie.flow(%[[T15]], DMA : 0, %[[T17]], DMA : 0) +// CHECK: aie.flow(%[[T15]], DMA : 1, %[[T17]], DMA : 1) +// CHECK: aie.flow(%[[T17]], DMA : 0, %[[T29]], DMA : 0) +// CHECK: aie.flow(%[[T29]], DMA : 0, %[[T31]], DMA : 0) +// CHECK: aie.flow(%[[T29]], DMA : 1, %[[T31]], DMA : 1) +// CHECK: aie.flow(%[[T31]], DMA : 0, %[[T43]], DMA : 1) +// CHECK: aie.flow(%[[T43]], DMA : 0, %[[T45]], DMA : 0) +// CHECK: aie.flow(%[[T43]], DMA : 1, %[[T45]], DMA : 1) +// CHECK: aie.flow(%[[T45]], DMA : 0, %[[T43]], DMA : 0) module @aie.herd_0 { - AIE.device(xcvc1902) { - %0 = AIE.tile(7, 1) - %1 = AIE.tile(7, 0) - %2 = AIE.tile(1, 1) - %3 = AIE.tile(8, 3) - %4 = AIE.lock(%3, 1) - %5 = AIE.lock(%3, 3) - %6 = AIE.buffer(%3) {sym_name = "buf11"} : memref<16x16xf32, 2> - %7 = AIE.lock(%3, 2) - %8 = AIE.buffer(%3) {sym_name = "buf10"} : memref<16x16xf32, 2> - %9 = AIE.lock(%3, 0) - %10 = AIE.buffer(%3) {sym_name = "buf9"} : memref<16x16xf32, 2> - %11 = AIE.mem(%3) { - %63 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + aie.device(xcvc1902) { + %0 = aie.tile(7, 1) + %1 = aie.tile(7, 0) + %2 = aie.tile(1, 1) + %3 = aie.tile(8, 3) + %4 = aie.lock(%3, 1) + %5 = aie.lock(%3, 3) + %6 = aie.buffer(%3) {sym_name = "buf11"} : memref<16x16xf32, 2> + %7 = aie.lock(%3, 2) + %8 = aie.buffer(%3) {sym_name = "buf10"} : memref<16x16xf32, 2> + %9 = aie.lock(%3, 0) + %10 = aie.buffer(%3) {sym_name = "buf9"} : memref<16x16xf32, 2> + %11 = aie.mem(%3) { + %63 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%9, Acquire, 0) - AIE.dma_bd(%10 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%9, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%9, Acquire, 0) + aie.dma_bd(%10 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%9, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%4, Acquire, 0) - AIE.dma_bd(%6 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%4, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%4, Acquire, 0) + aie.dma_bd(%6 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%4, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %64 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %64 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%7, Acquire, 0) - AIE.dma_bd(%8 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%7, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%7, Acquire, 0) + aie.dma_bd(%8 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%7, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %65 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %65 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%5, Acquire, 1) - AIE.dma_bd(%6 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%5, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%5, Acquire, 1) + aie.dma_bd(%6 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%5, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %13 = AIE.tile(6, 2) - %14 = AIE.tile(6, 1) - %15 = AIE.tile(6, 0) - %16 = AIE.tile(0, 1) - %17 = AIE.tile(7, 3) - %18 = AIE.lock(%17, 1) - %19 = AIE.lock(%17, 3) - %20 = AIE.buffer(%17) {sym_name = "buf8"} : memref<16x16xf32, 2> - %21 = AIE.lock(%17, 2) - %22 = AIE.buffer(%17) {sym_name = "buf7"} : memref<16x16xf32, 2> - %23 = AIE.lock(%17, 0) - %24 = AIE.buffer(%17) {sym_name = "buf6"} : memref<16x16xf32, 2> - %25 = AIE.mem(%17) { - %63 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + %13 = aie.tile(6, 2) + %14 = aie.tile(6, 1) + %15 = aie.tile(6, 0) + %16 = aie.tile(0, 1) + %17 = aie.tile(7, 3) + %18 = aie.lock(%17, 1) + %19 = aie.lock(%17, 3) + %20 = aie.buffer(%17) {sym_name = "buf8"} : memref<16x16xf32, 2> + %21 = aie.lock(%17, 2) + %22 = aie.buffer(%17) {sym_name = "buf7"} : memref<16x16xf32, 2> + %23 = aie.lock(%17, 0) + %24 = aie.buffer(%17) {sym_name = "buf6"} : memref<16x16xf32, 2> + %25 = aie.mem(%17) { + %63 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%23, Acquire, 0) - AIE.dma_bd(%24 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%23, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%23, Acquire, 0) + aie.dma_bd(%24 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%23, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%18, Acquire, 0) - AIE.dma_bd(%20 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%18, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%18, Acquire, 0) + aie.dma_bd(%20 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%18, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %64 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %64 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%21, Acquire, 0) - AIE.dma_bd(%22 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%21, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%21, Acquire, 0) + aie.dma_bd(%22 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%21, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %65 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %65 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%19, Acquire, 1) - AIE.dma_bd(%20 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%19, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%19, Acquire, 1) + aie.dma_bd(%20 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%19, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %27 = AIE.tile(3, 2) - %28 = AIE.tile(3, 1) - %29 = AIE.tile(3, 0) - %30 = AIE.tile(1, 0) - %31 = AIE.tile(8, 2) - %32 = AIE.lock(%31, 1) - %33 = AIE.lock(%31, 3) - %34 = AIE.buffer(%31) {sym_name = "buf5"} : memref<16x16xf32, 2> - %35 = AIE.lock(%31, 2) - %36 = AIE.buffer(%31) {sym_name = "buf4"} : memref<16x16xf32, 2> - %37 = AIE.lock(%31, 0) - %38 = AIE.buffer(%31) {sym_name = "buf3"} : memref<16x16xf32, 2> - %39 = AIE.mem(%31) { - %63 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + %27 = aie.tile(3, 2) + %28 = aie.tile(3, 1) + %29 = aie.tile(3, 0) + %30 = aie.tile(1, 0) + %31 = aie.tile(8, 2) + %32 = aie.lock(%31, 1) + %33 = aie.lock(%31, 3) + %34 = aie.buffer(%31) {sym_name = "buf5"} : memref<16x16xf32, 2> + %35 = aie.lock(%31, 2) + %36 = aie.buffer(%31) {sym_name = "buf4"} : memref<16x16xf32, 2> + %37 = aie.lock(%31, 0) + %38 = aie.buffer(%31) {sym_name = "buf3"} : memref<16x16xf32, 2> + %39 = aie.mem(%31) { + %63 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%37, Acquire, 0) - AIE.dma_bd(%38 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%37, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%37, Acquire, 0) + aie.dma_bd(%38 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%37, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%32, Acquire, 0) - AIE.dma_bd(%34 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%32, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%32, Acquire, 0) + aie.dma_bd(%34 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%32, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %64 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %64 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%35, Acquire, 0) - AIE.dma_bd(%36 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%35, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%35, Acquire, 0) + aie.dma_bd(%36 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%35, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %65 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %65 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%33, Acquire, 1) - AIE.dma_bd(%34 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%33, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%33, Acquire, 1) + aie.dma_bd(%34 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%33, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %41 = AIE.tile(2, 2) - %42 = AIE.tile(2, 1) - %43 = AIE.tile(2, 0) - %44 = AIE.tile(0, 0) - %45 = AIE.tile(7, 2) - %46 = AIE.lock(%45, 1) - %47 = AIE.lock(%45, 3) - %48 = AIE.buffer(%45) {sym_name = "buf2"} : memref<16x16xf32, 2> - %49 = AIE.lock(%45, 2) - %50 = AIE.buffer(%45) {sym_name = "buf1"} : memref<16x16xf32, 2> - %51 = AIE.lock(%45, 0) - %52 = AIE.buffer(%45) {sym_name = "buf0"} : memref<16x16xf32, 2> - %53 = AIE.mem(%45) { - %63 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + %41 = aie.tile(2, 2) + %42 = aie.tile(2, 1) + %43 = aie.tile(2, 0) + %44 = aie.tile(0, 0) + %45 = aie.tile(7, 2) + %46 = aie.lock(%45, 1) + %47 = aie.lock(%45, 3) + %48 = aie.buffer(%45) {sym_name = "buf2"} : memref<16x16xf32, 2> + %49 = aie.lock(%45, 2) + %50 = aie.buffer(%45) {sym_name = "buf1"} : memref<16x16xf32, 2> + %51 = aie.lock(%45, 0) + %52 = aie.buffer(%45) {sym_name = "buf0"} : memref<16x16xf32, 2> + %53 = aie.mem(%45) { + %63 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%51, Acquire, 0) - AIE.dma_bd(%52 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%51, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%51, Acquire, 0) + aie.dma_bd(%52 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%51, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%46, Acquire, 0) - AIE.dma_bd(%48 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%46, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%46, Acquire, 0) + aie.dma_bd(%48 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%46, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %64 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %64 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%49, Acquire, 0) - AIE.dma_bd(%50 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%49, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%49, Acquire, 0) + aie.dma_bd(%50 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%49, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %65 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %65 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%47, Acquire, 1) - AIE.dma_bd(%48 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%47, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%47, Acquire, 1) + aie.dma_bd(%48 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%47, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %55 = AIE.switchbox(%43) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %55 = aie.switchbox(%43) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%42, South : 0, %45, DMA : 0) - AIE.flow(%42, South : 1, %45, DMA : 1) - AIE.flow(%45, DMA : 0, %42, South : 0) - %56 = AIE.switchbox(%29) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%42, South : 0, %45, DMA : 0) + aie.flow(%42, South : 1, %45, DMA : 1) + aie.flow(%45, DMA : 0, %42, South : 0) + %56 = aie.switchbox(%29) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%28, South : 0, %31, DMA : 0) - AIE.flow(%28, South : 1, %31, DMA : 1) - AIE.flow(%31, DMA : 0, %42, South : 1) - %57 = AIE.switchbox(%15) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%28, South : 0, %31, DMA : 0) + aie.flow(%28, South : 1, %31, DMA : 1) + aie.flow(%31, DMA : 0, %42, South : 1) + %57 = aie.switchbox(%15) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%14, South : 0, %17, DMA : 0) - AIE.flow(%14, South : 1, %17, DMA : 1) - AIE.flow(%17, DMA : 0, %28, South : 0) - %58 = AIE.switchbox(%1) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%14, South : 0, %17, DMA : 0) + aie.flow(%14, South : 1, %17, DMA : 1) + aie.flow(%17, DMA : 0, %28, South : 0) + %58 = aie.switchbox(%1) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%0, South : 0, %3, DMA : 0) - AIE.flow(%0, South : 1, %3, DMA : 1) - AIE.flow(%3, DMA : 0, %28, South : 1) - %59 = AIE.shim_mux(%43) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%0, South : 0, %3, DMA : 0) + aie.flow(%0, South : 1, %3, DMA : 1) + aie.flow(%3, DMA : 0, %28, South : 1) + %59 = aie.shim_mux(%43) { + aie.connect + aie.connect + aie.connect + aie.connect } - %60 = AIE.shim_mux(%29) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %60 = aie.shim_mux(%29) { + aie.connect + aie.connect + aie.connect + aie.connect } - %61 = AIE.shim_mux(%15) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %61 = aie.shim_mux(%15) { + aie.connect + aie.connect + aie.connect + aie.connect } - %62 = AIE.shim_mux(%1) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %62 = aie.shim_mux(%1) { + aie.connect + aie.connect + aie.connect + aie.connect } } } diff --git a/test/create-flows/more_flows_shim.mlir b/test/create-flows/more_flows_shim.mlir index 78e484872a..3e25b09a70 100644 --- a/test/create-flows/more_flows_shim.mlir +++ b/test/create-flows/more_flows_shim.mlir @@ -15,99 +15,99 @@ // RUN: aie-opt --split-input-file --aie-create-pathfinder-flows -split-input-file %s | FileCheck %s // CHECK-LABEL: test70 -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T71:.*]] = AIE.tile(7, 1) -// CHECK: %[[SB70:.*]] = AIE.switchbox(%[[T70]]) { -// CHECK: AIE.connect +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T71:.*]] = aie.tile(7, 1) +// CHECK: %[[SB70:.*]] = aie.switchbox(%[[T70]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SH70:.*]] = AIE.shim_mux(%[[T70]]) { -// CHECK: AIE.connect +// CHECK: %[[SH70:.*]] = aie.shim_mux(%[[T70]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB71:.*]] = AIE.switchbox(%[[T71]]) { -// CHECK: AIE.connect +// CHECK: %[[SB71:.*]] = aie.switchbox(%[[T71]]) { +// CHECK: aie.connect // CHECK: } // Tile 7,0 is a shim NoC tile that has a ShimMux. // The ShimMux must be configured for streams to PLIO 2,3,4,5 module @test70 { - AIE.device(xcvc1902) { - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - AIE.flow(%t71, North : 0, %t70, PLIO : 2) + aie.device(xcvc1902) { + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + aie.flow(%t71, North : 0, %t70, PLIO : 2) } } // ----- // CHECK-LABEL: test60 -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T61:.*]] = AIE.tile(6, 1) -// CHECK: %[[SB60:.*]] = AIE.switchbox(%[[T60]]) { -// CHECK: AIE.connect +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T61:.*]] = aie.tile(6, 1) +// CHECK: %[[SB60:.*]] = aie.switchbox(%[[T60]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SH60:.*]] = AIE.shim_mux(%[[T60]]) { -// CHECK: AIE.connect +// CHECK: %[[SH60:.*]] = aie.shim_mux(%[[T60]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB61:.*]] = AIE.switchbox(%[[T61]]) { -// CHECK: AIE.connect +// CHECK: %[[SB61:.*]] = aie.switchbox(%[[T61]]) { +// CHECK: aie.connect // CHECK: } // Tile 6,0 is a shim NoC tile that has a ShimMux. // The ShimMux must be configured for streams from PLIO 2,3,6,7 module @test60 { - AIE.device(xcvc1902) { - %t60 = AIE.tile(6, 0) - %t61 = AIE.tile(6, 1) - AIE.flow(%t60, PLIO : 6, %t61, DMA : 1) + aie.device(xcvc1902) { + %t60 = aie.tile(6, 0) + %t61 = aie.tile(6, 1) + aie.flow(%t60, PLIO : 6, %t61, DMA : 1) } } // ----- // CHECK-LABEL: test40 -// CHECK: %[[T40:.*]] = AIE.tile(4, 0) -// CHECK: %[[T41:.*]] = AIE.tile(4, 1) -// CHECK: %[[SB40:.*]] = AIE.switchbox(%[[T40]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[T40:.*]] = aie.tile(4, 0) +// CHECK: %[[T41:.*]] = aie.tile(4, 1) +// CHECK: %[[SB40:.*]] = aie.switchbox(%[[T40]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB41:.*]] = AIE.switchbox(%[[T41]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[SB41:.*]] = aie.switchbox(%[[T41]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } // Tile 4,0 is a shim PL tile and does not contain a ShimMux. module @test40 { - AIE.device(xcvc1902) { - %t40 = AIE.tile(4, 0) - %t41 = AIE.tile(4, 1) - AIE.flow(%t41, North : 0, %t40, PLIO : 3) - AIE.flow(%t40, PLIO : 4, %t41, North : 0) + aie.device(xcvc1902) { + %t40 = aie.tile(4, 0) + %t41 = aie.tile(4, 1) + aie.flow(%t41, North : 0, %t40, PLIO : 3) + aie.flow(%t40, PLIO : 4, %t41, North : 0) } } // ----- // CHECK-LABEL: test100 -// CHECK: %[[T100:.*]] = AIE.tile(10, 0) -// CHECK: %[[T101:.*]] = AIE.tile(10, 1) -// CHECK: %[[SB100:.*]] = AIE.switchbox(%[[T100]]) { -// CHECK: AIE.connect +// CHECK: %[[T100:.*]] = aie.tile(10, 0) +// CHECK: %[[T101:.*]] = aie.tile(10, 1) +// CHECK: %[[SB100:.*]] = aie.switchbox(%[[T100]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SH100:.*]] = AIE.shim_mux(%[[T100]]) { -// CHECK: AIE.connect +// CHECK: %[[SH100:.*]] = aie.shim_mux(%[[T100]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB101:.*]] = AIE.switchbox(%[[T101]]) { -// CHECK: AIE.connect +// CHECK: %[[SB101:.*]] = aie.switchbox(%[[T101]]) { +// CHECK: aie.connect // CHECK: } // Tile 10,0 is a shim NoC tile that has a ShimMux. // The ShimMux must be configured for streams to NOC 0,1,2,3 module @test100 { - AIE.device(xcvc1902) { - %t100 = AIE.tile(10, 0) - %t101 = AIE.tile(10, 1) - AIE.flow(%t101, North : 0, %t100, NOC : 2) + aie.device(xcvc1902) { + %t100 = aie.tile(10, 0) + %t101 = aie.tile(10, 1) + aie.flow(%t101, North : 0, %t100, NOC : 2) } } diff --git a/test/create-flows/over_flows.mlir b/test/create-flows/over_flows.mlir index 95fb789c17..465c50858f 100644 --- a/test/create-flows/over_flows.mlir +++ b/test/create-flows/over_flows.mlir @@ -9,63 +9,63 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T03:.*]] = AIE.tile(0, 3) -// CHECK: %[[T02:.*]] = AIE.tile(0, 2) -// CHECK: %[[T00:.*]] = AIE.tile(0, 0) -// CHECK: %[[T13:.*]] = AIE.tile(1, 3) -// CHECK: %[[T11:.*]] = AIE.tile(1, 1) -// CHECK: %[[T10:.*]] = AIE.tile(1, 0) -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: %[[T31:.*]] = AIE.tile(3, 1) -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T71:.*]] = AIE.tile(7, 1) -// CHECK: %[[T72:.*]] = AIE.tile(7, 2) -// CHECK: %[[T73:.*]] = AIE.tile(7, 3) -// CHECK: %[[T80:.*]] = AIE.tile(8, 0) -// CHECK: %[[T82:.*]] = AIE.tile(8, 2) -// CHECK: %[[T83:.*]] = AIE.tile(8, 3) +// CHECK: %[[T03:.*]] = aie.tile(0, 3) +// CHECK: %[[T02:.*]] = aie.tile(0, 2) +// CHECK: %[[T00:.*]] = aie.tile(0, 0) +// CHECK: %[[T13:.*]] = aie.tile(1, 3) +// CHECK: %[[T11:.*]] = aie.tile(1, 1) +// CHECK: %[[T10:.*]] = aie.tile(1, 0) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: %[[T31:.*]] = aie.tile(3, 1) +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T71:.*]] = aie.tile(7, 1) +// CHECK: %[[T72:.*]] = aie.tile(7, 2) +// CHECK: %[[T73:.*]] = aie.tile(7, 3) +// CHECK: %[[T80:.*]] = aie.tile(8, 0) +// CHECK: %[[T82:.*]] = aie.tile(8, 2) +// CHECK: %[[T83:.*]] = aie.tile(8, 3) // -// CHECK: AIE.flow(%[[T71]], DMA : 0, %[[T20]], DMA : 0) -// CHECK: AIE.flow(%[[T71]], DMA : 1, %[[T20]], DMA : 1) -// CHECK: AIE.flow(%[[T72]], DMA : 0, %[[T60]], DMA : 0) -// CHECK: AIE.flow(%[[T72]], DMA : 1, %[[T60]], DMA : 1) -// CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T70]], DMA : 0) -// CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 1) -// CHECK: AIE.flow(%[[T83]], DMA : 0, %[[T30]], DMA : 0) -// CHECK: AIE.flow(%[[T83]], DMA : 1, %[[T30]], DMA : 1) +// CHECK: aie.flow(%[[T71]], DMA : 0, %[[T20]], DMA : 0) +// CHECK: aie.flow(%[[T71]], DMA : 1, %[[T20]], DMA : 1) +// CHECK: aie.flow(%[[T72]], DMA : 0, %[[T60]], DMA : 0) +// CHECK: aie.flow(%[[T72]], DMA : 1, %[[T60]], DMA : 1) +// CHECK: aie.flow(%[[T73]], DMA : 0, %[[T70]], DMA : 0) +// CHECK: aie.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 1) +// CHECK: aie.flow(%[[T83]], DMA : 0, %[[T30]], DMA : 0) +// CHECK: aie.flow(%[[T83]], DMA : 1, %[[T30]], DMA : 1) module { - AIE.device(xcvc1902) { - %t03 = AIE.tile(0, 3) - %t02 = AIE.tile(0, 2) - %t00 = AIE.tile(0, 0) - %t13 = AIE.tile(1, 3) - %t11 = AIE.tile(1, 1) - %t10 = AIE.tile(1, 0) - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t22 = AIE.tile(2, 2) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t80 = AIE.tile(8, 0) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) + aie.device(xcvc1902) { + %t03 = aie.tile(0, 3) + %t02 = aie.tile(0, 2) + %t00 = aie.tile(0, 0) + %t13 = aie.tile(1, 3) + %t11 = aie.tile(1, 1) + %t10 = aie.tile(1, 0) + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t22 = aie.tile(2, 2) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t80 = aie.tile(8, 0) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) - AIE.flow(%t71, DMA : 0, %t20, DMA : 0) - AIE.flow(%t71, DMA : 1, %t20, DMA : 1) - AIE.flow(%t72, DMA : 0, %t60, DMA : 0) - AIE.flow(%t72, DMA : 1, %t60, DMA : 1) - AIE.flow(%t73, DMA : 0, %t70, DMA : 0) - AIE.flow(%t73, DMA : 1, %t70, DMA : 1) - AIE.flow(%t83, DMA : 0, %t30, DMA : 0) - AIE.flow(%t83, DMA : 1, %t30, DMA : 1) + aie.flow(%t71, DMA : 0, %t20, DMA : 0) + aie.flow(%t71, DMA : 1, %t20, DMA : 1) + aie.flow(%t72, DMA : 0, %t60, DMA : 0) + aie.flow(%t72, DMA : 1, %t60, DMA : 1) + aie.flow(%t73, DMA : 0, %t70, DMA : 0) + aie.flow(%t73, DMA : 1, %t70, DMA : 1) + aie.flow(%t83, DMA : 0, %t30, DMA : 0) + aie.flow(%t83, DMA : 1, %t30, DMA : 1) } } diff --git a/test/create-flows/routed_herd_3x1.mlir b/test/create-flows/routed_herd_3x1.mlir index 7c34a5720a..23e4ea57d3 100644 --- a/test/create-flows/routed_herd_3x1.mlir +++ b/test/create-flows/routed_herd_3x1.mlir @@ -9,264 +9,264 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T100:.*]] = AIE.tile(10, 0) -// CHECK: %[[T110:.*]] = AIE.tile(11, 0) -// CHECK: %[[T180:.*]] = AIE.tile(18, 0) -// CHECK: %[[T190:.*]] = AIE.tile(19, 0) -// CHECK: %[[T03:.*]] = AIE.tile(0, 3) -// CHECK: %[[T14:.*]] = AIE.tile(1, 4) -// CHECK: %[[T33:.*]] = AIE.tile(3, 3) -// CHECK: %[[T42:.*]] = AIE.tile(4, 2) -// CHECK: %[[T53:.*]] = AIE.tile(5, 3) -// CHECK: %[[T63:.*]] = AIE.tile(6, 3) -// CHECK: %[[T74:.*]] = AIE.tile(7, 4) -// CHECK: %[[T92:.*]] = AIE.tile(9, 2) -// CHECK: %[[T102:.*]] = AIE.tile(10, 2) -// CHECK: %[[T113:.*]] = AIE.tile(11, 3) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T100:.*]] = aie.tile(10, 0) +// CHECK: %[[T110:.*]] = aie.tile(11, 0) +// CHECK: %[[T180:.*]] = aie.tile(18, 0) +// CHECK: %[[T190:.*]] = aie.tile(19, 0) +// CHECK: %[[T03:.*]] = aie.tile(0, 3) +// CHECK: %[[T14:.*]] = aie.tile(1, 4) +// CHECK: %[[T33:.*]] = aie.tile(3, 3) +// CHECK: %[[T42:.*]] = aie.tile(4, 2) +// CHECK: %[[T53:.*]] = aie.tile(5, 3) +// CHECK: %[[T63:.*]] = aie.tile(6, 3) +// CHECK: %[[T74:.*]] = aie.tile(7, 4) +// CHECK: %[[T92:.*]] = aie.tile(9, 2) +// CHECK: %[[T102:.*]] = aie.tile(10, 2) +// CHECK: %[[T113:.*]] = aie.tile(11, 3) // -// CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T14]], DMA : 0) -// CHECK: AIE.flow(%[[T20]], DMA : 1, %[[T63]], DMA : 1) -// CHECK: AIE.flow(%[[T30]], DMA : 0, %[[T33]], DMA : 0) -// CHECK: AIE.flow(%[[T30]], DMA : 1, %[[T74]], DMA : 1) -// CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T03]], DMA : 0) -// CHECK: AIE.flow(%[[T60]], DMA : 1, %[[T42]], DMA : 0) -// CHECK: AIE.flow(%[[T70]], DMA : 0, %[[T03]], DMA : 1) -// CHECK: AIE.flow(%[[T70]], DMA : 1, %[[T53]], DMA : 0) -// CHECK: AIE.flow(%[[T100]], DMA : 0, %[[T102]], DMA : 0) -// CHECK: AIE.flow(%[[T110]], DMA : 0, %[[T113]], DMA : 0) -// CHECK: AIE.flow(%[[T180]], DMA : 0, %[[T63]], DMA : 0) -// CHECK: AIE.flow(%[[T180]], DMA : 1, %[[T92]], DMA : 0) -// CHECK: AIE.flow(%[[T190]], DMA : 0, %[[T74]], DMA : 0) -// CHECK: AIE.flow(%[[T190]], DMA : 1, %[[T113]], DMA : 1) +// CHECK: aie.flow(%[[T20]], DMA : 0, %[[T14]], DMA : 0) +// CHECK: aie.flow(%[[T20]], DMA : 1, %[[T63]], DMA : 1) +// CHECK: aie.flow(%[[T30]], DMA : 0, %[[T33]], DMA : 0) +// CHECK: aie.flow(%[[T30]], DMA : 1, %[[T74]], DMA : 1) +// CHECK: aie.flow(%[[T60]], DMA : 0, %[[T03]], DMA : 0) +// CHECK: aie.flow(%[[T60]], DMA : 1, %[[T42]], DMA : 0) +// CHECK: aie.flow(%[[T70]], DMA : 0, %[[T03]], DMA : 1) +// CHECK: aie.flow(%[[T70]], DMA : 1, %[[T53]], DMA : 0) +// CHECK: aie.flow(%[[T100]], DMA : 0, %[[T102]], DMA : 0) +// CHECK: aie.flow(%[[T110]], DMA : 0, %[[T113]], DMA : 0) +// CHECK: aie.flow(%[[T180]], DMA : 0, %[[T63]], DMA : 0) +// CHECK: aie.flow(%[[T180]], DMA : 1, %[[T92]], DMA : 0) +// CHECK: aie.flow(%[[T190]], DMA : 0, %[[T74]], DMA : 0) +// CHECK: aie.flow(%[[T190]], DMA : 1, %[[T113]], DMA : 1) module { - AIE.device(xcvc1902) { - %t00 = AIE.tile(0, 0) - %t10 = AIE.tile(1, 0) - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t40 = AIE.tile(4, 0) - %t50 = AIE.tile(5, 0) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t80 = AIE.tile(8, 0) - %t90 = AIE.tile(9, 0) - %t100 = AIE.tile(10, 0) - %t110 = AIE.tile(11, 0) - %t180 = AIE.tile(18, 0) - %t190 = AIE.tile(19, 0) + aie.device(xcvc1902) { + %t00 = aie.tile(0, 0) + %t10 = aie.tile(1, 0) + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t40 = aie.tile(4, 0) + %t50 = aie.tile(5, 0) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t80 = aie.tile(8, 0) + %t90 = aie.tile(9, 0) + %t100 = aie.tile(10, 0) + %t110 = aie.tile(11, 0) + %t180 = aie.tile(18, 0) + %t190 = aie.tile(19, 0) - %t01 = AIE.tile(0, 1) - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t04 = AIE.tile(0, 4) - %t11 = AIE.tile(1, 1) - %t12 = AIE.tile(1, 2) - %t13 = AIE.tile(1, 3) - %t14 = AIE.tile(1, 4) - %t21 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 2) - %t23 = AIE.tile(2, 3) - %t24 = AIE.tile(2, 4) - %t31 = AIE.tile(3, 1) - %t32 = AIE.tile(3, 2) - %t33 = AIE.tile(3, 3) - %t34 = AIE.tile(3, 4) - %t41 = AIE.tile(4, 1) - %t42 = AIE.tile(4, 2) - %t43 = AIE.tile(4, 3) - %t44 = AIE.tile(4, 4) - %t51 = AIE.tile(5, 1) - %t52 = AIE.tile(5, 2) - %t53 = AIE.tile(5, 3) - %t54 = AIE.tile(5, 4) - %t61 = AIE.tile(6, 1) - %t62 = AIE.tile(6, 2) - %t63 = AIE.tile(6, 3) - %t64 = AIE.tile(6, 4) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - %t81 = AIE.tile(8, 1) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) - %t84 = AIE.tile(8, 4) - %t91 = AIE.tile(9, 1) - %t92 = AIE.tile(9, 2) - %t93 = AIE.tile(9, 3) - %t94 = AIE.tile(9, 4) - %t101 = AIE.tile(10, 1) - %t102 = AIE.tile(10, 2) - %t103 = AIE.tile(10, 3) - %t104 = AIE.tile(10, 4) - %t111 = AIE.tile(11, 1) - %t112 = AIE.tile(11, 2) - %t113 = AIE.tile(11, 3) - %t114 = AIE.tile(11, 4) - %t121 = AIE.tile(12, 1) - %t122 = AIE.tile(12, 2) - %t123 = AIE.tile(12, 3) - %t124 = AIE.tile(12, 4) + %t01 = aie.tile(0, 1) + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t04 = aie.tile(0, 4) + %t11 = aie.tile(1, 1) + %t12 = aie.tile(1, 2) + %t13 = aie.tile(1, 3) + %t14 = aie.tile(1, 4) + %t21 = aie.tile(2, 1) + %t22 = aie.tile(2, 2) + %t23 = aie.tile(2, 3) + %t24 = aie.tile(2, 4) + %t31 = aie.tile(3, 1) + %t32 = aie.tile(3, 2) + %t33 = aie.tile(3, 3) + %t34 = aie.tile(3, 4) + %t41 = aie.tile(4, 1) + %t42 = aie.tile(4, 2) + %t43 = aie.tile(4, 3) + %t44 = aie.tile(4, 4) + %t51 = aie.tile(5, 1) + %t52 = aie.tile(5, 2) + %t53 = aie.tile(5, 3) + %t54 = aie.tile(5, 4) + %t61 = aie.tile(6, 1) + %t62 = aie.tile(6, 2) + %t63 = aie.tile(6, 3) + %t64 = aie.tile(6, 4) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + %t81 = aie.tile(8, 1) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) + %t84 = aie.tile(8, 4) + %t91 = aie.tile(9, 1) + %t92 = aie.tile(9, 2) + %t93 = aie.tile(9, 3) + %t94 = aie.tile(9, 4) + %t101 = aie.tile(10, 1) + %t102 = aie.tile(10, 2) + %t103 = aie.tile(10, 3) + %t104 = aie.tile(10, 4) + %t111 = aie.tile(11, 1) + %t112 = aie.tile(11, 2) + %t113 = aie.tile(11, 3) + %t114 = aie.tile(11, 4) + %t121 = aie.tile(12, 1) + %t122 = aie.tile(12, 2) + %t123 = aie.tile(12, 3) + %t124 = aie.tile(12, 4) - %sb01 = AIE.switchbox(%t01) { - AIE.connect + %sb01 = aie.switchbox(%t01) { + aie.connect } - %sb02 = AIE.switchbox(%t02) { - AIE.connect + %sb02 = aie.switchbox(%t02) { + aie.connect } - %sb03 = AIE.switchbox(%t03) { - AIE.connect - AIE.connect + %sb03 = aie.switchbox(%t03) { + aie.connect + aie.connect } - %sb04 = AIE.switchbox(%t04) { + %sb04 = aie.switchbox(%t04) { } - %sb11 = AIE.switchbox(%t11) { - AIE.connect + %sb11 = aie.switchbox(%t11) { + aie.connect } - %sb12 = AIE.switchbox(%t12) { - AIE.connect + %sb12 = aie.switchbox(%t12) { + aie.connect } - %sb13 = AIE.switchbox(%t13) { - AIE.connect + %sb13 = aie.switchbox(%t13) { + aie.connect } - %sb14 = AIE.switchbox(%t14) { - AIE.connect + %sb14 = aie.switchbox(%t14) { + aie.connect } - %sb21 = AIE.switchbox(%t21) { - AIE.connect + %sb21 = aie.switchbox(%t21) { + aie.connect } - %sb22 = AIE.switchbox(%t22) { - AIE.connect + %sb22 = aie.switchbox(%t22) { + aie.connect } - %sb23 = AIE.switchbox(%t23) { - AIE.connect + %sb23 = aie.switchbox(%t23) { + aie.connect } - %sb24 = AIE.switchbox(%t24) { - AIE.connect + %sb24 = aie.switchbox(%t24) { + aie.connect } - %sb31 = AIE.switchbox(%t31) { - AIE.connect + %sb31 = aie.switchbox(%t31) { + aie.connect } - %sb32 = AIE.switchbox(%t32) { - AIE.connect + %sb32 = aie.switchbox(%t32) { + aie.connect } - %sb33 = AIE.switchbox(%t33) { - AIE.connect + %sb33 = aie.switchbox(%t33) { + aie.connect } - %sb34 = AIE.switchbox(%t34) { + %sb34 = aie.switchbox(%t34) { } - %sb41 = AIE.switchbox(%t41) { - AIE.connect + %sb41 = aie.switchbox(%t41) { + aie.connect } - %sb42 = AIE.switchbox(%t42) { - AIE.connect + %sb42 = aie.switchbox(%t42) { + aie.connect } - %sb43 = AIE.switchbox(%t43) { + %sb43 = aie.switchbox(%t43) { } - %sb44 = AIE.switchbox(%t44) { + %sb44 = aie.switchbox(%t44) { } - %sb51 = AIE.switchbox(%t51) { - AIE.connect + %sb51 = aie.switchbox(%t51) { + aie.connect } - %sb52 = AIE.switchbox(%t52) { - AIE.connect + %sb52 = aie.switchbox(%t52) { + aie.connect } - %sb53 = AIE.switchbox(%t53) { - AIE.connect + %sb53 = aie.switchbox(%t53) { + aie.connect } - %sb54 = AIE.switchbox(%t54) { + %sb54 = aie.switchbox(%t54) { } - %sb61 = AIE.switchbox(%t61) { - AIE.connect - AIE.connect + %sb61 = aie.switchbox(%t61) { + aie.connect + aie.connect } - %sb62 = AIE.switchbox(%t62) { - AIE.connect - AIE.connect + %sb62 = aie.switchbox(%t62) { + aie.connect + aie.connect } - %sb63 = AIE.switchbox(%t63) { - AIE.connect - AIE.connect + %sb63 = aie.switchbox(%t63) { + aie.connect + aie.connect } - %sb64 = AIE.switchbox(%t64) { + %sb64 = aie.switchbox(%t64) { } - %sb71 = AIE.switchbox(%t71) { - AIE.connect - AIE.connect + %sb71 = aie.switchbox(%t71) { + aie.connect + aie.connect } - %sb72 = AIE.switchbox(%t72) { - AIE.connect - AIE.connect + %sb72 = aie.switchbox(%t72) { + aie.connect + aie.connect } - %sb73 = AIE.switchbox(%t73) { - AIE.connect - AIE.connect + %sb73 = aie.switchbox(%t73) { + aie.connect + aie.connect } - %sb74 = AIE.switchbox(%t74) { - AIE.connect - AIE.connect + %sb74 = aie.switchbox(%t74) { + aie.connect + aie.connect } - %sb81 = AIE.switchbox(%t81) { + %sb81 = aie.switchbox(%t81) { } - %sb82 = AIE.switchbox(%t82) { + %sb82 = aie.switchbox(%t82) { } - %sb83 = AIE.switchbox(%t83) { + %sb83 = aie.switchbox(%t83) { } - %sb84 = AIE.switchbox(%t84) { + %sb84 = aie.switchbox(%t84) { } - %sb91 = AIE.switchbox(%t91) { - AIE.connect + %sb91 = aie.switchbox(%t91) { + aie.connect } - %sb92 = AIE.switchbox(%t92) { - AIE.connect + %sb92 = aie.switchbox(%t92) { + aie.connect } - %sb93 = AIE.switchbox(%t93) { + %sb93 = aie.switchbox(%t93) { } - %sb94 = AIE.switchbox(%t94) { + %sb94 = aie.switchbox(%t94) { } - %sb101 = AIE.switchbox(%t101) { - AIE.connect + %sb101 = aie.switchbox(%t101) { + aie.connect } - %sb102 = AIE.switchbox(%t102) { - AIE.connect + %sb102 = aie.switchbox(%t102) { + aie.connect } - %sb103 = AIE.switchbox(%t103) { + %sb103 = aie.switchbox(%t103) { } - %sb104 = AIE.switchbox(%t104) { + %sb104 = aie.switchbox(%t104) { } - %sb111 = AIE.switchbox(%t111) { - AIE.connect - AIE.connect + %sb111 = aie.switchbox(%t111) { + aie.connect + aie.connect } - %sb112 = AIE.switchbox(%t112) { - AIE.connect - AIE.connect + %sb112 = aie.switchbox(%t112) { + aie.connect + aie.connect } - %sb113 = AIE.switchbox(%t113) { - AIE.connect - AIE.connect + %sb113 = aie.switchbox(%t113) { + aie.connect + aie.connect } - %sb114 = AIE.switchbox(%t114) { + %sb114 = aie.switchbox(%t114) { } - AIE.flow(%t20, DMA : 0, %t20, North: 0) - AIE.flow(%t20, DMA : 1, %t60, North: 1) - AIE.flow(%t30, DMA : 0, %t30, North: 0) - AIE.flow(%t30, DMA : 1, %t70, North: 1) - AIE.flow(%t60, DMA : 0, %t00, North: 0) - AIE.flow(%t60, DMA : 1, %t40, North: 0) - AIE.flow(%t70, DMA : 0, %t10, North: 0) - AIE.flow(%t70, DMA : 1, %t50, North: 0) - AIE.flow(%t100, DMA : 0, %t100, North: 0) - AIE.flow(%t110, DMA : 0, %t110, North: 0) - AIE.flow(%t180, DMA : 0, %t60, North: 0) - AIE.flow(%t180, DMA : 1, %t90, North: 0) - AIE.flow(%t190, DMA : 0, %t70, North: 0) - AIE.flow(%t190, DMA : 1, %t110, North: 1) + aie.flow(%t20, DMA : 0, %t20, North: 0) + aie.flow(%t20, DMA : 1, %t60, North: 1) + aie.flow(%t30, DMA : 0, %t30, North: 0) + aie.flow(%t30, DMA : 1, %t70, North: 1) + aie.flow(%t60, DMA : 0, %t00, North: 0) + aie.flow(%t60, DMA : 1, %t40, North: 0) + aie.flow(%t70, DMA : 0, %t10, North: 0) + aie.flow(%t70, DMA : 1, %t50, North: 0) + aie.flow(%t100, DMA : 0, %t100, North: 0) + aie.flow(%t110, DMA : 0, %t110, North: 0) + aie.flow(%t180, DMA : 0, %t60, North: 0) + aie.flow(%t180, DMA : 1, %t90, North: 0) + aie.flow(%t190, DMA : 0, %t70, North: 0) + aie.flow(%t190, DMA : 1, %t110, North: 1) } } \ No newline at end of file diff --git a/test/create-flows/routed_herd_3x2.mlir b/test/create-flows/routed_herd_3x2.mlir index 1cfb08a2a5..33cf5ac6e8 100644 --- a/test/create-flows/routed_herd_3x2.mlir +++ b/test/create-flows/routed_herd_3x2.mlir @@ -9,340 +9,340 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T100:.*]] = AIE.tile(10, 0) -// CHECK: %[[T110:.*]] = AIE.tile(11, 0) -// CHECK: %[[T180:.*]] = AIE.tile(18, 0) -// CHECK: %[[T190:.*]] = AIE.tile(19, 0) -// CHECK: %[[T25:.*]] = AIE.tile(2, 5) -// CHECK: %[[T31:.*]] = AIE.tile(3, 1) -// CHECK: %[[T66:.*]] = AIE.tile(6, 6) -// CHECK: %[[T73:.*]] = AIE.tile(7, 3) -// CHECK: %[[T125:.*]] = AIE.tile(12, 5) -// CHECK: %[[T133:.*]] = AIE.tile(13, 3) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T100:.*]] = aie.tile(10, 0) +// CHECK: %[[T110:.*]] = aie.tile(11, 0) +// CHECK: %[[T180:.*]] = aie.tile(18, 0) +// CHECK: %[[T190:.*]] = aie.tile(19, 0) +// CHECK: %[[T25:.*]] = aie.tile(2, 5) +// CHECK: %[[T31:.*]] = aie.tile(3, 1) +// CHECK: %[[T66:.*]] = aie.tile(6, 6) +// CHECK: %[[T73:.*]] = aie.tile(7, 3) +// CHECK: %[[T125:.*]] = aie.tile(12, 5) +// CHECK: %[[T133:.*]] = aie.tile(13, 3) // -// CHECK: AIE.flow(%[[T30]], DMA : 0, %[[T31]], DMA : 0) -// CHECK: AIE.flow(%[[T100]], DMA : 0, %[[T73]], DMA : 0) -// CHECK: AIE.flow(%[[T110]], DMA : 0, %[[T133]], DMA : 0) +// CHECK: aie.flow(%[[T30]], DMA : 0, %[[T31]], DMA : 0) +// CHECK: aie.flow(%[[T100]], DMA : 0, %[[T73]], DMA : 0) +// CHECK: aie.flow(%[[T110]], DMA : 0, %[[T133]], DMA : 0) // -// CHECK: AIE.flow(%[[T25]], DMA : 0, %[[T60]], DMA : 0) -// CHECK: AIE.flow(%[[T31]], Core : 0, %[[T25]], Core : 0) -// CHECK: AIE.flow(%[[T66]], DMA : 0, %[[T20]], DMA : 0) +// CHECK: aie.flow(%[[T25]], DMA : 0, %[[T60]], DMA : 0) +// CHECK: aie.flow(%[[T31]], Core : 0, %[[T25]], Core : 0) +// CHECK: aie.flow(%[[T66]], DMA : 0, %[[T20]], DMA : 0) // -// CHECK: AIE.flow(%[[T73]], Core : 0, %[[T66]], Core : 0) -// CHECK: AIE.flow(%[[T125]], DMA : 0, %[[T180]], DMA : 0) -// CHECK: AIE.flow(%[[T133]], Core : 0, %[[T125]], Core : 0) +// CHECK: aie.flow(%[[T73]], Core : 0, %[[T66]], Core : 0) +// CHECK: aie.flow(%[[T125]], DMA : 0, %[[T180]], DMA : 0) +// CHECK: aie.flow(%[[T133]], Core : 0, %[[T125]], Core : 0) module { - AIE.device(xcvc1902) { - %t00 = AIE.tile(0, 0) - %t10 = AIE.tile(1, 0) - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t40 = AIE.tile(4, 0) - %t50 = AIE.tile(5, 0) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t80 = AIE.tile(8, 0) - %t90 = AIE.tile(9, 0) - %t100 = AIE.tile(10, 0) - %t110 = AIE.tile(11, 0) - %t180 = AIE.tile(18, 0) - %t190 = AIE.tile(19, 0) + aie.device(xcvc1902) { + %t00 = aie.tile(0, 0) + %t10 = aie.tile(1, 0) + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t40 = aie.tile(4, 0) + %t50 = aie.tile(5, 0) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t80 = aie.tile(8, 0) + %t90 = aie.tile(9, 0) + %t100 = aie.tile(10, 0) + %t110 = aie.tile(11, 0) + %t180 = aie.tile(18, 0) + %t190 = aie.tile(19, 0) - %t01 = AIE.tile(0, 1) - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t04 = AIE.tile(0, 4) - %t05 = AIE.tile(0, 5) - %t06 = AIE.tile(0, 6) - %t07 = AIE.tile(0, 7) - %t08 = AIE.tile(0, 8) - %t11 = AIE.tile(1, 1) - %t12 = AIE.tile(1, 2) - %t13 = AIE.tile(1, 3) - %t14 = AIE.tile(1, 4) - %t15 = AIE.tile(1, 5) - %t16 = AIE.tile(1, 6) - %t17 = AIE.tile(1, 7) - %t18 = AIE.tile(1, 8) - %t21 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 2) - %t23 = AIE.tile(2, 3) - %t24 = AIE.tile(2, 4) - %t25 = AIE.tile(2, 5) - %t26 = AIE.tile(2, 6) - %t27 = AIE.tile(2, 7) - %t28 = AIE.tile(2, 8) - %t31 = AIE.tile(3, 1) - %t32 = AIE.tile(3, 2) - %t33 = AIE.tile(3, 3) - %t34 = AIE.tile(3, 4) - %t35 = AIE.tile(3, 5) - %t36 = AIE.tile(3, 6) - %t37 = AIE.tile(3, 7) - %t38 = AIE.tile(3, 8) - %t41 = AIE.tile(4, 1) - %t42 = AIE.tile(4, 2) - %t43 = AIE.tile(4, 3) - %t44 = AIE.tile(4, 4) - %t45 = AIE.tile(4, 5) - %t46 = AIE.tile(4, 6) - %t47 = AIE.tile(4, 7) - %t48 = AIE.tile(4, 8) - %t51 = AIE.tile(5, 1) - %t52 = AIE.tile(5, 2) - %t53 = AIE.tile(5, 3) - %t54 = AIE.tile(5, 4) - %t55 = AIE.tile(5, 5) - %t56 = AIE.tile(5, 6) - %t57 = AIE.tile(5, 7) - %t58 = AIE.tile(5, 8) - %t61 = AIE.tile(6, 1) - %t62 = AIE.tile(6, 2) - %t63 = AIE.tile(6, 3) - %t64 = AIE.tile(6, 4) - %t65 = AIE.tile(6, 5) - %t66 = AIE.tile(6, 6) - %t67 = AIE.tile(6, 7) - %t68 = AIE.tile(6, 8) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - %t75 = AIE.tile(7, 5) - %t76 = AIE.tile(7, 6) - %t77 = AIE.tile(7, 7) - %t78 = AIE.tile(7, 8) - %t81 = AIE.tile(8, 1) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) - %t84 = AIE.tile(8, 4) - %t85 = AIE.tile(8, 5) - %t86 = AIE.tile(8, 6) - %t87 = AIE.tile(8, 7) - %t88 = AIE.tile(8, 8) - %t91 = AIE.tile(9, 1) - %t92 = AIE.tile(9, 2) - %t93 = AIE.tile(9, 3) - %t94 = AIE.tile(9, 4) - %t95 = AIE.tile(9, 5) - %t96 = AIE.tile(9, 6) - %t97 = AIE.tile(9, 7) - %t98 = AIE.tile(9, 8) - %t101 = AIE.tile(10, 1) - %t102 = AIE.tile(10, 2) - %t103 = AIE.tile(10, 3) - %t104 = AIE.tile(10, 4) - %t105 = AIE.tile(10, 5) - %t106 = AIE.tile(10, 6) - %t107 = AIE.tile(10, 7) - %t108 = AIE.tile(10, 8) - %t111 = AIE.tile(11, 1) - %t112 = AIE.tile(11, 2) - %t113 = AIE.tile(11, 3) - %t114 = AIE.tile(11, 4) - %t115 = AIE.tile(11, 5) - %t116 = AIE.tile(11, 6) - %t117 = AIE.tile(11, 7) - %t118 = AIE.tile(11, 8) - %t121 = AIE.tile(12, 1) - %t122 = AIE.tile(12, 2) - %t123 = AIE.tile(12, 3) - %t124 = AIE.tile(12, 4) - %t125 = AIE.tile(12, 5) - %t126 = AIE.tile(12, 6) - %t127 = AIE.tile(12, 7) - %t128 = AIE.tile(12, 8) - %t130 = AIE.tile(13, 0) - %t131 = AIE.tile(13, 1) - %t132 = AIE.tile(13, 2) - %t133 = AIE.tile(13, 3) - %t134 = AIE.tile(13, 4) - %t135 = AIE.tile(13, 5) - %t136 = AIE.tile(13, 6) - %t137 = AIE.tile(13, 7) - %t138 = AIE.tile(13, 8) - %t141 = AIE.tile(14, 1) - %t142 = AIE.tile(14, 2) - %t143 = AIE.tile(14, 3) - %t144 = AIE.tile(14, 4) - %t145 = AIE.tile(14, 5) - %t146 = AIE.tile(14, 6) - %t147 = AIE.tile(14, 7) - %t148 = AIE.tile(14, 8) + %t01 = aie.tile(0, 1) + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t04 = aie.tile(0, 4) + %t05 = aie.tile(0, 5) + %t06 = aie.tile(0, 6) + %t07 = aie.tile(0, 7) + %t08 = aie.tile(0, 8) + %t11 = aie.tile(1, 1) + %t12 = aie.tile(1, 2) + %t13 = aie.tile(1, 3) + %t14 = aie.tile(1, 4) + %t15 = aie.tile(1, 5) + %t16 = aie.tile(1, 6) + %t17 = aie.tile(1, 7) + %t18 = aie.tile(1, 8) + %t21 = aie.tile(2, 1) + %t22 = aie.tile(2, 2) + %t23 = aie.tile(2, 3) + %t24 = aie.tile(2, 4) + %t25 = aie.tile(2, 5) + %t26 = aie.tile(2, 6) + %t27 = aie.tile(2, 7) + %t28 = aie.tile(2, 8) + %t31 = aie.tile(3, 1) + %t32 = aie.tile(3, 2) + %t33 = aie.tile(3, 3) + %t34 = aie.tile(3, 4) + %t35 = aie.tile(3, 5) + %t36 = aie.tile(3, 6) + %t37 = aie.tile(3, 7) + %t38 = aie.tile(3, 8) + %t41 = aie.tile(4, 1) + %t42 = aie.tile(4, 2) + %t43 = aie.tile(4, 3) + %t44 = aie.tile(4, 4) + %t45 = aie.tile(4, 5) + %t46 = aie.tile(4, 6) + %t47 = aie.tile(4, 7) + %t48 = aie.tile(4, 8) + %t51 = aie.tile(5, 1) + %t52 = aie.tile(5, 2) + %t53 = aie.tile(5, 3) + %t54 = aie.tile(5, 4) + %t55 = aie.tile(5, 5) + %t56 = aie.tile(5, 6) + %t57 = aie.tile(5, 7) + %t58 = aie.tile(5, 8) + %t61 = aie.tile(6, 1) + %t62 = aie.tile(6, 2) + %t63 = aie.tile(6, 3) + %t64 = aie.tile(6, 4) + %t65 = aie.tile(6, 5) + %t66 = aie.tile(6, 6) + %t67 = aie.tile(6, 7) + %t68 = aie.tile(6, 8) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + %t75 = aie.tile(7, 5) + %t76 = aie.tile(7, 6) + %t77 = aie.tile(7, 7) + %t78 = aie.tile(7, 8) + %t81 = aie.tile(8, 1) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) + %t84 = aie.tile(8, 4) + %t85 = aie.tile(8, 5) + %t86 = aie.tile(8, 6) + %t87 = aie.tile(8, 7) + %t88 = aie.tile(8, 8) + %t91 = aie.tile(9, 1) + %t92 = aie.tile(9, 2) + %t93 = aie.tile(9, 3) + %t94 = aie.tile(9, 4) + %t95 = aie.tile(9, 5) + %t96 = aie.tile(9, 6) + %t97 = aie.tile(9, 7) + %t98 = aie.tile(9, 8) + %t101 = aie.tile(10, 1) + %t102 = aie.tile(10, 2) + %t103 = aie.tile(10, 3) + %t104 = aie.tile(10, 4) + %t105 = aie.tile(10, 5) + %t106 = aie.tile(10, 6) + %t107 = aie.tile(10, 7) + %t108 = aie.tile(10, 8) + %t111 = aie.tile(11, 1) + %t112 = aie.tile(11, 2) + %t113 = aie.tile(11, 3) + %t114 = aie.tile(11, 4) + %t115 = aie.tile(11, 5) + %t116 = aie.tile(11, 6) + %t117 = aie.tile(11, 7) + %t118 = aie.tile(11, 8) + %t121 = aie.tile(12, 1) + %t122 = aie.tile(12, 2) + %t123 = aie.tile(12, 3) + %t124 = aie.tile(12, 4) + %t125 = aie.tile(12, 5) + %t126 = aie.tile(12, 6) + %t127 = aie.tile(12, 7) + %t128 = aie.tile(12, 8) + %t130 = aie.tile(13, 0) + %t131 = aie.tile(13, 1) + %t132 = aie.tile(13, 2) + %t133 = aie.tile(13, 3) + %t134 = aie.tile(13, 4) + %t135 = aie.tile(13, 5) + %t136 = aie.tile(13, 6) + %t137 = aie.tile(13, 7) + %t138 = aie.tile(13, 8) + %t141 = aie.tile(14, 1) + %t142 = aie.tile(14, 2) + %t143 = aie.tile(14, 3) + %t144 = aie.tile(14, 4) + %t145 = aie.tile(14, 5) + %t146 = aie.tile(14, 6) + %t147 = aie.tile(14, 7) + %t148 = aie.tile(14, 8) - %sb01 = AIE.switchbox(%t01) { + %sb01 = aie.switchbox(%t01) { } - %sb02 = AIE.switchbox(%t02) { + %sb02 = aie.switchbox(%t02) { } - %sb03 = AIE.switchbox(%t03) { + %sb03 = aie.switchbox(%t03) { } - %sb04 = AIE.switchbox(%t04) { + %sb04 = aie.switchbox(%t04) { } - %sb11 = AIE.switchbox(%t11) { + %sb11 = aie.switchbox(%t11) { } - %sb12 = AIE.switchbox(%t12) { + %sb12 = aie.switchbox(%t12) { } - %sb13 = AIE.switchbox(%t13) { + %sb13 = aie.switchbox(%t13) { } - %sb14 = AIE.switchbox(%t14) { + %sb14 = aie.switchbox(%t14) { } - %sb21 = AIE.switchbox(%t21) { + %sb21 = aie.switchbox(%t21) { } - %sb22 = AIE.switchbox(%t22) { + %sb22 = aie.switchbox(%t22) { } - %sb23 = AIE.switchbox(%t23) { + %sb23 = aie.switchbox(%t23) { } - %sb24 = AIE.switchbox(%t24) { - AIE.connect + %sb24 = aie.switchbox(%t24) { + aie.connect } - %sb25 = AIE.switchbox(%t25) { - AIE.connect - AIE.connect + %sb25 = aie.switchbox(%t25) { + aie.connect + aie.connect } - %sb31 = AIE.switchbox(%t31) { - AIE.connect - AIE.connect + %sb31 = aie.switchbox(%t31) { + aie.connect + aie.connect } - %sb32 = AIE.switchbox(%t32) { - AIE.connect + %sb32 = aie.switchbox(%t32) { + aie.connect } - %sb33 = AIE.switchbox(%t33) { - AIE.connect + %sb33 = aie.switchbox(%t33) { + aie.connect } - %sb34 = AIE.switchbox(%t34) { - AIE.connect + %sb34 = aie.switchbox(%t34) { + aie.connect } - %sb35 = AIE.switchbox(%t35) { - AIE.connect + %sb35 = aie.switchbox(%t35) { + aie.connect } - %sb41 = AIE.switchbox(%t41) { + %sb41 = aie.switchbox(%t41) { } - %sb42 = AIE.switchbox(%t42) { + %sb42 = aie.switchbox(%t42) { } - %sb43 = AIE.switchbox(%t43) { + %sb43 = aie.switchbox(%t43) { } - %sb44 = AIE.switchbox(%t44) { + %sb44 = aie.switchbox(%t44) { } - %sb51 = AIE.switchbox(%t51) { + %sb51 = aie.switchbox(%t51) { } - %sb52 = AIE.switchbox(%t52) { + %sb52 = aie.switchbox(%t52) { } - %sb53 = AIE.switchbox(%t53) { + %sb53 = aie.switchbox(%t53) { } - %sb54 = AIE.switchbox(%t54) { + %sb54 = aie.switchbox(%t54) { } - %sb55 = AIE.switchbox(%t55) { + %sb55 = aie.switchbox(%t55) { } - %sb56 = AIE.switchbox(%t56) { - AIE.connect + %sb56 = aie.switchbox(%t56) { + aie.connect } - %sb61 = AIE.switchbox(%t61) { + %sb61 = aie.switchbox(%t61) { } - %sb62 = AIE.switchbox(%t62) { + %sb62 = aie.switchbox(%t62) { } - %sb63 = AIE.switchbox(%t63) { + %sb63 = aie.switchbox(%t63) { } - %sb64 = AIE.switchbox(%t64) { + %sb64 = aie.switchbox(%t64) { } - %sb65 = AIE.switchbox(%t65) { + %sb65 = aie.switchbox(%t65) { } - %sb66 = AIE.switchbox(%t66) { - AIE.connect - AIE.connect + %sb66 = aie.switchbox(%t66) { + aie.connect + aie.connect } - %sb71 = AIE.switchbox(%t71) { + %sb71 = aie.switchbox(%t71) { } - %sb72 = AIE.switchbox(%t72) { + %sb72 = aie.switchbox(%t72) { } - %sb73 = AIE.switchbox(%t73) { - AIE.connect - AIE.connect + %sb73 = aie.switchbox(%t73) { + aie.connect + aie.connect } - %sb74 = AIE.switchbox(%t74) { - AIE.connect + %sb74 = aie.switchbox(%t74) { + aie.connect } - %sb75 = AIE.switchbox(%t75) { - AIE.connect + %sb75 = aie.switchbox(%t75) { + aie.connect } - %sb76 = AIE.switchbox(%t76) { - AIE.connect + %sb76 = aie.switchbox(%t76) { + aie.connect } - %sb81 = AIE.switchbox(%t81) { + %sb81 = aie.switchbox(%t81) { } - %sb82 = AIE.switchbox(%t82) { + %sb82 = aie.switchbox(%t82) { } - %sb83 = AIE.switchbox(%t83) { - AIE.connect + %sb83 = aie.switchbox(%t83) { + aie.connect } - %sb84 = AIE.switchbox(%t84) { + %sb84 = aie.switchbox(%t84) { } - %sb91 = AIE.switchbox(%t91) { + %sb91 = aie.switchbox(%t91) { } - %sb92 = AIE.switchbox(%t92) { + %sb92 = aie.switchbox(%t92) { } - %sb93 = AIE.switchbox(%t93) { + %sb93 = aie.switchbox(%t93) { } - %sb94 = AIE.switchbox(%t94) { + %sb94 = aie.switchbox(%t94) { } - %sb101 = AIE.switchbox(%t101) { + %sb101 = aie.switchbox(%t101) { } - %sb102 = AIE.switchbox(%t102) { + %sb102 = aie.switchbox(%t102) { } - %sb103 = AIE.switchbox(%t103) { + %sb103 = aie.switchbox(%t103) { } - %sb104 = AIE.switchbox(%t104) { + %sb104 = aie.switchbox(%t104) { } - %sb111 = AIE.switchbox(%t111) { + %sb111 = aie.switchbox(%t111) { } - %sb112 = AIE.switchbox(%t112) { + %sb112 = aie.switchbox(%t112) { } - %sb113 = AIE.switchbox(%t113) { + %sb113 = aie.switchbox(%t113) { } - %sb114 = AIE.switchbox(%t114) { + %sb114 = aie.switchbox(%t114) { } - %sb121 = AIE.switchbox(%t121) { + %sb121 = aie.switchbox(%t121) { } - %sb122 = AIE.switchbox(%t122) { + %sb122 = aie.switchbox(%t122) { } - %sb123 = AIE.switchbox(%t123) { + %sb123 = aie.switchbox(%t123) { } - %sb124 = AIE.switchbox(%t124) { + %sb124 = aie.switchbox(%t124) { } - %sb125 = AIE.switchbox(%t125) { - AIE.connect - AIE.connect + %sb125 = aie.switchbox(%t125) { + aie.connect + aie.connect } - %sb131 = AIE.switchbox(%t131) { - AIE.connect + %sb131 = aie.switchbox(%t131) { + aie.connect } - %sb132 = AIE.switchbox(%t132) { - AIE.connect + %sb132 = aie.switchbox(%t132) { + aie.connect } - %sb133 = AIE.switchbox(%t133) { - AIE.connect - AIE.connect + %sb133 = aie.switchbox(%t133) { + aie.connect + aie.connect } - %sb134 = AIE.switchbox(%t134) { - AIE.connect + %sb134 = aie.switchbox(%t134) { + aie.connect } - %sb135 = AIE.switchbox(%t135) { - AIE.connect - AIE.connect + %sb135 = aie.switchbox(%t135) { + aie.connect + aie.connect } - AIE.flow(%t30, DMA : 0, %t30, North: 0) - AIE.flow(%t45, West: 0, %t60, DMA : 0) + aie.flow(%t30, DMA : 0, %t30, North: 0) + aie.flow(%t45, West: 0, %t60, DMA : 0) - AIE.flow(%t100, DMA : 0, %t93, West: 0) - AIE.flow(%t46, East: 0, %t20, DMA : 0) + aie.flow(%t100, DMA : 0, %t93, West: 0) + aie.flow(%t46, East: 0, %t20, DMA : 0) - AIE.flow(%t110, DMA : 0, %t130, North: 0) - AIE.flow(%t145, West: 0, %t180, DMA : 0) + aie.flow(%t110, DMA : 0, %t130, North: 0) + aie.flow(%t145, West: 0, %t180, DMA : 0) } } \ No newline at end of file diff --git a/test/create-flows/simple.mlir b/test/create-flows/simple.mlir index 604d981e54..3d22168f93 100644 --- a/test/create-flows/simple.mlir +++ b/test/create-flows/simple.mlir @@ -9,20 +9,20 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T01:.*]] = AIE.tile(0, 1) -// CHECK: %[[T12:.*]] = AIE.tile(1, 2) -// CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) +// CHECK: %[[T01:.*]] = aie.tile(0, 1) +// CHECK: %[[T12:.*]] = aie.tile(1, 2) +// CHECK: aie.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) module { - AIE.device(xcvc1902) { - %01 = AIE.tile(0, 1) - %12 = AIE.tile(1, 2) - %02 = AIE.tile(0, 2) - AIE.flow(%01, DMA : 0, %12, Core : 1) - AIE.packet_flow(0x10) { - AIE.packet_source < %01, Core : 0> - AIE.packet_dest < %12, Core : 0> - AIE.packet_dest < %02, DMA : 1> + aie.device(xcvc1902) { + %01 = aie.tile(0, 1) + %12 = aie.tile(1, 2) + %02 = aie.tile(0, 2) + aie.flow(%01, DMA : 0, %12, Core : 1) + aie.packet_flow(0x10) { + aie.packet_source < %01, Core : 0> + aie.packet_dest < %12, Core : 0> + aie.packet_dest < %02, DMA : 1> } } } diff --git a/test/create-flows/simple2.mlir b/test/create-flows/simple2.mlir index a34d84811c..4fa7b9ce93 100644 --- a/test/create-flows/simple2.mlir +++ b/test/create-flows/simple2.mlir @@ -9,14 +9,14 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T23:.*]] = AIE.tile(2, 3) -// CHECK: %[[T32:.*]] = AIE.tile(3, 2) -// CHECK: AIE.flow(%[[T23]], Core : 1, %[[T32]], DMA : 0) +// CHECK: %[[T23:.*]] = aie.tile(2, 3) +// CHECK: %[[T32:.*]] = aie.tile(3, 2) +// CHECK: aie.flow(%[[T23]], Core : 1, %[[T32]], DMA : 0) module { - AIE.device(xcvc1902) { - %0 = AIE.tile(2, 3) - %1 = AIE.tile(3, 2) - AIE.flow(%0, Core : 1, %1, DMA : 0) + aie.device(xcvc1902) { + %0 = aie.tile(2, 3) + %1 = aie.tile(3, 2) + aie.flow(%0, Core : 1, %1, DMA : 0) } } diff --git a/test/create-flows/simple_flows.mlir b/test/create-flows/simple_flows.mlir index 700cb5fdd8..f3aa74b236 100644 --- a/test/create-flows/simple_flows.mlir +++ b/test/create-flows/simple_flows.mlir @@ -9,18 +9,18 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T23:.*]] = AIE.tile(2, 3) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: AIE.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) -// CHECK: AIE.flow(%[[T22]], Core : 0, %[[T22]], Core : 0) -// CHECK: AIE.flow(%[[T22]], Core : 1, %[[T23]], Core : 1) +// CHECK: %[[T23:.*]] = aie.tile(2, 3) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: aie.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) +// CHECK: aie.flow(%[[T22]], Core : 0, %[[T22]], Core : 0) +// CHECK: aie.flow(%[[T22]], Core : 1, %[[T23]], Core : 1) module { - AIE.device(xcvc1902) { - %t23 = AIE.tile(2, 3) - %t22 = AIE.tile(2, 2) - AIE.flow(%t23, Core : 0, %t22, Core : 1) - AIE.flow(%t22, Core : 0, %t22, Core : 0) - AIE.flow(%t22, Core : 1, %t23, Core : 1) + aie.device(xcvc1902) { + %t23 = aie.tile(2, 3) + %t22 = aie.tile(2, 2) + aie.flow(%t23, Core : 0, %t22, Core : 1) + aie.flow(%t22, Core : 0, %t22, Core : 0) + aie.flow(%t22, Core : 1, %t23, Core : 1) } } \ No newline at end of file diff --git a/test/create-flows/simple_flows2.mlir b/test/create-flows/simple_flows2.mlir index e54af4ed0e..c960ca3746 100644 --- a/test/create-flows/simple_flows2.mlir +++ b/test/create-flows/simple_flows2.mlir @@ -9,18 +9,18 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T23:.*]] = AIE.tile(2, 3) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: %[[T11:.*]] = AIE.tile(1, 1) -// CHECK: AIE.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) -// CHECK: AIE.flow(%[[T22]], Core : 0, %[[T11]], Core : 0) +// CHECK: %[[T23:.*]] = aie.tile(2, 3) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: %[[T11:.*]] = aie.tile(1, 1) +// CHECK: aie.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) +// CHECK: aie.flow(%[[T22]], Core : 0, %[[T11]], Core : 0) module { - AIE.device(xcvc1902) { - %t23 = AIE.tile(2, 3) - %t22 = AIE.tile(2, 2) - %t11 = AIE.tile(1, 1) - AIE.flow(%t23, Core : 0, %t22, Core : 1) - AIE.flow(%t22, Core : 0, %t11, Core : 0) + aie.device(xcvc1902) { + %t23 = aie.tile(2, 3) + %t22 = aie.tile(2, 2) + %t11 = aie.tile(1, 1) + aie.flow(%t23, Core : 0, %t22, Core : 1) + aie.flow(%t22, Core : 0, %t11, Core : 0) } } \ No newline at end of file diff --git a/test/create-flows/simple_flows_shim.mlir b/test/create-flows/simple_flows_shim.mlir index a06ff7ecca..cc2fae8436 100644 --- a/test/create-flows/simple_flows_shim.mlir +++ b/test/create-flows/simple_flows_shim.mlir @@ -10,65 +10,65 @@ // RUN: aie-opt --split-input-file --aie-create-pathfinder-flows %s | FileCheck %s // CHECK: module -// CHECK: %[[T21:.*]] = AIE.tile(2, 1) -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %[[T21:.*]] = aie.tile(2, 1) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.switchbox(%[[T21]]) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcvc1902) { - %t23 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 0) - AIE.flow(%t23, North : 0, %t22, PLIO : 0) + aie.device(xcvc1902) { + %t23 = aie.tile(2, 1) + %t22 = aie.tile(2, 0) + aie.flow(%t23, North : 0, %t22, PLIO : 0) } } // ----- // CHECK: module -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T21:.*]] = AIE.tile(2, 1) -// CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T21:.*]] = aie.tile(2, 1) +// CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.shim_mux(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.shim_mux(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.switchbox(%[[T21]]) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) - AIE.flow(%t21, Core : 0, %t20, DMA : 1) + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) + aie.flow(%t21, Core : 0, %t20, DMA : 1) } } // ----- // CHECK: module -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.shim_mux(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.shim_mux(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.switchbox(%[[T30]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.switchbox(%[[T30]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.shim_mux(%[[T30]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.shim_mux(%[[T30]]) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - AIE.flow(%t20, DMA : 0, %t30, DMA : 1) + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + aie.flow(%t20, DMA : 0, %t30, DMA : 1) } } diff --git a/test/create-flows/unit_broadcast.mlir b/test/create-flows/unit_broadcast.mlir index a6d7b28ad1..cf580b234f 100644 --- a/test/create-flows/unit_broadcast.mlir +++ b/test/create-flows/unit_broadcast.mlir @@ -10,241 +10,241 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_3:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_5:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_6:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_7:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_8:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_9:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_10:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_11:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_12:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_13:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_14:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_15:.*]] = AIE.tile(8, 0) -// CHECK: %[[VAL_16:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_17:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_18:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.shim_mux(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_21:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_22:.*]] = AIE.switchbox(%[[VAL_21]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_25:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_28:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_29:.*]] = AIE.switchbox(%[[VAL_28]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_30:.*]] = AIE.tile(5, 0) -// CHECK: %[[VAL_31:.*]] = AIE.switchbox(%[[VAL_30]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_32:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_34:.*]] = AIE.switchbox(%[[VAL_33]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_35:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_36:.*]] = AIE.switchbox(%[[VAL_35]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_37:.*]] = AIE.switchbox(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_38:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_39:.*]] = AIE.switchbox(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_42:.*]] = AIE.switchbox(%[[VAL_41]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_43:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_44:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_45:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_46:.*]] = AIE.switchbox(%[[VAL_45]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_47:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_48:.*]] = AIE.switchbox(%[[VAL_47]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_49:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_50:.*]] = AIE.switchbox(%[[VAL_49]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_51:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_52:.*]] = AIE.switchbox(%[[VAL_51]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_53:.*]] = AIE.shim_mux(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_54:.*]] = AIE.switchbox(%[[VAL_14]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_55:.*]] = AIE.switchbox(%[[VAL_17]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_41]] : Core, %[[VAL_56:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_41]] : DMA, %[[VAL_56]] : DMA) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_57:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_57]] : DMA) -// CHECK: AIE.wire(%[[VAL_56]] : North, %[[VAL_57]] : South) -// CHECK: AIE.wire(%[[VAL_56]] : East, %[[VAL_58:.*]] : West) -// CHECK: AIE.wire(%[[VAL_4]] : Core, %[[VAL_58]] : Core) -// CHECK: AIE.wire(%[[VAL_4]] : DMA, %[[VAL_58]] : DMA) -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_59:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_59]] : DMA) -// CHECK: AIE.wire(%[[VAL_60:.*]] : North, %[[VAL_61:.*]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_60]] : DMA) -// CHECK: AIE.wire(%[[VAL_58]] : East, %[[VAL_62:.*]] : West) -// CHECK: AIE.wire(%[[VAL_21]] : Core, %[[VAL_62]] : Core) -// CHECK: AIE.wire(%[[VAL_21]] : DMA, %[[VAL_62]] : DMA) -// CHECK: AIE.wire(%[[VAL_61]] : North, %[[VAL_62]] : South) -// CHECK: AIE.wire(%[[VAL_8]] : Core, %[[VAL_63:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_8]] : DMA, %[[VAL_63]] : DMA) -// CHECK: AIE.wire(%[[VAL_62]] : North, %[[VAL_63]] : South) -// CHECK: AIE.wire(%[[VAL_59]] : East, %[[VAL_64:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_64]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_64]] : DMA) -// CHECK: AIE.wire(%[[VAL_63]] : North, %[[VAL_64]] : South) -// CHECK: AIE.wire(%[[VAL_61]] : East, %[[VAL_65:.*]] : West) -// CHECK: AIE.wire(%[[VAL_62]] : East, %[[VAL_66:.*]] : West) -// CHECK: AIE.wire(%[[VAL_9]] : Core, %[[VAL_66]] : Core) -// CHECK: AIE.wire(%[[VAL_9]] : DMA, %[[VAL_66]] : DMA) -// CHECK: AIE.wire(%[[VAL_65]] : North, %[[VAL_66]] : South) -// CHECK: AIE.wire(%[[VAL_63]] : East, %[[VAL_67:.*]] : West) -// CHECK: AIE.wire(%[[VAL_45]] : Core, %[[VAL_67]] : Core) -// CHECK: AIE.wire(%[[VAL_45]] : DMA, %[[VAL_67]] : DMA) -// CHECK: AIE.wire(%[[VAL_66]] : North, %[[VAL_67]] : South) -// CHECK: AIE.wire(%[[VAL_65]] : East, %[[VAL_68:.*]] : West) -// CHECK: AIE.wire(%[[VAL_66]] : East, %[[VAL_69:.*]] : West) -// CHECK: AIE.wire(%[[VAL_47]] : Core, %[[VAL_69]] : Core) -// CHECK: AIE.wire(%[[VAL_47]] : DMA, %[[VAL_69]] : DMA) -// CHECK: AIE.wire(%[[VAL_68]] : North, %[[VAL_69]] : South) -// CHECK: AIE.wire(%[[VAL_67]] : East, %[[VAL_70:.*]] : West) -// CHECK: AIE.wire(%[[VAL_49]] : Core, %[[VAL_70]] : Core) -// CHECK: AIE.wire(%[[VAL_49]] : DMA, %[[VAL_70]] : DMA) -// CHECK: AIE.wire(%[[VAL_69]] : North, %[[VAL_70]] : South) -// CHECK: AIE.wire(%[[VAL_68]] : East, %[[VAL_71:.*]] : West) -// CHECK: AIE.wire(%[[VAL_69]] : East, %[[VAL_72:.*]] : West) -// CHECK: AIE.wire(%[[VAL_51]] : Core, %[[VAL_72]] : Core) -// CHECK: AIE.wire(%[[VAL_51]] : DMA, %[[VAL_72]] : DMA) -// CHECK: AIE.wire(%[[VAL_71]] : North, %[[VAL_72]] : South) -// CHECK: AIE.wire(%[[VAL_71]] : East, %[[VAL_73:.*]] : West) -// CHECK: AIE.wire(%[[VAL_74:.*]] : North, %[[VAL_73]] : South) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_74]] : DMA) -// CHECK: AIE.wire(%[[VAL_72]] : East, %[[VAL_75:.*]] : West) -// CHECK: AIE.wire(%[[VAL_33]] : Core, %[[VAL_75]] : Core) -// CHECK: AIE.wire(%[[VAL_33]] : DMA, %[[VAL_75]] : DMA) -// CHECK: AIE.wire(%[[VAL_73]] : North, %[[VAL_75]] : South) -// CHECK: AIE.wire(%[[VAL_35]] : Core, %[[VAL_76:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_35]] : DMA, %[[VAL_76]] : DMA) -// CHECK: AIE.wire(%[[VAL_75]] : North, %[[VAL_76]] : South) -// CHECK: AIE.wire(%[[VAL_73]] : East, %[[VAL_77:.*]] : West) -// CHECK: AIE.wire(%[[VAL_75]] : East, %[[VAL_78:.*]] : West) -// CHECK: AIE.wire(%[[VAL_12]] : Core, %[[VAL_78]] : Core) -// CHECK: AIE.wire(%[[VAL_12]] : DMA, %[[VAL_78]] : DMA) -// CHECK: AIE.wire(%[[VAL_77]] : North, %[[VAL_78]] : South) -// CHECK: AIE.wire(%[[VAL_76]] : East, %[[VAL_79:.*]] : West) -// CHECK: AIE.wire(%[[VAL_13]] : Core, %[[VAL_79]] : Core) -// CHECK: AIE.wire(%[[VAL_13]] : DMA, %[[VAL_79]] : DMA) -// CHECK: AIE.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) -// CHECK: AIE.wire(%[[VAL_14]] : Core, %[[VAL_80:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_14]] : DMA, %[[VAL_80]] : DMA) -// CHECK: AIE.wire(%[[VAL_79]] : North, %[[VAL_80]] : South) -// CHECK: AIE.wire(%[[VAL_79]] : East, %[[VAL_81:.*]] : West) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_81]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_81]] : DMA) -// CHECK: AIE.wire(%[[VAL_80]] : East, %[[VAL_82:.*]] : West) -// CHECK: AIE.wire(%[[VAL_17]] : Core, %[[VAL_82]] : Core) -// CHECK: AIE.wire(%[[VAL_17]] : DMA, %[[VAL_82]] : DMA) -// CHECK: AIE.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_3:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_5:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_6:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_7:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_8:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_9:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_10:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_11:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_12:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_13:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_14:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_15:.*]] = aie.tile(8, 0) +// CHECK: %[[VAL_16:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_17:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_18:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_19:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_20:.*]] = aie.shim_mux(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_21:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_22:.*]] = aie.switchbox(%[[VAL_21]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_24:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_25:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_26:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_27:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_28:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_29:.*]] = aie.switchbox(%[[VAL_28]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_30:.*]] = aie.tile(5, 0) +// CHECK: %[[VAL_31:.*]] = aie.switchbox(%[[VAL_30]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_32:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_33:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_34:.*]] = aie.switchbox(%[[VAL_33]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_35:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_36:.*]] = aie.switchbox(%[[VAL_35]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_37:.*]] = aie.switchbox(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_38:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_39:.*]] = aie.switchbox(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_40:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_41:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_42:.*]] = aie.switchbox(%[[VAL_41]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_43:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_44:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_45:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_46:.*]] = aie.switchbox(%[[VAL_45]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_47:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_48:.*]] = aie.switchbox(%[[VAL_47]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_49:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_50:.*]] = aie.switchbox(%[[VAL_49]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_51:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_52:.*]] = aie.switchbox(%[[VAL_51]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_53:.*]] = aie.shim_mux(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_54:.*]] = aie.switchbox(%[[VAL_14]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_55:.*]] = aie.switchbox(%[[VAL_17]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_41]] : Core, %[[VAL_56:.*]] : Core) +// CHECK: aie.wire(%[[VAL_41]] : DMA, %[[VAL_56]] : DMA) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_57:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_57]] : DMA) +// CHECK: aie.wire(%[[VAL_56]] : North, %[[VAL_57]] : South) +// CHECK: aie.wire(%[[VAL_56]] : East, %[[VAL_58:.*]] : West) +// CHECK: aie.wire(%[[VAL_4]] : Core, %[[VAL_58]] : Core) +// CHECK: aie.wire(%[[VAL_4]] : DMA, %[[VAL_58]] : DMA) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_59:.*]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_59]] : DMA) +// CHECK: aie.wire(%[[VAL_60:.*]] : North, %[[VAL_61:.*]] : South) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_60]] : DMA) +// CHECK: aie.wire(%[[VAL_58]] : East, %[[VAL_62:.*]] : West) +// CHECK: aie.wire(%[[VAL_21]] : Core, %[[VAL_62]] : Core) +// CHECK: aie.wire(%[[VAL_21]] : DMA, %[[VAL_62]] : DMA) +// CHECK: aie.wire(%[[VAL_61]] : North, %[[VAL_62]] : South) +// CHECK: aie.wire(%[[VAL_8]] : Core, %[[VAL_63:.*]] : Core) +// CHECK: aie.wire(%[[VAL_8]] : DMA, %[[VAL_63]] : DMA) +// CHECK: aie.wire(%[[VAL_62]] : North, %[[VAL_63]] : South) +// CHECK: aie.wire(%[[VAL_59]] : East, %[[VAL_64:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_64]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_64]] : DMA) +// CHECK: aie.wire(%[[VAL_63]] : North, %[[VAL_64]] : South) +// CHECK: aie.wire(%[[VAL_61]] : East, %[[VAL_65:.*]] : West) +// CHECK: aie.wire(%[[VAL_62]] : East, %[[VAL_66:.*]] : West) +// CHECK: aie.wire(%[[VAL_9]] : Core, %[[VAL_66]] : Core) +// CHECK: aie.wire(%[[VAL_9]] : DMA, %[[VAL_66]] : DMA) +// CHECK: aie.wire(%[[VAL_65]] : North, %[[VAL_66]] : South) +// CHECK: aie.wire(%[[VAL_63]] : East, %[[VAL_67:.*]] : West) +// CHECK: aie.wire(%[[VAL_45]] : Core, %[[VAL_67]] : Core) +// CHECK: aie.wire(%[[VAL_45]] : DMA, %[[VAL_67]] : DMA) +// CHECK: aie.wire(%[[VAL_66]] : North, %[[VAL_67]] : South) +// CHECK: aie.wire(%[[VAL_65]] : East, %[[VAL_68:.*]] : West) +// CHECK: aie.wire(%[[VAL_66]] : East, %[[VAL_69:.*]] : West) +// CHECK: aie.wire(%[[VAL_47]] : Core, %[[VAL_69]] : Core) +// CHECK: aie.wire(%[[VAL_47]] : DMA, %[[VAL_69]] : DMA) +// CHECK: aie.wire(%[[VAL_68]] : North, %[[VAL_69]] : South) +// CHECK: aie.wire(%[[VAL_67]] : East, %[[VAL_70:.*]] : West) +// CHECK: aie.wire(%[[VAL_49]] : Core, %[[VAL_70]] : Core) +// CHECK: aie.wire(%[[VAL_49]] : DMA, %[[VAL_70]] : DMA) +// CHECK: aie.wire(%[[VAL_69]] : North, %[[VAL_70]] : South) +// CHECK: aie.wire(%[[VAL_68]] : East, %[[VAL_71:.*]] : West) +// CHECK: aie.wire(%[[VAL_69]] : East, %[[VAL_72:.*]] : West) +// CHECK: aie.wire(%[[VAL_51]] : Core, %[[VAL_72]] : Core) +// CHECK: aie.wire(%[[VAL_51]] : DMA, %[[VAL_72]] : DMA) +// CHECK: aie.wire(%[[VAL_71]] : North, %[[VAL_72]] : South) +// CHECK: aie.wire(%[[VAL_71]] : East, %[[VAL_73:.*]] : West) +// CHECK: aie.wire(%[[VAL_74:.*]] : North, %[[VAL_73]] : South) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_74]] : DMA) +// CHECK: aie.wire(%[[VAL_72]] : East, %[[VAL_75:.*]] : West) +// CHECK: aie.wire(%[[VAL_33]] : Core, %[[VAL_75]] : Core) +// CHECK: aie.wire(%[[VAL_33]] : DMA, %[[VAL_75]] : DMA) +// CHECK: aie.wire(%[[VAL_73]] : North, %[[VAL_75]] : South) +// CHECK: aie.wire(%[[VAL_35]] : Core, %[[VAL_76:.*]] : Core) +// CHECK: aie.wire(%[[VAL_35]] : DMA, %[[VAL_76]] : DMA) +// CHECK: aie.wire(%[[VAL_75]] : North, %[[VAL_76]] : South) +// CHECK: aie.wire(%[[VAL_73]] : East, %[[VAL_77:.*]] : West) +// CHECK: aie.wire(%[[VAL_75]] : East, %[[VAL_78:.*]] : West) +// CHECK: aie.wire(%[[VAL_12]] : Core, %[[VAL_78]] : Core) +// CHECK: aie.wire(%[[VAL_12]] : DMA, %[[VAL_78]] : DMA) +// CHECK: aie.wire(%[[VAL_77]] : North, %[[VAL_78]] : South) +// CHECK: aie.wire(%[[VAL_76]] : East, %[[VAL_79:.*]] : West) +// CHECK: aie.wire(%[[VAL_13]] : Core, %[[VAL_79]] : Core) +// CHECK: aie.wire(%[[VAL_13]] : DMA, %[[VAL_79]] : DMA) +// CHECK: aie.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) +// CHECK: aie.wire(%[[VAL_14]] : Core, %[[VAL_80:.*]] : Core) +// CHECK: aie.wire(%[[VAL_14]] : DMA, %[[VAL_80]] : DMA) +// CHECK: aie.wire(%[[VAL_79]] : North, %[[VAL_80]] : South) +// CHECK: aie.wire(%[[VAL_79]] : East, %[[VAL_81:.*]] : West) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_81]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_81]] : DMA) +// CHECK: aie.wire(%[[VAL_80]] : East, %[[VAL_82:.*]] : West) +// CHECK: aie.wire(%[[VAL_17]] : Core, %[[VAL_82]] : Core) +// CHECK: aie.wire(%[[VAL_17]] : DMA, %[[VAL_82]] : DMA) +// CHECK: aie.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t03 = AIE.tile(0, 3) - %t02 = AIE.tile(0, 2) - %t00 = AIE.tile(0, 0) - %t13 = AIE.tile(1, 3) - %t11 = AIE.tile(1, 1) - %t10 = AIE.tile(1, 0) - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t22 = AIE.tile(2, 2) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t80 = AIE.tile(8, 0) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) + aie.device(xcvc1902) { + %t03 = aie.tile(0, 3) + %t02 = aie.tile(0, 2) + %t00 = aie.tile(0, 0) + %t13 = aie.tile(1, 3) + %t11 = aie.tile(1, 1) + %t10 = aie.tile(1, 0) + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t22 = aie.tile(2, 2) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t80 = aie.tile(8, 0) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) - AIE.flow(%t20, DMA : 0, %t13, DMA : 0) - AIE.flow(%t20, DMA : 0, %t31, DMA : 0) - AIE.flow(%t20, DMA : 0, %t71, DMA : 0) - AIE.flow(%t20, DMA : 0, %t82, DMA : 0) + aie.flow(%t20, DMA : 0, %t13, DMA : 0) + aie.flow(%t20, DMA : 0, %t31, DMA : 0) + aie.flow(%t20, DMA : 0, %t71, DMA : 0) + aie.flow(%t20, DMA : 0, %t82, DMA : 0) - AIE.flow(%t60, DMA : 0, %t02, DMA : 1) - AIE.flow(%t60, DMA : 0, %t83, DMA : 1) - AIE.flow(%t60, DMA : 0, %t22, DMA : 1) - AIE.flow(%t60, DMA : 0, %t31, DMA : 1) + aie.flow(%t60, DMA : 0, %t02, DMA : 1) + aie.flow(%t60, DMA : 0, %t83, DMA : 1) + aie.flow(%t60, DMA : 0, %t22, DMA : 1) + aie.flow(%t60, DMA : 0, %t31, DMA : 1) } } diff --git a/test/create-flows/unit_fixed_connections.mlir b/test/create-flows/unit_fixed_connections.mlir index 8c8a0879db..67d308075d 100644 --- a/test/create-flows/unit_fixed_connections.mlir +++ b/test/create-flows/unit_fixed_connections.mlir @@ -10,251 +10,251 @@ // RUN: aie-opt --aie-create-pathfinder-flows --split-input-file %s | FileCheck %s -// CHECK: %tile_2_0 = AIE.tile(2, 0) -// CHECK: %tile_3_0 = AIE.tile(3, 0) -// CHECK: %tile_6_0 = AIE.tile(6, 0) -// CHECK: %tile_7_0 = AIE.tile(7, 0) -// CHECK: %switchbox_2_0 = AIE.switchbox(%tile_2_0) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %tile_2_0 = aie.tile(2, 0) +// CHECK: %tile_3_0 = aie.tile(3, 0) +// CHECK: %tile_6_0 = aie.tile(6, 0) +// CHECK: %tile_7_0 = aie.tile(7, 0) +// CHECK: %switchbox_2_0 = aie.switchbox(%tile_2_0) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_3_0 = AIE.switchbox(%tile_3_0) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_3_0 = aie.switchbox(%tile_3_0) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_6_0 = AIE.switchbox(%tile_6_0) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_6_0 = aie.switchbox(%tile_6_0) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_7_0 = AIE.switchbox(%tile_7_0) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_7_0 = aie.switchbox(%tile_7_0) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%switchbox_2_0 : East, %switchbox_3_0 : West) -// CHECK: AIE.wire(%switchbox_6_0 : East, %switchbox_7_0 : West) +// CHECK: aie.wire(%switchbox_2_0 : East, %switchbox_3_0 : West) +// CHECK: aie.wire(%switchbox_6_0 : East, %switchbox_7_0 : West) module { - AIE.device(xcvc1902) { - %tile_2_0 = AIE.tile(2, 0) - %tile_3_0 = AIE.tile(3, 0) - %tile_6_0 = AIE.tile(6, 0) - %tile_7_0 = AIE.tile(7, 0) + aie.device(xcvc1902) { + %tile_2_0 = aie.tile(2, 0) + %tile_3_0 = aie.tile(3, 0) + %tile_6_0 = aie.tile(6, 0) + %tile_7_0 = aie.tile(7, 0) - %switchbox_2_0 = AIE.switchbox(%tile_2_0) { - AIE.connect - AIE.connect + %switchbox_2_0 = aie.switchbox(%tile_2_0) { + aie.connect + aie.connect } - %switchbox_3_0 = AIE.switchbox(%tile_3_0) { - AIE.connect - AIE.connect + %switchbox_3_0 = aie.switchbox(%tile_3_0) { + aie.connect + aie.connect } - %switchbox_6_0 = AIE.switchbox(%tile_6_0) { - AIE.connect - AIE.connect + %switchbox_6_0 = aie.switchbox(%tile_6_0) { + aie.connect + aie.connect } - %switchbox_7_0 = AIE.switchbox(%tile_7_0) { - AIE.connect - AIE.connect + %switchbox_7_0 = aie.switchbox(%tile_7_0) { + aie.connect + aie.connect } } } // ----- -// CHECK: %tile_0_3 = AIE.tile(0, 3) -// CHECK: %tile_1_4 = AIE.tile(1, 4) -// CHECK: %tile_3_3 = AIE.tile(3, 3) -// CHECK: %tile_4_2 = AIE.tile(4, 2) -// CHECK: %tile_5_3 = AIE.tile(5, 3) -// CHECK: %tile_6_3 = AIE.tile(6, 3) -// CHECK: %tile_7_4 = AIE.tile(7, 4) -// CHECK: %tile_9_2 = AIE.tile(9, 2) -// CHECK: %tile_10_2 = AIE.tile(10, 2) -// CHECK: %tile_11_3 = AIE.tile(11, 3) -// CHECK: %switchbox_0_3 = AIE.switchbox(%tile_0_3) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %tile_0_3 = aie.tile(0, 3) +// CHECK: %tile_1_4 = aie.tile(1, 4) +// CHECK: %tile_3_3 = aie.tile(3, 3) +// CHECK: %tile_4_2 = aie.tile(4, 2) +// CHECK: %tile_5_3 = aie.tile(5, 3) +// CHECK: %tile_6_3 = aie.tile(6, 3) +// CHECK: %tile_7_4 = aie.tile(7, 4) +// CHECK: %tile_9_2 = aie.tile(9, 2) +// CHECK: %tile_10_2 = aie.tile(10, 2) +// CHECK: %tile_11_3 = aie.tile(11, 3) +// CHECK: %switchbox_0_3 = aie.switchbox(%tile_0_3) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_1_4 = AIE.switchbox(%tile_1_4) { -// CHECK: AIE.connect +// CHECK: %switchbox_1_4 = aie.switchbox(%tile_1_4) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_3_3 = AIE.switchbox(%tile_3_3) { -// CHECK: AIE.connect +// CHECK: %switchbox_3_3 = aie.switchbox(%tile_3_3) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_4_2 = AIE.switchbox(%tile_4_2) { -// CHECK: AIE.connect +// CHECK: %switchbox_4_2 = aie.switchbox(%tile_4_2) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_5_3 = AIE.switchbox(%tile_5_3) { -// CHECK: AIE.connect +// CHECK: %switchbox_5_3 = aie.switchbox(%tile_5_3) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_6_3 = AIE.switchbox(%tile_6_3) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_6_3 = aie.switchbox(%tile_6_3) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_7_4 = AIE.switchbox(%tile_7_4) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_7_4 = aie.switchbox(%tile_7_4) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_9_2 = AIE.switchbox(%tile_9_2) { -// CHECK: AIE.connect +// CHECK: %switchbox_9_2 = aie.switchbox(%tile_9_2) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_10_2 = AIE.switchbox(%tile_10_2) { -// CHECK: AIE.connect +// CHECK: %switchbox_10_2 = aie.switchbox(%tile_10_2) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_11_3 = AIE.switchbox(%tile_11_3) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_11_3 = aie.switchbox(%tile_11_3) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%tile_0_3 : Core, %switchbox_0_3 : Core) -// CHECK: AIE.wire(%tile_0_3 : DMA, %switchbox_0_3 : DMA) -// CHECK: AIE.wire(%tile_1_4 : Core, %switchbox_1_4 : Core) -// CHECK: AIE.wire(%tile_1_4 : DMA, %switchbox_1_4 : DMA) -// CHECK: AIE.wire(%tile_3_3 : Core, %switchbox_3_3 : Core) -// CHECK: AIE.wire(%tile_3_3 : DMA, %switchbox_3_3 : DMA) -// CHECK: AIE.wire(%tile_4_2 : Core, %switchbox_4_2 : Core) -// CHECK: AIE.wire(%tile_4_2 : DMA, %switchbox_4_2 : DMA) -// CHECK: AIE.wire(%tile_5_3 : Core, %switchbox_5_3 : Core) -// CHECK: AIE.wire(%tile_5_3 : DMA, %switchbox_5_3 : DMA) -// CHECK: AIE.wire(%switchbox_5_3 : East, %switchbox_6_3 : West) -// CHECK: AIE.wire(%tile_6_3 : Core, %switchbox_6_3 : Core) -// CHECK: AIE.wire(%tile_6_3 : DMA, %switchbox_6_3 : DMA) -// CHECK: AIE.wire(%tile_7_4 : Core, %switchbox_7_4 : Core) -// CHECK: AIE.wire(%tile_7_4 : DMA, %switchbox_7_4 : DMA) -// CHECK: AIE.wire(%tile_9_2 : Core, %switchbox_9_2 : Core) -// CHECK: AIE.wire(%tile_9_2 : DMA, %switchbox_9_2 : DMA) -// CHECK: AIE.wire(%switchbox_9_2 : East, %switchbox_10_2 : West) -// CHECK: AIE.wire(%tile_10_2 : Core, %switchbox_10_2 : Core) -// CHECK: AIE.wire(%tile_10_2 : DMA, %switchbox_10_2 : DMA) -// CHECK: AIE.wire(%tile_11_3 : Core, %switchbox_11_3 : Core) -// CHECK: AIE.wire(%tile_11_3 : DMA, %switchbox_11_3 : DMA) +// CHECK: aie.wire(%tile_0_3 : Core, %switchbox_0_3 : Core) +// CHECK: aie.wire(%tile_0_3 : DMA, %switchbox_0_3 : DMA) +// CHECK: aie.wire(%tile_1_4 : Core, %switchbox_1_4 : Core) +// CHECK: aie.wire(%tile_1_4 : DMA, %switchbox_1_4 : DMA) +// CHECK: aie.wire(%tile_3_3 : Core, %switchbox_3_3 : Core) +// CHECK: aie.wire(%tile_3_3 : DMA, %switchbox_3_3 : DMA) +// CHECK: aie.wire(%tile_4_2 : Core, %switchbox_4_2 : Core) +// CHECK: aie.wire(%tile_4_2 : DMA, %switchbox_4_2 : DMA) +// CHECK: aie.wire(%tile_5_3 : Core, %switchbox_5_3 : Core) +// CHECK: aie.wire(%tile_5_3 : DMA, %switchbox_5_3 : DMA) +// CHECK: aie.wire(%switchbox_5_3 : East, %switchbox_6_3 : West) +// CHECK: aie.wire(%tile_6_3 : Core, %switchbox_6_3 : Core) +// CHECK: aie.wire(%tile_6_3 : DMA, %switchbox_6_3 : DMA) +// CHECK: aie.wire(%tile_7_4 : Core, %switchbox_7_4 : Core) +// CHECK: aie.wire(%tile_7_4 : DMA, %switchbox_7_4 : DMA) +// CHECK: aie.wire(%tile_9_2 : Core, %switchbox_9_2 : Core) +// CHECK: aie.wire(%tile_9_2 : DMA, %switchbox_9_2 : DMA) +// CHECK: aie.wire(%switchbox_9_2 : East, %switchbox_10_2 : West) +// CHECK: aie.wire(%tile_10_2 : Core, %switchbox_10_2 : Core) +// CHECK: aie.wire(%tile_10_2 : DMA, %switchbox_10_2 : DMA) +// CHECK: aie.wire(%tile_11_3 : Core, %switchbox_11_3 : Core) +// CHECK: aie.wire(%tile_11_3 : DMA, %switchbox_11_3 : DMA) module { - AIE.device(xcvc1902) { - %tile_0_3 = AIE.tile(0, 3) - %tile_1_4 = AIE.tile(1, 4) - %tile_3_3 = AIE.tile(3, 3) - %tile_4_2 = AIE.tile(4, 2) - %tile_5_3 = AIE.tile(5, 3) - %tile_6_3 = AIE.tile(6, 3) - %tile_7_4 = AIE.tile(7, 4) - %tile_9_2 = AIE.tile(9, 2) - %tile_10_2 = AIE.tile(10, 2) - %tile_11_3 = AIE.tile(11, 3) + aie.device(xcvc1902) { + %tile_0_3 = aie.tile(0, 3) + %tile_1_4 = aie.tile(1, 4) + %tile_3_3 = aie.tile(3, 3) + %tile_4_2 = aie.tile(4, 2) + %tile_5_3 = aie.tile(5, 3) + %tile_6_3 = aie.tile(6, 3) + %tile_7_4 = aie.tile(7, 4) + %tile_9_2 = aie.tile(9, 2) + %tile_10_2 = aie.tile(10, 2) + %tile_11_3 = aie.tile(11, 3) - %switchbox_0_3 = AIE.switchbox(%tile_0_3) { - AIE.connect - AIE.connect + %switchbox_0_3 = aie.switchbox(%tile_0_3) { + aie.connect + aie.connect } - %switchbox_1_4 = AIE.switchbox(%tile_1_4) { - AIE.connect + %switchbox_1_4 = aie.switchbox(%tile_1_4) { + aie.connect } - %switchbox_3_3 = AIE.switchbox(%tile_3_3) { - AIE.connect + %switchbox_3_3 = aie.switchbox(%tile_3_3) { + aie.connect } - %switchbox_4_2 = AIE.switchbox(%tile_4_2) { - AIE.connect + %switchbox_4_2 = aie.switchbox(%tile_4_2) { + aie.connect } - %switchbox_5_3 = AIE.switchbox(%tile_5_3) { - AIE.connect + %switchbox_5_3 = aie.switchbox(%tile_5_3) { + aie.connect } - %switchbox_6_3 = AIE.switchbox(%tile_6_3) { - AIE.connect - AIE.connect + %switchbox_6_3 = aie.switchbox(%tile_6_3) { + aie.connect + aie.connect } - %switchbox_7_4 = AIE.switchbox(%tile_7_4) { - AIE.connect - AIE.connect + %switchbox_7_4 = aie.switchbox(%tile_7_4) { + aie.connect + aie.connect } - %switchbox_9_2 = AIE.switchbox(%tile_9_2) { - AIE.connect + %switchbox_9_2 = aie.switchbox(%tile_9_2) { + aie.connect } - %switchbox_10_2 = AIE.switchbox(%tile_10_2) { - AIE.connect + %switchbox_10_2 = aie.switchbox(%tile_10_2) { + aie.connect } - %switchbox_11_3 = AIE.switchbox(%tile_11_3) { - AIE.connect - AIE.connect + %switchbox_11_3 = aie.switchbox(%tile_11_3) { + aie.connect + aie.connect } } } // ----- -// CHECK: %tile_2_5 = AIE.tile(2, 5) -// CHECK: %tile_3_1 = AIE.tile(3, 1) -// CHECK: %tile_6_6 = AIE.tile(6, 6) -// CHECK: %tile_7_3 = AIE.tile(7, 3) -// CHECK: %tile_12_5 = AIE.tile(12, 5) -// CHECK: %tile_13_3 = AIE.tile(13, 3) -// CHECK: %switchbox_2_5 = AIE.switchbox(%tile_2_5) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %tile_2_5 = aie.tile(2, 5) +// CHECK: %tile_3_1 = aie.tile(3, 1) +// CHECK: %tile_6_6 = aie.tile(6, 6) +// CHECK: %tile_7_3 = aie.tile(7, 3) +// CHECK: %tile_12_5 = aie.tile(12, 5) +// CHECK: %tile_13_3 = aie.tile(13, 3) +// CHECK: %switchbox_2_5 = aie.switchbox(%tile_2_5) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_3_1 = AIE.switchbox(%tile_3_1) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_3_1 = aie.switchbox(%tile_3_1) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_6_6 = AIE.switchbox(%tile_6_6) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_6_6 = aie.switchbox(%tile_6_6) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_7_3 = AIE.switchbox(%tile_7_3) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_7_3 = aie.switchbox(%tile_7_3) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_12_5 = AIE.switchbox(%tile_12_5) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_12_5 = aie.switchbox(%tile_12_5) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_13_3 = AIE.switchbox(%tile_13_3) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_13_3 = aie.switchbox(%tile_13_3) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%tile_2_5 : Core, %switchbox_2_5 : Core) -// CHECK: AIE.wire(%tile_2_5 : DMA, %switchbox_2_5 : DMA) -// CHECK: AIE.wire(%tile_3_1 : Core, %switchbox_3_1 : Core) -// CHECK: AIE.wire(%tile_3_1 : DMA, %switchbox_3_1 : DMA) -// CHECK: AIE.wire(%tile_6_6 : Core, %switchbox_6_6 : Core) -// CHECK: AIE.wire(%tile_6_6 : DMA, %switchbox_6_6 : DMA) -// CHECK: AIE.wire(%tile_7_3 : Core, %switchbox_7_3 : Core) -// CHECK: AIE.wire(%tile_7_3 : DMA, %switchbox_7_3 : DMA) -// CHECK: AIE.wire(%tile_12_5 : Core, %switchbox_12_5 : Core) -// CHECK: AIE.wire(%tile_12_5 : DMA, %switchbox_12_5 : DMA) -// CHECK: AIE.wire(%tile_13_3 : Core, %switchbox_13_3 : Core) -// CHECK: AIE.wire(%tile_13_3 : DMA, %switchbox_13_3 : DMA) +// CHECK: aie.wire(%tile_2_5 : Core, %switchbox_2_5 : Core) +// CHECK: aie.wire(%tile_2_5 : DMA, %switchbox_2_5 : DMA) +// CHECK: aie.wire(%tile_3_1 : Core, %switchbox_3_1 : Core) +// CHECK: aie.wire(%tile_3_1 : DMA, %switchbox_3_1 : DMA) +// CHECK: aie.wire(%tile_6_6 : Core, %switchbox_6_6 : Core) +// CHECK: aie.wire(%tile_6_6 : DMA, %switchbox_6_6 : DMA) +// CHECK: aie.wire(%tile_7_3 : Core, %switchbox_7_3 : Core) +// CHECK: aie.wire(%tile_7_3 : DMA, %switchbox_7_3 : DMA) +// CHECK: aie.wire(%tile_12_5 : Core, %switchbox_12_5 : Core) +// CHECK: aie.wire(%tile_12_5 : DMA, %switchbox_12_5 : DMA) +// CHECK: aie.wire(%tile_13_3 : Core, %switchbox_13_3 : Core) +// CHECK: aie.wire(%tile_13_3 : DMA, %switchbox_13_3 : DMA) module { - AIE.device(xcvc1902) { - %tile_2_5 = AIE.tile(2, 5) - %tile_3_1 = AIE.tile(3, 1) - %tile_6_6 = AIE.tile(6, 6) - %tile_7_3 = AIE.tile(7, 3) - %tile_12_5 = AIE.tile(12, 5) - %tile_13_3 = AIE.tile(13, 3) + aie.device(xcvc1902) { + %tile_2_5 = aie.tile(2, 5) + %tile_3_1 = aie.tile(3, 1) + %tile_6_6 = aie.tile(6, 6) + %tile_7_3 = aie.tile(7, 3) + %tile_12_5 = aie.tile(12, 5) + %tile_13_3 = aie.tile(13, 3) - %switchbox_2_5 = AIE.switchbox(%tile_2_5) { - AIE.connect - AIE.connect + %switchbox_2_5 = aie.switchbox(%tile_2_5) { + aie.connect + aie.connect } - %switchbox_3_1 = AIE.switchbox(%tile_3_1) { - AIE.connect - AIE.connect + %switchbox_3_1 = aie.switchbox(%tile_3_1) { + aie.connect + aie.connect } - %switchbox_6_6 = AIE.switchbox(%tile_6_6) { - AIE.connect - AIE.connect + %switchbox_6_6 = aie.switchbox(%tile_6_6) { + aie.connect + aie.connect } - %switchbox_7_3 = AIE.switchbox(%tile_7_3) { - AIE.connect - AIE.connect + %switchbox_7_3 = aie.switchbox(%tile_7_3) { + aie.connect + aie.connect } - %switchbox_12_5 = AIE.switchbox(%tile_12_5) { - AIE.connect - AIE.connect + %switchbox_12_5 = aie.switchbox(%tile_12_5) { + aie.connect + aie.connect } - %switchbox_13_3 = AIE.switchbox(%tile_13_3) { - AIE.connect - AIE.connect + %switchbox_13_3 = aie.switchbox(%tile_13_3) { + aie.connect + aie.connect } } } diff --git a/test/create-flows/unit_flow_test_1.mlir b/test/create-flows/unit_flow_test_1.mlir index 654983e16a..1b00ece4c9 100644 --- a/test/create-flows/unit_flow_test_1.mlir +++ b/test/create-flows/unit_flow_test_1.mlir @@ -10,443 +10,443 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_3:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_5:.*]] = AIE.tile(5, 4) -// CHECK: %[[VAL_6:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_7:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_8:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_9:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_10:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_11:.*]] = AIE.tile(8, 4) -// CHECK: %[[VAL_12:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_13:.*]] = AIE.shim_mux(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_14:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_15:.*]] = AIE.switchbox(%[[VAL_14]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_17:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_19:.*]] = AIE.switchbox(%[[VAL_18]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_21:.*]] = AIE.switchbox(%[[VAL_20]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_22:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.tile(5, 3) -// CHECK: %[[VAL_25:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_28:.*]] = AIE.switchbox(%[[VAL_27]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_29:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_30:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.shim_mux(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_32:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_33:.*]] = AIE.switchbox(%[[VAL_32]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_34:.*]] = AIE.tile(5, 0) -// CHECK: %[[VAL_35:.*]] = AIE.switchbox(%[[VAL_34]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_36:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_37:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_38:.*]] = AIE.switchbox(%[[VAL_37]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_39:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_40:.*]] = AIE.switchbox(%[[VAL_39]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_42:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_43:.*]] = AIE.switchbox(%[[VAL_42]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_44:.*]] = AIE.switchbox(%[[VAL_5]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_45:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_46:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_47:.*]] = AIE.tile(6, 4) -// CHECK: %[[VAL_48:.*]] = AIE.switchbox(%[[VAL_47]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_49:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_50:.*]] = AIE.switchbox(%[[VAL_49]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_51:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_52:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_53:.*]] = AIE.switchbox(%[[VAL_52]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_54:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_55:.*]] = AIE.shim_mux(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_56:.*]] = AIE.tile(7, 4) -// CHECK: %[[VAL_57:.*]] = AIE.switchbox(%[[VAL_56]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_58:.*]] = AIE.switchbox(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_59:.*]] = AIE.shim_mux(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_60:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_61:.*]] = AIE.switchbox(%[[VAL_60]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_62:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_63:.*]] = AIE.switchbox(%[[VAL_62]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_64:.*]] = AIE.tile(8, 0) -// CHECK: %[[VAL_65:.*]] = AIE.switchbox(%[[VAL_64]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_66:.*]] = AIE.tile(8, 1) -// CHECK: %[[VAL_67:.*]] = AIE.switchbox(%[[VAL_66]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_68:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_69:.*]] = AIE.switchbox(%[[VAL_68]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_70:.*]] : North, %[[VAL_71:.*]] : South) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_70]] : DMA) -// CHECK: AIE.wire(%[[VAL_14]] : Core, %[[VAL_72:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_14]] : DMA, %[[VAL_72]] : DMA) -// CHECK: AIE.wire(%[[VAL_71]] : North, %[[VAL_72]] : South) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_73:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_73]] : DMA) -// CHECK: AIE.wire(%[[VAL_72]] : North, %[[VAL_73]] : South) -// CHECK: AIE.wire(%[[VAL_71]] : East, %[[VAL_74:.*]] : West) -// CHECK: AIE.wire(%[[VAL_75:.*]] : North, %[[VAL_74]] : South) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_75]] : DMA) -// CHECK: AIE.wire(%[[VAL_72]] : East, %[[VAL_76:.*]] : West) -// CHECK: AIE.wire(%[[VAL_42]] : Core, %[[VAL_76]] : Core) -// CHECK: AIE.wire(%[[VAL_42]] : DMA, %[[VAL_76]] : DMA) -// CHECK: AIE.wire(%[[VAL_74]] : North, %[[VAL_76]] : South) -// CHECK: AIE.wire(%[[VAL_73]] : East, %[[VAL_77:.*]] : West) -// CHECK: AIE.wire(%[[VAL_18]] : Core, %[[VAL_77]] : Core) -// CHECK: AIE.wire(%[[VAL_18]] : DMA, %[[VAL_77]] : DMA) -// CHECK: AIE.wire(%[[VAL_76]] : North, %[[VAL_77]] : South) -// CHECK: AIE.wire(%[[VAL_49]] : Core, %[[VAL_78:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_49]] : DMA, %[[VAL_78]] : DMA) -// CHECK: AIE.wire(%[[VAL_77]] : North, %[[VAL_78]] : South) -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_79:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_79]] : DMA) -// CHECK: AIE.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) -// CHECK: AIE.wire(%[[VAL_74]] : East, %[[VAL_80:.*]] : West) -// CHECK: AIE.wire(%[[VAL_76]] : East, %[[VAL_81:.*]] : West) -// CHECK: AIE.wire(%[[VAL_60]] : Core, %[[VAL_81]] : Core) -// CHECK: AIE.wire(%[[VAL_60]] : DMA, %[[VAL_81]] : DMA) -// CHECK: AIE.wire(%[[VAL_80]] : North, %[[VAL_81]] : South) -// CHECK: AIE.wire(%[[VAL_77]] : East, %[[VAL_82:.*]] : West) -// CHECK: AIE.wire(%[[VAL_20]] : Core, %[[VAL_82]] : Core) -// CHECK: AIE.wire(%[[VAL_20]] : DMA, %[[VAL_82]] : DMA) -// CHECK: AIE.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) -// CHECK: AIE.wire(%[[VAL_78]] : East, %[[VAL_83:.*]] : West) -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_83]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_83]] : DMA) -// CHECK: AIE.wire(%[[VAL_82]] : North, %[[VAL_83]] : South) -// CHECK: AIE.wire(%[[VAL_79]] : East, %[[VAL_84:.*]] : West) -// CHECK: AIE.wire(%[[VAL_4]] : Core, %[[VAL_84]] : Core) -// CHECK: AIE.wire(%[[VAL_4]] : DMA, %[[VAL_84]] : DMA) -// CHECK: AIE.wire(%[[VAL_83]] : North, %[[VAL_84]] : South) -// CHECK: AIE.wire(%[[VAL_80]] : East, %[[VAL_85:.*]] : West) -// CHECK: AIE.wire(%[[VAL_81]] : East, %[[VAL_86:.*]] : West) -// CHECK: AIE.wire(%[[VAL_52]] : Core, %[[VAL_86]] : Core) -// CHECK: AIE.wire(%[[VAL_52]] : DMA, %[[VAL_86]] : DMA) -// CHECK: AIE.wire(%[[VAL_85]] : North, %[[VAL_86]] : South) -// CHECK: AIE.wire(%[[VAL_82]] : East, %[[VAL_87:.*]] : West) -// CHECK: AIE.wire(%[[VAL_22]] : Core, %[[VAL_87]] : Core) -// CHECK: AIE.wire(%[[VAL_22]] : DMA, %[[VAL_87]] : DMA) -// CHECK: AIE.wire(%[[VAL_86]] : North, %[[VAL_87]] : South) -// CHECK: AIE.wire(%[[VAL_83]] : East, %[[VAL_88:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_88]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_88]] : DMA) -// CHECK: AIE.wire(%[[VAL_87]] : North, %[[VAL_88]] : South) -// CHECK: AIE.wire(%[[VAL_84]] : East, %[[VAL_89:.*]] : West) -// CHECK: AIE.wire(%[[VAL_5]] : Core, %[[VAL_89]] : Core) -// CHECK: AIE.wire(%[[VAL_5]] : DMA, %[[VAL_89]] : DMA) -// CHECK: AIE.wire(%[[VAL_88]] : North, %[[VAL_89]] : South) -// CHECK: AIE.wire(%[[VAL_85]] : East, %[[VAL_90:.*]] : West) -// CHECK: AIE.wire(%[[VAL_91:.*]] : North, %[[VAL_90]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_91]] : DMA) -// CHECK: AIE.wire(%[[VAL_86]] : East, %[[VAL_92:.*]] : West) -// CHECK: AIE.wire(%[[VAL_37]] : Core, %[[VAL_92]] : Core) -// CHECK: AIE.wire(%[[VAL_37]] : DMA, %[[VAL_92]] : DMA) -// CHECK: AIE.wire(%[[VAL_90]] : North, %[[VAL_92]] : South) -// CHECK: AIE.wire(%[[VAL_87]] : East, %[[VAL_93:.*]] : West) -// CHECK: AIE.wire(%[[VAL_39]] : Core, %[[VAL_93]] : Core) -// CHECK: AIE.wire(%[[VAL_39]] : DMA, %[[VAL_93]] : DMA) -// CHECK: AIE.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) -// CHECK: AIE.wire(%[[VAL_88]] : East, %[[VAL_94:.*]] : West) -// CHECK: AIE.wire(%[[VAL_7]] : Core, %[[VAL_94]] : Core) -// CHECK: AIE.wire(%[[VAL_7]] : DMA, %[[VAL_94]] : DMA) -// CHECK: AIE.wire(%[[VAL_93]] : North, %[[VAL_94]] : South) -// CHECK: AIE.wire(%[[VAL_89]] : East, %[[VAL_95:.*]] : West) -// CHECK: AIE.wire(%[[VAL_47]] : Core, %[[VAL_95]] : Core) -// CHECK: AIE.wire(%[[VAL_47]] : DMA, %[[VAL_95]] : DMA) -// CHECK: AIE.wire(%[[VAL_94]] : North, %[[VAL_95]] : South) -// CHECK: AIE.wire(%[[VAL_90]] : East, %[[VAL_96:.*]] : West) -// CHECK: AIE.wire(%[[VAL_97:.*]] : North, %[[VAL_96]] : South) -// CHECK: AIE.wire(%[[VAL_8]] : DMA, %[[VAL_97]] : DMA) -// CHECK: AIE.wire(%[[VAL_92]] : East, %[[VAL_98:.*]] : West) -// CHECK: AIE.wire(%[[VAL_62]] : Core, %[[VAL_98]] : Core) -// CHECK: AIE.wire(%[[VAL_62]] : DMA, %[[VAL_98]] : DMA) -// CHECK: AIE.wire(%[[VAL_96]] : North, %[[VAL_98]] : South) -// CHECK: AIE.wire(%[[VAL_93]] : East, %[[VAL_99:.*]] : West) -// CHECK: AIE.wire(%[[VAL_9]] : Core, %[[VAL_99]] : Core) -// CHECK: AIE.wire(%[[VAL_9]] : DMA, %[[VAL_99]] : DMA) -// CHECK: AIE.wire(%[[VAL_98]] : North, %[[VAL_99]] : South) -// CHECK: AIE.wire(%[[VAL_94]] : East, %[[VAL_100:.*]] : West) -// CHECK: AIE.wire(%[[VAL_27]] : Core, %[[VAL_100]] : Core) -// CHECK: AIE.wire(%[[VAL_27]] : DMA, %[[VAL_100]] : DMA) -// CHECK: AIE.wire(%[[VAL_99]] : North, %[[VAL_100]] : South) -// CHECK: AIE.wire(%[[VAL_95]] : East, %[[VAL_101:.*]] : West) -// CHECK: AIE.wire(%[[VAL_56]] : Core, %[[VAL_101]] : Core) -// CHECK: AIE.wire(%[[VAL_56]] : DMA, %[[VAL_101]] : DMA) -// CHECK: AIE.wire(%[[VAL_100]] : North, %[[VAL_101]] : South) -// CHECK: AIE.wire(%[[VAL_96]] : East, %[[VAL_102:.*]] : West) -// CHECK: AIE.wire(%[[VAL_98]] : East, %[[VAL_103:.*]] : West) -// CHECK: AIE.wire(%[[VAL_66]] : Core, %[[VAL_103]] : Core) -// CHECK: AIE.wire(%[[VAL_66]] : DMA, %[[VAL_103]] : DMA) -// CHECK: AIE.wire(%[[VAL_102]] : North, %[[VAL_103]] : South) -// CHECK: AIE.wire(%[[VAL_99]] : East, %[[VAL_104:.*]] : West) -// CHECK: AIE.wire(%[[VAL_68]] : Core, %[[VAL_104]] : Core) -// CHECK: AIE.wire(%[[VAL_68]] : DMA, %[[VAL_104]] : DMA) -// CHECK: AIE.wire(%[[VAL_103]] : North, %[[VAL_104]] : South) -// CHECK: AIE.wire(%[[VAL_100]] : East, %[[VAL_105:.*]] : West) -// CHECK: AIE.wire(%[[VAL_10]] : Core, %[[VAL_105]] : Core) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_105]] : DMA) -// CHECK: AIE.wire(%[[VAL_104]] : North, %[[VAL_105]] : South) -// CHECK: AIE.wire(%[[VAL_101]] : East, %[[VAL_106:.*]] : West) -// CHECK: AIE.wire(%[[VAL_11]] : Core, %[[VAL_106]] : Core) -// CHECK: AIE.wire(%[[VAL_11]] : DMA, %[[VAL_106]] : DMA) -// CHECK: AIE.wire(%[[VAL_105]] : North, %[[VAL_106]] : South) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_3:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_5:.*]] = aie.tile(5, 4) +// CHECK: %[[VAL_6:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_7:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_8:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_9:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_10:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_11:.*]] = aie.tile(8, 4) +// CHECK: %[[VAL_12:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_13:.*]] = aie.shim_mux(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_14:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_15:.*]] = aie.switchbox(%[[VAL_14]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_16:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_17:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_18:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_19:.*]] = aie.switchbox(%[[VAL_18]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_20:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_21:.*]] = aie.switchbox(%[[VAL_20]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_22:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_24:.*]] = aie.tile(5, 3) +// CHECK: %[[VAL_25:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_26:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_27:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_28:.*]] = aie.switchbox(%[[VAL_27]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_29:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_30:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_31:.*]] = aie.shim_mux(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_32:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_33:.*]] = aie.switchbox(%[[VAL_32]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_34:.*]] = aie.tile(5, 0) +// CHECK: %[[VAL_35:.*]] = aie.switchbox(%[[VAL_34]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_36:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_37:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_38:.*]] = aie.switchbox(%[[VAL_37]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_39:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_40:.*]] = aie.switchbox(%[[VAL_39]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_41:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_42:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_43:.*]] = aie.switchbox(%[[VAL_42]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_44:.*]] = aie.switchbox(%[[VAL_5]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_45:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_46:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_47:.*]] = aie.tile(6, 4) +// CHECK: %[[VAL_48:.*]] = aie.switchbox(%[[VAL_47]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_49:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_50:.*]] = aie.switchbox(%[[VAL_49]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_51:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_52:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_53:.*]] = aie.switchbox(%[[VAL_52]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_54:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_55:.*]] = aie.shim_mux(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_56:.*]] = aie.tile(7, 4) +// CHECK: %[[VAL_57:.*]] = aie.switchbox(%[[VAL_56]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_58:.*]] = aie.switchbox(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_59:.*]] = aie.shim_mux(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_60:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_61:.*]] = aie.switchbox(%[[VAL_60]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_62:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_63:.*]] = aie.switchbox(%[[VAL_62]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_64:.*]] = aie.tile(8, 0) +// CHECK: %[[VAL_65:.*]] = aie.switchbox(%[[VAL_64]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_66:.*]] = aie.tile(8, 1) +// CHECK: %[[VAL_67:.*]] = aie.switchbox(%[[VAL_66]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_68:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_69:.*]] = aie.switchbox(%[[VAL_68]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_70:.*]] : North, %[[VAL_71:.*]] : South) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_70]] : DMA) +// CHECK: aie.wire(%[[VAL_14]] : Core, %[[VAL_72:.*]] : Core) +// CHECK: aie.wire(%[[VAL_14]] : DMA, %[[VAL_72]] : DMA) +// CHECK: aie.wire(%[[VAL_71]] : North, %[[VAL_72]] : South) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_73:.*]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_73]] : DMA) +// CHECK: aie.wire(%[[VAL_72]] : North, %[[VAL_73]] : South) +// CHECK: aie.wire(%[[VAL_71]] : East, %[[VAL_74:.*]] : West) +// CHECK: aie.wire(%[[VAL_75:.*]] : North, %[[VAL_74]] : South) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_75]] : DMA) +// CHECK: aie.wire(%[[VAL_72]] : East, %[[VAL_76:.*]] : West) +// CHECK: aie.wire(%[[VAL_42]] : Core, %[[VAL_76]] : Core) +// CHECK: aie.wire(%[[VAL_42]] : DMA, %[[VAL_76]] : DMA) +// CHECK: aie.wire(%[[VAL_74]] : North, %[[VAL_76]] : South) +// CHECK: aie.wire(%[[VAL_73]] : East, %[[VAL_77:.*]] : West) +// CHECK: aie.wire(%[[VAL_18]] : Core, %[[VAL_77]] : Core) +// CHECK: aie.wire(%[[VAL_18]] : DMA, %[[VAL_77]] : DMA) +// CHECK: aie.wire(%[[VAL_76]] : North, %[[VAL_77]] : South) +// CHECK: aie.wire(%[[VAL_49]] : Core, %[[VAL_78:.*]] : Core) +// CHECK: aie.wire(%[[VAL_49]] : DMA, %[[VAL_78]] : DMA) +// CHECK: aie.wire(%[[VAL_77]] : North, %[[VAL_78]] : South) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_79:.*]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_79]] : DMA) +// CHECK: aie.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) +// CHECK: aie.wire(%[[VAL_74]] : East, %[[VAL_80:.*]] : West) +// CHECK: aie.wire(%[[VAL_76]] : East, %[[VAL_81:.*]] : West) +// CHECK: aie.wire(%[[VAL_60]] : Core, %[[VAL_81]] : Core) +// CHECK: aie.wire(%[[VAL_60]] : DMA, %[[VAL_81]] : DMA) +// CHECK: aie.wire(%[[VAL_80]] : North, %[[VAL_81]] : South) +// CHECK: aie.wire(%[[VAL_77]] : East, %[[VAL_82:.*]] : West) +// CHECK: aie.wire(%[[VAL_20]] : Core, %[[VAL_82]] : Core) +// CHECK: aie.wire(%[[VAL_20]] : DMA, %[[VAL_82]] : DMA) +// CHECK: aie.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) +// CHECK: aie.wire(%[[VAL_78]] : East, %[[VAL_83:.*]] : West) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_83]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_83]] : DMA) +// CHECK: aie.wire(%[[VAL_82]] : North, %[[VAL_83]] : South) +// CHECK: aie.wire(%[[VAL_79]] : East, %[[VAL_84:.*]] : West) +// CHECK: aie.wire(%[[VAL_4]] : Core, %[[VAL_84]] : Core) +// CHECK: aie.wire(%[[VAL_4]] : DMA, %[[VAL_84]] : DMA) +// CHECK: aie.wire(%[[VAL_83]] : North, %[[VAL_84]] : South) +// CHECK: aie.wire(%[[VAL_80]] : East, %[[VAL_85:.*]] : West) +// CHECK: aie.wire(%[[VAL_81]] : East, %[[VAL_86:.*]] : West) +// CHECK: aie.wire(%[[VAL_52]] : Core, %[[VAL_86]] : Core) +// CHECK: aie.wire(%[[VAL_52]] : DMA, %[[VAL_86]] : DMA) +// CHECK: aie.wire(%[[VAL_85]] : North, %[[VAL_86]] : South) +// CHECK: aie.wire(%[[VAL_82]] : East, %[[VAL_87:.*]] : West) +// CHECK: aie.wire(%[[VAL_22]] : Core, %[[VAL_87]] : Core) +// CHECK: aie.wire(%[[VAL_22]] : DMA, %[[VAL_87]] : DMA) +// CHECK: aie.wire(%[[VAL_86]] : North, %[[VAL_87]] : South) +// CHECK: aie.wire(%[[VAL_83]] : East, %[[VAL_88:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_88]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_88]] : DMA) +// CHECK: aie.wire(%[[VAL_87]] : North, %[[VAL_88]] : South) +// CHECK: aie.wire(%[[VAL_84]] : East, %[[VAL_89:.*]] : West) +// CHECK: aie.wire(%[[VAL_5]] : Core, %[[VAL_89]] : Core) +// CHECK: aie.wire(%[[VAL_5]] : DMA, %[[VAL_89]] : DMA) +// CHECK: aie.wire(%[[VAL_88]] : North, %[[VAL_89]] : South) +// CHECK: aie.wire(%[[VAL_85]] : East, %[[VAL_90:.*]] : West) +// CHECK: aie.wire(%[[VAL_91:.*]] : North, %[[VAL_90]] : South) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_91]] : DMA) +// CHECK: aie.wire(%[[VAL_86]] : East, %[[VAL_92:.*]] : West) +// CHECK: aie.wire(%[[VAL_37]] : Core, %[[VAL_92]] : Core) +// CHECK: aie.wire(%[[VAL_37]] : DMA, %[[VAL_92]] : DMA) +// CHECK: aie.wire(%[[VAL_90]] : North, %[[VAL_92]] : South) +// CHECK: aie.wire(%[[VAL_87]] : East, %[[VAL_93:.*]] : West) +// CHECK: aie.wire(%[[VAL_39]] : Core, %[[VAL_93]] : Core) +// CHECK: aie.wire(%[[VAL_39]] : DMA, %[[VAL_93]] : DMA) +// CHECK: aie.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) +// CHECK: aie.wire(%[[VAL_88]] : East, %[[VAL_94:.*]] : West) +// CHECK: aie.wire(%[[VAL_7]] : Core, %[[VAL_94]] : Core) +// CHECK: aie.wire(%[[VAL_7]] : DMA, %[[VAL_94]] : DMA) +// CHECK: aie.wire(%[[VAL_93]] : North, %[[VAL_94]] : South) +// CHECK: aie.wire(%[[VAL_89]] : East, %[[VAL_95:.*]] : West) +// CHECK: aie.wire(%[[VAL_47]] : Core, %[[VAL_95]] : Core) +// CHECK: aie.wire(%[[VAL_47]] : DMA, %[[VAL_95]] : DMA) +// CHECK: aie.wire(%[[VAL_94]] : North, %[[VAL_95]] : South) +// CHECK: aie.wire(%[[VAL_90]] : East, %[[VAL_96:.*]] : West) +// CHECK: aie.wire(%[[VAL_97:.*]] : North, %[[VAL_96]] : South) +// CHECK: aie.wire(%[[VAL_8]] : DMA, %[[VAL_97]] : DMA) +// CHECK: aie.wire(%[[VAL_92]] : East, %[[VAL_98:.*]] : West) +// CHECK: aie.wire(%[[VAL_62]] : Core, %[[VAL_98]] : Core) +// CHECK: aie.wire(%[[VAL_62]] : DMA, %[[VAL_98]] : DMA) +// CHECK: aie.wire(%[[VAL_96]] : North, %[[VAL_98]] : South) +// CHECK: aie.wire(%[[VAL_93]] : East, %[[VAL_99:.*]] : West) +// CHECK: aie.wire(%[[VAL_9]] : Core, %[[VAL_99]] : Core) +// CHECK: aie.wire(%[[VAL_9]] : DMA, %[[VAL_99]] : DMA) +// CHECK: aie.wire(%[[VAL_98]] : North, %[[VAL_99]] : South) +// CHECK: aie.wire(%[[VAL_94]] : East, %[[VAL_100:.*]] : West) +// CHECK: aie.wire(%[[VAL_27]] : Core, %[[VAL_100]] : Core) +// CHECK: aie.wire(%[[VAL_27]] : DMA, %[[VAL_100]] : DMA) +// CHECK: aie.wire(%[[VAL_99]] : North, %[[VAL_100]] : South) +// CHECK: aie.wire(%[[VAL_95]] : East, %[[VAL_101:.*]] : West) +// CHECK: aie.wire(%[[VAL_56]] : Core, %[[VAL_101]] : Core) +// CHECK: aie.wire(%[[VAL_56]] : DMA, %[[VAL_101]] : DMA) +// CHECK: aie.wire(%[[VAL_100]] : North, %[[VAL_101]] : South) +// CHECK: aie.wire(%[[VAL_96]] : East, %[[VAL_102:.*]] : West) +// CHECK: aie.wire(%[[VAL_98]] : East, %[[VAL_103:.*]] : West) +// CHECK: aie.wire(%[[VAL_66]] : Core, %[[VAL_103]] : Core) +// CHECK: aie.wire(%[[VAL_66]] : DMA, %[[VAL_103]] : DMA) +// CHECK: aie.wire(%[[VAL_102]] : North, %[[VAL_103]] : South) +// CHECK: aie.wire(%[[VAL_99]] : East, %[[VAL_104:.*]] : West) +// CHECK: aie.wire(%[[VAL_68]] : Core, %[[VAL_104]] : Core) +// CHECK: aie.wire(%[[VAL_68]] : DMA, %[[VAL_104]] : DMA) +// CHECK: aie.wire(%[[VAL_103]] : North, %[[VAL_104]] : South) +// CHECK: aie.wire(%[[VAL_100]] : East, %[[VAL_105:.*]] : West) +// CHECK: aie.wire(%[[VAL_10]] : Core, %[[VAL_105]] : Core) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_105]] : DMA) +// CHECK: aie.wire(%[[VAL_104]] : North, %[[VAL_105]] : South) +// CHECK: aie.wire(%[[VAL_101]] : East, %[[VAL_106:.*]] : West) +// CHECK: aie.wire(%[[VAL_11]] : Core, %[[VAL_106]] : Core) +// CHECK: aie.wire(%[[VAL_11]] : DMA, %[[VAL_106]] : DMA) +// CHECK: aie.wire(%[[VAL_105]] : North, %[[VAL_106]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t34 = AIE.tile(3, 4) - %t43 = AIE.tile(4, 3) - %t44 = AIE.tile(4, 4) - %t54 = AIE.tile(5, 4) - %t60 = AIE.tile(6, 0) - %t63 = AIE.tile(6, 3) - %t70 = AIE.tile(7, 0) - %t72 = AIE.tile(7, 2) - %t83 = AIE.tile(8, 3) - %t84 = AIE.tile(8, 4) + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t34 = aie.tile(3, 4) + %t43 = aie.tile(4, 3) + %t44 = aie.tile(4, 4) + %t54 = aie.tile(5, 4) + %t60 = aie.tile(6, 0) + %t63 = aie.tile(6, 3) + %t70 = aie.tile(7, 0) + %t72 = aie.tile(7, 2) + %t83 = aie.tile(8, 3) + %t84 = aie.tile(8, 4) - AIE.flow(%t20, DMA : 0, %t63, DMA : 0) - AIE.flow(%t20, DMA : 1, %t83, DMA : 0) - AIE.flow(%t30, DMA : 0, %t72, DMA : 0) - AIE.flow(%t30, DMA : 1, %t54, DMA : 0) + aie.flow(%t20, DMA : 0, %t63, DMA : 0) + aie.flow(%t20, DMA : 1, %t83, DMA : 0) + aie.flow(%t30, DMA : 0, %t72, DMA : 0) + aie.flow(%t30, DMA : 1, %t54, DMA : 0) - AIE.flow(%t34, Core : 0, %t63, Core : 1) - AIE.flow(%t34, DMA : 1, %t70, DMA : 0) - AIE.flow(%t43, Core : 0, %t84, Core : 1) - AIE.flow(%t43, DMA : 1, %t60, DMA : 1) + aie.flow(%t34, Core : 0, %t63, Core : 1) + aie.flow(%t34, DMA : 1, %t70, DMA : 0) + aie.flow(%t43, Core : 0, %t84, Core : 1) + aie.flow(%t43, DMA : 1, %t60, DMA : 1) - AIE.flow(%t44, Core : 0, %t54, Core : 1) - AIE.flow(%t44, DMA : 1, %t60, DMA : 0) - AIE.flow(%t54, Core : 0, %t43, Core : 1) - AIE.flow(%t54, DMA : 1, %t30, DMA : 1) + aie.flow(%t44, Core : 0, %t54, Core : 1) + aie.flow(%t44, DMA : 1, %t60, DMA : 0) + aie.flow(%t54, Core : 0, %t43, Core : 1) + aie.flow(%t54, DMA : 1, %t30, DMA : 1) - AIE.flow(%t60, DMA : 0, %t44, DMA : 0) - AIE.flow(%t60, DMA : 1, %t43, DMA : 0) - AIE.flow(%t63, Core : 0, %t34, Core : 1) - AIE.flow(%t63, DMA : 1, %t20, DMA : 1) + aie.flow(%t60, DMA : 0, %t44, DMA : 0) + aie.flow(%t60, DMA : 1, %t43, DMA : 0) + aie.flow(%t63, Core : 0, %t34, Core : 1) + aie.flow(%t63, DMA : 1, %t20, DMA : 1) - AIE.flow(%t70, DMA : 0, %t34, DMA : 0) - AIE.flow(%t70, DMA : 1, %t84, DMA : 0) - AIE.flow(%t72, Core : 0, %t83, Core : 1) - AIE.flow(%t72, DMA : 1, %t30, DMA : 0) + aie.flow(%t70, DMA : 0, %t34, DMA : 0) + aie.flow(%t70, DMA : 1, %t84, DMA : 0) + aie.flow(%t72, Core : 0, %t83, Core : 1) + aie.flow(%t72, DMA : 1, %t30, DMA : 0) - AIE.flow(%t83, Core : 0, %t44, Core : 1) - AIE.flow(%t83, DMA : 1, %t20, DMA : 0) - AIE.flow(%t84, Core : 0, %t72, Core : 1) - AIE.flow(%t84, DMA : 1, %t70, DMA : 1) + aie.flow(%t83, Core : 0, %t44, Core : 1) + aie.flow(%t83, DMA : 1, %t20, DMA : 0) + aie.flow(%t84, Core : 0, %t72, Core : 1) + aie.flow(%t84, DMA : 1, %t70, DMA : 1) } } diff --git a/test/create-flows/unit_flow_test_2.mlir b/test/create-flows/unit_flow_test_2.mlir index fac3541daf..7ecbed58e6 100644 --- a/test/create-flows/unit_flow_test_2.mlir +++ b/test/create-flows/unit_flow_test_2.mlir @@ -10,266 +10,266 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_3:.*]] = AIE.tile(0, 4) -// CHECK: %[[VAL_4:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_5:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_6:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_7:.*]] = AIE.tile(1, 4) -// CHECK: %[[VAL_8:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_9:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_10:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_11:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_12:.*]] = AIE.tile(2, 4) -// CHECK: %[[VAL_13:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_14:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_15:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_16:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_17:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_18:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_19:.*]] = AIE.switchbox(%[[VAL_18]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_3:.*]] = aie.tile(0, 4) +// CHECK: %[[VAL_4:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_5:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_6:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_7:.*]] = aie.tile(1, 4) +// CHECK: %[[VAL_8:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_9:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_10:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_11:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_12:.*]] = aie.tile(2, 4) +// CHECK: %[[VAL_13:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_14:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_15:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_16:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_17:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_18:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_19:.*]] = aie.switchbox(%[[VAL_18]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_20:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_21:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_21:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_22:.*]] = AIE.shim_mux(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_22:.*]] = aie.shim_mux(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_24:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_25:.*]] = AIE.switchbox(%[[VAL_5]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_25:.*]] = aie.switchbox(%[[VAL_5]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_26:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_27:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_28:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_28:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_29:.*]] = AIE.switchbox(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_29:.*]] = aie.switchbox(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_30:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_30:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_31:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_32:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_32:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_33:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_34:.*]] = AIE.switchbox(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_34:.*]] = aie.switchbox(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_35:.*]] = AIE.shim_mux(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_35:.*]] = aie.shim_mux(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_36:.*]] = AIE.switchbox(%[[VAL_15]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_36:.*]] = aie.switchbox(%[[VAL_15]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_37:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_37:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_38:.*]] = AIE.switchbox(%[[VAL_17]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_38:.*]] = aie.switchbox(%[[VAL_17]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_39:.*]] = AIE.switchbox(%[[VAL_14]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_39:.*]] = aie.switchbox(%[[VAL_14]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_40:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_40]] : DMA) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_41:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_41]] : DMA) -// CHECK: AIE.wire(%[[VAL_40]] : North, %[[VAL_41]] : South) -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_42:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_42]] : DMA) -// CHECK: AIE.wire(%[[VAL_41]] : North, %[[VAL_42]] : South) -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_43:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_43]] : DMA) -// CHECK: AIE.wire(%[[VAL_42]] : North, %[[VAL_43]] : South) -// CHECK: AIE.wire(%[[VAL_40]] : East, %[[VAL_44:.*]] : West) -// CHECK: AIE.wire(%[[VAL_4]] : Core, %[[VAL_44]] : Core) -// CHECK: AIE.wire(%[[VAL_4]] : DMA, %[[VAL_44]] : DMA) -// CHECK: AIE.wire(%[[VAL_45:.*]] : North, %[[VAL_44]] : South) -// CHECK: AIE.wire(%[[VAL_41]] : East, %[[VAL_46:.*]] : West) -// CHECK: AIE.wire(%[[VAL_5]] : Core, %[[VAL_46]] : Core) -// CHECK: AIE.wire(%[[VAL_5]] : DMA, %[[VAL_46]] : DMA) -// CHECK: AIE.wire(%[[VAL_44]] : North, %[[VAL_46]] : South) -// CHECK: AIE.wire(%[[VAL_42]] : East, %[[VAL_47:.*]] : West) -// CHECK: AIE.wire(%[[VAL_6]] : Core, %[[VAL_47]] : Core) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_47]] : DMA) -// CHECK: AIE.wire(%[[VAL_46]] : North, %[[VAL_47]] : South) -// CHECK: AIE.wire(%[[VAL_43]] : East, %[[VAL_48:.*]] : West) -// CHECK: AIE.wire(%[[VAL_7]] : Core, %[[VAL_48]] : Core) -// CHECK: AIE.wire(%[[VAL_7]] : DMA, %[[VAL_48]] : DMA) -// CHECK: AIE.wire(%[[VAL_47]] : North, %[[VAL_48]] : South) -// CHECK: AIE.wire(%[[VAL_45]] : East, %[[VAL_49:.*]] : West) -// CHECK: AIE.wire(%[[VAL_50:.*]] : North, %[[VAL_49]] : South) -// CHECK: AIE.wire(%[[VAL_8]] : DMA, %[[VAL_50]] : DMA) -// CHECK: AIE.wire(%[[VAL_44]] : East, %[[VAL_51:.*]] : West) -// CHECK: AIE.wire(%[[VAL_9]] : Core, %[[VAL_51]] : Core) -// CHECK: AIE.wire(%[[VAL_9]] : DMA, %[[VAL_51]] : DMA) -// CHECK: AIE.wire(%[[VAL_49]] : North, %[[VAL_51]] : South) -// CHECK: AIE.wire(%[[VAL_46]] : East, %[[VAL_52:.*]] : West) -// CHECK: AIE.wire(%[[VAL_10]] : Core, %[[VAL_52]] : Core) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_52]] : DMA) -// CHECK: AIE.wire(%[[VAL_51]] : North, %[[VAL_52]] : South) -// CHECK: AIE.wire(%[[VAL_47]] : East, %[[VAL_53:.*]] : West) -// CHECK: AIE.wire(%[[VAL_11]] : Core, %[[VAL_53]] : Core) -// CHECK: AIE.wire(%[[VAL_11]] : DMA, %[[VAL_53]] : DMA) -// CHECK: AIE.wire(%[[VAL_52]] : North, %[[VAL_53]] : South) -// CHECK: AIE.wire(%[[VAL_48]] : East, %[[VAL_54:.*]] : West) -// CHECK: AIE.wire(%[[VAL_12]] : Core, %[[VAL_54]] : Core) -// CHECK: AIE.wire(%[[VAL_12]] : DMA, %[[VAL_54]] : DMA) -// CHECK: AIE.wire(%[[VAL_53]] : North, %[[VAL_54]] : South) -// CHECK: AIE.wire(%[[VAL_49]] : East, %[[VAL_55:.*]] : West) -// CHECK: AIE.wire(%[[VAL_56:.*]] : North, %[[VAL_55]] : South) -// CHECK: AIE.wire(%[[VAL_13]] : DMA, %[[VAL_56]] : DMA) -// CHECK: AIE.wire(%[[VAL_51]] : East, %[[VAL_57:.*]] : West) -// CHECK: AIE.wire(%[[VAL_14]] : Core, %[[VAL_57]] : Core) -// CHECK: AIE.wire(%[[VAL_14]] : DMA, %[[VAL_57]] : DMA) -// CHECK: AIE.wire(%[[VAL_55]] : North, %[[VAL_57]] : South) -// CHECK: AIE.wire(%[[VAL_52]] : East, %[[VAL_58:.*]] : West) -// CHECK: AIE.wire(%[[VAL_15]] : Core, %[[VAL_58]] : Core) -// CHECK: AIE.wire(%[[VAL_15]] : DMA, %[[VAL_58]] : DMA) -// CHECK: AIE.wire(%[[VAL_57]] : North, %[[VAL_58]] : South) -// CHECK: AIE.wire(%[[VAL_53]] : East, %[[VAL_59:.*]] : West) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_59]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_59]] : DMA) -// CHECK: AIE.wire(%[[VAL_58]] : North, %[[VAL_59]] : South) -// CHECK: AIE.wire(%[[VAL_54]] : East, %[[VAL_60:.*]] : West) -// CHECK: AIE.wire(%[[VAL_17]] : Core, %[[VAL_60]] : Core) -// CHECK: AIE.wire(%[[VAL_17]] : DMA, %[[VAL_60]] : DMA) -// CHECK: AIE.wire(%[[VAL_59]] : North, %[[VAL_60]] : South) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_40:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_40]] : DMA) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_41:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_41]] : DMA) +// CHECK: aie.wire(%[[VAL_40]] : North, %[[VAL_41]] : South) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_42:.*]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_42]] : DMA) +// CHECK: aie.wire(%[[VAL_41]] : North, %[[VAL_42]] : South) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_43:.*]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_43]] : DMA) +// CHECK: aie.wire(%[[VAL_42]] : North, %[[VAL_43]] : South) +// CHECK: aie.wire(%[[VAL_40]] : East, %[[VAL_44:.*]] : West) +// CHECK: aie.wire(%[[VAL_4]] : Core, %[[VAL_44]] : Core) +// CHECK: aie.wire(%[[VAL_4]] : DMA, %[[VAL_44]] : DMA) +// CHECK: aie.wire(%[[VAL_45:.*]] : North, %[[VAL_44]] : South) +// CHECK: aie.wire(%[[VAL_41]] : East, %[[VAL_46:.*]] : West) +// CHECK: aie.wire(%[[VAL_5]] : Core, %[[VAL_46]] : Core) +// CHECK: aie.wire(%[[VAL_5]] : DMA, %[[VAL_46]] : DMA) +// CHECK: aie.wire(%[[VAL_44]] : North, %[[VAL_46]] : South) +// CHECK: aie.wire(%[[VAL_42]] : East, %[[VAL_47:.*]] : West) +// CHECK: aie.wire(%[[VAL_6]] : Core, %[[VAL_47]] : Core) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_47]] : DMA) +// CHECK: aie.wire(%[[VAL_46]] : North, %[[VAL_47]] : South) +// CHECK: aie.wire(%[[VAL_43]] : East, %[[VAL_48:.*]] : West) +// CHECK: aie.wire(%[[VAL_7]] : Core, %[[VAL_48]] : Core) +// CHECK: aie.wire(%[[VAL_7]] : DMA, %[[VAL_48]] : DMA) +// CHECK: aie.wire(%[[VAL_47]] : North, %[[VAL_48]] : South) +// CHECK: aie.wire(%[[VAL_45]] : East, %[[VAL_49:.*]] : West) +// CHECK: aie.wire(%[[VAL_50:.*]] : North, %[[VAL_49]] : South) +// CHECK: aie.wire(%[[VAL_8]] : DMA, %[[VAL_50]] : DMA) +// CHECK: aie.wire(%[[VAL_44]] : East, %[[VAL_51:.*]] : West) +// CHECK: aie.wire(%[[VAL_9]] : Core, %[[VAL_51]] : Core) +// CHECK: aie.wire(%[[VAL_9]] : DMA, %[[VAL_51]] : DMA) +// CHECK: aie.wire(%[[VAL_49]] : North, %[[VAL_51]] : South) +// CHECK: aie.wire(%[[VAL_46]] : East, %[[VAL_52:.*]] : West) +// CHECK: aie.wire(%[[VAL_10]] : Core, %[[VAL_52]] : Core) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_52]] : DMA) +// CHECK: aie.wire(%[[VAL_51]] : North, %[[VAL_52]] : South) +// CHECK: aie.wire(%[[VAL_47]] : East, %[[VAL_53:.*]] : West) +// CHECK: aie.wire(%[[VAL_11]] : Core, %[[VAL_53]] : Core) +// CHECK: aie.wire(%[[VAL_11]] : DMA, %[[VAL_53]] : DMA) +// CHECK: aie.wire(%[[VAL_52]] : North, %[[VAL_53]] : South) +// CHECK: aie.wire(%[[VAL_48]] : East, %[[VAL_54:.*]] : West) +// CHECK: aie.wire(%[[VAL_12]] : Core, %[[VAL_54]] : Core) +// CHECK: aie.wire(%[[VAL_12]] : DMA, %[[VAL_54]] : DMA) +// CHECK: aie.wire(%[[VAL_53]] : North, %[[VAL_54]] : South) +// CHECK: aie.wire(%[[VAL_49]] : East, %[[VAL_55:.*]] : West) +// CHECK: aie.wire(%[[VAL_56:.*]] : North, %[[VAL_55]] : South) +// CHECK: aie.wire(%[[VAL_13]] : DMA, %[[VAL_56]] : DMA) +// CHECK: aie.wire(%[[VAL_51]] : East, %[[VAL_57:.*]] : West) +// CHECK: aie.wire(%[[VAL_14]] : Core, %[[VAL_57]] : Core) +// CHECK: aie.wire(%[[VAL_14]] : DMA, %[[VAL_57]] : DMA) +// CHECK: aie.wire(%[[VAL_55]] : North, %[[VAL_57]] : South) +// CHECK: aie.wire(%[[VAL_52]] : East, %[[VAL_58:.*]] : West) +// CHECK: aie.wire(%[[VAL_15]] : Core, %[[VAL_58]] : Core) +// CHECK: aie.wire(%[[VAL_15]] : DMA, %[[VAL_58]] : DMA) +// CHECK: aie.wire(%[[VAL_57]] : North, %[[VAL_58]] : South) +// CHECK: aie.wire(%[[VAL_53]] : East, %[[VAL_59:.*]] : West) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_59]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_59]] : DMA) +// CHECK: aie.wire(%[[VAL_58]] : North, %[[VAL_59]] : South) +// CHECK: aie.wire(%[[VAL_54]] : East, %[[VAL_60:.*]] : West) +// CHECK: aie.wire(%[[VAL_17]] : Core, %[[VAL_60]] : Core) +// CHECK: aie.wire(%[[VAL_17]] : DMA, %[[VAL_60]] : DMA) +// CHECK: aie.wire(%[[VAL_59]] : North, %[[VAL_60]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t04 = AIE.tile(0, 4) - %t11 = AIE.tile(1, 1) - %t12 = AIE.tile(1, 2) - %t13 = AIE.tile(1, 3) - %t14 = AIE.tile(1, 4) - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 2) - %t23 = AIE.tile(2, 3) - %t24 = AIE.tile(2, 4) - %t30 = AIE.tile(3, 0) - %t31 = AIE.tile(3, 1) - %t32 = AIE.tile(3, 2) - %t33 = AIE.tile(3, 3) - %t34 = AIE.tile(3, 4) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t04 = aie.tile(0, 4) + %t11 = aie.tile(1, 1) + %t12 = aie.tile(1, 2) + %t13 = aie.tile(1, 3) + %t14 = aie.tile(1, 4) + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) + %t22 = aie.tile(2, 2) + %t23 = aie.tile(2, 3) + %t24 = aie.tile(2, 4) + %t30 = aie.tile(3, 0) + %t31 = aie.tile(3, 1) + %t32 = aie.tile(3, 2) + %t33 = aie.tile(3, 3) + %t34 = aie.tile(3, 4) //TASK 1 - AIE.flow(%t20, DMA : 0, %t11, DMA : 0) - AIE.flow(%t11, Core : 0, %t01, Core : 0) - AIE.flow(%t01, Core : 0, %t12, Core : 0) - AIE.flow(%t12, Core : 0, %t02, Core : 0) - AIE.flow(%t02, DMA : 0, %t20, DMA : 0) + aie.flow(%t20, DMA : 0, %t11, DMA : 0) + aie.flow(%t11, Core : 0, %t01, Core : 0) + aie.flow(%t01, Core : 0, %t12, Core : 0) + aie.flow(%t12, Core : 0, %t02, Core : 0) + aie.flow(%t02, DMA : 0, %t20, DMA : 0) //TASK 2 - AIE.flow(%t20, DMA : 1, %t14, DMA : 0) - AIE.flow(%t14, Core : 0, %t04, Core : 0) - AIE.flow(%t04, Core : 0, %t13, Core : 0) - AIE.flow(%t13, DMA : 0, %t20, DMA : 1) + aie.flow(%t20, DMA : 1, %t14, DMA : 0) + aie.flow(%t14, Core : 0, %t04, Core : 0) + aie.flow(%t04, Core : 0, %t13, Core : 0) + aie.flow(%t13, DMA : 0, %t20, DMA : 1) //TASK 3 - AIE.flow(%t30, DMA : 0, %t21, DMA : 0) - AIE.flow(%t21, Core : 0, %t33, Core : 0) - AIE.flow(%t33, Core : 0, %t22, Core : 0) - AIE.flow(%t22, Core : 0, %t34, Core : 0) - AIE.flow(%t34, Core : 0, %t24, Core : 0) - AIE.flow(%t24, Core : 0, %t23, Core : 0) - AIE.flow(%t23, DMA : 0, %t30, DMA : 0) + aie.flow(%t30, DMA : 0, %t21, DMA : 0) + aie.flow(%t21, Core : 0, %t33, Core : 0) + aie.flow(%t33, Core : 0, %t22, Core : 0) + aie.flow(%t22, Core : 0, %t34, Core : 0) + aie.flow(%t34, Core : 0, %t24, Core : 0) + aie.flow(%t24, Core : 0, %t23, Core : 0) + aie.flow(%t23, DMA : 0, %t30, DMA : 0) //TASK 4 - AIE.flow(%t30, DMA : 1, %t31, DMA : 1) - AIE.flow(%t31, Core : 1, %t23, Core : 1) - AIE.flow(%t23, Core : 1, %t34, Core : 1) - AIE.flow(%t34, Core : 1, %t24, Core : 1) - AIE.flow(%t24, Core : 1, %t33, Core : 1) - AIE.flow(%t33, Core : 1, %t32, Core : 1) - AIE.flow(%t32, DMA : 1, %t30, DMA : 1) + aie.flow(%t30, DMA : 1, %t31, DMA : 1) + aie.flow(%t31, Core : 1, %t23, Core : 1) + aie.flow(%t23, Core : 1, %t34, Core : 1) + aie.flow(%t34, Core : 1, %t24, Core : 1) + aie.flow(%t24, Core : 1, %t33, Core : 1) + aie.flow(%t33, Core : 1, %t32, Core : 1) + aie.flow(%t32, DMA : 1, %t30, DMA : 1) } } diff --git a/test/create-flows/unit_flow_test_3.mlir b/test/create-flows/unit_flow_test_3.mlir index 0376a5c09d..e394f1b06a 100644 --- a/test/create-flows/unit_flow_test_3.mlir +++ b/test/create-flows/unit_flow_test_3.mlir @@ -10,481 +10,481 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_3:.*]] = AIE.tile(0, 4) -// CHECK: %[[VAL_4:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_5:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_6:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_7:.*]] = AIE.tile(1, 4) -// CHECK: %[[VAL_8:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_9:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_10:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_11:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_12:.*]] = AIE.tile(2, 4) -// CHECK: %[[VAL_13:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_14:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_15:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_16:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_17:.*]] = AIE.tile(7, 4) -// CHECK: %[[VAL_18:.*]] = AIE.tile(8, 1) -// CHECK: %[[VAL_19:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_20:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_21:.*]] = AIE.tile(8, 4) -// CHECK: %[[VAL_22:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_25:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_26:.*]] = AIE.switchbox(%[[VAL_25]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_28:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_29:.*]] = AIE.shim_mux(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_30:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.switchbox(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_32:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_33:.*]] = AIE.switchbox(%[[VAL_32]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_34:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_35:.*]] = AIE.switchbox(%[[VAL_34]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_36:.*]] = AIE.tile(5, 3) -// CHECK: %[[VAL_37:.*]] = AIE.switchbox(%[[VAL_36]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_38:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_39:.*]] = AIE.switchbox(%[[VAL_38]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.switchbox(%[[VAL_14]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.switchbox(%[[VAL_15]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_42:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_43:.*]] = AIE.switchbox(%[[VAL_19]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_44:.*]] = AIE.switchbox(%[[VAL_20]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_45:.*]] = AIE.switchbox(%[[VAL_21]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_46:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_47:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_48:.*]] = AIE.switchbox(%[[VAL_47]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_49:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_50:.*]] = AIE.switchbox(%[[VAL_49]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_51:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_52:.*]] = AIE.switchbox(%[[VAL_51]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_53:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_54:.*]] = AIE.switchbox(%[[VAL_53]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_55:.*]] = AIE.tile(5, 4) -// CHECK: %[[VAL_56:.*]] = AIE.switchbox(%[[VAL_55]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_57:.*]] = AIE.tile(6, 4) -// CHECK: %[[VAL_58:.*]] = AIE.switchbox(%[[VAL_57]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_59:.*]] = AIE.switchbox(%[[VAL_17]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_60:.*]] = AIE.switchbox(%[[VAL_5]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_61:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_62:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_63:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_64:.*]] = AIE.switchbox(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_65:.*]] = AIE.shim_mux(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_66:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_67:.*]] = AIE.switchbox(%[[VAL_66]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_68:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_69:.*]] = AIE.switchbox(%[[VAL_68]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_70:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_71:.*]] = AIE.switchbox(%[[VAL_70]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_72:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_73:.*]] = AIE.switchbox(%[[VAL_72]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_74:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_75:.*]] = AIE.switchbox(%[[VAL_74]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_76:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_77:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_78:.*]] = AIE.switchbox(%[[VAL_77]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_79:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_79]] : DMA) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_80:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_80]] : DMA) -// CHECK: AIE.wire(%[[VAL_79]] : North, %[[VAL_80]] : South) -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_81:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_81]] : DMA) -// CHECK: AIE.wire(%[[VAL_80]] : North, %[[VAL_81]] : South) -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_82:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_82]] : DMA) -// CHECK: AIE.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) -// CHECK: AIE.wire(%[[VAL_79]] : East, %[[VAL_83:.*]] : West) -// CHECK: AIE.wire(%[[VAL_4]] : Core, %[[VAL_83]] : Core) -// CHECK: AIE.wire(%[[VAL_4]] : DMA, %[[VAL_83]] : DMA) -// CHECK: AIE.wire(%[[VAL_84:.*]] : North, %[[VAL_83]] : South) -// CHECK: AIE.wire(%[[VAL_80]] : East, %[[VAL_85:.*]] : West) -// CHECK: AIE.wire(%[[VAL_5]] : Core, %[[VAL_85]] : Core) -// CHECK: AIE.wire(%[[VAL_5]] : DMA, %[[VAL_85]] : DMA) -// CHECK: AIE.wire(%[[VAL_83]] : North, %[[VAL_85]] : South) -// CHECK: AIE.wire(%[[VAL_81]] : East, %[[VAL_86:.*]] : West) -// CHECK: AIE.wire(%[[VAL_6]] : Core, %[[VAL_86]] : Core) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_86]] : DMA) -// CHECK: AIE.wire(%[[VAL_85]] : North, %[[VAL_86]] : South) -// CHECK: AIE.wire(%[[VAL_82]] : East, %[[VAL_87:.*]] : West) -// CHECK: AIE.wire(%[[VAL_7]] : Core, %[[VAL_87]] : Core) -// CHECK: AIE.wire(%[[VAL_7]] : DMA, %[[VAL_87]] : DMA) -// CHECK: AIE.wire(%[[VAL_86]] : North, %[[VAL_87]] : South) -// CHECK: AIE.wire(%[[VAL_84]] : East, %[[VAL_88:.*]] : West) -// CHECK: AIE.wire(%[[VAL_89:.*]] : North, %[[VAL_88]] : South) -// CHECK: AIE.wire(%[[VAL_8]] : DMA, %[[VAL_89]] : DMA) -// CHECK: AIE.wire(%[[VAL_83]] : East, %[[VAL_90:.*]] : West) -// CHECK: AIE.wire(%[[VAL_9]] : Core, %[[VAL_90]] : Core) -// CHECK: AIE.wire(%[[VAL_9]] : DMA, %[[VAL_90]] : DMA) -// CHECK: AIE.wire(%[[VAL_88]] : North, %[[VAL_90]] : South) -// CHECK: AIE.wire(%[[VAL_85]] : East, %[[VAL_91:.*]] : West) -// CHECK: AIE.wire(%[[VAL_10]] : Core, %[[VAL_91]] : Core) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_91]] : DMA) -// CHECK: AIE.wire(%[[VAL_90]] : North, %[[VAL_91]] : South) -// CHECK: AIE.wire(%[[VAL_86]] : East, %[[VAL_92:.*]] : West) -// CHECK: AIE.wire(%[[VAL_11]] : Core, %[[VAL_92]] : Core) -// CHECK: AIE.wire(%[[VAL_11]] : DMA, %[[VAL_92]] : DMA) -// CHECK: AIE.wire(%[[VAL_91]] : North, %[[VAL_92]] : South) -// CHECK: AIE.wire(%[[VAL_87]] : East, %[[VAL_93:.*]] : West) -// CHECK: AIE.wire(%[[VAL_12]] : Core, %[[VAL_93]] : Core) -// CHECK: AIE.wire(%[[VAL_12]] : DMA, %[[VAL_93]] : DMA) -// CHECK: AIE.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) -// CHECK: AIE.wire(%[[VAL_88]] : East, %[[VAL_94:.*]] : West) -// CHECK: AIE.wire(%[[VAL_95:.*]] : North, %[[VAL_94]] : South) -// CHECK: AIE.wire(%[[VAL_13]] : DMA, %[[VAL_95]] : DMA) -// CHECK: AIE.wire(%[[VAL_90]] : East, %[[VAL_96:.*]] : West) -// CHECK: AIE.wire(%[[VAL_47]] : Core, %[[VAL_96]] : Core) -// CHECK: AIE.wire(%[[VAL_47]] : DMA, %[[VAL_96]] : DMA) -// CHECK: AIE.wire(%[[VAL_94]] : North, %[[VAL_96]] : South) -// CHECK: AIE.wire(%[[VAL_91]] : East, %[[VAL_97:.*]] : West) -// CHECK: AIE.wire(%[[VAL_72]] : Core, %[[VAL_97]] : Core) -// CHECK: AIE.wire(%[[VAL_72]] : DMA, %[[VAL_97]] : DMA) -// CHECK: AIE.wire(%[[VAL_96]] : North, %[[VAL_97]] : South) -// CHECK: AIE.wire(%[[VAL_92]] : East, %[[VAL_98:.*]] : West) -// CHECK: AIE.wire(%[[VAL_32]] : Core, %[[VAL_98]] : Core) -// CHECK: AIE.wire(%[[VAL_32]] : DMA, %[[VAL_98]] : DMA) -// CHECK: AIE.wire(%[[VAL_97]] : North, %[[VAL_98]] : South) -// CHECK: AIE.wire(%[[VAL_93]] : East, %[[VAL_99:.*]] : West) -// CHECK: AIE.wire(%[[VAL_77]] : Core, %[[VAL_99]] : Core) -// CHECK: AIE.wire(%[[VAL_77]] : DMA, %[[VAL_99]] : DMA) -// CHECK: AIE.wire(%[[VAL_98]] : North, %[[VAL_99]] : South) -// CHECK: AIE.wire(%[[VAL_96]] : East, %[[VAL_100:.*]] : West) -// CHECK: AIE.wire(%[[VAL_49]] : Core, %[[VAL_100]] : Core) -// CHECK: AIE.wire(%[[VAL_49]] : DMA, %[[VAL_100]] : DMA) -// CHECK: AIE.wire(%[[VAL_97]] : East, %[[VAL_101:.*]] : West) -// CHECK: AIE.wire(%[[VAL_51]] : Core, %[[VAL_101]] : Core) -// CHECK: AIE.wire(%[[VAL_51]] : DMA, %[[VAL_101]] : DMA) -// CHECK: AIE.wire(%[[VAL_100]] : North, %[[VAL_101]] : South) -// CHECK: AIE.wire(%[[VAL_98]] : East, %[[VAL_102:.*]] : West) -// CHECK: AIE.wire(%[[VAL_34]] : Core, %[[VAL_102]] : Core) -// CHECK: AIE.wire(%[[VAL_34]] : DMA, %[[VAL_102]] : DMA) -// CHECK: AIE.wire(%[[VAL_101]] : North, %[[VAL_102]] : South) -// CHECK: AIE.wire(%[[VAL_99]] : East, %[[VAL_103:.*]] : West) -// CHECK: AIE.wire(%[[VAL_53]] : Core, %[[VAL_103]] : Core) -// CHECK: AIE.wire(%[[VAL_53]] : DMA, %[[VAL_103]] : DMA) -// CHECK: AIE.wire(%[[VAL_102]] : North, %[[VAL_103]] : South) -// CHECK: AIE.wire(%[[VAL_100]] : East, %[[VAL_104:.*]] : West) -// CHECK: AIE.wire(%[[VAL_66]] : Core, %[[VAL_104]] : Core) -// CHECK: AIE.wire(%[[VAL_66]] : DMA, %[[VAL_104]] : DMA) -// CHECK: AIE.wire(%[[VAL_101]] : East, %[[VAL_105:.*]] : West) -// CHECK: AIE.wire(%[[VAL_74]] : Core, %[[VAL_105]] : Core) -// CHECK: AIE.wire(%[[VAL_74]] : DMA, %[[VAL_105]] : DMA) -// CHECK: AIE.wire(%[[VAL_104]] : North, %[[VAL_105]] : South) -// CHECK: AIE.wire(%[[VAL_102]] : East, %[[VAL_106:.*]] : West) -// CHECK: AIE.wire(%[[VAL_36]] : Core, %[[VAL_106]] : Core) -// CHECK: AIE.wire(%[[VAL_36]] : DMA, %[[VAL_106]] : DMA) -// CHECK: AIE.wire(%[[VAL_105]] : North, %[[VAL_106]] : South) -// CHECK: AIE.wire(%[[VAL_103]] : East, %[[VAL_107:.*]] : West) -// CHECK: AIE.wire(%[[VAL_55]] : Core, %[[VAL_107]] : Core) -// CHECK: AIE.wire(%[[VAL_55]] : DMA, %[[VAL_107]] : DMA) -// CHECK: AIE.wire(%[[VAL_106]] : North, %[[VAL_107]] : South) -// CHECK: AIE.wire(%[[VAL_104]] : East, %[[VAL_108:.*]] : West) -// CHECK: AIE.wire(%[[VAL_68]] : Core, %[[VAL_108]] : Core) -// CHECK: AIE.wire(%[[VAL_68]] : DMA, %[[VAL_108]] : DMA) -// CHECK: AIE.wire(%[[VAL_105]] : East, %[[VAL_109:.*]] : West) -// CHECK: AIE.wire(%[[VAL_70]] : Core, %[[VAL_109]] : Core) -// CHECK: AIE.wire(%[[VAL_70]] : DMA, %[[VAL_109]] : DMA) -// CHECK: AIE.wire(%[[VAL_108]] : North, %[[VAL_109]] : South) -// CHECK: AIE.wire(%[[VAL_106]] : East, %[[VAL_110:.*]] : West) -// CHECK: AIE.wire(%[[VAL_38]] : Core, %[[VAL_110]] : Core) -// CHECK: AIE.wire(%[[VAL_38]] : DMA, %[[VAL_110]] : DMA) -// CHECK: AIE.wire(%[[VAL_109]] : North, %[[VAL_110]] : South) -// CHECK: AIE.wire(%[[VAL_107]] : East, %[[VAL_111:.*]] : West) -// CHECK: AIE.wire(%[[VAL_57]] : Core, %[[VAL_111]] : Core) -// CHECK: AIE.wire(%[[VAL_57]] : DMA, %[[VAL_111]] : DMA) -// CHECK: AIE.wire(%[[VAL_110]] : North, %[[VAL_111]] : South) -// CHECK: AIE.wire(%[[VAL_108]] : East, %[[VAL_112:.*]] : West) -// CHECK: AIE.wire(%[[VAL_14]] : Core, %[[VAL_112]] : Core) -// CHECK: AIE.wire(%[[VAL_14]] : DMA, %[[VAL_112]] : DMA) -// CHECK: AIE.wire(%[[VAL_109]] : East, %[[VAL_113:.*]] : West) -// CHECK: AIE.wire(%[[VAL_15]] : Core, %[[VAL_113]] : Core) -// CHECK: AIE.wire(%[[VAL_15]] : DMA, %[[VAL_113]] : DMA) -// CHECK: AIE.wire(%[[VAL_112]] : North, %[[VAL_113]] : South) -// CHECK: AIE.wire(%[[VAL_110]] : East, %[[VAL_114:.*]] : West) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_114]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_114]] : DMA) -// CHECK: AIE.wire(%[[VAL_113]] : North, %[[VAL_114]] : South) -// CHECK: AIE.wire(%[[VAL_111]] : East, %[[VAL_115:.*]] : West) -// CHECK: AIE.wire(%[[VAL_17]] : Core, %[[VAL_115]] : Core) -// CHECK: AIE.wire(%[[VAL_17]] : DMA, %[[VAL_115]] : DMA) -// CHECK: AIE.wire(%[[VAL_114]] : North, %[[VAL_115]] : South) -// CHECK: AIE.wire(%[[VAL_113]] : East, %[[VAL_116:.*]] : West) -// CHECK: AIE.wire(%[[VAL_19]] : Core, %[[VAL_116]] : Core) -// CHECK: AIE.wire(%[[VAL_19]] : DMA, %[[VAL_116]] : DMA) -// CHECK: AIE.wire(%[[VAL_114]] : East, %[[VAL_117:.*]] : West) -// CHECK: AIE.wire(%[[VAL_20]] : Core, %[[VAL_117]] : Core) -// CHECK: AIE.wire(%[[VAL_20]] : DMA, %[[VAL_117]] : DMA) -// CHECK: AIE.wire(%[[VAL_116]] : North, %[[VAL_117]] : South) -// CHECK: AIE.wire(%[[VAL_115]] : East, %[[VAL_118:.*]] : West) -// CHECK: AIE.wire(%[[VAL_21]] : Core, %[[VAL_118]] : Core) -// CHECK: AIE.wire(%[[VAL_21]] : DMA, %[[VAL_118]] : DMA) -// CHECK: AIE.wire(%[[VAL_117]] : North, %[[VAL_118]] : South) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_3:.*]] = aie.tile(0, 4) +// CHECK: %[[VAL_4:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_5:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_6:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_7:.*]] = aie.tile(1, 4) +// CHECK: %[[VAL_8:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_9:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_10:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_11:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_12:.*]] = aie.tile(2, 4) +// CHECK: %[[VAL_13:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_14:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_15:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_16:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_17:.*]] = aie.tile(7, 4) +// CHECK: %[[VAL_18:.*]] = aie.tile(8, 1) +// CHECK: %[[VAL_19:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_20:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_21:.*]] = aie.tile(8, 4) +// CHECK: %[[VAL_22:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_24:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_25:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_26:.*]] = aie.switchbox(%[[VAL_25]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_27:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_28:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_29:.*]] = aie.shim_mux(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_30:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_31:.*]] = aie.switchbox(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_32:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_33:.*]] = aie.switchbox(%[[VAL_32]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_34:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_35:.*]] = aie.switchbox(%[[VAL_34]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_36:.*]] = aie.tile(5, 3) +// CHECK: %[[VAL_37:.*]] = aie.switchbox(%[[VAL_36]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_38:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_39:.*]] = aie.switchbox(%[[VAL_38]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_40:.*]] = aie.switchbox(%[[VAL_14]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_41:.*]] = aie.switchbox(%[[VAL_15]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_42:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_43:.*]] = aie.switchbox(%[[VAL_19]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_44:.*]] = aie.switchbox(%[[VAL_20]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_45:.*]] = aie.switchbox(%[[VAL_21]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_46:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_47:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_48:.*]] = aie.switchbox(%[[VAL_47]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_49:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_50:.*]] = aie.switchbox(%[[VAL_49]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_51:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_52:.*]] = aie.switchbox(%[[VAL_51]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_53:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_54:.*]] = aie.switchbox(%[[VAL_53]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_55:.*]] = aie.tile(5, 4) +// CHECK: %[[VAL_56:.*]] = aie.switchbox(%[[VAL_55]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_57:.*]] = aie.tile(6, 4) +// CHECK: %[[VAL_58:.*]] = aie.switchbox(%[[VAL_57]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_59:.*]] = aie.switchbox(%[[VAL_17]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_60:.*]] = aie.switchbox(%[[VAL_5]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_61:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_62:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_63:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_64:.*]] = aie.switchbox(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_65:.*]] = aie.shim_mux(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_66:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_67:.*]] = aie.switchbox(%[[VAL_66]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_68:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_69:.*]] = aie.switchbox(%[[VAL_68]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_70:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_71:.*]] = aie.switchbox(%[[VAL_70]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_72:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_73:.*]] = aie.switchbox(%[[VAL_72]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_74:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_75:.*]] = aie.switchbox(%[[VAL_74]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_76:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_77:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_78:.*]] = aie.switchbox(%[[VAL_77]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_79:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_79]] : DMA) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_80:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_80]] : DMA) +// CHECK: aie.wire(%[[VAL_79]] : North, %[[VAL_80]] : South) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_81:.*]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_81]] : DMA) +// CHECK: aie.wire(%[[VAL_80]] : North, %[[VAL_81]] : South) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_82:.*]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_82]] : DMA) +// CHECK: aie.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) +// CHECK: aie.wire(%[[VAL_79]] : East, %[[VAL_83:.*]] : West) +// CHECK: aie.wire(%[[VAL_4]] : Core, %[[VAL_83]] : Core) +// CHECK: aie.wire(%[[VAL_4]] : DMA, %[[VAL_83]] : DMA) +// CHECK: aie.wire(%[[VAL_84:.*]] : North, %[[VAL_83]] : South) +// CHECK: aie.wire(%[[VAL_80]] : East, %[[VAL_85:.*]] : West) +// CHECK: aie.wire(%[[VAL_5]] : Core, %[[VAL_85]] : Core) +// CHECK: aie.wire(%[[VAL_5]] : DMA, %[[VAL_85]] : DMA) +// CHECK: aie.wire(%[[VAL_83]] : North, %[[VAL_85]] : South) +// CHECK: aie.wire(%[[VAL_81]] : East, %[[VAL_86:.*]] : West) +// CHECK: aie.wire(%[[VAL_6]] : Core, %[[VAL_86]] : Core) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_86]] : DMA) +// CHECK: aie.wire(%[[VAL_85]] : North, %[[VAL_86]] : South) +// CHECK: aie.wire(%[[VAL_82]] : East, %[[VAL_87:.*]] : West) +// CHECK: aie.wire(%[[VAL_7]] : Core, %[[VAL_87]] : Core) +// CHECK: aie.wire(%[[VAL_7]] : DMA, %[[VAL_87]] : DMA) +// CHECK: aie.wire(%[[VAL_86]] : North, %[[VAL_87]] : South) +// CHECK: aie.wire(%[[VAL_84]] : East, %[[VAL_88:.*]] : West) +// CHECK: aie.wire(%[[VAL_89:.*]] : North, %[[VAL_88]] : South) +// CHECK: aie.wire(%[[VAL_8]] : DMA, %[[VAL_89]] : DMA) +// CHECK: aie.wire(%[[VAL_83]] : East, %[[VAL_90:.*]] : West) +// CHECK: aie.wire(%[[VAL_9]] : Core, %[[VAL_90]] : Core) +// CHECK: aie.wire(%[[VAL_9]] : DMA, %[[VAL_90]] : DMA) +// CHECK: aie.wire(%[[VAL_88]] : North, %[[VAL_90]] : South) +// CHECK: aie.wire(%[[VAL_85]] : East, %[[VAL_91:.*]] : West) +// CHECK: aie.wire(%[[VAL_10]] : Core, %[[VAL_91]] : Core) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_91]] : DMA) +// CHECK: aie.wire(%[[VAL_90]] : North, %[[VAL_91]] : South) +// CHECK: aie.wire(%[[VAL_86]] : East, %[[VAL_92:.*]] : West) +// CHECK: aie.wire(%[[VAL_11]] : Core, %[[VAL_92]] : Core) +// CHECK: aie.wire(%[[VAL_11]] : DMA, %[[VAL_92]] : DMA) +// CHECK: aie.wire(%[[VAL_91]] : North, %[[VAL_92]] : South) +// CHECK: aie.wire(%[[VAL_87]] : East, %[[VAL_93:.*]] : West) +// CHECK: aie.wire(%[[VAL_12]] : Core, %[[VAL_93]] : Core) +// CHECK: aie.wire(%[[VAL_12]] : DMA, %[[VAL_93]] : DMA) +// CHECK: aie.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) +// CHECK: aie.wire(%[[VAL_88]] : East, %[[VAL_94:.*]] : West) +// CHECK: aie.wire(%[[VAL_95:.*]] : North, %[[VAL_94]] : South) +// CHECK: aie.wire(%[[VAL_13]] : DMA, %[[VAL_95]] : DMA) +// CHECK: aie.wire(%[[VAL_90]] : East, %[[VAL_96:.*]] : West) +// CHECK: aie.wire(%[[VAL_47]] : Core, %[[VAL_96]] : Core) +// CHECK: aie.wire(%[[VAL_47]] : DMA, %[[VAL_96]] : DMA) +// CHECK: aie.wire(%[[VAL_94]] : North, %[[VAL_96]] : South) +// CHECK: aie.wire(%[[VAL_91]] : East, %[[VAL_97:.*]] : West) +// CHECK: aie.wire(%[[VAL_72]] : Core, %[[VAL_97]] : Core) +// CHECK: aie.wire(%[[VAL_72]] : DMA, %[[VAL_97]] : DMA) +// CHECK: aie.wire(%[[VAL_96]] : North, %[[VAL_97]] : South) +// CHECK: aie.wire(%[[VAL_92]] : East, %[[VAL_98:.*]] : West) +// CHECK: aie.wire(%[[VAL_32]] : Core, %[[VAL_98]] : Core) +// CHECK: aie.wire(%[[VAL_32]] : DMA, %[[VAL_98]] : DMA) +// CHECK: aie.wire(%[[VAL_97]] : North, %[[VAL_98]] : South) +// CHECK: aie.wire(%[[VAL_93]] : East, %[[VAL_99:.*]] : West) +// CHECK: aie.wire(%[[VAL_77]] : Core, %[[VAL_99]] : Core) +// CHECK: aie.wire(%[[VAL_77]] : DMA, %[[VAL_99]] : DMA) +// CHECK: aie.wire(%[[VAL_98]] : North, %[[VAL_99]] : South) +// CHECK: aie.wire(%[[VAL_96]] : East, %[[VAL_100:.*]] : West) +// CHECK: aie.wire(%[[VAL_49]] : Core, %[[VAL_100]] : Core) +// CHECK: aie.wire(%[[VAL_49]] : DMA, %[[VAL_100]] : DMA) +// CHECK: aie.wire(%[[VAL_97]] : East, %[[VAL_101:.*]] : West) +// CHECK: aie.wire(%[[VAL_51]] : Core, %[[VAL_101]] : Core) +// CHECK: aie.wire(%[[VAL_51]] : DMA, %[[VAL_101]] : DMA) +// CHECK: aie.wire(%[[VAL_100]] : North, %[[VAL_101]] : South) +// CHECK: aie.wire(%[[VAL_98]] : East, %[[VAL_102:.*]] : West) +// CHECK: aie.wire(%[[VAL_34]] : Core, %[[VAL_102]] : Core) +// CHECK: aie.wire(%[[VAL_34]] : DMA, %[[VAL_102]] : DMA) +// CHECK: aie.wire(%[[VAL_101]] : North, %[[VAL_102]] : South) +// CHECK: aie.wire(%[[VAL_99]] : East, %[[VAL_103:.*]] : West) +// CHECK: aie.wire(%[[VAL_53]] : Core, %[[VAL_103]] : Core) +// CHECK: aie.wire(%[[VAL_53]] : DMA, %[[VAL_103]] : DMA) +// CHECK: aie.wire(%[[VAL_102]] : North, %[[VAL_103]] : South) +// CHECK: aie.wire(%[[VAL_100]] : East, %[[VAL_104:.*]] : West) +// CHECK: aie.wire(%[[VAL_66]] : Core, %[[VAL_104]] : Core) +// CHECK: aie.wire(%[[VAL_66]] : DMA, %[[VAL_104]] : DMA) +// CHECK: aie.wire(%[[VAL_101]] : East, %[[VAL_105:.*]] : West) +// CHECK: aie.wire(%[[VAL_74]] : Core, %[[VAL_105]] : Core) +// CHECK: aie.wire(%[[VAL_74]] : DMA, %[[VAL_105]] : DMA) +// CHECK: aie.wire(%[[VAL_104]] : North, %[[VAL_105]] : South) +// CHECK: aie.wire(%[[VAL_102]] : East, %[[VAL_106:.*]] : West) +// CHECK: aie.wire(%[[VAL_36]] : Core, %[[VAL_106]] : Core) +// CHECK: aie.wire(%[[VAL_36]] : DMA, %[[VAL_106]] : DMA) +// CHECK: aie.wire(%[[VAL_105]] : North, %[[VAL_106]] : South) +// CHECK: aie.wire(%[[VAL_103]] : East, %[[VAL_107:.*]] : West) +// CHECK: aie.wire(%[[VAL_55]] : Core, %[[VAL_107]] : Core) +// CHECK: aie.wire(%[[VAL_55]] : DMA, %[[VAL_107]] : DMA) +// CHECK: aie.wire(%[[VAL_106]] : North, %[[VAL_107]] : South) +// CHECK: aie.wire(%[[VAL_104]] : East, %[[VAL_108:.*]] : West) +// CHECK: aie.wire(%[[VAL_68]] : Core, %[[VAL_108]] : Core) +// CHECK: aie.wire(%[[VAL_68]] : DMA, %[[VAL_108]] : DMA) +// CHECK: aie.wire(%[[VAL_105]] : East, %[[VAL_109:.*]] : West) +// CHECK: aie.wire(%[[VAL_70]] : Core, %[[VAL_109]] : Core) +// CHECK: aie.wire(%[[VAL_70]] : DMA, %[[VAL_109]] : DMA) +// CHECK: aie.wire(%[[VAL_108]] : North, %[[VAL_109]] : South) +// CHECK: aie.wire(%[[VAL_106]] : East, %[[VAL_110:.*]] : West) +// CHECK: aie.wire(%[[VAL_38]] : Core, %[[VAL_110]] : Core) +// CHECK: aie.wire(%[[VAL_38]] : DMA, %[[VAL_110]] : DMA) +// CHECK: aie.wire(%[[VAL_109]] : North, %[[VAL_110]] : South) +// CHECK: aie.wire(%[[VAL_107]] : East, %[[VAL_111:.*]] : West) +// CHECK: aie.wire(%[[VAL_57]] : Core, %[[VAL_111]] : Core) +// CHECK: aie.wire(%[[VAL_57]] : DMA, %[[VAL_111]] : DMA) +// CHECK: aie.wire(%[[VAL_110]] : North, %[[VAL_111]] : South) +// CHECK: aie.wire(%[[VAL_108]] : East, %[[VAL_112:.*]] : West) +// CHECK: aie.wire(%[[VAL_14]] : Core, %[[VAL_112]] : Core) +// CHECK: aie.wire(%[[VAL_14]] : DMA, %[[VAL_112]] : DMA) +// CHECK: aie.wire(%[[VAL_109]] : East, %[[VAL_113:.*]] : West) +// CHECK: aie.wire(%[[VAL_15]] : Core, %[[VAL_113]] : Core) +// CHECK: aie.wire(%[[VAL_15]] : DMA, %[[VAL_113]] : DMA) +// CHECK: aie.wire(%[[VAL_112]] : North, %[[VAL_113]] : South) +// CHECK: aie.wire(%[[VAL_110]] : East, %[[VAL_114:.*]] : West) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_114]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_114]] : DMA) +// CHECK: aie.wire(%[[VAL_113]] : North, %[[VAL_114]] : South) +// CHECK: aie.wire(%[[VAL_111]] : East, %[[VAL_115:.*]] : West) +// CHECK: aie.wire(%[[VAL_17]] : Core, %[[VAL_115]] : Core) +// CHECK: aie.wire(%[[VAL_17]] : DMA, %[[VAL_115]] : DMA) +// CHECK: aie.wire(%[[VAL_114]] : North, %[[VAL_115]] : South) +// CHECK: aie.wire(%[[VAL_113]] : East, %[[VAL_116:.*]] : West) +// CHECK: aie.wire(%[[VAL_19]] : Core, %[[VAL_116]] : Core) +// CHECK: aie.wire(%[[VAL_19]] : DMA, %[[VAL_116]] : DMA) +// CHECK: aie.wire(%[[VAL_114]] : East, %[[VAL_117:.*]] : West) +// CHECK: aie.wire(%[[VAL_20]] : Core, %[[VAL_117]] : Core) +// CHECK: aie.wire(%[[VAL_20]] : DMA, %[[VAL_117]] : DMA) +// CHECK: aie.wire(%[[VAL_116]] : North, %[[VAL_117]] : South) +// CHECK: aie.wire(%[[VAL_115]] : East, %[[VAL_118:.*]] : West) +// CHECK: aie.wire(%[[VAL_21]] : Core, %[[VAL_118]] : Core) +// CHECK: aie.wire(%[[VAL_21]] : DMA, %[[VAL_118]] : DMA) +// CHECK: aie.wire(%[[VAL_117]] : North, %[[VAL_118]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t04 = AIE.tile(0, 4) - %t11 = AIE.tile(1, 1) - %t12 = AIE.tile(1, 2) - %t13 = AIE.tile(1, 3) - %t14 = AIE.tile(1, 4) - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 2) - %t23 = AIE.tile(2, 3) - %t24 = AIE.tile(2, 4) - %t30 = AIE.tile(3, 0) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - %t81 = AIE.tile(8, 1) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) - %t84 = AIE.tile(8, 4) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t04 = aie.tile(0, 4) + %t11 = aie.tile(1, 1) + %t12 = aie.tile(1, 2) + %t13 = aie.tile(1, 3) + %t14 = aie.tile(1, 4) + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) + %t22 = aie.tile(2, 2) + %t23 = aie.tile(2, 3) + %t24 = aie.tile(2, 4) + %t30 = aie.tile(3, 0) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + %t81 = aie.tile(8, 1) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) + %t84 = aie.tile(8, 4) //TASK 1 - AIE.flow(%t20, DMA : 0, %t03, DMA : 0) - AIE.flow(%t03, Core : 0, %t71, Core : 0) - AIE.flow(%t71, Core : 0, %t84, Core : 0) - AIE.flow(%t84, Core : 0, %t11, Core : 0) - AIE.flow(%t11, Core : 0, %t24, Core : 0) - AIE.flow(%t24, DMA : 0, %t20, DMA : 0) + aie.flow(%t20, DMA : 0, %t03, DMA : 0) + aie.flow(%t03, Core : 0, %t71, Core : 0) + aie.flow(%t71, Core : 0, %t84, Core : 0) + aie.flow(%t84, Core : 0, %t11, Core : 0) + aie.flow(%t11, Core : 0, %t24, Core : 0) + aie.flow(%t24, DMA : 0, %t20, DMA : 0) //TASK 2 - AIE.flow(%t30, DMA : 0, %t14, DMA : 0) - AIE.flow(%t14, Core : 0, %t01, Core : 0) - AIE.flow(%t01, Core : 0, %t83, Core : 0) - AIE.flow(%t83, Core : 0, %t21, Core : 0) - AIE.flow(%t21, Core : 0, %t73, Core : 0) - AIE.flow(%t73, Core : 0, %t82, Core : 0) - AIE.flow(%t82, DMA : 0, %t30, DMA : 0) + aie.flow(%t30, DMA : 0, %t14, DMA : 0) + aie.flow(%t14, Core : 0, %t01, Core : 0) + aie.flow(%t01, Core : 0, %t83, Core : 0) + aie.flow(%t83, Core : 0, %t21, Core : 0) + aie.flow(%t21, Core : 0, %t73, Core : 0) + aie.flow(%t73, Core : 0, %t82, Core : 0) + aie.flow(%t82, DMA : 0, %t30, DMA : 0) //TASK 3 - AIE.flow(%t20, DMA : 1, %t83, DMA : 1) - AIE.flow(%t83, Core : 1, %t01, Core : 1) - AIE.flow(%t01, Core : 1, %t72, Core : 1) - AIE.flow(%t72, Core : 1, %t02, Core : 1) - AIE.flow(%t02, Core : 1, %t24, Core : 1) - AIE.flow(%t24, Core : 1, %t71, Core : 1) - AIE.flow(%t71, Core : 1, %t84, Core : 1) - AIE.flow(%t84, DMA : 1, %t20, DMA : 1) + aie.flow(%t20, DMA : 1, %t83, DMA : 1) + aie.flow(%t83, Core : 1, %t01, Core : 1) + aie.flow(%t01, Core : 1, %t72, Core : 1) + aie.flow(%t72, Core : 1, %t02, Core : 1) + aie.flow(%t02, Core : 1, %t24, Core : 1) + aie.flow(%t24, Core : 1, %t71, Core : 1) + aie.flow(%t71, Core : 1, %t84, Core : 1) + aie.flow(%t84, DMA : 1, %t20, DMA : 1) } } diff --git a/test/create-flows/unit_many_flows.mlir b/test/create-flows/unit_many_flows.mlir index 0234196ac0..16dd4f61b8 100644 --- a/test/create-flows/unit_many_flows.mlir +++ b/test/create-flows/unit_many_flows.mlir @@ -10,329 +10,329 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_3:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_5:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_6:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_7:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_8:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_9:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_10:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_11:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_13:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_14:.*]] = AIE.switchbox(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_16:.*]] = AIE.switchbox(%[[VAL_15]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.switchbox(%[[VAL_5]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_20:.*]] = AIE.switchbox(%[[VAL_19]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_21:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_22:.*]] = AIE.switchbox(%[[VAL_21]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_25:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.shim_mux(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_28:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_29:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_30:.*]] = AIE.switchbox(%[[VAL_29]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_32:.*]] = AIE.switchbox(%[[VAL_31]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_34:.*]] = AIE.switchbox(%[[VAL_33]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_35:.*]] = AIE.tile(5, 3) -// CHECK: %[[VAL_36:.*]] = AIE.switchbox(%[[VAL_35]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_37:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_38:.*]] = AIE.switchbox(%[[VAL_37]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_39:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_40:.*]] = AIE.switchbox(%[[VAL_39]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_42:.*]] = AIE.switchbox(%[[VAL_41]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_43:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_44:.*]] = AIE.switchbox(%[[VAL_43]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_45:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_46:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_47:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_48:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_49:.*]] = AIE.switchbox(%[[VAL_48]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_50:.*]] = AIE.tile(5, 0) -// CHECK: %[[VAL_51:.*]] = AIE.switchbox(%[[VAL_50]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_52:.*]] = AIE.shim_mux(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_53:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_54:.*]] = AIE.switchbox(%[[VAL_53]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_55:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_56:.*]] = AIE.switchbox(%[[VAL_55]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_57:.*]] = AIE.shim_mux(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_58:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_59:.*]] = AIE.switchbox(%[[VAL_58]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_60:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_61:.*]] = AIE.switchbox(%[[VAL_60]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_62:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_63:.*]] = AIE.shim_mux(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_41]] : Core, %[[VAL_64:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_41]] : DMA, %[[VAL_64]] : DMA) -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_65:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_65]] : DMA) -// CHECK: AIE.wire(%[[VAL_64]] : North, %[[VAL_65]] : South) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_66:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_66]] : DMA) -// CHECK: AIE.wire(%[[VAL_65]] : North, %[[VAL_66]] : South) -// CHECK: AIE.wire(%[[VAL_64]] : East, %[[VAL_67:.*]] : West) -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_67]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_67]] : DMA) -// CHECK: AIE.wire(%[[VAL_68:.*]] : North, %[[VAL_67]] : South) -// CHECK: AIE.wire(%[[VAL_65]] : East, %[[VAL_69:.*]] : West) -// CHECK: AIE.wire(%[[VAL_13]] : Core, %[[VAL_69]] : Core) -// CHECK: AIE.wire(%[[VAL_13]] : DMA, %[[VAL_69]] : DMA) -// CHECK: AIE.wire(%[[VAL_67]] : North, %[[VAL_69]] : South) -// CHECK: AIE.wire(%[[VAL_66]] : East, %[[VAL_70:.*]] : West) -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_70]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_70]] : DMA) -// CHECK: AIE.wire(%[[VAL_69]] : North, %[[VAL_70]] : South) -// CHECK: AIE.wire(%[[VAL_68]] : East, %[[VAL_71:.*]] : West) -// CHECK: AIE.wire(%[[VAL_72:.*]] : North, %[[VAL_71]] : South) -// CHECK: AIE.wire(%[[VAL_4]] : DMA, %[[VAL_72]] : DMA) -// CHECK: AIE.wire(%[[VAL_67]] : East, %[[VAL_73:.*]] : West) -// CHECK: AIE.wire(%[[VAL_15]] : Core, %[[VAL_73]] : Core) -// CHECK: AIE.wire(%[[VAL_15]] : DMA, %[[VAL_73]] : DMA) -// CHECK: AIE.wire(%[[VAL_71]] : North, %[[VAL_73]] : South) -// CHECK: AIE.wire(%[[VAL_69]] : East, %[[VAL_74:.*]] : West) -// CHECK: AIE.wire(%[[VAL_5]] : Core, %[[VAL_74]] : Core) -// CHECK: AIE.wire(%[[VAL_5]] : DMA, %[[VAL_74]] : DMA) -// CHECK: AIE.wire(%[[VAL_73]] : North, %[[VAL_74]] : South) -// CHECK: AIE.wire(%[[VAL_70]] : East, %[[VAL_75:.*]] : West) -// CHECK: AIE.wire(%[[VAL_29]] : Core, %[[VAL_75]] : Core) -// CHECK: AIE.wire(%[[VAL_29]] : DMA, %[[VAL_75]] : DMA) -// CHECK: AIE.wire(%[[VAL_74]] : North, %[[VAL_75]] : South) -// CHECK: AIE.wire(%[[VAL_71]] : East, %[[VAL_76:.*]] : West) -// CHECK: AIE.wire(%[[VAL_77:.*]] : North, %[[VAL_76]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_77]] : DMA) -// CHECK: AIE.wire(%[[VAL_73]] : East, %[[VAL_78:.*]] : West) -// CHECK: AIE.wire(%[[VAL_7]] : Core, %[[VAL_78]] : Core) -// CHECK: AIE.wire(%[[VAL_7]] : DMA, %[[VAL_78]] : DMA) -// CHECK: AIE.wire(%[[VAL_76]] : North, %[[VAL_78]] : South) -// CHECK: AIE.wire(%[[VAL_74]] : East, %[[VAL_79:.*]] : West) -// CHECK: AIE.wire(%[[VAL_53]] : Core, %[[VAL_79]] : Core) -// CHECK: AIE.wire(%[[VAL_53]] : DMA, %[[VAL_79]] : DMA) -// CHECK: AIE.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) -// CHECK: AIE.wire(%[[VAL_75]] : East, %[[VAL_80:.*]] : West) -// CHECK: AIE.wire(%[[VAL_31]] : Core, %[[VAL_80]] : Core) -// CHECK: AIE.wire(%[[VAL_31]] : DMA, %[[VAL_80]] : DMA) -// CHECK: AIE.wire(%[[VAL_79]] : North, %[[VAL_80]] : South) -// CHECK: AIE.wire(%[[VAL_76]] : East, %[[VAL_81:.*]] : West) -// CHECK: AIE.wire(%[[VAL_78]] : East, %[[VAL_82:.*]] : West) -// CHECK: AIE.wire(%[[VAL_19]] : Core, %[[VAL_82]] : Core) -// CHECK: AIE.wire(%[[VAL_19]] : DMA, %[[VAL_82]] : DMA) -// CHECK: AIE.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) -// CHECK: AIE.wire(%[[VAL_79]] : East, %[[VAL_83:.*]] : West) -// CHECK: AIE.wire(%[[VAL_55]] : Core, %[[VAL_83]] : Core) -// CHECK: AIE.wire(%[[VAL_55]] : DMA, %[[VAL_83]] : DMA) -// CHECK: AIE.wire(%[[VAL_82]] : North, %[[VAL_83]] : South) -// CHECK: AIE.wire(%[[VAL_80]] : East, %[[VAL_84:.*]] : West) -// CHECK: AIE.wire(%[[VAL_33]] : Core, %[[VAL_84]] : Core) -// CHECK: AIE.wire(%[[VAL_33]] : DMA, %[[VAL_84]] : DMA) -// CHECK: AIE.wire(%[[VAL_83]] : North, %[[VAL_84]] : South) -// CHECK: AIE.wire(%[[VAL_81]] : East, %[[VAL_85:.*]] : West) -// CHECK: AIE.wire(%[[VAL_82]] : East, %[[VAL_86:.*]] : West) -// CHECK: AIE.wire(%[[VAL_21]] : Core, %[[VAL_86]] : Core) -// CHECK: AIE.wire(%[[VAL_21]] : DMA, %[[VAL_86]] : DMA) -// CHECK: AIE.wire(%[[VAL_85]] : North, %[[VAL_86]] : South) -// CHECK: AIE.wire(%[[VAL_83]] : East, %[[VAL_87:.*]] : West) -// CHECK: AIE.wire(%[[VAL_58]] : Core, %[[VAL_87]] : Core) -// CHECK: AIE.wire(%[[VAL_58]] : DMA, %[[VAL_87]] : DMA) -// CHECK: AIE.wire(%[[VAL_86]] : North, %[[VAL_87]] : South) -// CHECK: AIE.wire(%[[VAL_84]] : East, %[[VAL_88:.*]] : West) -// CHECK: AIE.wire(%[[VAL_35]] : Core, %[[VAL_88]] : Core) -// CHECK: AIE.wire(%[[VAL_35]] : DMA, %[[VAL_88]] : DMA) -// CHECK: AIE.wire(%[[VAL_87]] : North, %[[VAL_88]] : South) -// CHECK: AIE.wire(%[[VAL_85]] : East, %[[VAL_89:.*]] : West) -// CHECK: AIE.wire(%[[VAL_90:.*]] : North, %[[VAL_89]] : South) -// CHECK: AIE.wire(%[[VAL_8]] : DMA, %[[VAL_90]] : DMA) -// CHECK: AIE.wire(%[[VAL_86]] : East, %[[VAL_91:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_91]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_91]] : DMA) -// CHECK: AIE.wire(%[[VAL_89]] : North, %[[VAL_91]] : South) -// CHECK: AIE.wire(%[[VAL_87]] : East, %[[VAL_92:.*]] : West) -// CHECK: AIE.wire(%[[VAL_37]] : Core, %[[VAL_92]] : Core) -// CHECK: AIE.wire(%[[VAL_37]] : DMA, %[[VAL_92]] : DMA) -// CHECK: AIE.wire(%[[VAL_91]] : North, %[[VAL_92]] : South) -// CHECK: AIE.wire(%[[VAL_88]] : East, %[[VAL_93:.*]] : West) -// CHECK: AIE.wire(%[[VAL_39]] : Core, %[[VAL_93]] : Core) -// CHECK: AIE.wire(%[[VAL_39]] : DMA, %[[VAL_93]] : DMA) -// CHECK: AIE.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) -// CHECK: AIE.wire(%[[VAL_89]] : East, %[[VAL_94:.*]] : West) -// CHECK: AIE.wire(%[[VAL_95:.*]] : North, %[[VAL_94]] : South) -// CHECK: AIE.wire(%[[VAL_9]] : DMA, %[[VAL_95]] : DMA) -// CHECK: AIE.wire(%[[VAL_92]] : East, %[[VAL_96:.*]] : West) -// CHECK: AIE.wire(%[[VAL_60]] : Core, %[[VAL_96]] : Core) -// CHECK: AIE.wire(%[[VAL_60]] : DMA, %[[VAL_96]] : DMA) -// CHECK: AIE.wire(%[[VAL_93]] : East, %[[VAL_97:.*]] : West) -// CHECK: AIE.wire(%[[VAL_10]] : Core, %[[VAL_97]] : Core) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_97]] : DMA) -// CHECK: AIE.wire(%[[VAL_96]] : North, %[[VAL_97]] : South) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_3:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_5:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_6:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_7:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_8:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_9:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_10:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_11:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_12:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_13:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_14:.*]] = aie.switchbox(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_15:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_16:.*]] = aie.switchbox(%[[VAL_15]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_17:.*]] = aie.switchbox(%[[VAL_5]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_18:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_19:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_20:.*]] = aie.switchbox(%[[VAL_19]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_21:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_22:.*]] = aie.switchbox(%[[VAL_21]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_24:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_25:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_26:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_27:.*]] = aie.shim_mux(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_28:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_29:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_30:.*]] = aie.switchbox(%[[VAL_29]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_31:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_32:.*]] = aie.switchbox(%[[VAL_31]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_33:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_34:.*]] = aie.switchbox(%[[VAL_33]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_35:.*]] = aie.tile(5, 3) +// CHECK: %[[VAL_36:.*]] = aie.switchbox(%[[VAL_35]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_37:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_38:.*]] = aie.switchbox(%[[VAL_37]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_39:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_40:.*]] = aie.switchbox(%[[VAL_39]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_41:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_42:.*]] = aie.switchbox(%[[VAL_41]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_43:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_44:.*]] = aie.switchbox(%[[VAL_43]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_45:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_46:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_47:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_48:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_49:.*]] = aie.switchbox(%[[VAL_48]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_50:.*]] = aie.tile(5, 0) +// CHECK: %[[VAL_51:.*]] = aie.switchbox(%[[VAL_50]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_52:.*]] = aie.shim_mux(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_53:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_54:.*]] = aie.switchbox(%[[VAL_53]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_55:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_56:.*]] = aie.switchbox(%[[VAL_55]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_57:.*]] = aie.shim_mux(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_58:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_59:.*]] = aie.switchbox(%[[VAL_58]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_60:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_61:.*]] = aie.switchbox(%[[VAL_60]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_62:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_63:.*]] = aie.shim_mux(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_41]] : Core, %[[VAL_64:.*]] : Core) +// CHECK: aie.wire(%[[VAL_41]] : DMA, %[[VAL_64]] : DMA) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_65:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_65]] : DMA) +// CHECK: aie.wire(%[[VAL_64]] : North, %[[VAL_65]] : South) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_66:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_66]] : DMA) +// CHECK: aie.wire(%[[VAL_65]] : North, %[[VAL_66]] : South) +// CHECK: aie.wire(%[[VAL_64]] : East, %[[VAL_67:.*]] : West) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_67]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_67]] : DMA) +// CHECK: aie.wire(%[[VAL_68:.*]] : North, %[[VAL_67]] : South) +// CHECK: aie.wire(%[[VAL_65]] : East, %[[VAL_69:.*]] : West) +// CHECK: aie.wire(%[[VAL_13]] : Core, %[[VAL_69]] : Core) +// CHECK: aie.wire(%[[VAL_13]] : DMA, %[[VAL_69]] : DMA) +// CHECK: aie.wire(%[[VAL_67]] : North, %[[VAL_69]] : South) +// CHECK: aie.wire(%[[VAL_66]] : East, %[[VAL_70:.*]] : West) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_70]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_70]] : DMA) +// CHECK: aie.wire(%[[VAL_69]] : North, %[[VAL_70]] : South) +// CHECK: aie.wire(%[[VAL_68]] : East, %[[VAL_71:.*]] : West) +// CHECK: aie.wire(%[[VAL_72:.*]] : North, %[[VAL_71]] : South) +// CHECK: aie.wire(%[[VAL_4]] : DMA, %[[VAL_72]] : DMA) +// CHECK: aie.wire(%[[VAL_67]] : East, %[[VAL_73:.*]] : West) +// CHECK: aie.wire(%[[VAL_15]] : Core, %[[VAL_73]] : Core) +// CHECK: aie.wire(%[[VAL_15]] : DMA, %[[VAL_73]] : DMA) +// CHECK: aie.wire(%[[VAL_71]] : North, %[[VAL_73]] : South) +// CHECK: aie.wire(%[[VAL_69]] : East, %[[VAL_74:.*]] : West) +// CHECK: aie.wire(%[[VAL_5]] : Core, %[[VAL_74]] : Core) +// CHECK: aie.wire(%[[VAL_5]] : DMA, %[[VAL_74]] : DMA) +// CHECK: aie.wire(%[[VAL_73]] : North, %[[VAL_74]] : South) +// CHECK: aie.wire(%[[VAL_70]] : East, %[[VAL_75:.*]] : West) +// CHECK: aie.wire(%[[VAL_29]] : Core, %[[VAL_75]] : Core) +// CHECK: aie.wire(%[[VAL_29]] : DMA, %[[VAL_75]] : DMA) +// CHECK: aie.wire(%[[VAL_74]] : North, %[[VAL_75]] : South) +// CHECK: aie.wire(%[[VAL_71]] : East, %[[VAL_76:.*]] : West) +// CHECK: aie.wire(%[[VAL_77:.*]] : North, %[[VAL_76]] : South) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_77]] : DMA) +// CHECK: aie.wire(%[[VAL_73]] : East, %[[VAL_78:.*]] : West) +// CHECK: aie.wire(%[[VAL_7]] : Core, %[[VAL_78]] : Core) +// CHECK: aie.wire(%[[VAL_7]] : DMA, %[[VAL_78]] : DMA) +// CHECK: aie.wire(%[[VAL_76]] : North, %[[VAL_78]] : South) +// CHECK: aie.wire(%[[VAL_74]] : East, %[[VAL_79:.*]] : West) +// CHECK: aie.wire(%[[VAL_53]] : Core, %[[VAL_79]] : Core) +// CHECK: aie.wire(%[[VAL_53]] : DMA, %[[VAL_79]] : DMA) +// CHECK: aie.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) +// CHECK: aie.wire(%[[VAL_75]] : East, %[[VAL_80:.*]] : West) +// CHECK: aie.wire(%[[VAL_31]] : Core, %[[VAL_80]] : Core) +// CHECK: aie.wire(%[[VAL_31]] : DMA, %[[VAL_80]] : DMA) +// CHECK: aie.wire(%[[VAL_79]] : North, %[[VAL_80]] : South) +// CHECK: aie.wire(%[[VAL_76]] : East, %[[VAL_81:.*]] : West) +// CHECK: aie.wire(%[[VAL_78]] : East, %[[VAL_82:.*]] : West) +// CHECK: aie.wire(%[[VAL_19]] : Core, %[[VAL_82]] : Core) +// CHECK: aie.wire(%[[VAL_19]] : DMA, %[[VAL_82]] : DMA) +// CHECK: aie.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) +// CHECK: aie.wire(%[[VAL_79]] : East, %[[VAL_83:.*]] : West) +// CHECK: aie.wire(%[[VAL_55]] : Core, %[[VAL_83]] : Core) +// CHECK: aie.wire(%[[VAL_55]] : DMA, %[[VAL_83]] : DMA) +// CHECK: aie.wire(%[[VAL_82]] : North, %[[VAL_83]] : South) +// CHECK: aie.wire(%[[VAL_80]] : East, %[[VAL_84:.*]] : West) +// CHECK: aie.wire(%[[VAL_33]] : Core, %[[VAL_84]] : Core) +// CHECK: aie.wire(%[[VAL_33]] : DMA, %[[VAL_84]] : DMA) +// CHECK: aie.wire(%[[VAL_83]] : North, %[[VAL_84]] : South) +// CHECK: aie.wire(%[[VAL_81]] : East, %[[VAL_85:.*]] : West) +// CHECK: aie.wire(%[[VAL_82]] : East, %[[VAL_86:.*]] : West) +// CHECK: aie.wire(%[[VAL_21]] : Core, %[[VAL_86]] : Core) +// CHECK: aie.wire(%[[VAL_21]] : DMA, %[[VAL_86]] : DMA) +// CHECK: aie.wire(%[[VAL_85]] : North, %[[VAL_86]] : South) +// CHECK: aie.wire(%[[VAL_83]] : East, %[[VAL_87:.*]] : West) +// CHECK: aie.wire(%[[VAL_58]] : Core, %[[VAL_87]] : Core) +// CHECK: aie.wire(%[[VAL_58]] : DMA, %[[VAL_87]] : DMA) +// CHECK: aie.wire(%[[VAL_86]] : North, %[[VAL_87]] : South) +// CHECK: aie.wire(%[[VAL_84]] : East, %[[VAL_88:.*]] : West) +// CHECK: aie.wire(%[[VAL_35]] : Core, %[[VAL_88]] : Core) +// CHECK: aie.wire(%[[VAL_35]] : DMA, %[[VAL_88]] : DMA) +// CHECK: aie.wire(%[[VAL_87]] : North, %[[VAL_88]] : South) +// CHECK: aie.wire(%[[VAL_85]] : East, %[[VAL_89:.*]] : West) +// CHECK: aie.wire(%[[VAL_90:.*]] : North, %[[VAL_89]] : South) +// CHECK: aie.wire(%[[VAL_8]] : DMA, %[[VAL_90]] : DMA) +// CHECK: aie.wire(%[[VAL_86]] : East, %[[VAL_91:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_91]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_91]] : DMA) +// CHECK: aie.wire(%[[VAL_89]] : North, %[[VAL_91]] : South) +// CHECK: aie.wire(%[[VAL_87]] : East, %[[VAL_92:.*]] : West) +// CHECK: aie.wire(%[[VAL_37]] : Core, %[[VAL_92]] : Core) +// CHECK: aie.wire(%[[VAL_37]] : DMA, %[[VAL_92]] : DMA) +// CHECK: aie.wire(%[[VAL_91]] : North, %[[VAL_92]] : South) +// CHECK: aie.wire(%[[VAL_88]] : East, %[[VAL_93:.*]] : West) +// CHECK: aie.wire(%[[VAL_39]] : Core, %[[VAL_93]] : Core) +// CHECK: aie.wire(%[[VAL_39]] : DMA, %[[VAL_93]] : DMA) +// CHECK: aie.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) +// CHECK: aie.wire(%[[VAL_89]] : East, %[[VAL_94:.*]] : West) +// CHECK: aie.wire(%[[VAL_95:.*]] : North, %[[VAL_94]] : South) +// CHECK: aie.wire(%[[VAL_9]] : DMA, %[[VAL_95]] : DMA) +// CHECK: aie.wire(%[[VAL_92]] : East, %[[VAL_96:.*]] : West) +// CHECK: aie.wire(%[[VAL_60]] : Core, %[[VAL_96]] : Core) +// CHECK: aie.wire(%[[VAL_60]] : DMA, %[[VAL_96]] : DMA) +// CHECK: aie.wire(%[[VAL_93]] : East, %[[VAL_97:.*]] : West) +// CHECK: aie.wire(%[[VAL_10]] : Core, %[[VAL_97]] : Core) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_97]] : DMA) +// CHECK: aie.wire(%[[VAL_96]] : North, %[[VAL_97]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t11 = AIE.tile(1, 1) - %t13 = AIE.tile(1, 3) - %t20 = AIE.tile(2, 0) - %t22 = AIE.tile(2, 2) - %t30 = AIE.tile(3, 0) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t73 = AIE.tile(7, 3) + aie.device(xcvc1902) { + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t11 = aie.tile(1, 1) + %t13 = aie.tile(1, 3) + %t20 = aie.tile(2, 0) + %t22 = aie.tile(2, 2) + %t30 = aie.tile(3, 0) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t73 = aie.tile(7, 3) - AIE.flow(%t03, DMA : 0, %t70, DMA : 0) - AIE.flow(%t13, DMA : 0, %t70, DMA : 1) - AIE.flow(%t02, DMA : 0, %t60, DMA : 0) - AIE.flow(%t22, DMA : 0, %t60, DMA : 1) + aie.flow(%t03, DMA : 0, %t70, DMA : 0) + aie.flow(%t13, DMA : 0, %t70, DMA : 1) + aie.flow(%t02, DMA : 0, %t60, DMA : 0) + aie.flow(%t22, DMA : 0, %t60, DMA : 1) - AIE.flow(%t03, Core : 0, %t13, Core : 0) - AIE.flow(%t03, Core : 1, %t02, Core : 0) - AIE.flow(%t13, Core : 1, %t22, Core : 0) - AIE.flow(%t02, Core : 1, %t22, Core : 1) + aie.flow(%t03, Core : 0, %t13, Core : 0) + aie.flow(%t03, Core : 1, %t02, Core : 0) + aie.flow(%t13, Core : 1, %t22, Core : 0) + aie.flow(%t02, Core : 1, %t22, Core : 1) - AIE.flow(%t73, DMA : 0, %t20, DMA : 0) - AIE.flow(%t73, DMA : 1, %t30, DMA : 0) - AIE.flow(%t31, DMA : 0, %t20, DMA : 1) - AIE.flow(%t31, DMA : 1, %t30, DMA : 1) + aie.flow(%t73, DMA : 0, %t20, DMA : 0) + aie.flow(%t73, DMA : 1, %t30, DMA : 0) + aie.flow(%t31, DMA : 0, %t20, DMA : 1) + aie.flow(%t31, DMA : 1, %t30, DMA : 1) - AIE.flow(%t73, Core : 0, %t31, Core : 0) - AIE.flow(%t73, Core : 1, %t31, Core : 1) + aie.flow(%t73, Core : 0, %t31, Core : 0) + aie.flow(%t73, Core : 1, %t31, Core : 1) } } diff --git a/test/create-flows/unit_many_flows2.mlir b/test/create-flows/unit_many_flows2.mlir index d8a090eb44..7f13b136c9 100644 --- a/test/create-flows/unit_many_flows2.mlir +++ b/test/create-flows/unit_many_flows2.mlir @@ -10,307 +10,307 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_3:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_5:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_6:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_7:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_8:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_9:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_10:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_11:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_13:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_14:.*]] = AIE.switchbox(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_17:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.switchbox(%[[VAL_5]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.shim_mux(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_21:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_22:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_25:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_28:.*]] = AIE.switchbox(%[[VAL_27]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_29:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_30:.*]] = AIE.shim_mux(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_32:.*]] = AIE.switchbox(%[[VAL_31]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_34:.*]] = AIE.switchbox(%[[VAL_33]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_35:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_36:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_37:.*]] = AIE.switchbox(%[[VAL_36]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_38:.*]] = AIE.tile(5, 0) -// CHECK: %[[VAL_39:.*]] = AIE.switchbox(%[[VAL_38]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.shim_mux(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.shim_mux(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_42:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_43:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_44:.*]] = AIE.switchbox(%[[VAL_43]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_45:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_46:.*]] = AIE.switchbox(%[[VAL_45]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_47:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_48:.*]] = AIE.switchbox(%[[VAL_47]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_49:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_50:.*]] = AIE.switchbox(%[[VAL_49]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_51:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_52:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_53:.*]] = AIE.switchbox(%[[VAL_52]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_54:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_55:.*]] = AIE.switchbox(%[[VAL_54]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_56:.*]] = AIE.tile(5, 3) -// CHECK: %[[VAL_57:.*]] = AIE.switchbox(%[[VAL_56]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_58:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_59:.*]] = AIE.switchbox(%[[VAL_58]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_60:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_61:.*]] = AIE.switchbox(%[[VAL_60]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_31]] : Core, %[[VAL_62:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_31]] : DMA, %[[VAL_62]] : DMA) -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_63:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_63]] : DMA) -// CHECK: AIE.wire(%[[VAL_62]] : North, %[[VAL_63]] : South) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_64:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_64]] : DMA) -// CHECK: AIE.wire(%[[VAL_63]] : North, %[[VAL_64]] : South) -// CHECK: AIE.wire(%[[VAL_62]] : East, %[[VAL_65:.*]] : West) -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_65]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_65]] : DMA) -// CHECK: AIE.wire(%[[VAL_66:.*]] : North, %[[VAL_65]] : South) -// CHECK: AIE.wire(%[[VAL_63]] : East, %[[VAL_67:.*]] : West) -// CHECK: AIE.wire(%[[VAL_13]] : Core, %[[VAL_67]] : Core) -// CHECK: AIE.wire(%[[VAL_13]] : DMA, %[[VAL_67]] : DMA) -// CHECK: AIE.wire(%[[VAL_65]] : North, %[[VAL_67]] : South) -// CHECK: AIE.wire(%[[VAL_64]] : East, %[[VAL_68:.*]] : West) -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_68]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_68]] : DMA) -// CHECK: AIE.wire(%[[VAL_67]] : North, %[[VAL_68]] : South) -// CHECK: AIE.wire(%[[VAL_66]] : East, %[[VAL_69:.*]] : West) -// CHECK: AIE.wire(%[[VAL_70:.*]] : North, %[[VAL_69]] : South) -// CHECK: AIE.wire(%[[VAL_4]] : DMA, %[[VAL_70]] : DMA) -// CHECK: AIE.wire(%[[VAL_65]] : East, %[[VAL_71:.*]] : West) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_71]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_71]] : DMA) -// CHECK: AIE.wire(%[[VAL_69]] : North, %[[VAL_71]] : South) -// CHECK: AIE.wire(%[[VAL_67]] : East, %[[VAL_72:.*]] : West) -// CHECK: AIE.wire(%[[VAL_5]] : Core, %[[VAL_72]] : Core) -// CHECK: AIE.wire(%[[VAL_5]] : DMA, %[[VAL_72]] : DMA) -// CHECK: AIE.wire(%[[VAL_71]] : North, %[[VAL_72]] : South) -// CHECK: AIE.wire(%[[VAL_68]] : East, %[[VAL_73:.*]] : West) -// CHECK: AIE.wire(%[[VAL_43]] : Core, %[[VAL_73]] : Core) -// CHECK: AIE.wire(%[[VAL_43]] : DMA, %[[VAL_73]] : DMA) -// CHECK: AIE.wire(%[[VAL_72]] : North, %[[VAL_73]] : South) -// CHECK: AIE.wire(%[[VAL_69]] : East, %[[VAL_74:.*]] : West) -// CHECK: AIE.wire(%[[VAL_75:.*]] : North, %[[VAL_74]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_75]] : DMA) -// CHECK: AIE.wire(%[[VAL_71]] : East, %[[VAL_76:.*]] : West) -// CHECK: AIE.wire(%[[VAL_7]] : Core, %[[VAL_76]] : Core) -// CHECK: AIE.wire(%[[VAL_7]] : DMA, %[[VAL_76]] : DMA) -// CHECK: AIE.wire(%[[VAL_74]] : North, %[[VAL_76]] : South) -// CHECK: AIE.wire(%[[VAL_73]] : East, %[[VAL_77:.*]] : West) -// CHECK: AIE.wire(%[[VAL_52]] : Core, %[[VAL_77]] : Core) -// CHECK: AIE.wire(%[[VAL_52]] : DMA, %[[VAL_77]] : DMA) -// CHECK: AIE.wire(%[[VAL_74]] : East, %[[VAL_78:.*]] : West) -// CHECK: AIE.wire(%[[VAL_76]] : East, %[[VAL_79:.*]] : West) -// CHECK: AIE.wire(%[[VAL_22]] : Core, %[[VAL_79]] : Core) -// CHECK: AIE.wire(%[[VAL_22]] : DMA, %[[VAL_79]] : DMA) -// CHECK: AIE.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) -// CHECK: AIE.wire(%[[VAL_77]] : East, %[[VAL_80:.*]] : West) -// CHECK: AIE.wire(%[[VAL_54]] : Core, %[[VAL_80]] : Core) -// CHECK: AIE.wire(%[[VAL_54]] : DMA, %[[VAL_80]] : DMA) -// CHECK: AIE.wire(%[[VAL_78]] : East, %[[VAL_81:.*]] : West) -// CHECK: AIE.wire(%[[VAL_79]] : East, %[[VAL_82:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_82]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_82]] : DMA) -// CHECK: AIE.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) -// CHECK: AIE.wire(%[[VAL_45]] : Core, %[[VAL_83:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_45]] : DMA, %[[VAL_83]] : DMA) -// CHECK: AIE.wire(%[[VAL_82]] : North, %[[VAL_83]] : South) -// CHECK: AIE.wire(%[[VAL_80]] : East, %[[VAL_84:.*]] : West) -// CHECK: AIE.wire(%[[VAL_56]] : Core, %[[VAL_84]] : Core) -// CHECK: AIE.wire(%[[VAL_56]] : DMA, %[[VAL_84]] : DMA) -// CHECK: AIE.wire(%[[VAL_83]] : North, %[[VAL_84]] : South) -// CHECK: AIE.wire(%[[VAL_81]] : East, %[[VAL_85:.*]] : West) -// CHECK: AIE.wire(%[[VAL_86:.*]] : North, %[[VAL_85]] : South) -// CHECK: AIE.wire(%[[VAL_8]] : DMA, %[[VAL_86]] : DMA) -// CHECK: AIE.wire(%[[VAL_82]] : East, %[[VAL_87:.*]] : West) -// CHECK: AIE.wire(%[[VAL_27]] : Core, %[[VAL_87]] : Core) -// CHECK: AIE.wire(%[[VAL_27]] : DMA, %[[VAL_87]] : DMA) -// CHECK: AIE.wire(%[[VAL_85]] : North, %[[VAL_87]] : South) -// CHECK: AIE.wire(%[[VAL_83]] : East, %[[VAL_88:.*]] : West) -// CHECK: AIE.wire(%[[VAL_47]] : Core, %[[VAL_88]] : Core) -// CHECK: AIE.wire(%[[VAL_47]] : DMA, %[[VAL_88]] : DMA) -// CHECK: AIE.wire(%[[VAL_87]] : North, %[[VAL_88]] : South) -// CHECK: AIE.wire(%[[VAL_84]] : East, %[[VAL_89:.*]] : West) -// CHECK: AIE.wire(%[[VAL_58]] : Core, %[[VAL_89]] : Core) -// CHECK: AIE.wire(%[[VAL_58]] : DMA, %[[VAL_89]] : DMA) -// CHECK: AIE.wire(%[[VAL_88]] : North, %[[VAL_89]] : South) -// CHECK: AIE.wire(%[[VAL_85]] : East, %[[VAL_90:.*]] : West) -// CHECK: AIE.wire(%[[VAL_91:.*]] : North, %[[VAL_90]] : South) -// CHECK: AIE.wire(%[[VAL_9]] : DMA, %[[VAL_91]] : DMA) -// CHECK: AIE.wire(%[[VAL_87]] : East, %[[VAL_92:.*]] : West) -// CHECK: AIE.wire(%[[VAL_60]] : Core, %[[VAL_92]] : Core) -// CHECK: AIE.wire(%[[VAL_60]] : DMA, %[[VAL_92]] : DMA) -// CHECK: AIE.wire(%[[VAL_90]] : North, %[[VAL_92]] : South) -// CHECK: AIE.wire(%[[VAL_88]] : East, %[[VAL_93:.*]] : West) -// CHECK: AIE.wire(%[[VAL_49]] : Core, %[[VAL_93]] : Core) -// CHECK: AIE.wire(%[[VAL_49]] : DMA, %[[VAL_93]] : DMA) -// CHECK: AIE.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) -// CHECK: AIE.wire(%[[VAL_89]] : East, %[[VAL_94:.*]] : West) -// CHECK: AIE.wire(%[[VAL_10]] : Core, %[[VAL_94]] : Core) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_94]] : DMA) -// CHECK: AIE.wire(%[[VAL_93]] : North, %[[VAL_94]] : South) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_3:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_5:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_6:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_7:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_8:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_9:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_10:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_11:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_12:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_13:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_14:.*]] = aie.switchbox(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_15:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_16:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_17:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_18:.*]] = aie.switchbox(%[[VAL_5]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_19:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_20:.*]] = aie.shim_mux(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_21:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_22:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_24:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_25:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_26:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_27:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_28:.*]] = aie.switchbox(%[[VAL_27]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_29:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_30:.*]] = aie.shim_mux(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_31:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_32:.*]] = aie.switchbox(%[[VAL_31]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_33:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_34:.*]] = aie.switchbox(%[[VAL_33]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_35:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_36:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_37:.*]] = aie.switchbox(%[[VAL_36]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_38:.*]] = aie.tile(5, 0) +// CHECK: %[[VAL_39:.*]] = aie.switchbox(%[[VAL_38]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_40:.*]] = aie.shim_mux(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_41:.*]] = aie.shim_mux(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_42:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_43:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_44:.*]] = aie.switchbox(%[[VAL_43]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_45:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_46:.*]] = aie.switchbox(%[[VAL_45]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_47:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_48:.*]] = aie.switchbox(%[[VAL_47]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_49:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_50:.*]] = aie.switchbox(%[[VAL_49]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_51:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_52:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_53:.*]] = aie.switchbox(%[[VAL_52]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_54:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_55:.*]] = aie.switchbox(%[[VAL_54]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_56:.*]] = aie.tile(5, 3) +// CHECK: %[[VAL_57:.*]] = aie.switchbox(%[[VAL_56]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_58:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_59:.*]] = aie.switchbox(%[[VAL_58]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_60:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_61:.*]] = aie.switchbox(%[[VAL_60]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_31]] : Core, %[[VAL_62:.*]] : Core) +// CHECK: aie.wire(%[[VAL_31]] : DMA, %[[VAL_62]] : DMA) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_63:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_63]] : DMA) +// CHECK: aie.wire(%[[VAL_62]] : North, %[[VAL_63]] : South) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_64:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_64]] : DMA) +// CHECK: aie.wire(%[[VAL_63]] : North, %[[VAL_64]] : South) +// CHECK: aie.wire(%[[VAL_62]] : East, %[[VAL_65:.*]] : West) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_65]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_65]] : DMA) +// CHECK: aie.wire(%[[VAL_66:.*]] : North, %[[VAL_65]] : South) +// CHECK: aie.wire(%[[VAL_63]] : East, %[[VAL_67:.*]] : West) +// CHECK: aie.wire(%[[VAL_13]] : Core, %[[VAL_67]] : Core) +// CHECK: aie.wire(%[[VAL_13]] : DMA, %[[VAL_67]] : DMA) +// CHECK: aie.wire(%[[VAL_65]] : North, %[[VAL_67]] : South) +// CHECK: aie.wire(%[[VAL_64]] : East, %[[VAL_68:.*]] : West) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_68]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_68]] : DMA) +// CHECK: aie.wire(%[[VAL_67]] : North, %[[VAL_68]] : South) +// CHECK: aie.wire(%[[VAL_66]] : East, %[[VAL_69:.*]] : West) +// CHECK: aie.wire(%[[VAL_70:.*]] : North, %[[VAL_69]] : South) +// CHECK: aie.wire(%[[VAL_4]] : DMA, %[[VAL_70]] : DMA) +// CHECK: aie.wire(%[[VAL_65]] : East, %[[VAL_71:.*]] : West) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_71]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_71]] : DMA) +// CHECK: aie.wire(%[[VAL_69]] : North, %[[VAL_71]] : South) +// CHECK: aie.wire(%[[VAL_67]] : East, %[[VAL_72:.*]] : West) +// CHECK: aie.wire(%[[VAL_5]] : Core, %[[VAL_72]] : Core) +// CHECK: aie.wire(%[[VAL_5]] : DMA, %[[VAL_72]] : DMA) +// CHECK: aie.wire(%[[VAL_71]] : North, %[[VAL_72]] : South) +// CHECK: aie.wire(%[[VAL_68]] : East, %[[VAL_73:.*]] : West) +// CHECK: aie.wire(%[[VAL_43]] : Core, %[[VAL_73]] : Core) +// CHECK: aie.wire(%[[VAL_43]] : DMA, %[[VAL_73]] : DMA) +// CHECK: aie.wire(%[[VAL_72]] : North, %[[VAL_73]] : South) +// CHECK: aie.wire(%[[VAL_69]] : East, %[[VAL_74:.*]] : West) +// CHECK: aie.wire(%[[VAL_75:.*]] : North, %[[VAL_74]] : South) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_75]] : DMA) +// CHECK: aie.wire(%[[VAL_71]] : East, %[[VAL_76:.*]] : West) +// CHECK: aie.wire(%[[VAL_7]] : Core, %[[VAL_76]] : Core) +// CHECK: aie.wire(%[[VAL_7]] : DMA, %[[VAL_76]] : DMA) +// CHECK: aie.wire(%[[VAL_74]] : North, %[[VAL_76]] : South) +// CHECK: aie.wire(%[[VAL_73]] : East, %[[VAL_77:.*]] : West) +// CHECK: aie.wire(%[[VAL_52]] : Core, %[[VAL_77]] : Core) +// CHECK: aie.wire(%[[VAL_52]] : DMA, %[[VAL_77]] : DMA) +// CHECK: aie.wire(%[[VAL_74]] : East, %[[VAL_78:.*]] : West) +// CHECK: aie.wire(%[[VAL_76]] : East, %[[VAL_79:.*]] : West) +// CHECK: aie.wire(%[[VAL_22]] : Core, %[[VAL_79]] : Core) +// CHECK: aie.wire(%[[VAL_22]] : DMA, %[[VAL_79]] : DMA) +// CHECK: aie.wire(%[[VAL_78]] : North, %[[VAL_79]] : South) +// CHECK: aie.wire(%[[VAL_77]] : East, %[[VAL_80:.*]] : West) +// CHECK: aie.wire(%[[VAL_54]] : Core, %[[VAL_80]] : Core) +// CHECK: aie.wire(%[[VAL_54]] : DMA, %[[VAL_80]] : DMA) +// CHECK: aie.wire(%[[VAL_78]] : East, %[[VAL_81:.*]] : West) +// CHECK: aie.wire(%[[VAL_79]] : East, %[[VAL_82:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_82]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_82]] : DMA) +// CHECK: aie.wire(%[[VAL_81]] : North, %[[VAL_82]] : South) +// CHECK: aie.wire(%[[VAL_45]] : Core, %[[VAL_83:.*]] : Core) +// CHECK: aie.wire(%[[VAL_45]] : DMA, %[[VAL_83]] : DMA) +// CHECK: aie.wire(%[[VAL_82]] : North, %[[VAL_83]] : South) +// CHECK: aie.wire(%[[VAL_80]] : East, %[[VAL_84:.*]] : West) +// CHECK: aie.wire(%[[VAL_56]] : Core, %[[VAL_84]] : Core) +// CHECK: aie.wire(%[[VAL_56]] : DMA, %[[VAL_84]] : DMA) +// CHECK: aie.wire(%[[VAL_83]] : North, %[[VAL_84]] : South) +// CHECK: aie.wire(%[[VAL_81]] : East, %[[VAL_85:.*]] : West) +// CHECK: aie.wire(%[[VAL_86:.*]] : North, %[[VAL_85]] : South) +// CHECK: aie.wire(%[[VAL_8]] : DMA, %[[VAL_86]] : DMA) +// CHECK: aie.wire(%[[VAL_82]] : East, %[[VAL_87:.*]] : West) +// CHECK: aie.wire(%[[VAL_27]] : Core, %[[VAL_87]] : Core) +// CHECK: aie.wire(%[[VAL_27]] : DMA, %[[VAL_87]] : DMA) +// CHECK: aie.wire(%[[VAL_85]] : North, %[[VAL_87]] : South) +// CHECK: aie.wire(%[[VAL_83]] : East, %[[VAL_88:.*]] : West) +// CHECK: aie.wire(%[[VAL_47]] : Core, %[[VAL_88]] : Core) +// CHECK: aie.wire(%[[VAL_47]] : DMA, %[[VAL_88]] : DMA) +// CHECK: aie.wire(%[[VAL_87]] : North, %[[VAL_88]] : South) +// CHECK: aie.wire(%[[VAL_84]] : East, %[[VAL_89:.*]] : West) +// CHECK: aie.wire(%[[VAL_58]] : Core, %[[VAL_89]] : Core) +// CHECK: aie.wire(%[[VAL_58]] : DMA, %[[VAL_89]] : DMA) +// CHECK: aie.wire(%[[VAL_88]] : North, %[[VAL_89]] : South) +// CHECK: aie.wire(%[[VAL_85]] : East, %[[VAL_90:.*]] : West) +// CHECK: aie.wire(%[[VAL_91:.*]] : North, %[[VAL_90]] : South) +// CHECK: aie.wire(%[[VAL_9]] : DMA, %[[VAL_91]] : DMA) +// CHECK: aie.wire(%[[VAL_87]] : East, %[[VAL_92:.*]] : West) +// CHECK: aie.wire(%[[VAL_60]] : Core, %[[VAL_92]] : Core) +// CHECK: aie.wire(%[[VAL_60]] : DMA, %[[VAL_92]] : DMA) +// CHECK: aie.wire(%[[VAL_90]] : North, %[[VAL_92]] : South) +// CHECK: aie.wire(%[[VAL_88]] : East, %[[VAL_93:.*]] : West) +// CHECK: aie.wire(%[[VAL_49]] : Core, %[[VAL_93]] : Core) +// CHECK: aie.wire(%[[VAL_49]] : DMA, %[[VAL_93]] : DMA) +// CHECK: aie.wire(%[[VAL_92]] : North, %[[VAL_93]] : South) +// CHECK: aie.wire(%[[VAL_89]] : East, %[[VAL_94:.*]] : West) +// CHECK: aie.wire(%[[VAL_10]] : Core, %[[VAL_94]] : Core) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_94]] : DMA) +// CHECK: aie.wire(%[[VAL_93]] : North, %[[VAL_94]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t02 = AIE.tile(0, 2) - %t03 = AIE.tile(0, 3) - %t11 = AIE.tile(1, 1) - %t13 = AIE.tile(1, 3) - %t20 = AIE.tile(2, 0) - %t22 = AIE.tile(2, 2) - %t30 = AIE.tile(3, 0) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t73 = AIE.tile(7, 3) + aie.device(xcvc1902) { + %t02 = aie.tile(0, 2) + %t03 = aie.tile(0, 3) + %t11 = aie.tile(1, 1) + %t13 = aie.tile(1, 3) + %t20 = aie.tile(2, 0) + %t22 = aie.tile(2, 2) + %t30 = aie.tile(3, 0) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t73 = aie.tile(7, 3) - AIE.flow(%t03, DMA : 0, %t30, DMA : 0) - AIE.flow(%t03, DMA : 1, %t70, DMA : 1) - AIE.flow(%t02, DMA : 0, %t60, DMA : 0) - AIE.flow(%t22, DMA : 0, %t20, DMA : 0) + aie.flow(%t03, DMA : 0, %t30, DMA : 0) + aie.flow(%t03, DMA : 1, %t70, DMA : 1) + aie.flow(%t02, DMA : 0, %t60, DMA : 0) + aie.flow(%t22, DMA : 0, %t20, DMA : 0) - AIE.flow(%t22, Core : 0, %t13, Core : 0) - AIE.flow(%t03, Core : 1, %t02, Core : 0) - AIE.flow(%t73, Core : 0, %t31, Core : 0) - AIE.flow(%t73, Core : 1, %t22, Core : 1) + aie.flow(%t22, Core : 0, %t13, Core : 0) + aie.flow(%t03, Core : 1, %t02, Core : 0) + aie.flow(%t73, Core : 0, %t31, Core : 0) + aie.flow(%t73, Core : 1, %t22, Core : 1) - AIE.flow(%t73, DMA : 0, %t60, DMA : 1) - AIE.flow(%t73, DMA : 1, %t70, DMA : 0) - AIE.flow(%t31, DMA : 0, %t20, DMA : 1) - AIE.flow(%t31, DMA : 1, %t30, DMA : 1) + aie.flow(%t73, DMA : 0, %t60, DMA : 1) + aie.flow(%t73, DMA : 1, %t70, DMA : 0) + aie.flow(%t31, DMA : 0, %t20, DMA : 1) + aie.flow(%t31, DMA : 1, %t30, DMA : 1) - AIE.flow(%t03, Core : 0, %t02, Core : 1) - AIE.flow(%t13, Core : 1, %t31, Core : 1) + aie.flow(%t03, Core : 0, %t02, Core : 1) + aie.flow(%t13, Core : 1, %t31, Core : 1) } } diff --git a/test/create-flows/unit_maxiter_err_test.mlir b/test/create-flows/unit_maxiter_err_test.mlir index 9467c54d7e..57e0115e91 100644 --- a/test/create-flows/unit_maxiter_err_test.mlir +++ b/test/create-flows/unit_maxiter_err_test.mlir @@ -12,70 +12,70 @@ // CHECK: error: Unable to find a legal routing module { - AIE.device(xcvc1902) { - %t01 = AIE.tile(0, 1) - %t11 = AIE.tile(1, 1) - %t21 = AIE.tile(2, 1) - %t31 = AIE.tile(3, 1) - %t41 = AIE.tile(4, 1) - %t51 = AIE.tile(5, 1) - %t61 = AIE.tile(6, 1) - %t71 = AIE.tile(7, 1) - %t81 = AIE.tile(8, 1) - %t02 = AIE.tile(0, 2) - %t12 = AIE.tile(1, 2) - %t22 = AIE.tile(2, 2) - %t32 = AIE.tile(3, 2) - %t42 = AIE.tile(4, 2) - %t52 = AIE.tile(5, 2) - %t62 = AIE.tile(6, 2) - %t72 = AIE.tile(7, 2) - %t82 = AIE.tile(8, 2) - %t03 = AIE.tile(0, 3) - %t13 = AIE.tile(1, 3) - %t23 = AIE.tile(2, 3) - %t33 = AIE.tile(3, 3) - %t43 = AIE.tile(4, 3) - %t53 = AIE.tile(5, 3) - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t83 = AIE.tile(8, 3) - %t04 = AIE.tile(0, 4) - %t14 = AIE.tile(1, 4) - %t24 = AIE.tile(2, 4) - %t34 = AIE.tile(3, 4) - %t44 = AIE.tile(4, 4) - %t54 = AIE.tile(5, 4) - %t64 = AIE.tile(6, 4) - %t74 = AIE.tile(7, 4) - %t84 = AIE.tile(8, 4) - %t20 = AIE.tile(2, 0) - %t60 = AIE.tile(6, 0) + aie.device(xcvc1902) { + %t01 = aie.tile(0, 1) + %t11 = aie.tile(1, 1) + %t21 = aie.tile(2, 1) + %t31 = aie.tile(3, 1) + %t41 = aie.tile(4, 1) + %t51 = aie.tile(5, 1) + %t61 = aie.tile(6, 1) + %t71 = aie.tile(7, 1) + %t81 = aie.tile(8, 1) + %t02 = aie.tile(0, 2) + %t12 = aie.tile(1, 2) + %t22 = aie.tile(2, 2) + %t32 = aie.tile(3, 2) + %t42 = aie.tile(4, 2) + %t52 = aie.tile(5, 2) + %t62 = aie.tile(6, 2) + %t72 = aie.tile(7, 2) + %t82 = aie.tile(8, 2) + %t03 = aie.tile(0, 3) + %t13 = aie.tile(1, 3) + %t23 = aie.tile(2, 3) + %t33 = aie.tile(3, 3) + %t43 = aie.tile(4, 3) + %t53 = aie.tile(5, 3) + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t83 = aie.tile(8, 3) + %t04 = aie.tile(0, 4) + %t14 = aie.tile(1, 4) + %t24 = aie.tile(2, 4) + %t34 = aie.tile(3, 4) + %t44 = aie.tile(4, 4) + %t54 = aie.tile(5, 4) + %t64 = aie.tile(6, 4) + %t74 = aie.tile(7, 4) + %t84 = aie.tile(8, 4) + %t20 = aie.tile(2, 0) + %t60 = aie.tile(6, 0) - AIE.flow(%t01, DMA : 0, %t51, DMA : 0) - AIE.flow(%t11, DMA : 0, %t61, DMA : 0) - AIE.flow(%t21, DMA : 0, %t71, DMA : 0) - AIE.flow(%t31, DMA : 0, %t81, DMA : 0) - AIE.flow(%t41, DMA : 0, %t81, DMA : 1) + aie.flow(%t01, DMA : 0, %t51, DMA : 0) + aie.flow(%t11, DMA : 0, %t61, DMA : 0) + aie.flow(%t21, DMA : 0, %t71, DMA : 0) + aie.flow(%t31, DMA : 0, %t81, DMA : 0) + aie.flow(%t41, DMA : 0, %t81, DMA : 1) - AIE.flow(%t02, DMA : 0, %t52, DMA : 0) - AIE.flow(%t12, DMA : 0, %t62, DMA : 0) - AIE.flow(%t22, DMA : 0, %t72, DMA : 0) - AIE.flow(%t32, DMA : 0, %t82, DMA : 0) - AIE.flow(%t42, DMA : 0, %t82, DMA : 1) + aie.flow(%t02, DMA : 0, %t52, DMA : 0) + aie.flow(%t12, DMA : 0, %t62, DMA : 0) + aie.flow(%t22, DMA : 0, %t72, DMA : 0) + aie.flow(%t32, DMA : 0, %t82, DMA : 0) + aie.flow(%t42, DMA : 0, %t82, DMA : 1) - AIE.flow(%t03, DMA : 0, %t53, DMA : 0) - AIE.flow(%t13, DMA : 0, %t63, DMA : 0) - AIE.flow(%t23, DMA : 0, %t73, DMA : 0) - AIE.flow(%t33, DMA : 0, %t83, DMA : 0) - AIE.flow(%t43, DMA : 0, %t83, DMA : 1) + aie.flow(%t03, DMA : 0, %t53, DMA : 0) + aie.flow(%t13, DMA : 0, %t63, DMA : 0) + aie.flow(%t23, DMA : 0, %t73, DMA : 0) + aie.flow(%t33, DMA : 0, %t83, DMA : 0) + aie.flow(%t43, DMA : 0, %t83, DMA : 1) - AIE.flow(%t04, DMA : 0, %t54, DMA : 0) - AIE.flow(%t14, DMA : 0, %t64, DMA : 0) - AIE.flow(%t24, DMA : 0, %t74, DMA : 0) - AIE.flow(%t34, DMA : 0, %t84, DMA : 0) - AIE.flow(%t44, DMA : 0, %t84, DMA : 1) + aie.flow(%t04, DMA : 0, %t54, DMA : 0) + aie.flow(%t14, DMA : 0, %t64, DMA : 0) + aie.flow(%t24, DMA : 0, %t74, DMA : 0) + aie.flow(%t34, DMA : 0, %t84, DMA : 0) + aie.flow(%t44, DMA : 0, %t84, DMA : 1) - AIE.flow(%t20, DMA : 0, %t60, DMA : 0) + aie.flow(%t20, DMA : 0, %t60, DMA : 0) } } diff --git a/test/create-flows/unit_memtile.mlir b/test/create-flows/unit_memtile.mlir index 61e5527e12..90b5e0bd5e 100644 --- a/test/create-flows/unit_memtile.mlir +++ b/test/create-flows/unit_memtile.mlir @@ -10,81 +10,81 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2802) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 4) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_3:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_4:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcve2802) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 4) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_3:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_4:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_5:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_6:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_6:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_7:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_7:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_8:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_8]] : DMA) -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_9:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_9]] : DMA) -// CHECK: AIE.wire(%[[VAL_8]] : North, %[[VAL_9]] : South) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_10:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_10]] : DMA) -// CHECK: AIE.wire(%[[VAL_9]] : North, %[[VAL_10]] : South) -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_11:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_11]] : DMA) -// CHECK: AIE.wire(%[[VAL_10]] : North, %[[VAL_11]] : South) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_8:.*]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_8]] : DMA) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_9:.*]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_9]] : DMA) +// CHECK: aie.wire(%[[VAL_8]] : North, %[[VAL_9]] : South) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_10:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_10]] : DMA) +// CHECK: aie.wire(%[[VAL_9]] : North, %[[VAL_10]] : South) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_11:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_11]] : DMA) +// CHECK: aie.wire(%[[VAL_10]] : North, %[[VAL_11]] : South) // CHECK: } module { - AIE.device(xcve2802) { - %t04 = AIE.tile(0, 4) - %t03 = AIE.tile(0, 3) - %t02 = AIE.tile(0, 2) - %t01 = AIE.tile(0, 1) + aie.device(xcve2802) { + %t04 = aie.tile(0, 4) + %t03 = aie.tile(0, 3) + %t02 = aie.tile(0, 2) + %t01 = aie.tile(0, 1) - AIE.flow(%t01, DMA : 0, %t02, DMA : 0) - AIE.flow(%t01, DMA : 1, %t02, DMA : 1) - AIE.flow(%t02, DMA : 0, %t01, DMA : 0) - AIE.flow(%t02, DMA : 1, %t01, DMA : 1) + aie.flow(%t01, DMA : 0, %t02, DMA : 0) + aie.flow(%t01, DMA : 1, %t02, DMA : 1) + aie.flow(%t02, DMA : 0, %t01, DMA : 0) + aie.flow(%t02, DMA : 1, %t01, DMA : 1) - AIE.flow(%t02, DMA : 2, %t03, DMA : 0) - AIE.flow(%t02, DMA : 3, %t03, DMA : 1) - AIE.flow(%t03, DMA : 0, %t02, DMA : 2) - AIE.flow(%t03, DMA : 1, %t02, DMA : 3) + aie.flow(%t02, DMA : 2, %t03, DMA : 0) + aie.flow(%t02, DMA : 3, %t03, DMA : 1) + aie.flow(%t03, DMA : 0, %t02, DMA : 2) + aie.flow(%t03, DMA : 1, %t02, DMA : 3) - AIE.flow(%t02, DMA : 4, %t04, DMA : 0) - AIE.flow(%t02, DMA : 5, %t04, DMA : 1) - AIE.flow(%t04, DMA : 0, %t02, DMA : 4) - AIE.flow(%t04, DMA : 1, %t02, DMA : 5) + aie.flow(%t02, DMA : 4, %t04, DMA : 0) + aie.flow(%t02, DMA : 5, %t04, DMA : 1) + aie.flow(%t04, DMA : 0, %t02, DMA : 4) + aie.flow(%t04, DMA : 1, %t02, DMA : 5) } } diff --git a/test/create-flows/unit_memtile_routing_constraints.mlir b/test/create-flows/unit_memtile_routing_constraints.mlir index 2bbe3ab496..a89c7bc819 100644 --- a/test/create-flows/unit_memtile_routing_constraints.mlir +++ b/test/create-flows/unit_memtile_routing_constraints.mlir @@ -10,36 +10,36 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK: %tile_2_0 = AIE.tile(2, 0) -// CHECK: %tile_2_1 = AIE.tile(2, 1) -// CHECK: %tile_2_2 = AIE.tile(2, 2) -// CHECK: %tile_2_3 = AIE.tile(2, 3) -// CHECK: %switchbox_2_1 = AIE.switchbox(%tile_2_1) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %tile_2_0 = aie.tile(2, 0) +// CHECK: %tile_2_1 = aie.tile(2, 1) +// CHECK: %tile_2_2 = aie.tile(2, 2) +// CHECK: %tile_2_3 = aie.tile(2, 3) +// CHECK: %switchbox_2_1 = aie.switchbox(%tile_2_1) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_2_2 = AIE.switchbox(%tile_2_2) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %switchbox_2_2 = aie.switchbox(%tile_2_2) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_2_0 = AIE.switchbox(%tile_2_0) { -// CHECK: AIE.connect +// CHECK: %switchbox_2_0 = aie.switchbox(%tile_2_0) { +// CHECK: aie.connect // CHECK: } -// CHECK: %shim_mux_2_0 = AIE.shim_mux(%tile_2_0) { -// CHECK: AIE.connect +// CHECK: %shim_mux_2_0 = aie.shim_mux(%tile_2_0) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_2_3 = AIE.switchbox(%tile_2_3) { -// CHECK: AIE.connect +// CHECK: %switchbox_2_3 = aie.switchbox(%tile_2_3) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcve2802) { - %tile_2_0 = AIE.tile(2, 0) - %tile_2_1 = AIE.tile(2, 1) - %tile_2_2 = AIE.tile(2, 2) - %tile_2_3 = AIE.tile(2, 3) + aie.device(xcve2802) { + %tile_2_0 = aie.tile(2, 0) + %tile_2_1 = aie.tile(2, 1) + %tile_2_2 = aie.tile(2, 2) + %tile_2_3 = aie.tile(2, 3) - AIE.flow(%tile_2_2, DMA : 0, %tile_2_1, DMA : 0) - AIE.flow(%tile_2_3, DMA : 0, %tile_2_0, DMA : 0) + aie.flow(%tile_2_2, DMA : 0, %tile_2_1, DMA : 0) + aie.flow(%tile_2_3, DMA : 0, %tile_2_0, DMA : 0) } } diff --git a/test/create-flows/unit_mmult.mlir b/test/create-flows/unit_mmult.mlir index eb528a6caa..876f09333d 100644 --- a/test/create-flows/unit_mmult.mlir +++ b/test/create-flows/unit_mmult.mlir @@ -10,644 +10,644 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_3:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_3]], 1) -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_3]], 3) -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "buf11"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_3]], 2) -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "buf10"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_3]], 0) -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "buf9"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_11:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: %[[VAL_12:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_3:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_3]], 1) +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_3]], 3) +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "buf11"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_3]], 2) +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "buf10"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_3]], 0) +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "buf9"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_11:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: %[[VAL_12:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: -// CHECK: %[[VAL_13:.*]] = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) +// CHECK: %[[VAL_13:.*]] = aie.dma_start(S2MM, 1, ^bb4, ^bb7) // CHECK: ^bb4: -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb5: -// CHECK: %[[VAL_14:.*]] = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) +// CHECK: %[[VAL_14:.*]] = aie.dma_start(MM2S, 0, ^bb6, ^bb3) // CHECK: ^bb6: -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb7: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_16:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_17:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_18:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_19:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_20:.*]] = AIE.lock(%[[VAL_19]], 1) -// CHECK: %[[VAL_21:.*]] = AIE.lock(%[[VAL_19]], 3) -// CHECK: %[[VAL_22:.*]] = AIE.buffer(%[[VAL_19]]) {sym_name = "buf8"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_23:.*]] = AIE.lock(%[[VAL_19]], 2) -// CHECK: %[[VAL_24:.*]] = AIE.buffer(%[[VAL_19]]) {sym_name = "buf7"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_25:.*]] = AIE.lock(%[[VAL_19]], 0) -// CHECK: %[[VAL_26:.*]] = AIE.buffer(%[[VAL_19]]) {sym_name = "buf6"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_27:.*]] = AIE.mem(%[[VAL_19]]) { -// CHECK: %[[VAL_28:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_15:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_16:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_17:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_18:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_19:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_20:.*]] = aie.lock(%[[VAL_19]], 1) +// CHECK: %[[VAL_21:.*]] = aie.lock(%[[VAL_19]], 3) +// CHECK: %[[VAL_22:.*]] = aie.buffer(%[[VAL_19]]) {sym_name = "buf8"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_23:.*]] = aie.lock(%[[VAL_19]], 2) +// CHECK: %[[VAL_24:.*]] = aie.buffer(%[[VAL_19]]) {sym_name = "buf7"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_25:.*]] = aie.lock(%[[VAL_19]], 0) +// CHECK: %[[VAL_26:.*]] = aie.buffer(%[[VAL_19]]) {sym_name = "buf6"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_27:.*]] = aie.mem(%[[VAL_19]]) { +// CHECK: %[[VAL_28:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_25]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_26]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_25]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_25]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_26]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_25]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_20]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_22]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_20]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_22]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: -// CHECK: %[[VAL_29:.*]] = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) +// CHECK: %[[VAL_29:.*]] = aie.dma_start(S2MM, 1, ^bb4, ^bb7) // CHECK: ^bb4: -// CHECK: AIE.use_lock(%[[VAL_23]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_24]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_23]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_23]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_24]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_23]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb5: -// CHECK: %[[VAL_30:.*]] = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) +// CHECK: %[[VAL_30:.*]] = aie.dma_start(MM2S, 0, ^bb6, ^bb3) // CHECK: ^bb6: -// CHECK: AIE.use_lock(%[[VAL_21]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_22]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 0) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[VAL_21]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_22]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 0) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb7: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_32:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_33:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_34:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_35:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_36:.*]] = AIE.lock(%[[VAL_35]], 1) -// CHECK: %[[VAL_37:.*]] = AIE.lock(%[[VAL_35]], 3) -// CHECK: %[[VAL_38:.*]] = AIE.buffer(%[[VAL_35]]) {sym_name = "buf5"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_39:.*]] = AIE.lock(%[[VAL_35]], 2) -// CHECK: %[[VAL_40:.*]] = AIE.buffer(%[[VAL_35]]) {sym_name = "buf4"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_41:.*]] = AIE.lock(%[[VAL_35]], 0) -// CHECK: %[[VAL_42:.*]] = AIE.buffer(%[[VAL_35]]) {sym_name = "buf3"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_43:.*]] = AIE.mem(%[[VAL_35]]) { -// CHECK: %[[VAL_44:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_31:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_32:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_33:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_34:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_35:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_36:.*]] = aie.lock(%[[VAL_35]], 1) +// CHECK: %[[VAL_37:.*]] = aie.lock(%[[VAL_35]], 3) +// CHECK: %[[VAL_38:.*]] = aie.buffer(%[[VAL_35]]) {sym_name = "buf5"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_39:.*]] = aie.lock(%[[VAL_35]], 2) +// CHECK: %[[VAL_40:.*]] = aie.buffer(%[[VAL_35]]) {sym_name = "buf4"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_41:.*]] = aie.lock(%[[VAL_35]], 0) +// CHECK: %[[VAL_42:.*]] = aie.buffer(%[[VAL_35]]) {sym_name = "buf3"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_43:.*]] = aie.mem(%[[VAL_35]]) { +// CHECK: %[[VAL_44:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_41]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_42]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_41]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_41]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_42]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_41]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_36]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_38]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_36]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_36]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_38]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_36]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: -// CHECK: %[[VAL_45:.*]] = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) +// CHECK: %[[VAL_45:.*]] = aie.dma_start(S2MM, 1, ^bb4, ^bb7) // CHECK: ^bb4: -// CHECK: AIE.use_lock(%[[VAL_39]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_40]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_39]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_39]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_40]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_39]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb5: -// CHECK: %[[VAL_46:.*]] = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) +// CHECK: %[[VAL_46:.*]] = aie.dma_start(MM2S, 0, ^bb6, ^bb3) // CHECK: ^bb6: -// CHECK: AIE.use_lock(%[[VAL_37]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_38]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_37]], Release, 0) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[VAL_37]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_38]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_37]], Release, 0) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb7: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_47:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_48:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_49:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_50:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_51:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_52:.*]] = AIE.lock(%[[VAL_51]], 1) -// CHECK: %[[VAL_53:.*]] = AIE.lock(%[[VAL_51]], 3) -// CHECK: %[[VAL_54:.*]] = AIE.buffer(%[[VAL_51]]) {sym_name = "buf2"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_55:.*]] = AIE.lock(%[[VAL_51]], 2) -// CHECK: %[[VAL_56:.*]] = AIE.buffer(%[[VAL_51]]) {sym_name = "buf1"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_57:.*]] = AIE.lock(%[[VAL_51]], 0) -// CHECK: %[[VAL_58:.*]] = AIE.buffer(%[[VAL_51]]) {sym_name = "buf0"} : memref<16x16xf32, 2> -// CHECK: %[[VAL_59:.*]] = AIE.mem(%[[VAL_51]]) { -// CHECK: %[[VAL_60:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_47:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_48:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_49:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_50:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_51:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_52:.*]] = aie.lock(%[[VAL_51]], 1) +// CHECK: %[[VAL_53:.*]] = aie.lock(%[[VAL_51]], 3) +// CHECK: %[[VAL_54:.*]] = aie.buffer(%[[VAL_51]]) {sym_name = "buf2"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_55:.*]] = aie.lock(%[[VAL_51]], 2) +// CHECK: %[[VAL_56:.*]] = aie.buffer(%[[VAL_51]]) {sym_name = "buf1"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_57:.*]] = aie.lock(%[[VAL_51]], 0) +// CHECK: %[[VAL_58:.*]] = aie.buffer(%[[VAL_51]]) {sym_name = "buf0"} : memref<16x16xf32, 2> +// CHECK: %[[VAL_59:.*]] = aie.mem(%[[VAL_51]]) { +// CHECK: %[[VAL_60:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_57]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_58]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_57]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_57]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_58]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_57]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_52]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_54]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_52]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_52]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_54]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_52]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: -// CHECK: %[[VAL_61:.*]] = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) +// CHECK: %[[VAL_61:.*]] = aie.dma_start(S2MM, 1, ^bb4, ^bb7) // CHECK: ^bb4: -// CHECK: AIE.use_lock(%[[VAL_55]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_56]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_55]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_55]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_56]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_55]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb5: -// CHECK: %[[VAL_62:.*]] = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) +// CHECK: %[[VAL_62:.*]] = aie.dma_start(MM2S, 0, ^bb6, ^bb3) // CHECK: ^bb6: -// CHECK: AIE.use_lock(%[[VAL_53]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_54]] : memref<16x16xf32, 2>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_53]], Release, 0) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[VAL_53]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_54]] : memref<16x16xf32, 2>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_53]], Release, 0) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb7: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_63:.*]] = AIE.switchbox(%[[VAL_49]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_63:.*]] = aie.switchbox(%[[VAL_49]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_64:.*]] = AIE.switchbox(%[[VAL_48]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_64:.*]] = aie.switchbox(%[[VAL_48]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_65:.*]] = AIE.switchbox(%[[VAL_32]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_65:.*]] = aie.switchbox(%[[VAL_32]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_66:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_67:.*]] = AIE.switchbox(%[[VAL_66]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_66:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_67:.*]] = aie.switchbox(%[[VAL_66]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_68:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_69:.*]] = AIE.switchbox(%[[VAL_68]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_68:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_69:.*]] = aie.switchbox(%[[VAL_68]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_70:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_71:.*]] = AIE.switchbox(%[[VAL_70]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_70:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_71:.*]] = aie.switchbox(%[[VAL_70]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_72:.*]] = AIE.switchbox(%[[VAL_15]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_72:.*]] = aie.switchbox(%[[VAL_15]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_73:.*]] = AIE.switchbox(%[[VAL_51]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_73:.*]] = aie.switchbox(%[[VAL_51]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_74:.*]] = AIE.switchbox(%[[VAL_31]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_74:.*]] = aie.switchbox(%[[VAL_31]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_75:.*]] = AIE.switchbox(%[[VAL_33]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_75:.*]] = aie.switchbox(%[[VAL_33]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_76:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_77:.*]] = AIE.switchbox(%[[VAL_76]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_76:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_77:.*]] = aie.switchbox(%[[VAL_76]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_78:.*]] = AIE.switchbox(%[[VAL_35]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_78:.*]] = aie.switchbox(%[[VAL_35]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_79:.*]] = AIE.switchbox(%[[VAL_47]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_79:.*]] = aie.switchbox(%[[VAL_47]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_80:.*]] = AIE.switchbox(%[[VAL_17]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_80:.*]] = aie.switchbox(%[[VAL_17]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_81:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_81:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_82:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_82:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_83:.*]] = AIE.switchbox(%[[VAL_19]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_83:.*]] = aie.switchbox(%[[VAL_19]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_84:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_85:.*]] = AIE.switchbox(%[[VAL_84]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_84:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_85:.*]] = aie.switchbox(%[[VAL_84]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_86:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_87:.*]] = AIE.switchbox(%[[VAL_86]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_86:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_87:.*]] = aie.switchbox(%[[VAL_86]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_88:.*]] = AIE.tile(5, 3) -// CHECK: %[[VAL_89:.*]] = AIE.switchbox(%[[VAL_88]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_88:.*]] = aie.tile(5, 3) +// CHECK: %[[VAL_89:.*]] = aie.switchbox(%[[VAL_88]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_90:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_91:.*]] = AIE.switchbox(%[[VAL_90]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_90:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_91:.*]] = aie.switchbox(%[[VAL_90]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_92:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_92:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_93:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_93:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_94:.*]] = AIE.shim_mux(%[[VAL_49]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_94:.*]] = aie.shim_mux(%[[VAL_49]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_95:.*]] = AIE.shim_mux(%[[VAL_33]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_95:.*]] = aie.shim_mux(%[[VAL_33]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_96:.*]] = AIE.shim_mux(%[[VAL_17]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_96:.*]] = aie.shim_mux(%[[VAL_17]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_97:.*]] = AIE.shim_mux(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_97:.*]] = aie.shim_mux(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%[[VAL_98:.*]] : North, %[[VAL_99:.*]] : South) -// CHECK: AIE.wire(%[[VAL_49]] : DMA, %[[VAL_98]] : DMA) -// CHECK: AIE.wire(%[[VAL_48]] : Core, %[[VAL_100:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_48]] : DMA, %[[VAL_100]] : DMA) -// CHECK: AIE.wire(%[[VAL_99]] : North, %[[VAL_100]] : South) -// CHECK: AIE.wire(%[[VAL_47]] : Core, %[[VAL_101:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_47]] : DMA, %[[VAL_101]] : DMA) -// CHECK: AIE.wire(%[[VAL_100]] : North, %[[VAL_101]] : South) -// CHECK: AIE.wire(%[[VAL_99]] : East, %[[VAL_102:.*]] : West) -// CHECK: AIE.wire(%[[VAL_103:.*]] : North, %[[VAL_102]] : South) -// CHECK: AIE.wire(%[[VAL_33]] : DMA, %[[VAL_103]] : DMA) -// CHECK: AIE.wire(%[[VAL_100]] : East, %[[VAL_104:.*]] : West) -// CHECK: AIE.wire(%[[VAL_32]] : Core, %[[VAL_104]] : Core) -// CHECK: AIE.wire(%[[VAL_32]] : DMA, %[[VAL_104]] : DMA) -// CHECK: AIE.wire(%[[VAL_102]] : North, %[[VAL_104]] : South) -// CHECK: AIE.wire(%[[VAL_101]] : East, %[[VAL_105:.*]] : West) -// CHECK: AIE.wire(%[[VAL_31]] : Core, %[[VAL_105]] : Core) -// CHECK: AIE.wire(%[[VAL_31]] : DMA, %[[VAL_105]] : DMA) -// CHECK: AIE.wire(%[[VAL_104]] : North, %[[VAL_105]] : South) -// CHECK: AIE.wire(%[[VAL_84]] : Core, %[[VAL_106:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_84]] : DMA, %[[VAL_106]] : DMA) -// CHECK: AIE.wire(%[[VAL_105]] : North, %[[VAL_106]] : South) -// CHECK: AIE.wire(%[[VAL_104]] : East, %[[VAL_107:.*]] : West) -// CHECK: AIE.wire(%[[VAL_66]] : Core, %[[VAL_107]] : Core) -// CHECK: AIE.wire(%[[VAL_66]] : DMA, %[[VAL_107]] : DMA) -// CHECK: AIE.wire(%[[VAL_105]] : East, %[[VAL_108:.*]] : West) -// CHECK: AIE.wire(%[[VAL_68]] : Core, %[[VAL_108]] : Core) -// CHECK: AIE.wire(%[[VAL_68]] : DMA, %[[VAL_108]] : DMA) -// CHECK: AIE.wire(%[[VAL_107]] : North, %[[VAL_108]] : South) -// CHECK: AIE.wire(%[[VAL_106]] : East, %[[VAL_109:.*]] : West) -// CHECK: AIE.wire(%[[VAL_86]] : Core, %[[VAL_109]] : Core) -// CHECK: AIE.wire(%[[VAL_86]] : DMA, %[[VAL_109]] : DMA) -// CHECK: AIE.wire(%[[VAL_108]] : North, %[[VAL_109]] : South) -// CHECK: AIE.wire(%[[VAL_107]] : East, %[[VAL_110:.*]] : West) -// CHECK: AIE.wire(%[[VAL_76]] : Core, %[[VAL_110]] : Core) -// CHECK: AIE.wire(%[[VAL_76]] : DMA, %[[VAL_110]] : DMA) -// CHECK: AIE.wire(%[[VAL_108]] : East, %[[VAL_111:.*]] : West) -// CHECK: AIE.wire(%[[VAL_70]] : Core, %[[VAL_111]] : Core) -// CHECK: AIE.wire(%[[VAL_70]] : DMA, %[[VAL_111]] : DMA) -// CHECK: AIE.wire(%[[VAL_110]] : North, %[[VAL_111]] : South) -// CHECK: AIE.wire(%[[VAL_109]] : East, %[[VAL_112:.*]] : West) -// CHECK: AIE.wire(%[[VAL_88]] : Core, %[[VAL_112]] : Core) -// CHECK: AIE.wire(%[[VAL_88]] : DMA, %[[VAL_112]] : DMA) -// CHECK: AIE.wire(%[[VAL_111]] : North, %[[VAL_112]] : South) -// CHECK: AIE.wire(%[[VAL_113:.*]] : North, %[[VAL_114:.*]] : South) -// CHECK: AIE.wire(%[[VAL_17]] : DMA, %[[VAL_113]] : DMA) -// CHECK: AIE.wire(%[[VAL_110]] : East, %[[VAL_115:.*]] : West) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_115]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_115]] : DMA) -// CHECK: AIE.wire(%[[VAL_114]] : North, %[[VAL_115]] : South) -// CHECK: AIE.wire(%[[VAL_111]] : East, %[[VAL_116:.*]] : West) -// CHECK: AIE.wire(%[[VAL_15]] : Core, %[[VAL_116]] : Core) -// CHECK: AIE.wire(%[[VAL_15]] : DMA, %[[VAL_116]] : DMA) -// CHECK: AIE.wire(%[[VAL_115]] : North, %[[VAL_116]] : South) -// CHECK: AIE.wire(%[[VAL_112]] : East, %[[VAL_117:.*]] : West) -// CHECK: AIE.wire(%[[VAL_90]] : Core, %[[VAL_117]] : Core) -// CHECK: AIE.wire(%[[VAL_90]] : DMA, %[[VAL_117]] : DMA) -// CHECK: AIE.wire(%[[VAL_116]] : North, %[[VAL_117]] : South) -// CHECK: AIE.wire(%[[VAL_114]] : East, %[[VAL_118:.*]] : West) -// CHECK: AIE.wire(%[[VAL_119:.*]] : North, %[[VAL_118]] : South) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_119]] : DMA) -// CHECK: AIE.wire(%[[VAL_115]] : East, %[[VAL_120:.*]] : West) -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_120]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_120]] : DMA) -// CHECK: AIE.wire(%[[VAL_118]] : North, %[[VAL_120]] : South) -// CHECK: AIE.wire(%[[VAL_116]] : East, %[[VAL_121:.*]] : West) -// CHECK: AIE.wire(%[[VAL_51]] : Core, %[[VAL_121]] : Core) -// CHECK: AIE.wire(%[[VAL_51]] : DMA, %[[VAL_121]] : DMA) -// CHECK: AIE.wire(%[[VAL_120]] : North, %[[VAL_121]] : South) -// CHECK: AIE.wire(%[[VAL_117]] : East, %[[VAL_122:.*]] : West) -// CHECK: AIE.wire(%[[VAL_19]] : Core, %[[VAL_122]] : Core) -// CHECK: AIE.wire(%[[VAL_19]] : DMA, %[[VAL_122]] : DMA) -// CHECK: AIE.wire(%[[VAL_121]] : North, %[[VAL_122]] : South) -// CHECK: AIE.wire(%[[VAL_121]] : East, %[[VAL_123:.*]] : West) -// CHECK: AIE.wire(%[[VAL_35]] : Core, %[[VAL_123]] : Core) -// CHECK: AIE.wire(%[[VAL_35]] : DMA, %[[VAL_123]] : DMA) -// CHECK: AIE.wire(%[[VAL_122]] : East, %[[VAL_124:.*]] : West) -// CHECK: AIE.wire(%[[VAL_3]] : Core, %[[VAL_124]] : Core) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_124]] : DMA) -// CHECK: AIE.wire(%[[VAL_123]] : North, %[[VAL_124]] : South) +// CHECK: aie.wire(%[[VAL_98:.*]] : North, %[[VAL_99:.*]] : South) +// CHECK: aie.wire(%[[VAL_49]] : DMA, %[[VAL_98]] : DMA) +// CHECK: aie.wire(%[[VAL_48]] : Core, %[[VAL_100:.*]] : Core) +// CHECK: aie.wire(%[[VAL_48]] : DMA, %[[VAL_100]] : DMA) +// CHECK: aie.wire(%[[VAL_99]] : North, %[[VAL_100]] : South) +// CHECK: aie.wire(%[[VAL_47]] : Core, %[[VAL_101:.*]] : Core) +// CHECK: aie.wire(%[[VAL_47]] : DMA, %[[VAL_101]] : DMA) +// CHECK: aie.wire(%[[VAL_100]] : North, %[[VAL_101]] : South) +// CHECK: aie.wire(%[[VAL_99]] : East, %[[VAL_102:.*]] : West) +// CHECK: aie.wire(%[[VAL_103:.*]] : North, %[[VAL_102]] : South) +// CHECK: aie.wire(%[[VAL_33]] : DMA, %[[VAL_103]] : DMA) +// CHECK: aie.wire(%[[VAL_100]] : East, %[[VAL_104:.*]] : West) +// CHECK: aie.wire(%[[VAL_32]] : Core, %[[VAL_104]] : Core) +// CHECK: aie.wire(%[[VAL_32]] : DMA, %[[VAL_104]] : DMA) +// CHECK: aie.wire(%[[VAL_102]] : North, %[[VAL_104]] : South) +// CHECK: aie.wire(%[[VAL_101]] : East, %[[VAL_105:.*]] : West) +// CHECK: aie.wire(%[[VAL_31]] : Core, %[[VAL_105]] : Core) +// CHECK: aie.wire(%[[VAL_31]] : DMA, %[[VAL_105]] : DMA) +// CHECK: aie.wire(%[[VAL_104]] : North, %[[VAL_105]] : South) +// CHECK: aie.wire(%[[VAL_84]] : Core, %[[VAL_106:.*]] : Core) +// CHECK: aie.wire(%[[VAL_84]] : DMA, %[[VAL_106]] : DMA) +// CHECK: aie.wire(%[[VAL_105]] : North, %[[VAL_106]] : South) +// CHECK: aie.wire(%[[VAL_104]] : East, %[[VAL_107:.*]] : West) +// CHECK: aie.wire(%[[VAL_66]] : Core, %[[VAL_107]] : Core) +// CHECK: aie.wire(%[[VAL_66]] : DMA, %[[VAL_107]] : DMA) +// CHECK: aie.wire(%[[VAL_105]] : East, %[[VAL_108:.*]] : West) +// CHECK: aie.wire(%[[VAL_68]] : Core, %[[VAL_108]] : Core) +// CHECK: aie.wire(%[[VAL_68]] : DMA, %[[VAL_108]] : DMA) +// CHECK: aie.wire(%[[VAL_107]] : North, %[[VAL_108]] : South) +// CHECK: aie.wire(%[[VAL_106]] : East, %[[VAL_109:.*]] : West) +// CHECK: aie.wire(%[[VAL_86]] : Core, %[[VAL_109]] : Core) +// CHECK: aie.wire(%[[VAL_86]] : DMA, %[[VAL_109]] : DMA) +// CHECK: aie.wire(%[[VAL_108]] : North, %[[VAL_109]] : South) +// CHECK: aie.wire(%[[VAL_107]] : East, %[[VAL_110:.*]] : West) +// CHECK: aie.wire(%[[VAL_76]] : Core, %[[VAL_110]] : Core) +// CHECK: aie.wire(%[[VAL_76]] : DMA, %[[VAL_110]] : DMA) +// CHECK: aie.wire(%[[VAL_108]] : East, %[[VAL_111:.*]] : West) +// CHECK: aie.wire(%[[VAL_70]] : Core, %[[VAL_111]] : Core) +// CHECK: aie.wire(%[[VAL_70]] : DMA, %[[VAL_111]] : DMA) +// CHECK: aie.wire(%[[VAL_110]] : North, %[[VAL_111]] : South) +// CHECK: aie.wire(%[[VAL_109]] : East, %[[VAL_112:.*]] : West) +// CHECK: aie.wire(%[[VAL_88]] : Core, %[[VAL_112]] : Core) +// CHECK: aie.wire(%[[VAL_88]] : DMA, %[[VAL_112]] : DMA) +// CHECK: aie.wire(%[[VAL_111]] : North, %[[VAL_112]] : South) +// CHECK: aie.wire(%[[VAL_113:.*]] : North, %[[VAL_114:.*]] : South) +// CHECK: aie.wire(%[[VAL_17]] : DMA, %[[VAL_113]] : DMA) +// CHECK: aie.wire(%[[VAL_110]] : East, %[[VAL_115:.*]] : West) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_115]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_115]] : DMA) +// CHECK: aie.wire(%[[VAL_114]] : North, %[[VAL_115]] : South) +// CHECK: aie.wire(%[[VAL_111]] : East, %[[VAL_116:.*]] : West) +// CHECK: aie.wire(%[[VAL_15]] : Core, %[[VAL_116]] : Core) +// CHECK: aie.wire(%[[VAL_15]] : DMA, %[[VAL_116]] : DMA) +// CHECK: aie.wire(%[[VAL_115]] : North, %[[VAL_116]] : South) +// CHECK: aie.wire(%[[VAL_112]] : East, %[[VAL_117:.*]] : West) +// CHECK: aie.wire(%[[VAL_90]] : Core, %[[VAL_117]] : Core) +// CHECK: aie.wire(%[[VAL_90]] : DMA, %[[VAL_117]] : DMA) +// CHECK: aie.wire(%[[VAL_116]] : North, %[[VAL_117]] : South) +// CHECK: aie.wire(%[[VAL_114]] : East, %[[VAL_118:.*]] : West) +// CHECK: aie.wire(%[[VAL_119:.*]] : North, %[[VAL_118]] : South) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_119]] : DMA) +// CHECK: aie.wire(%[[VAL_115]] : East, %[[VAL_120:.*]] : West) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_120]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_120]] : DMA) +// CHECK: aie.wire(%[[VAL_118]] : North, %[[VAL_120]] : South) +// CHECK: aie.wire(%[[VAL_116]] : East, %[[VAL_121:.*]] : West) +// CHECK: aie.wire(%[[VAL_51]] : Core, %[[VAL_121]] : Core) +// CHECK: aie.wire(%[[VAL_51]] : DMA, %[[VAL_121]] : DMA) +// CHECK: aie.wire(%[[VAL_120]] : North, %[[VAL_121]] : South) +// CHECK: aie.wire(%[[VAL_117]] : East, %[[VAL_122:.*]] : West) +// CHECK: aie.wire(%[[VAL_19]] : Core, %[[VAL_122]] : Core) +// CHECK: aie.wire(%[[VAL_19]] : DMA, %[[VAL_122]] : DMA) +// CHECK: aie.wire(%[[VAL_121]] : North, %[[VAL_122]] : South) +// CHECK: aie.wire(%[[VAL_121]] : East, %[[VAL_123:.*]] : West) +// CHECK: aie.wire(%[[VAL_35]] : Core, %[[VAL_123]] : Core) +// CHECK: aie.wire(%[[VAL_35]] : DMA, %[[VAL_123]] : DMA) +// CHECK: aie.wire(%[[VAL_122]] : East, %[[VAL_124:.*]] : West) +// CHECK: aie.wire(%[[VAL_3]] : Core, %[[VAL_124]] : Core) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_124]] : DMA) +// CHECK: aie.wire(%[[VAL_123]] : North, %[[VAL_124]] : South) // CHECK: } module @aie.herd_0 { - AIE.device(xcvc1902) { - %tile_7_1 = AIE.tile(7, 1) - %tile_7_0 = AIE.tile(7, 0) - %tile_1_1 = AIE.tile(1, 1) - %tile_8_3 = AIE.tile(8, 3) - %lock_8_3 = AIE.lock(%tile_8_3, 1) - %lock_8_3_0 = AIE.lock(%tile_8_3, 3) - %buffer_8_3 = AIE.buffer(%tile_8_3) {sym_name = "buf11"} : memref<16x16xf32, 2> - %lock_8_3_1 = AIE.lock(%tile_8_3, 2) - %buffer_8_3_2 = AIE.buffer(%tile_8_3) {sym_name = "buf10"} : memref<16x16xf32, 2> - %lock_8_3_3 = AIE.lock(%tile_8_3, 0) - %buffer_8_3_4 = AIE.buffer(%tile_8_3) {sym_name = "buf9"} : memref<16x16xf32, 2> - %mem_8_3 = AIE.mem(%tile_8_3) { - %0 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + aie.device(xcvc1902) { + %tile_7_1 = aie.tile(7, 1) + %tile_7_0 = aie.tile(7, 0) + %tile_1_1 = aie.tile(1, 1) + %tile_8_3 = aie.tile(8, 3) + %lock_8_3 = aie.lock(%tile_8_3, 1) + %lock_8_3_0 = aie.lock(%tile_8_3, 3) + %buffer_8_3 = aie.buffer(%tile_8_3) {sym_name = "buf11"} : memref<16x16xf32, 2> + %lock_8_3_1 = aie.lock(%tile_8_3, 2) + %buffer_8_3_2 = aie.buffer(%tile_8_3) {sym_name = "buf10"} : memref<16x16xf32, 2> + %lock_8_3_3 = aie.lock(%tile_8_3, 0) + %buffer_8_3_4 = aie.buffer(%tile_8_3) {sym_name = "buf9"} : memref<16x16xf32, 2> + %mem_8_3 = aie.mem(%tile_8_3) { + %0 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%lock_8_3_3, Acquire, 0) - AIE.dma_bd(%buffer_8_3_4 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_3_3, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%lock_8_3_3, Acquire, 0) + aie.dma_bd(%buffer_8_3_4 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_3_3, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%lock_8_3, Acquire, 0) - AIE.dma_bd(%buffer_8_3 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_3, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%lock_8_3, Acquire, 0) + aie.dma_bd(%buffer_8_3 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_3, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %1 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %1 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%lock_8_3_1, Acquire, 0) - AIE.dma_bd(%buffer_8_3_2 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_3_1, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%lock_8_3_1, Acquire, 0) + aie.dma_bd(%buffer_8_3_2 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_3_1, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %2 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %2 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%lock_8_3_0, Acquire, 1) - AIE.dma_bd(%buffer_8_3 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_3_0, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%lock_8_3_0, Acquire, 1) + aie.dma_bd(%buffer_8_3 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_3_0, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %tile_6_2 = AIE.tile(6, 2) - %tile_6_1 = AIE.tile(6, 1) - %tile_6_0 = AIE.tile(6, 0) - %tile_0_1 = AIE.tile(0, 1) - %tile_7_3 = AIE.tile(7, 3) - %lock_7_3 = AIE.lock(%tile_7_3, 1) - %lock_7_3_5 = AIE.lock(%tile_7_3, 3) - %buffer_7_3 = AIE.buffer(%tile_7_3) {sym_name = "buf8"} : memref<16x16xf32, 2> - %lock_7_3_6 = AIE.lock(%tile_7_3, 2) - %buffer_7_3_7 = AIE.buffer(%tile_7_3) {sym_name = "buf7"} : memref<16x16xf32, 2> - %lock_7_3_8 = AIE.lock(%tile_7_3, 0) - %buffer_7_3_9 = AIE.buffer(%tile_7_3) {sym_name = "buf6"} : memref<16x16xf32, 2> - %mem_7_3 = AIE.mem(%tile_7_3) { - %0 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + %tile_6_2 = aie.tile(6, 2) + %tile_6_1 = aie.tile(6, 1) + %tile_6_0 = aie.tile(6, 0) + %tile_0_1 = aie.tile(0, 1) + %tile_7_3 = aie.tile(7, 3) + %lock_7_3 = aie.lock(%tile_7_3, 1) + %lock_7_3_5 = aie.lock(%tile_7_3, 3) + %buffer_7_3 = aie.buffer(%tile_7_3) {sym_name = "buf8"} : memref<16x16xf32, 2> + %lock_7_3_6 = aie.lock(%tile_7_3, 2) + %buffer_7_3_7 = aie.buffer(%tile_7_3) {sym_name = "buf7"} : memref<16x16xf32, 2> + %lock_7_3_8 = aie.lock(%tile_7_3, 0) + %buffer_7_3_9 = aie.buffer(%tile_7_3) {sym_name = "buf6"} : memref<16x16xf32, 2> + %mem_7_3 = aie.mem(%tile_7_3) { + %0 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%lock_7_3_8, Acquire, 0) - AIE.dma_bd(%buffer_7_3_9 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_3_8, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%lock_7_3_8, Acquire, 0) + aie.dma_bd(%buffer_7_3_9 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_3_8, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%lock_7_3, Acquire, 0) - AIE.dma_bd(%buffer_7_3 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_3, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%lock_7_3, Acquire, 0) + aie.dma_bd(%buffer_7_3 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_3, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %1 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %1 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%lock_7_3_6, Acquire, 0) - AIE.dma_bd(%buffer_7_3_7 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_3_6, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%lock_7_3_6, Acquire, 0) + aie.dma_bd(%buffer_7_3_7 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_3_6, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %2 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %2 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%lock_7_3_5, Acquire, 1) - AIE.dma_bd(%buffer_7_3 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_3_5, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%lock_7_3_5, Acquire, 1) + aie.dma_bd(%buffer_7_3 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_3_5, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %tile_3_2 = AIE.tile(3, 2) - %tile_3_1 = AIE.tile(3, 1) - %tile_3_0 = AIE.tile(3, 0) - %tile_1_0 = AIE.tile(1, 0) - %tile_8_2 = AIE.tile(8, 2) - %lock_8_2 = AIE.lock(%tile_8_2, 1) - %lock_8_2_10 = AIE.lock(%tile_8_2, 3) - %buffer_8_2 = AIE.buffer(%tile_8_2) {sym_name = "buf5"} : memref<16x16xf32, 2> - %lock_8_2_11 = AIE.lock(%tile_8_2, 2) - %buffer_8_2_12 = AIE.buffer(%tile_8_2) {sym_name = "buf4"} : memref<16x16xf32, 2> - %lock_8_2_13 = AIE.lock(%tile_8_2, 0) - %buffer_8_2_14 = AIE.buffer(%tile_8_2) {sym_name = "buf3"} : memref<16x16xf32, 2> - %mem_8_2 = AIE.mem(%tile_8_2) { - %0 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + %tile_3_2 = aie.tile(3, 2) + %tile_3_1 = aie.tile(3, 1) + %tile_3_0 = aie.tile(3, 0) + %tile_1_0 = aie.tile(1, 0) + %tile_8_2 = aie.tile(8, 2) + %lock_8_2 = aie.lock(%tile_8_2, 1) + %lock_8_2_10 = aie.lock(%tile_8_2, 3) + %buffer_8_2 = aie.buffer(%tile_8_2) {sym_name = "buf5"} : memref<16x16xf32, 2> + %lock_8_2_11 = aie.lock(%tile_8_2, 2) + %buffer_8_2_12 = aie.buffer(%tile_8_2) {sym_name = "buf4"} : memref<16x16xf32, 2> + %lock_8_2_13 = aie.lock(%tile_8_2, 0) + %buffer_8_2_14 = aie.buffer(%tile_8_2) {sym_name = "buf3"} : memref<16x16xf32, 2> + %mem_8_2 = aie.mem(%tile_8_2) { + %0 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%lock_8_2_13, Acquire, 0) - AIE.dma_bd(%buffer_8_2_14 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_2_13, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%lock_8_2_13, Acquire, 0) + aie.dma_bd(%buffer_8_2_14 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_2_13, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%lock_8_2, Acquire, 0) - AIE.dma_bd(%buffer_8_2 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_2, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%lock_8_2, Acquire, 0) + aie.dma_bd(%buffer_8_2 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_2, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %1 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %1 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%lock_8_2_11, Acquire, 0) - AIE.dma_bd(%buffer_8_2_12 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_2_11, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%lock_8_2_11, Acquire, 0) + aie.dma_bd(%buffer_8_2_12 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_2_11, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %2 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %2 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%lock_8_2_10, Acquire, 1) - AIE.dma_bd(%buffer_8_2 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_8_2_10, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%lock_8_2_10, Acquire, 1) + aie.dma_bd(%buffer_8_2 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_8_2_10, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %tile_2_2 = AIE.tile(2, 2) - %tile_2_1 = AIE.tile(2, 1) - %tile_2_0 = AIE.tile(2, 0) - %tile_0_0 = AIE.tile(0, 0) - %tile_7_2 = AIE.tile(7, 2) - %lock_7_2 = AIE.lock(%tile_7_2, 1) - %lock_7_2_15 = AIE.lock(%tile_7_2, 3) - %buffer_7_2 = AIE.buffer(%tile_7_2) {sym_name = "buf2"} : memref<16x16xf32, 2> - %lock_7_2_16 = AIE.lock(%tile_7_2, 2) - %buffer_7_2_17 = AIE.buffer(%tile_7_2) {sym_name = "buf1"} : memref<16x16xf32, 2> - %lock_7_2_18 = AIE.lock(%tile_7_2, 0) - %buffer_7_2_19 = AIE.buffer(%tile_7_2) {sym_name = "buf0"} : memref<16x16xf32, 2> - %mem_7_2 = AIE.mem(%tile_7_2) { - %0 = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) + %tile_2_2 = aie.tile(2, 2) + %tile_2_1 = aie.tile(2, 1) + %tile_2_0 = aie.tile(2, 0) + %tile_0_0 = aie.tile(0, 0) + %tile_7_2 = aie.tile(7, 2) + %lock_7_2 = aie.lock(%tile_7_2, 1) + %lock_7_2_15 = aie.lock(%tile_7_2, 3) + %buffer_7_2 = aie.buffer(%tile_7_2) {sym_name = "buf2"} : memref<16x16xf32, 2> + %lock_7_2_16 = aie.lock(%tile_7_2, 2) + %buffer_7_2_17 = aie.buffer(%tile_7_2) {sym_name = "buf1"} : memref<16x16xf32, 2> + %lock_7_2_18 = aie.lock(%tile_7_2, 0) + %buffer_7_2_19 = aie.buffer(%tile_7_2) {sym_name = "buf0"} : memref<16x16xf32, 2> + %mem_7_2 = aie.mem(%tile_7_2) { + %0 = aie.dma_start(S2MM, 0, ^bb1, ^bb5) ^bb1: // 2 preds: ^bb0, ^bb2 - AIE.use_lock(%lock_7_2_18, Acquire, 0) - AIE.dma_bd(%buffer_7_2_19 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_2_18, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%lock_7_2_18, Acquire, 0) + aie.dma_bd(%buffer_7_2_19 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_2_18, Release, 1) + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%lock_7_2, Acquire, 0) - AIE.dma_bd(%buffer_7_2 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_2, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%lock_7_2, Acquire, 0) + aie.dma_bd(%buffer_7_2 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_2, Release, 1) + aie.next_bd ^bb1 ^bb3: // pred: ^bb5 - %1 = AIE.dma_start(S2MM, 1, ^bb4, ^bb7) + %1 = aie.dma_start(S2MM, 1, ^bb4, ^bb7) ^bb4: // 2 preds: ^bb3, ^bb4 - AIE.use_lock(%lock_7_2_16, Acquire, 0) - AIE.dma_bd(%buffer_7_2_17 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_2_16, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%lock_7_2_16, Acquire, 0) + aie.dma_bd(%buffer_7_2_17 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_2_16, Release, 1) + aie.next_bd ^bb4 ^bb5: // pred: ^bb0 - %2 = AIE.dma_start(MM2S, 0, ^bb6, ^bb3) + %2 = aie.dma_start(MM2S, 0, ^bb6, ^bb3) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%lock_7_2_15, Acquire, 1) - AIE.dma_bd(%buffer_7_2 : memref<16x16xf32, 2>, 0, 256) - AIE.use_lock(%lock_7_2_15, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%lock_7_2_15, Acquire, 1) + aie.dma_bd(%buffer_7_2 : memref<16x16xf32, 2>, 0, 256) + aie.use_lock(%lock_7_2_15, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb3 - AIE.end + aie.end } - %switchbox_2_0 = AIE.switchbox(%tile_2_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %switchbox_2_0 = aie.switchbox(%tile_2_0) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%tile_2_1, South : 0, %tile_7_2, DMA : 0) - AIE.flow(%tile_2_1, South : 1, %tile_7_2, DMA : 1) - AIE.flow(%tile_7_2, DMA : 0, %tile_2_1, South : 0) - %switchbox_3_0 = AIE.switchbox(%tile_3_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%tile_2_1, South : 0, %tile_7_2, DMA : 0) + aie.flow(%tile_2_1, South : 1, %tile_7_2, DMA : 1) + aie.flow(%tile_7_2, DMA : 0, %tile_2_1, South : 0) + %switchbox_3_0 = aie.switchbox(%tile_3_0) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%tile_3_1, South : 0, %tile_8_2, DMA : 0) - AIE.flow(%tile_3_1, South : 1, %tile_8_2, DMA : 1) - AIE.flow(%tile_8_2, DMA : 0, %tile_2_1, South : 1) - %switchbox_6_0 = AIE.switchbox(%tile_6_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%tile_3_1, South : 0, %tile_8_2, DMA : 0) + aie.flow(%tile_3_1, South : 1, %tile_8_2, DMA : 1) + aie.flow(%tile_8_2, DMA : 0, %tile_2_1, South : 1) + %switchbox_6_0 = aie.switchbox(%tile_6_0) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%tile_6_1, South : 0, %tile_7_3, DMA : 0) - AIE.flow(%tile_6_1, South : 1, %tile_7_3, DMA : 1) - AIE.flow(%tile_7_3, DMA : 0, %tile_3_1, South : 0) - %switchbox_7_0 = AIE.switchbox(%tile_7_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%tile_6_1, South : 0, %tile_7_3, DMA : 0) + aie.flow(%tile_6_1, South : 1, %tile_7_3, DMA : 1) + aie.flow(%tile_7_3, DMA : 0, %tile_3_1, South : 0) + %switchbox_7_0 = aie.switchbox(%tile_7_0) { + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.flow(%tile_7_1, South : 0, %tile_8_3, DMA : 0) - AIE.flow(%tile_7_1, South : 1, %tile_8_3, DMA : 1) - AIE.flow(%tile_8_3, DMA : 0, %tile_3_1, South : 1) - %shimmux_2_0 = AIE.shim_mux(%tile_2_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.flow(%tile_7_1, South : 0, %tile_8_3, DMA : 0) + aie.flow(%tile_7_1, South : 1, %tile_8_3, DMA : 1) + aie.flow(%tile_8_3, DMA : 0, %tile_3_1, South : 1) + %shimmux_2_0 = aie.shim_mux(%tile_2_0) { + aie.connect + aie.connect + aie.connect + aie.connect } - %shimmux_3_0 = AIE.shim_mux(%tile_3_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %shimmux_3_0 = aie.shim_mux(%tile_3_0) { + aie.connect + aie.connect + aie.connect + aie.connect } - %shimmux_6_0 = AIE.shim_mux(%tile_6_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %shimmux_6_0 = aie.shim_mux(%tile_6_0) { + aie.connect + aie.connect + aie.connect + aie.connect } - %shimmux_7_0 = AIE.shim_mux(%tile_7_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %shimmux_7_0 = aie.shim_mux(%tile_7_0) { + aie.connect + aie.connect + aie.connect + aie.connect } } } diff --git a/test/create-flows/unit_more_flows_shim.mlir b/test/create-flows/unit_more_flows_shim.mlir index 78e484872a..3e25b09a70 100644 --- a/test/create-flows/unit_more_flows_shim.mlir +++ b/test/create-flows/unit_more_flows_shim.mlir @@ -15,99 +15,99 @@ // RUN: aie-opt --split-input-file --aie-create-pathfinder-flows -split-input-file %s | FileCheck %s // CHECK-LABEL: test70 -// CHECK: %[[T70:.*]] = AIE.tile(7, 0) -// CHECK: %[[T71:.*]] = AIE.tile(7, 1) -// CHECK: %[[SB70:.*]] = AIE.switchbox(%[[T70]]) { -// CHECK: AIE.connect +// CHECK: %[[T70:.*]] = aie.tile(7, 0) +// CHECK: %[[T71:.*]] = aie.tile(7, 1) +// CHECK: %[[SB70:.*]] = aie.switchbox(%[[T70]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SH70:.*]] = AIE.shim_mux(%[[T70]]) { -// CHECK: AIE.connect +// CHECK: %[[SH70:.*]] = aie.shim_mux(%[[T70]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB71:.*]] = AIE.switchbox(%[[T71]]) { -// CHECK: AIE.connect +// CHECK: %[[SB71:.*]] = aie.switchbox(%[[T71]]) { +// CHECK: aie.connect // CHECK: } // Tile 7,0 is a shim NoC tile that has a ShimMux. // The ShimMux must be configured for streams to PLIO 2,3,4,5 module @test70 { - AIE.device(xcvc1902) { - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - AIE.flow(%t71, North : 0, %t70, PLIO : 2) + aie.device(xcvc1902) { + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + aie.flow(%t71, North : 0, %t70, PLIO : 2) } } // ----- // CHECK-LABEL: test60 -// CHECK: %[[T60:.*]] = AIE.tile(6, 0) -// CHECK: %[[T61:.*]] = AIE.tile(6, 1) -// CHECK: %[[SB60:.*]] = AIE.switchbox(%[[T60]]) { -// CHECK: AIE.connect +// CHECK: %[[T60:.*]] = aie.tile(6, 0) +// CHECK: %[[T61:.*]] = aie.tile(6, 1) +// CHECK: %[[SB60:.*]] = aie.switchbox(%[[T60]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SH60:.*]] = AIE.shim_mux(%[[T60]]) { -// CHECK: AIE.connect +// CHECK: %[[SH60:.*]] = aie.shim_mux(%[[T60]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB61:.*]] = AIE.switchbox(%[[T61]]) { -// CHECK: AIE.connect +// CHECK: %[[SB61:.*]] = aie.switchbox(%[[T61]]) { +// CHECK: aie.connect // CHECK: } // Tile 6,0 is a shim NoC tile that has a ShimMux. // The ShimMux must be configured for streams from PLIO 2,3,6,7 module @test60 { - AIE.device(xcvc1902) { - %t60 = AIE.tile(6, 0) - %t61 = AIE.tile(6, 1) - AIE.flow(%t60, PLIO : 6, %t61, DMA : 1) + aie.device(xcvc1902) { + %t60 = aie.tile(6, 0) + %t61 = aie.tile(6, 1) + aie.flow(%t60, PLIO : 6, %t61, DMA : 1) } } // ----- // CHECK-LABEL: test40 -// CHECK: %[[T40:.*]] = AIE.tile(4, 0) -// CHECK: %[[T41:.*]] = AIE.tile(4, 1) -// CHECK: %[[SB40:.*]] = AIE.switchbox(%[[T40]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[T40:.*]] = aie.tile(4, 0) +// CHECK: %[[T41:.*]] = aie.tile(4, 1) +// CHECK: %[[SB40:.*]] = aie.switchbox(%[[T40]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB41:.*]] = AIE.switchbox(%[[T41]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[SB41:.*]] = aie.switchbox(%[[T41]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } // Tile 4,0 is a shim PL tile and does not contain a ShimMux. module @test40 { - AIE.device(xcvc1902) { - %t40 = AIE.tile(4, 0) - %t41 = AIE.tile(4, 1) - AIE.flow(%t41, North : 0, %t40, PLIO : 3) - AIE.flow(%t40, PLIO : 4, %t41, North : 0) + aie.device(xcvc1902) { + %t40 = aie.tile(4, 0) + %t41 = aie.tile(4, 1) + aie.flow(%t41, North : 0, %t40, PLIO : 3) + aie.flow(%t40, PLIO : 4, %t41, North : 0) } } // ----- // CHECK-LABEL: test100 -// CHECK: %[[T100:.*]] = AIE.tile(10, 0) -// CHECK: %[[T101:.*]] = AIE.tile(10, 1) -// CHECK: %[[SB100:.*]] = AIE.switchbox(%[[T100]]) { -// CHECK: AIE.connect +// CHECK: %[[T100:.*]] = aie.tile(10, 0) +// CHECK: %[[T101:.*]] = aie.tile(10, 1) +// CHECK: %[[SB100:.*]] = aie.switchbox(%[[T100]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SH100:.*]] = AIE.shim_mux(%[[T100]]) { -// CHECK: AIE.connect +// CHECK: %[[SH100:.*]] = aie.shim_mux(%[[T100]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[SB101:.*]] = AIE.switchbox(%[[T101]]) { -// CHECK: AIE.connect +// CHECK: %[[SB101:.*]] = aie.switchbox(%[[T101]]) { +// CHECK: aie.connect // CHECK: } // Tile 10,0 is a shim NoC tile that has a ShimMux. // The ShimMux must be configured for streams to NOC 0,1,2,3 module @test100 { - AIE.device(xcvc1902) { - %t100 = AIE.tile(10, 0) - %t101 = AIE.tile(10, 1) - AIE.flow(%t101, North : 0, %t100, NOC : 2) + aie.device(xcvc1902) { + %t100 = aie.tile(10, 0) + %t101 = aie.tile(10, 1) + aie.flow(%t101, North : 0, %t100, NOC : 2) } } diff --git a/test/create-flows/unit_over_flows.mlir b/test/create-flows/unit_over_flows.mlir index 9a68c23463..add44e0609 100644 --- a/test/create-flows/unit_over_flows.mlir +++ b/test/create-flows/unit_over_flows.mlir @@ -10,201 +10,201 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_3:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_5:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_6:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_7:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_8:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_9:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_10:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_11:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_12:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_13:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_14:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_15:.*]] = AIE.tile(8, 0) -// CHECK: %[[VAL_16:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_17:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_18:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.shim_mux(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_21:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_22:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_25:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_27:.*]] = AIE.switchbox(%[[VAL_26]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_28:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_29:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_30:.*]] = AIE.shim_mux(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.switchbox(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_32:.*]] = AIE.switchbox(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.shim_mux(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_34:.*]] = AIE.switchbox(%[[VAL_14]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_35:.*]] = AIE.shim_mux(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_36:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_37:.*]] = AIE.switchbox(%[[VAL_36]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_38:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_39:.*]] = AIE.switchbox(%[[VAL_38]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.switchbox(%[[VAL_17]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_42:.*]] : North, %[[VAL_43:.*]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_42]] : DMA) -// CHECK: AIE.wire(%[[VAL_43]] : East, %[[VAL_44:.*]] : West) -// CHECK: AIE.wire(%[[VAL_45:.*]] : North, %[[VAL_44]] : South) -// CHECK: AIE.wire(%[[VAL_7]] : DMA, %[[VAL_45]] : DMA) -// CHECK: AIE.wire(%[[VAL_9]] : Core, %[[VAL_46:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_9]] : DMA, %[[VAL_46]] : DMA) -// CHECK: AIE.wire(%[[VAL_44]] : North, %[[VAL_46]] : South) -// CHECK: AIE.wire(%[[VAL_44]] : East, %[[VAL_47:.*]] : West) -// CHECK: AIE.wire(%[[VAL_46]] : East, %[[VAL_48:.*]] : West) -// CHECK: AIE.wire(%[[VAL_22]] : Core, %[[VAL_48]] : Core) -// CHECK: AIE.wire(%[[VAL_22]] : DMA, %[[VAL_48]] : DMA) -// CHECK: AIE.wire(%[[VAL_47]] : North, %[[VAL_48]] : South) -// CHECK: AIE.wire(%[[VAL_48]] : East, %[[VAL_49:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_49]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_49]] : DMA) -// CHECK: AIE.wire(%[[VAL_50:.*]] : North, %[[VAL_51:.*]] : South) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_50]] : DMA) -// CHECK: AIE.wire(%[[VAL_49]] : East, %[[VAL_52:.*]] : West) -// CHECK: AIE.wire(%[[VAL_26]] : Core, %[[VAL_52]] : Core) -// CHECK: AIE.wire(%[[VAL_26]] : DMA, %[[VAL_52]] : DMA) -// CHECK: AIE.wire(%[[VAL_51]] : North, %[[VAL_52]] : South) -// CHECK: AIE.wire(%[[VAL_38]] : Core, %[[VAL_53:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_38]] : DMA, %[[VAL_53]] : DMA) -// CHECK: AIE.wire(%[[VAL_52]] : North, %[[VAL_53]] : South) -// CHECK: AIE.wire(%[[VAL_51]] : East, %[[VAL_54:.*]] : West) -// CHECK: AIE.wire(%[[VAL_55:.*]] : North, %[[VAL_54]] : South) -// CHECK: AIE.wire(%[[VAL_11]] : DMA, %[[VAL_55]] : DMA) -// CHECK: AIE.wire(%[[VAL_52]] : East, %[[VAL_56:.*]] : West) -// CHECK: AIE.wire(%[[VAL_12]] : Core, %[[VAL_56]] : Core) -// CHECK: AIE.wire(%[[VAL_12]] : DMA, %[[VAL_56]] : DMA) -// CHECK: AIE.wire(%[[VAL_54]] : North, %[[VAL_56]] : South) -// CHECK: AIE.wire(%[[VAL_53]] : East, %[[VAL_57:.*]] : West) -// CHECK: AIE.wire(%[[VAL_13]] : Core, %[[VAL_57]] : Core) -// CHECK: AIE.wire(%[[VAL_13]] : DMA, %[[VAL_57]] : DMA) -// CHECK: AIE.wire(%[[VAL_56]] : North, %[[VAL_57]] : South) -// CHECK: AIE.wire(%[[VAL_14]] : Core, %[[VAL_58:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_14]] : DMA, %[[VAL_58]] : DMA) -// CHECK: AIE.wire(%[[VAL_57]] : North, %[[VAL_58]] : South) -// CHECK: AIE.wire(%[[VAL_57]] : East, %[[VAL_59:.*]] : West) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_59]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_59]] : DMA) -// CHECK: AIE.wire(%[[VAL_58]] : East, %[[VAL_60:.*]] : West) -// CHECK: AIE.wire(%[[VAL_17]] : Core, %[[VAL_60]] : Core) -// CHECK: AIE.wire(%[[VAL_17]] : DMA, %[[VAL_60]] : DMA) -// CHECK: AIE.wire(%[[VAL_59]] : North, %[[VAL_60]] : South) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_3:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_5:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_6:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_7:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_8:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_9:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_10:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_11:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_12:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_13:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_14:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_15:.*]] = aie.tile(8, 0) +// CHECK: %[[VAL_16:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_17:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_18:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_19:.*]] = aie.shim_mux(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_20:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_21:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_22:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_24:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_25:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_26:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_27:.*]] = aie.switchbox(%[[VAL_26]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_28:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_29:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_30:.*]] = aie.shim_mux(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_31:.*]] = aie.switchbox(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_32:.*]] = aie.switchbox(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_33:.*]] = aie.shim_mux(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_34:.*]] = aie.switchbox(%[[VAL_14]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_35:.*]] = aie.shim_mux(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_36:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_37:.*]] = aie.switchbox(%[[VAL_36]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_38:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_39:.*]] = aie.switchbox(%[[VAL_38]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_40:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_41:.*]] = aie.switchbox(%[[VAL_17]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_42:.*]] : North, %[[VAL_43:.*]] : South) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_42]] : DMA) +// CHECK: aie.wire(%[[VAL_43]] : East, %[[VAL_44:.*]] : West) +// CHECK: aie.wire(%[[VAL_45:.*]] : North, %[[VAL_44]] : South) +// CHECK: aie.wire(%[[VAL_7]] : DMA, %[[VAL_45]] : DMA) +// CHECK: aie.wire(%[[VAL_9]] : Core, %[[VAL_46:.*]] : Core) +// CHECK: aie.wire(%[[VAL_9]] : DMA, %[[VAL_46]] : DMA) +// CHECK: aie.wire(%[[VAL_44]] : North, %[[VAL_46]] : South) +// CHECK: aie.wire(%[[VAL_44]] : East, %[[VAL_47:.*]] : West) +// CHECK: aie.wire(%[[VAL_46]] : East, %[[VAL_48:.*]] : West) +// CHECK: aie.wire(%[[VAL_22]] : Core, %[[VAL_48]] : Core) +// CHECK: aie.wire(%[[VAL_22]] : DMA, %[[VAL_48]] : DMA) +// CHECK: aie.wire(%[[VAL_47]] : North, %[[VAL_48]] : South) +// CHECK: aie.wire(%[[VAL_48]] : East, %[[VAL_49:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_49]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_49]] : DMA) +// CHECK: aie.wire(%[[VAL_50:.*]] : North, %[[VAL_51:.*]] : South) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_50]] : DMA) +// CHECK: aie.wire(%[[VAL_49]] : East, %[[VAL_52:.*]] : West) +// CHECK: aie.wire(%[[VAL_26]] : Core, %[[VAL_52]] : Core) +// CHECK: aie.wire(%[[VAL_26]] : DMA, %[[VAL_52]] : DMA) +// CHECK: aie.wire(%[[VAL_51]] : North, %[[VAL_52]] : South) +// CHECK: aie.wire(%[[VAL_38]] : Core, %[[VAL_53:.*]] : Core) +// CHECK: aie.wire(%[[VAL_38]] : DMA, %[[VAL_53]] : DMA) +// CHECK: aie.wire(%[[VAL_52]] : North, %[[VAL_53]] : South) +// CHECK: aie.wire(%[[VAL_51]] : East, %[[VAL_54:.*]] : West) +// CHECK: aie.wire(%[[VAL_55:.*]] : North, %[[VAL_54]] : South) +// CHECK: aie.wire(%[[VAL_11]] : DMA, %[[VAL_55]] : DMA) +// CHECK: aie.wire(%[[VAL_52]] : East, %[[VAL_56:.*]] : West) +// CHECK: aie.wire(%[[VAL_12]] : Core, %[[VAL_56]] : Core) +// CHECK: aie.wire(%[[VAL_12]] : DMA, %[[VAL_56]] : DMA) +// CHECK: aie.wire(%[[VAL_54]] : North, %[[VAL_56]] : South) +// CHECK: aie.wire(%[[VAL_53]] : East, %[[VAL_57:.*]] : West) +// CHECK: aie.wire(%[[VAL_13]] : Core, %[[VAL_57]] : Core) +// CHECK: aie.wire(%[[VAL_13]] : DMA, %[[VAL_57]] : DMA) +// CHECK: aie.wire(%[[VAL_56]] : North, %[[VAL_57]] : South) +// CHECK: aie.wire(%[[VAL_14]] : Core, %[[VAL_58:.*]] : Core) +// CHECK: aie.wire(%[[VAL_14]] : DMA, %[[VAL_58]] : DMA) +// CHECK: aie.wire(%[[VAL_57]] : North, %[[VAL_58]] : South) +// CHECK: aie.wire(%[[VAL_57]] : East, %[[VAL_59:.*]] : West) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_59]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_59]] : DMA) +// CHECK: aie.wire(%[[VAL_58]] : East, %[[VAL_60:.*]] : West) +// CHECK: aie.wire(%[[VAL_17]] : Core, %[[VAL_60]] : Core) +// CHECK: aie.wire(%[[VAL_17]] : DMA, %[[VAL_60]] : DMA) +// CHECK: aie.wire(%[[VAL_59]] : North, %[[VAL_60]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t03 = AIE.tile(0, 3) - %t02 = AIE.tile(0, 2) - %t00 = AIE.tile(0, 0) - %t13 = AIE.tile(1, 3) - %t11 = AIE.tile(1, 1) - %t10 = AIE.tile(1, 0) - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - %t22 = AIE.tile(2, 2) - %t31 = AIE.tile(3, 1) - %t60 = AIE.tile(6, 0) - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) - %t80 = AIE.tile(8, 0) - %t82 = AIE.tile(8, 2) - %t83 = AIE.tile(8, 3) + aie.device(xcvc1902) { + %t03 = aie.tile(0, 3) + %t02 = aie.tile(0, 2) + %t00 = aie.tile(0, 0) + %t13 = aie.tile(1, 3) + %t11 = aie.tile(1, 1) + %t10 = aie.tile(1, 0) + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + %t22 = aie.tile(2, 2) + %t31 = aie.tile(3, 1) + %t60 = aie.tile(6, 0) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) + %t80 = aie.tile(8, 0) + %t82 = aie.tile(8, 2) + %t83 = aie.tile(8, 3) - AIE.flow(%t71, DMA : 0, %t20, DMA : 0) - AIE.flow(%t71, DMA : 1, %t20, DMA : 1) - AIE.flow(%t72, DMA : 0, %t60, DMA : 0) - AIE.flow(%t72, DMA : 1, %t60, DMA : 1) - AIE.flow(%t73, DMA : 0, %t70, DMA : 0) - AIE.flow(%t73, DMA : 1, %t70, DMA : 1) - AIE.flow(%t83, DMA : 0, %t30, DMA : 0) - AIE.flow(%t83, DMA : 1, %t30, DMA : 1) + aie.flow(%t71, DMA : 0, %t20, DMA : 0) + aie.flow(%t71, DMA : 1, %t20, DMA : 1) + aie.flow(%t72, DMA : 0, %t60, DMA : 0) + aie.flow(%t72, DMA : 1, %t60, DMA : 1) + aie.flow(%t73, DMA : 0, %t70, DMA : 0) + aie.flow(%t73, DMA : 1, %t70, DMA : 1) + aie.flow(%t83, DMA : 0, %t30, DMA : 0) + aie.flow(%t83, DMA : 1, %t30, DMA : 1) } } diff --git a/test/create-flows/unit_routed_herd_3x1.mlir b/test/create-flows/unit_routed_herd_3x1.mlir index 9badc8ff13..e5134f00cf 100644 --- a/test/create-flows/unit_routed_herd_3x1.mlir +++ b/test/create-flows/unit_routed_herd_3x1.mlir @@ -10,814 +10,814 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_4:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_5:.*]] = AIE.tile(5, 0) -// CHECK: %[[VAL_6:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_7:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_8:.*]] = AIE.tile(8, 0) -// CHECK: %[[VAL_9:.*]] = AIE.tile(9, 0) -// CHECK: %[[VAL_10:.*]] = AIE.tile(10, 0) -// CHECK: %[[VAL_11:.*]] = AIE.tile(11, 0) -// CHECK: %[[VAL_12:.*]] = AIE.tile(18, 0) -// CHECK: %[[VAL_13:.*]] = AIE.tile(19, 0) -// CHECK: %[[VAL_14:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_15:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_16:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_17:.*]] = AIE.tile(0, 4) -// CHECK: %[[VAL_18:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_19:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_20:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_21:.*]] = AIE.tile(1, 4) -// CHECK: %[[VAL_22:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_23:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_24:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_25:.*]] = AIE.tile(2, 4) -// CHECK: %[[VAL_26:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_27:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_28:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_29:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_30:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_31:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_32:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_33:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_34:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_35:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_36:.*]] = AIE.tile(5, 3) -// CHECK: %[[VAL_37:.*]] = AIE.tile(5, 4) -// CHECK: %[[VAL_38:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_39:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_40:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_41:.*]] = AIE.tile(6, 4) -// CHECK: %[[VAL_42:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_43:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_44:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_45:.*]] = AIE.tile(7, 4) -// CHECK: %[[VAL_46:.*]] = AIE.tile(8, 1) -// CHECK: %[[VAL_47:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_48:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_49:.*]] = AIE.tile(8, 4) -// CHECK: %[[VAL_50:.*]] = AIE.tile(9, 1) -// CHECK: %[[VAL_51:.*]] = AIE.tile(9, 2) -// CHECK: %[[VAL_52:.*]] = AIE.tile(9, 3) -// CHECK: %[[VAL_53:.*]] = AIE.tile(9, 4) -// CHECK: %[[VAL_54:.*]] = AIE.tile(10, 1) -// CHECK: %[[VAL_55:.*]] = AIE.tile(10, 2) -// CHECK: %[[VAL_56:.*]] = AIE.tile(10, 3) -// CHECK: %[[VAL_57:.*]] = AIE.tile(10, 4) -// CHECK: %[[VAL_58:.*]] = AIE.tile(11, 1) -// CHECK: %[[VAL_59:.*]] = AIE.tile(11, 2) -// CHECK: %[[VAL_60:.*]] = AIE.tile(11, 3) -// CHECK: %[[VAL_61:.*]] = AIE.tile(11, 4) -// CHECK: %[[VAL_62:.*]] = AIE.tile(12, 1) -// CHECK: %[[VAL_63:.*]] = AIE.tile(12, 2) -// CHECK: %[[VAL_64:.*]] = AIE.tile(12, 3) -// CHECK: %[[VAL_65:.*]] = AIE.tile(12, 4) -// CHECK: %[[VAL_66:.*]] = AIE.switchbox(%[[VAL_14]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_67:.*]] = AIE.switchbox(%[[VAL_15]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_68:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_69:.*]] = AIE.switchbox(%[[VAL_17]]) { -// CHECK: } -// CHECK: %[[VAL_70:.*]] = AIE.switchbox(%[[VAL_18]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_71:.*]] = AIE.switchbox(%[[VAL_19]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_72:.*]] = AIE.switchbox(%[[VAL_20]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_73:.*]] = AIE.switchbox(%[[VAL_21]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_74:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_75:.*]] = AIE.switchbox(%[[VAL_23]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_76:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_77:.*]] = AIE.switchbox(%[[VAL_25]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_78:.*]] = AIE.switchbox(%[[VAL_26]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_79:.*]] = AIE.switchbox(%[[VAL_27]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_80:.*]] = AIE.switchbox(%[[VAL_28]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_81:.*]] = AIE.switchbox(%[[VAL_29]]) { -// CHECK: } -// CHECK: %[[VAL_82:.*]] = AIE.switchbox(%[[VAL_30]]) { -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_4:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_5:.*]] = aie.tile(5, 0) +// CHECK: %[[VAL_6:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_7:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_8:.*]] = aie.tile(8, 0) +// CHECK: %[[VAL_9:.*]] = aie.tile(9, 0) +// CHECK: %[[VAL_10:.*]] = aie.tile(10, 0) +// CHECK: %[[VAL_11:.*]] = aie.tile(11, 0) +// CHECK: %[[VAL_12:.*]] = aie.tile(18, 0) +// CHECK: %[[VAL_13:.*]] = aie.tile(19, 0) +// CHECK: %[[VAL_14:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_15:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_16:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_17:.*]] = aie.tile(0, 4) +// CHECK: %[[VAL_18:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_19:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_20:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_21:.*]] = aie.tile(1, 4) +// CHECK: %[[VAL_22:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_23:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_24:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_25:.*]] = aie.tile(2, 4) +// CHECK: %[[VAL_26:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_27:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_28:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_29:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_30:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_31:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_32:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_33:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_34:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_35:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_36:.*]] = aie.tile(5, 3) +// CHECK: %[[VAL_37:.*]] = aie.tile(5, 4) +// CHECK: %[[VAL_38:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_39:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_40:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_41:.*]] = aie.tile(6, 4) +// CHECK: %[[VAL_42:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_43:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_44:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_45:.*]] = aie.tile(7, 4) +// CHECK: %[[VAL_46:.*]] = aie.tile(8, 1) +// CHECK: %[[VAL_47:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_48:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_49:.*]] = aie.tile(8, 4) +// CHECK: %[[VAL_50:.*]] = aie.tile(9, 1) +// CHECK: %[[VAL_51:.*]] = aie.tile(9, 2) +// CHECK: %[[VAL_52:.*]] = aie.tile(9, 3) +// CHECK: %[[VAL_53:.*]] = aie.tile(9, 4) +// CHECK: %[[VAL_54:.*]] = aie.tile(10, 1) +// CHECK: %[[VAL_55:.*]] = aie.tile(10, 2) +// CHECK: %[[VAL_56:.*]] = aie.tile(10, 3) +// CHECK: %[[VAL_57:.*]] = aie.tile(10, 4) +// CHECK: %[[VAL_58:.*]] = aie.tile(11, 1) +// CHECK: %[[VAL_59:.*]] = aie.tile(11, 2) +// CHECK: %[[VAL_60:.*]] = aie.tile(11, 3) +// CHECK: %[[VAL_61:.*]] = aie.tile(11, 4) +// CHECK: %[[VAL_62:.*]] = aie.tile(12, 1) +// CHECK: %[[VAL_63:.*]] = aie.tile(12, 2) +// CHECK: %[[VAL_64:.*]] = aie.tile(12, 3) +// CHECK: %[[VAL_65:.*]] = aie.tile(12, 4) +// CHECK: %[[VAL_66:.*]] = aie.switchbox(%[[VAL_14]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_67:.*]] = aie.switchbox(%[[VAL_15]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_68:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_69:.*]] = aie.switchbox(%[[VAL_17]]) { +// CHECK: } +// CHECK: %[[VAL_70:.*]] = aie.switchbox(%[[VAL_18]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_71:.*]] = aie.switchbox(%[[VAL_19]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_72:.*]] = aie.switchbox(%[[VAL_20]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_73:.*]] = aie.switchbox(%[[VAL_21]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_74:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_75:.*]] = aie.switchbox(%[[VAL_23]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_76:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_77:.*]] = aie.switchbox(%[[VAL_25]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_78:.*]] = aie.switchbox(%[[VAL_26]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_79:.*]] = aie.switchbox(%[[VAL_27]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_80:.*]] = aie.switchbox(%[[VAL_28]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_81:.*]] = aie.switchbox(%[[VAL_29]]) { +// CHECK: } +// CHECK: %[[VAL_82:.*]] = aie.switchbox(%[[VAL_30]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_83:.*]] = AIE.switchbox(%[[VAL_31]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_83:.*]] = aie.switchbox(%[[VAL_31]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_84:.*]] = AIE.switchbox(%[[VAL_32]]) { +// CHECK: %[[VAL_84:.*]] = aie.switchbox(%[[VAL_32]]) { // CHECK: } -// CHECK: %[[VAL_85:.*]] = AIE.switchbox(%[[VAL_33]]) { +// CHECK: %[[VAL_85:.*]] = aie.switchbox(%[[VAL_33]]) { // CHECK: } -// CHECK: %[[VAL_86:.*]] = AIE.switchbox(%[[VAL_34]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_86:.*]] = aie.switchbox(%[[VAL_34]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_87:.*]] = AIE.switchbox(%[[VAL_35]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_87:.*]] = aie.switchbox(%[[VAL_35]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_88:.*]] = AIE.switchbox(%[[VAL_36]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_88:.*]] = aie.switchbox(%[[VAL_36]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_89:.*]] = AIE.switchbox(%[[VAL_37]]) { +// CHECK: %[[VAL_89:.*]] = aie.switchbox(%[[VAL_37]]) { // CHECK: } -// CHECK: %[[VAL_90:.*]] = AIE.switchbox(%[[VAL_38]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_90:.*]] = aie.switchbox(%[[VAL_38]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_91:.*]] = AIE.switchbox(%[[VAL_39]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_91:.*]] = aie.switchbox(%[[VAL_39]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_92:.*]] = AIE.switchbox(%[[VAL_40]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_92:.*]] = aie.switchbox(%[[VAL_40]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_93:.*]] = AIE.switchbox(%[[VAL_41]]) { +// CHECK: %[[VAL_93:.*]] = aie.switchbox(%[[VAL_41]]) { // CHECK: } -// CHECK: %[[VAL_94:.*]] = AIE.switchbox(%[[VAL_42]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_94:.*]] = aie.switchbox(%[[VAL_42]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_95:.*]] = AIE.switchbox(%[[VAL_43]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_95:.*]] = aie.switchbox(%[[VAL_43]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_96:.*]] = AIE.switchbox(%[[VAL_44]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_96:.*]] = aie.switchbox(%[[VAL_44]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_97:.*]] = AIE.switchbox(%[[VAL_45]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_97:.*]] = aie.switchbox(%[[VAL_45]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_98:.*]] = AIE.switchbox(%[[VAL_46]]) { +// CHECK: %[[VAL_98:.*]] = aie.switchbox(%[[VAL_46]]) { // CHECK: } -// CHECK: %[[VAL_99:.*]] = AIE.switchbox(%[[VAL_47]]) { +// CHECK: %[[VAL_99:.*]] = aie.switchbox(%[[VAL_47]]) { // CHECK: } -// CHECK: %[[VAL_100:.*]] = AIE.switchbox(%[[VAL_48]]) { +// CHECK: %[[VAL_100:.*]] = aie.switchbox(%[[VAL_48]]) { // CHECK: } -// CHECK: %[[VAL_101:.*]] = AIE.switchbox(%[[VAL_49]]) { +// CHECK: %[[VAL_101:.*]] = aie.switchbox(%[[VAL_49]]) { // CHECK: } -// CHECK: %[[VAL_102:.*]] = AIE.switchbox(%[[VAL_50]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_102:.*]] = aie.switchbox(%[[VAL_50]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_103:.*]] = AIE.switchbox(%[[VAL_51]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_103:.*]] = aie.switchbox(%[[VAL_51]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_104:.*]] = AIE.switchbox(%[[VAL_52]]) { +// CHECK: %[[VAL_104:.*]] = aie.switchbox(%[[VAL_52]]) { // CHECK: } -// CHECK: %[[VAL_105:.*]] = AIE.switchbox(%[[VAL_53]]) { +// CHECK: %[[VAL_105:.*]] = aie.switchbox(%[[VAL_53]]) { // CHECK: } -// CHECK: %[[VAL_106:.*]] = AIE.switchbox(%[[VAL_54]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_106:.*]] = aie.switchbox(%[[VAL_54]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_107:.*]] = AIE.switchbox(%[[VAL_55]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_107:.*]] = aie.switchbox(%[[VAL_55]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_108:.*]] = AIE.switchbox(%[[VAL_56]]) { +// CHECK: %[[VAL_108:.*]] = aie.switchbox(%[[VAL_56]]) { // CHECK: } -// CHECK: %[[VAL_109:.*]] = AIE.switchbox(%[[VAL_57]]) { +// CHECK: %[[VAL_109:.*]] = aie.switchbox(%[[VAL_57]]) { // CHECK: } -// CHECK: %[[VAL_110:.*]] = AIE.switchbox(%[[VAL_58]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_110:.*]] = aie.switchbox(%[[VAL_58]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_111:.*]] = AIE.switchbox(%[[VAL_59]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_111:.*]] = aie.switchbox(%[[VAL_59]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_112:.*]] = AIE.switchbox(%[[VAL_60]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_112:.*]] = aie.switchbox(%[[VAL_60]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_113:.*]] = AIE.switchbox(%[[VAL_61]]) { +// CHECK: %[[VAL_113:.*]] = aie.switchbox(%[[VAL_61]]) { // CHECK: } -// CHECK: %[[VAL_114:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_114:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_115:.*]] = AIE.shim_mux(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_115:.*]] = aie.shim_mux(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_116:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_116:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_117:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_118:.*]] = AIE.switchbox(%[[VAL_5]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_119:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_120:.*]] = AIE.shim_mux(%[[VAL_3]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_121:.*]] = AIE.switchbox(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_122:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_123:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_124:.*]] = AIE.shim_mux(%[[VAL_6]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_125:.*]] = AIE.shim_mux(%[[VAL_7]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_126:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_127:.*]] = AIE.shim_mux(%[[VAL_10]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_128:.*]] = AIE.switchbox(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_129:.*]] = AIE.shim_mux(%[[VAL_11]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_130:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_131:.*]] = AIE.switchbox(%[[VAL_9]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_132:.*]] = AIE.tile(12, 0) -// CHECK: %[[VAL_133:.*]] = AIE.switchbox(%[[VAL_132]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_134:.*]] = AIE.tile(13, 0) -// CHECK: %[[VAL_135:.*]] = AIE.switchbox(%[[VAL_134]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_136:.*]] = AIE.tile(14, 0) -// CHECK: %[[VAL_137:.*]] = AIE.switchbox(%[[VAL_136]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_138:.*]] = AIE.tile(15, 0) -// CHECK: %[[VAL_139:.*]] = AIE.switchbox(%[[VAL_138]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_140:.*]] = AIE.tile(16, 0) -// CHECK: %[[VAL_141:.*]] = AIE.switchbox(%[[VAL_140]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_142:.*]] = AIE.tile(17, 0) -// CHECK: %[[VAL_143:.*]] = AIE.switchbox(%[[VAL_142]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_144:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_145:.*]] = AIE.shim_mux(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_146:.*]] = AIE.switchbox(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_147:.*]] = AIE.shim_mux(%[[VAL_13]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_14]] : Core, %[[VAL_148:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_14]] : DMA, %[[VAL_148]] : DMA) -// CHECK: AIE.wire(%[[VAL_149:.*]] : North, %[[VAL_148]] : South) -// CHECK: AIE.wire(%[[VAL_15]] : Core, %[[VAL_150:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_15]] : DMA, %[[VAL_150]] : DMA) -// CHECK: AIE.wire(%[[VAL_148]] : North, %[[VAL_150]] : South) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_151:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_151]] : DMA) -// CHECK: AIE.wire(%[[VAL_150]] : North, %[[VAL_151]] : South) -// CHECK: AIE.wire(%[[VAL_17]] : Core, %[[VAL_152:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_17]] : DMA, %[[VAL_152]] : DMA) -// CHECK: AIE.wire(%[[VAL_151]] : North, %[[VAL_152]] : South) -// CHECK: AIE.wire(%[[VAL_149]] : East, %[[VAL_153:.*]] : West) -// CHECK: AIE.wire(%[[VAL_148]] : East, %[[VAL_154:.*]] : West) -// CHECK: AIE.wire(%[[VAL_18]] : Core, %[[VAL_154]] : Core) -// CHECK: AIE.wire(%[[VAL_18]] : DMA, %[[VAL_154]] : DMA) -// CHECK: AIE.wire(%[[VAL_153]] : North, %[[VAL_154]] : South) -// CHECK: AIE.wire(%[[VAL_150]] : East, %[[VAL_155:.*]] : West) -// CHECK: AIE.wire(%[[VAL_19]] : Core, %[[VAL_155]] : Core) -// CHECK: AIE.wire(%[[VAL_19]] : DMA, %[[VAL_155]] : DMA) -// CHECK: AIE.wire(%[[VAL_154]] : North, %[[VAL_155]] : South) -// CHECK: AIE.wire(%[[VAL_151]] : East, %[[VAL_156:.*]] : West) -// CHECK: AIE.wire(%[[VAL_20]] : Core, %[[VAL_156]] : Core) -// CHECK: AIE.wire(%[[VAL_20]] : DMA, %[[VAL_156]] : DMA) -// CHECK: AIE.wire(%[[VAL_155]] : North, %[[VAL_156]] : South) -// CHECK: AIE.wire(%[[VAL_152]] : East, %[[VAL_157:.*]] : West) -// CHECK: AIE.wire(%[[VAL_21]] : Core, %[[VAL_157]] : Core) -// CHECK: AIE.wire(%[[VAL_21]] : DMA, %[[VAL_157]] : DMA) -// CHECK: AIE.wire(%[[VAL_156]] : North, %[[VAL_157]] : South) -// CHECK: AIE.wire(%[[VAL_153]] : East, %[[VAL_158:.*]] : West) -// CHECK: AIE.wire(%[[VAL_159:.*]] : North, %[[VAL_158]] : South) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_159]] : DMA) -// CHECK: AIE.wire(%[[VAL_154]] : East, %[[VAL_160:.*]] : West) -// CHECK: AIE.wire(%[[VAL_22]] : Core, %[[VAL_160]] : Core) -// CHECK: AIE.wire(%[[VAL_22]] : DMA, %[[VAL_160]] : DMA) -// CHECK: AIE.wire(%[[VAL_158]] : North, %[[VAL_160]] : South) -// CHECK: AIE.wire(%[[VAL_155]] : East, %[[VAL_161:.*]] : West) -// CHECK: AIE.wire(%[[VAL_23]] : Core, %[[VAL_161]] : Core) -// CHECK: AIE.wire(%[[VAL_23]] : DMA, %[[VAL_161]] : DMA) -// CHECK: AIE.wire(%[[VAL_160]] : North, %[[VAL_161]] : South) -// CHECK: AIE.wire(%[[VAL_156]] : East, %[[VAL_162:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_162]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_162]] : DMA) -// CHECK: AIE.wire(%[[VAL_161]] : North, %[[VAL_162]] : South) -// CHECK: AIE.wire(%[[VAL_157]] : East, %[[VAL_163:.*]] : West) -// CHECK: AIE.wire(%[[VAL_25]] : Core, %[[VAL_163]] : Core) -// CHECK: AIE.wire(%[[VAL_25]] : DMA, %[[VAL_163]] : DMA) -// CHECK: AIE.wire(%[[VAL_162]] : North, %[[VAL_163]] : South) -// CHECK: AIE.wire(%[[VAL_158]] : East, %[[VAL_164:.*]] : West) -// CHECK: AIE.wire(%[[VAL_165:.*]] : North, %[[VAL_164]] : South) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_165]] : DMA) -// CHECK: AIE.wire(%[[VAL_160]] : East, %[[VAL_166:.*]] : West) -// CHECK: AIE.wire(%[[VAL_26]] : Core, %[[VAL_166]] : Core) -// CHECK: AIE.wire(%[[VAL_26]] : DMA, %[[VAL_166]] : DMA) -// CHECK: AIE.wire(%[[VAL_164]] : North, %[[VAL_166]] : South) -// CHECK: AIE.wire(%[[VAL_161]] : East, %[[VAL_167:.*]] : West) -// CHECK: AIE.wire(%[[VAL_27]] : Core, %[[VAL_167]] : Core) -// CHECK: AIE.wire(%[[VAL_27]] : DMA, %[[VAL_167]] : DMA) -// CHECK: AIE.wire(%[[VAL_166]] : North, %[[VAL_167]] : South) -// CHECK: AIE.wire(%[[VAL_162]] : East, %[[VAL_168:.*]] : West) -// CHECK: AIE.wire(%[[VAL_28]] : Core, %[[VAL_168]] : Core) -// CHECK: AIE.wire(%[[VAL_28]] : DMA, %[[VAL_168]] : DMA) -// CHECK: AIE.wire(%[[VAL_167]] : North, %[[VAL_168]] : South) -// CHECK: AIE.wire(%[[VAL_163]] : East, %[[VAL_169:.*]] : West) -// CHECK: AIE.wire(%[[VAL_29]] : Core, %[[VAL_169]] : Core) -// CHECK: AIE.wire(%[[VAL_29]] : DMA, %[[VAL_169]] : DMA) -// CHECK: AIE.wire(%[[VAL_168]] : North, %[[VAL_169]] : South) -// CHECK: AIE.wire(%[[VAL_164]] : East, %[[VAL_170:.*]] : West) -// CHECK: AIE.wire(%[[VAL_166]] : East, %[[VAL_171:.*]] : West) -// CHECK: AIE.wire(%[[VAL_30]] : Core, %[[VAL_171]] : Core) -// CHECK: AIE.wire(%[[VAL_30]] : DMA, %[[VAL_171]] : DMA) -// CHECK: AIE.wire(%[[VAL_170]] : North, %[[VAL_171]] : South) -// CHECK: AIE.wire(%[[VAL_167]] : East, %[[VAL_172:.*]] : West) -// CHECK: AIE.wire(%[[VAL_31]] : Core, %[[VAL_172]] : Core) -// CHECK: AIE.wire(%[[VAL_31]] : DMA, %[[VAL_172]] : DMA) -// CHECK: AIE.wire(%[[VAL_171]] : North, %[[VAL_172]] : South) -// CHECK: AIE.wire(%[[VAL_168]] : East, %[[VAL_173:.*]] : West) -// CHECK: AIE.wire(%[[VAL_32]] : Core, %[[VAL_173]] : Core) -// CHECK: AIE.wire(%[[VAL_32]] : DMA, %[[VAL_173]] : DMA) -// CHECK: AIE.wire(%[[VAL_172]] : North, %[[VAL_173]] : South) -// CHECK: AIE.wire(%[[VAL_169]] : East, %[[VAL_174:.*]] : West) -// CHECK: AIE.wire(%[[VAL_33]] : Core, %[[VAL_174]] : Core) -// CHECK: AIE.wire(%[[VAL_33]] : DMA, %[[VAL_174]] : DMA) -// CHECK: AIE.wire(%[[VAL_173]] : North, %[[VAL_174]] : South) -// CHECK: AIE.wire(%[[VAL_170]] : East, %[[VAL_175:.*]] : West) -// CHECK: AIE.wire(%[[VAL_171]] : East, %[[VAL_176:.*]] : West) -// CHECK: AIE.wire(%[[VAL_34]] : Core, %[[VAL_176]] : Core) -// CHECK: AIE.wire(%[[VAL_34]] : DMA, %[[VAL_176]] : DMA) -// CHECK: AIE.wire(%[[VAL_175]] : North, %[[VAL_176]] : South) -// CHECK: AIE.wire(%[[VAL_172]] : East, %[[VAL_177:.*]] : West) -// CHECK: AIE.wire(%[[VAL_35]] : Core, %[[VAL_177]] : Core) -// CHECK: AIE.wire(%[[VAL_35]] : DMA, %[[VAL_177]] : DMA) -// CHECK: AIE.wire(%[[VAL_176]] : North, %[[VAL_177]] : South) -// CHECK: AIE.wire(%[[VAL_173]] : East, %[[VAL_178:.*]] : West) -// CHECK: AIE.wire(%[[VAL_36]] : Core, %[[VAL_178]] : Core) -// CHECK: AIE.wire(%[[VAL_36]] : DMA, %[[VAL_178]] : DMA) -// CHECK: AIE.wire(%[[VAL_177]] : North, %[[VAL_178]] : South) -// CHECK: AIE.wire(%[[VAL_174]] : East, %[[VAL_179:.*]] : West) -// CHECK: AIE.wire(%[[VAL_37]] : Core, %[[VAL_179]] : Core) -// CHECK: AIE.wire(%[[VAL_37]] : DMA, %[[VAL_179]] : DMA) -// CHECK: AIE.wire(%[[VAL_178]] : North, %[[VAL_179]] : South) -// CHECK: AIE.wire(%[[VAL_175]] : East, %[[VAL_180:.*]] : West) -// CHECK: AIE.wire(%[[VAL_181:.*]] : North, %[[VAL_180]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_181]] : DMA) -// CHECK: AIE.wire(%[[VAL_176]] : East, %[[VAL_182:.*]] : West) -// CHECK: AIE.wire(%[[VAL_38]] : Core, %[[VAL_182]] : Core) -// CHECK: AIE.wire(%[[VAL_38]] : DMA, %[[VAL_182]] : DMA) -// CHECK: AIE.wire(%[[VAL_180]] : North, %[[VAL_182]] : South) -// CHECK: AIE.wire(%[[VAL_177]] : East, %[[VAL_183:.*]] : West) -// CHECK: AIE.wire(%[[VAL_39]] : Core, %[[VAL_183]] : Core) -// CHECK: AIE.wire(%[[VAL_39]] : DMA, %[[VAL_183]] : DMA) -// CHECK: AIE.wire(%[[VAL_182]] : North, %[[VAL_183]] : South) -// CHECK: AIE.wire(%[[VAL_178]] : East, %[[VAL_184:.*]] : West) -// CHECK: AIE.wire(%[[VAL_40]] : Core, %[[VAL_184]] : Core) -// CHECK: AIE.wire(%[[VAL_40]] : DMA, %[[VAL_184]] : DMA) -// CHECK: AIE.wire(%[[VAL_183]] : North, %[[VAL_184]] : South) -// CHECK: AIE.wire(%[[VAL_179]] : East, %[[VAL_185:.*]] : West) -// CHECK: AIE.wire(%[[VAL_41]] : Core, %[[VAL_185]] : Core) -// CHECK: AIE.wire(%[[VAL_41]] : DMA, %[[VAL_185]] : DMA) -// CHECK: AIE.wire(%[[VAL_184]] : North, %[[VAL_185]] : South) -// CHECK: AIE.wire(%[[VAL_180]] : East, %[[VAL_186:.*]] : West) -// CHECK: AIE.wire(%[[VAL_187:.*]] : North, %[[VAL_186]] : South) -// CHECK: AIE.wire(%[[VAL_7]] : DMA, %[[VAL_187]] : DMA) -// CHECK: AIE.wire(%[[VAL_182]] : East, %[[VAL_188:.*]] : West) -// CHECK: AIE.wire(%[[VAL_42]] : Core, %[[VAL_188]] : Core) -// CHECK: AIE.wire(%[[VAL_42]] : DMA, %[[VAL_188]] : DMA) -// CHECK: AIE.wire(%[[VAL_186]] : North, %[[VAL_188]] : South) -// CHECK: AIE.wire(%[[VAL_183]] : East, %[[VAL_189:.*]] : West) -// CHECK: AIE.wire(%[[VAL_43]] : Core, %[[VAL_189]] : Core) -// CHECK: AIE.wire(%[[VAL_43]] : DMA, %[[VAL_189]] : DMA) -// CHECK: AIE.wire(%[[VAL_188]] : North, %[[VAL_189]] : South) -// CHECK: AIE.wire(%[[VAL_184]] : East, %[[VAL_190:.*]] : West) -// CHECK: AIE.wire(%[[VAL_44]] : Core, %[[VAL_190]] : Core) -// CHECK: AIE.wire(%[[VAL_44]] : DMA, %[[VAL_190]] : DMA) -// CHECK: AIE.wire(%[[VAL_189]] : North, %[[VAL_190]] : South) -// CHECK: AIE.wire(%[[VAL_185]] : East, %[[VAL_191:.*]] : West) -// CHECK: AIE.wire(%[[VAL_45]] : Core, %[[VAL_191]] : Core) -// CHECK: AIE.wire(%[[VAL_45]] : DMA, %[[VAL_191]] : DMA) -// CHECK: AIE.wire(%[[VAL_190]] : North, %[[VAL_191]] : South) -// CHECK: AIE.wire(%[[VAL_186]] : East, %[[VAL_192:.*]] : West) -// CHECK: AIE.wire(%[[VAL_188]] : East, %[[VAL_193:.*]] : West) -// CHECK: AIE.wire(%[[VAL_46]] : Core, %[[VAL_193]] : Core) -// CHECK: AIE.wire(%[[VAL_46]] : DMA, %[[VAL_193]] : DMA) -// CHECK: AIE.wire(%[[VAL_192]] : North, %[[VAL_193]] : South) -// CHECK: AIE.wire(%[[VAL_189]] : East, %[[VAL_194:.*]] : West) -// CHECK: AIE.wire(%[[VAL_47]] : Core, %[[VAL_194]] : Core) -// CHECK: AIE.wire(%[[VAL_47]] : DMA, %[[VAL_194]] : DMA) -// CHECK: AIE.wire(%[[VAL_193]] : North, %[[VAL_194]] : South) -// CHECK: AIE.wire(%[[VAL_190]] : East, %[[VAL_195:.*]] : West) -// CHECK: AIE.wire(%[[VAL_48]] : Core, %[[VAL_195]] : Core) -// CHECK: AIE.wire(%[[VAL_48]] : DMA, %[[VAL_195]] : DMA) -// CHECK: AIE.wire(%[[VAL_194]] : North, %[[VAL_195]] : South) -// CHECK: AIE.wire(%[[VAL_191]] : East, %[[VAL_196:.*]] : West) -// CHECK: AIE.wire(%[[VAL_49]] : Core, %[[VAL_196]] : Core) -// CHECK: AIE.wire(%[[VAL_49]] : DMA, %[[VAL_196]] : DMA) -// CHECK: AIE.wire(%[[VAL_195]] : North, %[[VAL_196]] : South) -// CHECK: AIE.wire(%[[VAL_192]] : East, %[[VAL_197:.*]] : West) -// CHECK: AIE.wire(%[[VAL_193]] : East, %[[VAL_198:.*]] : West) -// CHECK: AIE.wire(%[[VAL_50]] : Core, %[[VAL_198]] : Core) -// CHECK: AIE.wire(%[[VAL_50]] : DMA, %[[VAL_198]] : DMA) -// CHECK: AIE.wire(%[[VAL_197]] : North, %[[VAL_198]] : South) -// CHECK: AIE.wire(%[[VAL_194]] : East, %[[VAL_199:.*]] : West) -// CHECK: AIE.wire(%[[VAL_51]] : Core, %[[VAL_199]] : Core) -// CHECK: AIE.wire(%[[VAL_51]] : DMA, %[[VAL_199]] : DMA) -// CHECK: AIE.wire(%[[VAL_198]] : North, %[[VAL_199]] : South) -// CHECK: AIE.wire(%[[VAL_195]] : East, %[[VAL_200:.*]] : West) -// CHECK: AIE.wire(%[[VAL_52]] : Core, %[[VAL_200]] : Core) -// CHECK: AIE.wire(%[[VAL_52]] : DMA, %[[VAL_200]] : DMA) -// CHECK: AIE.wire(%[[VAL_199]] : North, %[[VAL_200]] : South) -// CHECK: AIE.wire(%[[VAL_196]] : East, %[[VAL_201:.*]] : West) -// CHECK: AIE.wire(%[[VAL_53]] : Core, %[[VAL_201]] : Core) -// CHECK: AIE.wire(%[[VAL_53]] : DMA, %[[VAL_201]] : DMA) -// CHECK: AIE.wire(%[[VAL_200]] : North, %[[VAL_201]] : South) -// CHECK: AIE.wire(%[[VAL_197]] : East, %[[VAL_202:.*]] : West) -// CHECK: AIE.wire(%[[VAL_203:.*]] : North, %[[VAL_202]] : South) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_203]] : DMA) -// CHECK: AIE.wire(%[[VAL_198]] : East, %[[VAL_204:.*]] : West) -// CHECK: AIE.wire(%[[VAL_54]] : Core, %[[VAL_204]] : Core) -// CHECK: AIE.wire(%[[VAL_54]] : DMA, %[[VAL_204]] : DMA) -// CHECK: AIE.wire(%[[VAL_202]] : North, %[[VAL_204]] : South) -// CHECK: AIE.wire(%[[VAL_199]] : East, %[[VAL_205:.*]] : West) -// CHECK: AIE.wire(%[[VAL_55]] : Core, %[[VAL_205]] : Core) -// CHECK: AIE.wire(%[[VAL_55]] : DMA, %[[VAL_205]] : DMA) -// CHECK: AIE.wire(%[[VAL_204]] : North, %[[VAL_205]] : South) -// CHECK: AIE.wire(%[[VAL_200]] : East, %[[VAL_206:.*]] : West) -// CHECK: AIE.wire(%[[VAL_56]] : Core, %[[VAL_206]] : Core) -// CHECK: AIE.wire(%[[VAL_56]] : DMA, %[[VAL_206]] : DMA) -// CHECK: AIE.wire(%[[VAL_205]] : North, %[[VAL_206]] : South) -// CHECK: AIE.wire(%[[VAL_201]] : East, %[[VAL_207:.*]] : West) -// CHECK: AIE.wire(%[[VAL_57]] : Core, %[[VAL_207]] : Core) -// CHECK: AIE.wire(%[[VAL_57]] : DMA, %[[VAL_207]] : DMA) -// CHECK: AIE.wire(%[[VAL_206]] : North, %[[VAL_207]] : South) -// CHECK: AIE.wire(%[[VAL_202]] : East, %[[VAL_208:.*]] : West) -// CHECK: AIE.wire(%[[VAL_209:.*]] : North, %[[VAL_208]] : South) -// CHECK: AIE.wire(%[[VAL_11]] : DMA, %[[VAL_209]] : DMA) -// CHECK: AIE.wire(%[[VAL_204]] : East, %[[VAL_210:.*]] : West) -// CHECK: AIE.wire(%[[VAL_58]] : Core, %[[VAL_210]] : Core) -// CHECK: AIE.wire(%[[VAL_58]] : DMA, %[[VAL_210]] : DMA) -// CHECK: AIE.wire(%[[VAL_208]] : North, %[[VAL_210]] : South) -// CHECK: AIE.wire(%[[VAL_205]] : East, %[[VAL_211:.*]] : West) -// CHECK: AIE.wire(%[[VAL_59]] : Core, %[[VAL_211]] : Core) -// CHECK: AIE.wire(%[[VAL_59]] : DMA, %[[VAL_211]] : DMA) -// CHECK: AIE.wire(%[[VAL_210]] : North, %[[VAL_211]] : South) -// CHECK: AIE.wire(%[[VAL_206]] : East, %[[VAL_212:.*]] : West) -// CHECK: AIE.wire(%[[VAL_60]] : Core, %[[VAL_212]] : Core) -// CHECK: AIE.wire(%[[VAL_60]] : DMA, %[[VAL_212]] : DMA) -// CHECK: AIE.wire(%[[VAL_211]] : North, %[[VAL_212]] : South) -// CHECK: AIE.wire(%[[VAL_207]] : East, %[[VAL_213:.*]] : West) -// CHECK: AIE.wire(%[[VAL_61]] : Core, %[[VAL_213]] : Core) -// CHECK: AIE.wire(%[[VAL_61]] : DMA, %[[VAL_213]] : DMA) -// CHECK: AIE.wire(%[[VAL_212]] : North, %[[VAL_213]] : South) -// CHECK: AIE.wire(%[[VAL_208]] : East, %[[VAL_214:.*]] : West) -// CHECK: AIE.wire(%[[VAL_214]] : East, %[[VAL_215:.*]] : West) -// CHECK: AIE.wire(%[[VAL_215]] : East, %[[VAL_216:.*]] : West) -// CHECK: AIE.wire(%[[VAL_216]] : East, %[[VAL_217:.*]] : West) -// CHECK: AIE.wire(%[[VAL_217]] : East, %[[VAL_218:.*]] : West) -// CHECK: AIE.wire(%[[VAL_218]] : East, %[[VAL_219:.*]] : West) -// CHECK: AIE.wire(%[[VAL_219]] : East, %[[VAL_220:.*]] : West) -// CHECK: AIE.wire(%[[VAL_221:.*]] : North, %[[VAL_220]] : South) -// CHECK: AIE.wire(%[[VAL_12]] : DMA, %[[VAL_221]] : DMA) -// CHECK: AIE.wire(%[[VAL_220]] : East, %[[VAL_222:.*]] : West) -// CHECK: AIE.wire(%[[VAL_223:.*]] : North, %[[VAL_222]] : South) -// CHECK: AIE.wire(%[[VAL_13]] : DMA, %[[VAL_223]] : DMA) +// CHECK: %[[VAL_117:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_118:.*]] = aie.switchbox(%[[VAL_5]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_119:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_120:.*]] = aie.shim_mux(%[[VAL_3]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_121:.*]] = aie.switchbox(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_122:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_123:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_124:.*]] = aie.shim_mux(%[[VAL_6]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_125:.*]] = aie.shim_mux(%[[VAL_7]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_126:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_127:.*]] = aie.shim_mux(%[[VAL_10]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_128:.*]] = aie.switchbox(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_129:.*]] = aie.shim_mux(%[[VAL_11]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_130:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_131:.*]] = aie.switchbox(%[[VAL_9]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_132:.*]] = aie.tile(12, 0) +// CHECK: %[[VAL_133:.*]] = aie.switchbox(%[[VAL_132]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_134:.*]] = aie.tile(13, 0) +// CHECK: %[[VAL_135:.*]] = aie.switchbox(%[[VAL_134]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_136:.*]] = aie.tile(14, 0) +// CHECK: %[[VAL_137:.*]] = aie.switchbox(%[[VAL_136]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_138:.*]] = aie.tile(15, 0) +// CHECK: %[[VAL_139:.*]] = aie.switchbox(%[[VAL_138]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_140:.*]] = aie.tile(16, 0) +// CHECK: %[[VAL_141:.*]] = aie.switchbox(%[[VAL_140]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_142:.*]] = aie.tile(17, 0) +// CHECK: %[[VAL_143:.*]] = aie.switchbox(%[[VAL_142]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_144:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_145:.*]] = aie.shim_mux(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_146:.*]] = aie.switchbox(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_147:.*]] = aie.shim_mux(%[[VAL_13]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_14]] : Core, %[[VAL_148:.*]] : Core) +// CHECK: aie.wire(%[[VAL_14]] : DMA, %[[VAL_148]] : DMA) +// CHECK: aie.wire(%[[VAL_149:.*]] : North, %[[VAL_148]] : South) +// CHECK: aie.wire(%[[VAL_15]] : Core, %[[VAL_150:.*]] : Core) +// CHECK: aie.wire(%[[VAL_15]] : DMA, %[[VAL_150]] : DMA) +// CHECK: aie.wire(%[[VAL_148]] : North, %[[VAL_150]] : South) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_151:.*]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_151]] : DMA) +// CHECK: aie.wire(%[[VAL_150]] : North, %[[VAL_151]] : South) +// CHECK: aie.wire(%[[VAL_17]] : Core, %[[VAL_152:.*]] : Core) +// CHECK: aie.wire(%[[VAL_17]] : DMA, %[[VAL_152]] : DMA) +// CHECK: aie.wire(%[[VAL_151]] : North, %[[VAL_152]] : South) +// CHECK: aie.wire(%[[VAL_149]] : East, %[[VAL_153:.*]] : West) +// CHECK: aie.wire(%[[VAL_148]] : East, %[[VAL_154:.*]] : West) +// CHECK: aie.wire(%[[VAL_18]] : Core, %[[VAL_154]] : Core) +// CHECK: aie.wire(%[[VAL_18]] : DMA, %[[VAL_154]] : DMA) +// CHECK: aie.wire(%[[VAL_153]] : North, %[[VAL_154]] : South) +// CHECK: aie.wire(%[[VAL_150]] : East, %[[VAL_155:.*]] : West) +// CHECK: aie.wire(%[[VAL_19]] : Core, %[[VAL_155]] : Core) +// CHECK: aie.wire(%[[VAL_19]] : DMA, %[[VAL_155]] : DMA) +// CHECK: aie.wire(%[[VAL_154]] : North, %[[VAL_155]] : South) +// CHECK: aie.wire(%[[VAL_151]] : East, %[[VAL_156:.*]] : West) +// CHECK: aie.wire(%[[VAL_20]] : Core, %[[VAL_156]] : Core) +// CHECK: aie.wire(%[[VAL_20]] : DMA, %[[VAL_156]] : DMA) +// CHECK: aie.wire(%[[VAL_155]] : North, %[[VAL_156]] : South) +// CHECK: aie.wire(%[[VAL_152]] : East, %[[VAL_157:.*]] : West) +// CHECK: aie.wire(%[[VAL_21]] : Core, %[[VAL_157]] : Core) +// CHECK: aie.wire(%[[VAL_21]] : DMA, %[[VAL_157]] : DMA) +// CHECK: aie.wire(%[[VAL_156]] : North, %[[VAL_157]] : South) +// CHECK: aie.wire(%[[VAL_153]] : East, %[[VAL_158:.*]] : West) +// CHECK: aie.wire(%[[VAL_159:.*]] : North, %[[VAL_158]] : South) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_159]] : DMA) +// CHECK: aie.wire(%[[VAL_154]] : East, %[[VAL_160:.*]] : West) +// CHECK: aie.wire(%[[VAL_22]] : Core, %[[VAL_160]] : Core) +// CHECK: aie.wire(%[[VAL_22]] : DMA, %[[VAL_160]] : DMA) +// CHECK: aie.wire(%[[VAL_158]] : North, %[[VAL_160]] : South) +// CHECK: aie.wire(%[[VAL_155]] : East, %[[VAL_161:.*]] : West) +// CHECK: aie.wire(%[[VAL_23]] : Core, %[[VAL_161]] : Core) +// CHECK: aie.wire(%[[VAL_23]] : DMA, %[[VAL_161]] : DMA) +// CHECK: aie.wire(%[[VAL_160]] : North, %[[VAL_161]] : South) +// CHECK: aie.wire(%[[VAL_156]] : East, %[[VAL_162:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_162]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_162]] : DMA) +// CHECK: aie.wire(%[[VAL_161]] : North, %[[VAL_162]] : South) +// CHECK: aie.wire(%[[VAL_157]] : East, %[[VAL_163:.*]] : West) +// CHECK: aie.wire(%[[VAL_25]] : Core, %[[VAL_163]] : Core) +// CHECK: aie.wire(%[[VAL_25]] : DMA, %[[VAL_163]] : DMA) +// CHECK: aie.wire(%[[VAL_162]] : North, %[[VAL_163]] : South) +// CHECK: aie.wire(%[[VAL_158]] : East, %[[VAL_164:.*]] : West) +// CHECK: aie.wire(%[[VAL_165:.*]] : North, %[[VAL_164]] : South) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_165]] : DMA) +// CHECK: aie.wire(%[[VAL_160]] : East, %[[VAL_166:.*]] : West) +// CHECK: aie.wire(%[[VAL_26]] : Core, %[[VAL_166]] : Core) +// CHECK: aie.wire(%[[VAL_26]] : DMA, %[[VAL_166]] : DMA) +// CHECK: aie.wire(%[[VAL_164]] : North, %[[VAL_166]] : South) +// CHECK: aie.wire(%[[VAL_161]] : East, %[[VAL_167:.*]] : West) +// CHECK: aie.wire(%[[VAL_27]] : Core, %[[VAL_167]] : Core) +// CHECK: aie.wire(%[[VAL_27]] : DMA, %[[VAL_167]] : DMA) +// CHECK: aie.wire(%[[VAL_166]] : North, %[[VAL_167]] : South) +// CHECK: aie.wire(%[[VAL_162]] : East, %[[VAL_168:.*]] : West) +// CHECK: aie.wire(%[[VAL_28]] : Core, %[[VAL_168]] : Core) +// CHECK: aie.wire(%[[VAL_28]] : DMA, %[[VAL_168]] : DMA) +// CHECK: aie.wire(%[[VAL_167]] : North, %[[VAL_168]] : South) +// CHECK: aie.wire(%[[VAL_163]] : East, %[[VAL_169:.*]] : West) +// CHECK: aie.wire(%[[VAL_29]] : Core, %[[VAL_169]] : Core) +// CHECK: aie.wire(%[[VAL_29]] : DMA, %[[VAL_169]] : DMA) +// CHECK: aie.wire(%[[VAL_168]] : North, %[[VAL_169]] : South) +// CHECK: aie.wire(%[[VAL_164]] : East, %[[VAL_170:.*]] : West) +// CHECK: aie.wire(%[[VAL_166]] : East, %[[VAL_171:.*]] : West) +// CHECK: aie.wire(%[[VAL_30]] : Core, %[[VAL_171]] : Core) +// CHECK: aie.wire(%[[VAL_30]] : DMA, %[[VAL_171]] : DMA) +// CHECK: aie.wire(%[[VAL_170]] : North, %[[VAL_171]] : South) +// CHECK: aie.wire(%[[VAL_167]] : East, %[[VAL_172:.*]] : West) +// CHECK: aie.wire(%[[VAL_31]] : Core, %[[VAL_172]] : Core) +// CHECK: aie.wire(%[[VAL_31]] : DMA, %[[VAL_172]] : DMA) +// CHECK: aie.wire(%[[VAL_171]] : North, %[[VAL_172]] : South) +// CHECK: aie.wire(%[[VAL_168]] : East, %[[VAL_173:.*]] : West) +// CHECK: aie.wire(%[[VAL_32]] : Core, %[[VAL_173]] : Core) +// CHECK: aie.wire(%[[VAL_32]] : DMA, %[[VAL_173]] : DMA) +// CHECK: aie.wire(%[[VAL_172]] : North, %[[VAL_173]] : South) +// CHECK: aie.wire(%[[VAL_169]] : East, %[[VAL_174:.*]] : West) +// CHECK: aie.wire(%[[VAL_33]] : Core, %[[VAL_174]] : Core) +// CHECK: aie.wire(%[[VAL_33]] : DMA, %[[VAL_174]] : DMA) +// CHECK: aie.wire(%[[VAL_173]] : North, %[[VAL_174]] : South) +// CHECK: aie.wire(%[[VAL_170]] : East, %[[VAL_175:.*]] : West) +// CHECK: aie.wire(%[[VAL_171]] : East, %[[VAL_176:.*]] : West) +// CHECK: aie.wire(%[[VAL_34]] : Core, %[[VAL_176]] : Core) +// CHECK: aie.wire(%[[VAL_34]] : DMA, %[[VAL_176]] : DMA) +// CHECK: aie.wire(%[[VAL_175]] : North, %[[VAL_176]] : South) +// CHECK: aie.wire(%[[VAL_172]] : East, %[[VAL_177:.*]] : West) +// CHECK: aie.wire(%[[VAL_35]] : Core, %[[VAL_177]] : Core) +// CHECK: aie.wire(%[[VAL_35]] : DMA, %[[VAL_177]] : DMA) +// CHECK: aie.wire(%[[VAL_176]] : North, %[[VAL_177]] : South) +// CHECK: aie.wire(%[[VAL_173]] : East, %[[VAL_178:.*]] : West) +// CHECK: aie.wire(%[[VAL_36]] : Core, %[[VAL_178]] : Core) +// CHECK: aie.wire(%[[VAL_36]] : DMA, %[[VAL_178]] : DMA) +// CHECK: aie.wire(%[[VAL_177]] : North, %[[VAL_178]] : South) +// CHECK: aie.wire(%[[VAL_174]] : East, %[[VAL_179:.*]] : West) +// CHECK: aie.wire(%[[VAL_37]] : Core, %[[VAL_179]] : Core) +// CHECK: aie.wire(%[[VAL_37]] : DMA, %[[VAL_179]] : DMA) +// CHECK: aie.wire(%[[VAL_178]] : North, %[[VAL_179]] : South) +// CHECK: aie.wire(%[[VAL_175]] : East, %[[VAL_180:.*]] : West) +// CHECK: aie.wire(%[[VAL_181:.*]] : North, %[[VAL_180]] : South) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_181]] : DMA) +// CHECK: aie.wire(%[[VAL_176]] : East, %[[VAL_182:.*]] : West) +// CHECK: aie.wire(%[[VAL_38]] : Core, %[[VAL_182]] : Core) +// CHECK: aie.wire(%[[VAL_38]] : DMA, %[[VAL_182]] : DMA) +// CHECK: aie.wire(%[[VAL_180]] : North, %[[VAL_182]] : South) +// CHECK: aie.wire(%[[VAL_177]] : East, %[[VAL_183:.*]] : West) +// CHECK: aie.wire(%[[VAL_39]] : Core, %[[VAL_183]] : Core) +// CHECK: aie.wire(%[[VAL_39]] : DMA, %[[VAL_183]] : DMA) +// CHECK: aie.wire(%[[VAL_182]] : North, %[[VAL_183]] : South) +// CHECK: aie.wire(%[[VAL_178]] : East, %[[VAL_184:.*]] : West) +// CHECK: aie.wire(%[[VAL_40]] : Core, %[[VAL_184]] : Core) +// CHECK: aie.wire(%[[VAL_40]] : DMA, %[[VAL_184]] : DMA) +// CHECK: aie.wire(%[[VAL_183]] : North, %[[VAL_184]] : South) +// CHECK: aie.wire(%[[VAL_179]] : East, %[[VAL_185:.*]] : West) +// CHECK: aie.wire(%[[VAL_41]] : Core, %[[VAL_185]] : Core) +// CHECK: aie.wire(%[[VAL_41]] : DMA, %[[VAL_185]] : DMA) +// CHECK: aie.wire(%[[VAL_184]] : North, %[[VAL_185]] : South) +// CHECK: aie.wire(%[[VAL_180]] : East, %[[VAL_186:.*]] : West) +// CHECK: aie.wire(%[[VAL_187:.*]] : North, %[[VAL_186]] : South) +// CHECK: aie.wire(%[[VAL_7]] : DMA, %[[VAL_187]] : DMA) +// CHECK: aie.wire(%[[VAL_182]] : East, %[[VAL_188:.*]] : West) +// CHECK: aie.wire(%[[VAL_42]] : Core, %[[VAL_188]] : Core) +// CHECK: aie.wire(%[[VAL_42]] : DMA, %[[VAL_188]] : DMA) +// CHECK: aie.wire(%[[VAL_186]] : North, %[[VAL_188]] : South) +// CHECK: aie.wire(%[[VAL_183]] : East, %[[VAL_189:.*]] : West) +// CHECK: aie.wire(%[[VAL_43]] : Core, %[[VAL_189]] : Core) +// CHECK: aie.wire(%[[VAL_43]] : DMA, %[[VAL_189]] : DMA) +// CHECK: aie.wire(%[[VAL_188]] : North, %[[VAL_189]] : South) +// CHECK: aie.wire(%[[VAL_184]] : East, %[[VAL_190:.*]] : West) +// CHECK: aie.wire(%[[VAL_44]] : Core, %[[VAL_190]] : Core) +// CHECK: aie.wire(%[[VAL_44]] : DMA, %[[VAL_190]] : DMA) +// CHECK: aie.wire(%[[VAL_189]] : North, %[[VAL_190]] : South) +// CHECK: aie.wire(%[[VAL_185]] : East, %[[VAL_191:.*]] : West) +// CHECK: aie.wire(%[[VAL_45]] : Core, %[[VAL_191]] : Core) +// CHECK: aie.wire(%[[VAL_45]] : DMA, %[[VAL_191]] : DMA) +// CHECK: aie.wire(%[[VAL_190]] : North, %[[VAL_191]] : South) +// CHECK: aie.wire(%[[VAL_186]] : East, %[[VAL_192:.*]] : West) +// CHECK: aie.wire(%[[VAL_188]] : East, %[[VAL_193:.*]] : West) +// CHECK: aie.wire(%[[VAL_46]] : Core, %[[VAL_193]] : Core) +// CHECK: aie.wire(%[[VAL_46]] : DMA, %[[VAL_193]] : DMA) +// CHECK: aie.wire(%[[VAL_192]] : North, %[[VAL_193]] : South) +// CHECK: aie.wire(%[[VAL_189]] : East, %[[VAL_194:.*]] : West) +// CHECK: aie.wire(%[[VAL_47]] : Core, %[[VAL_194]] : Core) +// CHECK: aie.wire(%[[VAL_47]] : DMA, %[[VAL_194]] : DMA) +// CHECK: aie.wire(%[[VAL_193]] : North, %[[VAL_194]] : South) +// CHECK: aie.wire(%[[VAL_190]] : East, %[[VAL_195:.*]] : West) +// CHECK: aie.wire(%[[VAL_48]] : Core, %[[VAL_195]] : Core) +// CHECK: aie.wire(%[[VAL_48]] : DMA, %[[VAL_195]] : DMA) +// CHECK: aie.wire(%[[VAL_194]] : North, %[[VAL_195]] : South) +// CHECK: aie.wire(%[[VAL_191]] : East, %[[VAL_196:.*]] : West) +// CHECK: aie.wire(%[[VAL_49]] : Core, %[[VAL_196]] : Core) +// CHECK: aie.wire(%[[VAL_49]] : DMA, %[[VAL_196]] : DMA) +// CHECK: aie.wire(%[[VAL_195]] : North, %[[VAL_196]] : South) +// CHECK: aie.wire(%[[VAL_192]] : East, %[[VAL_197:.*]] : West) +// CHECK: aie.wire(%[[VAL_193]] : East, %[[VAL_198:.*]] : West) +// CHECK: aie.wire(%[[VAL_50]] : Core, %[[VAL_198]] : Core) +// CHECK: aie.wire(%[[VAL_50]] : DMA, %[[VAL_198]] : DMA) +// CHECK: aie.wire(%[[VAL_197]] : North, %[[VAL_198]] : South) +// CHECK: aie.wire(%[[VAL_194]] : East, %[[VAL_199:.*]] : West) +// CHECK: aie.wire(%[[VAL_51]] : Core, %[[VAL_199]] : Core) +// CHECK: aie.wire(%[[VAL_51]] : DMA, %[[VAL_199]] : DMA) +// CHECK: aie.wire(%[[VAL_198]] : North, %[[VAL_199]] : South) +// CHECK: aie.wire(%[[VAL_195]] : East, %[[VAL_200:.*]] : West) +// CHECK: aie.wire(%[[VAL_52]] : Core, %[[VAL_200]] : Core) +// CHECK: aie.wire(%[[VAL_52]] : DMA, %[[VAL_200]] : DMA) +// CHECK: aie.wire(%[[VAL_199]] : North, %[[VAL_200]] : South) +// CHECK: aie.wire(%[[VAL_196]] : East, %[[VAL_201:.*]] : West) +// CHECK: aie.wire(%[[VAL_53]] : Core, %[[VAL_201]] : Core) +// CHECK: aie.wire(%[[VAL_53]] : DMA, %[[VAL_201]] : DMA) +// CHECK: aie.wire(%[[VAL_200]] : North, %[[VAL_201]] : South) +// CHECK: aie.wire(%[[VAL_197]] : East, %[[VAL_202:.*]] : West) +// CHECK: aie.wire(%[[VAL_203:.*]] : North, %[[VAL_202]] : South) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_203]] : DMA) +// CHECK: aie.wire(%[[VAL_198]] : East, %[[VAL_204:.*]] : West) +// CHECK: aie.wire(%[[VAL_54]] : Core, %[[VAL_204]] : Core) +// CHECK: aie.wire(%[[VAL_54]] : DMA, %[[VAL_204]] : DMA) +// CHECK: aie.wire(%[[VAL_202]] : North, %[[VAL_204]] : South) +// CHECK: aie.wire(%[[VAL_199]] : East, %[[VAL_205:.*]] : West) +// CHECK: aie.wire(%[[VAL_55]] : Core, %[[VAL_205]] : Core) +// CHECK: aie.wire(%[[VAL_55]] : DMA, %[[VAL_205]] : DMA) +// CHECK: aie.wire(%[[VAL_204]] : North, %[[VAL_205]] : South) +// CHECK: aie.wire(%[[VAL_200]] : East, %[[VAL_206:.*]] : West) +// CHECK: aie.wire(%[[VAL_56]] : Core, %[[VAL_206]] : Core) +// CHECK: aie.wire(%[[VAL_56]] : DMA, %[[VAL_206]] : DMA) +// CHECK: aie.wire(%[[VAL_205]] : North, %[[VAL_206]] : South) +// CHECK: aie.wire(%[[VAL_201]] : East, %[[VAL_207:.*]] : West) +// CHECK: aie.wire(%[[VAL_57]] : Core, %[[VAL_207]] : Core) +// CHECK: aie.wire(%[[VAL_57]] : DMA, %[[VAL_207]] : DMA) +// CHECK: aie.wire(%[[VAL_206]] : North, %[[VAL_207]] : South) +// CHECK: aie.wire(%[[VAL_202]] : East, %[[VAL_208:.*]] : West) +// CHECK: aie.wire(%[[VAL_209:.*]] : North, %[[VAL_208]] : South) +// CHECK: aie.wire(%[[VAL_11]] : DMA, %[[VAL_209]] : DMA) +// CHECK: aie.wire(%[[VAL_204]] : East, %[[VAL_210:.*]] : West) +// CHECK: aie.wire(%[[VAL_58]] : Core, %[[VAL_210]] : Core) +// CHECK: aie.wire(%[[VAL_58]] : DMA, %[[VAL_210]] : DMA) +// CHECK: aie.wire(%[[VAL_208]] : North, %[[VAL_210]] : South) +// CHECK: aie.wire(%[[VAL_205]] : East, %[[VAL_211:.*]] : West) +// CHECK: aie.wire(%[[VAL_59]] : Core, %[[VAL_211]] : Core) +// CHECK: aie.wire(%[[VAL_59]] : DMA, %[[VAL_211]] : DMA) +// CHECK: aie.wire(%[[VAL_210]] : North, %[[VAL_211]] : South) +// CHECK: aie.wire(%[[VAL_206]] : East, %[[VAL_212:.*]] : West) +// CHECK: aie.wire(%[[VAL_60]] : Core, %[[VAL_212]] : Core) +// CHECK: aie.wire(%[[VAL_60]] : DMA, %[[VAL_212]] : DMA) +// CHECK: aie.wire(%[[VAL_211]] : North, %[[VAL_212]] : South) +// CHECK: aie.wire(%[[VAL_207]] : East, %[[VAL_213:.*]] : West) +// CHECK: aie.wire(%[[VAL_61]] : Core, %[[VAL_213]] : Core) +// CHECK: aie.wire(%[[VAL_61]] : DMA, %[[VAL_213]] : DMA) +// CHECK: aie.wire(%[[VAL_212]] : North, %[[VAL_213]] : South) +// CHECK: aie.wire(%[[VAL_208]] : East, %[[VAL_214:.*]] : West) +// CHECK: aie.wire(%[[VAL_214]] : East, %[[VAL_215:.*]] : West) +// CHECK: aie.wire(%[[VAL_215]] : East, %[[VAL_216:.*]] : West) +// CHECK: aie.wire(%[[VAL_216]] : East, %[[VAL_217:.*]] : West) +// CHECK: aie.wire(%[[VAL_217]] : East, %[[VAL_218:.*]] : West) +// CHECK: aie.wire(%[[VAL_218]] : East, %[[VAL_219:.*]] : West) +// CHECK: aie.wire(%[[VAL_219]] : East, %[[VAL_220:.*]] : West) +// CHECK: aie.wire(%[[VAL_221:.*]] : North, %[[VAL_220]] : South) +// CHECK: aie.wire(%[[VAL_12]] : DMA, %[[VAL_221]] : DMA) +// CHECK: aie.wire(%[[VAL_220]] : East, %[[VAL_222:.*]] : West) +// CHECK: aie.wire(%[[VAL_223:.*]] : North, %[[VAL_222]] : South) +// CHECK: aie.wire(%[[VAL_13]] : DMA, %[[VAL_223]] : DMA) // CHECK: } module { - AIE.device(xcvc1902) { - %tile_0_0 = AIE.tile(0, 0) - %tile_1_0 = AIE.tile(1, 0) - %tile_2_0 = AIE.tile(2, 0) - %tile_3_0 = AIE.tile(3, 0) - %tile_4_0 = AIE.tile(4, 0) - %tile_5_0 = AIE.tile(5, 0) - %tile_6_0 = AIE.tile(6, 0) - %tile_7_0 = AIE.tile(7, 0) - %tile_8_0 = AIE.tile(8, 0) - %tile_9_0 = AIE.tile(9, 0) - %tile_10_0 = AIE.tile(10, 0) - %tile_11_0 = AIE.tile(11, 0) - %tile_18_0 = AIE.tile(18, 0) - %tile_19_0 = AIE.tile(19, 0) - %tile_0_1 = AIE.tile(0, 1) - %tile_0_2 = AIE.tile(0, 2) - %tile_0_3 = AIE.tile(0, 3) - %tile_0_4 = AIE.tile(0, 4) - %tile_1_1 = AIE.tile(1, 1) - %tile_1_2 = AIE.tile(1, 2) - %tile_1_3 = AIE.tile(1, 3) - %tile_1_4 = AIE.tile(1, 4) - %tile_2_1 = AIE.tile(2, 1) - %tile_2_2 = AIE.tile(2, 2) - %tile_2_3 = AIE.tile(2, 3) - %tile_2_4 = AIE.tile(2, 4) - %tile_3_1 = AIE.tile(3, 1) - %tile_3_2 = AIE.tile(3, 2) - %tile_3_3 = AIE.tile(3, 3) - %tile_3_4 = AIE.tile(3, 4) - %tile_4_1 = AIE.tile(4, 1) - %tile_4_2 = AIE.tile(4, 2) - %tile_4_3 = AIE.tile(4, 3) - %tile_4_4 = AIE.tile(4, 4) - %tile_5_1 = AIE.tile(5, 1) - %tile_5_2 = AIE.tile(5, 2) - %tile_5_3 = AIE.tile(5, 3) - %tile_5_4 = AIE.tile(5, 4) - %tile_6_1 = AIE.tile(6, 1) - %tile_6_2 = AIE.tile(6, 2) - %tile_6_3 = AIE.tile(6, 3) - %tile_6_4 = AIE.tile(6, 4) - %tile_7_1 = AIE.tile(7, 1) - %tile_7_2 = AIE.tile(7, 2) - %tile_7_3 = AIE.tile(7, 3) - %tile_7_4 = AIE.tile(7, 4) - %tile_8_1 = AIE.tile(8, 1) - %tile_8_2 = AIE.tile(8, 2) - %tile_8_3 = AIE.tile(8, 3) - %tile_8_4 = AIE.tile(8, 4) - %tile_9_1 = AIE.tile(9, 1) - %tile_9_2 = AIE.tile(9, 2) - %tile_9_3 = AIE.tile(9, 3) - %tile_9_4 = AIE.tile(9, 4) - %tile_10_1 = AIE.tile(10, 1) - %tile_10_2 = AIE.tile(10, 2) - %tile_10_3 = AIE.tile(10, 3) - %tile_10_4 = AIE.tile(10, 4) - %tile_11_1 = AIE.tile(11, 1) - %tile_11_2 = AIE.tile(11, 2) - %tile_11_3 = AIE.tile(11, 3) - %tile_11_4 = AIE.tile(11, 4) - %tile_12_1 = AIE.tile(12, 1) - %tile_12_2 = AIE.tile(12, 2) - %tile_12_3 = AIE.tile(12, 3) - %tile_12_4 = AIE.tile(12, 4) - %switchbox_0_1 = AIE.switchbox(%tile_0_1) { - AIE.connect - } - %switchbox_0_2 = AIE.switchbox(%tile_0_2) { - AIE.connect - } - %switchbox_0_3 = AIE.switchbox(%tile_0_3) { - AIE.connect - AIE.connect - } - %switchbox_0_4 = AIE.switchbox(%tile_0_4) { - } - %switchbox_1_1 = AIE.switchbox(%tile_1_1) { - AIE.connect - } - %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - AIE.connect - } - %switchbox_1_3 = AIE.switchbox(%tile_1_3) { - AIE.connect - } - %switchbox_1_4 = AIE.switchbox(%tile_1_4) { - AIE.connect - } - %switchbox_2_1 = AIE.switchbox(%tile_2_1) { - AIE.connect - } - %switchbox_2_2 = AIE.switchbox(%tile_2_2) { - AIE.connect - } - %switchbox_2_3 = AIE.switchbox(%tile_2_3) { - AIE.connect - } - %switchbox_2_4 = AIE.switchbox(%tile_2_4) { - AIE.connect - } - %switchbox_3_1 = AIE.switchbox(%tile_3_1) { - AIE.connect - } - %switchbox_3_2 = AIE.switchbox(%tile_3_2) { - AIE.connect - } - %switchbox_3_3 = AIE.switchbox(%tile_3_3) { - AIE.connect - } - %switchbox_3_4 = AIE.switchbox(%tile_3_4) { - } - %switchbox_4_1 = AIE.switchbox(%tile_4_1) { - AIE.connect - } - %switchbox_4_2 = AIE.switchbox(%tile_4_2) { - AIE.connect - } - %switchbox_4_3 = AIE.switchbox(%tile_4_3) { - } - %switchbox_4_4 = AIE.switchbox(%tile_4_4) { - } - %switchbox_5_1 = AIE.switchbox(%tile_5_1) { - AIE.connect + aie.device(xcvc1902) { + %tile_0_0 = aie.tile(0, 0) + %tile_1_0 = aie.tile(1, 0) + %tile_2_0 = aie.tile(2, 0) + %tile_3_0 = aie.tile(3, 0) + %tile_4_0 = aie.tile(4, 0) + %tile_5_0 = aie.tile(5, 0) + %tile_6_0 = aie.tile(6, 0) + %tile_7_0 = aie.tile(7, 0) + %tile_8_0 = aie.tile(8, 0) + %tile_9_0 = aie.tile(9, 0) + %tile_10_0 = aie.tile(10, 0) + %tile_11_0 = aie.tile(11, 0) + %tile_18_0 = aie.tile(18, 0) + %tile_19_0 = aie.tile(19, 0) + %tile_0_1 = aie.tile(0, 1) + %tile_0_2 = aie.tile(0, 2) + %tile_0_3 = aie.tile(0, 3) + %tile_0_4 = aie.tile(0, 4) + %tile_1_1 = aie.tile(1, 1) + %tile_1_2 = aie.tile(1, 2) + %tile_1_3 = aie.tile(1, 3) + %tile_1_4 = aie.tile(1, 4) + %tile_2_1 = aie.tile(2, 1) + %tile_2_2 = aie.tile(2, 2) + %tile_2_3 = aie.tile(2, 3) + %tile_2_4 = aie.tile(2, 4) + %tile_3_1 = aie.tile(3, 1) + %tile_3_2 = aie.tile(3, 2) + %tile_3_3 = aie.tile(3, 3) + %tile_3_4 = aie.tile(3, 4) + %tile_4_1 = aie.tile(4, 1) + %tile_4_2 = aie.tile(4, 2) + %tile_4_3 = aie.tile(4, 3) + %tile_4_4 = aie.tile(4, 4) + %tile_5_1 = aie.tile(5, 1) + %tile_5_2 = aie.tile(5, 2) + %tile_5_3 = aie.tile(5, 3) + %tile_5_4 = aie.tile(5, 4) + %tile_6_1 = aie.tile(6, 1) + %tile_6_2 = aie.tile(6, 2) + %tile_6_3 = aie.tile(6, 3) + %tile_6_4 = aie.tile(6, 4) + %tile_7_1 = aie.tile(7, 1) + %tile_7_2 = aie.tile(7, 2) + %tile_7_3 = aie.tile(7, 3) + %tile_7_4 = aie.tile(7, 4) + %tile_8_1 = aie.tile(8, 1) + %tile_8_2 = aie.tile(8, 2) + %tile_8_3 = aie.tile(8, 3) + %tile_8_4 = aie.tile(8, 4) + %tile_9_1 = aie.tile(9, 1) + %tile_9_2 = aie.tile(9, 2) + %tile_9_3 = aie.tile(9, 3) + %tile_9_4 = aie.tile(9, 4) + %tile_10_1 = aie.tile(10, 1) + %tile_10_2 = aie.tile(10, 2) + %tile_10_3 = aie.tile(10, 3) + %tile_10_4 = aie.tile(10, 4) + %tile_11_1 = aie.tile(11, 1) + %tile_11_2 = aie.tile(11, 2) + %tile_11_3 = aie.tile(11, 3) + %tile_11_4 = aie.tile(11, 4) + %tile_12_1 = aie.tile(12, 1) + %tile_12_2 = aie.tile(12, 2) + %tile_12_3 = aie.tile(12, 3) + %tile_12_4 = aie.tile(12, 4) + %switchbox_0_1 = aie.switchbox(%tile_0_1) { + aie.connect + } + %switchbox_0_2 = aie.switchbox(%tile_0_2) { + aie.connect + } + %switchbox_0_3 = aie.switchbox(%tile_0_3) { + aie.connect + aie.connect + } + %switchbox_0_4 = aie.switchbox(%tile_0_4) { + } + %switchbox_1_1 = aie.switchbox(%tile_1_1) { + aie.connect + } + %switchbox_1_2 = aie.switchbox(%tile_1_2) { + aie.connect + } + %switchbox_1_3 = aie.switchbox(%tile_1_3) { + aie.connect + } + %switchbox_1_4 = aie.switchbox(%tile_1_4) { + aie.connect + } + %switchbox_2_1 = aie.switchbox(%tile_2_1) { + aie.connect + } + %switchbox_2_2 = aie.switchbox(%tile_2_2) { + aie.connect + } + %switchbox_2_3 = aie.switchbox(%tile_2_3) { + aie.connect + } + %switchbox_2_4 = aie.switchbox(%tile_2_4) { + aie.connect + } + %switchbox_3_1 = aie.switchbox(%tile_3_1) { + aie.connect + } + %switchbox_3_2 = aie.switchbox(%tile_3_2) { + aie.connect + } + %switchbox_3_3 = aie.switchbox(%tile_3_3) { + aie.connect + } + %switchbox_3_4 = aie.switchbox(%tile_3_4) { + } + %switchbox_4_1 = aie.switchbox(%tile_4_1) { + aie.connect + } + %switchbox_4_2 = aie.switchbox(%tile_4_2) { + aie.connect + } + %switchbox_4_3 = aie.switchbox(%tile_4_3) { + } + %switchbox_4_4 = aie.switchbox(%tile_4_4) { + } + %switchbox_5_1 = aie.switchbox(%tile_5_1) { + aie.connect } - %switchbox_5_2 = AIE.switchbox(%tile_5_2) { - AIE.connect + %switchbox_5_2 = aie.switchbox(%tile_5_2) { + aie.connect } - %switchbox_5_3 = AIE.switchbox(%tile_5_3) { - AIE.connect + %switchbox_5_3 = aie.switchbox(%tile_5_3) { + aie.connect } - %switchbox_5_4 = AIE.switchbox(%tile_5_4) { + %switchbox_5_4 = aie.switchbox(%tile_5_4) { } - %switchbox_6_1 = AIE.switchbox(%tile_6_1) { - AIE.connect - AIE.connect + %switchbox_6_1 = aie.switchbox(%tile_6_1) { + aie.connect + aie.connect } - %switchbox_6_2 = AIE.switchbox(%tile_6_2) { - AIE.connect - AIE.connect + %switchbox_6_2 = aie.switchbox(%tile_6_2) { + aie.connect + aie.connect } - %switchbox_6_3 = AIE.switchbox(%tile_6_3) { - AIE.connect - AIE.connect + %switchbox_6_3 = aie.switchbox(%tile_6_3) { + aie.connect + aie.connect } - %switchbox_6_4 = AIE.switchbox(%tile_6_4) { + %switchbox_6_4 = aie.switchbox(%tile_6_4) { } - %switchbox_7_1 = AIE.switchbox(%tile_7_1) { - AIE.connect - AIE.connect + %switchbox_7_1 = aie.switchbox(%tile_7_1) { + aie.connect + aie.connect } - %switchbox_7_2 = AIE.switchbox(%tile_7_2) { - AIE.connect - AIE.connect + %switchbox_7_2 = aie.switchbox(%tile_7_2) { + aie.connect + aie.connect } - %switchbox_7_3 = AIE.switchbox(%tile_7_3) { - AIE.connect - AIE.connect + %switchbox_7_3 = aie.switchbox(%tile_7_3) { + aie.connect + aie.connect } - %switchbox_7_4 = AIE.switchbox(%tile_7_4) { - AIE.connect - AIE.connect + %switchbox_7_4 = aie.switchbox(%tile_7_4) { + aie.connect + aie.connect } - %switchbox_8_1 = AIE.switchbox(%tile_8_1) { + %switchbox_8_1 = aie.switchbox(%tile_8_1) { } - %switchbox_8_2 = AIE.switchbox(%tile_8_2) { + %switchbox_8_2 = aie.switchbox(%tile_8_2) { } - %switchbox_8_3 = AIE.switchbox(%tile_8_3) { + %switchbox_8_3 = aie.switchbox(%tile_8_3) { } - %switchbox_8_4 = AIE.switchbox(%tile_8_4) { + %switchbox_8_4 = aie.switchbox(%tile_8_4) { } - %switchbox_9_1 = AIE.switchbox(%tile_9_1) { - AIE.connect + %switchbox_9_1 = aie.switchbox(%tile_9_1) { + aie.connect } - %switchbox_9_2 = AIE.switchbox(%tile_9_2) { - AIE.connect + %switchbox_9_2 = aie.switchbox(%tile_9_2) { + aie.connect } - %switchbox_9_3 = AIE.switchbox(%tile_9_3) { + %switchbox_9_3 = aie.switchbox(%tile_9_3) { } - %switchbox_9_4 = AIE.switchbox(%tile_9_4) { + %switchbox_9_4 = aie.switchbox(%tile_9_4) { } - %switchbox_10_1 = AIE.switchbox(%tile_10_1) { - AIE.connect + %switchbox_10_1 = aie.switchbox(%tile_10_1) { + aie.connect } - %switchbox_10_2 = AIE.switchbox(%tile_10_2) { - AIE.connect + %switchbox_10_2 = aie.switchbox(%tile_10_2) { + aie.connect } - %switchbox_10_3 = AIE.switchbox(%tile_10_3) { + %switchbox_10_3 = aie.switchbox(%tile_10_3) { } - %switchbox_10_4 = AIE.switchbox(%tile_10_4) { + %switchbox_10_4 = aie.switchbox(%tile_10_4) { } - %switchbox_11_1 = AIE.switchbox(%tile_11_1) { - AIE.connect - AIE.connect + %switchbox_11_1 = aie.switchbox(%tile_11_1) { + aie.connect + aie.connect } - %switchbox_11_2 = AIE.switchbox(%tile_11_2) { - AIE.connect - AIE.connect + %switchbox_11_2 = aie.switchbox(%tile_11_2) { + aie.connect + aie.connect } - %switchbox_11_3 = AIE.switchbox(%tile_11_3) { - AIE.connect - AIE.connect + %switchbox_11_3 = aie.switchbox(%tile_11_3) { + aie.connect + aie.connect } - %switchbox_11_4 = AIE.switchbox(%tile_11_4) { + %switchbox_11_4 = aie.switchbox(%tile_11_4) { } - AIE.flow(%tile_2_0, DMA : 0, %tile_2_0, North : 0) - AIE.flow(%tile_2_0, DMA : 1, %tile_6_0, North : 1) - AIE.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) - AIE.flow(%tile_3_0, DMA : 1, %tile_7_0, North : 1) - AIE.flow(%tile_6_0, DMA : 0, %tile_0_0, North : 0) - AIE.flow(%tile_6_0, DMA : 1, %tile_4_0, North : 0) - AIE.flow(%tile_7_0, DMA : 0, %tile_1_0, North : 0) - AIE.flow(%tile_7_0, DMA : 1, %tile_5_0, North : 0) - AIE.flow(%tile_10_0, DMA : 0, %tile_10_0, North : 0) - AIE.flow(%tile_11_0, DMA : 0, %tile_11_0, North : 0) - AIE.flow(%tile_18_0, DMA : 0, %tile_6_0, North : 0) - AIE.flow(%tile_18_0, DMA : 1, %tile_9_0, North : 0) - AIE.flow(%tile_19_0, DMA : 0, %tile_7_0, North : 0) - AIE.flow(%tile_19_0, DMA : 1, %tile_11_0, North : 1) + aie.flow(%tile_2_0, DMA : 0, %tile_2_0, North : 0) + aie.flow(%tile_2_0, DMA : 1, %tile_6_0, North : 1) + aie.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) + aie.flow(%tile_3_0, DMA : 1, %tile_7_0, North : 1) + aie.flow(%tile_6_0, DMA : 0, %tile_0_0, North : 0) + aie.flow(%tile_6_0, DMA : 1, %tile_4_0, North : 0) + aie.flow(%tile_7_0, DMA : 0, %tile_1_0, North : 0) + aie.flow(%tile_7_0, DMA : 1, %tile_5_0, North : 0) + aie.flow(%tile_10_0, DMA : 0, %tile_10_0, North : 0) + aie.flow(%tile_11_0, DMA : 0, %tile_11_0, North : 0) + aie.flow(%tile_18_0, DMA : 0, %tile_6_0, North : 0) + aie.flow(%tile_18_0, DMA : 1, %tile_9_0, North : 0) + aie.flow(%tile_19_0, DMA : 0, %tile_7_0, North : 0) + aie.flow(%tile_19_0, DMA : 1, %tile_11_0, North : 1) } } diff --git a/test/create-flows/unit_routed_herd_3x2.mlir b/test/create-flows/unit_routed_herd_3x2.mlir index 54d68ec097..da4a174ed5 100644 --- a/test/create-flows/unit_routed_herd_3x2.mlir +++ b/test/create-flows/unit_routed_herd_3x2.mlir @@ -10,1009 +10,1009 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_4:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_5:.*]] = AIE.tile(5, 0) -// CHECK: %[[VAL_6:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_7:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_8:.*]] = AIE.tile(8, 0) -// CHECK: %[[VAL_9:.*]] = AIE.tile(9, 0) -// CHECK: %[[VAL_10:.*]] = AIE.tile(10, 0) -// CHECK: %[[VAL_11:.*]] = AIE.tile(11, 0) -// CHECK: %[[VAL_12:.*]] = AIE.tile(18, 0) -// CHECK: %[[VAL_13:.*]] = AIE.tile(19, 0) -// CHECK: %[[VAL_14:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_15:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_16:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_17:.*]] = AIE.tile(0, 4) -// CHECK: %[[VAL_18:.*]] = AIE.tile(0, 5) -// CHECK: %[[VAL_19:.*]] = AIE.tile(0, 6) -// CHECK: %[[VAL_20:.*]] = AIE.tile(0, 7) -// CHECK: %[[VAL_21:.*]] = AIE.tile(0, 8) -// CHECK: %[[VAL_22:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_23:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_24:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_25:.*]] = AIE.tile(1, 4) -// CHECK: %[[VAL_26:.*]] = AIE.tile(1, 5) -// CHECK: %[[VAL_27:.*]] = AIE.tile(1, 6) -// CHECK: %[[VAL_28:.*]] = AIE.tile(1, 7) -// CHECK: %[[VAL_29:.*]] = AIE.tile(1, 8) -// CHECK: %[[VAL_30:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_31:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_32:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_33:.*]] = AIE.tile(2, 4) -// CHECK: %[[VAL_34:.*]] = AIE.tile(2, 5) -// CHECK: %[[VAL_35:.*]] = AIE.tile(2, 6) -// CHECK: %[[VAL_36:.*]] = AIE.tile(2, 7) -// CHECK: %[[VAL_37:.*]] = AIE.tile(2, 8) -// CHECK: %[[VAL_38:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_39:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_40:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_41:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_42:.*]] = AIE.tile(3, 5) -// CHECK: %[[VAL_43:.*]] = AIE.tile(3, 6) -// CHECK: %[[VAL_44:.*]] = AIE.tile(3, 7) -// CHECK: %[[VAL_45:.*]] = AIE.tile(3, 8) -// CHECK: %[[VAL_46:.*]] = AIE.tile(4, 1) -// CHECK: %[[VAL_47:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_48:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_49:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_50:.*]] = AIE.tile(4, 5) -// CHECK: %[[VAL_51:.*]] = AIE.tile(4, 6) -// CHECK: %[[VAL_52:.*]] = AIE.tile(4, 7) -// CHECK: %[[VAL_53:.*]] = AIE.tile(4, 8) -// CHECK: %[[VAL_54:.*]] = AIE.tile(5, 1) -// CHECK: %[[VAL_55:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_56:.*]] = AIE.tile(5, 3) -// CHECK: %[[VAL_57:.*]] = AIE.tile(5, 4) -// CHECK: %[[VAL_58:.*]] = AIE.tile(5, 5) -// CHECK: %[[VAL_59:.*]] = AIE.tile(5, 6) -// CHECK: %[[VAL_60:.*]] = AIE.tile(5, 7) -// CHECK: %[[VAL_61:.*]] = AIE.tile(5, 8) -// CHECK: %[[VAL_62:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_63:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_64:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_65:.*]] = AIE.tile(6, 4) -// CHECK: %[[VAL_66:.*]] = AIE.tile(6, 5) -// CHECK: %[[VAL_67:.*]] = AIE.tile(6, 6) -// CHECK: %[[VAL_68:.*]] = AIE.tile(6, 7) -// CHECK: %[[VAL_69:.*]] = AIE.tile(6, 8) -// CHECK: %[[VAL_70:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_71:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_72:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_73:.*]] = AIE.tile(7, 4) -// CHECK: %[[VAL_74:.*]] = AIE.tile(7, 5) -// CHECK: %[[VAL_75:.*]] = AIE.tile(7, 6) -// CHECK: %[[VAL_76:.*]] = AIE.tile(7, 7) -// CHECK: %[[VAL_77:.*]] = AIE.tile(7, 8) -// CHECK: %[[VAL_78:.*]] = AIE.tile(8, 1) -// CHECK: %[[VAL_79:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_80:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_81:.*]] = AIE.tile(8, 4) -// CHECK: %[[VAL_82:.*]] = AIE.tile(8, 5) -// CHECK: %[[VAL_83:.*]] = AIE.tile(8, 6) -// CHECK: %[[VAL_84:.*]] = AIE.tile(8, 7) -// CHECK: %[[VAL_85:.*]] = AIE.tile(8, 8) -// CHECK: %[[VAL_86:.*]] = AIE.tile(9, 1) -// CHECK: %[[VAL_87:.*]] = AIE.tile(9, 2) -// CHECK: %[[VAL_88:.*]] = AIE.tile(9, 3) -// CHECK: %[[VAL_89:.*]] = AIE.tile(9, 4) -// CHECK: %[[VAL_90:.*]] = AIE.tile(9, 5) -// CHECK: %[[VAL_91:.*]] = AIE.tile(9, 6) -// CHECK: %[[VAL_92:.*]] = AIE.tile(9, 7) -// CHECK: %[[VAL_93:.*]] = AIE.tile(9, 8) -// CHECK: %[[VAL_94:.*]] = AIE.tile(10, 1) -// CHECK: %[[VAL_95:.*]] = AIE.tile(10, 2) -// CHECK: %[[VAL_96:.*]] = AIE.tile(10, 3) -// CHECK: %[[VAL_97:.*]] = AIE.tile(10, 4) -// CHECK: %[[VAL_98:.*]] = AIE.tile(10, 5) -// CHECK: %[[VAL_99:.*]] = AIE.tile(10, 6) -// CHECK: %[[VAL_100:.*]] = AIE.tile(10, 7) -// CHECK: %[[VAL_101:.*]] = AIE.tile(10, 8) -// CHECK: %[[VAL_102:.*]] = AIE.tile(11, 1) -// CHECK: %[[VAL_103:.*]] = AIE.tile(11, 2) -// CHECK: %[[VAL_104:.*]] = AIE.tile(11, 3) -// CHECK: %[[VAL_105:.*]] = AIE.tile(11, 4) -// CHECK: %[[VAL_106:.*]] = AIE.tile(11, 5) -// CHECK: %[[VAL_107:.*]] = AIE.tile(11, 6) -// CHECK: %[[VAL_108:.*]] = AIE.tile(11, 7) -// CHECK: %[[VAL_109:.*]] = AIE.tile(11, 8) -// CHECK: %[[VAL_110:.*]] = AIE.tile(12, 1) -// CHECK: %[[VAL_111:.*]] = AIE.tile(12, 2) -// CHECK: %[[VAL_112:.*]] = AIE.tile(12, 3) -// CHECK: %[[VAL_113:.*]] = AIE.tile(12, 4) -// CHECK: %[[VAL_114:.*]] = AIE.tile(12, 5) -// CHECK: %[[VAL_115:.*]] = AIE.tile(12, 6) -// CHECK: %[[VAL_116:.*]] = AIE.tile(12, 7) -// CHECK: %[[VAL_117:.*]] = AIE.tile(12, 8) -// CHECK: %[[VAL_118:.*]] = AIE.tile(13, 0) -// CHECK: %[[VAL_119:.*]] = AIE.tile(13, 1) -// CHECK: %[[VAL_120:.*]] = AIE.tile(13, 2) -// CHECK: %[[VAL_121:.*]] = AIE.tile(13, 3) -// CHECK: %[[VAL_122:.*]] = AIE.tile(13, 4) -// CHECK: %[[VAL_123:.*]] = AIE.tile(13, 5) -// CHECK: %[[VAL_124:.*]] = AIE.tile(13, 6) -// CHECK: %[[VAL_125:.*]] = AIE.tile(13, 7) -// CHECK: %[[VAL_126:.*]] = AIE.tile(13, 8) -// CHECK: %[[VAL_127:.*]] = AIE.tile(14, 1) -// CHECK: %[[VAL_128:.*]] = AIE.tile(14, 2) -// CHECK: %[[VAL_129:.*]] = AIE.tile(14, 3) -// CHECK: %[[VAL_130:.*]] = AIE.tile(14, 4) -// CHECK: %[[VAL_131:.*]] = AIE.tile(14, 5) -// CHECK: %[[VAL_132:.*]] = AIE.tile(14, 6) -// CHECK: %[[VAL_133:.*]] = AIE.tile(14, 7) -// CHECK: %[[VAL_134:.*]] = AIE.tile(14, 8) -// CHECK: %[[VAL_135:.*]] = AIE.switchbox(%[[VAL_14]]) { -// CHECK: } -// CHECK: %[[VAL_136:.*]] = AIE.switchbox(%[[VAL_15]]) { -// CHECK: } -// CHECK: %[[VAL_137:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: } -// CHECK: %[[VAL_138:.*]] = AIE.switchbox(%[[VAL_17]]) { -// CHECK: } -// CHECK: %[[VAL_139:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: } -// CHECK: %[[VAL_140:.*]] = AIE.switchbox(%[[VAL_23]]) { -// CHECK: } -// CHECK: %[[VAL_141:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: } -// CHECK: %[[VAL_142:.*]] = AIE.switchbox(%[[VAL_25]]) { -// CHECK: } -// CHECK: %[[VAL_143:.*]] = AIE.switchbox(%[[VAL_30]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_144:.*]] = AIE.switchbox(%[[VAL_31]]) { -// CHECK: } -// CHECK: %[[VAL_145:.*]] = AIE.switchbox(%[[VAL_32]]) { -// CHECK: } -// CHECK: %[[VAL_146:.*]] = AIE.switchbox(%[[VAL_33]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_147:.*]] = AIE.switchbox(%[[VAL_34]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_148:.*]] = AIE.switchbox(%[[VAL_38]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_4:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_5:.*]] = aie.tile(5, 0) +// CHECK: %[[VAL_6:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_7:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_8:.*]] = aie.tile(8, 0) +// CHECK: %[[VAL_9:.*]] = aie.tile(9, 0) +// CHECK: %[[VAL_10:.*]] = aie.tile(10, 0) +// CHECK: %[[VAL_11:.*]] = aie.tile(11, 0) +// CHECK: %[[VAL_12:.*]] = aie.tile(18, 0) +// CHECK: %[[VAL_13:.*]] = aie.tile(19, 0) +// CHECK: %[[VAL_14:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_15:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_16:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_17:.*]] = aie.tile(0, 4) +// CHECK: %[[VAL_18:.*]] = aie.tile(0, 5) +// CHECK: %[[VAL_19:.*]] = aie.tile(0, 6) +// CHECK: %[[VAL_20:.*]] = aie.tile(0, 7) +// CHECK: %[[VAL_21:.*]] = aie.tile(0, 8) +// CHECK: %[[VAL_22:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_23:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_24:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_25:.*]] = aie.tile(1, 4) +// CHECK: %[[VAL_26:.*]] = aie.tile(1, 5) +// CHECK: %[[VAL_27:.*]] = aie.tile(1, 6) +// CHECK: %[[VAL_28:.*]] = aie.tile(1, 7) +// CHECK: %[[VAL_29:.*]] = aie.tile(1, 8) +// CHECK: %[[VAL_30:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_31:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_32:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_33:.*]] = aie.tile(2, 4) +// CHECK: %[[VAL_34:.*]] = aie.tile(2, 5) +// CHECK: %[[VAL_35:.*]] = aie.tile(2, 6) +// CHECK: %[[VAL_36:.*]] = aie.tile(2, 7) +// CHECK: %[[VAL_37:.*]] = aie.tile(2, 8) +// CHECK: %[[VAL_38:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_39:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_40:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_41:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_42:.*]] = aie.tile(3, 5) +// CHECK: %[[VAL_43:.*]] = aie.tile(3, 6) +// CHECK: %[[VAL_44:.*]] = aie.tile(3, 7) +// CHECK: %[[VAL_45:.*]] = aie.tile(3, 8) +// CHECK: %[[VAL_46:.*]] = aie.tile(4, 1) +// CHECK: %[[VAL_47:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_48:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_49:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_50:.*]] = aie.tile(4, 5) +// CHECK: %[[VAL_51:.*]] = aie.tile(4, 6) +// CHECK: %[[VAL_52:.*]] = aie.tile(4, 7) +// CHECK: %[[VAL_53:.*]] = aie.tile(4, 8) +// CHECK: %[[VAL_54:.*]] = aie.tile(5, 1) +// CHECK: %[[VAL_55:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_56:.*]] = aie.tile(5, 3) +// CHECK: %[[VAL_57:.*]] = aie.tile(5, 4) +// CHECK: %[[VAL_58:.*]] = aie.tile(5, 5) +// CHECK: %[[VAL_59:.*]] = aie.tile(5, 6) +// CHECK: %[[VAL_60:.*]] = aie.tile(5, 7) +// CHECK: %[[VAL_61:.*]] = aie.tile(5, 8) +// CHECK: %[[VAL_62:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_63:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_64:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_65:.*]] = aie.tile(6, 4) +// CHECK: %[[VAL_66:.*]] = aie.tile(6, 5) +// CHECK: %[[VAL_67:.*]] = aie.tile(6, 6) +// CHECK: %[[VAL_68:.*]] = aie.tile(6, 7) +// CHECK: %[[VAL_69:.*]] = aie.tile(6, 8) +// CHECK: %[[VAL_70:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_71:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_72:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_73:.*]] = aie.tile(7, 4) +// CHECK: %[[VAL_74:.*]] = aie.tile(7, 5) +// CHECK: %[[VAL_75:.*]] = aie.tile(7, 6) +// CHECK: %[[VAL_76:.*]] = aie.tile(7, 7) +// CHECK: %[[VAL_77:.*]] = aie.tile(7, 8) +// CHECK: %[[VAL_78:.*]] = aie.tile(8, 1) +// CHECK: %[[VAL_79:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_80:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_81:.*]] = aie.tile(8, 4) +// CHECK: %[[VAL_82:.*]] = aie.tile(8, 5) +// CHECK: %[[VAL_83:.*]] = aie.tile(8, 6) +// CHECK: %[[VAL_84:.*]] = aie.tile(8, 7) +// CHECK: %[[VAL_85:.*]] = aie.tile(8, 8) +// CHECK: %[[VAL_86:.*]] = aie.tile(9, 1) +// CHECK: %[[VAL_87:.*]] = aie.tile(9, 2) +// CHECK: %[[VAL_88:.*]] = aie.tile(9, 3) +// CHECK: %[[VAL_89:.*]] = aie.tile(9, 4) +// CHECK: %[[VAL_90:.*]] = aie.tile(9, 5) +// CHECK: %[[VAL_91:.*]] = aie.tile(9, 6) +// CHECK: %[[VAL_92:.*]] = aie.tile(9, 7) +// CHECK: %[[VAL_93:.*]] = aie.tile(9, 8) +// CHECK: %[[VAL_94:.*]] = aie.tile(10, 1) +// CHECK: %[[VAL_95:.*]] = aie.tile(10, 2) +// CHECK: %[[VAL_96:.*]] = aie.tile(10, 3) +// CHECK: %[[VAL_97:.*]] = aie.tile(10, 4) +// CHECK: %[[VAL_98:.*]] = aie.tile(10, 5) +// CHECK: %[[VAL_99:.*]] = aie.tile(10, 6) +// CHECK: %[[VAL_100:.*]] = aie.tile(10, 7) +// CHECK: %[[VAL_101:.*]] = aie.tile(10, 8) +// CHECK: %[[VAL_102:.*]] = aie.tile(11, 1) +// CHECK: %[[VAL_103:.*]] = aie.tile(11, 2) +// CHECK: %[[VAL_104:.*]] = aie.tile(11, 3) +// CHECK: %[[VAL_105:.*]] = aie.tile(11, 4) +// CHECK: %[[VAL_106:.*]] = aie.tile(11, 5) +// CHECK: %[[VAL_107:.*]] = aie.tile(11, 6) +// CHECK: %[[VAL_108:.*]] = aie.tile(11, 7) +// CHECK: %[[VAL_109:.*]] = aie.tile(11, 8) +// CHECK: %[[VAL_110:.*]] = aie.tile(12, 1) +// CHECK: %[[VAL_111:.*]] = aie.tile(12, 2) +// CHECK: %[[VAL_112:.*]] = aie.tile(12, 3) +// CHECK: %[[VAL_113:.*]] = aie.tile(12, 4) +// CHECK: %[[VAL_114:.*]] = aie.tile(12, 5) +// CHECK: %[[VAL_115:.*]] = aie.tile(12, 6) +// CHECK: %[[VAL_116:.*]] = aie.tile(12, 7) +// CHECK: %[[VAL_117:.*]] = aie.tile(12, 8) +// CHECK: %[[VAL_118:.*]] = aie.tile(13, 0) +// CHECK: %[[VAL_119:.*]] = aie.tile(13, 1) +// CHECK: %[[VAL_120:.*]] = aie.tile(13, 2) +// CHECK: %[[VAL_121:.*]] = aie.tile(13, 3) +// CHECK: %[[VAL_122:.*]] = aie.tile(13, 4) +// CHECK: %[[VAL_123:.*]] = aie.tile(13, 5) +// CHECK: %[[VAL_124:.*]] = aie.tile(13, 6) +// CHECK: %[[VAL_125:.*]] = aie.tile(13, 7) +// CHECK: %[[VAL_126:.*]] = aie.tile(13, 8) +// CHECK: %[[VAL_127:.*]] = aie.tile(14, 1) +// CHECK: %[[VAL_128:.*]] = aie.tile(14, 2) +// CHECK: %[[VAL_129:.*]] = aie.tile(14, 3) +// CHECK: %[[VAL_130:.*]] = aie.tile(14, 4) +// CHECK: %[[VAL_131:.*]] = aie.tile(14, 5) +// CHECK: %[[VAL_132:.*]] = aie.tile(14, 6) +// CHECK: %[[VAL_133:.*]] = aie.tile(14, 7) +// CHECK: %[[VAL_134:.*]] = aie.tile(14, 8) +// CHECK: %[[VAL_135:.*]] = aie.switchbox(%[[VAL_14]]) { +// CHECK: } +// CHECK: %[[VAL_136:.*]] = aie.switchbox(%[[VAL_15]]) { +// CHECK: } +// CHECK: %[[VAL_137:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: } +// CHECK: %[[VAL_138:.*]] = aie.switchbox(%[[VAL_17]]) { +// CHECK: } +// CHECK: %[[VAL_139:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: } +// CHECK: %[[VAL_140:.*]] = aie.switchbox(%[[VAL_23]]) { +// CHECK: } +// CHECK: %[[VAL_141:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: } +// CHECK: %[[VAL_142:.*]] = aie.switchbox(%[[VAL_25]]) { +// CHECK: } +// CHECK: %[[VAL_143:.*]] = aie.switchbox(%[[VAL_30]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_144:.*]] = aie.switchbox(%[[VAL_31]]) { +// CHECK: } +// CHECK: %[[VAL_145:.*]] = aie.switchbox(%[[VAL_32]]) { +// CHECK: } +// CHECK: %[[VAL_146:.*]] = aie.switchbox(%[[VAL_33]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_147:.*]] = aie.switchbox(%[[VAL_34]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_148:.*]] = aie.switchbox(%[[VAL_38]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_149:.*]] = AIE.switchbox(%[[VAL_39]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_149:.*]] = aie.switchbox(%[[VAL_39]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_150:.*]] = AIE.switchbox(%[[VAL_40]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_150:.*]] = aie.switchbox(%[[VAL_40]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_151:.*]] = AIE.switchbox(%[[VAL_41]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_151:.*]] = aie.switchbox(%[[VAL_41]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_152:.*]] = AIE.switchbox(%[[VAL_42]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_152:.*]] = aie.switchbox(%[[VAL_42]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_153:.*]] = AIE.switchbox(%[[VAL_46]]) { +// CHECK: %[[VAL_153:.*]] = aie.switchbox(%[[VAL_46]]) { // CHECK: } -// CHECK: %[[VAL_154:.*]] = AIE.switchbox(%[[VAL_47]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_154:.*]] = aie.switchbox(%[[VAL_47]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_155:.*]] = AIE.switchbox(%[[VAL_48]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_155:.*]] = aie.switchbox(%[[VAL_48]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_156:.*]] = AIE.switchbox(%[[VAL_49]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_156:.*]] = aie.switchbox(%[[VAL_49]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_157:.*]] = AIE.switchbox(%[[VAL_54]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_157:.*]] = aie.switchbox(%[[VAL_54]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_158:.*]] = AIE.switchbox(%[[VAL_55]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_158:.*]] = aie.switchbox(%[[VAL_55]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_159:.*]] = AIE.switchbox(%[[VAL_56]]) { +// CHECK: %[[VAL_159:.*]] = aie.switchbox(%[[VAL_56]]) { // CHECK: } -// CHECK: %[[VAL_160:.*]] = AIE.switchbox(%[[VAL_57]]) { +// CHECK: %[[VAL_160:.*]] = aie.switchbox(%[[VAL_57]]) { // CHECK: } -// CHECK: %[[VAL_161:.*]] = AIE.switchbox(%[[VAL_58]]) { +// CHECK: %[[VAL_161:.*]] = aie.switchbox(%[[VAL_58]]) { // CHECK: } -// CHECK: %[[VAL_162:.*]] = AIE.switchbox(%[[VAL_59]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_162:.*]] = aie.switchbox(%[[VAL_59]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_163:.*]] = AIE.switchbox(%[[VAL_62]]) { +// CHECK: %[[VAL_163:.*]] = aie.switchbox(%[[VAL_62]]) { // CHECK: } -// CHECK: %[[VAL_164:.*]] = AIE.switchbox(%[[VAL_63]]) { +// CHECK: %[[VAL_164:.*]] = aie.switchbox(%[[VAL_63]]) { // CHECK: } -// CHECK: %[[VAL_165:.*]] = AIE.switchbox(%[[VAL_64]]) { +// CHECK: %[[VAL_165:.*]] = aie.switchbox(%[[VAL_64]]) { // CHECK: } -// CHECK: %[[VAL_166:.*]] = AIE.switchbox(%[[VAL_65]]) { +// CHECK: %[[VAL_166:.*]] = aie.switchbox(%[[VAL_65]]) { // CHECK: } -// CHECK: %[[VAL_167:.*]] = AIE.switchbox(%[[VAL_66]]) { +// CHECK: %[[VAL_167:.*]] = aie.switchbox(%[[VAL_66]]) { // CHECK: } -// CHECK: %[[VAL_168:.*]] = AIE.switchbox(%[[VAL_67]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_168:.*]] = aie.switchbox(%[[VAL_67]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_169:.*]] = AIE.switchbox(%[[VAL_70]]) { +// CHECK: %[[VAL_169:.*]] = aie.switchbox(%[[VAL_70]]) { // CHECK: } -// CHECK: %[[VAL_170:.*]] = AIE.switchbox(%[[VAL_71]]) { +// CHECK: %[[VAL_170:.*]] = aie.switchbox(%[[VAL_71]]) { // CHECK: } -// CHECK: %[[VAL_171:.*]] = AIE.switchbox(%[[VAL_72]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_171:.*]] = aie.switchbox(%[[VAL_72]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_172:.*]] = AIE.switchbox(%[[VAL_73]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_172:.*]] = aie.switchbox(%[[VAL_73]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_173:.*]] = AIE.switchbox(%[[VAL_74]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_173:.*]] = aie.switchbox(%[[VAL_74]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_174:.*]] = AIE.switchbox(%[[VAL_75]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_174:.*]] = aie.switchbox(%[[VAL_75]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_175:.*]] = AIE.switchbox(%[[VAL_78]]) { +// CHECK: %[[VAL_175:.*]] = aie.switchbox(%[[VAL_78]]) { // CHECK: } -// CHECK: %[[VAL_176:.*]] = AIE.switchbox(%[[VAL_79]]) { +// CHECK: %[[VAL_176:.*]] = aie.switchbox(%[[VAL_79]]) { // CHECK: } -// CHECK: %[[VAL_177:.*]] = AIE.switchbox(%[[VAL_80]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_177:.*]] = aie.switchbox(%[[VAL_80]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_178:.*]] = AIE.switchbox(%[[VAL_81]]) { +// CHECK: %[[VAL_178:.*]] = aie.switchbox(%[[VAL_81]]) { // CHECK: } -// CHECK: %[[VAL_179:.*]] = AIE.switchbox(%[[VAL_86]]) { +// CHECK: %[[VAL_179:.*]] = aie.switchbox(%[[VAL_86]]) { // CHECK: } -// CHECK: %[[VAL_180:.*]] = AIE.switchbox(%[[VAL_87]]) { +// CHECK: %[[VAL_180:.*]] = aie.switchbox(%[[VAL_87]]) { // CHECK: } -// CHECK: %[[VAL_181:.*]] = AIE.switchbox(%[[VAL_88]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_181:.*]] = aie.switchbox(%[[VAL_88]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_182:.*]] = AIE.switchbox(%[[VAL_89]]) { +// CHECK: %[[VAL_182:.*]] = aie.switchbox(%[[VAL_89]]) { // CHECK: } -// CHECK: %[[VAL_183:.*]] = AIE.switchbox(%[[VAL_94]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_183:.*]] = aie.switchbox(%[[VAL_94]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_184:.*]] = AIE.switchbox(%[[VAL_95]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_184:.*]] = aie.switchbox(%[[VAL_95]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_185:.*]] = AIE.switchbox(%[[VAL_96]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_185:.*]] = aie.switchbox(%[[VAL_96]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_186:.*]] = AIE.switchbox(%[[VAL_97]]) { +// CHECK: %[[VAL_186:.*]] = aie.switchbox(%[[VAL_97]]) { // CHECK: } -// CHECK: %[[VAL_187:.*]] = AIE.switchbox(%[[VAL_102]]) { +// CHECK: %[[VAL_187:.*]] = aie.switchbox(%[[VAL_102]]) { // CHECK: } -// CHECK: %[[VAL_188:.*]] = AIE.switchbox(%[[VAL_103]]) { +// CHECK: %[[VAL_188:.*]] = aie.switchbox(%[[VAL_103]]) { // CHECK: } -// CHECK: %[[VAL_189:.*]] = AIE.switchbox(%[[VAL_104]]) { +// CHECK: %[[VAL_189:.*]] = aie.switchbox(%[[VAL_104]]) { // CHECK: } -// CHECK: %[[VAL_190:.*]] = AIE.switchbox(%[[VAL_105]]) { +// CHECK: %[[VAL_190:.*]] = aie.switchbox(%[[VAL_105]]) { // CHECK: } -// CHECK: %[[VAL_191:.*]] = AIE.switchbox(%[[VAL_110]]) { +// CHECK: %[[VAL_191:.*]] = aie.switchbox(%[[VAL_110]]) { // CHECK: } -// CHECK: %[[VAL_192:.*]] = AIE.switchbox(%[[VAL_111]]) { +// CHECK: %[[VAL_192:.*]] = aie.switchbox(%[[VAL_111]]) { // CHECK: } -// CHECK: %[[VAL_193:.*]] = AIE.switchbox(%[[VAL_112]]) { +// CHECK: %[[VAL_193:.*]] = aie.switchbox(%[[VAL_112]]) { // CHECK: } -// CHECK: %[[VAL_194:.*]] = AIE.switchbox(%[[VAL_113]]) { +// CHECK: %[[VAL_194:.*]] = aie.switchbox(%[[VAL_113]]) { // CHECK: } -// CHECK: %[[VAL_195:.*]] = AIE.switchbox(%[[VAL_114]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_195:.*]] = aie.switchbox(%[[VAL_114]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_196:.*]] = AIE.switchbox(%[[VAL_119]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_196:.*]] = aie.switchbox(%[[VAL_119]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_197:.*]] = AIE.switchbox(%[[VAL_120]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_197:.*]] = aie.switchbox(%[[VAL_120]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_198:.*]] = AIE.switchbox(%[[VAL_121]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_198:.*]] = aie.switchbox(%[[VAL_121]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_199:.*]] = AIE.switchbox(%[[VAL_122]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_199:.*]] = aie.switchbox(%[[VAL_122]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_200:.*]] = AIE.switchbox(%[[VAL_123]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_200:.*]] = aie.switchbox(%[[VAL_123]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_201:.*]] = AIE.switchbox(%[[VAL_3]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_201:.*]] = aie.switchbox(%[[VAL_3]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_202:.*]] = AIE.shim_mux(%[[VAL_3]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_202:.*]] = aie.shim_mux(%[[VAL_3]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_203:.*]] = AIE.switchbox(%[[VAL_50]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_203:.*]] = aie.switchbox(%[[VAL_50]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_204:.*]] = AIE.switchbox(%[[VAL_5]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_204:.*]] = aie.switchbox(%[[VAL_5]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_205:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_205:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_206:.*]] = AIE.shim_mux(%[[VAL_6]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_206:.*]] = aie.shim_mux(%[[VAL_6]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_207:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_207:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_208:.*]] = AIE.shim_mux(%[[VAL_10]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_208:.*]] = aie.shim_mux(%[[VAL_10]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_209:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_209:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_210:.*]] = AIE.shim_mux(%[[VAL_2]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_210:.*]] = aie.shim_mux(%[[VAL_2]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_211:.*]] = AIE.switchbox(%[[VAL_51]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_211:.*]] = aie.switchbox(%[[VAL_51]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_212:.*]] = AIE.switchbox(%[[VAL_11]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_212:.*]] = aie.switchbox(%[[VAL_11]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_213:.*]] = AIE.shim_mux(%[[VAL_11]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_213:.*]] = aie.shim_mux(%[[VAL_11]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_214:.*]] = AIE.tile(12, 0) -// CHECK: %[[VAL_215:.*]] = AIE.switchbox(%[[VAL_214]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_216:.*]] = AIE.switchbox(%[[VAL_118]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_217:.*]] = AIE.switchbox(%[[VAL_128]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_218:.*]] = AIE.switchbox(%[[VAL_129]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_219:.*]] = AIE.switchbox(%[[VAL_130]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_220:.*]] = AIE.switchbox(%[[VAL_131]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_221:.*]] = AIE.tile(15, 2) -// CHECK: %[[VAL_222:.*]] = AIE.switchbox(%[[VAL_221]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_223:.*]] = AIE.tile(16, 2) -// CHECK: %[[VAL_224:.*]] = AIE.switchbox(%[[VAL_223]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_225:.*]] = AIE.tile(17, 0) -// CHECK: %[[VAL_226:.*]] = AIE.switchbox(%[[VAL_225]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_227:.*]] = AIE.tile(17, 1) -// CHECK: %[[VAL_228:.*]] = AIE.switchbox(%[[VAL_227]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_229:.*]] = AIE.tile(17, 2) -// CHECK: %[[VAL_230:.*]] = AIE.switchbox(%[[VAL_229]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_231:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_232:.*]] = AIE.shim_mux(%[[VAL_12]]) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_14]] : Core, %[[VAL_233:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_14]] : DMA, %[[VAL_233]] : DMA) -// CHECK: AIE.wire(%[[VAL_15]] : Core, %[[VAL_234:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_15]] : DMA, %[[VAL_234]] : DMA) -// CHECK: AIE.wire(%[[VAL_233]] : North, %[[VAL_234]] : South) -// CHECK: AIE.wire(%[[VAL_16]] : Core, %[[VAL_235:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_16]] : DMA, %[[VAL_235]] : DMA) -// CHECK: AIE.wire(%[[VAL_234]] : North, %[[VAL_235]] : South) -// CHECK: AIE.wire(%[[VAL_17]] : Core, %[[VAL_236:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_17]] : DMA, %[[VAL_236]] : DMA) -// CHECK: AIE.wire(%[[VAL_235]] : North, %[[VAL_236]] : South) -// CHECK: AIE.wire(%[[VAL_233]] : East, %[[VAL_237:.*]] : West) -// CHECK: AIE.wire(%[[VAL_22]] : Core, %[[VAL_237]] : Core) -// CHECK: AIE.wire(%[[VAL_22]] : DMA, %[[VAL_237]] : DMA) -// CHECK: AIE.wire(%[[VAL_234]] : East, %[[VAL_238:.*]] : West) -// CHECK: AIE.wire(%[[VAL_23]] : Core, %[[VAL_238]] : Core) -// CHECK: AIE.wire(%[[VAL_23]] : DMA, %[[VAL_238]] : DMA) -// CHECK: AIE.wire(%[[VAL_237]] : North, %[[VAL_238]] : South) -// CHECK: AIE.wire(%[[VAL_235]] : East, %[[VAL_239:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_239]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_239]] : DMA) -// CHECK: AIE.wire(%[[VAL_238]] : North, %[[VAL_239]] : South) -// CHECK: AIE.wire(%[[VAL_236]] : East, %[[VAL_240:.*]] : West) -// CHECK: AIE.wire(%[[VAL_25]] : Core, %[[VAL_240]] : Core) -// CHECK: AIE.wire(%[[VAL_25]] : DMA, %[[VAL_240]] : DMA) -// CHECK: AIE.wire(%[[VAL_239]] : North, %[[VAL_240]] : South) -// CHECK: AIE.wire(%[[VAL_241:.*]] : North, %[[VAL_242:.*]] : South) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_241]] : DMA) -// CHECK: AIE.wire(%[[VAL_237]] : East, %[[VAL_243:.*]] : West) -// CHECK: AIE.wire(%[[VAL_30]] : Core, %[[VAL_243]] : Core) -// CHECK: AIE.wire(%[[VAL_30]] : DMA, %[[VAL_243]] : DMA) -// CHECK: AIE.wire(%[[VAL_242]] : North, %[[VAL_243]] : South) -// CHECK: AIE.wire(%[[VAL_238]] : East, %[[VAL_244:.*]] : West) -// CHECK: AIE.wire(%[[VAL_31]] : Core, %[[VAL_244]] : Core) -// CHECK: AIE.wire(%[[VAL_31]] : DMA, %[[VAL_244]] : DMA) -// CHECK: AIE.wire(%[[VAL_243]] : North, %[[VAL_244]] : South) -// CHECK: AIE.wire(%[[VAL_239]] : East, %[[VAL_245:.*]] : West) -// CHECK: AIE.wire(%[[VAL_32]] : Core, %[[VAL_245]] : Core) -// CHECK: AIE.wire(%[[VAL_32]] : DMA, %[[VAL_245]] : DMA) -// CHECK: AIE.wire(%[[VAL_244]] : North, %[[VAL_245]] : South) -// CHECK: AIE.wire(%[[VAL_240]] : East, %[[VAL_246:.*]] : West) -// CHECK: AIE.wire(%[[VAL_33]] : Core, %[[VAL_246]] : Core) -// CHECK: AIE.wire(%[[VAL_33]] : DMA, %[[VAL_246]] : DMA) -// CHECK: AIE.wire(%[[VAL_245]] : North, %[[VAL_246]] : South) -// CHECK: AIE.wire(%[[VAL_34]] : Core, %[[VAL_247:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_34]] : DMA, %[[VAL_247]] : DMA) -// CHECK: AIE.wire(%[[VAL_246]] : North, %[[VAL_247]] : South) -// CHECK: AIE.wire(%[[VAL_242]] : East, %[[VAL_248:.*]] : West) -// CHECK: AIE.wire(%[[VAL_249:.*]] : North, %[[VAL_248]] : South) -// CHECK: AIE.wire(%[[VAL_3]] : DMA, %[[VAL_249]] : DMA) -// CHECK: AIE.wire(%[[VAL_243]] : East, %[[VAL_250:.*]] : West) -// CHECK: AIE.wire(%[[VAL_38]] : Core, %[[VAL_250]] : Core) -// CHECK: AIE.wire(%[[VAL_38]] : DMA, %[[VAL_250]] : DMA) -// CHECK: AIE.wire(%[[VAL_248]] : North, %[[VAL_250]] : South) -// CHECK: AIE.wire(%[[VAL_244]] : East, %[[VAL_251:.*]] : West) -// CHECK: AIE.wire(%[[VAL_39]] : Core, %[[VAL_251]] : Core) -// CHECK: AIE.wire(%[[VAL_39]] : DMA, %[[VAL_251]] : DMA) -// CHECK: AIE.wire(%[[VAL_250]] : North, %[[VAL_251]] : South) -// CHECK: AIE.wire(%[[VAL_245]] : East, %[[VAL_252:.*]] : West) -// CHECK: AIE.wire(%[[VAL_40]] : Core, %[[VAL_252]] : Core) -// CHECK: AIE.wire(%[[VAL_40]] : DMA, %[[VAL_252]] : DMA) -// CHECK: AIE.wire(%[[VAL_251]] : North, %[[VAL_252]] : South) -// CHECK: AIE.wire(%[[VAL_246]] : East, %[[VAL_253:.*]] : West) -// CHECK: AIE.wire(%[[VAL_41]] : Core, %[[VAL_253]] : Core) -// CHECK: AIE.wire(%[[VAL_41]] : DMA, %[[VAL_253]] : DMA) -// CHECK: AIE.wire(%[[VAL_252]] : North, %[[VAL_253]] : South) -// CHECK: AIE.wire(%[[VAL_247]] : East, %[[VAL_254:.*]] : West) -// CHECK: AIE.wire(%[[VAL_42]] : Core, %[[VAL_254]] : Core) -// CHECK: AIE.wire(%[[VAL_42]] : DMA, %[[VAL_254]] : DMA) -// CHECK: AIE.wire(%[[VAL_253]] : North, %[[VAL_254]] : South) -// CHECK: AIE.wire(%[[VAL_250]] : East, %[[VAL_255:.*]] : West) -// CHECK: AIE.wire(%[[VAL_46]] : Core, %[[VAL_255]] : Core) -// CHECK: AIE.wire(%[[VAL_46]] : DMA, %[[VAL_255]] : DMA) -// CHECK: AIE.wire(%[[VAL_251]] : East, %[[VAL_256:.*]] : West) -// CHECK: AIE.wire(%[[VAL_47]] : Core, %[[VAL_256]] : Core) -// CHECK: AIE.wire(%[[VAL_47]] : DMA, %[[VAL_256]] : DMA) -// CHECK: AIE.wire(%[[VAL_255]] : North, %[[VAL_256]] : South) -// CHECK: AIE.wire(%[[VAL_252]] : East, %[[VAL_257:.*]] : West) -// CHECK: AIE.wire(%[[VAL_48]] : Core, %[[VAL_257]] : Core) -// CHECK: AIE.wire(%[[VAL_48]] : DMA, %[[VAL_257]] : DMA) -// CHECK: AIE.wire(%[[VAL_256]] : North, %[[VAL_257]] : South) -// CHECK: AIE.wire(%[[VAL_253]] : East, %[[VAL_258:.*]] : West) -// CHECK: AIE.wire(%[[VAL_49]] : Core, %[[VAL_258]] : Core) -// CHECK: AIE.wire(%[[VAL_49]] : DMA, %[[VAL_258]] : DMA) -// CHECK: AIE.wire(%[[VAL_257]] : North, %[[VAL_258]] : South) -// CHECK: AIE.wire(%[[VAL_254]] : East, %[[VAL_259:.*]] : West) -// CHECK: AIE.wire(%[[VAL_50]] : Core, %[[VAL_259]] : Core) -// CHECK: AIE.wire(%[[VAL_50]] : DMA, %[[VAL_259]] : DMA) -// CHECK: AIE.wire(%[[VAL_258]] : North, %[[VAL_259]] : South) -// CHECK: AIE.wire(%[[VAL_51]] : Core, %[[VAL_260:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_51]] : DMA, %[[VAL_260]] : DMA) -// CHECK: AIE.wire(%[[VAL_259]] : North, %[[VAL_260]] : South) -// CHECK: AIE.wire(%[[VAL_255]] : East, %[[VAL_261:.*]] : West) -// CHECK: AIE.wire(%[[VAL_54]] : Core, %[[VAL_261]] : Core) -// CHECK: AIE.wire(%[[VAL_54]] : DMA, %[[VAL_261]] : DMA) -// CHECK: AIE.wire(%[[VAL_262:.*]] : North, %[[VAL_261]] : South) -// CHECK: AIE.wire(%[[VAL_256]] : East, %[[VAL_263:.*]] : West) -// CHECK: AIE.wire(%[[VAL_55]] : Core, %[[VAL_263]] : Core) -// CHECK: AIE.wire(%[[VAL_55]] : DMA, %[[VAL_263]] : DMA) -// CHECK: AIE.wire(%[[VAL_261]] : North, %[[VAL_263]] : South) -// CHECK: AIE.wire(%[[VAL_257]] : East, %[[VAL_264:.*]] : West) -// CHECK: AIE.wire(%[[VAL_56]] : Core, %[[VAL_264]] : Core) -// CHECK: AIE.wire(%[[VAL_56]] : DMA, %[[VAL_264]] : DMA) -// CHECK: AIE.wire(%[[VAL_263]] : North, %[[VAL_264]] : South) -// CHECK: AIE.wire(%[[VAL_258]] : East, %[[VAL_265:.*]] : West) -// CHECK: AIE.wire(%[[VAL_57]] : Core, %[[VAL_265]] : Core) -// CHECK: AIE.wire(%[[VAL_57]] : DMA, %[[VAL_265]] : DMA) -// CHECK: AIE.wire(%[[VAL_264]] : North, %[[VAL_265]] : South) -// CHECK: AIE.wire(%[[VAL_259]] : East, %[[VAL_266:.*]] : West) -// CHECK: AIE.wire(%[[VAL_58]] : Core, %[[VAL_266]] : Core) -// CHECK: AIE.wire(%[[VAL_58]] : DMA, %[[VAL_266]] : DMA) -// CHECK: AIE.wire(%[[VAL_265]] : North, %[[VAL_266]] : South) -// CHECK: AIE.wire(%[[VAL_260]] : East, %[[VAL_267:.*]] : West) -// CHECK: AIE.wire(%[[VAL_59]] : Core, %[[VAL_267]] : Core) -// CHECK: AIE.wire(%[[VAL_59]] : DMA, %[[VAL_267]] : DMA) -// CHECK: AIE.wire(%[[VAL_266]] : North, %[[VAL_267]] : South) -// CHECK: AIE.wire(%[[VAL_262]] : East, %[[VAL_268:.*]] : West) -// CHECK: AIE.wire(%[[VAL_269:.*]] : North, %[[VAL_268]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_269]] : DMA) -// CHECK: AIE.wire(%[[VAL_261]] : East, %[[VAL_270:.*]] : West) -// CHECK: AIE.wire(%[[VAL_62]] : Core, %[[VAL_270]] : Core) -// CHECK: AIE.wire(%[[VAL_62]] : DMA, %[[VAL_270]] : DMA) -// CHECK: AIE.wire(%[[VAL_268]] : North, %[[VAL_270]] : South) -// CHECK: AIE.wire(%[[VAL_263]] : East, %[[VAL_271:.*]] : West) -// CHECK: AIE.wire(%[[VAL_63]] : Core, %[[VAL_271]] : Core) -// CHECK: AIE.wire(%[[VAL_63]] : DMA, %[[VAL_271]] : DMA) -// CHECK: AIE.wire(%[[VAL_270]] : North, %[[VAL_271]] : South) -// CHECK: AIE.wire(%[[VAL_264]] : East, %[[VAL_272:.*]] : West) -// CHECK: AIE.wire(%[[VAL_64]] : Core, %[[VAL_272]] : Core) -// CHECK: AIE.wire(%[[VAL_64]] : DMA, %[[VAL_272]] : DMA) -// CHECK: AIE.wire(%[[VAL_271]] : North, %[[VAL_272]] : South) -// CHECK: AIE.wire(%[[VAL_265]] : East, %[[VAL_273:.*]] : West) -// CHECK: AIE.wire(%[[VAL_65]] : Core, %[[VAL_273]] : Core) -// CHECK: AIE.wire(%[[VAL_65]] : DMA, %[[VAL_273]] : DMA) -// CHECK: AIE.wire(%[[VAL_272]] : North, %[[VAL_273]] : South) -// CHECK: AIE.wire(%[[VAL_266]] : East, %[[VAL_274:.*]] : West) -// CHECK: AIE.wire(%[[VAL_66]] : Core, %[[VAL_274]] : Core) -// CHECK: AIE.wire(%[[VAL_66]] : DMA, %[[VAL_274]] : DMA) -// CHECK: AIE.wire(%[[VAL_273]] : North, %[[VAL_274]] : South) -// CHECK: AIE.wire(%[[VAL_267]] : East, %[[VAL_275:.*]] : West) -// CHECK: AIE.wire(%[[VAL_67]] : Core, %[[VAL_275]] : Core) -// CHECK: AIE.wire(%[[VAL_67]] : DMA, %[[VAL_275]] : DMA) -// CHECK: AIE.wire(%[[VAL_274]] : North, %[[VAL_275]] : South) -// CHECK: AIE.wire(%[[VAL_270]] : East, %[[VAL_276:.*]] : West) -// CHECK: AIE.wire(%[[VAL_70]] : Core, %[[VAL_276]] : Core) -// CHECK: AIE.wire(%[[VAL_70]] : DMA, %[[VAL_276]] : DMA) -// CHECK: AIE.wire(%[[VAL_271]] : East, %[[VAL_277:.*]] : West) -// CHECK: AIE.wire(%[[VAL_71]] : Core, %[[VAL_277]] : Core) -// CHECK: AIE.wire(%[[VAL_71]] : DMA, %[[VAL_277]] : DMA) -// CHECK: AIE.wire(%[[VAL_276]] : North, %[[VAL_277]] : South) -// CHECK: AIE.wire(%[[VAL_272]] : East, %[[VAL_278:.*]] : West) -// CHECK: AIE.wire(%[[VAL_72]] : Core, %[[VAL_278]] : Core) -// CHECK: AIE.wire(%[[VAL_72]] : DMA, %[[VAL_278]] : DMA) -// CHECK: AIE.wire(%[[VAL_277]] : North, %[[VAL_278]] : South) -// CHECK: AIE.wire(%[[VAL_273]] : East, %[[VAL_279:.*]] : West) -// CHECK: AIE.wire(%[[VAL_73]] : Core, %[[VAL_279]] : Core) -// CHECK: AIE.wire(%[[VAL_73]] : DMA, %[[VAL_279]] : DMA) -// CHECK: AIE.wire(%[[VAL_278]] : North, %[[VAL_279]] : South) -// CHECK: AIE.wire(%[[VAL_274]] : East, %[[VAL_280:.*]] : West) -// CHECK: AIE.wire(%[[VAL_74]] : Core, %[[VAL_280]] : Core) -// CHECK: AIE.wire(%[[VAL_74]] : DMA, %[[VAL_280]] : DMA) -// CHECK: AIE.wire(%[[VAL_279]] : North, %[[VAL_280]] : South) -// CHECK: AIE.wire(%[[VAL_275]] : East, %[[VAL_281:.*]] : West) -// CHECK: AIE.wire(%[[VAL_75]] : Core, %[[VAL_281]] : Core) -// CHECK: AIE.wire(%[[VAL_75]] : DMA, %[[VAL_281]] : DMA) -// CHECK: AIE.wire(%[[VAL_280]] : North, %[[VAL_281]] : South) -// CHECK: AIE.wire(%[[VAL_276]] : East, %[[VAL_282:.*]] : West) -// CHECK: AIE.wire(%[[VAL_78]] : Core, %[[VAL_282]] : Core) -// CHECK: AIE.wire(%[[VAL_78]] : DMA, %[[VAL_282]] : DMA) -// CHECK: AIE.wire(%[[VAL_277]] : East, %[[VAL_283:.*]] : West) -// CHECK: AIE.wire(%[[VAL_79]] : Core, %[[VAL_283]] : Core) -// CHECK: AIE.wire(%[[VAL_79]] : DMA, %[[VAL_283]] : DMA) -// CHECK: AIE.wire(%[[VAL_282]] : North, %[[VAL_283]] : South) -// CHECK: AIE.wire(%[[VAL_278]] : East, %[[VAL_284:.*]] : West) -// CHECK: AIE.wire(%[[VAL_80]] : Core, %[[VAL_284]] : Core) -// CHECK: AIE.wire(%[[VAL_80]] : DMA, %[[VAL_284]] : DMA) -// CHECK: AIE.wire(%[[VAL_283]] : North, %[[VAL_284]] : South) -// CHECK: AIE.wire(%[[VAL_279]] : East, %[[VAL_285:.*]] : West) -// CHECK: AIE.wire(%[[VAL_81]] : Core, %[[VAL_285]] : Core) -// CHECK: AIE.wire(%[[VAL_81]] : DMA, %[[VAL_285]] : DMA) -// CHECK: AIE.wire(%[[VAL_284]] : North, %[[VAL_285]] : South) -// CHECK: AIE.wire(%[[VAL_282]] : East, %[[VAL_286:.*]] : West) -// CHECK: AIE.wire(%[[VAL_86]] : Core, %[[VAL_286]] : Core) -// CHECK: AIE.wire(%[[VAL_86]] : DMA, %[[VAL_286]] : DMA) -// CHECK: AIE.wire(%[[VAL_283]] : East, %[[VAL_287:.*]] : West) -// CHECK: AIE.wire(%[[VAL_87]] : Core, %[[VAL_287]] : Core) -// CHECK: AIE.wire(%[[VAL_87]] : DMA, %[[VAL_287]] : DMA) -// CHECK: AIE.wire(%[[VAL_286]] : North, %[[VAL_287]] : South) -// CHECK: AIE.wire(%[[VAL_284]] : East, %[[VAL_288:.*]] : West) -// CHECK: AIE.wire(%[[VAL_88]] : Core, %[[VAL_288]] : Core) -// CHECK: AIE.wire(%[[VAL_88]] : DMA, %[[VAL_288]] : DMA) -// CHECK: AIE.wire(%[[VAL_287]] : North, %[[VAL_288]] : South) -// CHECK: AIE.wire(%[[VAL_285]] : East, %[[VAL_289:.*]] : West) -// CHECK: AIE.wire(%[[VAL_89]] : Core, %[[VAL_289]] : Core) -// CHECK: AIE.wire(%[[VAL_89]] : DMA, %[[VAL_289]] : DMA) -// CHECK: AIE.wire(%[[VAL_288]] : North, %[[VAL_289]] : South) -// CHECK: AIE.wire(%[[VAL_290:.*]] : North, %[[VAL_291:.*]] : South) -// CHECK: AIE.wire(%[[VAL_10]] : DMA, %[[VAL_290]] : DMA) -// CHECK: AIE.wire(%[[VAL_286]] : East, %[[VAL_292:.*]] : West) -// CHECK: AIE.wire(%[[VAL_94]] : Core, %[[VAL_292]] : Core) -// CHECK: AIE.wire(%[[VAL_94]] : DMA, %[[VAL_292]] : DMA) -// CHECK: AIE.wire(%[[VAL_291]] : North, %[[VAL_292]] : South) -// CHECK: AIE.wire(%[[VAL_287]] : East, %[[VAL_293:.*]] : West) -// CHECK: AIE.wire(%[[VAL_95]] : Core, %[[VAL_293]] : Core) -// CHECK: AIE.wire(%[[VAL_95]] : DMA, %[[VAL_293]] : DMA) -// CHECK: AIE.wire(%[[VAL_292]] : North, %[[VAL_293]] : South) -// CHECK: AIE.wire(%[[VAL_288]] : East, %[[VAL_294:.*]] : West) -// CHECK: AIE.wire(%[[VAL_96]] : Core, %[[VAL_294]] : Core) -// CHECK: AIE.wire(%[[VAL_96]] : DMA, %[[VAL_294]] : DMA) -// CHECK: AIE.wire(%[[VAL_293]] : North, %[[VAL_294]] : South) -// CHECK: AIE.wire(%[[VAL_289]] : East, %[[VAL_295:.*]] : West) -// CHECK: AIE.wire(%[[VAL_97]] : Core, %[[VAL_295]] : Core) -// CHECK: AIE.wire(%[[VAL_97]] : DMA, %[[VAL_295]] : DMA) -// CHECK: AIE.wire(%[[VAL_294]] : North, %[[VAL_295]] : South) -// CHECK: AIE.wire(%[[VAL_291]] : East, %[[VAL_296:.*]] : West) -// CHECK: AIE.wire(%[[VAL_297:.*]] : North, %[[VAL_296]] : South) -// CHECK: AIE.wire(%[[VAL_11]] : DMA, %[[VAL_297]] : DMA) -// CHECK: AIE.wire(%[[VAL_292]] : East, %[[VAL_298:.*]] : West) -// CHECK: AIE.wire(%[[VAL_102]] : Core, %[[VAL_298]] : Core) -// CHECK: AIE.wire(%[[VAL_102]] : DMA, %[[VAL_298]] : DMA) -// CHECK: AIE.wire(%[[VAL_296]] : North, %[[VAL_298]] : South) -// CHECK: AIE.wire(%[[VAL_293]] : East, %[[VAL_299:.*]] : West) -// CHECK: AIE.wire(%[[VAL_103]] : Core, %[[VAL_299]] : Core) -// CHECK: AIE.wire(%[[VAL_103]] : DMA, %[[VAL_299]] : DMA) -// CHECK: AIE.wire(%[[VAL_298]] : North, %[[VAL_299]] : South) -// CHECK: AIE.wire(%[[VAL_294]] : East, %[[VAL_300:.*]] : West) -// CHECK: AIE.wire(%[[VAL_104]] : Core, %[[VAL_300]] : Core) -// CHECK: AIE.wire(%[[VAL_104]] : DMA, %[[VAL_300]] : DMA) -// CHECK: AIE.wire(%[[VAL_299]] : North, %[[VAL_300]] : South) -// CHECK: AIE.wire(%[[VAL_295]] : East, %[[VAL_301:.*]] : West) -// CHECK: AIE.wire(%[[VAL_105]] : Core, %[[VAL_301]] : Core) -// CHECK: AIE.wire(%[[VAL_105]] : DMA, %[[VAL_301]] : DMA) -// CHECK: AIE.wire(%[[VAL_300]] : North, %[[VAL_301]] : South) -// CHECK: AIE.wire(%[[VAL_296]] : East, %[[VAL_302:.*]] : West) -// CHECK: AIE.wire(%[[VAL_298]] : East, %[[VAL_303:.*]] : West) -// CHECK: AIE.wire(%[[VAL_110]] : Core, %[[VAL_303]] : Core) -// CHECK: AIE.wire(%[[VAL_110]] : DMA, %[[VAL_303]] : DMA) -// CHECK: AIE.wire(%[[VAL_302]] : North, %[[VAL_303]] : South) -// CHECK: AIE.wire(%[[VAL_299]] : East, %[[VAL_304:.*]] : West) -// CHECK: AIE.wire(%[[VAL_111]] : Core, %[[VAL_304]] : Core) -// CHECK: AIE.wire(%[[VAL_111]] : DMA, %[[VAL_304]] : DMA) -// CHECK: AIE.wire(%[[VAL_303]] : North, %[[VAL_304]] : South) -// CHECK: AIE.wire(%[[VAL_300]] : East, %[[VAL_305:.*]] : West) -// CHECK: AIE.wire(%[[VAL_112]] : Core, %[[VAL_305]] : Core) -// CHECK: AIE.wire(%[[VAL_112]] : DMA, %[[VAL_305]] : DMA) -// CHECK: AIE.wire(%[[VAL_304]] : North, %[[VAL_305]] : South) -// CHECK: AIE.wire(%[[VAL_301]] : East, %[[VAL_306:.*]] : West) -// CHECK: AIE.wire(%[[VAL_113]] : Core, %[[VAL_306]] : Core) -// CHECK: AIE.wire(%[[VAL_113]] : DMA, %[[VAL_306]] : DMA) -// CHECK: AIE.wire(%[[VAL_305]] : North, %[[VAL_306]] : South) -// CHECK: AIE.wire(%[[VAL_114]] : Core, %[[VAL_307:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_114]] : DMA, %[[VAL_307]] : DMA) -// CHECK: AIE.wire(%[[VAL_306]] : North, %[[VAL_307]] : South) -// CHECK: AIE.wire(%[[VAL_302]] : East, %[[VAL_308:.*]] : West) -// CHECK: AIE.wire(%[[VAL_303]] : East, %[[VAL_309:.*]] : West) -// CHECK: AIE.wire(%[[VAL_119]] : Core, %[[VAL_309]] : Core) -// CHECK: AIE.wire(%[[VAL_119]] : DMA, %[[VAL_309]] : DMA) -// CHECK: AIE.wire(%[[VAL_308]] : North, %[[VAL_309]] : South) -// CHECK: AIE.wire(%[[VAL_304]] : East, %[[VAL_310:.*]] : West) -// CHECK: AIE.wire(%[[VAL_120]] : Core, %[[VAL_310]] : Core) -// CHECK: AIE.wire(%[[VAL_120]] : DMA, %[[VAL_310]] : DMA) -// CHECK: AIE.wire(%[[VAL_309]] : North, %[[VAL_310]] : South) -// CHECK: AIE.wire(%[[VAL_305]] : East, %[[VAL_311:.*]] : West) -// CHECK: AIE.wire(%[[VAL_121]] : Core, %[[VAL_311]] : Core) -// CHECK: AIE.wire(%[[VAL_121]] : DMA, %[[VAL_311]] : DMA) -// CHECK: AIE.wire(%[[VAL_310]] : North, %[[VAL_311]] : South) -// CHECK: AIE.wire(%[[VAL_306]] : East, %[[VAL_312:.*]] : West) -// CHECK: AIE.wire(%[[VAL_122]] : Core, %[[VAL_312]] : Core) -// CHECK: AIE.wire(%[[VAL_122]] : DMA, %[[VAL_312]] : DMA) -// CHECK: AIE.wire(%[[VAL_311]] : North, %[[VAL_312]] : South) -// CHECK: AIE.wire(%[[VAL_307]] : East, %[[VAL_313:.*]] : West) -// CHECK: AIE.wire(%[[VAL_123]] : Core, %[[VAL_313]] : Core) -// CHECK: AIE.wire(%[[VAL_123]] : DMA, %[[VAL_313]] : DMA) -// CHECK: AIE.wire(%[[VAL_312]] : North, %[[VAL_313]] : South) -// CHECK: AIE.wire(%[[VAL_310]] : East, %[[VAL_314:.*]] : West) -// CHECK: AIE.wire(%[[VAL_128]] : Core, %[[VAL_314]] : Core) -// CHECK: AIE.wire(%[[VAL_128]] : DMA, %[[VAL_314]] : DMA) -// CHECK: AIE.wire(%[[VAL_311]] : East, %[[VAL_315:.*]] : West) -// CHECK: AIE.wire(%[[VAL_129]] : Core, %[[VAL_315]] : Core) -// CHECK: AIE.wire(%[[VAL_129]] : DMA, %[[VAL_315]] : DMA) -// CHECK: AIE.wire(%[[VAL_314]] : North, %[[VAL_315]] : South) -// CHECK: AIE.wire(%[[VAL_312]] : East, %[[VAL_316:.*]] : West) -// CHECK: AIE.wire(%[[VAL_130]] : Core, %[[VAL_316]] : Core) -// CHECK: AIE.wire(%[[VAL_130]] : DMA, %[[VAL_316]] : DMA) -// CHECK: AIE.wire(%[[VAL_315]] : North, %[[VAL_316]] : South) -// CHECK: AIE.wire(%[[VAL_313]] : East, %[[VAL_317:.*]] : West) -// CHECK: AIE.wire(%[[VAL_131]] : Core, %[[VAL_317]] : Core) -// CHECK: AIE.wire(%[[VAL_131]] : DMA, %[[VAL_317]] : DMA) -// CHECK: AIE.wire(%[[VAL_316]] : North, %[[VAL_317]] : South) -// CHECK: AIE.wire(%[[VAL_314]] : East, %[[VAL_318:.*]] : West) -// CHECK: AIE.wire(%[[VAL_221]] : Core, %[[VAL_318]] : Core) -// CHECK: AIE.wire(%[[VAL_221]] : DMA, %[[VAL_318]] : DMA) -// CHECK: AIE.wire(%[[VAL_318]] : East, %[[VAL_319:.*]] : West) -// CHECK: AIE.wire(%[[VAL_223]] : Core, %[[VAL_319]] : Core) -// CHECK: AIE.wire(%[[VAL_223]] : DMA, %[[VAL_319]] : DMA) -// CHECK: AIE.wire(%[[VAL_227]] : Core, %[[VAL_320:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_227]] : DMA, %[[VAL_320]] : DMA) -// CHECK: AIE.wire(%[[VAL_321:.*]] : North, %[[VAL_320]] : South) -// CHECK: AIE.wire(%[[VAL_319]] : East, %[[VAL_322:.*]] : West) -// CHECK: AIE.wire(%[[VAL_229]] : Core, %[[VAL_322]] : Core) -// CHECK: AIE.wire(%[[VAL_229]] : DMA, %[[VAL_322]] : DMA) -// CHECK: AIE.wire(%[[VAL_320]] : North, %[[VAL_322]] : South) -// CHECK: AIE.wire(%[[VAL_321]] : East, %[[VAL_323:.*]] : West) -// CHECK: AIE.wire(%[[VAL_324:.*]] : North, %[[VAL_323]] : South) -// CHECK: AIE.wire(%[[VAL_12]] : DMA, %[[VAL_324]] : DMA) +// CHECK: %[[VAL_214:.*]] = aie.tile(12, 0) +// CHECK: %[[VAL_215:.*]] = aie.switchbox(%[[VAL_214]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_216:.*]] = aie.switchbox(%[[VAL_118]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_217:.*]] = aie.switchbox(%[[VAL_128]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_218:.*]] = aie.switchbox(%[[VAL_129]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_219:.*]] = aie.switchbox(%[[VAL_130]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_220:.*]] = aie.switchbox(%[[VAL_131]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_221:.*]] = aie.tile(15, 2) +// CHECK: %[[VAL_222:.*]] = aie.switchbox(%[[VAL_221]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_223:.*]] = aie.tile(16, 2) +// CHECK: %[[VAL_224:.*]] = aie.switchbox(%[[VAL_223]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_225:.*]] = aie.tile(17, 0) +// CHECK: %[[VAL_226:.*]] = aie.switchbox(%[[VAL_225]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_227:.*]] = aie.tile(17, 1) +// CHECK: %[[VAL_228:.*]] = aie.switchbox(%[[VAL_227]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_229:.*]] = aie.tile(17, 2) +// CHECK: %[[VAL_230:.*]] = aie.switchbox(%[[VAL_229]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_231:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_232:.*]] = aie.shim_mux(%[[VAL_12]]) { +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_14]] : Core, %[[VAL_233:.*]] : Core) +// CHECK: aie.wire(%[[VAL_14]] : DMA, %[[VAL_233]] : DMA) +// CHECK: aie.wire(%[[VAL_15]] : Core, %[[VAL_234:.*]] : Core) +// CHECK: aie.wire(%[[VAL_15]] : DMA, %[[VAL_234]] : DMA) +// CHECK: aie.wire(%[[VAL_233]] : North, %[[VAL_234]] : South) +// CHECK: aie.wire(%[[VAL_16]] : Core, %[[VAL_235:.*]] : Core) +// CHECK: aie.wire(%[[VAL_16]] : DMA, %[[VAL_235]] : DMA) +// CHECK: aie.wire(%[[VAL_234]] : North, %[[VAL_235]] : South) +// CHECK: aie.wire(%[[VAL_17]] : Core, %[[VAL_236:.*]] : Core) +// CHECK: aie.wire(%[[VAL_17]] : DMA, %[[VAL_236]] : DMA) +// CHECK: aie.wire(%[[VAL_235]] : North, %[[VAL_236]] : South) +// CHECK: aie.wire(%[[VAL_233]] : East, %[[VAL_237:.*]] : West) +// CHECK: aie.wire(%[[VAL_22]] : Core, %[[VAL_237]] : Core) +// CHECK: aie.wire(%[[VAL_22]] : DMA, %[[VAL_237]] : DMA) +// CHECK: aie.wire(%[[VAL_234]] : East, %[[VAL_238:.*]] : West) +// CHECK: aie.wire(%[[VAL_23]] : Core, %[[VAL_238]] : Core) +// CHECK: aie.wire(%[[VAL_23]] : DMA, %[[VAL_238]] : DMA) +// CHECK: aie.wire(%[[VAL_237]] : North, %[[VAL_238]] : South) +// CHECK: aie.wire(%[[VAL_235]] : East, %[[VAL_239:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_239]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_239]] : DMA) +// CHECK: aie.wire(%[[VAL_238]] : North, %[[VAL_239]] : South) +// CHECK: aie.wire(%[[VAL_236]] : East, %[[VAL_240:.*]] : West) +// CHECK: aie.wire(%[[VAL_25]] : Core, %[[VAL_240]] : Core) +// CHECK: aie.wire(%[[VAL_25]] : DMA, %[[VAL_240]] : DMA) +// CHECK: aie.wire(%[[VAL_239]] : North, %[[VAL_240]] : South) +// CHECK: aie.wire(%[[VAL_241:.*]] : North, %[[VAL_242:.*]] : South) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_241]] : DMA) +// CHECK: aie.wire(%[[VAL_237]] : East, %[[VAL_243:.*]] : West) +// CHECK: aie.wire(%[[VAL_30]] : Core, %[[VAL_243]] : Core) +// CHECK: aie.wire(%[[VAL_30]] : DMA, %[[VAL_243]] : DMA) +// CHECK: aie.wire(%[[VAL_242]] : North, %[[VAL_243]] : South) +// CHECK: aie.wire(%[[VAL_238]] : East, %[[VAL_244:.*]] : West) +// CHECK: aie.wire(%[[VAL_31]] : Core, %[[VAL_244]] : Core) +// CHECK: aie.wire(%[[VAL_31]] : DMA, %[[VAL_244]] : DMA) +// CHECK: aie.wire(%[[VAL_243]] : North, %[[VAL_244]] : South) +// CHECK: aie.wire(%[[VAL_239]] : East, %[[VAL_245:.*]] : West) +// CHECK: aie.wire(%[[VAL_32]] : Core, %[[VAL_245]] : Core) +// CHECK: aie.wire(%[[VAL_32]] : DMA, %[[VAL_245]] : DMA) +// CHECK: aie.wire(%[[VAL_244]] : North, %[[VAL_245]] : South) +// CHECK: aie.wire(%[[VAL_240]] : East, %[[VAL_246:.*]] : West) +// CHECK: aie.wire(%[[VAL_33]] : Core, %[[VAL_246]] : Core) +// CHECK: aie.wire(%[[VAL_33]] : DMA, %[[VAL_246]] : DMA) +// CHECK: aie.wire(%[[VAL_245]] : North, %[[VAL_246]] : South) +// CHECK: aie.wire(%[[VAL_34]] : Core, %[[VAL_247:.*]] : Core) +// CHECK: aie.wire(%[[VAL_34]] : DMA, %[[VAL_247]] : DMA) +// CHECK: aie.wire(%[[VAL_246]] : North, %[[VAL_247]] : South) +// CHECK: aie.wire(%[[VAL_242]] : East, %[[VAL_248:.*]] : West) +// CHECK: aie.wire(%[[VAL_249:.*]] : North, %[[VAL_248]] : South) +// CHECK: aie.wire(%[[VAL_3]] : DMA, %[[VAL_249]] : DMA) +// CHECK: aie.wire(%[[VAL_243]] : East, %[[VAL_250:.*]] : West) +// CHECK: aie.wire(%[[VAL_38]] : Core, %[[VAL_250]] : Core) +// CHECK: aie.wire(%[[VAL_38]] : DMA, %[[VAL_250]] : DMA) +// CHECK: aie.wire(%[[VAL_248]] : North, %[[VAL_250]] : South) +// CHECK: aie.wire(%[[VAL_244]] : East, %[[VAL_251:.*]] : West) +// CHECK: aie.wire(%[[VAL_39]] : Core, %[[VAL_251]] : Core) +// CHECK: aie.wire(%[[VAL_39]] : DMA, %[[VAL_251]] : DMA) +// CHECK: aie.wire(%[[VAL_250]] : North, %[[VAL_251]] : South) +// CHECK: aie.wire(%[[VAL_245]] : East, %[[VAL_252:.*]] : West) +// CHECK: aie.wire(%[[VAL_40]] : Core, %[[VAL_252]] : Core) +// CHECK: aie.wire(%[[VAL_40]] : DMA, %[[VAL_252]] : DMA) +// CHECK: aie.wire(%[[VAL_251]] : North, %[[VAL_252]] : South) +// CHECK: aie.wire(%[[VAL_246]] : East, %[[VAL_253:.*]] : West) +// CHECK: aie.wire(%[[VAL_41]] : Core, %[[VAL_253]] : Core) +// CHECK: aie.wire(%[[VAL_41]] : DMA, %[[VAL_253]] : DMA) +// CHECK: aie.wire(%[[VAL_252]] : North, %[[VAL_253]] : South) +// CHECK: aie.wire(%[[VAL_247]] : East, %[[VAL_254:.*]] : West) +// CHECK: aie.wire(%[[VAL_42]] : Core, %[[VAL_254]] : Core) +// CHECK: aie.wire(%[[VAL_42]] : DMA, %[[VAL_254]] : DMA) +// CHECK: aie.wire(%[[VAL_253]] : North, %[[VAL_254]] : South) +// CHECK: aie.wire(%[[VAL_250]] : East, %[[VAL_255:.*]] : West) +// CHECK: aie.wire(%[[VAL_46]] : Core, %[[VAL_255]] : Core) +// CHECK: aie.wire(%[[VAL_46]] : DMA, %[[VAL_255]] : DMA) +// CHECK: aie.wire(%[[VAL_251]] : East, %[[VAL_256:.*]] : West) +// CHECK: aie.wire(%[[VAL_47]] : Core, %[[VAL_256]] : Core) +// CHECK: aie.wire(%[[VAL_47]] : DMA, %[[VAL_256]] : DMA) +// CHECK: aie.wire(%[[VAL_255]] : North, %[[VAL_256]] : South) +// CHECK: aie.wire(%[[VAL_252]] : East, %[[VAL_257:.*]] : West) +// CHECK: aie.wire(%[[VAL_48]] : Core, %[[VAL_257]] : Core) +// CHECK: aie.wire(%[[VAL_48]] : DMA, %[[VAL_257]] : DMA) +// CHECK: aie.wire(%[[VAL_256]] : North, %[[VAL_257]] : South) +// CHECK: aie.wire(%[[VAL_253]] : East, %[[VAL_258:.*]] : West) +// CHECK: aie.wire(%[[VAL_49]] : Core, %[[VAL_258]] : Core) +// CHECK: aie.wire(%[[VAL_49]] : DMA, %[[VAL_258]] : DMA) +// CHECK: aie.wire(%[[VAL_257]] : North, %[[VAL_258]] : South) +// CHECK: aie.wire(%[[VAL_254]] : East, %[[VAL_259:.*]] : West) +// CHECK: aie.wire(%[[VAL_50]] : Core, %[[VAL_259]] : Core) +// CHECK: aie.wire(%[[VAL_50]] : DMA, %[[VAL_259]] : DMA) +// CHECK: aie.wire(%[[VAL_258]] : North, %[[VAL_259]] : South) +// CHECK: aie.wire(%[[VAL_51]] : Core, %[[VAL_260:.*]] : Core) +// CHECK: aie.wire(%[[VAL_51]] : DMA, %[[VAL_260]] : DMA) +// CHECK: aie.wire(%[[VAL_259]] : North, %[[VAL_260]] : South) +// CHECK: aie.wire(%[[VAL_255]] : East, %[[VAL_261:.*]] : West) +// CHECK: aie.wire(%[[VAL_54]] : Core, %[[VAL_261]] : Core) +// CHECK: aie.wire(%[[VAL_54]] : DMA, %[[VAL_261]] : DMA) +// CHECK: aie.wire(%[[VAL_262:.*]] : North, %[[VAL_261]] : South) +// CHECK: aie.wire(%[[VAL_256]] : East, %[[VAL_263:.*]] : West) +// CHECK: aie.wire(%[[VAL_55]] : Core, %[[VAL_263]] : Core) +// CHECK: aie.wire(%[[VAL_55]] : DMA, %[[VAL_263]] : DMA) +// CHECK: aie.wire(%[[VAL_261]] : North, %[[VAL_263]] : South) +// CHECK: aie.wire(%[[VAL_257]] : East, %[[VAL_264:.*]] : West) +// CHECK: aie.wire(%[[VAL_56]] : Core, %[[VAL_264]] : Core) +// CHECK: aie.wire(%[[VAL_56]] : DMA, %[[VAL_264]] : DMA) +// CHECK: aie.wire(%[[VAL_263]] : North, %[[VAL_264]] : South) +// CHECK: aie.wire(%[[VAL_258]] : East, %[[VAL_265:.*]] : West) +// CHECK: aie.wire(%[[VAL_57]] : Core, %[[VAL_265]] : Core) +// CHECK: aie.wire(%[[VAL_57]] : DMA, %[[VAL_265]] : DMA) +// CHECK: aie.wire(%[[VAL_264]] : North, %[[VAL_265]] : South) +// CHECK: aie.wire(%[[VAL_259]] : East, %[[VAL_266:.*]] : West) +// CHECK: aie.wire(%[[VAL_58]] : Core, %[[VAL_266]] : Core) +// CHECK: aie.wire(%[[VAL_58]] : DMA, %[[VAL_266]] : DMA) +// CHECK: aie.wire(%[[VAL_265]] : North, %[[VAL_266]] : South) +// CHECK: aie.wire(%[[VAL_260]] : East, %[[VAL_267:.*]] : West) +// CHECK: aie.wire(%[[VAL_59]] : Core, %[[VAL_267]] : Core) +// CHECK: aie.wire(%[[VAL_59]] : DMA, %[[VAL_267]] : DMA) +// CHECK: aie.wire(%[[VAL_266]] : North, %[[VAL_267]] : South) +// CHECK: aie.wire(%[[VAL_262]] : East, %[[VAL_268:.*]] : West) +// CHECK: aie.wire(%[[VAL_269:.*]] : North, %[[VAL_268]] : South) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_269]] : DMA) +// CHECK: aie.wire(%[[VAL_261]] : East, %[[VAL_270:.*]] : West) +// CHECK: aie.wire(%[[VAL_62]] : Core, %[[VAL_270]] : Core) +// CHECK: aie.wire(%[[VAL_62]] : DMA, %[[VAL_270]] : DMA) +// CHECK: aie.wire(%[[VAL_268]] : North, %[[VAL_270]] : South) +// CHECK: aie.wire(%[[VAL_263]] : East, %[[VAL_271:.*]] : West) +// CHECK: aie.wire(%[[VAL_63]] : Core, %[[VAL_271]] : Core) +// CHECK: aie.wire(%[[VAL_63]] : DMA, %[[VAL_271]] : DMA) +// CHECK: aie.wire(%[[VAL_270]] : North, %[[VAL_271]] : South) +// CHECK: aie.wire(%[[VAL_264]] : East, %[[VAL_272:.*]] : West) +// CHECK: aie.wire(%[[VAL_64]] : Core, %[[VAL_272]] : Core) +// CHECK: aie.wire(%[[VAL_64]] : DMA, %[[VAL_272]] : DMA) +// CHECK: aie.wire(%[[VAL_271]] : North, %[[VAL_272]] : South) +// CHECK: aie.wire(%[[VAL_265]] : East, %[[VAL_273:.*]] : West) +// CHECK: aie.wire(%[[VAL_65]] : Core, %[[VAL_273]] : Core) +// CHECK: aie.wire(%[[VAL_65]] : DMA, %[[VAL_273]] : DMA) +// CHECK: aie.wire(%[[VAL_272]] : North, %[[VAL_273]] : South) +// CHECK: aie.wire(%[[VAL_266]] : East, %[[VAL_274:.*]] : West) +// CHECK: aie.wire(%[[VAL_66]] : Core, %[[VAL_274]] : Core) +// CHECK: aie.wire(%[[VAL_66]] : DMA, %[[VAL_274]] : DMA) +// CHECK: aie.wire(%[[VAL_273]] : North, %[[VAL_274]] : South) +// CHECK: aie.wire(%[[VAL_267]] : East, %[[VAL_275:.*]] : West) +// CHECK: aie.wire(%[[VAL_67]] : Core, %[[VAL_275]] : Core) +// CHECK: aie.wire(%[[VAL_67]] : DMA, %[[VAL_275]] : DMA) +// CHECK: aie.wire(%[[VAL_274]] : North, %[[VAL_275]] : South) +// CHECK: aie.wire(%[[VAL_270]] : East, %[[VAL_276:.*]] : West) +// CHECK: aie.wire(%[[VAL_70]] : Core, %[[VAL_276]] : Core) +// CHECK: aie.wire(%[[VAL_70]] : DMA, %[[VAL_276]] : DMA) +// CHECK: aie.wire(%[[VAL_271]] : East, %[[VAL_277:.*]] : West) +// CHECK: aie.wire(%[[VAL_71]] : Core, %[[VAL_277]] : Core) +// CHECK: aie.wire(%[[VAL_71]] : DMA, %[[VAL_277]] : DMA) +// CHECK: aie.wire(%[[VAL_276]] : North, %[[VAL_277]] : South) +// CHECK: aie.wire(%[[VAL_272]] : East, %[[VAL_278:.*]] : West) +// CHECK: aie.wire(%[[VAL_72]] : Core, %[[VAL_278]] : Core) +// CHECK: aie.wire(%[[VAL_72]] : DMA, %[[VAL_278]] : DMA) +// CHECK: aie.wire(%[[VAL_277]] : North, %[[VAL_278]] : South) +// CHECK: aie.wire(%[[VAL_273]] : East, %[[VAL_279:.*]] : West) +// CHECK: aie.wire(%[[VAL_73]] : Core, %[[VAL_279]] : Core) +// CHECK: aie.wire(%[[VAL_73]] : DMA, %[[VAL_279]] : DMA) +// CHECK: aie.wire(%[[VAL_278]] : North, %[[VAL_279]] : South) +// CHECK: aie.wire(%[[VAL_274]] : East, %[[VAL_280:.*]] : West) +// CHECK: aie.wire(%[[VAL_74]] : Core, %[[VAL_280]] : Core) +// CHECK: aie.wire(%[[VAL_74]] : DMA, %[[VAL_280]] : DMA) +// CHECK: aie.wire(%[[VAL_279]] : North, %[[VAL_280]] : South) +// CHECK: aie.wire(%[[VAL_275]] : East, %[[VAL_281:.*]] : West) +// CHECK: aie.wire(%[[VAL_75]] : Core, %[[VAL_281]] : Core) +// CHECK: aie.wire(%[[VAL_75]] : DMA, %[[VAL_281]] : DMA) +// CHECK: aie.wire(%[[VAL_280]] : North, %[[VAL_281]] : South) +// CHECK: aie.wire(%[[VAL_276]] : East, %[[VAL_282:.*]] : West) +// CHECK: aie.wire(%[[VAL_78]] : Core, %[[VAL_282]] : Core) +// CHECK: aie.wire(%[[VAL_78]] : DMA, %[[VAL_282]] : DMA) +// CHECK: aie.wire(%[[VAL_277]] : East, %[[VAL_283:.*]] : West) +// CHECK: aie.wire(%[[VAL_79]] : Core, %[[VAL_283]] : Core) +// CHECK: aie.wire(%[[VAL_79]] : DMA, %[[VAL_283]] : DMA) +// CHECK: aie.wire(%[[VAL_282]] : North, %[[VAL_283]] : South) +// CHECK: aie.wire(%[[VAL_278]] : East, %[[VAL_284:.*]] : West) +// CHECK: aie.wire(%[[VAL_80]] : Core, %[[VAL_284]] : Core) +// CHECK: aie.wire(%[[VAL_80]] : DMA, %[[VAL_284]] : DMA) +// CHECK: aie.wire(%[[VAL_283]] : North, %[[VAL_284]] : South) +// CHECK: aie.wire(%[[VAL_279]] : East, %[[VAL_285:.*]] : West) +// CHECK: aie.wire(%[[VAL_81]] : Core, %[[VAL_285]] : Core) +// CHECK: aie.wire(%[[VAL_81]] : DMA, %[[VAL_285]] : DMA) +// CHECK: aie.wire(%[[VAL_284]] : North, %[[VAL_285]] : South) +// CHECK: aie.wire(%[[VAL_282]] : East, %[[VAL_286:.*]] : West) +// CHECK: aie.wire(%[[VAL_86]] : Core, %[[VAL_286]] : Core) +// CHECK: aie.wire(%[[VAL_86]] : DMA, %[[VAL_286]] : DMA) +// CHECK: aie.wire(%[[VAL_283]] : East, %[[VAL_287:.*]] : West) +// CHECK: aie.wire(%[[VAL_87]] : Core, %[[VAL_287]] : Core) +// CHECK: aie.wire(%[[VAL_87]] : DMA, %[[VAL_287]] : DMA) +// CHECK: aie.wire(%[[VAL_286]] : North, %[[VAL_287]] : South) +// CHECK: aie.wire(%[[VAL_284]] : East, %[[VAL_288:.*]] : West) +// CHECK: aie.wire(%[[VAL_88]] : Core, %[[VAL_288]] : Core) +// CHECK: aie.wire(%[[VAL_88]] : DMA, %[[VAL_288]] : DMA) +// CHECK: aie.wire(%[[VAL_287]] : North, %[[VAL_288]] : South) +// CHECK: aie.wire(%[[VAL_285]] : East, %[[VAL_289:.*]] : West) +// CHECK: aie.wire(%[[VAL_89]] : Core, %[[VAL_289]] : Core) +// CHECK: aie.wire(%[[VAL_89]] : DMA, %[[VAL_289]] : DMA) +// CHECK: aie.wire(%[[VAL_288]] : North, %[[VAL_289]] : South) +// CHECK: aie.wire(%[[VAL_290:.*]] : North, %[[VAL_291:.*]] : South) +// CHECK: aie.wire(%[[VAL_10]] : DMA, %[[VAL_290]] : DMA) +// CHECK: aie.wire(%[[VAL_286]] : East, %[[VAL_292:.*]] : West) +// CHECK: aie.wire(%[[VAL_94]] : Core, %[[VAL_292]] : Core) +// CHECK: aie.wire(%[[VAL_94]] : DMA, %[[VAL_292]] : DMA) +// CHECK: aie.wire(%[[VAL_291]] : North, %[[VAL_292]] : South) +// CHECK: aie.wire(%[[VAL_287]] : East, %[[VAL_293:.*]] : West) +// CHECK: aie.wire(%[[VAL_95]] : Core, %[[VAL_293]] : Core) +// CHECK: aie.wire(%[[VAL_95]] : DMA, %[[VAL_293]] : DMA) +// CHECK: aie.wire(%[[VAL_292]] : North, %[[VAL_293]] : South) +// CHECK: aie.wire(%[[VAL_288]] : East, %[[VAL_294:.*]] : West) +// CHECK: aie.wire(%[[VAL_96]] : Core, %[[VAL_294]] : Core) +// CHECK: aie.wire(%[[VAL_96]] : DMA, %[[VAL_294]] : DMA) +// CHECK: aie.wire(%[[VAL_293]] : North, %[[VAL_294]] : South) +// CHECK: aie.wire(%[[VAL_289]] : East, %[[VAL_295:.*]] : West) +// CHECK: aie.wire(%[[VAL_97]] : Core, %[[VAL_295]] : Core) +// CHECK: aie.wire(%[[VAL_97]] : DMA, %[[VAL_295]] : DMA) +// CHECK: aie.wire(%[[VAL_294]] : North, %[[VAL_295]] : South) +// CHECK: aie.wire(%[[VAL_291]] : East, %[[VAL_296:.*]] : West) +// CHECK: aie.wire(%[[VAL_297:.*]] : North, %[[VAL_296]] : South) +// CHECK: aie.wire(%[[VAL_11]] : DMA, %[[VAL_297]] : DMA) +// CHECK: aie.wire(%[[VAL_292]] : East, %[[VAL_298:.*]] : West) +// CHECK: aie.wire(%[[VAL_102]] : Core, %[[VAL_298]] : Core) +// CHECK: aie.wire(%[[VAL_102]] : DMA, %[[VAL_298]] : DMA) +// CHECK: aie.wire(%[[VAL_296]] : North, %[[VAL_298]] : South) +// CHECK: aie.wire(%[[VAL_293]] : East, %[[VAL_299:.*]] : West) +// CHECK: aie.wire(%[[VAL_103]] : Core, %[[VAL_299]] : Core) +// CHECK: aie.wire(%[[VAL_103]] : DMA, %[[VAL_299]] : DMA) +// CHECK: aie.wire(%[[VAL_298]] : North, %[[VAL_299]] : South) +// CHECK: aie.wire(%[[VAL_294]] : East, %[[VAL_300:.*]] : West) +// CHECK: aie.wire(%[[VAL_104]] : Core, %[[VAL_300]] : Core) +// CHECK: aie.wire(%[[VAL_104]] : DMA, %[[VAL_300]] : DMA) +// CHECK: aie.wire(%[[VAL_299]] : North, %[[VAL_300]] : South) +// CHECK: aie.wire(%[[VAL_295]] : East, %[[VAL_301:.*]] : West) +// CHECK: aie.wire(%[[VAL_105]] : Core, %[[VAL_301]] : Core) +// CHECK: aie.wire(%[[VAL_105]] : DMA, %[[VAL_301]] : DMA) +// CHECK: aie.wire(%[[VAL_300]] : North, %[[VAL_301]] : South) +// CHECK: aie.wire(%[[VAL_296]] : East, %[[VAL_302:.*]] : West) +// CHECK: aie.wire(%[[VAL_298]] : East, %[[VAL_303:.*]] : West) +// CHECK: aie.wire(%[[VAL_110]] : Core, %[[VAL_303]] : Core) +// CHECK: aie.wire(%[[VAL_110]] : DMA, %[[VAL_303]] : DMA) +// CHECK: aie.wire(%[[VAL_302]] : North, %[[VAL_303]] : South) +// CHECK: aie.wire(%[[VAL_299]] : East, %[[VAL_304:.*]] : West) +// CHECK: aie.wire(%[[VAL_111]] : Core, %[[VAL_304]] : Core) +// CHECK: aie.wire(%[[VAL_111]] : DMA, %[[VAL_304]] : DMA) +// CHECK: aie.wire(%[[VAL_303]] : North, %[[VAL_304]] : South) +// CHECK: aie.wire(%[[VAL_300]] : East, %[[VAL_305:.*]] : West) +// CHECK: aie.wire(%[[VAL_112]] : Core, %[[VAL_305]] : Core) +// CHECK: aie.wire(%[[VAL_112]] : DMA, %[[VAL_305]] : DMA) +// CHECK: aie.wire(%[[VAL_304]] : North, %[[VAL_305]] : South) +// CHECK: aie.wire(%[[VAL_301]] : East, %[[VAL_306:.*]] : West) +// CHECK: aie.wire(%[[VAL_113]] : Core, %[[VAL_306]] : Core) +// CHECK: aie.wire(%[[VAL_113]] : DMA, %[[VAL_306]] : DMA) +// CHECK: aie.wire(%[[VAL_305]] : North, %[[VAL_306]] : South) +// CHECK: aie.wire(%[[VAL_114]] : Core, %[[VAL_307:.*]] : Core) +// CHECK: aie.wire(%[[VAL_114]] : DMA, %[[VAL_307]] : DMA) +// CHECK: aie.wire(%[[VAL_306]] : North, %[[VAL_307]] : South) +// CHECK: aie.wire(%[[VAL_302]] : East, %[[VAL_308:.*]] : West) +// CHECK: aie.wire(%[[VAL_303]] : East, %[[VAL_309:.*]] : West) +// CHECK: aie.wire(%[[VAL_119]] : Core, %[[VAL_309]] : Core) +// CHECK: aie.wire(%[[VAL_119]] : DMA, %[[VAL_309]] : DMA) +// CHECK: aie.wire(%[[VAL_308]] : North, %[[VAL_309]] : South) +// CHECK: aie.wire(%[[VAL_304]] : East, %[[VAL_310:.*]] : West) +// CHECK: aie.wire(%[[VAL_120]] : Core, %[[VAL_310]] : Core) +// CHECK: aie.wire(%[[VAL_120]] : DMA, %[[VAL_310]] : DMA) +// CHECK: aie.wire(%[[VAL_309]] : North, %[[VAL_310]] : South) +// CHECK: aie.wire(%[[VAL_305]] : East, %[[VAL_311:.*]] : West) +// CHECK: aie.wire(%[[VAL_121]] : Core, %[[VAL_311]] : Core) +// CHECK: aie.wire(%[[VAL_121]] : DMA, %[[VAL_311]] : DMA) +// CHECK: aie.wire(%[[VAL_310]] : North, %[[VAL_311]] : South) +// CHECK: aie.wire(%[[VAL_306]] : East, %[[VAL_312:.*]] : West) +// CHECK: aie.wire(%[[VAL_122]] : Core, %[[VAL_312]] : Core) +// CHECK: aie.wire(%[[VAL_122]] : DMA, %[[VAL_312]] : DMA) +// CHECK: aie.wire(%[[VAL_311]] : North, %[[VAL_312]] : South) +// CHECK: aie.wire(%[[VAL_307]] : East, %[[VAL_313:.*]] : West) +// CHECK: aie.wire(%[[VAL_123]] : Core, %[[VAL_313]] : Core) +// CHECK: aie.wire(%[[VAL_123]] : DMA, %[[VAL_313]] : DMA) +// CHECK: aie.wire(%[[VAL_312]] : North, %[[VAL_313]] : South) +// CHECK: aie.wire(%[[VAL_310]] : East, %[[VAL_314:.*]] : West) +// CHECK: aie.wire(%[[VAL_128]] : Core, %[[VAL_314]] : Core) +// CHECK: aie.wire(%[[VAL_128]] : DMA, %[[VAL_314]] : DMA) +// CHECK: aie.wire(%[[VAL_311]] : East, %[[VAL_315:.*]] : West) +// CHECK: aie.wire(%[[VAL_129]] : Core, %[[VAL_315]] : Core) +// CHECK: aie.wire(%[[VAL_129]] : DMA, %[[VAL_315]] : DMA) +// CHECK: aie.wire(%[[VAL_314]] : North, %[[VAL_315]] : South) +// CHECK: aie.wire(%[[VAL_312]] : East, %[[VAL_316:.*]] : West) +// CHECK: aie.wire(%[[VAL_130]] : Core, %[[VAL_316]] : Core) +// CHECK: aie.wire(%[[VAL_130]] : DMA, %[[VAL_316]] : DMA) +// CHECK: aie.wire(%[[VAL_315]] : North, %[[VAL_316]] : South) +// CHECK: aie.wire(%[[VAL_313]] : East, %[[VAL_317:.*]] : West) +// CHECK: aie.wire(%[[VAL_131]] : Core, %[[VAL_317]] : Core) +// CHECK: aie.wire(%[[VAL_131]] : DMA, %[[VAL_317]] : DMA) +// CHECK: aie.wire(%[[VAL_316]] : North, %[[VAL_317]] : South) +// CHECK: aie.wire(%[[VAL_314]] : East, %[[VAL_318:.*]] : West) +// CHECK: aie.wire(%[[VAL_221]] : Core, %[[VAL_318]] : Core) +// CHECK: aie.wire(%[[VAL_221]] : DMA, %[[VAL_318]] : DMA) +// CHECK: aie.wire(%[[VAL_318]] : East, %[[VAL_319:.*]] : West) +// CHECK: aie.wire(%[[VAL_223]] : Core, %[[VAL_319]] : Core) +// CHECK: aie.wire(%[[VAL_223]] : DMA, %[[VAL_319]] : DMA) +// CHECK: aie.wire(%[[VAL_227]] : Core, %[[VAL_320:.*]] : Core) +// CHECK: aie.wire(%[[VAL_227]] : DMA, %[[VAL_320]] : DMA) +// CHECK: aie.wire(%[[VAL_321:.*]] : North, %[[VAL_320]] : South) +// CHECK: aie.wire(%[[VAL_319]] : East, %[[VAL_322:.*]] : West) +// CHECK: aie.wire(%[[VAL_229]] : Core, %[[VAL_322]] : Core) +// CHECK: aie.wire(%[[VAL_229]] : DMA, %[[VAL_322]] : DMA) +// CHECK: aie.wire(%[[VAL_320]] : North, %[[VAL_322]] : South) +// CHECK: aie.wire(%[[VAL_321]] : East, %[[VAL_323:.*]] : West) +// CHECK: aie.wire(%[[VAL_324:.*]] : North, %[[VAL_323]] : South) +// CHECK: aie.wire(%[[VAL_12]] : DMA, %[[VAL_324]] : DMA) // CHECK: } module { - AIE.device(xcvc1902) { - %tile_0_0 = AIE.tile(0, 0) - %tile_1_0 = AIE.tile(1, 0) - %tile_2_0 = AIE.tile(2, 0) - %tile_3_0 = AIE.tile(3, 0) - %tile_4_0 = AIE.tile(4, 0) - %tile_5_0 = AIE.tile(5, 0) - %tile_6_0 = AIE.tile(6, 0) - %tile_7_0 = AIE.tile(7, 0) - %tile_8_0 = AIE.tile(8, 0) - %tile_9_0 = AIE.tile(9, 0) - %tile_10_0 = AIE.tile(10, 0) - %tile_11_0 = AIE.tile(11, 0) - %tile_18_0 = AIE.tile(18, 0) - %tile_19_0 = AIE.tile(19, 0) - %tile_0_1 = AIE.tile(0, 1) - %tile_0_2 = AIE.tile(0, 2) - %tile_0_3 = AIE.tile(0, 3) - %tile_0_4 = AIE.tile(0, 4) - %tile_0_5 = AIE.tile(0, 5) - %tile_0_6 = AIE.tile(0, 6) - %tile_0_7 = AIE.tile(0, 7) - %tile_0_8 = AIE.tile(0, 8) - %tile_1_1 = AIE.tile(1, 1) - %tile_1_2 = AIE.tile(1, 2) - %tile_1_3 = AIE.tile(1, 3) - %tile_1_4 = AIE.tile(1, 4) - %tile_1_5 = AIE.tile(1, 5) - %tile_1_6 = AIE.tile(1, 6) - %tile_1_7 = AIE.tile(1, 7) - %tile_1_8 = AIE.tile(1, 8) - %tile_2_1 = AIE.tile(2, 1) - %tile_2_2 = AIE.tile(2, 2) - %tile_2_3 = AIE.tile(2, 3) - %tile_2_4 = AIE.tile(2, 4) - %tile_2_5 = AIE.tile(2, 5) - %tile_2_6 = AIE.tile(2, 6) - %tile_2_7 = AIE.tile(2, 7) - %tile_2_8 = AIE.tile(2, 8) - %tile_3_1 = AIE.tile(3, 1) - %tile_3_2 = AIE.tile(3, 2) - %tile_3_3 = AIE.tile(3, 3) - %tile_3_4 = AIE.tile(3, 4) - %tile_3_5 = AIE.tile(3, 5) - %tile_3_6 = AIE.tile(3, 6) - %tile_3_7 = AIE.tile(3, 7) - %tile_3_8 = AIE.tile(3, 8) - %tile_4_1 = AIE.tile(4, 1) - %tile_4_2 = AIE.tile(4, 2) - %tile_4_3 = AIE.tile(4, 3) - %tile_4_4 = AIE.tile(4, 4) - %tile_4_5 = AIE.tile(4, 5) - %tile_4_6 = AIE.tile(4, 6) - %tile_4_7 = AIE.tile(4, 7) - %tile_4_8 = AIE.tile(4, 8) - %tile_5_1 = AIE.tile(5, 1) - %tile_5_2 = AIE.tile(5, 2) - %tile_5_3 = AIE.tile(5, 3) - %tile_5_4 = AIE.tile(5, 4) - %tile_5_5 = AIE.tile(5, 5) - %tile_5_6 = AIE.tile(5, 6) - %tile_5_7 = AIE.tile(5, 7) - %tile_5_8 = AIE.tile(5, 8) - %tile_6_1 = AIE.tile(6, 1) - %tile_6_2 = AIE.tile(6, 2) - %tile_6_3 = AIE.tile(6, 3) - %tile_6_4 = AIE.tile(6, 4) - %tile_6_5 = AIE.tile(6, 5) - %tile_6_6 = AIE.tile(6, 6) - %tile_6_7 = AIE.tile(6, 7) - %tile_6_8 = AIE.tile(6, 8) - %tile_7_1 = AIE.tile(7, 1) - %tile_7_2 = AIE.tile(7, 2) - %tile_7_3 = AIE.tile(7, 3) - %tile_7_4 = AIE.tile(7, 4) - %tile_7_5 = AIE.tile(7, 5) - %tile_7_6 = AIE.tile(7, 6) - %tile_7_7 = AIE.tile(7, 7) - %tile_7_8 = AIE.tile(7, 8) - %tile_8_1 = AIE.tile(8, 1) - %tile_8_2 = AIE.tile(8, 2) - %tile_8_3 = AIE.tile(8, 3) - %tile_8_4 = AIE.tile(8, 4) - %tile_8_5 = AIE.tile(8, 5) - %tile_8_6 = AIE.tile(8, 6) - %tile_8_7 = AIE.tile(8, 7) - %tile_8_8 = AIE.tile(8, 8) - %tile_9_1 = AIE.tile(9, 1) - %tile_9_2 = AIE.tile(9, 2) - %tile_9_3 = AIE.tile(9, 3) - %tile_9_4 = AIE.tile(9, 4) - %tile_9_5 = AIE.tile(9, 5) - %tile_9_6 = AIE.tile(9, 6) - %tile_9_7 = AIE.tile(9, 7) - %tile_9_8 = AIE.tile(9, 8) - %tile_10_1 = AIE.tile(10, 1) - %tile_10_2 = AIE.tile(10, 2) - %tile_10_3 = AIE.tile(10, 3) - %tile_10_4 = AIE.tile(10, 4) - %tile_10_5 = AIE.tile(10, 5) - %tile_10_6 = AIE.tile(10, 6) - %tile_10_7 = AIE.tile(10, 7) - %tile_10_8 = AIE.tile(10, 8) - %tile_11_1 = AIE.tile(11, 1) - %tile_11_2 = AIE.tile(11, 2) - %tile_11_3 = AIE.tile(11, 3) - %tile_11_4 = AIE.tile(11, 4) - %tile_11_5 = AIE.tile(11, 5) - %tile_11_6 = AIE.tile(11, 6) - %tile_11_7 = AIE.tile(11, 7) - %tile_11_8 = AIE.tile(11, 8) - %tile_12_1 = AIE.tile(12, 1) - %tile_12_2 = AIE.tile(12, 2) - %tile_12_3 = AIE.tile(12, 3) - %tile_12_4 = AIE.tile(12, 4) - %tile_12_5 = AIE.tile(12, 5) - %tile_12_6 = AIE.tile(12, 6) - %tile_12_7 = AIE.tile(12, 7) - %tile_12_8 = AIE.tile(12, 8) - %tile_13_0 = AIE.tile(13, 0) - %tile_13_1 = AIE.tile(13, 1) - %tile_13_2 = AIE.tile(13, 2) - %tile_13_3 = AIE.tile(13, 3) - %tile_13_4 = AIE.tile(13, 4) - %tile_13_5 = AIE.tile(13, 5) - %tile_13_6 = AIE.tile(13, 6) - %tile_13_7 = AIE.tile(13, 7) - %tile_13_8 = AIE.tile(13, 8) - %tile_14_1 = AIE.tile(14, 1) - %tile_14_2 = AIE.tile(14, 2) - %tile_14_3 = AIE.tile(14, 3) - %tile_14_4 = AIE.tile(14, 4) - %tile_14_5 = AIE.tile(14, 5) - %tile_14_6 = AIE.tile(14, 6) - %tile_14_7 = AIE.tile(14, 7) - %tile_14_8 = AIE.tile(14, 8) - %switchbox_0_1 = AIE.switchbox(%tile_0_1) { - } - %switchbox_0_2 = AIE.switchbox(%tile_0_2) { - } - %switchbox_0_3 = AIE.switchbox(%tile_0_3) { - } - %switchbox_0_4 = AIE.switchbox(%tile_0_4) { - } - %switchbox_1_1 = AIE.switchbox(%tile_1_1) { - } - %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - } - %switchbox_1_3 = AIE.switchbox(%tile_1_3) { - } - %switchbox_1_4 = AIE.switchbox(%tile_1_4) { - } - %switchbox_2_1 = AIE.switchbox(%tile_2_1) { + aie.device(xcvc1902) { + %tile_0_0 = aie.tile(0, 0) + %tile_1_0 = aie.tile(1, 0) + %tile_2_0 = aie.tile(2, 0) + %tile_3_0 = aie.tile(3, 0) + %tile_4_0 = aie.tile(4, 0) + %tile_5_0 = aie.tile(5, 0) + %tile_6_0 = aie.tile(6, 0) + %tile_7_0 = aie.tile(7, 0) + %tile_8_0 = aie.tile(8, 0) + %tile_9_0 = aie.tile(9, 0) + %tile_10_0 = aie.tile(10, 0) + %tile_11_0 = aie.tile(11, 0) + %tile_18_0 = aie.tile(18, 0) + %tile_19_0 = aie.tile(19, 0) + %tile_0_1 = aie.tile(0, 1) + %tile_0_2 = aie.tile(0, 2) + %tile_0_3 = aie.tile(0, 3) + %tile_0_4 = aie.tile(0, 4) + %tile_0_5 = aie.tile(0, 5) + %tile_0_6 = aie.tile(0, 6) + %tile_0_7 = aie.tile(0, 7) + %tile_0_8 = aie.tile(0, 8) + %tile_1_1 = aie.tile(1, 1) + %tile_1_2 = aie.tile(1, 2) + %tile_1_3 = aie.tile(1, 3) + %tile_1_4 = aie.tile(1, 4) + %tile_1_5 = aie.tile(1, 5) + %tile_1_6 = aie.tile(1, 6) + %tile_1_7 = aie.tile(1, 7) + %tile_1_8 = aie.tile(1, 8) + %tile_2_1 = aie.tile(2, 1) + %tile_2_2 = aie.tile(2, 2) + %tile_2_3 = aie.tile(2, 3) + %tile_2_4 = aie.tile(2, 4) + %tile_2_5 = aie.tile(2, 5) + %tile_2_6 = aie.tile(2, 6) + %tile_2_7 = aie.tile(2, 7) + %tile_2_8 = aie.tile(2, 8) + %tile_3_1 = aie.tile(3, 1) + %tile_3_2 = aie.tile(3, 2) + %tile_3_3 = aie.tile(3, 3) + %tile_3_4 = aie.tile(3, 4) + %tile_3_5 = aie.tile(3, 5) + %tile_3_6 = aie.tile(3, 6) + %tile_3_7 = aie.tile(3, 7) + %tile_3_8 = aie.tile(3, 8) + %tile_4_1 = aie.tile(4, 1) + %tile_4_2 = aie.tile(4, 2) + %tile_4_3 = aie.tile(4, 3) + %tile_4_4 = aie.tile(4, 4) + %tile_4_5 = aie.tile(4, 5) + %tile_4_6 = aie.tile(4, 6) + %tile_4_7 = aie.tile(4, 7) + %tile_4_8 = aie.tile(4, 8) + %tile_5_1 = aie.tile(5, 1) + %tile_5_2 = aie.tile(5, 2) + %tile_5_3 = aie.tile(5, 3) + %tile_5_4 = aie.tile(5, 4) + %tile_5_5 = aie.tile(5, 5) + %tile_5_6 = aie.tile(5, 6) + %tile_5_7 = aie.tile(5, 7) + %tile_5_8 = aie.tile(5, 8) + %tile_6_1 = aie.tile(6, 1) + %tile_6_2 = aie.tile(6, 2) + %tile_6_3 = aie.tile(6, 3) + %tile_6_4 = aie.tile(6, 4) + %tile_6_5 = aie.tile(6, 5) + %tile_6_6 = aie.tile(6, 6) + %tile_6_7 = aie.tile(6, 7) + %tile_6_8 = aie.tile(6, 8) + %tile_7_1 = aie.tile(7, 1) + %tile_7_2 = aie.tile(7, 2) + %tile_7_3 = aie.tile(7, 3) + %tile_7_4 = aie.tile(7, 4) + %tile_7_5 = aie.tile(7, 5) + %tile_7_6 = aie.tile(7, 6) + %tile_7_7 = aie.tile(7, 7) + %tile_7_8 = aie.tile(7, 8) + %tile_8_1 = aie.tile(8, 1) + %tile_8_2 = aie.tile(8, 2) + %tile_8_3 = aie.tile(8, 3) + %tile_8_4 = aie.tile(8, 4) + %tile_8_5 = aie.tile(8, 5) + %tile_8_6 = aie.tile(8, 6) + %tile_8_7 = aie.tile(8, 7) + %tile_8_8 = aie.tile(8, 8) + %tile_9_1 = aie.tile(9, 1) + %tile_9_2 = aie.tile(9, 2) + %tile_9_3 = aie.tile(9, 3) + %tile_9_4 = aie.tile(9, 4) + %tile_9_5 = aie.tile(9, 5) + %tile_9_6 = aie.tile(9, 6) + %tile_9_7 = aie.tile(9, 7) + %tile_9_8 = aie.tile(9, 8) + %tile_10_1 = aie.tile(10, 1) + %tile_10_2 = aie.tile(10, 2) + %tile_10_3 = aie.tile(10, 3) + %tile_10_4 = aie.tile(10, 4) + %tile_10_5 = aie.tile(10, 5) + %tile_10_6 = aie.tile(10, 6) + %tile_10_7 = aie.tile(10, 7) + %tile_10_8 = aie.tile(10, 8) + %tile_11_1 = aie.tile(11, 1) + %tile_11_2 = aie.tile(11, 2) + %tile_11_3 = aie.tile(11, 3) + %tile_11_4 = aie.tile(11, 4) + %tile_11_5 = aie.tile(11, 5) + %tile_11_6 = aie.tile(11, 6) + %tile_11_7 = aie.tile(11, 7) + %tile_11_8 = aie.tile(11, 8) + %tile_12_1 = aie.tile(12, 1) + %tile_12_2 = aie.tile(12, 2) + %tile_12_3 = aie.tile(12, 3) + %tile_12_4 = aie.tile(12, 4) + %tile_12_5 = aie.tile(12, 5) + %tile_12_6 = aie.tile(12, 6) + %tile_12_7 = aie.tile(12, 7) + %tile_12_8 = aie.tile(12, 8) + %tile_13_0 = aie.tile(13, 0) + %tile_13_1 = aie.tile(13, 1) + %tile_13_2 = aie.tile(13, 2) + %tile_13_3 = aie.tile(13, 3) + %tile_13_4 = aie.tile(13, 4) + %tile_13_5 = aie.tile(13, 5) + %tile_13_6 = aie.tile(13, 6) + %tile_13_7 = aie.tile(13, 7) + %tile_13_8 = aie.tile(13, 8) + %tile_14_1 = aie.tile(14, 1) + %tile_14_2 = aie.tile(14, 2) + %tile_14_3 = aie.tile(14, 3) + %tile_14_4 = aie.tile(14, 4) + %tile_14_5 = aie.tile(14, 5) + %tile_14_6 = aie.tile(14, 6) + %tile_14_7 = aie.tile(14, 7) + %tile_14_8 = aie.tile(14, 8) + %switchbox_0_1 = aie.switchbox(%tile_0_1) { + } + %switchbox_0_2 = aie.switchbox(%tile_0_2) { + } + %switchbox_0_3 = aie.switchbox(%tile_0_3) { + } + %switchbox_0_4 = aie.switchbox(%tile_0_4) { + } + %switchbox_1_1 = aie.switchbox(%tile_1_1) { + } + %switchbox_1_2 = aie.switchbox(%tile_1_2) { + } + %switchbox_1_3 = aie.switchbox(%tile_1_3) { + } + %switchbox_1_4 = aie.switchbox(%tile_1_4) { + } + %switchbox_2_1 = aie.switchbox(%tile_2_1) { } - %switchbox_2_2 = AIE.switchbox(%tile_2_2) { + %switchbox_2_2 = aie.switchbox(%tile_2_2) { } - %switchbox_2_3 = AIE.switchbox(%tile_2_3) { + %switchbox_2_3 = aie.switchbox(%tile_2_3) { } - %switchbox_2_4 = AIE.switchbox(%tile_2_4) { - AIE.connect + %switchbox_2_4 = aie.switchbox(%tile_2_4) { + aie.connect } - %switchbox_2_5 = AIE.switchbox(%tile_2_5) { - AIE.connect - AIE.connect + %switchbox_2_5 = aie.switchbox(%tile_2_5) { + aie.connect + aie.connect } - %switchbox_3_1 = AIE.switchbox(%tile_3_1) { - AIE.connect - AIE.connect + %switchbox_3_1 = aie.switchbox(%tile_3_1) { + aie.connect + aie.connect } - %switchbox_3_2 = AIE.switchbox(%tile_3_2) { - AIE.connect + %switchbox_3_2 = aie.switchbox(%tile_3_2) { + aie.connect } - %switchbox_3_3 = AIE.switchbox(%tile_3_3) { - AIE.connect + %switchbox_3_3 = aie.switchbox(%tile_3_3) { + aie.connect } - %switchbox_3_4 = AIE.switchbox(%tile_3_4) { - AIE.connect + %switchbox_3_4 = aie.switchbox(%tile_3_4) { + aie.connect } - %switchbox_3_5 = AIE.switchbox(%tile_3_5) { - AIE.connect + %switchbox_3_5 = aie.switchbox(%tile_3_5) { + aie.connect } - %switchbox_4_1 = AIE.switchbox(%tile_4_1) { + %switchbox_4_1 = aie.switchbox(%tile_4_1) { } - %switchbox_4_2 = AIE.switchbox(%tile_4_2) { + %switchbox_4_2 = aie.switchbox(%tile_4_2) { } - %switchbox_4_3 = AIE.switchbox(%tile_4_3) { + %switchbox_4_3 = aie.switchbox(%tile_4_3) { } - %switchbox_4_4 = AIE.switchbox(%tile_4_4) { + %switchbox_4_4 = aie.switchbox(%tile_4_4) { } - %switchbox_5_1 = AIE.switchbox(%tile_5_1) { + %switchbox_5_1 = aie.switchbox(%tile_5_1) { } - %switchbox_5_2 = AIE.switchbox(%tile_5_2) { + %switchbox_5_2 = aie.switchbox(%tile_5_2) { } - %switchbox_5_3 = AIE.switchbox(%tile_5_3) { + %switchbox_5_3 = aie.switchbox(%tile_5_3) { } - %switchbox_5_4 = AIE.switchbox(%tile_5_4) { + %switchbox_5_4 = aie.switchbox(%tile_5_4) { } - %switchbox_5_5 = AIE.switchbox(%tile_5_5) { + %switchbox_5_5 = aie.switchbox(%tile_5_5) { } - %switchbox_5_6 = AIE.switchbox(%tile_5_6) { - AIE.connect + %switchbox_5_6 = aie.switchbox(%tile_5_6) { + aie.connect } - %switchbox_6_1 = AIE.switchbox(%tile_6_1) { + %switchbox_6_1 = aie.switchbox(%tile_6_1) { } - %switchbox_6_2 = AIE.switchbox(%tile_6_2) { + %switchbox_6_2 = aie.switchbox(%tile_6_2) { } - %switchbox_6_3 = AIE.switchbox(%tile_6_3) { + %switchbox_6_3 = aie.switchbox(%tile_6_3) { } - %switchbox_6_4 = AIE.switchbox(%tile_6_4) { + %switchbox_6_4 = aie.switchbox(%tile_6_4) { } - %switchbox_6_5 = AIE.switchbox(%tile_6_5) { + %switchbox_6_5 = aie.switchbox(%tile_6_5) { } - %switchbox_6_6 = AIE.switchbox(%tile_6_6) { - AIE.connect - AIE.connect + %switchbox_6_6 = aie.switchbox(%tile_6_6) { + aie.connect + aie.connect } - %switchbox_7_1 = AIE.switchbox(%tile_7_1) { + %switchbox_7_1 = aie.switchbox(%tile_7_1) { } - %switchbox_7_2 = AIE.switchbox(%tile_7_2) { + %switchbox_7_2 = aie.switchbox(%tile_7_2) { } - %switchbox_7_3 = AIE.switchbox(%tile_7_3) { - AIE.connect - AIE.connect + %switchbox_7_3 = aie.switchbox(%tile_7_3) { + aie.connect + aie.connect } - %switchbox_7_4 = AIE.switchbox(%tile_7_4) { - AIE.connect + %switchbox_7_4 = aie.switchbox(%tile_7_4) { + aie.connect } - %switchbox_7_5 = AIE.switchbox(%tile_7_5) { - AIE.connect + %switchbox_7_5 = aie.switchbox(%tile_7_5) { + aie.connect } - %switchbox_7_6 = AIE.switchbox(%tile_7_6) { - AIE.connect + %switchbox_7_6 = aie.switchbox(%tile_7_6) { + aie.connect } - %switchbox_8_1 = AIE.switchbox(%tile_8_1) { + %switchbox_8_1 = aie.switchbox(%tile_8_1) { } - %switchbox_8_2 = AIE.switchbox(%tile_8_2) { + %switchbox_8_2 = aie.switchbox(%tile_8_2) { } - %switchbox_8_3 = AIE.switchbox(%tile_8_3) { - AIE.connect + %switchbox_8_3 = aie.switchbox(%tile_8_3) { + aie.connect } - %switchbox_8_4 = AIE.switchbox(%tile_8_4) { + %switchbox_8_4 = aie.switchbox(%tile_8_4) { } - %switchbox_9_1 = AIE.switchbox(%tile_9_1) { + %switchbox_9_1 = aie.switchbox(%tile_9_1) { } - %switchbox_9_2 = AIE.switchbox(%tile_9_2) { + %switchbox_9_2 = aie.switchbox(%tile_9_2) { } - %switchbox_9_3 = AIE.switchbox(%tile_9_3) { + %switchbox_9_3 = aie.switchbox(%tile_9_3) { } - %switchbox_9_4 = AIE.switchbox(%tile_9_4) { + %switchbox_9_4 = aie.switchbox(%tile_9_4) { } - %switchbox_10_1 = AIE.switchbox(%tile_10_1) { + %switchbox_10_1 = aie.switchbox(%tile_10_1) { } - %switchbox_10_2 = AIE.switchbox(%tile_10_2) { + %switchbox_10_2 = aie.switchbox(%tile_10_2) { } - %switchbox_10_3 = AIE.switchbox(%tile_10_3) { + %switchbox_10_3 = aie.switchbox(%tile_10_3) { } - %switchbox_10_4 = AIE.switchbox(%tile_10_4) { + %switchbox_10_4 = aie.switchbox(%tile_10_4) { } - %switchbox_11_1 = AIE.switchbox(%tile_11_1) { + %switchbox_11_1 = aie.switchbox(%tile_11_1) { } - %switchbox_11_2 = AIE.switchbox(%tile_11_2) { + %switchbox_11_2 = aie.switchbox(%tile_11_2) { } - %switchbox_11_3 = AIE.switchbox(%tile_11_3) { + %switchbox_11_3 = aie.switchbox(%tile_11_3) { } - %switchbox_11_4 = AIE.switchbox(%tile_11_4) { + %switchbox_11_4 = aie.switchbox(%tile_11_4) { } - %switchbox_12_1 = AIE.switchbox(%tile_12_1) { + %switchbox_12_1 = aie.switchbox(%tile_12_1) { } - %switchbox_12_2 = AIE.switchbox(%tile_12_2) { + %switchbox_12_2 = aie.switchbox(%tile_12_2) { } - %switchbox_12_3 = AIE.switchbox(%tile_12_3) { + %switchbox_12_3 = aie.switchbox(%tile_12_3) { } - %switchbox_12_4 = AIE.switchbox(%tile_12_4) { + %switchbox_12_4 = aie.switchbox(%tile_12_4) { } - %switchbox_12_5 = AIE.switchbox(%tile_12_5) { - AIE.connect - AIE.connect + %switchbox_12_5 = aie.switchbox(%tile_12_5) { + aie.connect + aie.connect } - %switchbox_13_1 = AIE.switchbox(%tile_13_1) { - AIE.connect + %switchbox_13_1 = aie.switchbox(%tile_13_1) { + aie.connect } - %switchbox_13_2 = AIE.switchbox(%tile_13_2) { - AIE.connect + %switchbox_13_2 = aie.switchbox(%tile_13_2) { + aie.connect } - %switchbox_13_3 = AIE.switchbox(%tile_13_3) { - AIE.connect - AIE.connect + %switchbox_13_3 = aie.switchbox(%tile_13_3) { + aie.connect + aie.connect } - %switchbox_13_4 = AIE.switchbox(%tile_13_4) { - AIE.connect + %switchbox_13_4 = aie.switchbox(%tile_13_4) { + aie.connect } - %switchbox_13_5 = AIE.switchbox(%tile_13_5) { - AIE.connect - AIE.connect + %switchbox_13_5 = aie.switchbox(%tile_13_5) { + aie.connect + aie.connect } - AIE.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) - AIE.flow(%tile_4_5, West : 0, %tile_6_0, DMA : 0) - AIE.flow(%tile_10_0, DMA : 0, %tile_9_3, West : 0) - AIE.flow(%tile_4_6, East : 0, %tile_2_0, DMA : 0) - AIE.flow(%tile_11_0, DMA : 0, %tile_13_0, North : 0) - AIE.flow(%tile_14_5, West : 0, %tile_18_0, DMA : 0) + aie.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) + aie.flow(%tile_4_5, West : 0, %tile_6_0, DMA : 0) + aie.flow(%tile_10_0, DMA : 0, %tile_9_3, West : 0) + aie.flow(%tile_4_6, East : 0, %tile_2_0, DMA : 0) + aie.flow(%tile_11_0, DMA : 0, %tile_13_0, North : 0) + aie.flow(%tile_14_5, West : 0, %tile_18_0, DMA : 0) } } diff --git a/test/create-flows/unit_simple.mlir b/test/create-flows/unit_simple.mlir index d76843d949..99b237a8ab 100644 --- a/test/create-flows/unit_simple.mlir +++ b/test/create-flows/unit_simple.mlir @@ -10,44 +10,44 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_3:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_3:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_4:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_5:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.packet_flow(16) { -// CHECK: AIE.packet_source<%[[VAL_0]], Core : 0> -// CHECK: AIE.packet_dest<%[[VAL_1]], Core : 0> -// CHECK: AIE.packet_dest<%[[VAL_2]], DMA : 1> +// CHECK: aie.packet_flow(16) { +// CHECK: aie.packet_source<%[[VAL_0]], Core : 0> +// CHECK: aie.packet_dest<%[[VAL_1]], Core : 0> +// CHECK: aie.packet_dest<%[[VAL_2]], DMA : 1> // CHECK: } -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_6:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_6]] : DMA) -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_7:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_7]] : DMA) -// CHECK: AIE.wire(%[[VAL_6]] : North, %[[VAL_7]] : South) -// CHECK: AIE.wire(%[[VAL_7]] : East, %[[VAL_8:.*]] : West) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_8]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_8]] : DMA) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_6:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_6]] : DMA) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_7:.*]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_7]] : DMA) +// CHECK: aie.wire(%[[VAL_6]] : North, %[[VAL_7]] : South) +// CHECK: aie.wire(%[[VAL_7]] : East, %[[VAL_8:.*]] : West) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_8]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_8]] : DMA) // CHECK: } module { - AIE.device(xcvc1902) { - %01 = AIE.tile(0, 1) - %12 = AIE.tile(1, 2) - %02 = AIE.tile(0, 2) - AIE.flow(%01, DMA : 0, %12, Core : 1) - AIE.packet_flow(0x10) { - AIE.packet_source < %01, Core : 0> - AIE.packet_dest < %12, Core : 0> - AIE.packet_dest < %02, DMA : 1> + aie.device(xcvc1902) { + %01 = aie.tile(0, 1) + %12 = aie.tile(1, 2) + %02 = aie.tile(0, 2) + aie.flow(%01, DMA : 0, %12, Core : 1) + aie.packet_flow(0x10) { + aie.packet_source < %01, Core : 0> + aie.packet_dest < %12, Core : 0> + aie.packet_dest < %02, DMA : 1> } } } diff --git a/test/create-flows/unit_simple2.mlir b/test/create-flows/unit_simple2.mlir index aeeb3afdc3..4736105db8 100644 --- a/test/create-flows/unit_simple2.mlir +++ b/test/create-flows/unit_simple2.mlir @@ -10,33 +10,33 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_3:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_3:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_4:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_5:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_6:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_6]] : DMA) -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_7:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_7]] : DMA) -// CHECK: AIE.wire(%[[VAL_6]] : North, %[[VAL_7]] : South) -// CHECK: AIE.wire(%[[VAL_6]] : East, %[[VAL_8:.*]] : West) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_8]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_8]] : DMA) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_6:.*]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_6]] : DMA) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_7:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_7]] : DMA) +// CHECK: aie.wire(%[[VAL_6]] : North, %[[VAL_7]] : South) +// CHECK: aie.wire(%[[VAL_6]] : East, %[[VAL_8:.*]] : West) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_8]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_8]] : DMA) // CHECK: } module { - AIE.device(xcvc1902) { - %0 = AIE.tile(2, 3) - %1 = AIE.tile(3, 2) - AIE.flow(%0, Core : 1, %1, DMA : 0) + aie.device(xcvc1902) { + %0 = aie.tile(2, 3) + %1 = aie.tile(3, 2) + aie.flow(%0, Core : 1, %1, DMA : 0) } } diff --git a/test/create-flows/unit_simple_flows.mlir b/test/create-flows/unit_simple_flows.mlir index b103f908a8..b4459995f3 100644 --- a/test/create-flows/unit_simple_flows.mlir +++ b/test/create-flows/unit_simple_flows.mlir @@ -10,31 +10,31 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_2:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_2:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_3:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %[[VAL_3:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_4:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_4]] : DMA) -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_5:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_5]] : DMA) -// CHECK: AIE.wire(%[[VAL_4]] : North, %[[VAL_5]] : South) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_4:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_4]] : DMA) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_5:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_5]] : DMA) +// CHECK: aie.wire(%[[VAL_4]] : North, %[[VAL_5]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t23 = AIE.tile(2, 3) - %t22 = AIE.tile(2, 2) - AIE.flow(%t23, Core : 0, %t22, Core : 1) - AIE.flow(%t22, Core : 0, %t22, Core : 0) - AIE.flow(%t22, Core : 1, %t23, Core : 1) + aie.device(xcvc1902) { + %t23 = aie.tile(2, 3) + %t22 = aie.tile(2, 2) + aie.flow(%t23, Core : 0, %t22, Core : 1) + aie.flow(%t22, Core : 0, %t22, Core : 0) + aie.flow(%t22, Core : 1, %t23, Core : 1) } } diff --git a/test/create-flows/unit_simple_flows2.mlir b/test/create-flows/unit_simple_flows2.mlir index 2666d7e008..bcbbdf3f92 100644 --- a/test/create-flows/unit_simple_flows2.mlir +++ b/test/create-flows/unit_simple_flows2.mlir @@ -10,43 +10,43 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_3:.*]] = AIE.switchbox(%[[VAL_1]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_3:.*]] = aie.switchbox(%[[VAL_1]]) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_4:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_5:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_6:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_7:.*]] = AIE.switchbox(%[[VAL_6]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_6:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_7:.*]] = aie.switchbox(%[[VAL_6]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: AIE.wire(%[[VAL_2]] : Core, %[[VAL_8:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_8]] : DMA) -// CHECK: AIE.wire(%[[VAL_8]] : East, %[[VAL_9:.*]] : West) -// CHECK: AIE.wire(%[[VAL_6]] : Core, %[[VAL_9]] : Core) -// CHECK: AIE.wire(%[[VAL_6]] : DMA, %[[VAL_9]] : DMA) -// CHECK: AIE.wire(%[[VAL_1]] : Core, %[[VAL_10:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_1]] : DMA, %[[VAL_10]] : DMA) -// CHECK: AIE.wire(%[[VAL_9]] : North, %[[VAL_10]] : South) -// CHECK: AIE.wire(%[[VAL_0]] : Core, %[[VAL_11:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_0]] : DMA, %[[VAL_11]] : DMA) -// CHECK: AIE.wire(%[[VAL_10]] : North, %[[VAL_11]] : South) +// CHECK: aie.wire(%[[VAL_2]] : Core, %[[VAL_8:.*]] : Core) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_8]] : DMA) +// CHECK: aie.wire(%[[VAL_8]] : East, %[[VAL_9:.*]] : West) +// CHECK: aie.wire(%[[VAL_6]] : Core, %[[VAL_9]] : Core) +// CHECK: aie.wire(%[[VAL_6]] : DMA, %[[VAL_9]] : DMA) +// CHECK: aie.wire(%[[VAL_1]] : Core, %[[VAL_10:.*]] : Core) +// CHECK: aie.wire(%[[VAL_1]] : DMA, %[[VAL_10]] : DMA) +// CHECK: aie.wire(%[[VAL_9]] : North, %[[VAL_10]] : South) +// CHECK: aie.wire(%[[VAL_0]] : Core, %[[VAL_11:.*]] : Core) +// CHECK: aie.wire(%[[VAL_0]] : DMA, %[[VAL_11]] : DMA) +// CHECK: aie.wire(%[[VAL_10]] : North, %[[VAL_11]] : South) // CHECK: } module { - AIE.device(xcvc1902) { - %t23 = AIE.tile(2, 3) - %t22 = AIE.tile(2, 2) - %t11 = AIE.tile(1, 1) - AIE.flow(%t23, Core : 0, %t22, Core : 1) - AIE.flow(%t22, Core : 0, %t11, Core : 0) + aie.device(xcvc1902) { + %t23 = aie.tile(2, 3) + %t22 = aie.tile(2, 2) + %t11 = aie.tile(1, 1) + aie.flow(%t23, Core : 0, %t22, Core : 1) + aie.flow(%t22, Core : 0, %t11, Core : 0) } } diff --git a/test/create-flows/unit_simple_flows_shim.mlir b/test/create-flows/unit_simple_flows_shim.mlir index a06ff7ecca..cc2fae8436 100644 --- a/test/create-flows/unit_simple_flows_shim.mlir +++ b/test/create-flows/unit_simple_flows_shim.mlir @@ -10,65 +10,65 @@ // RUN: aie-opt --split-input-file --aie-create-pathfinder-flows %s | FileCheck %s // CHECK: module -// CHECK: %[[T21:.*]] = AIE.tile(2, 1) -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %[[T21:.*]] = aie.tile(2, 1) +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.switchbox(%[[T21]]) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcvc1902) { - %t23 = AIE.tile(2, 1) - %t22 = AIE.tile(2, 0) - AIE.flow(%t23, North : 0, %t22, PLIO : 0) + aie.device(xcvc1902) { + %t23 = aie.tile(2, 1) + %t22 = aie.tile(2, 0) + aie.flow(%t23, North : 0, %t22, PLIO : 0) } } // ----- // CHECK: module -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T21:.*]] = AIE.tile(2, 1) -// CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T21:.*]] = aie.tile(2, 1) +// CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.shim_mux(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.shim_mux(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.switchbox(%[[T21]]) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %t21 = AIE.tile(2, 1) - AIE.flow(%t21, Core : 0, %t20, DMA : 1) + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %t21 = aie.tile(2, 1) + aie.flow(%t21, Core : 0, %t20, DMA : 1) } } // ----- // CHECK: module -// CHECK: %[[T20:.*]] = AIE.tile(2, 0) -// CHECK: %[[T30:.*]] = AIE.tile(3, 0) -// CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %[[T20:.*]] = aie.tile(2, 0) +// CHECK: %[[T30:.*]] = aie.tile(3, 0) +// CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.shim_mux(%[[T20]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.shim_mux(%[[T20]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.switchbox(%[[T30]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.switchbox(%[[T30]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %{{.*}} = AIE.shim_mux(%[[T30]]) { -// CHECK: AIE.connect +// CHECK: %{{.*}} = aie.shim_mux(%[[T30]]) { +// CHECK: aie.connect // CHECK: } module { - AIE.device(xcvc1902) { - %t20 = AIE.tile(2, 0) - %t30 = AIE.tile(3, 0) - AIE.flow(%t20, DMA : 0, %t30, DMA : 1) + aie.device(xcvc1902) { + %t20 = aie.tile(2, 0) + %t30 = aie.tile(3, 0) + aie.flow(%t20, DMA : 0, %t30, DMA : 1) } } diff --git a/test/create-flows/unit_vecmul_4x4.mlir b/test/create-flows/unit_vecmul_4x4.mlir index 427d273b94..2aaf794ca1 100644 --- a/test/create-flows/unit_vecmul_4x4.mlir +++ b/test/create-flows/unit_vecmul_4x4.mlir @@ -10,3855 +10,3855 @@ // RUN: aie-opt --aie-create-pathfinder-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(47, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(47, 1) -// CHECK: %[[VAL_2:.*]] = AIE.tile(47, 0) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(10, 5) -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_4]], 2) -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "buf47"} : memref<64xi32, 2> -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_4]], 1) -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "buf46"} : memref<64xi32, 2> -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_4]], 0) -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "buf45"} : memref<64xi32, 2> -// CHECK: %[[VAL_11:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_12:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(47, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(47, 1) +// CHECK: %[[VAL_2:.*]] = aie.tile(47, 0) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(10, 5) +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_4]], 2) +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "buf47"} : memref<64xi32, 2> +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_4]], 1) +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "buf46"} : memref<64xi32, 2> +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_4]], 0) +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "buf45"} : memref<64xi32, 2> +// CHECK: %[[VAL_11:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_12:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_13:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_13:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_14:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_14:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.core(%[[VAL_4]]) { +// CHECK: %[[VAL_15:.*]] = aie.core(%[[VAL_4]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) // CHECK: affine.for %[[VAL_16:.*]] = 0 to 64 { // CHECK: %[[VAL_17:.*]] = affine.load %[[VAL_10]]{{\[}}%[[VAL_16]]] : memref<64xi32, 2> // CHECK: %[[VAL_18:.*]] = affine.load %[[VAL_8]]{{\[}}%[[VAL_16]]] : memref<64xi32, 2> // CHECK: %[[VAL_19:.*]] = arith.muli %[[VAL_17]], %[[VAL_18]] : i32 // CHECK: affine.store %[[VAL_19]], %[[VAL_6]]{{\[}}%[[VAL_16]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.tile(46, 2) -// CHECK: %[[VAL_21:.*]] = AIE.tile(46, 1) -// CHECK: %[[VAL_22:.*]] = AIE.tile(46, 0) -// CHECK: %[[VAL_23:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_24:.*]] = AIE.tile(9, 5) -// CHECK: %[[VAL_25:.*]] = AIE.lock(%[[VAL_24]], 2) -// CHECK: %[[VAL_26:.*]] = AIE.buffer(%[[VAL_24]]) {sym_name = "buf44"} : memref<64xi32, 2> -// CHECK: %[[VAL_27:.*]] = AIE.lock(%[[VAL_24]], 1) -// CHECK: %[[VAL_28:.*]] = AIE.buffer(%[[VAL_24]]) {sym_name = "buf43"} : memref<64xi32, 2> -// CHECK: %[[VAL_29:.*]] = AIE.lock(%[[VAL_24]], 0) -// CHECK: %[[VAL_30:.*]] = AIE.buffer(%[[VAL_24]]) {sym_name = "buf42"} : memref<64xi32, 2> -// CHECK: %[[VAL_31:.*]] = AIE.mem(%[[VAL_24]]) { -// CHECK: %[[VAL_32:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_20:.*]] = aie.tile(46, 2) +// CHECK: %[[VAL_21:.*]] = aie.tile(46, 1) +// CHECK: %[[VAL_22:.*]] = aie.tile(46, 0) +// CHECK: %[[VAL_23:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_24:.*]] = aie.tile(9, 5) +// CHECK: %[[VAL_25:.*]] = aie.lock(%[[VAL_24]], 2) +// CHECK: %[[VAL_26:.*]] = aie.buffer(%[[VAL_24]]) {sym_name = "buf44"} : memref<64xi32, 2> +// CHECK: %[[VAL_27:.*]] = aie.lock(%[[VAL_24]], 1) +// CHECK: %[[VAL_28:.*]] = aie.buffer(%[[VAL_24]]) {sym_name = "buf43"} : memref<64xi32, 2> +// CHECK: %[[VAL_29:.*]] = aie.lock(%[[VAL_24]], 0) +// CHECK: %[[VAL_30:.*]] = aie.buffer(%[[VAL_24]]) {sym_name = "buf42"} : memref<64xi32, 2> +// CHECK: %[[VAL_31:.*]] = aie.mem(%[[VAL_24]]) { +// CHECK: %[[VAL_32:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_29]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_30]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_29]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_29]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_30]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_29]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_33:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_33:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_27]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_28]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_27]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_27]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_28]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_27]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_34:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_34:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_25]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_26]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_25]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_25]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_26]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_25]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_35:.*]] = AIE.core(%[[VAL_24]]) { +// CHECK: %[[VAL_35:.*]] = aie.core(%[[VAL_24]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_29]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_27]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_25]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_29]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_27]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_25]], Acquire, 0) // CHECK: affine.for %[[VAL_36:.*]] = 0 to 64 { // CHECK: %[[VAL_37:.*]] = affine.load %[[VAL_30]]{{\[}}%[[VAL_36]]] : memref<64xi32, 2> // CHECK: %[[VAL_38:.*]] = affine.load %[[VAL_28]]{{\[}}%[[VAL_36]]] : memref<64xi32, 2> // CHECK: %[[VAL_39:.*]] = arith.muli %[[VAL_37]], %[[VAL_38]] : i32 // CHECK: affine.store %[[VAL_39]], %[[VAL_26]]{{\[}}%[[VAL_36]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_25]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_27]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_29]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_25]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_27]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_29]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.tile(43, 2) -// CHECK: %[[VAL_41:.*]] = AIE.tile(43, 1) -// CHECK: %[[VAL_42:.*]] = AIE.tile(43, 0) -// CHECK: %[[VAL_43:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_44:.*]] = AIE.tile(8, 5) -// CHECK: %[[VAL_45:.*]] = AIE.lock(%[[VAL_44]], 2) -// CHECK: %[[VAL_46:.*]] = AIE.buffer(%[[VAL_44]]) {sym_name = "buf41"} : memref<64xi32, 2> -// CHECK: %[[VAL_47:.*]] = AIE.lock(%[[VAL_44]], 1) -// CHECK: %[[VAL_48:.*]] = AIE.buffer(%[[VAL_44]]) {sym_name = "buf40"} : memref<64xi32, 2> -// CHECK: %[[VAL_49:.*]] = AIE.lock(%[[VAL_44]], 0) -// CHECK: %[[VAL_50:.*]] = AIE.buffer(%[[VAL_44]]) {sym_name = "buf39"} : memref<64xi32, 2> -// CHECK: %[[VAL_51:.*]] = AIE.mem(%[[VAL_44]]) { -// CHECK: %[[VAL_52:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_40:.*]] = aie.tile(43, 2) +// CHECK: %[[VAL_41:.*]] = aie.tile(43, 1) +// CHECK: %[[VAL_42:.*]] = aie.tile(43, 0) +// CHECK: %[[VAL_43:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_44:.*]] = aie.tile(8, 5) +// CHECK: %[[VAL_45:.*]] = aie.lock(%[[VAL_44]], 2) +// CHECK: %[[VAL_46:.*]] = aie.buffer(%[[VAL_44]]) {sym_name = "buf41"} : memref<64xi32, 2> +// CHECK: %[[VAL_47:.*]] = aie.lock(%[[VAL_44]], 1) +// CHECK: %[[VAL_48:.*]] = aie.buffer(%[[VAL_44]]) {sym_name = "buf40"} : memref<64xi32, 2> +// CHECK: %[[VAL_49:.*]] = aie.lock(%[[VAL_44]], 0) +// CHECK: %[[VAL_50:.*]] = aie.buffer(%[[VAL_44]]) {sym_name = "buf39"} : memref<64xi32, 2> +// CHECK: %[[VAL_51:.*]] = aie.mem(%[[VAL_44]]) { +// CHECK: %[[VAL_52:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_49]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_50]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_49]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_49]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_50]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_49]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_53:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_53:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_47]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_48]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_47]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_47]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_48]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_47]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_54:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_54:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_45]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_46]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_45]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_45]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_46]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_45]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_55:.*]] = AIE.core(%[[VAL_44]]) { +// CHECK: %[[VAL_55:.*]] = aie.core(%[[VAL_44]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_49]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_47]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_45]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_49]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_47]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_45]], Acquire, 0) // CHECK: affine.for %[[VAL_56:.*]] = 0 to 64 { // CHECK: %[[VAL_57:.*]] = affine.load %[[VAL_50]]{{\[}}%[[VAL_56]]] : memref<64xi32, 2> // CHECK: %[[VAL_58:.*]] = affine.load %[[VAL_48]]{{\[}}%[[VAL_56]]] : memref<64xi32, 2> // CHECK: %[[VAL_59:.*]] = arith.muli %[[VAL_57]], %[[VAL_58]] : i32 // CHECK: affine.store %[[VAL_59]], %[[VAL_46]]{{\[}}%[[VAL_56]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_45]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_47]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_49]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_45]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_47]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_49]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_60:.*]] = AIE.tile(42, 2) -// CHECK: %[[VAL_61:.*]] = AIE.tile(42, 1) -// CHECK: %[[VAL_62:.*]] = AIE.tile(42, 0) -// CHECK: %[[VAL_63:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_64:.*]] = AIE.tile(7, 5) -// CHECK: %[[VAL_65:.*]] = AIE.lock(%[[VAL_64]], 2) -// CHECK: %[[VAL_66:.*]] = AIE.buffer(%[[VAL_64]]) {sym_name = "buf38"} : memref<64xi32, 2> -// CHECK: %[[VAL_67:.*]] = AIE.lock(%[[VAL_64]], 1) -// CHECK: %[[VAL_68:.*]] = AIE.buffer(%[[VAL_64]]) {sym_name = "buf37"} : memref<64xi32, 2> -// CHECK: %[[VAL_69:.*]] = AIE.lock(%[[VAL_64]], 0) -// CHECK: %[[VAL_70:.*]] = AIE.buffer(%[[VAL_64]]) {sym_name = "buf36"} : memref<64xi32, 2> -// CHECK: %[[VAL_71:.*]] = AIE.mem(%[[VAL_64]]) { -// CHECK: %[[VAL_72:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_60:.*]] = aie.tile(42, 2) +// CHECK: %[[VAL_61:.*]] = aie.tile(42, 1) +// CHECK: %[[VAL_62:.*]] = aie.tile(42, 0) +// CHECK: %[[VAL_63:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_64:.*]] = aie.tile(7, 5) +// CHECK: %[[VAL_65:.*]] = aie.lock(%[[VAL_64]], 2) +// CHECK: %[[VAL_66:.*]] = aie.buffer(%[[VAL_64]]) {sym_name = "buf38"} : memref<64xi32, 2> +// CHECK: %[[VAL_67:.*]] = aie.lock(%[[VAL_64]], 1) +// CHECK: %[[VAL_68:.*]] = aie.buffer(%[[VAL_64]]) {sym_name = "buf37"} : memref<64xi32, 2> +// CHECK: %[[VAL_69:.*]] = aie.lock(%[[VAL_64]], 0) +// CHECK: %[[VAL_70:.*]] = aie.buffer(%[[VAL_64]]) {sym_name = "buf36"} : memref<64xi32, 2> +// CHECK: %[[VAL_71:.*]] = aie.mem(%[[VAL_64]]) { +// CHECK: %[[VAL_72:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_69]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_70]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_69]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_69]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_70]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_69]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_73:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_73:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_67]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_68]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_67]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_67]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_68]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_67]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_74:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_74:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_65]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_66]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_65]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_65]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_66]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_65]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_75:.*]] = AIE.core(%[[VAL_64]]) { +// CHECK: %[[VAL_75:.*]] = aie.core(%[[VAL_64]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_69]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_67]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_65]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_69]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_67]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_65]], Acquire, 0) // CHECK: affine.for %[[VAL_76:.*]] = 0 to 64 { // CHECK: %[[VAL_77:.*]] = affine.load %[[VAL_70]]{{\[}}%[[VAL_76]]] : memref<64xi32, 2> // CHECK: %[[VAL_78:.*]] = affine.load %[[VAL_68]]{{\[}}%[[VAL_76]]] : memref<64xi32, 2> // CHECK: %[[VAL_79:.*]] = arith.muli %[[VAL_77]], %[[VAL_78]] : i32 // CHECK: affine.store %[[VAL_79]], %[[VAL_66]]{{\[}}%[[VAL_76]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_65]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_67]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_69]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_65]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_67]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_69]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_80:.*]] = AIE.tile(35, 2) -// CHECK: %[[VAL_81:.*]] = AIE.tile(35, 1) -// CHECK: %[[VAL_82:.*]] = AIE.tile(35, 0) -// CHECK: %[[VAL_83:.*]] = AIE.tile(10, 4) -// CHECK: %[[VAL_84:.*]] = AIE.lock(%[[VAL_83]], 2) -// CHECK: %[[VAL_85:.*]] = AIE.buffer(%[[VAL_83]]) {sym_name = "buf35"} : memref<64xi32, 2> -// CHECK: %[[VAL_86:.*]] = AIE.lock(%[[VAL_83]], 1) -// CHECK: %[[VAL_87:.*]] = AIE.buffer(%[[VAL_83]]) {sym_name = "buf34"} : memref<64xi32, 2> -// CHECK: %[[VAL_88:.*]] = AIE.lock(%[[VAL_83]], 0) -// CHECK: %[[VAL_89:.*]] = AIE.buffer(%[[VAL_83]]) {sym_name = "buf33"} : memref<64xi32, 2> -// CHECK: %[[VAL_90:.*]] = AIE.mem(%[[VAL_83]]) { -// CHECK: %[[VAL_91:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_80:.*]] = aie.tile(35, 2) +// CHECK: %[[VAL_81:.*]] = aie.tile(35, 1) +// CHECK: %[[VAL_82:.*]] = aie.tile(35, 0) +// CHECK: %[[VAL_83:.*]] = aie.tile(10, 4) +// CHECK: %[[VAL_84:.*]] = aie.lock(%[[VAL_83]], 2) +// CHECK: %[[VAL_85:.*]] = aie.buffer(%[[VAL_83]]) {sym_name = "buf35"} : memref<64xi32, 2> +// CHECK: %[[VAL_86:.*]] = aie.lock(%[[VAL_83]], 1) +// CHECK: %[[VAL_87:.*]] = aie.buffer(%[[VAL_83]]) {sym_name = "buf34"} : memref<64xi32, 2> +// CHECK: %[[VAL_88:.*]] = aie.lock(%[[VAL_83]], 0) +// CHECK: %[[VAL_89:.*]] = aie.buffer(%[[VAL_83]]) {sym_name = "buf33"} : memref<64xi32, 2> +// CHECK: %[[VAL_90:.*]] = aie.mem(%[[VAL_83]]) { +// CHECK: %[[VAL_91:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_88]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_89]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_88]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_88]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_89]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_88]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_92:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_92:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_86]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_87]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_86]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_86]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_87]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_86]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_93:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_93:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_84]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_85]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_84]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_84]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_85]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_84]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_94:.*]] = AIE.core(%[[VAL_83]]) { +// CHECK: %[[VAL_94:.*]] = aie.core(%[[VAL_83]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_88]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_86]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_84]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_88]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_86]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_84]], Acquire, 0) // CHECK: affine.for %[[VAL_95:.*]] = 0 to 64 { // CHECK: %[[VAL_96:.*]] = affine.load %[[VAL_89]]{{\[}}%[[VAL_95]]] : memref<64xi32, 2> // CHECK: %[[VAL_97:.*]] = affine.load %[[VAL_87]]{{\[}}%[[VAL_95]]] : memref<64xi32, 2> // CHECK: %[[VAL_98:.*]] = arith.muli %[[VAL_96]], %[[VAL_97]] : i32 // CHECK: affine.store %[[VAL_98]], %[[VAL_85]]{{\[}}%[[VAL_95]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_84]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_86]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_88]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_84]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_86]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_88]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_99:.*]] = AIE.tile(34, 2) -// CHECK: %[[VAL_100:.*]] = AIE.tile(34, 1) -// CHECK: %[[VAL_101:.*]] = AIE.tile(34, 0) -// CHECK: %[[VAL_102:.*]] = AIE.tile(9, 4) -// CHECK: %[[VAL_103:.*]] = AIE.lock(%[[VAL_102]], 2) -// CHECK: %[[VAL_104:.*]] = AIE.buffer(%[[VAL_102]]) {sym_name = "buf32"} : memref<64xi32, 2> -// CHECK: %[[VAL_105:.*]] = AIE.lock(%[[VAL_102]], 1) -// CHECK: %[[VAL_106:.*]] = AIE.buffer(%[[VAL_102]]) {sym_name = "buf31"} : memref<64xi32, 2> -// CHECK: %[[VAL_107:.*]] = AIE.lock(%[[VAL_102]], 0) -// CHECK: %[[VAL_108:.*]] = AIE.buffer(%[[VAL_102]]) {sym_name = "buf30"} : memref<64xi32, 2> -// CHECK: %[[VAL_109:.*]] = AIE.mem(%[[VAL_102]]) { -// CHECK: %[[VAL_110:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_99:.*]] = aie.tile(34, 2) +// CHECK: %[[VAL_100:.*]] = aie.tile(34, 1) +// CHECK: %[[VAL_101:.*]] = aie.tile(34, 0) +// CHECK: %[[VAL_102:.*]] = aie.tile(9, 4) +// CHECK: %[[VAL_103:.*]] = aie.lock(%[[VAL_102]], 2) +// CHECK: %[[VAL_104:.*]] = aie.buffer(%[[VAL_102]]) {sym_name = "buf32"} : memref<64xi32, 2> +// CHECK: %[[VAL_105:.*]] = aie.lock(%[[VAL_102]], 1) +// CHECK: %[[VAL_106:.*]] = aie.buffer(%[[VAL_102]]) {sym_name = "buf31"} : memref<64xi32, 2> +// CHECK: %[[VAL_107:.*]] = aie.lock(%[[VAL_102]], 0) +// CHECK: %[[VAL_108:.*]] = aie.buffer(%[[VAL_102]]) {sym_name = "buf30"} : memref<64xi32, 2> +// CHECK: %[[VAL_109:.*]] = aie.mem(%[[VAL_102]]) { +// CHECK: %[[VAL_110:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_107]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_108]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_107]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_107]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_108]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_107]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_111:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_111:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_105]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_106]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_105]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_105]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_106]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_105]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_112:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_112:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_103]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_104]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_103]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_103]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_104]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_103]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_113:.*]] = AIE.core(%[[VAL_102]]) { +// CHECK: %[[VAL_113:.*]] = aie.core(%[[VAL_102]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_107]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_105]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_103]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_107]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_105]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_103]], Acquire, 0) // CHECK: affine.for %[[VAL_114:.*]] = 0 to 64 { // CHECK: %[[VAL_115:.*]] = affine.load %[[VAL_108]]{{\[}}%[[VAL_114]]] : memref<64xi32, 2> // CHECK: %[[VAL_116:.*]] = affine.load %[[VAL_106]]{{\[}}%[[VAL_114]]] : memref<64xi32, 2> // CHECK: %[[VAL_117:.*]] = arith.muli %[[VAL_115]], %[[VAL_116]] : i32 // CHECK: affine.store %[[VAL_117]], %[[VAL_104]]{{\[}}%[[VAL_114]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_103]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_105]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_107]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_103]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_105]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_107]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_118:.*]] = AIE.tile(27, 2) -// CHECK: %[[VAL_119:.*]] = AIE.tile(27, 1) -// CHECK: %[[VAL_120:.*]] = AIE.tile(27, 0) -// CHECK: %[[VAL_121:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_122:.*]] = AIE.tile(8, 4) -// CHECK: %[[VAL_123:.*]] = AIE.lock(%[[VAL_122]], 2) -// CHECK: %[[VAL_124:.*]] = AIE.buffer(%[[VAL_122]]) {sym_name = "buf29"} : memref<64xi32, 2> -// CHECK: %[[VAL_125:.*]] = AIE.lock(%[[VAL_122]], 1) -// CHECK: %[[VAL_126:.*]] = AIE.buffer(%[[VAL_122]]) {sym_name = "buf28"} : memref<64xi32, 2> -// CHECK: %[[VAL_127:.*]] = AIE.lock(%[[VAL_122]], 0) -// CHECK: %[[VAL_128:.*]] = AIE.buffer(%[[VAL_122]]) {sym_name = "buf27"} : memref<64xi32, 2> -// CHECK: %[[VAL_129:.*]] = AIE.mem(%[[VAL_122]]) { -// CHECK: %[[VAL_130:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_118:.*]] = aie.tile(27, 2) +// CHECK: %[[VAL_119:.*]] = aie.tile(27, 1) +// CHECK: %[[VAL_120:.*]] = aie.tile(27, 0) +// CHECK: %[[VAL_121:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_122:.*]] = aie.tile(8, 4) +// CHECK: %[[VAL_123:.*]] = aie.lock(%[[VAL_122]], 2) +// CHECK: %[[VAL_124:.*]] = aie.buffer(%[[VAL_122]]) {sym_name = "buf29"} : memref<64xi32, 2> +// CHECK: %[[VAL_125:.*]] = aie.lock(%[[VAL_122]], 1) +// CHECK: %[[VAL_126:.*]] = aie.buffer(%[[VAL_122]]) {sym_name = "buf28"} : memref<64xi32, 2> +// CHECK: %[[VAL_127:.*]] = aie.lock(%[[VAL_122]], 0) +// CHECK: %[[VAL_128:.*]] = aie.buffer(%[[VAL_122]]) {sym_name = "buf27"} : memref<64xi32, 2> +// CHECK: %[[VAL_129:.*]] = aie.mem(%[[VAL_122]]) { +// CHECK: %[[VAL_130:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_127]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_128]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_127]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_127]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_128]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_127]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_131:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_131:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_125]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_126]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_125]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_125]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_126]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_125]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_132:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_132:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_123]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_124]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_123]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_123]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_124]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_123]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_133:.*]] = AIE.core(%[[VAL_122]]) { +// CHECK: %[[VAL_133:.*]] = aie.core(%[[VAL_122]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_127]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_125]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_123]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_127]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_125]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_123]], Acquire, 0) // CHECK: affine.for %[[VAL_134:.*]] = 0 to 64 { // CHECK: %[[VAL_135:.*]] = affine.load %[[VAL_128]]{{\[}}%[[VAL_134]]] : memref<64xi32, 2> // CHECK: %[[VAL_136:.*]] = affine.load %[[VAL_126]]{{\[}}%[[VAL_134]]] : memref<64xi32, 2> // CHECK: %[[VAL_137:.*]] = arith.muli %[[VAL_135]], %[[VAL_136]] : i32 // CHECK: affine.store %[[VAL_137]], %[[VAL_124]]{{\[}}%[[VAL_134]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_123]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_125]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_127]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_123]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_125]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_127]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_138:.*]] = AIE.tile(26, 2) -// CHECK: %[[VAL_139:.*]] = AIE.tile(26, 1) -// CHECK: %[[VAL_140:.*]] = AIE.tile(26, 0) -// CHECK: %[[VAL_141:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_142:.*]] = AIE.tile(7, 4) -// CHECK: %[[VAL_143:.*]] = AIE.lock(%[[VAL_142]], 2) -// CHECK: %[[VAL_144:.*]] = AIE.buffer(%[[VAL_142]]) {sym_name = "buf26"} : memref<64xi32, 2> -// CHECK: %[[VAL_145:.*]] = AIE.lock(%[[VAL_142]], 1) -// CHECK: %[[VAL_146:.*]] = AIE.buffer(%[[VAL_142]]) {sym_name = "buf25"} : memref<64xi32, 2> -// CHECK: %[[VAL_147:.*]] = AIE.lock(%[[VAL_142]], 0) -// CHECK: %[[VAL_148:.*]] = AIE.buffer(%[[VAL_142]]) {sym_name = "buf24"} : memref<64xi32, 2> -// CHECK: %[[VAL_149:.*]] = AIE.mem(%[[VAL_142]]) { -// CHECK: %[[VAL_150:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_138:.*]] = aie.tile(26, 2) +// CHECK: %[[VAL_139:.*]] = aie.tile(26, 1) +// CHECK: %[[VAL_140:.*]] = aie.tile(26, 0) +// CHECK: %[[VAL_141:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_142:.*]] = aie.tile(7, 4) +// CHECK: %[[VAL_143:.*]] = aie.lock(%[[VAL_142]], 2) +// CHECK: %[[VAL_144:.*]] = aie.buffer(%[[VAL_142]]) {sym_name = "buf26"} : memref<64xi32, 2> +// CHECK: %[[VAL_145:.*]] = aie.lock(%[[VAL_142]], 1) +// CHECK: %[[VAL_146:.*]] = aie.buffer(%[[VAL_142]]) {sym_name = "buf25"} : memref<64xi32, 2> +// CHECK: %[[VAL_147:.*]] = aie.lock(%[[VAL_142]], 0) +// CHECK: %[[VAL_148:.*]] = aie.buffer(%[[VAL_142]]) {sym_name = "buf24"} : memref<64xi32, 2> +// CHECK: %[[VAL_149:.*]] = aie.mem(%[[VAL_142]]) { +// CHECK: %[[VAL_150:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_147]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_148]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_147]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_147]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_148]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_147]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_151:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_151:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_145]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_146]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_145]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_145]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_146]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_145]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_152:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_152:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_143]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_144]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_143]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_143]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_144]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_143]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_153:.*]] = AIE.core(%[[VAL_142]]) { +// CHECK: %[[VAL_153:.*]] = aie.core(%[[VAL_142]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_147]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_145]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_143]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_147]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_145]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_143]], Acquire, 0) // CHECK: affine.for %[[VAL_154:.*]] = 0 to 64 { // CHECK: %[[VAL_155:.*]] = affine.load %[[VAL_148]]{{\[}}%[[VAL_154]]] : memref<64xi32, 2> // CHECK: %[[VAL_156:.*]] = affine.load %[[VAL_146]]{{\[}}%[[VAL_154]]] : memref<64xi32, 2> // CHECK: %[[VAL_157:.*]] = arith.muli %[[VAL_155]], %[[VAL_156]] : i32 // CHECK: affine.store %[[VAL_157]], %[[VAL_144]]{{\[}}%[[VAL_154]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_143]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_145]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_147]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_143]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_145]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_147]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_158:.*]] = AIE.tile(19, 2) -// CHECK: %[[VAL_159:.*]] = AIE.tile(19, 1) -// CHECK: %[[VAL_160:.*]] = AIE.tile(19, 0) -// CHECK: %[[VAL_161:.*]] = AIE.tile(10, 3) -// CHECK: %[[VAL_162:.*]] = AIE.lock(%[[VAL_161]], 2) -// CHECK: %[[VAL_163:.*]] = AIE.buffer(%[[VAL_161]]) {sym_name = "buf23"} : memref<64xi32, 2> -// CHECK: %[[VAL_164:.*]] = AIE.lock(%[[VAL_161]], 1) -// CHECK: %[[VAL_165:.*]] = AIE.buffer(%[[VAL_161]]) {sym_name = "buf22"} : memref<64xi32, 2> -// CHECK: %[[VAL_166:.*]] = AIE.lock(%[[VAL_161]], 0) -// CHECK: %[[VAL_167:.*]] = AIE.buffer(%[[VAL_161]]) {sym_name = "buf21"} : memref<64xi32, 2> -// CHECK: %[[VAL_168:.*]] = AIE.mem(%[[VAL_161]]) { -// CHECK: %[[VAL_169:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_158:.*]] = aie.tile(19, 2) +// CHECK: %[[VAL_159:.*]] = aie.tile(19, 1) +// CHECK: %[[VAL_160:.*]] = aie.tile(19, 0) +// CHECK: %[[VAL_161:.*]] = aie.tile(10, 3) +// CHECK: %[[VAL_162:.*]] = aie.lock(%[[VAL_161]], 2) +// CHECK: %[[VAL_163:.*]] = aie.buffer(%[[VAL_161]]) {sym_name = "buf23"} : memref<64xi32, 2> +// CHECK: %[[VAL_164:.*]] = aie.lock(%[[VAL_161]], 1) +// CHECK: %[[VAL_165:.*]] = aie.buffer(%[[VAL_161]]) {sym_name = "buf22"} : memref<64xi32, 2> +// CHECK: %[[VAL_166:.*]] = aie.lock(%[[VAL_161]], 0) +// CHECK: %[[VAL_167:.*]] = aie.buffer(%[[VAL_161]]) {sym_name = "buf21"} : memref<64xi32, 2> +// CHECK: %[[VAL_168:.*]] = aie.mem(%[[VAL_161]]) { +// CHECK: %[[VAL_169:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_166]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_167]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_166]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_166]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_167]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_166]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_170:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_170:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_164]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_165]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_164]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_164]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_165]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_164]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_171:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_171:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_162]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_163]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_162]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_162]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_163]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_162]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_172:.*]] = AIE.core(%[[VAL_161]]) { +// CHECK: %[[VAL_172:.*]] = aie.core(%[[VAL_161]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_166]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_164]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_162]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_166]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_164]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_162]], Acquire, 0) // CHECK: affine.for %[[VAL_173:.*]] = 0 to 64 { // CHECK: %[[VAL_174:.*]] = affine.load %[[VAL_167]]{{\[}}%[[VAL_173]]] : memref<64xi32, 2> // CHECK: %[[VAL_175:.*]] = affine.load %[[VAL_165]]{{\[}}%[[VAL_173]]] : memref<64xi32, 2> // CHECK: %[[VAL_176:.*]] = arith.muli %[[VAL_174]], %[[VAL_175]] : i32 // CHECK: affine.store %[[VAL_176]], %[[VAL_163]]{{\[}}%[[VAL_173]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_162]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_164]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_166]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_162]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_164]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_166]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_177:.*]] = AIE.tile(18, 2) -// CHECK: %[[VAL_178:.*]] = AIE.tile(18, 1) -// CHECK: %[[VAL_179:.*]] = AIE.tile(18, 0) -// CHECK: %[[VAL_180:.*]] = AIE.tile(9, 3) -// CHECK: %[[VAL_181:.*]] = AIE.lock(%[[VAL_180]], 2) -// CHECK: %[[VAL_182:.*]] = AIE.buffer(%[[VAL_180]]) {sym_name = "buf20"} : memref<64xi32, 2> -// CHECK: %[[VAL_183:.*]] = AIE.lock(%[[VAL_180]], 1) -// CHECK: %[[VAL_184:.*]] = AIE.buffer(%[[VAL_180]]) {sym_name = "buf19"} : memref<64xi32, 2> -// CHECK: %[[VAL_185:.*]] = AIE.lock(%[[VAL_180]], 0) -// CHECK: %[[VAL_186:.*]] = AIE.buffer(%[[VAL_180]]) {sym_name = "buf18"} : memref<64xi32, 2> -// CHECK: %[[VAL_187:.*]] = AIE.mem(%[[VAL_180]]) { -// CHECK: %[[VAL_188:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_177:.*]] = aie.tile(18, 2) +// CHECK: %[[VAL_178:.*]] = aie.tile(18, 1) +// CHECK: %[[VAL_179:.*]] = aie.tile(18, 0) +// CHECK: %[[VAL_180:.*]] = aie.tile(9, 3) +// CHECK: %[[VAL_181:.*]] = aie.lock(%[[VAL_180]], 2) +// CHECK: %[[VAL_182:.*]] = aie.buffer(%[[VAL_180]]) {sym_name = "buf20"} : memref<64xi32, 2> +// CHECK: %[[VAL_183:.*]] = aie.lock(%[[VAL_180]], 1) +// CHECK: %[[VAL_184:.*]] = aie.buffer(%[[VAL_180]]) {sym_name = "buf19"} : memref<64xi32, 2> +// CHECK: %[[VAL_185:.*]] = aie.lock(%[[VAL_180]], 0) +// CHECK: %[[VAL_186:.*]] = aie.buffer(%[[VAL_180]]) {sym_name = "buf18"} : memref<64xi32, 2> +// CHECK: %[[VAL_187:.*]] = aie.mem(%[[VAL_180]]) { +// CHECK: %[[VAL_188:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_185]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_186]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_185]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_185]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_186]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_185]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_189:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_189:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_183]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_184]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_183]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_183]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_184]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_183]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_190:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_190:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_181]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_182]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_181]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_181]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_182]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_181]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_191:.*]] = AIE.core(%[[VAL_180]]) { +// CHECK: %[[VAL_191:.*]] = aie.core(%[[VAL_180]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_185]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_183]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_181]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_185]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_183]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_181]], Acquire, 0) // CHECK: affine.for %[[VAL_192:.*]] = 0 to 64 { // CHECK: %[[VAL_193:.*]] = affine.load %[[VAL_186]]{{\[}}%[[VAL_192]]] : memref<64xi32, 2> // CHECK: %[[VAL_194:.*]] = affine.load %[[VAL_184]]{{\[}}%[[VAL_192]]] : memref<64xi32, 2> // CHECK: %[[VAL_195:.*]] = arith.muli %[[VAL_193]], %[[VAL_194]] : i32 // CHECK: affine.store %[[VAL_195]], %[[VAL_182]]{{\[}}%[[VAL_192]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_181]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_183]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_185]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_181]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_183]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_185]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_196:.*]] = AIE.tile(11, 2) -// CHECK: %[[VAL_197:.*]] = AIE.tile(11, 1) -// CHECK: %[[VAL_198:.*]] = AIE.tile(11, 0) -// CHECK: %[[VAL_199:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_200:.*]] = AIE.tile(8, 3) -// CHECK: %[[VAL_201:.*]] = AIE.lock(%[[VAL_200]], 2) -// CHECK: %[[VAL_202:.*]] = AIE.buffer(%[[VAL_200]]) {sym_name = "buf17"} : memref<64xi32, 2> -// CHECK: %[[VAL_203:.*]] = AIE.lock(%[[VAL_200]], 1) -// CHECK: %[[VAL_204:.*]] = AIE.buffer(%[[VAL_200]]) {sym_name = "buf16"} : memref<64xi32, 2> -// CHECK: %[[VAL_205:.*]] = AIE.lock(%[[VAL_200]], 0) -// CHECK: %[[VAL_206:.*]] = AIE.buffer(%[[VAL_200]]) {sym_name = "buf15"} : memref<64xi32, 2> -// CHECK: %[[VAL_207:.*]] = AIE.mem(%[[VAL_200]]) { -// CHECK: %[[VAL_208:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_196:.*]] = aie.tile(11, 2) +// CHECK: %[[VAL_197:.*]] = aie.tile(11, 1) +// CHECK: %[[VAL_198:.*]] = aie.tile(11, 0) +// CHECK: %[[VAL_199:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_200:.*]] = aie.tile(8, 3) +// CHECK: %[[VAL_201:.*]] = aie.lock(%[[VAL_200]], 2) +// CHECK: %[[VAL_202:.*]] = aie.buffer(%[[VAL_200]]) {sym_name = "buf17"} : memref<64xi32, 2> +// CHECK: %[[VAL_203:.*]] = aie.lock(%[[VAL_200]], 1) +// CHECK: %[[VAL_204:.*]] = aie.buffer(%[[VAL_200]]) {sym_name = "buf16"} : memref<64xi32, 2> +// CHECK: %[[VAL_205:.*]] = aie.lock(%[[VAL_200]], 0) +// CHECK: %[[VAL_206:.*]] = aie.buffer(%[[VAL_200]]) {sym_name = "buf15"} : memref<64xi32, 2> +// CHECK: %[[VAL_207:.*]] = aie.mem(%[[VAL_200]]) { +// CHECK: %[[VAL_208:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_205]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_206]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_205]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_205]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_206]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_205]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_209:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_209:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_203]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_204]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_203]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_203]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_204]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_203]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_210:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_210:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_201]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_202]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_201]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_201]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_202]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_201]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_211:.*]] = AIE.core(%[[VAL_200]]) { +// CHECK: %[[VAL_211:.*]] = aie.core(%[[VAL_200]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_205]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_203]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_201]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_205]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_203]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_201]], Acquire, 0) // CHECK: affine.for %[[VAL_212:.*]] = 0 to 64 { // CHECK: %[[VAL_213:.*]] = affine.load %[[VAL_206]]{{\[}}%[[VAL_212]]] : memref<64xi32, 2> // CHECK: %[[VAL_214:.*]] = affine.load %[[VAL_204]]{{\[}}%[[VAL_212]]] : memref<64xi32, 2> // CHECK: %[[VAL_215:.*]] = arith.muli %[[VAL_213]], %[[VAL_214]] : i32 // CHECK: affine.store %[[VAL_215]], %[[VAL_202]]{{\[}}%[[VAL_212]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_201]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_203]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_205]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_201]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_203]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_205]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_216:.*]] = AIE.tile(10, 1) -// CHECK: %[[VAL_217:.*]] = AIE.tile(10, 0) -// CHECK: %[[VAL_218:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_219:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_220:.*]] = AIE.lock(%[[VAL_219]], 2) -// CHECK: %[[VAL_221:.*]] = AIE.buffer(%[[VAL_219]]) {sym_name = "buf14"} : memref<64xi32, 2> -// CHECK: %[[VAL_222:.*]] = AIE.lock(%[[VAL_219]], 1) -// CHECK: %[[VAL_223:.*]] = AIE.buffer(%[[VAL_219]]) {sym_name = "buf13"} : memref<64xi32, 2> -// CHECK: %[[VAL_224:.*]] = AIE.lock(%[[VAL_219]], 0) -// CHECK: %[[VAL_225:.*]] = AIE.buffer(%[[VAL_219]]) {sym_name = "buf12"} : memref<64xi32, 2> -// CHECK: %[[VAL_226:.*]] = AIE.mem(%[[VAL_219]]) { -// CHECK: %[[VAL_227:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_216:.*]] = aie.tile(10, 1) +// CHECK: %[[VAL_217:.*]] = aie.tile(10, 0) +// CHECK: %[[VAL_218:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_219:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_220:.*]] = aie.lock(%[[VAL_219]], 2) +// CHECK: %[[VAL_221:.*]] = aie.buffer(%[[VAL_219]]) {sym_name = "buf14"} : memref<64xi32, 2> +// CHECK: %[[VAL_222:.*]] = aie.lock(%[[VAL_219]], 1) +// CHECK: %[[VAL_223:.*]] = aie.buffer(%[[VAL_219]]) {sym_name = "buf13"} : memref<64xi32, 2> +// CHECK: %[[VAL_224:.*]] = aie.lock(%[[VAL_219]], 0) +// CHECK: %[[VAL_225:.*]] = aie.buffer(%[[VAL_219]]) {sym_name = "buf12"} : memref<64xi32, 2> +// CHECK: %[[VAL_226:.*]] = aie.mem(%[[VAL_219]]) { +// CHECK: %[[VAL_227:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_224]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_225]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_224]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_224]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_225]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_224]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_228:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_228:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_222]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_223]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_222]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_222]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_223]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_222]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_229:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_229:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_220]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_221]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_220]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_220]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_221]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_220]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_230:.*]] = AIE.core(%[[VAL_219]]) { +// CHECK: %[[VAL_230:.*]] = aie.core(%[[VAL_219]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_224]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_222]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_220]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_224]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_222]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_220]], Acquire, 0) // CHECK: affine.for %[[VAL_231:.*]] = 0 to 64 { // CHECK: %[[VAL_232:.*]] = affine.load %[[VAL_225]]{{\[}}%[[VAL_231]]] : memref<64xi32, 2> // CHECK: %[[VAL_233:.*]] = affine.load %[[VAL_223]]{{\[}}%[[VAL_231]]] : memref<64xi32, 2> // CHECK: %[[VAL_234:.*]] = arith.muli %[[VAL_232]], %[[VAL_233]] : i32 // CHECK: affine.store %[[VAL_234]], %[[VAL_221]]{{\[}}%[[VAL_231]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_220]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_222]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_224]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_220]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_222]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_224]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_235:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_236:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_237:.*]] = AIE.tile(10, 2) -// CHECK: %[[VAL_238:.*]] = AIE.lock(%[[VAL_237]], 2) -// CHECK: %[[VAL_239:.*]] = AIE.buffer(%[[VAL_237]]) {sym_name = "buf11"} : memref<64xi32, 2> -// CHECK: %[[VAL_240:.*]] = AIE.lock(%[[VAL_237]], 1) -// CHECK: %[[VAL_241:.*]] = AIE.buffer(%[[VAL_237]]) {sym_name = "buf10"} : memref<64xi32, 2> -// CHECK: %[[VAL_242:.*]] = AIE.lock(%[[VAL_237]], 0) -// CHECK: %[[VAL_243:.*]] = AIE.buffer(%[[VAL_237]]) {sym_name = "buf9"} : memref<64xi32, 2> -// CHECK: %[[VAL_244:.*]] = AIE.mem(%[[VAL_237]]) { -// CHECK: %[[VAL_245:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_235:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_236:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_237:.*]] = aie.tile(10, 2) +// CHECK: %[[VAL_238:.*]] = aie.lock(%[[VAL_237]], 2) +// CHECK: %[[VAL_239:.*]] = aie.buffer(%[[VAL_237]]) {sym_name = "buf11"} : memref<64xi32, 2> +// CHECK: %[[VAL_240:.*]] = aie.lock(%[[VAL_237]], 1) +// CHECK: %[[VAL_241:.*]] = aie.buffer(%[[VAL_237]]) {sym_name = "buf10"} : memref<64xi32, 2> +// CHECK: %[[VAL_242:.*]] = aie.lock(%[[VAL_237]], 0) +// CHECK: %[[VAL_243:.*]] = aie.buffer(%[[VAL_237]]) {sym_name = "buf9"} : memref<64xi32, 2> +// CHECK: %[[VAL_244:.*]] = aie.mem(%[[VAL_237]]) { +// CHECK: %[[VAL_245:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_242]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_243]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_242]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_242]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_243]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_242]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_246:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_246:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_240]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_241]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_240]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_240]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_241]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_240]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_247:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_247:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_238]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_239]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_238]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_238]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_239]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_238]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_248:.*]] = AIE.core(%[[VAL_237]]) { +// CHECK: %[[VAL_248:.*]] = aie.core(%[[VAL_237]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_242]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_240]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_238]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_242]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_240]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_238]], Acquire, 0) // CHECK: affine.for %[[VAL_249:.*]] = 0 to 64 { // CHECK: %[[VAL_250:.*]] = affine.load %[[VAL_243]]{{\[}}%[[VAL_249]]] : memref<64xi32, 2> // CHECK: %[[VAL_251:.*]] = affine.load %[[VAL_241]]{{\[}}%[[VAL_249]]] : memref<64xi32, 2> // CHECK: %[[VAL_252:.*]] = arith.muli %[[VAL_250]], %[[VAL_251]] : i32 // CHECK: affine.store %[[VAL_252]], %[[VAL_239]]{{\[}}%[[VAL_249]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_238]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_240]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_242]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_238]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_240]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_242]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_253:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_254:.*]] = AIE.tile(6, 1) -// CHECK: %[[VAL_255:.*]] = AIE.tile(6, 0) -// CHECK: %[[VAL_256:.*]] = AIE.tile(9, 2) -// CHECK: %[[VAL_257:.*]] = AIE.lock(%[[VAL_256]], 2) -// CHECK: %[[VAL_258:.*]] = AIE.buffer(%[[VAL_256]]) {sym_name = "buf8"} : memref<64xi32, 2> -// CHECK: %[[VAL_259:.*]] = AIE.lock(%[[VAL_256]], 1) -// CHECK: %[[VAL_260:.*]] = AIE.buffer(%[[VAL_256]]) {sym_name = "buf7"} : memref<64xi32, 2> -// CHECK: %[[VAL_261:.*]] = AIE.lock(%[[VAL_256]], 0) -// CHECK: %[[VAL_262:.*]] = AIE.buffer(%[[VAL_256]]) {sym_name = "buf6"} : memref<64xi32, 2> -// CHECK: %[[VAL_263:.*]] = AIE.mem(%[[VAL_256]]) { -// CHECK: %[[VAL_264:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_253:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_254:.*]] = aie.tile(6, 1) +// CHECK: %[[VAL_255:.*]] = aie.tile(6, 0) +// CHECK: %[[VAL_256:.*]] = aie.tile(9, 2) +// CHECK: %[[VAL_257:.*]] = aie.lock(%[[VAL_256]], 2) +// CHECK: %[[VAL_258:.*]] = aie.buffer(%[[VAL_256]]) {sym_name = "buf8"} : memref<64xi32, 2> +// CHECK: %[[VAL_259:.*]] = aie.lock(%[[VAL_256]], 1) +// CHECK: %[[VAL_260:.*]] = aie.buffer(%[[VAL_256]]) {sym_name = "buf7"} : memref<64xi32, 2> +// CHECK: %[[VAL_261:.*]] = aie.lock(%[[VAL_256]], 0) +// CHECK: %[[VAL_262:.*]] = aie.buffer(%[[VAL_256]]) {sym_name = "buf6"} : memref<64xi32, 2> +// CHECK: %[[VAL_263:.*]] = aie.mem(%[[VAL_256]]) { +// CHECK: %[[VAL_264:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_261]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_262]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_261]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_261]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_262]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_261]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_265:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_265:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_259]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_260]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_259]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_259]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_260]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_259]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_266:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_266:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_257]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_258]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_257]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_257]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_258]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_257]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_267:.*]] = AIE.core(%[[VAL_256]]) { +// CHECK: %[[VAL_267:.*]] = aie.core(%[[VAL_256]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_261]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_259]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_257]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_261]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_259]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_257]], Acquire, 0) // CHECK: affine.for %[[VAL_268:.*]] = 0 to 64 { // CHECK: %[[VAL_269:.*]] = affine.load %[[VAL_262]]{{\[}}%[[VAL_268]]] : memref<64xi32, 2> // CHECK: %[[VAL_270:.*]] = affine.load %[[VAL_260]]{{\[}}%[[VAL_268]]] : memref<64xi32, 2> // CHECK: %[[VAL_271:.*]] = arith.muli %[[VAL_269]], %[[VAL_270]] : i32 // CHECK: affine.store %[[VAL_271]], %[[VAL_258]]{{\[}}%[[VAL_268]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_257]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_259]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_261]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_257]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_259]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_261]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_272:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_273:.*]] = AIE.tile(3, 1) -// CHECK: %[[VAL_274:.*]] = AIE.tile(3, 0) -// CHECK: %[[VAL_275:.*]] = AIE.tile(1, 0) -// CHECK: %[[VAL_276:.*]] = AIE.tile(8, 2) -// CHECK: %[[VAL_277:.*]] = AIE.lock(%[[VAL_276]], 2) -// CHECK: %[[VAL_278:.*]] = AIE.buffer(%[[VAL_276]]) {sym_name = "buf5"} : memref<64xi32, 2> -// CHECK: %[[VAL_279:.*]] = AIE.lock(%[[VAL_276]], 1) -// CHECK: %[[VAL_280:.*]] = AIE.buffer(%[[VAL_276]]) {sym_name = "buf4"} : memref<64xi32, 2> -// CHECK: %[[VAL_281:.*]] = AIE.lock(%[[VAL_276]], 0) -// CHECK: %[[VAL_282:.*]] = AIE.buffer(%[[VAL_276]]) {sym_name = "buf3"} : memref<64xi32, 2> -// CHECK: %[[VAL_283:.*]] = AIE.mem(%[[VAL_276]]) { -// CHECK: %[[VAL_284:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_272:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_273:.*]] = aie.tile(3, 1) +// CHECK: %[[VAL_274:.*]] = aie.tile(3, 0) +// CHECK: %[[VAL_275:.*]] = aie.tile(1, 0) +// CHECK: %[[VAL_276:.*]] = aie.tile(8, 2) +// CHECK: %[[VAL_277:.*]] = aie.lock(%[[VAL_276]], 2) +// CHECK: %[[VAL_278:.*]] = aie.buffer(%[[VAL_276]]) {sym_name = "buf5"} : memref<64xi32, 2> +// CHECK: %[[VAL_279:.*]] = aie.lock(%[[VAL_276]], 1) +// CHECK: %[[VAL_280:.*]] = aie.buffer(%[[VAL_276]]) {sym_name = "buf4"} : memref<64xi32, 2> +// CHECK: %[[VAL_281:.*]] = aie.lock(%[[VAL_276]], 0) +// CHECK: %[[VAL_282:.*]] = aie.buffer(%[[VAL_276]]) {sym_name = "buf3"} : memref<64xi32, 2> +// CHECK: %[[VAL_283:.*]] = aie.mem(%[[VAL_276]]) { +// CHECK: %[[VAL_284:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_281]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_282]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_281]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_281]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_282]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_281]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_285:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_285:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_279]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_280]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_279]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_279]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_280]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_279]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_286:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_286:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_277]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_278]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_277]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_277]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_278]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_277]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_287:.*]] = AIE.core(%[[VAL_276]]) { +// CHECK: %[[VAL_287:.*]] = aie.core(%[[VAL_276]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_281]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_279]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_277]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_281]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_279]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_277]], Acquire, 0) // CHECK: affine.for %[[VAL_288:.*]] = 0 to 64 { // CHECK: %[[VAL_289:.*]] = affine.load %[[VAL_282]]{{\[}}%[[VAL_288]]] : memref<64xi32, 2> // CHECK: %[[VAL_290:.*]] = affine.load %[[VAL_280]]{{\[}}%[[VAL_288]]] : memref<64xi32, 2> // CHECK: %[[VAL_291:.*]] = arith.muli %[[VAL_289]], %[[VAL_290]] : i32 // CHECK: affine.store %[[VAL_291]], %[[VAL_278]]{{\[}}%[[VAL_288]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_277]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_279]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_281]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_277]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_279]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_281]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_292:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_293:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_294:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_295:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_296:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_297:.*]] = AIE.lock(%[[VAL_296]], 2) -// CHECK: %[[VAL_298:.*]] = AIE.buffer(%[[VAL_296]]) {sym_name = "buf2"} : memref<64xi32, 2> -// CHECK: %[[VAL_299:.*]] = AIE.lock(%[[VAL_296]], 1) -// CHECK: %[[VAL_300:.*]] = AIE.buffer(%[[VAL_296]]) {sym_name = "buf1"} : memref<64xi32, 2> -// CHECK: %[[VAL_301:.*]] = AIE.lock(%[[VAL_296]], 0) -// CHECK: %[[VAL_302:.*]] = AIE.buffer(%[[VAL_296]]) {sym_name = "buf0"} : memref<64xi32, 2> -// CHECK: %[[VAL_303:.*]] = AIE.mem(%[[VAL_296]]) { -// CHECK: %[[VAL_304:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_292:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_293:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_294:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_295:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_296:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_297:.*]] = aie.lock(%[[VAL_296]], 2) +// CHECK: %[[VAL_298:.*]] = aie.buffer(%[[VAL_296]]) {sym_name = "buf2"} : memref<64xi32, 2> +// CHECK: %[[VAL_299:.*]] = aie.lock(%[[VAL_296]], 1) +// CHECK: %[[VAL_300:.*]] = aie.buffer(%[[VAL_296]]) {sym_name = "buf1"} : memref<64xi32, 2> +// CHECK: %[[VAL_301:.*]] = aie.lock(%[[VAL_296]], 0) +// CHECK: %[[VAL_302:.*]] = aie.buffer(%[[VAL_296]]) {sym_name = "buf0"} : memref<64xi32, 2> +// CHECK: %[[VAL_303:.*]] = aie.mem(%[[VAL_296]]) { +// CHECK: %[[VAL_304:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_301]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_302]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_301]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_301]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_302]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_301]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: -// CHECK: %[[VAL_305:.*]] = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) +// CHECK: %[[VAL_305:.*]] = aie.dma_start(S2MM, 1, ^bb3, ^bb6) // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_299]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_300]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_299]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_299]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_300]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_299]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: -// CHECK: %[[VAL_306:.*]] = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) +// CHECK: %[[VAL_306:.*]] = aie.dma_start(MM2S, 0, ^bb5, ^bb2) // CHECK: ^bb5: -// CHECK: AIE.use_lock(%[[VAL_297]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_298]] : memref<64xi32, 2>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_297]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_297]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_298]] : memref<64xi32, 2>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_297]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb6: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_307:.*]] = AIE.core(%[[VAL_296]]) { +// CHECK: %[[VAL_307:.*]] = aie.core(%[[VAL_296]]) { // CHECK: cf.br ^bb1 // CHECK: ^bb1: // CHECK: cf.br ^bb2 // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_301]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_299]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_297]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_301]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_299]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_297]], Acquire, 0) // CHECK: affine.for %[[VAL_308:.*]] = 0 to 64 { // CHECK: %[[VAL_309:.*]] = affine.load %[[VAL_302]]{{\[}}%[[VAL_308]]] : memref<64xi32, 2> // CHECK: %[[VAL_310:.*]] = affine.load %[[VAL_300]]{{\[}}%[[VAL_308]]] : memref<64xi32, 2> // CHECK: %[[VAL_311:.*]] = arith.muli %[[VAL_309]], %[[VAL_310]] : i32 // CHECK: affine.store %[[VAL_311]], %[[VAL_298]]{{\[}}%[[VAL_308]]] : memref<64xi32, 2> // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_297]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_299]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_301]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_297]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_299]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_301]], Release, 0) // CHECK: cf.br ^bb1 // CHECK: } -// CHECK: %[[VAL_312:.*]] = AIE.switchbox(%[[VAL_294]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_313:.*]] = AIE.shim_mux(%[[VAL_294]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_314:.*]] = AIE.switchbox(%[[VAL_293]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_315:.*]] = AIE.switchbox(%[[VAL_292]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_316:.*]] = AIE.switchbox(%[[VAL_272]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_317:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_318:.*]] = AIE.switchbox(%[[VAL_317]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_319:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_320:.*]] = AIE.switchbox(%[[VAL_319]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_321:.*]] = AIE.switchbox(%[[VAL_253]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_322:.*]] = AIE.switchbox(%[[VAL_296]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_323:.*]] = AIE.switchbox(%[[VAL_274]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_324:.*]] = AIE.shim_mux(%[[VAL_274]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_325:.*]] = AIE.tile(4, 0) -// CHECK: %[[VAL_326:.*]] = AIE.switchbox(%[[VAL_325]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_327:.*]] = AIE.tile(5, 0) -// CHECK: %[[VAL_328:.*]] = AIE.switchbox(%[[VAL_327]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_329:.*]] = AIE.switchbox(%[[VAL_255]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_330:.*]] = AIE.switchbox(%[[VAL_254]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_331:.*]] = AIE.switchbox(%[[VAL_276]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_332:.*]] = AIE.shim_mux(%[[VAL_255]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_333:.*]] = AIE.switchbox(%[[VAL_236]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_334:.*]] = AIE.tile(8, 0) -// CHECK: %[[VAL_335:.*]] = AIE.switchbox(%[[VAL_334]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_336:.*]] = AIE.tile(9, 0) -// CHECK: %[[VAL_337:.*]] = AIE.switchbox(%[[VAL_336]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_338:.*]] = AIE.tile(9, 1) -// CHECK: %[[VAL_339:.*]] = AIE.switchbox(%[[VAL_338]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_340:.*]] = AIE.switchbox(%[[VAL_256]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_341:.*]] = AIE.switchbox(%[[VAL_273]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_342:.*]] = AIE.shim_mux(%[[VAL_236]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_343:.*]] = AIE.switchbox(%[[VAL_217]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_344:.*]] = AIE.switchbox(%[[VAL_216]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_345:.*]] = AIE.switchbox(%[[VAL_237]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_346:.*]] = AIE.switchbox(%[[VAL_219]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_347:.*]] = AIE.tile(8, 1) -// CHECK: %[[VAL_348:.*]] = AIE.switchbox(%[[VAL_347]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_349:.*]] = AIE.switchbox(%[[VAL_200]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_350:.*]] = AIE.shim_mux(%[[VAL_217]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_351:.*]] = AIE.switchbox(%[[VAL_235]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_352:.*]] = AIE.switchbox(%[[VAL_180]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_353:.*]] = AIE.switchbox(%[[VAL_198]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_354:.*]] = AIE.shim_mux(%[[VAL_198]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_355:.*]] = AIE.switchbox(%[[VAL_161]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_356:.*]] = AIE.tile(12, 0) -// CHECK: %[[VAL_357:.*]] = AIE.switchbox(%[[VAL_356]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_358:.*]] = AIE.tile(13, 0) -// CHECK: %[[VAL_359:.*]] = AIE.switchbox(%[[VAL_358]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_360:.*]] = AIE.tile(14, 0) -// CHECK: %[[VAL_361:.*]] = AIE.switchbox(%[[VAL_360]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_362:.*]] = AIE.tile(15, 0) -// CHECK: %[[VAL_363:.*]] = AIE.switchbox(%[[VAL_362]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_364:.*]] = AIE.tile(16, 0) -// CHECK: %[[VAL_365:.*]] = AIE.switchbox(%[[VAL_364]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_366:.*]] = AIE.tile(17, 0) -// CHECK: %[[VAL_367:.*]] = AIE.switchbox(%[[VAL_366]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_368:.*]] = AIE.switchbox(%[[VAL_179]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_369:.*]] = AIE.shim_mux(%[[VAL_179]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_370:.*]] = AIE.switchbox(%[[VAL_197]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_371:.*]] = AIE.switchbox(%[[VAL_196]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_372:.*]] = AIE.tile(11, 3) -// CHECK: %[[VAL_373:.*]] = AIE.switchbox(%[[VAL_372]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_374:.*]] = AIE.switchbox(%[[VAL_160]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_375:.*]] = AIE.shim_mux(%[[VAL_160]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_376:.*]] = AIE.switchbox(%[[VAL_142]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_377:.*]] = AIE.tile(12, 1) -// CHECK: %[[VAL_378:.*]] = AIE.switchbox(%[[VAL_377]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_379:.*]] = AIE.tile(13, 1) -// CHECK: %[[VAL_380:.*]] = AIE.switchbox(%[[VAL_379]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_381:.*]] = AIE.tile(14, 1) -// CHECK: %[[VAL_382:.*]] = AIE.switchbox(%[[VAL_381]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_383:.*]] = AIE.tile(15, 1) -// CHECK: %[[VAL_384:.*]] = AIE.switchbox(%[[VAL_383]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_385:.*]] = AIE.tile(16, 1) -// CHECK: %[[VAL_386:.*]] = AIE.switchbox(%[[VAL_385]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_387:.*]] = AIE.tile(17, 1) -// CHECK: %[[VAL_388:.*]] = AIE.switchbox(%[[VAL_387]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_389:.*]] = AIE.switchbox(%[[VAL_178]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_390:.*]] = AIE.tile(20, 0) -// CHECK: %[[VAL_391:.*]] = AIE.switchbox(%[[VAL_390]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_392:.*]] = AIE.tile(21, 0) -// CHECK: %[[VAL_393:.*]] = AIE.switchbox(%[[VAL_392]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_394:.*]] = AIE.tile(22, 0) -// CHECK: %[[VAL_395:.*]] = AIE.switchbox(%[[VAL_394]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_396:.*]] = AIE.tile(23, 0) -// CHECK: %[[VAL_397:.*]] = AIE.switchbox(%[[VAL_396]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_398:.*]] = AIE.tile(24, 0) -// CHECK: %[[VAL_399:.*]] = AIE.switchbox(%[[VAL_398]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_400:.*]] = AIE.tile(25, 0) -// CHECK: %[[VAL_401:.*]] = AIE.switchbox(%[[VAL_400]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_402:.*]] = AIE.switchbox(%[[VAL_140]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_403:.*]] = AIE.shim_mux(%[[VAL_140]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_404:.*]] = AIE.switchbox(%[[VAL_122]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_405:.*]] = AIE.switchbox(%[[VAL_102]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_406:.*]] = AIE.switchbox(%[[VAL_159]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_407:.*]] = AIE.switchbox(%[[VAL_120]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_408:.*]] = AIE.shim_mux(%[[VAL_120]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_409:.*]] = AIE.tile(12, 2) -// CHECK: %[[VAL_410:.*]] = AIE.switchbox(%[[VAL_409]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_411:.*]] = AIE.tile(13, 2) -// CHECK: %[[VAL_412:.*]] = AIE.switchbox(%[[VAL_411]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_413:.*]] = AIE.tile(14, 2) -// CHECK: %[[VAL_414:.*]] = AIE.switchbox(%[[VAL_413]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_415:.*]] = AIE.tile(15, 2) -// CHECK: %[[VAL_416:.*]] = AIE.switchbox(%[[VAL_415]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_417:.*]] = AIE.tile(16, 2) -// CHECK: %[[VAL_418:.*]] = AIE.switchbox(%[[VAL_417]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_419:.*]] = AIE.tile(17, 2) -// CHECK: %[[VAL_420:.*]] = AIE.switchbox(%[[VAL_419]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_421:.*]] = AIE.switchbox(%[[VAL_177]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_422:.*]] = AIE.switchbox(%[[VAL_158]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_423:.*]] = AIE.tile(20, 1) -// CHECK: %[[VAL_424:.*]] = AIE.switchbox(%[[VAL_423]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_425:.*]] = AIE.tile(20, 2) -// CHECK: %[[VAL_426:.*]] = AIE.switchbox(%[[VAL_425]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_427:.*]] = AIE.tile(21, 1) -// CHECK: %[[VAL_428:.*]] = AIE.switchbox(%[[VAL_427]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_429:.*]] = AIE.tile(22, 1) -// CHECK: %[[VAL_430:.*]] = AIE.switchbox(%[[VAL_429]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_431:.*]] = AIE.tile(23, 1) -// CHECK: %[[VAL_432:.*]] = AIE.switchbox(%[[VAL_431]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_433:.*]] = AIE.tile(24, 1) -// CHECK: %[[VAL_434:.*]] = AIE.switchbox(%[[VAL_433]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_435:.*]] = AIE.tile(25, 1) -// CHECK: %[[VAL_436:.*]] = AIE.switchbox(%[[VAL_435]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_437:.*]] = AIE.switchbox(%[[VAL_139]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_438:.*]] = AIE.tile(28, 0) -// CHECK: %[[VAL_439:.*]] = AIE.switchbox(%[[VAL_438]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_440:.*]] = AIE.tile(29, 0) -// CHECK: %[[VAL_441:.*]] = AIE.switchbox(%[[VAL_440]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_442:.*]] = AIE.tile(30, 0) -// CHECK: %[[VAL_443:.*]] = AIE.switchbox(%[[VAL_442]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_444:.*]] = AIE.tile(31, 0) -// CHECK: %[[VAL_445:.*]] = AIE.switchbox(%[[VAL_444]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_446:.*]] = AIE.tile(32, 0) -// CHECK: %[[VAL_447:.*]] = AIE.switchbox(%[[VAL_446]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_448:.*]] = AIE.tile(33, 0) -// CHECK: %[[VAL_449:.*]] = AIE.switchbox(%[[VAL_448]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_450:.*]] = AIE.switchbox(%[[VAL_101]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_451:.*]] = AIE.shim_mux(%[[VAL_101]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_452:.*]] = AIE.switchbox(%[[VAL_83]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_453:.*]] = AIE.tile(12, 3) -// CHECK: %[[VAL_454:.*]] = AIE.switchbox(%[[VAL_453]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_455:.*]] = AIE.tile(13, 3) -// CHECK: %[[VAL_456:.*]] = AIE.switchbox(%[[VAL_455]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_457:.*]] = AIE.tile(14, 3) -// CHECK: %[[VAL_458:.*]] = AIE.switchbox(%[[VAL_457]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_459:.*]] = AIE.tile(15, 3) -// CHECK: %[[VAL_460:.*]] = AIE.switchbox(%[[VAL_459]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_461:.*]] = AIE.tile(16, 3) -// CHECK: %[[VAL_462:.*]] = AIE.switchbox(%[[VAL_461]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_463:.*]] = AIE.tile(17, 3) -// CHECK: %[[VAL_464:.*]] = AIE.switchbox(%[[VAL_463]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_465:.*]] = AIE.tile(18, 3) -// CHECK: %[[VAL_466:.*]] = AIE.switchbox(%[[VAL_465]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_467:.*]] = AIE.tile(19, 3) -// CHECK: %[[VAL_468:.*]] = AIE.switchbox(%[[VAL_467]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_469:.*]] = AIE.tile(20, 3) -// CHECK: %[[VAL_470:.*]] = AIE.switchbox(%[[VAL_469]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_471:.*]] = AIE.switchbox(%[[VAL_119]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_472:.*]] = AIE.switchbox(%[[VAL_82]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_473:.*]] = AIE.shim_mux(%[[VAL_82]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_474:.*]] = AIE.switchbox(%[[VAL_64]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_475:.*]] = AIE.switchbox(%[[VAL_44]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_476:.*]] = AIE.switchbox(%[[VAL_24]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_477:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_478:.*]] = AIE.tile(11, 5) -// CHECK: %[[VAL_479:.*]] = AIE.switchbox(%[[VAL_478]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_480:.*]] = AIE.tile(12, 5) -// CHECK: %[[VAL_481:.*]] = AIE.switchbox(%[[VAL_480]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_482:.*]] = AIE.tile(13, 5) -// CHECK: %[[VAL_483:.*]] = AIE.switchbox(%[[VAL_482]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_484:.*]] = AIE.tile(14, 5) -// CHECK: %[[VAL_485:.*]] = AIE.switchbox(%[[VAL_484]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_486:.*]] = AIE.tile(15, 4) -// CHECK: %[[VAL_487:.*]] = AIE.switchbox(%[[VAL_486]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_488:.*]] = AIE.tile(15, 5) -// CHECK: %[[VAL_489:.*]] = AIE.switchbox(%[[VAL_488]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_490:.*]] = AIE.tile(21, 3) -// CHECK: %[[VAL_491:.*]] = AIE.switchbox(%[[VAL_490]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_492:.*]] = AIE.tile(22, 3) -// CHECK: %[[VAL_493:.*]] = AIE.switchbox(%[[VAL_492]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_494:.*]] = AIE.tile(23, 3) -// CHECK: %[[VAL_495:.*]] = AIE.switchbox(%[[VAL_494]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_496:.*]] = AIE.tile(24, 2) -// CHECK: %[[VAL_497:.*]] = AIE.switchbox(%[[VAL_496]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_498:.*]] = AIE.tile(24, 3) -// CHECK: %[[VAL_499:.*]] = AIE.switchbox(%[[VAL_498]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_500:.*]] = AIE.tile(25, 2) -// CHECK: %[[VAL_501:.*]] = AIE.switchbox(%[[VAL_500]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_502:.*]] = AIE.switchbox(%[[VAL_138]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_503:.*]] = AIE.tile(28, 1) -// CHECK: %[[VAL_504:.*]] = AIE.switchbox(%[[VAL_503]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_505:.*]] = AIE.tile(29, 1) -// CHECK: %[[VAL_506:.*]] = AIE.switchbox(%[[VAL_505]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_507:.*]] = AIE.tile(30, 1) -// CHECK: %[[VAL_508:.*]] = AIE.switchbox(%[[VAL_507]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_509:.*]] = AIE.tile(31, 1) -// CHECK: %[[VAL_510:.*]] = AIE.switchbox(%[[VAL_509]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_511:.*]] = AIE.tile(32, 1) -// CHECK: %[[VAL_512:.*]] = AIE.switchbox(%[[VAL_511]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_513:.*]] = AIE.tile(33, 1) -// CHECK: %[[VAL_514:.*]] = AIE.switchbox(%[[VAL_513]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_515:.*]] = AIE.switchbox(%[[VAL_100]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_516:.*]] = AIE.tile(36, 0) -// CHECK: %[[VAL_517:.*]] = AIE.switchbox(%[[VAL_516]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_518:.*]] = AIE.tile(37, 0) -// CHECK: %[[VAL_519:.*]] = AIE.switchbox(%[[VAL_518]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_520:.*]] = AIE.tile(38, 0) -// CHECK: %[[VAL_521:.*]] = AIE.switchbox(%[[VAL_520]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_522:.*]] = AIE.tile(39, 0) -// CHECK: %[[VAL_523:.*]] = AIE.switchbox(%[[VAL_522]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_524:.*]] = AIE.tile(40, 0) -// CHECK: %[[VAL_525:.*]] = AIE.switchbox(%[[VAL_524]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_526:.*]] = AIE.tile(41, 0) -// CHECK: %[[VAL_527:.*]] = AIE.switchbox(%[[VAL_526]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_528:.*]] = AIE.switchbox(%[[VAL_62]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_529:.*]] = AIE.shim_mux(%[[VAL_62]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_530:.*]] = AIE.tile(11, 4) -// CHECK: %[[VAL_531:.*]] = AIE.switchbox(%[[VAL_530]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_532:.*]] = AIE.tile(12, 4) -// CHECK: %[[VAL_533:.*]] = AIE.switchbox(%[[VAL_532]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_534:.*]] = AIE.tile(13, 4) -// CHECK: %[[VAL_535:.*]] = AIE.switchbox(%[[VAL_534]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_536:.*]] = AIE.tile(14, 4) -// CHECK: %[[VAL_537:.*]] = AIE.switchbox(%[[VAL_536]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_538:.*]] = AIE.tile(16, 4) -// CHECK: %[[VAL_539:.*]] = AIE.switchbox(%[[VAL_538]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_540:.*]] = AIE.tile(17, 4) -// CHECK: %[[VAL_541:.*]] = AIE.switchbox(%[[VAL_540]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_542:.*]] = AIE.tile(21, 2) -// CHECK: %[[VAL_543:.*]] = AIE.switchbox(%[[VAL_542]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_544:.*]] = AIE.tile(22, 2) -// CHECK: %[[VAL_545:.*]] = AIE.switchbox(%[[VAL_544]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_546:.*]] = AIE.tile(23, 2) -// CHECK: %[[VAL_547:.*]] = AIE.switchbox(%[[VAL_546]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_548:.*]] = AIE.switchbox(%[[VAL_118]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_549:.*]] = AIE.switchbox(%[[VAL_81]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_550:.*]] = AIE.switchbox(%[[VAL_42]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_551:.*]] = AIE.shim_mux(%[[VAL_42]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_552:.*]] = AIE.tile(18, 4) -// CHECK: %[[VAL_553:.*]] = AIE.switchbox(%[[VAL_552]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_554:.*]] = AIE.tile(19, 4) -// CHECK: %[[VAL_555:.*]] = AIE.switchbox(%[[VAL_554]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_556:.*]] = AIE.tile(20, 4) -// CHECK: %[[VAL_557:.*]] = AIE.switchbox(%[[VAL_556]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_558:.*]] = AIE.tile(25, 3) -// CHECK: %[[VAL_559:.*]] = AIE.switchbox(%[[VAL_558]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_560:.*]] = AIE.tile(26, 3) -// CHECK: %[[VAL_561:.*]] = AIE.switchbox(%[[VAL_560]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_562:.*]] = AIE.tile(28, 2) -// CHECK: %[[VAL_563:.*]] = AIE.switchbox(%[[VAL_562]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_564:.*]] = AIE.tile(29, 2) -// CHECK: %[[VAL_565:.*]] = AIE.switchbox(%[[VAL_564]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_566:.*]] = AIE.tile(30, 2) -// CHECK: %[[VAL_567:.*]] = AIE.switchbox(%[[VAL_566]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_568:.*]] = AIE.tile(31, 2) -// CHECK: %[[VAL_569:.*]] = AIE.switchbox(%[[VAL_568]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_570:.*]] = AIE.tile(32, 2) -// CHECK: %[[VAL_571:.*]] = AIE.switchbox(%[[VAL_570]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_572:.*]] = AIE.tile(33, 2) -// CHECK: %[[VAL_573:.*]] = AIE.switchbox(%[[VAL_572]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_574:.*]] = AIE.switchbox(%[[VAL_99]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_575:.*]] = AIE.switchbox(%[[VAL_80]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_576:.*]] = AIE.tile(36, 2) -// CHECK: %[[VAL_577:.*]] = AIE.switchbox(%[[VAL_576]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_578:.*]] = AIE.tile(37, 2) -// CHECK: %[[VAL_579:.*]] = AIE.switchbox(%[[VAL_578]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_580:.*]] = AIE.tile(38, 2) -// CHECK: %[[VAL_581:.*]] = AIE.switchbox(%[[VAL_580]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_582:.*]] = AIE.tile(39, 2) -// CHECK: %[[VAL_583:.*]] = AIE.switchbox(%[[VAL_582]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_584:.*]] = AIE.tile(40, 2) -// CHECK: %[[VAL_585:.*]] = AIE.switchbox(%[[VAL_584]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_586:.*]] = AIE.tile(41, 1) -// CHECK: %[[VAL_587:.*]] = AIE.switchbox(%[[VAL_586]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_588:.*]] = AIE.tile(41, 2) -// CHECK: %[[VAL_589:.*]] = AIE.switchbox(%[[VAL_588]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_590:.*]] = AIE.switchbox(%[[VAL_61]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_591:.*]] = AIE.tile(44, 0) -// CHECK: %[[VAL_592:.*]] = AIE.switchbox(%[[VAL_591]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_593:.*]] = AIE.tile(45, 0) -// CHECK: %[[VAL_594:.*]] = AIE.switchbox(%[[VAL_593]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_595:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_596:.*]] = AIE.shim_mux(%[[VAL_22]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_597:.*]] = AIE.tile(16, 5) -// CHECK: %[[VAL_598:.*]] = AIE.switchbox(%[[VAL_597]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_599:.*]] = AIE.tile(17, 5) -// CHECK: %[[VAL_600:.*]] = AIE.switchbox(%[[VAL_599]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_601:.*]] = AIE.tile(18, 5) -// CHECK: %[[VAL_602:.*]] = AIE.switchbox(%[[VAL_601]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_603:.*]] = AIE.tile(21, 4) -// CHECK: %[[VAL_604:.*]] = AIE.switchbox(%[[VAL_603]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_605:.*]] = AIE.tile(22, 4) -// CHECK: %[[VAL_606:.*]] = AIE.switchbox(%[[VAL_605]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_607:.*]] = AIE.tile(23, 4) -// CHECK: %[[VAL_608:.*]] = AIE.switchbox(%[[VAL_607]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_609:.*]] = AIE.tile(24, 4) -// CHECK: %[[VAL_610:.*]] = AIE.switchbox(%[[VAL_609]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_611:.*]] = AIE.tile(25, 4) -// CHECK: %[[VAL_612:.*]] = AIE.switchbox(%[[VAL_611]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_613:.*]] = AIE.tile(26, 4) -// CHECK: %[[VAL_614:.*]] = AIE.switchbox(%[[VAL_613]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_615:.*]] = AIE.tile(27, 4) -// CHECK: %[[VAL_616:.*]] = AIE.switchbox(%[[VAL_615]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_617:.*]] = AIE.tile(28, 4) -// CHECK: %[[VAL_618:.*]] = AIE.switchbox(%[[VAL_617]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_619:.*]] = AIE.tile(29, 4) -// CHECK: %[[VAL_620:.*]] = AIE.switchbox(%[[VAL_619]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_621:.*]] = AIE.tile(30, 4) -// CHECK: %[[VAL_622:.*]] = AIE.switchbox(%[[VAL_621]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_623:.*]] = AIE.tile(31, 4) -// CHECK: %[[VAL_624:.*]] = AIE.switchbox(%[[VAL_623]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_625:.*]] = AIE.tile(32, 4) -// CHECK: %[[VAL_626:.*]] = AIE.switchbox(%[[VAL_625]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_627:.*]] = AIE.tile(33, 4) -// CHECK: %[[VAL_628:.*]] = AIE.switchbox(%[[VAL_627]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_629:.*]] = AIE.tile(34, 4) -// CHECK: %[[VAL_630:.*]] = AIE.switchbox(%[[VAL_629]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_631:.*]] = AIE.tile(35, 4) -// CHECK: %[[VAL_632:.*]] = AIE.switchbox(%[[VAL_631]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_633:.*]] = AIE.tile(36, 4) -// CHECK: %[[VAL_634:.*]] = AIE.switchbox(%[[VAL_633]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_635:.*]] = AIE.tile(37, 4) -// CHECK: %[[VAL_636:.*]] = AIE.switchbox(%[[VAL_635]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_637:.*]] = AIE.tile(38, 4) -// CHECK: %[[VAL_638:.*]] = AIE.switchbox(%[[VAL_637]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_639:.*]] = AIE.tile(39, 4) -// CHECK: %[[VAL_640:.*]] = AIE.switchbox(%[[VAL_639]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_641:.*]] = AIE.tile(40, 4) -// CHECK: %[[VAL_642:.*]] = AIE.switchbox(%[[VAL_641]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_643:.*]] = AIE.tile(41, 4) -// CHECK: %[[VAL_644:.*]] = AIE.switchbox(%[[VAL_643]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_645:.*]] = AIE.tile(42, 3) -// CHECK: %[[VAL_646:.*]] = AIE.switchbox(%[[VAL_645]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_647:.*]] = AIE.tile(42, 4) -// CHECK: %[[VAL_648:.*]] = AIE.switchbox(%[[VAL_647]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_649:.*]] = AIE.tile(43, 3) -// CHECK: %[[VAL_650:.*]] = AIE.switchbox(%[[VAL_649]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_651:.*]] = AIE.tile(44, 3) -// CHECK: %[[VAL_652:.*]] = AIE.switchbox(%[[VAL_651]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_653:.*]] = AIE.tile(45, 2) -// CHECK: %[[VAL_654:.*]] = AIE.switchbox(%[[VAL_653]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_655:.*]] = AIE.tile(45, 3) -// CHECK: %[[VAL_656:.*]] = AIE.switchbox(%[[VAL_655]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_657:.*]] = AIE.switchbox(%[[VAL_21]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_658:.*]] = AIE.switchbox(%[[VAL_20]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_659:.*]] = AIE.switchbox(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %[[VAL_660:.*]] = AIE.shim_mux(%[[VAL_2]]) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: AIE.wire(%[[VAL_661:.*]] : North, %[[VAL_662:.*]] : South) -// CHECK: AIE.wire(%[[VAL_294]] : DMA, %[[VAL_661]] : DMA) -// CHECK: AIE.wire(%[[VAL_293]] : Core, %[[VAL_663:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_293]] : DMA, %[[VAL_663]] : DMA) -// CHECK: AIE.wire(%[[VAL_662]] : North, %[[VAL_663]] : South) -// CHECK: AIE.wire(%[[VAL_292]] : Core, %[[VAL_664:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_292]] : DMA, %[[VAL_664]] : DMA) -// CHECK: AIE.wire(%[[VAL_663]] : North, %[[VAL_664]] : South) -// CHECK: AIE.wire(%[[VAL_662]] : East, %[[VAL_665:.*]] : West) -// CHECK: AIE.wire(%[[VAL_666:.*]] : North, %[[VAL_665]] : South) -// CHECK: AIE.wire(%[[VAL_274]] : DMA, %[[VAL_666]] : DMA) -// CHECK: AIE.wire(%[[VAL_663]] : East, %[[VAL_667:.*]] : West) -// CHECK: AIE.wire(%[[VAL_273]] : Core, %[[VAL_667]] : Core) -// CHECK: AIE.wire(%[[VAL_273]] : DMA, %[[VAL_667]] : DMA) -// CHECK: AIE.wire(%[[VAL_665]] : North, %[[VAL_667]] : South) -// CHECK: AIE.wire(%[[VAL_664]] : East, %[[VAL_668:.*]] : West) -// CHECK: AIE.wire(%[[VAL_272]] : Core, %[[VAL_668]] : Core) -// CHECK: AIE.wire(%[[VAL_272]] : DMA, %[[VAL_668]] : DMA) -// CHECK: AIE.wire(%[[VAL_667]] : North, %[[VAL_668]] : South) -// CHECK: AIE.wire(%[[VAL_665]] : East, %[[VAL_669:.*]] : West) -// CHECK: AIE.wire(%[[VAL_668]] : East, %[[VAL_670:.*]] : West) -// CHECK: AIE.wire(%[[VAL_317]] : Core, %[[VAL_670]] : Core) -// CHECK: AIE.wire(%[[VAL_317]] : DMA, %[[VAL_670]] : DMA) -// CHECK: AIE.wire(%[[VAL_669]] : East, %[[VAL_671:.*]] : West) -// CHECK: AIE.wire(%[[VAL_670]] : East, %[[VAL_672:.*]] : West) -// CHECK: AIE.wire(%[[VAL_319]] : Core, %[[VAL_672]] : Core) -// CHECK: AIE.wire(%[[VAL_319]] : DMA, %[[VAL_672]] : DMA) -// CHECK: AIE.wire(%[[VAL_671]] : East, %[[VAL_673:.*]] : West) -// CHECK: AIE.wire(%[[VAL_674:.*]] : North, %[[VAL_673]] : South) -// CHECK: AIE.wire(%[[VAL_255]] : DMA, %[[VAL_674]] : DMA) -// CHECK: AIE.wire(%[[VAL_254]] : Core, %[[VAL_675:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_254]] : DMA, %[[VAL_675]] : DMA) -// CHECK: AIE.wire(%[[VAL_673]] : North, %[[VAL_675]] : South) -// CHECK: AIE.wire(%[[VAL_672]] : East, %[[VAL_676:.*]] : West) -// CHECK: AIE.wire(%[[VAL_253]] : Core, %[[VAL_676]] : Core) -// CHECK: AIE.wire(%[[VAL_253]] : DMA, %[[VAL_676]] : DMA) -// CHECK: AIE.wire(%[[VAL_675]] : North, %[[VAL_676]] : South) -// CHECK: AIE.wire(%[[VAL_673]] : East, %[[VAL_677:.*]] : West) -// CHECK: AIE.wire(%[[VAL_678:.*]] : North, %[[VAL_677]] : South) -// CHECK: AIE.wire(%[[VAL_236]] : DMA, %[[VAL_678]] : DMA) -// CHECK: AIE.wire(%[[VAL_675]] : East, %[[VAL_679:.*]] : West) -// CHECK: AIE.wire(%[[VAL_235]] : Core, %[[VAL_679]] : Core) -// CHECK: AIE.wire(%[[VAL_235]] : DMA, %[[VAL_679]] : DMA) -// CHECK: AIE.wire(%[[VAL_677]] : North, %[[VAL_679]] : South) -// CHECK: AIE.wire(%[[VAL_676]] : East, %[[VAL_680:.*]] : West) -// CHECK: AIE.wire(%[[VAL_296]] : Core, %[[VAL_680]] : Core) -// CHECK: AIE.wire(%[[VAL_296]] : DMA, %[[VAL_680]] : DMA) -// CHECK: AIE.wire(%[[VAL_679]] : North, %[[VAL_680]] : South) -// CHECK: AIE.wire(%[[VAL_219]] : Core, %[[VAL_681:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_219]] : DMA, %[[VAL_681]] : DMA) -// CHECK: AIE.wire(%[[VAL_680]] : North, %[[VAL_681]] : South) -// CHECK: AIE.wire(%[[VAL_142]] : Core, %[[VAL_682:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_142]] : DMA, %[[VAL_682]] : DMA) -// CHECK: AIE.wire(%[[VAL_681]] : North, %[[VAL_682]] : South) -// CHECK: AIE.wire(%[[VAL_64]] : Core, %[[VAL_683:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_64]] : DMA, %[[VAL_683]] : DMA) -// CHECK: AIE.wire(%[[VAL_682]] : North, %[[VAL_683]] : South) -// CHECK: AIE.wire(%[[VAL_677]] : East, %[[VAL_684:.*]] : West) -// CHECK: AIE.wire(%[[VAL_679]] : East, %[[VAL_685:.*]] : West) -// CHECK: AIE.wire(%[[VAL_347]] : Core, %[[VAL_685]] : Core) -// CHECK: AIE.wire(%[[VAL_347]] : DMA, %[[VAL_685]] : DMA) -// CHECK: AIE.wire(%[[VAL_684]] : North, %[[VAL_685]] : South) -// CHECK: AIE.wire(%[[VAL_680]] : East, %[[VAL_686:.*]] : West) -// CHECK: AIE.wire(%[[VAL_276]] : Core, %[[VAL_686]] : Core) -// CHECK: AIE.wire(%[[VAL_276]] : DMA, %[[VAL_686]] : DMA) -// CHECK: AIE.wire(%[[VAL_685]] : North, %[[VAL_686]] : South) -// CHECK: AIE.wire(%[[VAL_681]] : East, %[[VAL_687:.*]] : West) -// CHECK: AIE.wire(%[[VAL_200]] : Core, %[[VAL_687]] : Core) -// CHECK: AIE.wire(%[[VAL_200]] : DMA, %[[VAL_687]] : DMA) -// CHECK: AIE.wire(%[[VAL_686]] : North, %[[VAL_687]] : South) -// CHECK: AIE.wire(%[[VAL_682]] : East, %[[VAL_688:.*]] : West) -// CHECK: AIE.wire(%[[VAL_122]] : Core, %[[VAL_688]] : Core) -// CHECK: AIE.wire(%[[VAL_122]] : DMA, %[[VAL_688]] : DMA) -// CHECK: AIE.wire(%[[VAL_687]] : North, %[[VAL_688]] : South) -// CHECK: AIE.wire(%[[VAL_683]] : East, %[[VAL_689:.*]] : West) -// CHECK: AIE.wire(%[[VAL_44]] : Core, %[[VAL_689]] : Core) -// CHECK: AIE.wire(%[[VAL_44]] : DMA, %[[VAL_689]] : DMA) -// CHECK: AIE.wire(%[[VAL_688]] : North, %[[VAL_689]] : South) -// CHECK: AIE.wire(%[[VAL_684]] : East, %[[VAL_690:.*]] : West) -// CHECK: AIE.wire(%[[VAL_685]] : East, %[[VAL_691:.*]] : West) -// CHECK: AIE.wire(%[[VAL_338]] : Core, %[[VAL_691]] : Core) -// CHECK: AIE.wire(%[[VAL_338]] : DMA, %[[VAL_691]] : DMA) -// CHECK: AIE.wire(%[[VAL_690]] : North, %[[VAL_691]] : South) -// CHECK: AIE.wire(%[[VAL_686]] : East, %[[VAL_692:.*]] : West) -// CHECK: AIE.wire(%[[VAL_256]] : Core, %[[VAL_692]] : Core) -// CHECK: AIE.wire(%[[VAL_256]] : DMA, %[[VAL_692]] : DMA) -// CHECK: AIE.wire(%[[VAL_691]] : North, %[[VAL_692]] : South) -// CHECK: AIE.wire(%[[VAL_687]] : East, %[[VAL_693:.*]] : West) -// CHECK: AIE.wire(%[[VAL_180]] : Core, %[[VAL_693]] : Core) -// CHECK: AIE.wire(%[[VAL_180]] : DMA, %[[VAL_693]] : DMA) -// CHECK: AIE.wire(%[[VAL_692]] : North, %[[VAL_693]] : South) -// CHECK: AIE.wire(%[[VAL_688]] : East, %[[VAL_694:.*]] : West) -// CHECK: AIE.wire(%[[VAL_102]] : Core, %[[VAL_694]] : Core) -// CHECK: AIE.wire(%[[VAL_102]] : DMA, %[[VAL_694]] : DMA) -// CHECK: AIE.wire(%[[VAL_693]] : North, %[[VAL_694]] : South) -// CHECK: AIE.wire(%[[VAL_689]] : East, %[[VAL_695:.*]] : West) -// CHECK: AIE.wire(%[[VAL_24]] : Core, %[[VAL_695]] : Core) -// CHECK: AIE.wire(%[[VAL_24]] : DMA, %[[VAL_695]] : DMA) -// CHECK: AIE.wire(%[[VAL_694]] : North, %[[VAL_695]] : South) -// CHECK: AIE.wire(%[[VAL_690]] : East, %[[VAL_696:.*]] : West) -// CHECK: AIE.wire(%[[VAL_697:.*]] : North, %[[VAL_696]] : South) -// CHECK: AIE.wire(%[[VAL_217]] : DMA, %[[VAL_697]] : DMA) -// CHECK: AIE.wire(%[[VAL_691]] : East, %[[VAL_698:.*]] : West) -// CHECK: AIE.wire(%[[VAL_216]] : Core, %[[VAL_698]] : Core) -// CHECK: AIE.wire(%[[VAL_216]] : DMA, %[[VAL_698]] : DMA) -// CHECK: AIE.wire(%[[VAL_696]] : North, %[[VAL_698]] : South) -// CHECK: AIE.wire(%[[VAL_692]] : East, %[[VAL_699:.*]] : West) -// CHECK: AIE.wire(%[[VAL_237]] : Core, %[[VAL_699]] : Core) -// CHECK: AIE.wire(%[[VAL_237]] : DMA, %[[VAL_699]] : DMA) -// CHECK: AIE.wire(%[[VAL_698]] : North, %[[VAL_699]] : South) -// CHECK: AIE.wire(%[[VAL_693]] : East, %[[VAL_700:.*]] : West) -// CHECK: AIE.wire(%[[VAL_161]] : Core, %[[VAL_700]] : Core) -// CHECK: AIE.wire(%[[VAL_161]] : DMA, %[[VAL_700]] : DMA) -// CHECK: AIE.wire(%[[VAL_699]] : North, %[[VAL_700]] : South) -// CHECK: AIE.wire(%[[VAL_694]] : East, %[[VAL_701:.*]] : West) -// CHECK: AIE.wire(%[[VAL_83]] : Core, %[[VAL_701]] : Core) -// CHECK: AIE.wire(%[[VAL_83]] : DMA, %[[VAL_701]] : DMA) -// CHECK: AIE.wire(%[[VAL_700]] : North, %[[VAL_701]] : South) -// CHECK: AIE.wire(%[[VAL_695]] : East, %[[VAL_702:.*]] : West) -// CHECK: AIE.wire(%[[VAL_4]] : Core, %[[VAL_702]] : Core) -// CHECK: AIE.wire(%[[VAL_4]] : DMA, %[[VAL_702]] : DMA) -// CHECK: AIE.wire(%[[VAL_701]] : North, %[[VAL_702]] : South) -// CHECK: AIE.wire(%[[VAL_696]] : East, %[[VAL_703:.*]] : West) -// CHECK: AIE.wire(%[[VAL_704:.*]] : North, %[[VAL_703]] : South) -// CHECK: AIE.wire(%[[VAL_198]] : DMA, %[[VAL_704]] : DMA) -// CHECK: AIE.wire(%[[VAL_698]] : East, %[[VAL_705:.*]] : West) -// CHECK: AIE.wire(%[[VAL_197]] : Core, %[[VAL_705]] : Core) -// CHECK: AIE.wire(%[[VAL_197]] : DMA, %[[VAL_705]] : DMA) -// CHECK: AIE.wire(%[[VAL_703]] : North, %[[VAL_705]] : South) -// CHECK: AIE.wire(%[[VAL_699]] : East, %[[VAL_706:.*]] : West) -// CHECK: AIE.wire(%[[VAL_196]] : Core, %[[VAL_706]] : Core) -// CHECK: AIE.wire(%[[VAL_196]] : DMA, %[[VAL_706]] : DMA) -// CHECK: AIE.wire(%[[VAL_705]] : North, %[[VAL_706]] : South) -// CHECK: AIE.wire(%[[VAL_700]] : East, %[[VAL_707:.*]] : West) -// CHECK: AIE.wire(%[[VAL_372]] : Core, %[[VAL_707]] : Core) -// CHECK: AIE.wire(%[[VAL_372]] : DMA, %[[VAL_707]] : DMA) -// CHECK: AIE.wire(%[[VAL_706]] : North, %[[VAL_707]] : South) -// CHECK: AIE.wire(%[[VAL_701]] : East, %[[VAL_708:.*]] : West) -// CHECK: AIE.wire(%[[VAL_530]] : Core, %[[VAL_708]] : Core) -// CHECK: AIE.wire(%[[VAL_530]] : DMA, %[[VAL_708]] : DMA) -// CHECK: AIE.wire(%[[VAL_707]] : North, %[[VAL_708]] : South) -// CHECK: AIE.wire(%[[VAL_702]] : East, %[[VAL_709:.*]] : West) -// CHECK: AIE.wire(%[[VAL_478]] : Core, %[[VAL_709]] : Core) -// CHECK: AIE.wire(%[[VAL_478]] : DMA, %[[VAL_709]] : DMA) -// CHECK: AIE.wire(%[[VAL_708]] : North, %[[VAL_709]] : South) -// CHECK: AIE.wire(%[[VAL_703]] : East, %[[VAL_710:.*]] : West) -// CHECK: AIE.wire(%[[VAL_705]] : East, %[[VAL_711:.*]] : West) -// CHECK: AIE.wire(%[[VAL_377]] : Core, %[[VAL_711]] : Core) -// CHECK: AIE.wire(%[[VAL_377]] : DMA, %[[VAL_711]] : DMA) -// CHECK: AIE.wire(%[[VAL_710]] : North, %[[VAL_711]] : South) -// CHECK: AIE.wire(%[[VAL_706]] : East, %[[VAL_712:.*]] : West) -// CHECK: AIE.wire(%[[VAL_409]] : Core, %[[VAL_712]] : Core) -// CHECK: AIE.wire(%[[VAL_409]] : DMA, %[[VAL_712]] : DMA) -// CHECK: AIE.wire(%[[VAL_711]] : North, %[[VAL_712]] : South) -// CHECK: AIE.wire(%[[VAL_707]] : East, %[[VAL_713:.*]] : West) -// CHECK: AIE.wire(%[[VAL_453]] : Core, %[[VAL_713]] : Core) -// CHECK: AIE.wire(%[[VAL_453]] : DMA, %[[VAL_713]] : DMA) -// CHECK: AIE.wire(%[[VAL_712]] : North, %[[VAL_713]] : South) -// CHECK: AIE.wire(%[[VAL_708]] : East, %[[VAL_714:.*]] : West) -// CHECK: AIE.wire(%[[VAL_532]] : Core, %[[VAL_714]] : Core) -// CHECK: AIE.wire(%[[VAL_532]] : DMA, %[[VAL_714]] : DMA) -// CHECK: AIE.wire(%[[VAL_713]] : North, %[[VAL_714]] : South) -// CHECK: AIE.wire(%[[VAL_709]] : East, %[[VAL_715:.*]] : West) -// CHECK: AIE.wire(%[[VAL_480]] : Core, %[[VAL_715]] : Core) -// CHECK: AIE.wire(%[[VAL_480]] : DMA, %[[VAL_715]] : DMA) -// CHECK: AIE.wire(%[[VAL_714]] : North, %[[VAL_715]] : South) -// CHECK: AIE.wire(%[[VAL_710]] : East, %[[VAL_716:.*]] : West) -// CHECK: AIE.wire(%[[VAL_711]] : East, %[[VAL_717:.*]] : West) -// CHECK: AIE.wire(%[[VAL_379]] : Core, %[[VAL_717]] : Core) -// CHECK: AIE.wire(%[[VAL_379]] : DMA, %[[VAL_717]] : DMA) -// CHECK: AIE.wire(%[[VAL_716]] : North, %[[VAL_717]] : South) -// CHECK: AIE.wire(%[[VAL_712]] : East, %[[VAL_718:.*]] : West) -// CHECK: AIE.wire(%[[VAL_411]] : Core, %[[VAL_718]] : Core) -// CHECK: AIE.wire(%[[VAL_411]] : DMA, %[[VAL_718]] : DMA) -// CHECK: AIE.wire(%[[VAL_717]] : North, %[[VAL_718]] : South) -// CHECK: AIE.wire(%[[VAL_713]] : East, %[[VAL_719:.*]] : West) -// CHECK: AIE.wire(%[[VAL_455]] : Core, %[[VAL_719]] : Core) -// CHECK: AIE.wire(%[[VAL_455]] : DMA, %[[VAL_719]] : DMA) -// CHECK: AIE.wire(%[[VAL_718]] : North, %[[VAL_719]] : South) -// CHECK: AIE.wire(%[[VAL_714]] : East, %[[VAL_720:.*]] : West) -// CHECK: AIE.wire(%[[VAL_534]] : Core, %[[VAL_720]] : Core) -// CHECK: AIE.wire(%[[VAL_534]] : DMA, %[[VAL_720]] : DMA) -// CHECK: AIE.wire(%[[VAL_719]] : North, %[[VAL_720]] : South) -// CHECK: AIE.wire(%[[VAL_715]] : East, %[[VAL_721:.*]] : West) -// CHECK: AIE.wire(%[[VAL_482]] : Core, %[[VAL_721]] : Core) -// CHECK: AIE.wire(%[[VAL_482]] : DMA, %[[VAL_721]] : DMA) -// CHECK: AIE.wire(%[[VAL_720]] : North, %[[VAL_721]] : South) -// CHECK: AIE.wire(%[[VAL_716]] : East, %[[VAL_722:.*]] : West) -// CHECK: AIE.wire(%[[VAL_717]] : East, %[[VAL_723:.*]] : West) -// CHECK: AIE.wire(%[[VAL_381]] : Core, %[[VAL_723]] : Core) -// CHECK: AIE.wire(%[[VAL_381]] : DMA, %[[VAL_723]] : DMA) -// CHECK: AIE.wire(%[[VAL_722]] : North, %[[VAL_723]] : South) -// CHECK: AIE.wire(%[[VAL_718]] : East, %[[VAL_724:.*]] : West) -// CHECK: AIE.wire(%[[VAL_413]] : Core, %[[VAL_724]] : Core) -// CHECK: AIE.wire(%[[VAL_413]] : DMA, %[[VAL_724]] : DMA) -// CHECK: AIE.wire(%[[VAL_723]] : North, %[[VAL_724]] : South) -// CHECK: AIE.wire(%[[VAL_719]] : East, %[[VAL_725:.*]] : West) -// CHECK: AIE.wire(%[[VAL_457]] : Core, %[[VAL_725]] : Core) -// CHECK: AIE.wire(%[[VAL_457]] : DMA, %[[VAL_725]] : DMA) -// CHECK: AIE.wire(%[[VAL_724]] : North, %[[VAL_725]] : South) -// CHECK: AIE.wire(%[[VAL_720]] : East, %[[VAL_726:.*]] : West) -// CHECK: AIE.wire(%[[VAL_536]] : Core, %[[VAL_726]] : Core) -// CHECK: AIE.wire(%[[VAL_536]] : DMA, %[[VAL_726]] : DMA) -// CHECK: AIE.wire(%[[VAL_725]] : North, %[[VAL_726]] : South) -// CHECK: AIE.wire(%[[VAL_721]] : East, %[[VAL_727:.*]] : West) -// CHECK: AIE.wire(%[[VAL_484]] : Core, %[[VAL_727]] : Core) -// CHECK: AIE.wire(%[[VAL_484]] : DMA, %[[VAL_727]] : DMA) -// CHECK: AIE.wire(%[[VAL_726]] : North, %[[VAL_727]] : South) -// CHECK: AIE.wire(%[[VAL_722]] : East, %[[VAL_728:.*]] : West) -// CHECK: AIE.wire(%[[VAL_723]] : East, %[[VAL_729:.*]] : West) -// CHECK: AIE.wire(%[[VAL_383]] : Core, %[[VAL_729]] : Core) -// CHECK: AIE.wire(%[[VAL_383]] : DMA, %[[VAL_729]] : DMA) -// CHECK: AIE.wire(%[[VAL_728]] : North, %[[VAL_729]] : South) -// CHECK: AIE.wire(%[[VAL_724]] : East, %[[VAL_730:.*]] : West) -// CHECK: AIE.wire(%[[VAL_415]] : Core, %[[VAL_730]] : Core) -// CHECK: AIE.wire(%[[VAL_415]] : DMA, %[[VAL_730]] : DMA) -// CHECK: AIE.wire(%[[VAL_729]] : North, %[[VAL_730]] : South) -// CHECK: AIE.wire(%[[VAL_725]] : East, %[[VAL_731:.*]] : West) -// CHECK: AIE.wire(%[[VAL_459]] : Core, %[[VAL_731]] : Core) -// CHECK: AIE.wire(%[[VAL_459]] : DMA, %[[VAL_731]] : DMA) -// CHECK: AIE.wire(%[[VAL_730]] : North, %[[VAL_731]] : South) -// CHECK: AIE.wire(%[[VAL_726]] : East, %[[VAL_732:.*]] : West) -// CHECK: AIE.wire(%[[VAL_486]] : Core, %[[VAL_732]] : Core) -// CHECK: AIE.wire(%[[VAL_486]] : DMA, %[[VAL_732]] : DMA) -// CHECK: AIE.wire(%[[VAL_731]] : North, %[[VAL_732]] : South) -// CHECK: AIE.wire(%[[VAL_727]] : East, %[[VAL_733:.*]] : West) -// CHECK: AIE.wire(%[[VAL_488]] : Core, %[[VAL_733]] : Core) -// CHECK: AIE.wire(%[[VAL_488]] : DMA, %[[VAL_733]] : DMA) -// CHECK: AIE.wire(%[[VAL_732]] : North, %[[VAL_733]] : South) -// CHECK: AIE.wire(%[[VAL_728]] : East, %[[VAL_734:.*]] : West) -// CHECK: AIE.wire(%[[VAL_729]] : East, %[[VAL_735:.*]] : West) -// CHECK: AIE.wire(%[[VAL_385]] : Core, %[[VAL_735]] : Core) -// CHECK: AIE.wire(%[[VAL_385]] : DMA, %[[VAL_735]] : DMA) -// CHECK: AIE.wire(%[[VAL_734]] : North, %[[VAL_735]] : South) -// CHECK: AIE.wire(%[[VAL_730]] : East, %[[VAL_736:.*]] : West) -// CHECK: AIE.wire(%[[VAL_417]] : Core, %[[VAL_736]] : Core) -// CHECK: AIE.wire(%[[VAL_417]] : DMA, %[[VAL_736]] : DMA) -// CHECK: AIE.wire(%[[VAL_735]] : North, %[[VAL_736]] : South) -// CHECK: AIE.wire(%[[VAL_731]] : East, %[[VAL_737:.*]] : West) -// CHECK: AIE.wire(%[[VAL_461]] : Core, %[[VAL_737]] : Core) -// CHECK: AIE.wire(%[[VAL_461]] : DMA, %[[VAL_737]] : DMA) -// CHECK: AIE.wire(%[[VAL_736]] : North, %[[VAL_737]] : South) -// CHECK: AIE.wire(%[[VAL_732]] : East, %[[VAL_738:.*]] : West) -// CHECK: AIE.wire(%[[VAL_538]] : Core, %[[VAL_738]] : Core) -// CHECK: AIE.wire(%[[VAL_538]] : DMA, %[[VAL_738]] : DMA) -// CHECK: AIE.wire(%[[VAL_737]] : North, %[[VAL_738]] : South) -// CHECK: AIE.wire(%[[VAL_733]] : East, %[[VAL_739:.*]] : West) -// CHECK: AIE.wire(%[[VAL_597]] : Core, %[[VAL_739]] : Core) -// CHECK: AIE.wire(%[[VAL_597]] : DMA, %[[VAL_739]] : DMA) -// CHECK: AIE.wire(%[[VAL_738]] : North, %[[VAL_739]] : South) -// CHECK: AIE.wire(%[[VAL_734]] : East, %[[VAL_740:.*]] : West) -// CHECK: AIE.wire(%[[VAL_735]] : East, %[[VAL_741:.*]] : West) -// CHECK: AIE.wire(%[[VAL_387]] : Core, %[[VAL_741]] : Core) -// CHECK: AIE.wire(%[[VAL_387]] : DMA, %[[VAL_741]] : DMA) -// CHECK: AIE.wire(%[[VAL_740]] : North, %[[VAL_741]] : South) -// CHECK: AIE.wire(%[[VAL_736]] : East, %[[VAL_742:.*]] : West) -// CHECK: AIE.wire(%[[VAL_419]] : Core, %[[VAL_742]] : Core) -// CHECK: AIE.wire(%[[VAL_419]] : DMA, %[[VAL_742]] : DMA) -// CHECK: AIE.wire(%[[VAL_741]] : North, %[[VAL_742]] : South) -// CHECK: AIE.wire(%[[VAL_737]] : East, %[[VAL_743:.*]] : West) -// CHECK: AIE.wire(%[[VAL_463]] : Core, %[[VAL_743]] : Core) -// CHECK: AIE.wire(%[[VAL_463]] : DMA, %[[VAL_743]] : DMA) -// CHECK: AIE.wire(%[[VAL_742]] : North, %[[VAL_743]] : South) -// CHECK: AIE.wire(%[[VAL_738]] : East, %[[VAL_744:.*]] : West) -// CHECK: AIE.wire(%[[VAL_540]] : Core, %[[VAL_744]] : Core) -// CHECK: AIE.wire(%[[VAL_540]] : DMA, %[[VAL_744]] : DMA) -// CHECK: AIE.wire(%[[VAL_743]] : North, %[[VAL_744]] : South) -// CHECK: AIE.wire(%[[VAL_739]] : East, %[[VAL_745:.*]] : West) -// CHECK: AIE.wire(%[[VAL_599]] : Core, %[[VAL_745]] : Core) -// CHECK: AIE.wire(%[[VAL_599]] : DMA, %[[VAL_745]] : DMA) -// CHECK: AIE.wire(%[[VAL_744]] : North, %[[VAL_745]] : South) -// CHECK: AIE.wire(%[[VAL_740]] : East, %[[VAL_746:.*]] : West) -// CHECK: AIE.wire(%[[VAL_747:.*]] : North, %[[VAL_746]] : South) -// CHECK: AIE.wire(%[[VAL_179]] : DMA, %[[VAL_747]] : DMA) -// CHECK: AIE.wire(%[[VAL_741]] : East, %[[VAL_748:.*]] : West) -// CHECK: AIE.wire(%[[VAL_178]] : Core, %[[VAL_748]] : Core) -// CHECK: AIE.wire(%[[VAL_178]] : DMA, %[[VAL_748]] : DMA) -// CHECK: AIE.wire(%[[VAL_746]] : North, %[[VAL_748]] : South) -// CHECK: AIE.wire(%[[VAL_742]] : East, %[[VAL_749:.*]] : West) -// CHECK: AIE.wire(%[[VAL_177]] : Core, %[[VAL_749]] : Core) -// CHECK: AIE.wire(%[[VAL_177]] : DMA, %[[VAL_749]] : DMA) -// CHECK: AIE.wire(%[[VAL_748]] : North, %[[VAL_749]] : South) -// CHECK: AIE.wire(%[[VAL_743]] : East, %[[VAL_750:.*]] : West) -// CHECK: AIE.wire(%[[VAL_465]] : Core, %[[VAL_750]] : Core) -// CHECK: AIE.wire(%[[VAL_465]] : DMA, %[[VAL_750]] : DMA) -// CHECK: AIE.wire(%[[VAL_749]] : North, %[[VAL_750]] : South) -// CHECK: AIE.wire(%[[VAL_744]] : East, %[[VAL_751:.*]] : West) -// CHECK: AIE.wire(%[[VAL_552]] : Core, %[[VAL_751]] : Core) -// CHECK: AIE.wire(%[[VAL_552]] : DMA, %[[VAL_751]] : DMA) -// CHECK: AIE.wire(%[[VAL_750]] : North, %[[VAL_751]] : South) -// CHECK: AIE.wire(%[[VAL_745]] : East, %[[VAL_752:.*]] : West) -// CHECK: AIE.wire(%[[VAL_601]] : Core, %[[VAL_752]] : Core) -// CHECK: AIE.wire(%[[VAL_601]] : DMA, %[[VAL_752]] : DMA) -// CHECK: AIE.wire(%[[VAL_751]] : North, %[[VAL_752]] : South) -// CHECK: AIE.wire(%[[VAL_746]] : East, %[[VAL_753:.*]] : West) -// CHECK: AIE.wire(%[[VAL_754:.*]] : North, %[[VAL_753]] : South) -// CHECK: AIE.wire(%[[VAL_160]] : DMA, %[[VAL_754]] : DMA) -// CHECK: AIE.wire(%[[VAL_748]] : East, %[[VAL_755:.*]] : West) -// CHECK: AIE.wire(%[[VAL_159]] : Core, %[[VAL_755]] : Core) -// CHECK: AIE.wire(%[[VAL_159]] : DMA, %[[VAL_755]] : DMA) -// CHECK: AIE.wire(%[[VAL_753]] : North, %[[VAL_755]] : South) -// CHECK: AIE.wire(%[[VAL_749]] : East, %[[VAL_756:.*]] : West) -// CHECK: AIE.wire(%[[VAL_158]] : Core, %[[VAL_756]] : Core) -// CHECK: AIE.wire(%[[VAL_158]] : DMA, %[[VAL_756]] : DMA) -// CHECK: AIE.wire(%[[VAL_755]] : North, %[[VAL_756]] : South) -// CHECK: AIE.wire(%[[VAL_750]] : East, %[[VAL_757:.*]] : West) -// CHECK: AIE.wire(%[[VAL_467]] : Core, %[[VAL_757]] : Core) -// CHECK: AIE.wire(%[[VAL_467]] : DMA, %[[VAL_757]] : DMA) -// CHECK: AIE.wire(%[[VAL_756]] : North, %[[VAL_757]] : South) -// CHECK: AIE.wire(%[[VAL_751]] : East, %[[VAL_758:.*]] : West) -// CHECK: AIE.wire(%[[VAL_554]] : Core, %[[VAL_758]] : Core) -// CHECK: AIE.wire(%[[VAL_554]] : DMA, %[[VAL_758]] : DMA) -// CHECK: AIE.wire(%[[VAL_757]] : North, %[[VAL_758]] : South) -// CHECK: AIE.wire(%[[VAL_753]] : East, %[[VAL_759:.*]] : West) -// CHECK: AIE.wire(%[[VAL_755]] : East, %[[VAL_760:.*]] : West) -// CHECK: AIE.wire(%[[VAL_423]] : Core, %[[VAL_760]] : Core) -// CHECK: AIE.wire(%[[VAL_423]] : DMA, %[[VAL_760]] : DMA) -// CHECK: AIE.wire(%[[VAL_759]] : North, %[[VAL_760]] : South) -// CHECK: AIE.wire(%[[VAL_756]] : East, %[[VAL_761:.*]] : West) -// CHECK: AIE.wire(%[[VAL_425]] : Core, %[[VAL_761]] : Core) -// CHECK: AIE.wire(%[[VAL_425]] : DMA, %[[VAL_761]] : DMA) -// CHECK: AIE.wire(%[[VAL_760]] : North, %[[VAL_761]] : South) -// CHECK: AIE.wire(%[[VAL_757]] : East, %[[VAL_762:.*]] : West) -// CHECK: AIE.wire(%[[VAL_469]] : Core, %[[VAL_762]] : Core) -// CHECK: AIE.wire(%[[VAL_469]] : DMA, %[[VAL_762]] : DMA) -// CHECK: AIE.wire(%[[VAL_761]] : North, %[[VAL_762]] : South) -// CHECK: AIE.wire(%[[VAL_758]] : East, %[[VAL_763:.*]] : West) -// CHECK: AIE.wire(%[[VAL_556]] : Core, %[[VAL_763]] : Core) -// CHECK: AIE.wire(%[[VAL_556]] : DMA, %[[VAL_763]] : DMA) -// CHECK: AIE.wire(%[[VAL_762]] : North, %[[VAL_763]] : South) -// CHECK: AIE.wire(%[[VAL_759]] : East, %[[VAL_764:.*]] : West) -// CHECK: AIE.wire(%[[VAL_760]] : East, %[[VAL_765:.*]] : West) -// CHECK: AIE.wire(%[[VAL_427]] : Core, %[[VAL_765]] : Core) -// CHECK: AIE.wire(%[[VAL_427]] : DMA, %[[VAL_765]] : DMA) -// CHECK: AIE.wire(%[[VAL_764]] : North, %[[VAL_765]] : South) -// CHECK: AIE.wire(%[[VAL_761]] : East, %[[VAL_766:.*]] : West) -// CHECK: AIE.wire(%[[VAL_542]] : Core, %[[VAL_766]] : Core) -// CHECK: AIE.wire(%[[VAL_542]] : DMA, %[[VAL_766]] : DMA) -// CHECK: AIE.wire(%[[VAL_765]] : North, %[[VAL_766]] : South) -// CHECK: AIE.wire(%[[VAL_762]] : East, %[[VAL_767:.*]] : West) -// CHECK: AIE.wire(%[[VAL_490]] : Core, %[[VAL_767]] : Core) -// CHECK: AIE.wire(%[[VAL_490]] : DMA, %[[VAL_767]] : DMA) -// CHECK: AIE.wire(%[[VAL_766]] : North, %[[VAL_767]] : South) -// CHECK: AIE.wire(%[[VAL_763]] : East, %[[VAL_768:.*]] : West) -// CHECK: AIE.wire(%[[VAL_603]] : Core, %[[VAL_768]] : Core) -// CHECK: AIE.wire(%[[VAL_603]] : DMA, %[[VAL_768]] : DMA) -// CHECK: AIE.wire(%[[VAL_767]] : North, %[[VAL_768]] : South) -// CHECK: AIE.wire(%[[VAL_764]] : East, %[[VAL_769:.*]] : West) -// CHECK: AIE.wire(%[[VAL_765]] : East, %[[VAL_770:.*]] : West) -// CHECK: AIE.wire(%[[VAL_429]] : Core, %[[VAL_770]] : Core) -// CHECK: AIE.wire(%[[VAL_429]] : DMA, %[[VAL_770]] : DMA) -// CHECK: AIE.wire(%[[VAL_769]] : North, %[[VAL_770]] : South) -// CHECK: AIE.wire(%[[VAL_766]] : East, %[[VAL_771:.*]] : West) -// CHECK: AIE.wire(%[[VAL_544]] : Core, %[[VAL_771]] : Core) -// CHECK: AIE.wire(%[[VAL_544]] : DMA, %[[VAL_771]] : DMA) -// CHECK: AIE.wire(%[[VAL_770]] : North, %[[VAL_771]] : South) -// CHECK: AIE.wire(%[[VAL_767]] : East, %[[VAL_772:.*]] : West) -// CHECK: AIE.wire(%[[VAL_492]] : Core, %[[VAL_772]] : Core) -// CHECK: AIE.wire(%[[VAL_492]] : DMA, %[[VAL_772]] : DMA) -// CHECK: AIE.wire(%[[VAL_771]] : North, %[[VAL_772]] : South) -// CHECK: AIE.wire(%[[VAL_768]] : East, %[[VAL_773:.*]] : West) -// CHECK: AIE.wire(%[[VAL_605]] : Core, %[[VAL_773]] : Core) -// CHECK: AIE.wire(%[[VAL_605]] : DMA, %[[VAL_773]] : DMA) -// CHECK: AIE.wire(%[[VAL_772]] : North, %[[VAL_773]] : South) -// CHECK: AIE.wire(%[[VAL_769]] : East, %[[VAL_774:.*]] : West) -// CHECK: AIE.wire(%[[VAL_770]] : East, %[[VAL_775:.*]] : West) -// CHECK: AIE.wire(%[[VAL_431]] : Core, %[[VAL_775]] : Core) -// CHECK: AIE.wire(%[[VAL_431]] : DMA, %[[VAL_775]] : DMA) -// CHECK: AIE.wire(%[[VAL_774]] : North, %[[VAL_775]] : South) -// CHECK: AIE.wire(%[[VAL_771]] : East, %[[VAL_776:.*]] : West) -// CHECK: AIE.wire(%[[VAL_546]] : Core, %[[VAL_776]] : Core) -// CHECK: AIE.wire(%[[VAL_546]] : DMA, %[[VAL_776]] : DMA) -// CHECK: AIE.wire(%[[VAL_775]] : North, %[[VAL_776]] : South) -// CHECK: AIE.wire(%[[VAL_772]] : East, %[[VAL_777:.*]] : West) -// CHECK: AIE.wire(%[[VAL_494]] : Core, %[[VAL_777]] : Core) -// CHECK: AIE.wire(%[[VAL_494]] : DMA, %[[VAL_777]] : DMA) -// CHECK: AIE.wire(%[[VAL_776]] : North, %[[VAL_777]] : South) -// CHECK: AIE.wire(%[[VAL_773]] : East, %[[VAL_778:.*]] : West) -// CHECK: AIE.wire(%[[VAL_607]] : Core, %[[VAL_778]] : Core) -// CHECK: AIE.wire(%[[VAL_607]] : DMA, %[[VAL_778]] : DMA) -// CHECK: AIE.wire(%[[VAL_777]] : North, %[[VAL_778]] : South) -// CHECK: AIE.wire(%[[VAL_774]] : East, %[[VAL_779:.*]] : West) -// CHECK: AIE.wire(%[[VAL_775]] : East, %[[VAL_780:.*]] : West) -// CHECK: AIE.wire(%[[VAL_433]] : Core, %[[VAL_780]] : Core) -// CHECK: AIE.wire(%[[VAL_433]] : DMA, %[[VAL_780]] : DMA) -// CHECK: AIE.wire(%[[VAL_779]] : North, %[[VAL_780]] : South) -// CHECK: AIE.wire(%[[VAL_776]] : East, %[[VAL_781:.*]] : West) -// CHECK: AIE.wire(%[[VAL_496]] : Core, %[[VAL_781]] : Core) -// CHECK: AIE.wire(%[[VAL_496]] : DMA, %[[VAL_781]] : DMA) -// CHECK: AIE.wire(%[[VAL_780]] : North, %[[VAL_781]] : South) -// CHECK: AIE.wire(%[[VAL_777]] : East, %[[VAL_782:.*]] : West) -// CHECK: AIE.wire(%[[VAL_498]] : Core, %[[VAL_782]] : Core) -// CHECK: AIE.wire(%[[VAL_498]] : DMA, %[[VAL_782]] : DMA) -// CHECK: AIE.wire(%[[VAL_781]] : North, %[[VAL_782]] : South) -// CHECK: AIE.wire(%[[VAL_778]] : East, %[[VAL_783:.*]] : West) -// CHECK: AIE.wire(%[[VAL_609]] : Core, %[[VAL_783]] : Core) -// CHECK: AIE.wire(%[[VAL_609]] : DMA, %[[VAL_783]] : DMA) -// CHECK: AIE.wire(%[[VAL_782]] : North, %[[VAL_783]] : South) -// CHECK: AIE.wire(%[[VAL_779]] : East, %[[VAL_784:.*]] : West) -// CHECK: AIE.wire(%[[VAL_780]] : East, %[[VAL_785:.*]] : West) -// CHECK: AIE.wire(%[[VAL_435]] : Core, %[[VAL_785]] : Core) -// CHECK: AIE.wire(%[[VAL_435]] : DMA, %[[VAL_785]] : DMA) -// CHECK: AIE.wire(%[[VAL_784]] : North, %[[VAL_785]] : South) -// CHECK: AIE.wire(%[[VAL_781]] : East, %[[VAL_786:.*]] : West) -// CHECK: AIE.wire(%[[VAL_500]] : Core, %[[VAL_786]] : Core) -// CHECK: AIE.wire(%[[VAL_500]] : DMA, %[[VAL_786]] : DMA) -// CHECK: AIE.wire(%[[VAL_785]] : North, %[[VAL_786]] : South) -// CHECK: AIE.wire(%[[VAL_782]] : East, %[[VAL_787:.*]] : West) -// CHECK: AIE.wire(%[[VAL_558]] : Core, %[[VAL_787]] : Core) -// CHECK: AIE.wire(%[[VAL_558]] : DMA, %[[VAL_787]] : DMA) -// CHECK: AIE.wire(%[[VAL_786]] : North, %[[VAL_787]] : South) -// CHECK: AIE.wire(%[[VAL_783]] : East, %[[VAL_788:.*]] : West) -// CHECK: AIE.wire(%[[VAL_611]] : Core, %[[VAL_788]] : Core) -// CHECK: AIE.wire(%[[VAL_611]] : DMA, %[[VAL_788]] : DMA) -// CHECK: AIE.wire(%[[VAL_787]] : North, %[[VAL_788]] : South) -// CHECK: AIE.wire(%[[VAL_784]] : East, %[[VAL_789:.*]] : West) -// CHECK: AIE.wire(%[[VAL_790:.*]] : North, %[[VAL_789]] : South) -// CHECK: AIE.wire(%[[VAL_140]] : DMA, %[[VAL_790]] : DMA) -// CHECK: AIE.wire(%[[VAL_785]] : East, %[[VAL_791:.*]] : West) -// CHECK: AIE.wire(%[[VAL_139]] : Core, %[[VAL_791]] : Core) -// CHECK: AIE.wire(%[[VAL_139]] : DMA, %[[VAL_791]] : DMA) -// CHECK: AIE.wire(%[[VAL_789]] : North, %[[VAL_791]] : South) -// CHECK: AIE.wire(%[[VAL_786]] : East, %[[VAL_792:.*]] : West) -// CHECK: AIE.wire(%[[VAL_138]] : Core, %[[VAL_792]] : Core) -// CHECK: AIE.wire(%[[VAL_138]] : DMA, %[[VAL_792]] : DMA) -// CHECK: AIE.wire(%[[VAL_791]] : North, %[[VAL_792]] : South) -// CHECK: AIE.wire(%[[VAL_787]] : East, %[[VAL_793:.*]] : West) -// CHECK: AIE.wire(%[[VAL_560]] : Core, %[[VAL_793]] : Core) -// CHECK: AIE.wire(%[[VAL_560]] : DMA, %[[VAL_793]] : DMA) -// CHECK: AIE.wire(%[[VAL_792]] : North, %[[VAL_793]] : South) -// CHECK: AIE.wire(%[[VAL_788]] : East, %[[VAL_794:.*]] : West) -// CHECK: AIE.wire(%[[VAL_613]] : Core, %[[VAL_794]] : Core) -// CHECK: AIE.wire(%[[VAL_613]] : DMA, %[[VAL_794]] : DMA) -// CHECK: AIE.wire(%[[VAL_793]] : North, %[[VAL_794]] : South) -// CHECK: AIE.wire(%[[VAL_789]] : East, %[[VAL_795:.*]] : West) -// CHECK: AIE.wire(%[[VAL_796:.*]] : North, %[[VAL_795]] : South) -// CHECK: AIE.wire(%[[VAL_120]] : DMA, %[[VAL_796]] : DMA) -// CHECK: AIE.wire(%[[VAL_791]] : East, %[[VAL_797:.*]] : West) -// CHECK: AIE.wire(%[[VAL_119]] : Core, %[[VAL_797]] : Core) -// CHECK: AIE.wire(%[[VAL_119]] : DMA, %[[VAL_797]] : DMA) -// CHECK: AIE.wire(%[[VAL_795]] : North, %[[VAL_797]] : South) -// CHECK: AIE.wire(%[[VAL_792]] : East, %[[VAL_798:.*]] : West) -// CHECK: AIE.wire(%[[VAL_118]] : Core, %[[VAL_798]] : Core) -// CHECK: AIE.wire(%[[VAL_118]] : DMA, %[[VAL_798]] : DMA) -// CHECK: AIE.wire(%[[VAL_797]] : North, %[[VAL_798]] : South) -// CHECK: AIE.wire(%[[VAL_794]] : East, %[[VAL_799:.*]] : West) -// CHECK: AIE.wire(%[[VAL_615]] : Core, %[[VAL_799]] : Core) -// CHECK: AIE.wire(%[[VAL_615]] : DMA, %[[VAL_799]] : DMA) -// CHECK: AIE.wire(%[[VAL_795]] : East, %[[VAL_800:.*]] : West) -// CHECK: AIE.wire(%[[VAL_797]] : East, %[[VAL_801:.*]] : West) -// CHECK: AIE.wire(%[[VAL_503]] : Core, %[[VAL_801]] : Core) -// CHECK: AIE.wire(%[[VAL_503]] : DMA, %[[VAL_801]] : DMA) -// CHECK: AIE.wire(%[[VAL_800]] : North, %[[VAL_801]] : South) -// CHECK: AIE.wire(%[[VAL_798]] : East, %[[VAL_802:.*]] : West) -// CHECK: AIE.wire(%[[VAL_562]] : Core, %[[VAL_802]] : Core) -// CHECK: AIE.wire(%[[VAL_562]] : DMA, %[[VAL_802]] : DMA) -// CHECK: AIE.wire(%[[VAL_801]] : North, %[[VAL_802]] : South) -// CHECK: AIE.wire(%[[VAL_799]] : East, %[[VAL_803:.*]] : West) -// CHECK: AIE.wire(%[[VAL_617]] : Core, %[[VAL_803]] : Core) -// CHECK: AIE.wire(%[[VAL_617]] : DMA, %[[VAL_803]] : DMA) -// CHECK: AIE.wire(%[[VAL_800]] : East, %[[VAL_804:.*]] : West) -// CHECK: AIE.wire(%[[VAL_801]] : East, %[[VAL_805:.*]] : West) -// CHECK: AIE.wire(%[[VAL_505]] : Core, %[[VAL_805]] : Core) -// CHECK: AIE.wire(%[[VAL_505]] : DMA, %[[VAL_805]] : DMA) -// CHECK: AIE.wire(%[[VAL_804]] : North, %[[VAL_805]] : South) -// CHECK: AIE.wire(%[[VAL_802]] : East, %[[VAL_806:.*]] : West) -// CHECK: AIE.wire(%[[VAL_564]] : Core, %[[VAL_806]] : Core) -// CHECK: AIE.wire(%[[VAL_564]] : DMA, %[[VAL_806]] : DMA) -// CHECK: AIE.wire(%[[VAL_805]] : North, %[[VAL_806]] : South) -// CHECK: AIE.wire(%[[VAL_803]] : East, %[[VAL_807:.*]] : West) -// CHECK: AIE.wire(%[[VAL_619]] : Core, %[[VAL_807]] : Core) -// CHECK: AIE.wire(%[[VAL_619]] : DMA, %[[VAL_807]] : DMA) -// CHECK: AIE.wire(%[[VAL_804]] : East, %[[VAL_808:.*]] : West) -// CHECK: AIE.wire(%[[VAL_805]] : East, %[[VAL_809:.*]] : West) -// CHECK: AIE.wire(%[[VAL_507]] : Core, %[[VAL_809]] : Core) -// CHECK: AIE.wire(%[[VAL_507]] : DMA, %[[VAL_809]] : DMA) -// CHECK: AIE.wire(%[[VAL_808]] : North, %[[VAL_809]] : South) -// CHECK: AIE.wire(%[[VAL_806]] : East, %[[VAL_810:.*]] : West) -// CHECK: AIE.wire(%[[VAL_566]] : Core, %[[VAL_810]] : Core) -// CHECK: AIE.wire(%[[VAL_566]] : DMA, %[[VAL_810]] : DMA) -// CHECK: AIE.wire(%[[VAL_809]] : North, %[[VAL_810]] : South) -// CHECK: AIE.wire(%[[VAL_807]] : East, %[[VAL_811:.*]] : West) -// CHECK: AIE.wire(%[[VAL_621]] : Core, %[[VAL_811]] : Core) -// CHECK: AIE.wire(%[[VAL_621]] : DMA, %[[VAL_811]] : DMA) -// CHECK: AIE.wire(%[[VAL_808]] : East, %[[VAL_812:.*]] : West) -// CHECK: AIE.wire(%[[VAL_809]] : East, %[[VAL_813:.*]] : West) -// CHECK: AIE.wire(%[[VAL_509]] : Core, %[[VAL_813]] : Core) -// CHECK: AIE.wire(%[[VAL_509]] : DMA, %[[VAL_813]] : DMA) -// CHECK: AIE.wire(%[[VAL_812]] : North, %[[VAL_813]] : South) -// CHECK: AIE.wire(%[[VAL_810]] : East, %[[VAL_814:.*]] : West) -// CHECK: AIE.wire(%[[VAL_568]] : Core, %[[VAL_814]] : Core) -// CHECK: AIE.wire(%[[VAL_568]] : DMA, %[[VAL_814]] : DMA) -// CHECK: AIE.wire(%[[VAL_813]] : North, %[[VAL_814]] : South) -// CHECK: AIE.wire(%[[VAL_811]] : East, %[[VAL_815:.*]] : West) -// CHECK: AIE.wire(%[[VAL_623]] : Core, %[[VAL_815]] : Core) -// CHECK: AIE.wire(%[[VAL_623]] : DMA, %[[VAL_815]] : DMA) -// CHECK: AIE.wire(%[[VAL_812]] : East, %[[VAL_816:.*]] : West) -// CHECK: AIE.wire(%[[VAL_813]] : East, %[[VAL_817:.*]] : West) -// CHECK: AIE.wire(%[[VAL_511]] : Core, %[[VAL_817]] : Core) -// CHECK: AIE.wire(%[[VAL_511]] : DMA, %[[VAL_817]] : DMA) -// CHECK: AIE.wire(%[[VAL_816]] : North, %[[VAL_817]] : South) -// CHECK: AIE.wire(%[[VAL_814]] : East, %[[VAL_818:.*]] : West) -// CHECK: AIE.wire(%[[VAL_570]] : Core, %[[VAL_818]] : Core) -// CHECK: AIE.wire(%[[VAL_570]] : DMA, %[[VAL_818]] : DMA) -// CHECK: AIE.wire(%[[VAL_817]] : North, %[[VAL_818]] : South) -// CHECK: AIE.wire(%[[VAL_815]] : East, %[[VAL_819:.*]] : West) -// CHECK: AIE.wire(%[[VAL_625]] : Core, %[[VAL_819]] : Core) -// CHECK: AIE.wire(%[[VAL_625]] : DMA, %[[VAL_819]] : DMA) -// CHECK: AIE.wire(%[[VAL_816]] : East, %[[VAL_820:.*]] : West) -// CHECK: AIE.wire(%[[VAL_817]] : East, %[[VAL_821:.*]] : West) -// CHECK: AIE.wire(%[[VAL_513]] : Core, %[[VAL_821]] : Core) -// CHECK: AIE.wire(%[[VAL_513]] : DMA, %[[VAL_821]] : DMA) -// CHECK: AIE.wire(%[[VAL_820]] : North, %[[VAL_821]] : South) -// CHECK: AIE.wire(%[[VAL_818]] : East, %[[VAL_822:.*]] : West) -// CHECK: AIE.wire(%[[VAL_572]] : Core, %[[VAL_822]] : Core) -// CHECK: AIE.wire(%[[VAL_572]] : DMA, %[[VAL_822]] : DMA) -// CHECK: AIE.wire(%[[VAL_821]] : North, %[[VAL_822]] : South) -// CHECK: AIE.wire(%[[VAL_819]] : East, %[[VAL_823:.*]] : West) -// CHECK: AIE.wire(%[[VAL_627]] : Core, %[[VAL_823]] : Core) -// CHECK: AIE.wire(%[[VAL_627]] : DMA, %[[VAL_823]] : DMA) -// CHECK: AIE.wire(%[[VAL_820]] : East, %[[VAL_824:.*]] : West) -// CHECK: AIE.wire(%[[VAL_825:.*]] : North, %[[VAL_824]] : South) -// CHECK: AIE.wire(%[[VAL_101]] : DMA, %[[VAL_825]] : DMA) -// CHECK: AIE.wire(%[[VAL_821]] : East, %[[VAL_826:.*]] : West) -// CHECK: AIE.wire(%[[VAL_100]] : Core, %[[VAL_826]] : Core) -// CHECK: AIE.wire(%[[VAL_100]] : DMA, %[[VAL_826]] : DMA) -// CHECK: AIE.wire(%[[VAL_824]] : North, %[[VAL_826]] : South) -// CHECK: AIE.wire(%[[VAL_822]] : East, %[[VAL_827:.*]] : West) -// CHECK: AIE.wire(%[[VAL_99]] : Core, %[[VAL_827]] : Core) -// CHECK: AIE.wire(%[[VAL_99]] : DMA, %[[VAL_827]] : DMA) -// CHECK: AIE.wire(%[[VAL_826]] : North, %[[VAL_827]] : South) -// CHECK: AIE.wire(%[[VAL_823]] : East, %[[VAL_828:.*]] : West) -// CHECK: AIE.wire(%[[VAL_629]] : Core, %[[VAL_828]] : Core) -// CHECK: AIE.wire(%[[VAL_629]] : DMA, %[[VAL_828]] : DMA) -// CHECK: AIE.wire(%[[VAL_824]] : East, %[[VAL_829:.*]] : West) -// CHECK: AIE.wire(%[[VAL_830:.*]] : North, %[[VAL_829]] : South) -// CHECK: AIE.wire(%[[VAL_82]] : DMA, %[[VAL_830]] : DMA) -// CHECK: AIE.wire(%[[VAL_826]] : East, %[[VAL_831:.*]] : West) -// CHECK: AIE.wire(%[[VAL_81]] : Core, %[[VAL_831]] : Core) -// CHECK: AIE.wire(%[[VAL_81]] : DMA, %[[VAL_831]] : DMA) -// CHECK: AIE.wire(%[[VAL_829]] : North, %[[VAL_831]] : South) -// CHECK: AIE.wire(%[[VAL_827]] : East, %[[VAL_832:.*]] : West) -// CHECK: AIE.wire(%[[VAL_80]] : Core, %[[VAL_832]] : Core) -// CHECK: AIE.wire(%[[VAL_80]] : DMA, %[[VAL_832]] : DMA) -// CHECK: AIE.wire(%[[VAL_831]] : North, %[[VAL_832]] : South) -// CHECK: AIE.wire(%[[VAL_828]] : East, %[[VAL_833:.*]] : West) -// CHECK: AIE.wire(%[[VAL_631]] : Core, %[[VAL_833]] : Core) -// CHECK: AIE.wire(%[[VAL_631]] : DMA, %[[VAL_833]] : DMA) -// CHECK: AIE.wire(%[[VAL_829]] : East, %[[VAL_834:.*]] : West) -// CHECK: AIE.wire(%[[VAL_832]] : East, %[[VAL_835:.*]] : West) -// CHECK: AIE.wire(%[[VAL_576]] : Core, %[[VAL_835]] : Core) -// CHECK: AIE.wire(%[[VAL_576]] : DMA, %[[VAL_835]] : DMA) -// CHECK: AIE.wire(%[[VAL_833]] : East, %[[VAL_836:.*]] : West) -// CHECK: AIE.wire(%[[VAL_633]] : Core, %[[VAL_836]] : Core) -// CHECK: AIE.wire(%[[VAL_633]] : DMA, %[[VAL_836]] : DMA) -// CHECK: AIE.wire(%[[VAL_834]] : East, %[[VAL_837:.*]] : West) -// CHECK: AIE.wire(%[[VAL_835]] : East, %[[VAL_838:.*]] : West) -// CHECK: AIE.wire(%[[VAL_578]] : Core, %[[VAL_838]] : Core) -// CHECK: AIE.wire(%[[VAL_578]] : DMA, %[[VAL_838]] : DMA) -// CHECK: AIE.wire(%[[VAL_836]] : East, %[[VAL_839:.*]] : West) -// CHECK: AIE.wire(%[[VAL_635]] : Core, %[[VAL_839]] : Core) -// CHECK: AIE.wire(%[[VAL_635]] : DMA, %[[VAL_839]] : DMA) -// CHECK: AIE.wire(%[[VAL_837]] : East, %[[VAL_840:.*]] : West) -// CHECK: AIE.wire(%[[VAL_838]] : East, %[[VAL_841:.*]] : West) -// CHECK: AIE.wire(%[[VAL_580]] : Core, %[[VAL_841]] : Core) -// CHECK: AIE.wire(%[[VAL_580]] : DMA, %[[VAL_841]] : DMA) -// CHECK: AIE.wire(%[[VAL_839]] : East, %[[VAL_842:.*]] : West) -// CHECK: AIE.wire(%[[VAL_637]] : Core, %[[VAL_842]] : Core) -// CHECK: AIE.wire(%[[VAL_637]] : DMA, %[[VAL_842]] : DMA) -// CHECK: AIE.wire(%[[VAL_840]] : East, %[[VAL_843:.*]] : West) -// CHECK: AIE.wire(%[[VAL_841]] : East, %[[VAL_844:.*]] : West) -// CHECK: AIE.wire(%[[VAL_582]] : Core, %[[VAL_844]] : Core) -// CHECK: AIE.wire(%[[VAL_582]] : DMA, %[[VAL_844]] : DMA) -// CHECK: AIE.wire(%[[VAL_842]] : East, %[[VAL_845:.*]] : West) -// CHECK: AIE.wire(%[[VAL_639]] : Core, %[[VAL_845]] : Core) -// CHECK: AIE.wire(%[[VAL_639]] : DMA, %[[VAL_845]] : DMA) -// CHECK: AIE.wire(%[[VAL_843]] : East, %[[VAL_846:.*]] : West) -// CHECK: AIE.wire(%[[VAL_844]] : East, %[[VAL_847:.*]] : West) -// CHECK: AIE.wire(%[[VAL_584]] : Core, %[[VAL_847]] : Core) -// CHECK: AIE.wire(%[[VAL_584]] : DMA, %[[VAL_847]] : DMA) -// CHECK: AIE.wire(%[[VAL_845]] : East, %[[VAL_848:.*]] : West) -// CHECK: AIE.wire(%[[VAL_641]] : Core, %[[VAL_848]] : Core) -// CHECK: AIE.wire(%[[VAL_641]] : DMA, %[[VAL_848]] : DMA) -// CHECK: AIE.wire(%[[VAL_846]] : East, %[[VAL_849:.*]] : West) -// CHECK: AIE.wire(%[[VAL_586]] : Core, %[[VAL_850:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_586]] : DMA, %[[VAL_850]] : DMA) -// CHECK: AIE.wire(%[[VAL_849]] : North, %[[VAL_850]] : South) -// CHECK: AIE.wire(%[[VAL_847]] : East, %[[VAL_851:.*]] : West) -// CHECK: AIE.wire(%[[VAL_588]] : Core, %[[VAL_851]] : Core) -// CHECK: AIE.wire(%[[VAL_588]] : DMA, %[[VAL_851]] : DMA) -// CHECK: AIE.wire(%[[VAL_850]] : North, %[[VAL_851]] : South) -// CHECK: AIE.wire(%[[VAL_848]] : East, %[[VAL_852:.*]] : West) -// CHECK: AIE.wire(%[[VAL_643]] : Core, %[[VAL_852]] : Core) -// CHECK: AIE.wire(%[[VAL_643]] : DMA, %[[VAL_852]] : DMA) -// CHECK: AIE.wire(%[[VAL_849]] : East, %[[VAL_853:.*]] : West) -// CHECK: AIE.wire(%[[VAL_854:.*]] : North, %[[VAL_853]] : South) -// CHECK: AIE.wire(%[[VAL_62]] : DMA, %[[VAL_854]] : DMA) -// CHECK: AIE.wire(%[[VAL_850]] : East, %[[VAL_855:.*]] : West) -// CHECK: AIE.wire(%[[VAL_61]] : Core, %[[VAL_855]] : Core) -// CHECK: AIE.wire(%[[VAL_61]] : DMA, %[[VAL_855]] : DMA) -// CHECK: AIE.wire(%[[VAL_853]] : North, %[[VAL_855]] : South) -// CHECK: AIE.wire(%[[VAL_645]] : Core, %[[VAL_856:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_645]] : DMA, %[[VAL_856]] : DMA) -// CHECK: AIE.wire(%[[VAL_852]] : East, %[[VAL_857:.*]] : West) -// CHECK: AIE.wire(%[[VAL_647]] : Core, %[[VAL_857]] : Core) -// CHECK: AIE.wire(%[[VAL_647]] : DMA, %[[VAL_857]] : DMA) -// CHECK: AIE.wire(%[[VAL_856]] : North, %[[VAL_857]] : South) -// CHECK: AIE.wire(%[[VAL_853]] : East, %[[VAL_858:.*]] : West) -// CHECK: AIE.wire(%[[VAL_859:.*]] : North, %[[VAL_858]] : South) -// CHECK: AIE.wire(%[[VAL_42]] : DMA, %[[VAL_859]] : DMA) -// CHECK: AIE.wire(%[[VAL_856]] : East, %[[VAL_860:.*]] : West) -// CHECK: AIE.wire(%[[VAL_649]] : Core, %[[VAL_860]] : Core) -// CHECK: AIE.wire(%[[VAL_649]] : DMA, %[[VAL_860]] : DMA) -// CHECK: AIE.wire(%[[VAL_858]] : East, %[[VAL_861:.*]] : West) -// CHECK: AIE.wire(%[[VAL_860]] : East, %[[VAL_862:.*]] : West) -// CHECK: AIE.wire(%[[VAL_651]] : Core, %[[VAL_862]] : Core) -// CHECK: AIE.wire(%[[VAL_651]] : DMA, %[[VAL_862]] : DMA) -// CHECK: AIE.wire(%[[VAL_861]] : East, %[[VAL_863:.*]] : West) -// CHECK: AIE.wire(%[[VAL_653]] : Core, %[[VAL_864:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_653]] : DMA, %[[VAL_864]] : DMA) -// CHECK: AIE.wire(%[[VAL_862]] : East, %[[VAL_865:.*]] : West) -// CHECK: AIE.wire(%[[VAL_655]] : Core, %[[VAL_865]] : Core) -// CHECK: AIE.wire(%[[VAL_655]] : DMA, %[[VAL_865]] : DMA) -// CHECK: AIE.wire(%[[VAL_864]] : North, %[[VAL_865]] : South) -// CHECK: AIE.wire(%[[VAL_863]] : East, %[[VAL_866:.*]] : West) -// CHECK: AIE.wire(%[[VAL_867:.*]] : North, %[[VAL_866]] : South) -// CHECK: AIE.wire(%[[VAL_22]] : DMA, %[[VAL_867]] : DMA) -// CHECK: AIE.wire(%[[VAL_21]] : Core, %[[VAL_868:.*]] : Core) -// CHECK: AIE.wire(%[[VAL_21]] : DMA, %[[VAL_868]] : DMA) -// CHECK: AIE.wire(%[[VAL_866]] : North, %[[VAL_868]] : South) -// CHECK: AIE.wire(%[[VAL_864]] : East, %[[VAL_869:.*]] : West) -// CHECK: AIE.wire(%[[VAL_20]] : Core, %[[VAL_869]] : Core) -// CHECK: AIE.wire(%[[VAL_20]] : DMA, %[[VAL_869]] : DMA) -// CHECK: AIE.wire(%[[VAL_868]] : North, %[[VAL_869]] : South) -// CHECK: AIE.wire(%[[VAL_866]] : East, %[[VAL_870:.*]] : West) -// CHECK: AIE.wire(%[[VAL_871:.*]] : North, %[[VAL_870]] : South) -// CHECK: AIE.wire(%[[VAL_2]] : DMA, %[[VAL_871]] : DMA) +// CHECK: %[[VAL_312:.*]] = aie.switchbox(%[[VAL_294]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_313:.*]] = aie.shim_mux(%[[VAL_294]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_314:.*]] = aie.switchbox(%[[VAL_293]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_315:.*]] = aie.switchbox(%[[VAL_292]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_316:.*]] = aie.switchbox(%[[VAL_272]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_317:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_318:.*]] = aie.switchbox(%[[VAL_317]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_319:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_320:.*]] = aie.switchbox(%[[VAL_319]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_321:.*]] = aie.switchbox(%[[VAL_253]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_322:.*]] = aie.switchbox(%[[VAL_296]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_323:.*]] = aie.switchbox(%[[VAL_274]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_324:.*]] = aie.shim_mux(%[[VAL_274]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_325:.*]] = aie.tile(4, 0) +// CHECK: %[[VAL_326:.*]] = aie.switchbox(%[[VAL_325]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_327:.*]] = aie.tile(5, 0) +// CHECK: %[[VAL_328:.*]] = aie.switchbox(%[[VAL_327]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_329:.*]] = aie.switchbox(%[[VAL_255]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_330:.*]] = aie.switchbox(%[[VAL_254]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_331:.*]] = aie.switchbox(%[[VAL_276]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_332:.*]] = aie.shim_mux(%[[VAL_255]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_333:.*]] = aie.switchbox(%[[VAL_236]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_334:.*]] = aie.tile(8, 0) +// CHECK: %[[VAL_335:.*]] = aie.switchbox(%[[VAL_334]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_336:.*]] = aie.tile(9, 0) +// CHECK: %[[VAL_337:.*]] = aie.switchbox(%[[VAL_336]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_338:.*]] = aie.tile(9, 1) +// CHECK: %[[VAL_339:.*]] = aie.switchbox(%[[VAL_338]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_340:.*]] = aie.switchbox(%[[VAL_256]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_341:.*]] = aie.switchbox(%[[VAL_273]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_342:.*]] = aie.shim_mux(%[[VAL_236]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_343:.*]] = aie.switchbox(%[[VAL_217]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_344:.*]] = aie.switchbox(%[[VAL_216]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_345:.*]] = aie.switchbox(%[[VAL_237]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_346:.*]] = aie.switchbox(%[[VAL_219]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_347:.*]] = aie.tile(8, 1) +// CHECK: %[[VAL_348:.*]] = aie.switchbox(%[[VAL_347]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_349:.*]] = aie.switchbox(%[[VAL_200]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_350:.*]] = aie.shim_mux(%[[VAL_217]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_351:.*]] = aie.switchbox(%[[VAL_235]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_352:.*]] = aie.switchbox(%[[VAL_180]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_353:.*]] = aie.switchbox(%[[VAL_198]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_354:.*]] = aie.shim_mux(%[[VAL_198]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_355:.*]] = aie.switchbox(%[[VAL_161]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_356:.*]] = aie.tile(12, 0) +// CHECK: %[[VAL_357:.*]] = aie.switchbox(%[[VAL_356]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_358:.*]] = aie.tile(13, 0) +// CHECK: %[[VAL_359:.*]] = aie.switchbox(%[[VAL_358]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_360:.*]] = aie.tile(14, 0) +// CHECK: %[[VAL_361:.*]] = aie.switchbox(%[[VAL_360]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_362:.*]] = aie.tile(15, 0) +// CHECK: %[[VAL_363:.*]] = aie.switchbox(%[[VAL_362]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_364:.*]] = aie.tile(16, 0) +// CHECK: %[[VAL_365:.*]] = aie.switchbox(%[[VAL_364]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_366:.*]] = aie.tile(17, 0) +// CHECK: %[[VAL_367:.*]] = aie.switchbox(%[[VAL_366]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_368:.*]] = aie.switchbox(%[[VAL_179]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_369:.*]] = aie.shim_mux(%[[VAL_179]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_370:.*]] = aie.switchbox(%[[VAL_197]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_371:.*]] = aie.switchbox(%[[VAL_196]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_372:.*]] = aie.tile(11, 3) +// CHECK: %[[VAL_373:.*]] = aie.switchbox(%[[VAL_372]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_374:.*]] = aie.switchbox(%[[VAL_160]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_375:.*]] = aie.shim_mux(%[[VAL_160]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_376:.*]] = aie.switchbox(%[[VAL_142]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_377:.*]] = aie.tile(12, 1) +// CHECK: %[[VAL_378:.*]] = aie.switchbox(%[[VAL_377]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_379:.*]] = aie.tile(13, 1) +// CHECK: %[[VAL_380:.*]] = aie.switchbox(%[[VAL_379]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_381:.*]] = aie.tile(14, 1) +// CHECK: %[[VAL_382:.*]] = aie.switchbox(%[[VAL_381]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_383:.*]] = aie.tile(15, 1) +// CHECK: %[[VAL_384:.*]] = aie.switchbox(%[[VAL_383]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_385:.*]] = aie.tile(16, 1) +// CHECK: %[[VAL_386:.*]] = aie.switchbox(%[[VAL_385]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_387:.*]] = aie.tile(17, 1) +// CHECK: %[[VAL_388:.*]] = aie.switchbox(%[[VAL_387]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_389:.*]] = aie.switchbox(%[[VAL_178]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_390:.*]] = aie.tile(20, 0) +// CHECK: %[[VAL_391:.*]] = aie.switchbox(%[[VAL_390]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_392:.*]] = aie.tile(21, 0) +// CHECK: %[[VAL_393:.*]] = aie.switchbox(%[[VAL_392]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_394:.*]] = aie.tile(22, 0) +// CHECK: %[[VAL_395:.*]] = aie.switchbox(%[[VAL_394]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_396:.*]] = aie.tile(23, 0) +// CHECK: %[[VAL_397:.*]] = aie.switchbox(%[[VAL_396]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_398:.*]] = aie.tile(24, 0) +// CHECK: %[[VAL_399:.*]] = aie.switchbox(%[[VAL_398]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_400:.*]] = aie.tile(25, 0) +// CHECK: %[[VAL_401:.*]] = aie.switchbox(%[[VAL_400]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_402:.*]] = aie.switchbox(%[[VAL_140]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_403:.*]] = aie.shim_mux(%[[VAL_140]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_404:.*]] = aie.switchbox(%[[VAL_122]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_405:.*]] = aie.switchbox(%[[VAL_102]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_406:.*]] = aie.switchbox(%[[VAL_159]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_407:.*]] = aie.switchbox(%[[VAL_120]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_408:.*]] = aie.shim_mux(%[[VAL_120]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_409:.*]] = aie.tile(12, 2) +// CHECK: %[[VAL_410:.*]] = aie.switchbox(%[[VAL_409]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_411:.*]] = aie.tile(13, 2) +// CHECK: %[[VAL_412:.*]] = aie.switchbox(%[[VAL_411]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_413:.*]] = aie.tile(14, 2) +// CHECK: %[[VAL_414:.*]] = aie.switchbox(%[[VAL_413]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_415:.*]] = aie.tile(15, 2) +// CHECK: %[[VAL_416:.*]] = aie.switchbox(%[[VAL_415]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_417:.*]] = aie.tile(16, 2) +// CHECK: %[[VAL_418:.*]] = aie.switchbox(%[[VAL_417]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_419:.*]] = aie.tile(17, 2) +// CHECK: %[[VAL_420:.*]] = aie.switchbox(%[[VAL_419]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_421:.*]] = aie.switchbox(%[[VAL_177]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_422:.*]] = aie.switchbox(%[[VAL_158]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_423:.*]] = aie.tile(20, 1) +// CHECK: %[[VAL_424:.*]] = aie.switchbox(%[[VAL_423]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_425:.*]] = aie.tile(20, 2) +// CHECK: %[[VAL_426:.*]] = aie.switchbox(%[[VAL_425]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_427:.*]] = aie.tile(21, 1) +// CHECK: %[[VAL_428:.*]] = aie.switchbox(%[[VAL_427]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_429:.*]] = aie.tile(22, 1) +// CHECK: %[[VAL_430:.*]] = aie.switchbox(%[[VAL_429]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_431:.*]] = aie.tile(23, 1) +// CHECK: %[[VAL_432:.*]] = aie.switchbox(%[[VAL_431]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_433:.*]] = aie.tile(24, 1) +// CHECK: %[[VAL_434:.*]] = aie.switchbox(%[[VAL_433]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_435:.*]] = aie.tile(25, 1) +// CHECK: %[[VAL_436:.*]] = aie.switchbox(%[[VAL_435]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_437:.*]] = aie.switchbox(%[[VAL_139]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_438:.*]] = aie.tile(28, 0) +// CHECK: %[[VAL_439:.*]] = aie.switchbox(%[[VAL_438]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_440:.*]] = aie.tile(29, 0) +// CHECK: %[[VAL_441:.*]] = aie.switchbox(%[[VAL_440]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_442:.*]] = aie.tile(30, 0) +// CHECK: %[[VAL_443:.*]] = aie.switchbox(%[[VAL_442]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_444:.*]] = aie.tile(31, 0) +// CHECK: %[[VAL_445:.*]] = aie.switchbox(%[[VAL_444]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_446:.*]] = aie.tile(32, 0) +// CHECK: %[[VAL_447:.*]] = aie.switchbox(%[[VAL_446]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_448:.*]] = aie.tile(33, 0) +// CHECK: %[[VAL_449:.*]] = aie.switchbox(%[[VAL_448]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_450:.*]] = aie.switchbox(%[[VAL_101]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_451:.*]] = aie.shim_mux(%[[VAL_101]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_452:.*]] = aie.switchbox(%[[VAL_83]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_453:.*]] = aie.tile(12, 3) +// CHECK: %[[VAL_454:.*]] = aie.switchbox(%[[VAL_453]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_455:.*]] = aie.tile(13, 3) +// CHECK: %[[VAL_456:.*]] = aie.switchbox(%[[VAL_455]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_457:.*]] = aie.tile(14, 3) +// CHECK: %[[VAL_458:.*]] = aie.switchbox(%[[VAL_457]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_459:.*]] = aie.tile(15, 3) +// CHECK: %[[VAL_460:.*]] = aie.switchbox(%[[VAL_459]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_461:.*]] = aie.tile(16, 3) +// CHECK: %[[VAL_462:.*]] = aie.switchbox(%[[VAL_461]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_463:.*]] = aie.tile(17, 3) +// CHECK: %[[VAL_464:.*]] = aie.switchbox(%[[VAL_463]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_465:.*]] = aie.tile(18, 3) +// CHECK: %[[VAL_466:.*]] = aie.switchbox(%[[VAL_465]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_467:.*]] = aie.tile(19, 3) +// CHECK: %[[VAL_468:.*]] = aie.switchbox(%[[VAL_467]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_469:.*]] = aie.tile(20, 3) +// CHECK: %[[VAL_470:.*]] = aie.switchbox(%[[VAL_469]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_471:.*]] = aie.switchbox(%[[VAL_119]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_472:.*]] = aie.switchbox(%[[VAL_82]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_473:.*]] = aie.shim_mux(%[[VAL_82]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_474:.*]] = aie.switchbox(%[[VAL_64]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_475:.*]] = aie.switchbox(%[[VAL_44]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_476:.*]] = aie.switchbox(%[[VAL_24]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_477:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_478:.*]] = aie.tile(11, 5) +// CHECK: %[[VAL_479:.*]] = aie.switchbox(%[[VAL_478]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_480:.*]] = aie.tile(12, 5) +// CHECK: %[[VAL_481:.*]] = aie.switchbox(%[[VAL_480]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_482:.*]] = aie.tile(13, 5) +// CHECK: %[[VAL_483:.*]] = aie.switchbox(%[[VAL_482]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_484:.*]] = aie.tile(14, 5) +// CHECK: %[[VAL_485:.*]] = aie.switchbox(%[[VAL_484]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_486:.*]] = aie.tile(15, 4) +// CHECK: %[[VAL_487:.*]] = aie.switchbox(%[[VAL_486]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_488:.*]] = aie.tile(15, 5) +// CHECK: %[[VAL_489:.*]] = aie.switchbox(%[[VAL_488]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_490:.*]] = aie.tile(21, 3) +// CHECK: %[[VAL_491:.*]] = aie.switchbox(%[[VAL_490]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_492:.*]] = aie.tile(22, 3) +// CHECK: %[[VAL_493:.*]] = aie.switchbox(%[[VAL_492]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_494:.*]] = aie.tile(23, 3) +// CHECK: %[[VAL_495:.*]] = aie.switchbox(%[[VAL_494]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_496:.*]] = aie.tile(24, 2) +// CHECK: %[[VAL_497:.*]] = aie.switchbox(%[[VAL_496]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_498:.*]] = aie.tile(24, 3) +// CHECK: %[[VAL_499:.*]] = aie.switchbox(%[[VAL_498]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_500:.*]] = aie.tile(25, 2) +// CHECK: %[[VAL_501:.*]] = aie.switchbox(%[[VAL_500]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_502:.*]] = aie.switchbox(%[[VAL_138]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_503:.*]] = aie.tile(28, 1) +// CHECK: %[[VAL_504:.*]] = aie.switchbox(%[[VAL_503]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_505:.*]] = aie.tile(29, 1) +// CHECK: %[[VAL_506:.*]] = aie.switchbox(%[[VAL_505]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_507:.*]] = aie.tile(30, 1) +// CHECK: %[[VAL_508:.*]] = aie.switchbox(%[[VAL_507]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_509:.*]] = aie.tile(31, 1) +// CHECK: %[[VAL_510:.*]] = aie.switchbox(%[[VAL_509]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_511:.*]] = aie.tile(32, 1) +// CHECK: %[[VAL_512:.*]] = aie.switchbox(%[[VAL_511]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_513:.*]] = aie.tile(33, 1) +// CHECK: %[[VAL_514:.*]] = aie.switchbox(%[[VAL_513]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_515:.*]] = aie.switchbox(%[[VAL_100]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_516:.*]] = aie.tile(36, 0) +// CHECK: %[[VAL_517:.*]] = aie.switchbox(%[[VAL_516]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_518:.*]] = aie.tile(37, 0) +// CHECK: %[[VAL_519:.*]] = aie.switchbox(%[[VAL_518]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_520:.*]] = aie.tile(38, 0) +// CHECK: %[[VAL_521:.*]] = aie.switchbox(%[[VAL_520]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_522:.*]] = aie.tile(39, 0) +// CHECK: %[[VAL_523:.*]] = aie.switchbox(%[[VAL_522]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_524:.*]] = aie.tile(40, 0) +// CHECK: %[[VAL_525:.*]] = aie.switchbox(%[[VAL_524]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_526:.*]] = aie.tile(41, 0) +// CHECK: %[[VAL_527:.*]] = aie.switchbox(%[[VAL_526]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_528:.*]] = aie.switchbox(%[[VAL_62]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_529:.*]] = aie.shim_mux(%[[VAL_62]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_530:.*]] = aie.tile(11, 4) +// CHECK: %[[VAL_531:.*]] = aie.switchbox(%[[VAL_530]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_532:.*]] = aie.tile(12, 4) +// CHECK: %[[VAL_533:.*]] = aie.switchbox(%[[VAL_532]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_534:.*]] = aie.tile(13, 4) +// CHECK: %[[VAL_535:.*]] = aie.switchbox(%[[VAL_534]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_536:.*]] = aie.tile(14, 4) +// CHECK: %[[VAL_537:.*]] = aie.switchbox(%[[VAL_536]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_538:.*]] = aie.tile(16, 4) +// CHECK: %[[VAL_539:.*]] = aie.switchbox(%[[VAL_538]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_540:.*]] = aie.tile(17, 4) +// CHECK: %[[VAL_541:.*]] = aie.switchbox(%[[VAL_540]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_542:.*]] = aie.tile(21, 2) +// CHECK: %[[VAL_543:.*]] = aie.switchbox(%[[VAL_542]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_544:.*]] = aie.tile(22, 2) +// CHECK: %[[VAL_545:.*]] = aie.switchbox(%[[VAL_544]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_546:.*]] = aie.tile(23, 2) +// CHECK: %[[VAL_547:.*]] = aie.switchbox(%[[VAL_546]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_548:.*]] = aie.switchbox(%[[VAL_118]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_549:.*]] = aie.switchbox(%[[VAL_81]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_550:.*]] = aie.switchbox(%[[VAL_42]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_551:.*]] = aie.shim_mux(%[[VAL_42]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_552:.*]] = aie.tile(18, 4) +// CHECK: %[[VAL_553:.*]] = aie.switchbox(%[[VAL_552]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_554:.*]] = aie.tile(19, 4) +// CHECK: %[[VAL_555:.*]] = aie.switchbox(%[[VAL_554]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_556:.*]] = aie.tile(20, 4) +// CHECK: %[[VAL_557:.*]] = aie.switchbox(%[[VAL_556]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_558:.*]] = aie.tile(25, 3) +// CHECK: %[[VAL_559:.*]] = aie.switchbox(%[[VAL_558]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_560:.*]] = aie.tile(26, 3) +// CHECK: %[[VAL_561:.*]] = aie.switchbox(%[[VAL_560]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_562:.*]] = aie.tile(28, 2) +// CHECK: %[[VAL_563:.*]] = aie.switchbox(%[[VAL_562]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_564:.*]] = aie.tile(29, 2) +// CHECK: %[[VAL_565:.*]] = aie.switchbox(%[[VAL_564]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_566:.*]] = aie.tile(30, 2) +// CHECK: %[[VAL_567:.*]] = aie.switchbox(%[[VAL_566]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_568:.*]] = aie.tile(31, 2) +// CHECK: %[[VAL_569:.*]] = aie.switchbox(%[[VAL_568]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_570:.*]] = aie.tile(32, 2) +// CHECK: %[[VAL_571:.*]] = aie.switchbox(%[[VAL_570]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_572:.*]] = aie.tile(33, 2) +// CHECK: %[[VAL_573:.*]] = aie.switchbox(%[[VAL_572]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_574:.*]] = aie.switchbox(%[[VAL_99]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_575:.*]] = aie.switchbox(%[[VAL_80]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_576:.*]] = aie.tile(36, 2) +// CHECK: %[[VAL_577:.*]] = aie.switchbox(%[[VAL_576]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_578:.*]] = aie.tile(37, 2) +// CHECK: %[[VAL_579:.*]] = aie.switchbox(%[[VAL_578]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_580:.*]] = aie.tile(38, 2) +// CHECK: %[[VAL_581:.*]] = aie.switchbox(%[[VAL_580]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_582:.*]] = aie.tile(39, 2) +// CHECK: %[[VAL_583:.*]] = aie.switchbox(%[[VAL_582]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_584:.*]] = aie.tile(40, 2) +// CHECK: %[[VAL_585:.*]] = aie.switchbox(%[[VAL_584]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_586:.*]] = aie.tile(41, 1) +// CHECK: %[[VAL_587:.*]] = aie.switchbox(%[[VAL_586]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_588:.*]] = aie.tile(41, 2) +// CHECK: %[[VAL_589:.*]] = aie.switchbox(%[[VAL_588]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_590:.*]] = aie.switchbox(%[[VAL_61]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_591:.*]] = aie.tile(44, 0) +// CHECK: %[[VAL_592:.*]] = aie.switchbox(%[[VAL_591]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_593:.*]] = aie.tile(45, 0) +// CHECK: %[[VAL_594:.*]] = aie.switchbox(%[[VAL_593]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_595:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_596:.*]] = aie.shim_mux(%[[VAL_22]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_597:.*]] = aie.tile(16, 5) +// CHECK: %[[VAL_598:.*]] = aie.switchbox(%[[VAL_597]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_599:.*]] = aie.tile(17, 5) +// CHECK: %[[VAL_600:.*]] = aie.switchbox(%[[VAL_599]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_601:.*]] = aie.tile(18, 5) +// CHECK: %[[VAL_602:.*]] = aie.switchbox(%[[VAL_601]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_603:.*]] = aie.tile(21, 4) +// CHECK: %[[VAL_604:.*]] = aie.switchbox(%[[VAL_603]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_605:.*]] = aie.tile(22, 4) +// CHECK: %[[VAL_606:.*]] = aie.switchbox(%[[VAL_605]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_607:.*]] = aie.tile(23, 4) +// CHECK: %[[VAL_608:.*]] = aie.switchbox(%[[VAL_607]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_609:.*]] = aie.tile(24, 4) +// CHECK: %[[VAL_610:.*]] = aie.switchbox(%[[VAL_609]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_611:.*]] = aie.tile(25, 4) +// CHECK: %[[VAL_612:.*]] = aie.switchbox(%[[VAL_611]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_613:.*]] = aie.tile(26, 4) +// CHECK: %[[VAL_614:.*]] = aie.switchbox(%[[VAL_613]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_615:.*]] = aie.tile(27, 4) +// CHECK: %[[VAL_616:.*]] = aie.switchbox(%[[VAL_615]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_617:.*]] = aie.tile(28, 4) +// CHECK: %[[VAL_618:.*]] = aie.switchbox(%[[VAL_617]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_619:.*]] = aie.tile(29, 4) +// CHECK: %[[VAL_620:.*]] = aie.switchbox(%[[VAL_619]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_621:.*]] = aie.tile(30, 4) +// CHECK: %[[VAL_622:.*]] = aie.switchbox(%[[VAL_621]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_623:.*]] = aie.tile(31, 4) +// CHECK: %[[VAL_624:.*]] = aie.switchbox(%[[VAL_623]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_625:.*]] = aie.tile(32, 4) +// CHECK: %[[VAL_626:.*]] = aie.switchbox(%[[VAL_625]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_627:.*]] = aie.tile(33, 4) +// CHECK: %[[VAL_628:.*]] = aie.switchbox(%[[VAL_627]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_629:.*]] = aie.tile(34, 4) +// CHECK: %[[VAL_630:.*]] = aie.switchbox(%[[VAL_629]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_631:.*]] = aie.tile(35, 4) +// CHECK: %[[VAL_632:.*]] = aie.switchbox(%[[VAL_631]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_633:.*]] = aie.tile(36, 4) +// CHECK: %[[VAL_634:.*]] = aie.switchbox(%[[VAL_633]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_635:.*]] = aie.tile(37, 4) +// CHECK: %[[VAL_636:.*]] = aie.switchbox(%[[VAL_635]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_637:.*]] = aie.tile(38, 4) +// CHECK: %[[VAL_638:.*]] = aie.switchbox(%[[VAL_637]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_639:.*]] = aie.tile(39, 4) +// CHECK: %[[VAL_640:.*]] = aie.switchbox(%[[VAL_639]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_641:.*]] = aie.tile(40, 4) +// CHECK: %[[VAL_642:.*]] = aie.switchbox(%[[VAL_641]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_643:.*]] = aie.tile(41, 4) +// CHECK: %[[VAL_644:.*]] = aie.switchbox(%[[VAL_643]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_645:.*]] = aie.tile(42, 3) +// CHECK: %[[VAL_646:.*]] = aie.switchbox(%[[VAL_645]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_647:.*]] = aie.tile(42, 4) +// CHECK: %[[VAL_648:.*]] = aie.switchbox(%[[VAL_647]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_649:.*]] = aie.tile(43, 3) +// CHECK: %[[VAL_650:.*]] = aie.switchbox(%[[VAL_649]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_651:.*]] = aie.tile(44, 3) +// CHECK: %[[VAL_652:.*]] = aie.switchbox(%[[VAL_651]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_653:.*]] = aie.tile(45, 2) +// CHECK: %[[VAL_654:.*]] = aie.switchbox(%[[VAL_653]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_655:.*]] = aie.tile(45, 3) +// CHECK: %[[VAL_656:.*]] = aie.switchbox(%[[VAL_655]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_657:.*]] = aie.switchbox(%[[VAL_21]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_658:.*]] = aie.switchbox(%[[VAL_20]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_659:.*]] = aie.switchbox(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %[[VAL_660:.*]] = aie.shim_mux(%[[VAL_2]]) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: aie.wire(%[[VAL_661:.*]] : North, %[[VAL_662:.*]] : South) +// CHECK: aie.wire(%[[VAL_294]] : DMA, %[[VAL_661]] : DMA) +// CHECK: aie.wire(%[[VAL_293]] : Core, %[[VAL_663:.*]] : Core) +// CHECK: aie.wire(%[[VAL_293]] : DMA, %[[VAL_663]] : DMA) +// CHECK: aie.wire(%[[VAL_662]] : North, %[[VAL_663]] : South) +// CHECK: aie.wire(%[[VAL_292]] : Core, %[[VAL_664:.*]] : Core) +// CHECK: aie.wire(%[[VAL_292]] : DMA, %[[VAL_664]] : DMA) +// CHECK: aie.wire(%[[VAL_663]] : North, %[[VAL_664]] : South) +// CHECK: aie.wire(%[[VAL_662]] : East, %[[VAL_665:.*]] : West) +// CHECK: aie.wire(%[[VAL_666:.*]] : North, %[[VAL_665]] : South) +// CHECK: aie.wire(%[[VAL_274]] : DMA, %[[VAL_666]] : DMA) +// CHECK: aie.wire(%[[VAL_663]] : East, %[[VAL_667:.*]] : West) +// CHECK: aie.wire(%[[VAL_273]] : Core, %[[VAL_667]] : Core) +// CHECK: aie.wire(%[[VAL_273]] : DMA, %[[VAL_667]] : DMA) +// CHECK: aie.wire(%[[VAL_665]] : North, %[[VAL_667]] : South) +// CHECK: aie.wire(%[[VAL_664]] : East, %[[VAL_668:.*]] : West) +// CHECK: aie.wire(%[[VAL_272]] : Core, %[[VAL_668]] : Core) +// CHECK: aie.wire(%[[VAL_272]] : DMA, %[[VAL_668]] : DMA) +// CHECK: aie.wire(%[[VAL_667]] : North, %[[VAL_668]] : South) +// CHECK: aie.wire(%[[VAL_665]] : East, %[[VAL_669:.*]] : West) +// CHECK: aie.wire(%[[VAL_668]] : East, %[[VAL_670:.*]] : West) +// CHECK: aie.wire(%[[VAL_317]] : Core, %[[VAL_670]] : Core) +// CHECK: aie.wire(%[[VAL_317]] : DMA, %[[VAL_670]] : DMA) +// CHECK: aie.wire(%[[VAL_669]] : East, %[[VAL_671:.*]] : West) +// CHECK: aie.wire(%[[VAL_670]] : East, %[[VAL_672:.*]] : West) +// CHECK: aie.wire(%[[VAL_319]] : Core, %[[VAL_672]] : Core) +// CHECK: aie.wire(%[[VAL_319]] : DMA, %[[VAL_672]] : DMA) +// CHECK: aie.wire(%[[VAL_671]] : East, %[[VAL_673:.*]] : West) +// CHECK: aie.wire(%[[VAL_674:.*]] : North, %[[VAL_673]] : South) +// CHECK: aie.wire(%[[VAL_255]] : DMA, %[[VAL_674]] : DMA) +// CHECK: aie.wire(%[[VAL_254]] : Core, %[[VAL_675:.*]] : Core) +// CHECK: aie.wire(%[[VAL_254]] : DMA, %[[VAL_675]] : DMA) +// CHECK: aie.wire(%[[VAL_673]] : North, %[[VAL_675]] : South) +// CHECK: aie.wire(%[[VAL_672]] : East, %[[VAL_676:.*]] : West) +// CHECK: aie.wire(%[[VAL_253]] : Core, %[[VAL_676]] : Core) +// CHECK: aie.wire(%[[VAL_253]] : DMA, %[[VAL_676]] : DMA) +// CHECK: aie.wire(%[[VAL_675]] : North, %[[VAL_676]] : South) +// CHECK: aie.wire(%[[VAL_673]] : East, %[[VAL_677:.*]] : West) +// CHECK: aie.wire(%[[VAL_678:.*]] : North, %[[VAL_677]] : South) +// CHECK: aie.wire(%[[VAL_236]] : DMA, %[[VAL_678]] : DMA) +// CHECK: aie.wire(%[[VAL_675]] : East, %[[VAL_679:.*]] : West) +// CHECK: aie.wire(%[[VAL_235]] : Core, %[[VAL_679]] : Core) +// CHECK: aie.wire(%[[VAL_235]] : DMA, %[[VAL_679]] : DMA) +// CHECK: aie.wire(%[[VAL_677]] : North, %[[VAL_679]] : South) +// CHECK: aie.wire(%[[VAL_676]] : East, %[[VAL_680:.*]] : West) +// CHECK: aie.wire(%[[VAL_296]] : Core, %[[VAL_680]] : Core) +// CHECK: aie.wire(%[[VAL_296]] : DMA, %[[VAL_680]] : DMA) +// CHECK: aie.wire(%[[VAL_679]] : North, %[[VAL_680]] : South) +// CHECK: aie.wire(%[[VAL_219]] : Core, %[[VAL_681:.*]] : Core) +// CHECK: aie.wire(%[[VAL_219]] : DMA, %[[VAL_681]] : DMA) +// CHECK: aie.wire(%[[VAL_680]] : North, %[[VAL_681]] : South) +// CHECK: aie.wire(%[[VAL_142]] : Core, %[[VAL_682:.*]] : Core) +// CHECK: aie.wire(%[[VAL_142]] : DMA, %[[VAL_682]] : DMA) +// CHECK: aie.wire(%[[VAL_681]] : North, %[[VAL_682]] : South) +// CHECK: aie.wire(%[[VAL_64]] : Core, %[[VAL_683:.*]] : Core) +// CHECK: aie.wire(%[[VAL_64]] : DMA, %[[VAL_683]] : DMA) +// CHECK: aie.wire(%[[VAL_682]] : North, %[[VAL_683]] : South) +// CHECK: aie.wire(%[[VAL_677]] : East, %[[VAL_684:.*]] : West) +// CHECK: aie.wire(%[[VAL_679]] : East, %[[VAL_685:.*]] : West) +// CHECK: aie.wire(%[[VAL_347]] : Core, %[[VAL_685]] : Core) +// CHECK: aie.wire(%[[VAL_347]] : DMA, %[[VAL_685]] : DMA) +// CHECK: aie.wire(%[[VAL_684]] : North, %[[VAL_685]] : South) +// CHECK: aie.wire(%[[VAL_680]] : East, %[[VAL_686:.*]] : West) +// CHECK: aie.wire(%[[VAL_276]] : Core, %[[VAL_686]] : Core) +// CHECK: aie.wire(%[[VAL_276]] : DMA, %[[VAL_686]] : DMA) +// CHECK: aie.wire(%[[VAL_685]] : North, %[[VAL_686]] : South) +// CHECK: aie.wire(%[[VAL_681]] : East, %[[VAL_687:.*]] : West) +// CHECK: aie.wire(%[[VAL_200]] : Core, %[[VAL_687]] : Core) +// CHECK: aie.wire(%[[VAL_200]] : DMA, %[[VAL_687]] : DMA) +// CHECK: aie.wire(%[[VAL_686]] : North, %[[VAL_687]] : South) +// CHECK: aie.wire(%[[VAL_682]] : East, %[[VAL_688:.*]] : West) +// CHECK: aie.wire(%[[VAL_122]] : Core, %[[VAL_688]] : Core) +// CHECK: aie.wire(%[[VAL_122]] : DMA, %[[VAL_688]] : DMA) +// CHECK: aie.wire(%[[VAL_687]] : North, %[[VAL_688]] : South) +// CHECK: aie.wire(%[[VAL_683]] : East, %[[VAL_689:.*]] : West) +// CHECK: aie.wire(%[[VAL_44]] : Core, %[[VAL_689]] : Core) +// CHECK: aie.wire(%[[VAL_44]] : DMA, %[[VAL_689]] : DMA) +// CHECK: aie.wire(%[[VAL_688]] : North, %[[VAL_689]] : South) +// CHECK: aie.wire(%[[VAL_684]] : East, %[[VAL_690:.*]] : West) +// CHECK: aie.wire(%[[VAL_685]] : East, %[[VAL_691:.*]] : West) +// CHECK: aie.wire(%[[VAL_338]] : Core, %[[VAL_691]] : Core) +// CHECK: aie.wire(%[[VAL_338]] : DMA, %[[VAL_691]] : DMA) +// CHECK: aie.wire(%[[VAL_690]] : North, %[[VAL_691]] : South) +// CHECK: aie.wire(%[[VAL_686]] : East, %[[VAL_692:.*]] : West) +// CHECK: aie.wire(%[[VAL_256]] : Core, %[[VAL_692]] : Core) +// CHECK: aie.wire(%[[VAL_256]] : DMA, %[[VAL_692]] : DMA) +// CHECK: aie.wire(%[[VAL_691]] : North, %[[VAL_692]] : South) +// CHECK: aie.wire(%[[VAL_687]] : East, %[[VAL_693:.*]] : West) +// CHECK: aie.wire(%[[VAL_180]] : Core, %[[VAL_693]] : Core) +// CHECK: aie.wire(%[[VAL_180]] : DMA, %[[VAL_693]] : DMA) +// CHECK: aie.wire(%[[VAL_692]] : North, %[[VAL_693]] : South) +// CHECK: aie.wire(%[[VAL_688]] : East, %[[VAL_694:.*]] : West) +// CHECK: aie.wire(%[[VAL_102]] : Core, %[[VAL_694]] : Core) +// CHECK: aie.wire(%[[VAL_102]] : DMA, %[[VAL_694]] : DMA) +// CHECK: aie.wire(%[[VAL_693]] : North, %[[VAL_694]] : South) +// CHECK: aie.wire(%[[VAL_689]] : East, %[[VAL_695:.*]] : West) +// CHECK: aie.wire(%[[VAL_24]] : Core, %[[VAL_695]] : Core) +// CHECK: aie.wire(%[[VAL_24]] : DMA, %[[VAL_695]] : DMA) +// CHECK: aie.wire(%[[VAL_694]] : North, %[[VAL_695]] : South) +// CHECK: aie.wire(%[[VAL_690]] : East, %[[VAL_696:.*]] : West) +// CHECK: aie.wire(%[[VAL_697:.*]] : North, %[[VAL_696]] : South) +// CHECK: aie.wire(%[[VAL_217]] : DMA, %[[VAL_697]] : DMA) +// CHECK: aie.wire(%[[VAL_691]] : East, %[[VAL_698:.*]] : West) +// CHECK: aie.wire(%[[VAL_216]] : Core, %[[VAL_698]] : Core) +// CHECK: aie.wire(%[[VAL_216]] : DMA, %[[VAL_698]] : DMA) +// CHECK: aie.wire(%[[VAL_696]] : North, %[[VAL_698]] : South) +// CHECK: aie.wire(%[[VAL_692]] : East, %[[VAL_699:.*]] : West) +// CHECK: aie.wire(%[[VAL_237]] : Core, %[[VAL_699]] : Core) +// CHECK: aie.wire(%[[VAL_237]] : DMA, %[[VAL_699]] : DMA) +// CHECK: aie.wire(%[[VAL_698]] : North, %[[VAL_699]] : South) +// CHECK: aie.wire(%[[VAL_693]] : East, %[[VAL_700:.*]] : West) +// CHECK: aie.wire(%[[VAL_161]] : Core, %[[VAL_700]] : Core) +// CHECK: aie.wire(%[[VAL_161]] : DMA, %[[VAL_700]] : DMA) +// CHECK: aie.wire(%[[VAL_699]] : North, %[[VAL_700]] : South) +// CHECK: aie.wire(%[[VAL_694]] : East, %[[VAL_701:.*]] : West) +// CHECK: aie.wire(%[[VAL_83]] : Core, %[[VAL_701]] : Core) +// CHECK: aie.wire(%[[VAL_83]] : DMA, %[[VAL_701]] : DMA) +// CHECK: aie.wire(%[[VAL_700]] : North, %[[VAL_701]] : South) +// CHECK: aie.wire(%[[VAL_695]] : East, %[[VAL_702:.*]] : West) +// CHECK: aie.wire(%[[VAL_4]] : Core, %[[VAL_702]] : Core) +// CHECK: aie.wire(%[[VAL_4]] : DMA, %[[VAL_702]] : DMA) +// CHECK: aie.wire(%[[VAL_701]] : North, %[[VAL_702]] : South) +// CHECK: aie.wire(%[[VAL_696]] : East, %[[VAL_703:.*]] : West) +// CHECK: aie.wire(%[[VAL_704:.*]] : North, %[[VAL_703]] : South) +// CHECK: aie.wire(%[[VAL_198]] : DMA, %[[VAL_704]] : DMA) +// CHECK: aie.wire(%[[VAL_698]] : East, %[[VAL_705:.*]] : West) +// CHECK: aie.wire(%[[VAL_197]] : Core, %[[VAL_705]] : Core) +// CHECK: aie.wire(%[[VAL_197]] : DMA, %[[VAL_705]] : DMA) +// CHECK: aie.wire(%[[VAL_703]] : North, %[[VAL_705]] : South) +// CHECK: aie.wire(%[[VAL_699]] : East, %[[VAL_706:.*]] : West) +// CHECK: aie.wire(%[[VAL_196]] : Core, %[[VAL_706]] : Core) +// CHECK: aie.wire(%[[VAL_196]] : DMA, %[[VAL_706]] : DMA) +// CHECK: aie.wire(%[[VAL_705]] : North, %[[VAL_706]] : South) +// CHECK: aie.wire(%[[VAL_700]] : East, %[[VAL_707:.*]] : West) +// CHECK: aie.wire(%[[VAL_372]] : Core, %[[VAL_707]] : Core) +// CHECK: aie.wire(%[[VAL_372]] : DMA, %[[VAL_707]] : DMA) +// CHECK: aie.wire(%[[VAL_706]] : North, %[[VAL_707]] : South) +// CHECK: aie.wire(%[[VAL_701]] : East, %[[VAL_708:.*]] : West) +// CHECK: aie.wire(%[[VAL_530]] : Core, %[[VAL_708]] : Core) +// CHECK: aie.wire(%[[VAL_530]] : DMA, %[[VAL_708]] : DMA) +// CHECK: aie.wire(%[[VAL_707]] : North, %[[VAL_708]] : South) +// CHECK: aie.wire(%[[VAL_702]] : East, %[[VAL_709:.*]] : West) +// CHECK: aie.wire(%[[VAL_478]] : Core, %[[VAL_709]] : Core) +// CHECK: aie.wire(%[[VAL_478]] : DMA, %[[VAL_709]] : DMA) +// CHECK: aie.wire(%[[VAL_708]] : North, %[[VAL_709]] : South) +// CHECK: aie.wire(%[[VAL_703]] : East, %[[VAL_710:.*]] : West) +// CHECK: aie.wire(%[[VAL_705]] : East, %[[VAL_711:.*]] : West) +// CHECK: aie.wire(%[[VAL_377]] : Core, %[[VAL_711]] : Core) +// CHECK: aie.wire(%[[VAL_377]] : DMA, %[[VAL_711]] : DMA) +// CHECK: aie.wire(%[[VAL_710]] : North, %[[VAL_711]] : South) +// CHECK: aie.wire(%[[VAL_706]] : East, %[[VAL_712:.*]] : West) +// CHECK: aie.wire(%[[VAL_409]] : Core, %[[VAL_712]] : Core) +// CHECK: aie.wire(%[[VAL_409]] : DMA, %[[VAL_712]] : DMA) +// CHECK: aie.wire(%[[VAL_711]] : North, %[[VAL_712]] : South) +// CHECK: aie.wire(%[[VAL_707]] : East, %[[VAL_713:.*]] : West) +// CHECK: aie.wire(%[[VAL_453]] : Core, %[[VAL_713]] : Core) +// CHECK: aie.wire(%[[VAL_453]] : DMA, %[[VAL_713]] : DMA) +// CHECK: aie.wire(%[[VAL_712]] : North, %[[VAL_713]] : South) +// CHECK: aie.wire(%[[VAL_708]] : East, %[[VAL_714:.*]] : West) +// CHECK: aie.wire(%[[VAL_532]] : Core, %[[VAL_714]] : Core) +// CHECK: aie.wire(%[[VAL_532]] : DMA, %[[VAL_714]] : DMA) +// CHECK: aie.wire(%[[VAL_713]] : North, %[[VAL_714]] : South) +// CHECK: aie.wire(%[[VAL_709]] : East, %[[VAL_715:.*]] : West) +// CHECK: aie.wire(%[[VAL_480]] : Core, %[[VAL_715]] : Core) +// CHECK: aie.wire(%[[VAL_480]] : DMA, %[[VAL_715]] : DMA) +// CHECK: aie.wire(%[[VAL_714]] : North, %[[VAL_715]] : South) +// CHECK: aie.wire(%[[VAL_710]] : East, %[[VAL_716:.*]] : West) +// CHECK: aie.wire(%[[VAL_711]] : East, %[[VAL_717:.*]] : West) +// CHECK: aie.wire(%[[VAL_379]] : Core, %[[VAL_717]] : Core) +// CHECK: aie.wire(%[[VAL_379]] : DMA, %[[VAL_717]] : DMA) +// CHECK: aie.wire(%[[VAL_716]] : North, %[[VAL_717]] : South) +// CHECK: aie.wire(%[[VAL_712]] : East, %[[VAL_718:.*]] : West) +// CHECK: aie.wire(%[[VAL_411]] : Core, %[[VAL_718]] : Core) +// CHECK: aie.wire(%[[VAL_411]] : DMA, %[[VAL_718]] : DMA) +// CHECK: aie.wire(%[[VAL_717]] : North, %[[VAL_718]] : South) +// CHECK: aie.wire(%[[VAL_713]] : East, %[[VAL_719:.*]] : West) +// CHECK: aie.wire(%[[VAL_455]] : Core, %[[VAL_719]] : Core) +// CHECK: aie.wire(%[[VAL_455]] : DMA, %[[VAL_719]] : DMA) +// CHECK: aie.wire(%[[VAL_718]] : North, %[[VAL_719]] : South) +// CHECK: aie.wire(%[[VAL_714]] : East, %[[VAL_720:.*]] : West) +// CHECK: aie.wire(%[[VAL_534]] : Core, %[[VAL_720]] : Core) +// CHECK: aie.wire(%[[VAL_534]] : DMA, %[[VAL_720]] : DMA) +// CHECK: aie.wire(%[[VAL_719]] : North, %[[VAL_720]] : South) +// CHECK: aie.wire(%[[VAL_715]] : East, %[[VAL_721:.*]] : West) +// CHECK: aie.wire(%[[VAL_482]] : Core, %[[VAL_721]] : Core) +// CHECK: aie.wire(%[[VAL_482]] : DMA, %[[VAL_721]] : DMA) +// CHECK: aie.wire(%[[VAL_720]] : North, %[[VAL_721]] : South) +// CHECK: aie.wire(%[[VAL_716]] : East, %[[VAL_722:.*]] : West) +// CHECK: aie.wire(%[[VAL_717]] : East, %[[VAL_723:.*]] : West) +// CHECK: aie.wire(%[[VAL_381]] : Core, %[[VAL_723]] : Core) +// CHECK: aie.wire(%[[VAL_381]] : DMA, %[[VAL_723]] : DMA) +// CHECK: aie.wire(%[[VAL_722]] : North, %[[VAL_723]] : South) +// CHECK: aie.wire(%[[VAL_718]] : East, %[[VAL_724:.*]] : West) +// CHECK: aie.wire(%[[VAL_413]] : Core, %[[VAL_724]] : Core) +// CHECK: aie.wire(%[[VAL_413]] : DMA, %[[VAL_724]] : DMA) +// CHECK: aie.wire(%[[VAL_723]] : North, %[[VAL_724]] : South) +// CHECK: aie.wire(%[[VAL_719]] : East, %[[VAL_725:.*]] : West) +// CHECK: aie.wire(%[[VAL_457]] : Core, %[[VAL_725]] : Core) +// CHECK: aie.wire(%[[VAL_457]] : DMA, %[[VAL_725]] : DMA) +// CHECK: aie.wire(%[[VAL_724]] : North, %[[VAL_725]] : South) +// CHECK: aie.wire(%[[VAL_720]] : East, %[[VAL_726:.*]] : West) +// CHECK: aie.wire(%[[VAL_536]] : Core, %[[VAL_726]] : Core) +// CHECK: aie.wire(%[[VAL_536]] : DMA, %[[VAL_726]] : DMA) +// CHECK: aie.wire(%[[VAL_725]] : North, %[[VAL_726]] : South) +// CHECK: aie.wire(%[[VAL_721]] : East, %[[VAL_727:.*]] : West) +// CHECK: aie.wire(%[[VAL_484]] : Core, %[[VAL_727]] : Core) +// CHECK: aie.wire(%[[VAL_484]] : DMA, %[[VAL_727]] : DMA) +// CHECK: aie.wire(%[[VAL_726]] : North, %[[VAL_727]] : South) +// CHECK: aie.wire(%[[VAL_722]] : East, %[[VAL_728:.*]] : West) +// CHECK: aie.wire(%[[VAL_723]] : East, %[[VAL_729:.*]] : West) +// CHECK: aie.wire(%[[VAL_383]] : Core, %[[VAL_729]] : Core) +// CHECK: aie.wire(%[[VAL_383]] : DMA, %[[VAL_729]] : DMA) +// CHECK: aie.wire(%[[VAL_728]] : North, %[[VAL_729]] : South) +// CHECK: aie.wire(%[[VAL_724]] : East, %[[VAL_730:.*]] : West) +// CHECK: aie.wire(%[[VAL_415]] : Core, %[[VAL_730]] : Core) +// CHECK: aie.wire(%[[VAL_415]] : DMA, %[[VAL_730]] : DMA) +// CHECK: aie.wire(%[[VAL_729]] : North, %[[VAL_730]] : South) +// CHECK: aie.wire(%[[VAL_725]] : East, %[[VAL_731:.*]] : West) +// CHECK: aie.wire(%[[VAL_459]] : Core, %[[VAL_731]] : Core) +// CHECK: aie.wire(%[[VAL_459]] : DMA, %[[VAL_731]] : DMA) +// CHECK: aie.wire(%[[VAL_730]] : North, %[[VAL_731]] : South) +// CHECK: aie.wire(%[[VAL_726]] : East, %[[VAL_732:.*]] : West) +// CHECK: aie.wire(%[[VAL_486]] : Core, %[[VAL_732]] : Core) +// CHECK: aie.wire(%[[VAL_486]] : DMA, %[[VAL_732]] : DMA) +// CHECK: aie.wire(%[[VAL_731]] : North, %[[VAL_732]] : South) +// CHECK: aie.wire(%[[VAL_727]] : East, %[[VAL_733:.*]] : West) +// CHECK: aie.wire(%[[VAL_488]] : Core, %[[VAL_733]] : Core) +// CHECK: aie.wire(%[[VAL_488]] : DMA, %[[VAL_733]] : DMA) +// CHECK: aie.wire(%[[VAL_732]] : North, %[[VAL_733]] : South) +// CHECK: aie.wire(%[[VAL_728]] : East, %[[VAL_734:.*]] : West) +// CHECK: aie.wire(%[[VAL_729]] : East, %[[VAL_735:.*]] : West) +// CHECK: aie.wire(%[[VAL_385]] : Core, %[[VAL_735]] : Core) +// CHECK: aie.wire(%[[VAL_385]] : DMA, %[[VAL_735]] : DMA) +// CHECK: aie.wire(%[[VAL_734]] : North, %[[VAL_735]] : South) +// CHECK: aie.wire(%[[VAL_730]] : East, %[[VAL_736:.*]] : West) +// CHECK: aie.wire(%[[VAL_417]] : Core, %[[VAL_736]] : Core) +// CHECK: aie.wire(%[[VAL_417]] : DMA, %[[VAL_736]] : DMA) +// CHECK: aie.wire(%[[VAL_735]] : North, %[[VAL_736]] : South) +// CHECK: aie.wire(%[[VAL_731]] : East, %[[VAL_737:.*]] : West) +// CHECK: aie.wire(%[[VAL_461]] : Core, %[[VAL_737]] : Core) +// CHECK: aie.wire(%[[VAL_461]] : DMA, %[[VAL_737]] : DMA) +// CHECK: aie.wire(%[[VAL_736]] : North, %[[VAL_737]] : South) +// CHECK: aie.wire(%[[VAL_732]] : East, %[[VAL_738:.*]] : West) +// CHECK: aie.wire(%[[VAL_538]] : Core, %[[VAL_738]] : Core) +// CHECK: aie.wire(%[[VAL_538]] : DMA, %[[VAL_738]] : DMA) +// CHECK: aie.wire(%[[VAL_737]] : North, %[[VAL_738]] : South) +// CHECK: aie.wire(%[[VAL_733]] : East, %[[VAL_739:.*]] : West) +// CHECK: aie.wire(%[[VAL_597]] : Core, %[[VAL_739]] : Core) +// CHECK: aie.wire(%[[VAL_597]] : DMA, %[[VAL_739]] : DMA) +// CHECK: aie.wire(%[[VAL_738]] : North, %[[VAL_739]] : South) +// CHECK: aie.wire(%[[VAL_734]] : East, %[[VAL_740:.*]] : West) +// CHECK: aie.wire(%[[VAL_735]] : East, %[[VAL_741:.*]] : West) +// CHECK: aie.wire(%[[VAL_387]] : Core, %[[VAL_741]] : Core) +// CHECK: aie.wire(%[[VAL_387]] : DMA, %[[VAL_741]] : DMA) +// CHECK: aie.wire(%[[VAL_740]] : North, %[[VAL_741]] : South) +// CHECK: aie.wire(%[[VAL_736]] : East, %[[VAL_742:.*]] : West) +// CHECK: aie.wire(%[[VAL_419]] : Core, %[[VAL_742]] : Core) +// CHECK: aie.wire(%[[VAL_419]] : DMA, %[[VAL_742]] : DMA) +// CHECK: aie.wire(%[[VAL_741]] : North, %[[VAL_742]] : South) +// CHECK: aie.wire(%[[VAL_737]] : East, %[[VAL_743:.*]] : West) +// CHECK: aie.wire(%[[VAL_463]] : Core, %[[VAL_743]] : Core) +// CHECK: aie.wire(%[[VAL_463]] : DMA, %[[VAL_743]] : DMA) +// CHECK: aie.wire(%[[VAL_742]] : North, %[[VAL_743]] : South) +// CHECK: aie.wire(%[[VAL_738]] : East, %[[VAL_744:.*]] : West) +// CHECK: aie.wire(%[[VAL_540]] : Core, %[[VAL_744]] : Core) +// CHECK: aie.wire(%[[VAL_540]] : DMA, %[[VAL_744]] : DMA) +// CHECK: aie.wire(%[[VAL_743]] : North, %[[VAL_744]] : South) +// CHECK: aie.wire(%[[VAL_739]] : East, %[[VAL_745:.*]] : West) +// CHECK: aie.wire(%[[VAL_599]] : Core, %[[VAL_745]] : Core) +// CHECK: aie.wire(%[[VAL_599]] : DMA, %[[VAL_745]] : DMA) +// CHECK: aie.wire(%[[VAL_744]] : North, %[[VAL_745]] : South) +// CHECK: aie.wire(%[[VAL_740]] : East, %[[VAL_746:.*]] : West) +// CHECK: aie.wire(%[[VAL_747:.*]] : North, %[[VAL_746]] : South) +// CHECK: aie.wire(%[[VAL_179]] : DMA, %[[VAL_747]] : DMA) +// CHECK: aie.wire(%[[VAL_741]] : East, %[[VAL_748:.*]] : West) +// CHECK: aie.wire(%[[VAL_178]] : Core, %[[VAL_748]] : Core) +// CHECK: aie.wire(%[[VAL_178]] : DMA, %[[VAL_748]] : DMA) +// CHECK: aie.wire(%[[VAL_746]] : North, %[[VAL_748]] : South) +// CHECK: aie.wire(%[[VAL_742]] : East, %[[VAL_749:.*]] : West) +// CHECK: aie.wire(%[[VAL_177]] : Core, %[[VAL_749]] : Core) +// CHECK: aie.wire(%[[VAL_177]] : DMA, %[[VAL_749]] : DMA) +// CHECK: aie.wire(%[[VAL_748]] : North, %[[VAL_749]] : South) +// CHECK: aie.wire(%[[VAL_743]] : East, %[[VAL_750:.*]] : West) +// CHECK: aie.wire(%[[VAL_465]] : Core, %[[VAL_750]] : Core) +// CHECK: aie.wire(%[[VAL_465]] : DMA, %[[VAL_750]] : DMA) +// CHECK: aie.wire(%[[VAL_749]] : North, %[[VAL_750]] : South) +// CHECK: aie.wire(%[[VAL_744]] : East, %[[VAL_751:.*]] : West) +// CHECK: aie.wire(%[[VAL_552]] : Core, %[[VAL_751]] : Core) +// CHECK: aie.wire(%[[VAL_552]] : DMA, %[[VAL_751]] : DMA) +// CHECK: aie.wire(%[[VAL_750]] : North, %[[VAL_751]] : South) +// CHECK: aie.wire(%[[VAL_745]] : East, %[[VAL_752:.*]] : West) +// CHECK: aie.wire(%[[VAL_601]] : Core, %[[VAL_752]] : Core) +// CHECK: aie.wire(%[[VAL_601]] : DMA, %[[VAL_752]] : DMA) +// CHECK: aie.wire(%[[VAL_751]] : North, %[[VAL_752]] : South) +// CHECK: aie.wire(%[[VAL_746]] : East, %[[VAL_753:.*]] : West) +// CHECK: aie.wire(%[[VAL_754:.*]] : North, %[[VAL_753]] : South) +// CHECK: aie.wire(%[[VAL_160]] : DMA, %[[VAL_754]] : DMA) +// CHECK: aie.wire(%[[VAL_748]] : East, %[[VAL_755:.*]] : West) +// CHECK: aie.wire(%[[VAL_159]] : Core, %[[VAL_755]] : Core) +// CHECK: aie.wire(%[[VAL_159]] : DMA, %[[VAL_755]] : DMA) +// CHECK: aie.wire(%[[VAL_753]] : North, %[[VAL_755]] : South) +// CHECK: aie.wire(%[[VAL_749]] : East, %[[VAL_756:.*]] : West) +// CHECK: aie.wire(%[[VAL_158]] : Core, %[[VAL_756]] : Core) +// CHECK: aie.wire(%[[VAL_158]] : DMA, %[[VAL_756]] : DMA) +// CHECK: aie.wire(%[[VAL_755]] : North, %[[VAL_756]] : South) +// CHECK: aie.wire(%[[VAL_750]] : East, %[[VAL_757:.*]] : West) +// CHECK: aie.wire(%[[VAL_467]] : Core, %[[VAL_757]] : Core) +// CHECK: aie.wire(%[[VAL_467]] : DMA, %[[VAL_757]] : DMA) +// CHECK: aie.wire(%[[VAL_756]] : North, %[[VAL_757]] : South) +// CHECK: aie.wire(%[[VAL_751]] : East, %[[VAL_758:.*]] : West) +// CHECK: aie.wire(%[[VAL_554]] : Core, %[[VAL_758]] : Core) +// CHECK: aie.wire(%[[VAL_554]] : DMA, %[[VAL_758]] : DMA) +// CHECK: aie.wire(%[[VAL_757]] : North, %[[VAL_758]] : South) +// CHECK: aie.wire(%[[VAL_753]] : East, %[[VAL_759:.*]] : West) +// CHECK: aie.wire(%[[VAL_755]] : East, %[[VAL_760:.*]] : West) +// CHECK: aie.wire(%[[VAL_423]] : Core, %[[VAL_760]] : Core) +// CHECK: aie.wire(%[[VAL_423]] : DMA, %[[VAL_760]] : DMA) +// CHECK: aie.wire(%[[VAL_759]] : North, %[[VAL_760]] : South) +// CHECK: aie.wire(%[[VAL_756]] : East, %[[VAL_761:.*]] : West) +// CHECK: aie.wire(%[[VAL_425]] : Core, %[[VAL_761]] : Core) +// CHECK: aie.wire(%[[VAL_425]] : DMA, %[[VAL_761]] : DMA) +// CHECK: aie.wire(%[[VAL_760]] : North, %[[VAL_761]] : South) +// CHECK: aie.wire(%[[VAL_757]] : East, %[[VAL_762:.*]] : West) +// CHECK: aie.wire(%[[VAL_469]] : Core, %[[VAL_762]] : Core) +// CHECK: aie.wire(%[[VAL_469]] : DMA, %[[VAL_762]] : DMA) +// CHECK: aie.wire(%[[VAL_761]] : North, %[[VAL_762]] : South) +// CHECK: aie.wire(%[[VAL_758]] : East, %[[VAL_763:.*]] : West) +// CHECK: aie.wire(%[[VAL_556]] : Core, %[[VAL_763]] : Core) +// CHECK: aie.wire(%[[VAL_556]] : DMA, %[[VAL_763]] : DMA) +// CHECK: aie.wire(%[[VAL_762]] : North, %[[VAL_763]] : South) +// CHECK: aie.wire(%[[VAL_759]] : East, %[[VAL_764:.*]] : West) +// CHECK: aie.wire(%[[VAL_760]] : East, %[[VAL_765:.*]] : West) +// CHECK: aie.wire(%[[VAL_427]] : Core, %[[VAL_765]] : Core) +// CHECK: aie.wire(%[[VAL_427]] : DMA, %[[VAL_765]] : DMA) +// CHECK: aie.wire(%[[VAL_764]] : North, %[[VAL_765]] : South) +// CHECK: aie.wire(%[[VAL_761]] : East, %[[VAL_766:.*]] : West) +// CHECK: aie.wire(%[[VAL_542]] : Core, %[[VAL_766]] : Core) +// CHECK: aie.wire(%[[VAL_542]] : DMA, %[[VAL_766]] : DMA) +// CHECK: aie.wire(%[[VAL_765]] : North, %[[VAL_766]] : South) +// CHECK: aie.wire(%[[VAL_762]] : East, %[[VAL_767:.*]] : West) +// CHECK: aie.wire(%[[VAL_490]] : Core, %[[VAL_767]] : Core) +// CHECK: aie.wire(%[[VAL_490]] : DMA, %[[VAL_767]] : DMA) +// CHECK: aie.wire(%[[VAL_766]] : North, %[[VAL_767]] : South) +// CHECK: aie.wire(%[[VAL_763]] : East, %[[VAL_768:.*]] : West) +// CHECK: aie.wire(%[[VAL_603]] : Core, %[[VAL_768]] : Core) +// CHECK: aie.wire(%[[VAL_603]] : DMA, %[[VAL_768]] : DMA) +// CHECK: aie.wire(%[[VAL_767]] : North, %[[VAL_768]] : South) +// CHECK: aie.wire(%[[VAL_764]] : East, %[[VAL_769:.*]] : West) +// CHECK: aie.wire(%[[VAL_765]] : East, %[[VAL_770:.*]] : West) +// CHECK: aie.wire(%[[VAL_429]] : Core, %[[VAL_770]] : Core) +// CHECK: aie.wire(%[[VAL_429]] : DMA, %[[VAL_770]] : DMA) +// CHECK: aie.wire(%[[VAL_769]] : North, %[[VAL_770]] : South) +// CHECK: aie.wire(%[[VAL_766]] : East, %[[VAL_771:.*]] : West) +// CHECK: aie.wire(%[[VAL_544]] : Core, %[[VAL_771]] : Core) +// CHECK: aie.wire(%[[VAL_544]] : DMA, %[[VAL_771]] : DMA) +// CHECK: aie.wire(%[[VAL_770]] : North, %[[VAL_771]] : South) +// CHECK: aie.wire(%[[VAL_767]] : East, %[[VAL_772:.*]] : West) +// CHECK: aie.wire(%[[VAL_492]] : Core, %[[VAL_772]] : Core) +// CHECK: aie.wire(%[[VAL_492]] : DMA, %[[VAL_772]] : DMA) +// CHECK: aie.wire(%[[VAL_771]] : North, %[[VAL_772]] : South) +// CHECK: aie.wire(%[[VAL_768]] : East, %[[VAL_773:.*]] : West) +// CHECK: aie.wire(%[[VAL_605]] : Core, %[[VAL_773]] : Core) +// CHECK: aie.wire(%[[VAL_605]] : DMA, %[[VAL_773]] : DMA) +// CHECK: aie.wire(%[[VAL_772]] : North, %[[VAL_773]] : South) +// CHECK: aie.wire(%[[VAL_769]] : East, %[[VAL_774:.*]] : West) +// CHECK: aie.wire(%[[VAL_770]] : East, %[[VAL_775:.*]] : West) +// CHECK: aie.wire(%[[VAL_431]] : Core, %[[VAL_775]] : Core) +// CHECK: aie.wire(%[[VAL_431]] : DMA, %[[VAL_775]] : DMA) +// CHECK: aie.wire(%[[VAL_774]] : North, %[[VAL_775]] : South) +// CHECK: aie.wire(%[[VAL_771]] : East, %[[VAL_776:.*]] : West) +// CHECK: aie.wire(%[[VAL_546]] : Core, %[[VAL_776]] : Core) +// CHECK: aie.wire(%[[VAL_546]] : DMA, %[[VAL_776]] : DMA) +// CHECK: aie.wire(%[[VAL_775]] : North, %[[VAL_776]] : South) +// CHECK: aie.wire(%[[VAL_772]] : East, %[[VAL_777:.*]] : West) +// CHECK: aie.wire(%[[VAL_494]] : Core, %[[VAL_777]] : Core) +// CHECK: aie.wire(%[[VAL_494]] : DMA, %[[VAL_777]] : DMA) +// CHECK: aie.wire(%[[VAL_776]] : North, %[[VAL_777]] : South) +// CHECK: aie.wire(%[[VAL_773]] : East, %[[VAL_778:.*]] : West) +// CHECK: aie.wire(%[[VAL_607]] : Core, %[[VAL_778]] : Core) +// CHECK: aie.wire(%[[VAL_607]] : DMA, %[[VAL_778]] : DMA) +// CHECK: aie.wire(%[[VAL_777]] : North, %[[VAL_778]] : South) +// CHECK: aie.wire(%[[VAL_774]] : East, %[[VAL_779:.*]] : West) +// CHECK: aie.wire(%[[VAL_775]] : East, %[[VAL_780:.*]] : West) +// CHECK: aie.wire(%[[VAL_433]] : Core, %[[VAL_780]] : Core) +// CHECK: aie.wire(%[[VAL_433]] : DMA, %[[VAL_780]] : DMA) +// CHECK: aie.wire(%[[VAL_779]] : North, %[[VAL_780]] : South) +// CHECK: aie.wire(%[[VAL_776]] : East, %[[VAL_781:.*]] : West) +// CHECK: aie.wire(%[[VAL_496]] : Core, %[[VAL_781]] : Core) +// CHECK: aie.wire(%[[VAL_496]] : DMA, %[[VAL_781]] : DMA) +// CHECK: aie.wire(%[[VAL_780]] : North, %[[VAL_781]] : South) +// CHECK: aie.wire(%[[VAL_777]] : East, %[[VAL_782:.*]] : West) +// CHECK: aie.wire(%[[VAL_498]] : Core, %[[VAL_782]] : Core) +// CHECK: aie.wire(%[[VAL_498]] : DMA, %[[VAL_782]] : DMA) +// CHECK: aie.wire(%[[VAL_781]] : North, %[[VAL_782]] : South) +// CHECK: aie.wire(%[[VAL_778]] : East, %[[VAL_783:.*]] : West) +// CHECK: aie.wire(%[[VAL_609]] : Core, %[[VAL_783]] : Core) +// CHECK: aie.wire(%[[VAL_609]] : DMA, %[[VAL_783]] : DMA) +// CHECK: aie.wire(%[[VAL_782]] : North, %[[VAL_783]] : South) +// CHECK: aie.wire(%[[VAL_779]] : East, %[[VAL_784:.*]] : West) +// CHECK: aie.wire(%[[VAL_780]] : East, %[[VAL_785:.*]] : West) +// CHECK: aie.wire(%[[VAL_435]] : Core, %[[VAL_785]] : Core) +// CHECK: aie.wire(%[[VAL_435]] : DMA, %[[VAL_785]] : DMA) +// CHECK: aie.wire(%[[VAL_784]] : North, %[[VAL_785]] : South) +// CHECK: aie.wire(%[[VAL_781]] : East, %[[VAL_786:.*]] : West) +// CHECK: aie.wire(%[[VAL_500]] : Core, %[[VAL_786]] : Core) +// CHECK: aie.wire(%[[VAL_500]] : DMA, %[[VAL_786]] : DMA) +// CHECK: aie.wire(%[[VAL_785]] : North, %[[VAL_786]] : South) +// CHECK: aie.wire(%[[VAL_782]] : East, %[[VAL_787:.*]] : West) +// CHECK: aie.wire(%[[VAL_558]] : Core, %[[VAL_787]] : Core) +// CHECK: aie.wire(%[[VAL_558]] : DMA, %[[VAL_787]] : DMA) +// CHECK: aie.wire(%[[VAL_786]] : North, %[[VAL_787]] : South) +// CHECK: aie.wire(%[[VAL_783]] : East, %[[VAL_788:.*]] : West) +// CHECK: aie.wire(%[[VAL_611]] : Core, %[[VAL_788]] : Core) +// CHECK: aie.wire(%[[VAL_611]] : DMA, %[[VAL_788]] : DMA) +// CHECK: aie.wire(%[[VAL_787]] : North, %[[VAL_788]] : South) +// CHECK: aie.wire(%[[VAL_784]] : East, %[[VAL_789:.*]] : West) +// CHECK: aie.wire(%[[VAL_790:.*]] : North, %[[VAL_789]] : South) +// CHECK: aie.wire(%[[VAL_140]] : DMA, %[[VAL_790]] : DMA) +// CHECK: aie.wire(%[[VAL_785]] : East, %[[VAL_791:.*]] : West) +// CHECK: aie.wire(%[[VAL_139]] : Core, %[[VAL_791]] : Core) +// CHECK: aie.wire(%[[VAL_139]] : DMA, %[[VAL_791]] : DMA) +// CHECK: aie.wire(%[[VAL_789]] : North, %[[VAL_791]] : South) +// CHECK: aie.wire(%[[VAL_786]] : East, %[[VAL_792:.*]] : West) +// CHECK: aie.wire(%[[VAL_138]] : Core, %[[VAL_792]] : Core) +// CHECK: aie.wire(%[[VAL_138]] : DMA, %[[VAL_792]] : DMA) +// CHECK: aie.wire(%[[VAL_791]] : North, %[[VAL_792]] : South) +// CHECK: aie.wire(%[[VAL_787]] : East, %[[VAL_793:.*]] : West) +// CHECK: aie.wire(%[[VAL_560]] : Core, %[[VAL_793]] : Core) +// CHECK: aie.wire(%[[VAL_560]] : DMA, %[[VAL_793]] : DMA) +// CHECK: aie.wire(%[[VAL_792]] : North, %[[VAL_793]] : South) +// CHECK: aie.wire(%[[VAL_788]] : East, %[[VAL_794:.*]] : West) +// CHECK: aie.wire(%[[VAL_613]] : Core, %[[VAL_794]] : Core) +// CHECK: aie.wire(%[[VAL_613]] : DMA, %[[VAL_794]] : DMA) +// CHECK: aie.wire(%[[VAL_793]] : North, %[[VAL_794]] : South) +// CHECK: aie.wire(%[[VAL_789]] : East, %[[VAL_795:.*]] : West) +// CHECK: aie.wire(%[[VAL_796:.*]] : North, %[[VAL_795]] : South) +// CHECK: aie.wire(%[[VAL_120]] : DMA, %[[VAL_796]] : DMA) +// CHECK: aie.wire(%[[VAL_791]] : East, %[[VAL_797:.*]] : West) +// CHECK: aie.wire(%[[VAL_119]] : Core, %[[VAL_797]] : Core) +// CHECK: aie.wire(%[[VAL_119]] : DMA, %[[VAL_797]] : DMA) +// CHECK: aie.wire(%[[VAL_795]] : North, %[[VAL_797]] : South) +// CHECK: aie.wire(%[[VAL_792]] : East, %[[VAL_798:.*]] : West) +// CHECK: aie.wire(%[[VAL_118]] : Core, %[[VAL_798]] : Core) +// CHECK: aie.wire(%[[VAL_118]] : DMA, %[[VAL_798]] : DMA) +// CHECK: aie.wire(%[[VAL_797]] : North, %[[VAL_798]] : South) +// CHECK: aie.wire(%[[VAL_794]] : East, %[[VAL_799:.*]] : West) +// CHECK: aie.wire(%[[VAL_615]] : Core, %[[VAL_799]] : Core) +// CHECK: aie.wire(%[[VAL_615]] : DMA, %[[VAL_799]] : DMA) +// CHECK: aie.wire(%[[VAL_795]] : East, %[[VAL_800:.*]] : West) +// CHECK: aie.wire(%[[VAL_797]] : East, %[[VAL_801:.*]] : West) +// CHECK: aie.wire(%[[VAL_503]] : Core, %[[VAL_801]] : Core) +// CHECK: aie.wire(%[[VAL_503]] : DMA, %[[VAL_801]] : DMA) +// CHECK: aie.wire(%[[VAL_800]] : North, %[[VAL_801]] : South) +// CHECK: aie.wire(%[[VAL_798]] : East, %[[VAL_802:.*]] : West) +// CHECK: aie.wire(%[[VAL_562]] : Core, %[[VAL_802]] : Core) +// CHECK: aie.wire(%[[VAL_562]] : DMA, %[[VAL_802]] : DMA) +// CHECK: aie.wire(%[[VAL_801]] : North, %[[VAL_802]] : South) +// CHECK: aie.wire(%[[VAL_799]] : East, %[[VAL_803:.*]] : West) +// CHECK: aie.wire(%[[VAL_617]] : Core, %[[VAL_803]] : Core) +// CHECK: aie.wire(%[[VAL_617]] : DMA, %[[VAL_803]] : DMA) +// CHECK: aie.wire(%[[VAL_800]] : East, %[[VAL_804:.*]] : West) +// CHECK: aie.wire(%[[VAL_801]] : East, %[[VAL_805:.*]] : West) +// CHECK: aie.wire(%[[VAL_505]] : Core, %[[VAL_805]] : Core) +// CHECK: aie.wire(%[[VAL_505]] : DMA, %[[VAL_805]] : DMA) +// CHECK: aie.wire(%[[VAL_804]] : North, %[[VAL_805]] : South) +// CHECK: aie.wire(%[[VAL_802]] : East, %[[VAL_806:.*]] : West) +// CHECK: aie.wire(%[[VAL_564]] : Core, %[[VAL_806]] : Core) +// CHECK: aie.wire(%[[VAL_564]] : DMA, %[[VAL_806]] : DMA) +// CHECK: aie.wire(%[[VAL_805]] : North, %[[VAL_806]] : South) +// CHECK: aie.wire(%[[VAL_803]] : East, %[[VAL_807:.*]] : West) +// CHECK: aie.wire(%[[VAL_619]] : Core, %[[VAL_807]] : Core) +// CHECK: aie.wire(%[[VAL_619]] : DMA, %[[VAL_807]] : DMA) +// CHECK: aie.wire(%[[VAL_804]] : East, %[[VAL_808:.*]] : West) +// CHECK: aie.wire(%[[VAL_805]] : East, %[[VAL_809:.*]] : West) +// CHECK: aie.wire(%[[VAL_507]] : Core, %[[VAL_809]] : Core) +// CHECK: aie.wire(%[[VAL_507]] : DMA, %[[VAL_809]] : DMA) +// CHECK: aie.wire(%[[VAL_808]] : North, %[[VAL_809]] : South) +// CHECK: aie.wire(%[[VAL_806]] : East, %[[VAL_810:.*]] : West) +// CHECK: aie.wire(%[[VAL_566]] : Core, %[[VAL_810]] : Core) +// CHECK: aie.wire(%[[VAL_566]] : DMA, %[[VAL_810]] : DMA) +// CHECK: aie.wire(%[[VAL_809]] : North, %[[VAL_810]] : South) +// CHECK: aie.wire(%[[VAL_807]] : East, %[[VAL_811:.*]] : West) +// CHECK: aie.wire(%[[VAL_621]] : Core, %[[VAL_811]] : Core) +// CHECK: aie.wire(%[[VAL_621]] : DMA, %[[VAL_811]] : DMA) +// CHECK: aie.wire(%[[VAL_808]] : East, %[[VAL_812:.*]] : West) +// CHECK: aie.wire(%[[VAL_809]] : East, %[[VAL_813:.*]] : West) +// CHECK: aie.wire(%[[VAL_509]] : Core, %[[VAL_813]] : Core) +// CHECK: aie.wire(%[[VAL_509]] : DMA, %[[VAL_813]] : DMA) +// CHECK: aie.wire(%[[VAL_812]] : North, %[[VAL_813]] : South) +// CHECK: aie.wire(%[[VAL_810]] : East, %[[VAL_814:.*]] : West) +// CHECK: aie.wire(%[[VAL_568]] : Core, %[[VAL_814]] : Core) +// CHECK: aie.wire(%[[VAL_568]] : DMA, %[[VAL_814]] : DMA) +// CHECK: aie.wire(%[[VAL_813]] : North, %[[VAL_814]] : South) +// CHECK: aie.wire(%[[VAL_811]] : East, %[[VAL_815:.*]] : West) +// CHECK: aie.wire(%[[VAL_623]] : Core, %[[VAL_815]] : Core) +// CHECK: aie.wire(%[[VAL_623]] : DMA, %[[VAL_815]] : DMA) +// CHECK: aie.wire(%[[VAL_812]] : East, %[[VAL_816:.*]] : West) +// CHECK: aie.wire(%[[VAL_813]] : East, %[[VAL_817:.*]] : West) +// CHECK: aie.wire(%[[VAL_511]] : Core, %[[VAL_817]] : Core) +// CHECK: aie.wire(%[[VAL_511]] : DMA, %[[VAL_817]] : DMA) +// CHECK: aie.wire(%[[VAL_816]] : North, %[[VAL_817]] : South) +// CHECK: aie.wire(%[[VAL_814]] : East, %[[VAL_818:.*]] : West) +// CHECK: aie.wire(%[[VAL_570]] : Core, %[[VAL_818]] : Core) +// CHECK: aie.wire(%[[VAL_570]] : DMA, %[[VAL_818]] : DMA) +// CHECK: aie.wire(%[[VAL_817]] : North, %[[VAL_818]] : South) +// CHECK: aie.wire(%[[VAL_815]] : East, %[[VAL_819:.*]] : West) +// CHECK: aie.wire(%[[VAL_625]] : Core, %[[VAL_819]] : Core) +// CHECK: aie.wire(%[[VAL_625]] : DMA, %[[VAL_819]] : DMA) +// CHECK: aie.wire(%[[VAL_816]] : East, %[[VAL_820:.*]] : West) +// CHECK: aie.wire(%[[VAL_817]] : East, %[[VAL_821:.*]] : West) +// CHECK: aie.wire(%[[VAL_513]] : Core, %[[VAL_821]] : Core) +// CHECK: aie.wire(%[[VAL_513]] : DMA, %[[VAL_821]] : DMA) +// CHECK: aie.wire(%[[VAL_820]] : North, %[[VAL_821]] : South) +// CHECK: aie.wire(%[[VAL_818]] : East, %[[VAL_822:.*]] : West) +// CHECK: aie.wire(%[[VAL_572]] : Core, %[[VAL_822]] : Core) +// CHECK: aie.wire(%[[VAL_572]] : DMA, %[[VAL_822]] : DMA) +// CHECK: aie.wire(%[[VAL_821]] : North, %[[VAL_822]] : South) +// CHECK: aie.wire(%[[VAL_819]] : East, %[[VAL_823:.*]] : West) +// CHECK: aie.wire(%[[VAL_627]] : Core, %[[VAL_823]] : Core) +// CHECK: aie.wire(%[[VAL_627]] : DMA, %[[VAL_823]] : DMA) +// CHECK: aie.wire(%[[VAL_820]] : East, %[[VAL_824:.*]] : West) +// CHECK: aie.wire(%[[VAL_825:.*]] : North, %[[VAL_824]] : South) +// CHECK: aie.wire(%[[VAL_101]] : DMA, %[[VAL_825]] : DMA) +// CHECK: aie.wire(%[[VAL_821]] : East, %[[VAL_826:.*]] : West) +// CHECK: aie.wire(%[[VAL_100]] : Core, %[[VAL_826]] : Core) +// CHECK: aie.wire(%[[VAL_100]] : DMA, %[[VAL_826]] : DMA) +// CHECK: aie.wire(%[[VAL_824]] : North, %[[VAL_826]] : South) +// CHECK: aie.wire(%[[VAL_822]] : East, %[[VAL_827:.*]] : West) +// CHECK: aie.wire(%[[VAL_99]] : Core, %[[VAL_827]] : Core) +// CHECK: aie.wire(%[[VAL_99]] : DMA, %[[VAL_827]] : DMA) +// CHECK: aie.wire(%[[VAL_826]] : North, %[[VAL_827]] : South) +// CHECK: aie.wire(%[[VAL_823]] : East, %[[VAL_828:.*]] : West) +// CHECK: aie.wire(%[[VAL_629]] : Core, %[[VAL_828]] : Core) +// CHECK: aie.wire(%[[VAL_629]] : DMA, %[[VAL_828]] : DMA) +// CHECK: aie.wire(%[[VAL_824]] : East, %[[VAL_829:.*]] : West) +// CHECK: aie.wire(%[[VAL_830:.*]] : North, %[[VAL_829]] : South) +// CHECK: aie.wire(%[[VAL_82]] : DMA, %[[VAL_830]] : DMA) +// CHECK: aie.wire(%[[VAL_826]] : East, %[[VAL_831:.*]] : West) +// CHECK: aie.wire(%[[VAL_81]] : Core, %[[VAL_831]] : Core) +// CHECK: aie.wire(%[[VAL_81]] : DMA, %[[VAL_831]] : DMA) +// CHECK: aie.wire(%[[VAL_829]] : North, %[[VAL_831]] : South) +// CHECK: aie.wire(%[[VAL_827]] : East, %[[VAL_832:.*]] : West) +// CHECK: aie.wire(%[[VAL_80]] : Core, %[[VAL_832]] : Core) +// CHECK: aie.wire(%[[VAL_80]] : DMA, %[[VAL_832]] : DMA) +// CHECK: aie.wire(%[[VAL_831]] : North, %[[VAL_832]] : South) +// CHECK: aie.wire(%[[VAL_828]] : East, %[[VAL_833:.*]] : West) +// CHECK: aie.wire(%[[VAL_631]] : Core, %[[VAL_833]] : Core) +// CHECK: aie.wire(%[[VAL_631]] : DMA, %[[VAL_833]] : DMA) +// CHECK: aie.wire(%[[VAL_829]] : East, %[[VAL_834:.*]] : West) +// CHECK: aie.wire(%[[VAL_832]] : East, %[[VAL_835:.*]] : West) +// CHECK: aie.wire(%[[VAL_576]] : Core, %[[VAL_835]] : Core) +// CHECK: aie.wire(%[[VAL_576]] : DMA, %[[VAL_835]] : DMA) +// CHECK: aie.wire(%[[VAL_833]] : East, %[[VAL_836:.*]] : West) +// CHECK: aie.wire(%[[VAL_633]] : Core, %[[VAL_836]] : Core) +// CHECK: aie.wire(%[[VAL_633]] : DMA, %[[VAL_836]] : DMA) +// CHECK: aie.wire(%[[VAL_834]] : East, %[[VAL_837:.*]] : West) +// CHECK: aie.wire(%[[VAL_835]] : East, %[[VAL_838:.*]] : West) +// CHECK: aie.wire(%[[VAL_578]] : Core, %[[VAL_838]] : Core) +// CHECK: aie.wire(%[[VAL_578]] : DMA, %[[VAL_838]] : DMA) +// CHECK: aie.wire(%[[VAL_836]] : East, %[[VAL_839:.*]] : West) +// CHECK: aie.wire(%[[VAL_635]] : Core, %[[VAL_839]] : Core) +// CHECK: aie.wire(%[[VAL_635]] : DMA, %[[VAL_839]] : DMA) +// CHECK: aie.wire(%[[VAL_837]] : East, %[[VAL_840:.*]] : West) +// CHECK: aie.wire(%[[VAL_838]] : East, %[[VAL_841:.*]] : West) +// CHECK: aie.wire(%[[VAL_580]] : Core, %[[VAL_841]] : Core) +// CHECK: aie.wire(%[[VAL_580]] : DMA, %[[VAL_841]] : DMA) +// CHECK: aie.wire(%[[VAL_839]] : East, %[[VAL_842:.*]] : West) +// CHECK: aie.wire(%[[VAL_637]] : Core, %[[VAL_842]] : Core) +// CHECK: aie.wire(%[[VAL_637]] : DMA, %[[VAL_842]] : DMA) +// CHECK: aie.wire(%[[VAL_840]] : East, %[[VAL_843:.*]] : West) +// CHECK: aie.wire(%[[VAL_841]] : East, %[[VAL_844:.*]] : West) +// CHECK: aie.wire(%[[VAL_582]] : Core, %[[VAL_844]] : Core) +// CHECK: aie.wire(%[[VAL_582]] : DMA, %[[VAL_844]] : DMA) +// CHECK: aie.wire(%[[VAL_842]] : East, %[[VAL_845:.*]] : West) +// CHECK: aie.wire(%[[VAL_639]] : Core, %[[VAL_845]] : Core) +// CHECK: aie.wire(%[[VAL_639]] : DMA, %[[VAL_845]] : DMA) +// CHECK: aie.wire(%[[VAL_843]] : East, %[[VAL_846:.*]] : West) +// CHECK: aie.wire(%[[VAL_844]] : East, %[[VAL_847:.*]] : West) +// CHECK: aie.wire(%[[VAL_584]] : Core, %[[VAL_847]] : Core) +// CHECK: aie.wire(%[[VAL_584]] : DMA, %[[VAL_847]] : DMA) +// CHECK: aie.wire(%[[VAL_845]] : East, %[[VAL_848:.*]] : West) +// CHECK: aie.wire(%[[VAL_641]] : Core, %[[VAL_848]] : Core) +// CHECK: aie.wire(%[[VAL_641]] : DMA, %[[VAL_848]] : DMA) +// CHECK: aie.wire(%[[VAL_846]] : East, %[[VAL_849:.*]] : West) +// CHECK: aie.wire(%[[VAL_586]] : Core, %[[VAL_850:.*]] : Core) +// CHECK: aie.wire(%[[VAL_586]] : DMA, %[[VAL_850]] : DMA) +// CHECK: aie.wire(%[[VAL_849]] : North, %[[VAL_850]] : South) +// CHECK: aie.wire(%[[VAL_847]] : East, %[[VAL_851:.*]] : West) +// CHECK: aie.wire(%[[VAL_588]] : Core, %[[VAL_851]] : Core) +// CHECK: aie.wire(%[[VAL_588]] : DMA, %[[VAL_851]] : DMA) +// CHECK: aie.wire(%[[VAL_850]] : North, %[[VAL_851]] : South) +// CHECK: aie.wire(%[[VAL_848]] : East, %[[VAL_852:.*]] : West) +// CHECK: aie.wire(%[[VAL_643]] : Core, %[[VAL_852]] : Core) +// CHECK: aie.wire(%[[VAL_643]] : DMA, %[[VAL_852]] : DMA) +// CHECK: aie.wire(%[[VAL_849]] : East, %[[VAL_853:.*]] : West) +// CHECK: aie.wire(%[[VAL_854:.*]] : North, %[[VAL_853]] : South) +// CHECK: aie.wire(%[[VAL_62]] : DMA, %[[VAL_854]] : DMA) +// CHECK: aie.wire(%[[VAL_850]] : East, %[[VAL_855:.*]] : West) +// CHECK: aie.wire(%[[VAL_61]] : Core, %[[VAL_855]] : Core) +// CHECK: aie.wire(%[[VAL_61]] : DMA, %[[VAL_855]] : DMA) +// CHECK: aie.wire(%[[VAL_853]] : North, %[[VAL_855]] : South) +// CHECK: aie.wire(%[[VAL_645]] : Core, %[[VAL_856:.*]] : Core) +// CHECK: aie.wire(%[[VAL_645]] : DMA, %[[VAL_856]] : DMA) +// CHECK: aie.wire(%[[VAL_852]] : East, %[[VAL_857:.*]] : West) +// CHECK: aie.wire(%[[VAL_647]] : Core, %[[VAL_857]] : Core) +// CHECK: aie.wire(%[[VAL_647]] : DMA, %[[VAL_857]] : DMA) +// CHECK: aie.wire(%[[VAL_856]] : North, %[[VAL_857]] : South) +// CHECK: aie.wire(%[[VAL_853]] : East, %[[VAL_858:.*]] : West) +// CHECK: aie.wire(%[[VAL_859:.*]] : North, %[[VAL_858]] : South) +// CHECK: aie.wire(%[[VAL_42]] : DMA, %[[VAL_859]] : DMA) +// CHECK: aie.wire(%[[VAL_856]] : East, %[[VAL_860:.*]] : West) +// CHECK: aie.wire(%[[VAL_649]] : Core, %[[VAL_860]] : Core) +// CHECK: aie.wire(%[[VAL_649]] : DMA, %[[VAL_860]] : DMA) +// CHECK: aie.wire(%[[VAL_858]] : East, %[[VAL_861:.*]] : West) +// CHECK: aie.wire(%[[VAL_860]] : East, %[[VAL_862:.*]] : West) +// CHECK: aie.wire(%[[VAL_651]] : Core, %[[VAL_862]] : Core) +// CHECK: aie.wire(%[[VAL_651]] : DMA, %[[VAL_862]] : DMA) +// CHECK: aie.wire(%[[VAL_861]] : East, %[[VAL_863:.*]] : West) +// CHECK: aie.wire(%[[VAL_653]] : Core, %[[VAL_864:.*]] : Core) +// CHECK: aie.wire(%[[VAL_653]] : DMA, %[[VAL_864]] : DMA) +// CHECK: aie.wire(%[[VAL_862]] : East, %[[VAL_865:.*]] : West) +// CHECK: aie.wire(%[[VAL_655]] : Core, %[[VAL_865]] : Core) +// CHECK: aie.wire(%[[VAL_655]] : DMA, %[[VAL_865]] : DMA) +// CHECK: aie.wire(%[[VAL_864]] : North, %[[VAL_865]] : South) +// CHECK: aie.wire(%[[VAL_863]] : East, %[[VAL_866:.*]] : West) +// CHECK: aie.wire(%[[VAL_867:.*]] : North, %[[VAL_866]] : South) +// CHECK: aie.wire(%[[VAL_22]] : DMA, %[[VAL_867]] : DMA) +// CHECK: aie.wire(%[[VAL_21]] : Core, %[[VAL_868:.*]] : Core) +// CHECK: aie.wire(%[[VAL_21]] : DMA, %[[VAL_868]] : DMA) +// CHECK: aie.wire(%[[VAL_866]] : North, %[[VAL_868]] : South) +// CHECK: aie.wire(%[[VAL_864]] : East, %[[VAL_869:.*]] : West) +// CHECK: aie.wire(%[[VAL_20]] : Core, %[[VAL_869]] : Core) +// CHECK: aie.wire(%[[VAL_20]] : DMA, %[[VAL_869]] : DMA) +// CHECK: aie.wire(%[[VAL_868]] : North, %[[VAL_869]] : South) +// CHECK: aie.wire(%[[VAL_866]] : East, %[[VAL_870:.*]] : West) +// CHECK: aie.wire(%[[VAL_871:.*]] : North, %[[VAL_870]] : South) +// CHECK: aie.wire(%[[VAL_2]] : DMA, %[[VAL_871]] : DMA) // CHECK: } module @vecmul_4x4 { - AIE.device(xcvc1902) { - %0 = AIE.tile(47, 2) - %1 = AIE.tile(47, 1) - %2 = AIE.tile(47, 0) - %3 = AIE.tile(3, 3) - %4 = AIE.tile(10, 5) - %5 = AIE.lock(%4, 2) - %6 = AIE.buffer(%4) {sym_name = "buf47"} : memref<64xi32, 2> - %7 = AIE.lock(%4, 1) - %8 = AIE.buffer(%4) {sym_name = "buf46"} : memref<64xi32, 2> - %9 = AIE.lock(%4, 0) - %10 = AIE.buffer(%4) {sym_name = "buf45"} : memref<64xi32, 2> - %11 = AIE.mem(%4) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.device(xcvc1902) { + %0 = aie.tile(47, 2) + %1 = aie.tile(47, 1) + %2 = aie.tile(47, 0) + %3 = aie.tile(3, 3) + %4 = aie.tile(10, 5) + %5 = aie.lock(%4, 2) + %6 = aie.buffer(%4) {sym_name = "buf47"} : memref<64xi32, 2> + %7 = aie.lock(%4, 1) + %8 = aie.buffer(%4) {sym_name = "buf46"} : memref<64xi32, 2> + %9 = aie.lock(%4, 0) + %10 = aie.buffer(%4) {sym_name = "buf45"} : memref<64xi32, 2> + %11 = aie.mem(%4) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%9, Acquire, 0) - AIE.dma_bd(%10 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%9, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%9, Acquire, 0) + aie.dma_bd(%10 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%9, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%7, Acquire, 0) - AIE.dma_bd(%8 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%7, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%7, Acquire, 0) + aie.dma_bd(%8 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%7, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%5, Acquire, 1) - AIE.dma_bd(%6 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%5, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%5, Acquire, 1) + aie.dma_bd(%6 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%5, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %12 = AIE.core(%4) { + %12 = aie.core(%4) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%9, Acquire, 1) - AIE.use_lock(%7, Acquire, 1) - AIE.use_lock(%5, Acquire, 0) + aie.use_lock(%9, Acquire, 1) + aie.use_lock(%7, Acquire, 1) + aie.use_lock(%5, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %10[%arg0] : memref<64xi32, 2> %201 = affine.load %8[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %6[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%5, Release, 1) - AIE.use_lock(%7, Release, 0) - AIE.use_lock(%9, Release, 0) + aie.use_lock(%5, Release, 1) + aie.use_lock(%7, Release, 0) + aie.use_lock(%9, Release, 0) cf.br ^bb1 } - %13 = AIE.tile(46, 2) - %14 = AIE.tile(46, 1) - %15 = AIE.tile(46, 0) - %16 = AIE.tile(2, 3) - %17 = AIE.tile(9, 5) - %18 = AIE.lock(%17, 2) - %19 = AIE.buffer(%17) {sym_name = "buf44"} : memref<64xi32, 2> - %20 = AIE.lock(%17, 1) - %21 = AIE.buffer(%17) {sym_name = "buf43"} : memref<64xi32, 2> - %22 = AIE.lock(%17, 0) - %23 = AIE.buffer(%17) {sym_name = "buf42"} : memref<64xi32, 2> - %24 = AIE.mem(%17) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %13 = aie.tile(46, 2) + %14 = aie.tile(46, 1) + %15 = aie.tile(46, 0) + %16 = aie.tile(2, 3) + %17 = aie.tile(9, 5) + %18 = aie.lock(%17, 2) + %19 = aie.buffer(%17) {sym_name = "buf44"} : memref<64xi32, 2> + %20 = aie.lock(%17, 1) + %21 = aie.buffer(%17) {sym_name = "buf43"} : memref<64xi32, 2> + %22 = aie.lock(%17, 0) + %23 = aie.buffer(%17) {sym_name = "buf42"} : memref<64xi32, 2> + %24 = aie.mem(%17) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%22, Acquire, 0) - AIE.dma_bd(%23 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%22, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%22, Acquire, 0) + aie.dma_bd(%23 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%22, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%20, Acquire, 0) - AIE.dma_bd(%21 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%20, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%20, Acquire, 0) + aie.dma_bd(%21 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%20, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%18, Acquire, 1) - AIE.dma_bd(%19 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%18, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%18, Acquire, 1) + aie.dma_bd(%19 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%18, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %25 = AIE.core(%17) { + %25 = aie.core(%17) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%22, Acquire, 1) - AIE.use_lock(%20, Acquire, 1) - AIE.use_lock(%18, Acquire, 0) + aie.use_lock(%22, Acquire, 1) + aie.use_lock(%20, Acquire, 1) + aie.use_lock(%18, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %23[%arg0] : memref<64xi32, 2> %201 = affine.load %21[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %19[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%18, Release, 1) - AIE.use_lock(%20, Release, 0) - AIE.use_lock(%22, Release, 0) + aie.use_lock(%18, Release, 1) + aie.use_lock(%20, Release, 0) + aie.use_lock(%22, Release, 0) cf.br ^bb1 } - %26 = AIE.tile(43, 2) - %27 = AIE.tile(43, 1) - %28 = AIE.tile(43, 0) - %29 = AIE.tile(1, 3) - %30 = AIE.tile(8, 5) - %31 = AIE.lock(%30, 2) - %32 = AIE.buffer(%30) {sym_name = "buf41"} : memref<64xi32, 2> - %33 = AIE.lock(%30, 1) - %34 = AIE.buffer(%30) {sym_name = "buf40"} : memref<64xi32, 2> - %35 = AIE.lock(%30, 0) - %36 = AIE.buffer(%30) {sym_name = "buf39"} : memref<64xi32, 2> - %37 = AIE.mem(%30) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %26 = aie.tile(43, 2) + %27 = aie.tile(43, 1) + %28 = aie.tile(43, 0) + %29 = aie.tile(1, 3) + %30 = aie.tile(8, 5) + %31 = aie.lock(%30, 2) + %32 = aie.buffer(%30) {sym_name = "buf41"} : memref<64xi32, 2> + %33 = aie.lock(%30, 1) + %34 = aie.buffer(%30) {sym_name = "buf40"} : memref<64xi32, 2> + %35 = aie.lock(%30, 0) + %36 = aie.buffer(%30) {sym_name = "buf39"} : memref<64xi32, 2> + %37 = aie.mem(%30) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%35, Acquire, 0) - AIE.dma_bd(%36 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%35, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%35, Acquire, 0) + aie.dma_bd(%36 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%35, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%33, Acquire, 0) - AIE.dma_bd(%34 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%33, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%33, Acquire, 0) + aie.dma_bd(%34 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%33, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%31, Acquire, 1) - AIE.dma_bd(%32 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%31, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%31, Acquire, 1) + aie.dma_bd(%32 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%31, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %38 = AIE.core(%30) { + %38 = aie.core(%30) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%35, Acquire, 1) - AIE.use_lock(%33, Acquire, 1) - AIE.use_lock(%31, Acquire, 0) + aie.use_lock(%35, Acquire, 1) + aie.use_lock(%33, Acquire, 1) + aie.use_lock(%31, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %36[%arg0] : memref<64xi32, 2> %201 = affine.load %34[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %32[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%31, Release, 1) - AIE.use_lock(%33, Release, 0) - AIE.use_lock(%35, Release, 0) + aie.use_lock(%31, Release, 1) + aie.use_lock(%33, Release, 0) + aie.use_lock(%35, Release, 0) cf.br ^bb1 } - %39 = AIE.tile(42, 2) - %40 = AIE.tile(42, 1) - %41 = AIE.tile(42, 0) - %42 = AIE.tile(0, 3) - %43 = AIE.tile(7, 5) - %44 = AIE.lock(%43, 2) - %45 = AIE.buffer(%43) {sym_name = "buf38"} : memref<64xi32, 2> - %46 = AIE.lock(%43, 1) - %47 = AIE.buffer(%43) {sym_name = "buf37"} : memref<64xi32, 2> - %48 = AIE.lock(%43, 0) - %49 = AIE.buffer(%43) {sym_name = "buf36"} : memref<64xi32, 2> - %50 = AIE.mem(%43) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %39 = aie.tile(42, 2) + %40 = aie.tile(42, 1) + %41 = aie.tile(42, 0) + %42 = aie.tile(0, 3) + %43 = aie.tile(7, 5) + %44 = aie.lock(%43, 2) + %45 = aie.buffer(%43) {sym_name = "buf38"} : memref<64xi32, 2> + %46 = aie.lock(%43, 1) + %47 = aie.buffer(%43) {sym_name = "buf37"} : memref<64xi32, 2> + %48 = aie.lock(%43, 0) + %49 = aie.buffer(%43) {sym_name = "buf36"} : memref<64xi32, 2> + %50 = aie.mem(%43) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%48, Acquire, 0) - AIE.dma_bd(%49 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%48, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%48, Acquire, 0) + aie.dma_bd(%49 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%48, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%46, Acquire, 0) - AIE.dma_bd(%47 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%46, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%46, Acquire, 0) + aie.dma_bd(%47 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%46, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%44, Acquire, 1) - AIE.dma_bd(%45 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%44, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%44, Acquire, 1) + aie.dma_bd(%45 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%44, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %51 = AIE.core(%43) { + %51 = aie.core(%43) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%48, Acquire, 1) - AIE.use_lock(%46, Acquire, 1) - AIE.use_lock(%44, Acquire, 0) + aie.use_lock(%48, Acquire, 1) + aie.use_lock(%46, Acquire, 1) + aie.use_lock(%44, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %49[%arg0] : memref<64xi32, 2> %201 = affine.load %47[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %45[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%44, Release, 1) - AIE.use_lock(%46, Release, 0) - AIE.use_lock(%48, Release, 0) + aie.use_lock(%44, Release, 1) + aie.use_lock(%46, Release, 0) + aie.use_lock(%48, Release, 0) cf.br ^bb1 } - %52 = AIE.tile(35, 2) - %53 = AIE.tile(35, 1) - %54 = AIE.tile(35, 0) - %55 = AIE.tile(10, 4) - %56 = AIE.lock(%55, 2) - %57 = AIE.buffer(%55) {sym_name = "buf35"} : memref<64xi32, 2> - %58 = AIE.lock(%55, 1) - %59 = AIE.buffer(%55) {sym_name = "buf34"} : memref<64xi32, 2> - %60 = AIE.lock(%55, 0) - %61 = AIE.buffer(%55) {sym_name = "buf33"} : memref<64xi32, 2> - %62 = AIE.mem(%55) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %52 = aie.tile(35, 2) + %53 = aie.tile(35, 1) + %54 = aie.tile(35, 0) + %55 = aie.tile(10, 4) + %56 = aie.lock(%55, 2) + %57 = aie.buffer(%55) {sym_name = "buf35"} : memref<64xi32, 2> + %58 = aie.lock(%55, 1) + %59 = aie.buffer(%55) {sym_name = "buf34"} : memref<64xi32, 2> + %60 = aie.lock(%55, 0) + %61 = aie.buffer(%55) {sym_name = "buf33"} : memref<64xi32, 2> + %62 = aie.mem(%55) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%60, Acquire, 0) - AIE.dma_bd(%61 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%60, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%60, Acquire, 0) + aie.dma_bd(%61 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%60, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%58, Acquire, 0) - AIE.dma_bd(%59 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%58, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%58, Acquire, 0) + aie.dma_bd(%59 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%58, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%56, Acquire, 1) - AIE.dma_bd(%57 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%56, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%56, Acquire, 1) + aie.dma_bd(%57 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%56, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %63 = AIE.core(%55) { + %63 = aie.core(%55) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%60, Acquire, 1) - AIE.use_lock(%58, Acquire, 1) - AIE.use_lock(%56, Acquire, 0) + aie.use_lock(%60, Acquire, 1) + aie.use_lock(%58, Acquire, 1) + aie.use_lock(%56, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %61[%arg0] : memref<64xi32, 2> %201 = affine.load %59[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %57[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%56, Release, 1) - AIE.use_lock(%58, Release, 0) - AIE.use_lock(%60, Release, 0) + aie.use_lock(%56, Release, 1) + aie.use_lock(%58, Release, 0) + aie.use_lock(%60, Release, 0) cf.br ^bb1 } - %64 = AIE.tile(34, 2) - %65 = AIE.tile(34, 1) - %66 = AIE.tile(34, 0) - %67 = AIE.tile(9, 4) - %68 = AIE.lock(%67, 2) - %69 = AIE.buffer(%67) {sym_name = "buf32"} : memref<64xi32, 2> - %70 = AIE.lock(%67, 1) - %71 = AIE.buffer(%67) {sym_name = "buf31"} : memref<64xi32, 2> - %72 = AIE.lock(%67, 0) - %73 = AIE.buffer(%67) {sym_name = "buf30"} : memref<64xi32, 2> - %74 = AIE.mem(%67) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %64 = aie.tile(34, 2) + %65 = aie.tile(34, 1) + %66 = aie.tile(34, 0) + %67 = aie.tile(9, 4) + %68 = aie.lock(%67, 2) + %69 = aie.buffer(%67) {sym_name = "buf32"} : memref<64xi32, 2> + %70 = aie.lock(%67, 1) + %71 = aie.buffer(%67) {sym_name = "buf31"} : memref<64xi32, 2> + %72 = aie.lock(%67, 0) + %73 = aie.buffer(%67) {sym_name = "buf30"} : memref<64xi32, 2> + %74 = aie.mem(%67) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%72, Acquire, 0) - AIE.dma_bd(%73 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%72, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%72, Acquire, 0) + aie.dma_bd(%73 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%72, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%70, Acquire, 0) - AIE.dma_bd(%71 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%70, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%70, Acquire, 0) + aie.dma_bd(%71 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%70, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%68, Acquire, 1) - AIE.dma_bd(%69 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%68, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%68, Acquire, 1) + aie.dma_bd(%69 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%68, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %75 = AIE.core(%67) { + %75 = aie.core(%67) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%72, Acquire, 1) - AIE.use_lock(%70, Acquire, 1) - AIE.use_lock(%68, Acquire, 0) + aie.use_lock(%72, Acquire, 1) + aie.use_lock(%70, Acquire, 1) + aie.use_lock(%68, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %73[%arg0] : memref<64xi32, 2> %201 = affine.load %71[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %69[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%68, Release, 1) - AIE.use_lock(%70, Release, 0) - AIE.use_lock(%72, Release, 0) + aie.use_lock(%68, Release, 1) + aie.use_lock(%70, Release, 0) + aie.use_lock(%72, Release, 0) cf.br ^bb1 } - %76 = AIE.tile(27, 2) - %77 = AIE.tile(27, 1) - %78 = AIE.tile(27, 0) - %79 = AIE.tile(1, 2) - %80 = AIE.tile(8, 4) - %81 = AIE.lock(%80, 2) - %82 = AIE.buffer(%80) {sym_name = "buf29"} : memref<64xi32, 2> - %83 = AIE.lock(%80, 1) - %84 = AIE.buffer(%80) {sym_name = "buf28"} : memref<64xi32, 2> - %85 = AIE.lock(%80, 0) - %86 = AIE.buffer(%80) {sym_name = "buf27"} : memref<64xi32, 2> - %87 = AIE.mem(%80) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %76 = aie.tile(27, 2) + %77 = aie.tile(27, 1) + %78 = aie.tile(27, 0) + %79 = aie.tile(1, 2) + %80 = aie.tile(8, 4) + %81 = aie.lock(%80, 2) + %82 = aie.buffer(%80) {sym_name = "buf29"} : memref<64xi32, 2> + %83 = aie.lock(%80, 1) + %84 = aie.buffer(%80) {sym_name = "buf28"} : memref<64xi32, 2> + %85 = aie.lock(%80, 0) + %86 = aie.buffer(%80) {sym_name = "buf27"} : memref<64xi32, 2> + %87 = aie.mem(%80) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%85, Acquire, 0) - AIE.dma_bd(%86 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%85, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%85, Acquire, 0) + aie.dma_bd(%86 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%85, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%83, Acquire, 0) - AIE.dma_bd(%84 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%83, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%83, Acquire, 0) + aie.dma_bd(%84 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%83, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%81, Acquire, 1) - AIE.dma_bd(%82 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%81, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%81, Acquire, 1) + aie.dma_bd(%82 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%81, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %88 = AIE.core(%80) { + %88 = aie.core(%80) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%85, Acquire, 1) - AIE.use_lock(%83, Acquire, 1) - AIE.use_lock(%81, Acquire, 0) + aie.use_lock(%85, Acquire, 1) + aie.use_lock(%83, Acquire, 1) + aie.use_lock(%81, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %86[%arg0] : memref<64xi32, 2> %201 = affine.load %84[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %82[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%81, Release, 1) - AIE.use_lock(%83, Release, 0) - AIE.use_lock(%85, Release, 0) + aie.use_lock(%81, Release, 1) + aie.use_lock(%83, Release, 0) + aie.use_lock(%85, Release, 0) cf.br ^bb1 } - %89 = AIE.tile(26, 2) - %90 = AIE.tile(26, 1) - %91 = AIE.tile(26, 0) - %92 = AIE.tile(0, 2) - %93 = AIE.tile(7, 4) - %94 = AIE.lock(%93, 2) - %95 = AIE.buffer(%93) {sym_name = "buf26"} : memref<64xi32, 2> - %96 = AIE.lock(%93, 1) - %97 = AIE.buffer(%93) {sym_name = "buf25"} : memref<64xi32, 2> - %98 = AIE.lock(%93, 0) - %99 = AIE.buffer(%93) {sym_name = "buf24"} : memref<64xi32, 2> - %100 = AIE.mem(%93) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %89 = aie.tile(26, 2) + %90 = aie.tile(26, 1) + %91 = aie.tile(26, 0) + %92 = aie.tile(0, 2) + %93 = aie.tile(7, 4) + %94 = aie.lock(%93, 2) + %95 = aie.buffer(%93) {sym_name = "buf26"} : memref<64xi32, 2> + %96 = aie.lock(%93, 1) + %97 = aie.buffer(%93) {sym_name = "buf25"} : memref<64xi32, 2> + %98 = aie.lock(%93, 0) + %99 = aie.buffer(%93) {sym_name = "buf24"} : memref<64xi32, 2> + %100 = aie.mem(%93) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%98, Acquire, 0) - AIE.dma_bd(%99 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%98, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%98, Acquire, 0) + aie.dma_bd(%99 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%98, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%96, Acquire, 0) - AIE.dma_bd(%97 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%96, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%96, Acquire, 0) + aie.dma_bd(%97 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%96, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%94, Acquire, 1) - AIE.dma_bd(%95 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%94, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%94, Acquire, 1) + aie.dma_bd(%95 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%94, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %101 = AIE.core(%93) { + %101 = aie.core(%93) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%98, Acquire, 1) - AIE.use_lock(%96, Acquire, 1) - AIE.use_lock(%94, Acquire, 0) + aie.use_lock(%98, Acquire, 1) + aie.use_lock(%96, Acquire, 1) + aie.use_lock(%94, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %99[%arg0] : memref<64xi32, 2> %201 = affine.load %97[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %95[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%94, Release, 1) - AIE.use_lock(%96, Release, 0) - AIE.use_lock(%98, Release, 0) + aie.use_lock(%94, Release, 1) + aie.use_lock(%96, Release, 0) + aie.use_lock(%98, Release, 0) cf.br ^bb1 } - %102 = AIE.tile(19, 2) - %103 = AIE.tile(19, 1) - %104 = AIE.tile(19, 0) - %105 = AIE.tile(10, 3) - %106 = AIE.lock(%105, 2) - %107 = AIE.buffer(%105) {sym_name = "buf23"} : memref<64xi32, 2> - %108 = AIE.lock(%105, 1) - %109 = AIE.buffer(%105) {sym_name = "buf22"} : memref<64xi32, 2> - %110 = AIE.lock(%105, 0) - %111 = AIE.buffer(%105) {sym_name = "buf21"} : memref<64xi32, 2> - %112 = AIE.mem(%105) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %102 = aie.tile(19, 2) + %103 = aie.tile(19, 1) + %104 = aie.tile(19, 0) + %105 = aie.tile(10, 3) + %106 = aie.lock(%105, 2) + %107 = aie.buffer(%105) {sym_name = "buf23"} : memref<64xi32, 2> + %108 = aie.lock(%105, 1) + %109 = aie.buffer(%105) {sym_name = "buf22"} : memref<64xi32, 2> + %110 = aie.lock(%105, 0) + %111 = aie.buffer(%105) {sym_name = "buf21"} : memref<64xi32, 2> + %112 = aie.mem(%105) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%110, Acquire, 0) - AIE.dma_bd(%111 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%110, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%110, Acquire, 0) + aie.dma_bd(%111 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%110, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%108, Acquire, 0) - AIE.dma_bd(%109 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%108, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%108, Acquire, 0) + aie.dma_bd(%109 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%108, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%106, Acquire, 1) - AIE.dma_bd(%107 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%106, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%106, Acquire, 1) + aie.dma_bd(%107 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%106, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %113 = AIE.core(%105) { + %113 = aie.core(%105) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%110, Acquire, 1) - AIE.use_lock(%108, Acquire, 1) - AIE.use_lock(%106, Acquire, 0) + aie.use_lock(%110, Acquire, 1) + aie.use_lock(%108, Acquire, 1) + aie.use_lock(%106, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %111[%arg0] : memref<64xi32, 2> %201 = affine.load %109[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %107[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%106, Release, 1) - AIE.use_lock(%108, Release, 0) - AIE.use_lock(%110, Release, 0) + aie.use_lock(%106, Release, 1) + aie.use_lock(%108, Release, 0) + aie.use_lock(%110, Release, 0) cf.br ^bb1 } - %114 = AIE.tile(18, 2) - %115 = AIE.tile(18, 1) - %116 = AIE.tile(18, 0) - %117 = AIE.tile(9, 3) - %118 = AIE.lock(%117, 2) - %119 = AIE.buffer(%117) {sym_name = "buf20"} : memref<64xi32, 2> - %120 = AIE.lock(%117, 1) - %121 = AIE.buffer(%117) {sym_name = "buf19"} : memref<64xi32, 2> - %122 = AIE.lock(%117, 0) - %123 = AIE.buffer(%117) {sym_name = "buf18"} : memref<64xi32, 2> - %124 = AIE.mem(%117) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %114 = aie.tile(18, 2) + %115 = aie.tile(18, 1) + %116 = aie.tile(18, 0) + %117 = aie.tile(9, 3) + %118 = aie.lock(%117, 2) + %119 = aie.buffer(%117) {sym_name = "buf20"} : memref<64xi32, 2> + %120 = aie.lock(%117, 1) + %121 = aie.buffer(%117) {sym_name = "buf19"} : memref<64xi32, 2> + %122 = aie.lock(%117, 0) + %123 = aie.buffer(%117) {sym_name = "buf18"} : memref<64xi32, 2> + %124 = aie.mem(%117) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%122, Acquire, 0) - AIE.dma_bd(%123 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%122, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%122, Acquire, 0) + aie.dma_bd(%123 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%122, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%120, Acquire, 0) - AIE.dma_bd(%121 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%120, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%120, Acquire, 0) + aie.dma_bd(%121 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%120, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%118, Acquire, 1) - AIE.dma_bd(%119 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%118, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%118, Acquire, 1) + aie.dma_bd(%119 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%118, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %125 = AIE.core(%117) { + %125 = aie.core(%117) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%122, Acquire, 1) - AIE.use_lock(%120, Acquire, 1) - AIE.use_lock(%118, Acquire, 0) + aie.use_lock(%122, Acquire, 1) + aie.use_lock(%120, Acquire, 1) + aie.use_lock(%118, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %123[%arg0] : memref<64xi32, 2> %201 = affine.load %121[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %119[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%118, Release, 1) - AIE.use_lock(%120, Release, 0) - AIE.use_lock(%122, Release, 0) + aie.use_lock(%118, Release, 1) + aie.use_lock(%120, Release, 0) + aie.use_lock(%122, Release, 0) cf.br ^bb1 } - %126 = AIE.tile(11, 2) - %127 = AIE.tile(11, 1) - %128 = AIE.tile(11, 0) - %129 = AIE.tile(1, 1) - %130 = AIE.tile(8, 3) - %131 = AIE.lock(%130, 2) - %132 = AIE.buffer(%130) {sym_name = "buf17"} : memref<64xi32, 2> - %133 = AIE.lock(%130, 1) - %134 = AIE.buffer(%130) {sym_name = "buf16"} : memref<64xi32, 2> - %135 = AIE.lock(%130, 0) - %136 = AIE.buffer(%130) {sym_name = "buf15"} : memref<64xi32, 2> - %137 = AIE.mem(%130) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %126 = aie.tile(11, 2) + %127 = aie.tile(11, 1) + %128 = aie.tile(11, 0) + %129 = aie.tile(1, 1) + %130 = aie.tile(8, 3) + %131 = aie.lock(%130, 2) + %132 = aie.buffer(%130) {sym_name = "buf17"} : memref<64xi32, 2> + %133 = aie.lock(%130, 1) + %134 = aie.buffer(%130) {sym_name = "buf16"} : memref<64xi32, 2> + %135 = aie.lock(%130, 0) + %136 = aie.buffer(%130) {sym_name = "buf15"} : memref<64xi32, 2> + %137 = aie.mem(%130) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%135, Acquire, 0) - AIE.dma_bd(%136 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%135, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%135, Acquire, 0) + aie.dma_bd(%136 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%135, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%133, Acquire, 0) - AIE.dma_bd(%134 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%133, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%133, Acquire, 0) + aie.dma_bd(%134 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%133, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%131, Acquire, 1) - AIE.dma_bd(%132 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%131, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%131, Acquire, 1) + aie.dma_bd(%132 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%131, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %138 = AIE.core(%130) { + %138 = aie.core(%130) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%135, Acquire, 1) - AIE.use_lock(%133, Acquire, 1) - AIE.use_lock(%131, Acquire, 0) + aie.use_lock(%135, Acquire, 1) + aie.use_lock(%133, Acquire, 1) + aie.use_lock(%131, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %136[%arg0] : memref<64xi32, 2> %201 = affine.load %134[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %132[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%131, Release, 1) - AIE.use_lock(%133, Release, 0) - AIE.use_lock(%135, Release, 0) + aie.use_lock(%131, Release, 1) + aie.use_lock(%133, Release, 0) + aie.use_lock(%135, Release, 0) cf.br ^bb1 } - %139 = AIE.tile(10, 1) - %140 = AIE.tile(10, 0) - %141 = AIE.tile(0, 1) - %142 = AIE.tile(7, 3) - %143 = AIE.lock(%142, 2) - %144 = AIE.buffer(%142) {sym_name = "buf14"} : memref<64xi32, 2> - %145 = AIE.lock(%142, 1) - %146 = AIE.buffer(%142) {sym_name = "buf13"} : memref<64xi32, 2> - %147 = AIE.lock(%142, 0) - %148 = AIE.buffer(%142) {sym_name = "buf12"} : memref<64xi32, 2> - %149 = AIE.mem(%142) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %139 = aie.tile(10, 1) + %140 = aie.tile(10, 0) + %141 = aie.tile(0, 1) + %142 = aie.tile(7, 3) + %143 = aie.lock(%142, 2) + %144 = aie.buffer(%142) {sym_name = "buf14"} : memref<64xi32, 2> + %145 = aie.lock(%142, 1) + %146 = aie.buffer(%142) {sym_name = "buf13"} : memref<64xi32, 2> + %147 = aie.lock(%142, 0) + %148 = aie.buffer(%142) {sym_name = "buf12"} : memref<64xi32, 2> + %149 = aie.mem(%142) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%147, Acquire, 0) - AIE.dma_bd(%148 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%147, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%147, Acquire, 0) + aie.dma_bd(%148 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%147, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%145, Acquire, 0) - AIE.dma_bd(%146 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%145, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%145, Acquire, 0) + aie.dma_bd(%146 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%145, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%143, Acquire, 1) - AIE.dma_bd(%144 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%143, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%143, Acquire, 1) + aie.dma_bd(%144 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%143, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %150 = AIE.core(%142) { + %150 = aie.core(%142) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%147, Acquire, 1) - AIE.use_lock(%145, Acquire, 1) - AIE.use_lock(%143, Acquire, 0) + aie.use_lock(%147, Acquire, 1) + aie.use_lock(%145, Acquire, 1) + aie.use_lock(%143, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %148[%arg0] : memref<64xi32, 2> %201 = affine.load %146[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %144[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%143, Release, 1) - AIE.use_lock(%145, Release, 0) - AIE.use_lock(%147, Release, 0) + aie.use_lock(%143, Release, 1) + aie.use_lock(%145, Release, 0) + aie.use_lock(%147, Release, 0) cf.br ^bb1 } - %151 = AIE.tile(7, 1) - %152 = AIE.tile(7, 0) - %153 = AIE.tile(10, 2) - %154 = AIE.lock(%153, 2) - %155 = AIE.buffer(%153) {sym_name = "buf11"} : memref<64xi32, 2> - %156 = AIE.lock(%153, 1) - %157 = AIE.buffer(%153) {sym_name = "buf10"} : memref<64xi32, 2> - %158 = AIE.lock(%153, 0) - %159 = AIE.buffer(%153) {sym_name = "buf9"} : memref<64xi32, 2> - %160 = AIE.mem(%153) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %151 = aie.tile(7, 1) + %152 = aie.tile(7, 0) + %153 = aie.tile(10, 2) + %154 = aie.lock(%153, 2) + %155 = aie.buffer(%153) {sym_name = "buf11"} : memref<64xi32, 2> + %156 = aie.lock(%153, 1) + %157 = aie.buffer(%153) {sym_name = "buf10"} : memref<64xi32, 2> + %158 = aie.lock(%153, 0) + %159 = aie.buffer(%153) {sym_name = "buf9"} : memref<64xi32, 2> + %160 = aie.mem(%153) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%158, Acquire, 0) - AIE.dma_bd(%159 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%158, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%158, Acquire, 0) + aie.dma_bd(%159 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%158, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%156, Acquire, 0) - AIE.dma_bd(%157 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%156, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%156, Acquire, 0) + aie.dma_bd(%157 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%156, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%154, Acquire, 1) - AIE.dma_bd(%155 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%154, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%154, Acquire, 1) + aie.dma_bd(%155 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%154, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %161 = AIE.core(%153) { + %161 = aie.core(%153) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%158, Acquire, 1) - AIE.use_lock(%156, Acquire, 1) - AIE.use_lock(%154, Acquire, 0) + aie.use_lock(%158, Acquire, 1) + aie.use_lock(%156, Acquire, 1) + aie.use_lock(%154, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %159[%arg0] : memref<64xi32, 2> %201 = affine.load %157[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %155[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%154, Release, 1) - AIE.use_lock(%156, Release, 0) - AIE.use_lock(%158, Release, 0) + aie.use_lock(%154, Release, 1) + aie.use_lock(%156, Release, 0) + aie.use_lock(%158, Release, 0) cf.br ^bb1 } - %162 = AIE.tile(6, 2) - %163 = AIE.tile(6, 1) - %164 = AIE.tile(6, 0) - %165 = AIE.tile(9, 2) - %166 = AIE.lock(%165, 2) - %167 = AIE.buffer(%165) {sym_name = "buf8"} : memref<64xi32, 2> - %168 = AIE.lock(%165, 1) - %169 = AIE.buffer(%165) {sym_name = "buf7"} : memref<64xi32, 2> - %170 = AIE.lock(%165, 0) - %171 = AIE.buffer(%165) {sym_name = "buf6"} : memref<64xi32, 2> - %172 = AIE.mem(%165) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %162 = aie.tile(6, 2) + %163 = aie.tile(6, 1) + %164 = aie.tile(6, 0) + %165 = aie.tile(9, 2) + %166 = aie.lock(%165, 2) + %167 = aie.buffer(%165) {sym_name = "buf8"} : memref<64xi32, 2> + %168 = aie.lock(%165, 1) + %169 = aie.buffer(%165) {sym_name = "buf7"} : memref<64xi32, 2> + %170 = aie.lock(%165, 0) + %171 = aie.buffer(%165) {sym_name = "buf6"} : memref<64xi32, 2> + %172 = aie.mem(%165) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%170, Acquire, 0) - AIE.dma_bd(%171 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%170, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%170, Acquire, 0) + aie.dma_bd(%171 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%170, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%168, Acquire, 0) - AIE.dma_bd(%169 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%168, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%168, Acquire, 0) + aie.dma_bd(%169 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%168, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%166, Acquire, 1) - AIE.dma_bd(%167 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%166, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%166, Acquire, 1) + aie.dma_bd(%167 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%166, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %173 = AIE.core(%165) { + %173 = aie.core(%165) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%170, Acquire, 1) - AIE.use_lock(%168, Acquire, 1) - AIE.use_lock(%166, Acquire, 0) + aie.use_lock(%170, Acquire, 1) + aie.use_lock(%168, Acquire, 1) + aie.use_lock(%166, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %171[%arg0] : memref<64xi32, 2> %201 = affine.load %169[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %167[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%166, Release, 1) - AIE.use_lock(%168, Release, 0) - AIE.use_lock(%170, Release, 0) + aie.use_lock(%166, Release, 1) + aie.use_lock(%168, Release, 0) + aie.use_lock(%170, Release, 0) cf.br ^bb1 } - %174 = AIE.tile(3, 2) - %175 = AIE.tile(3, 1) - %176 = AIE.tile(3, 0) - %177 = AIE.tile(1, 0) - %178 = AIE.tile(8, 2) - %179 = AIE.lock(%178, 2) - %180 = AIE.buffer(%178) {sym_name = "buf5"} : memref<64xi32, 2> - %181 = AIE.lock(%178, 1) - %182 = AIE.buffer(%178) {sym_name = "buf4"} : memref<64xi32, 2> - %183 = AIE.lock(%178, 0) - %184 = AIE.buffer(%178) {sym_name = "buf3"} : memref<64xi32, 2> - %185 = AIE.mem(%178) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %174 = aie.tile(3, 2) + %175 = aie.tile(3, 1) + %176 = aie.tile(3, 0) + %177 = aie.tile(1, 0) + %178 = aie.tile(8, 2) + %179 = aie.lock(%178, 2) + %180 = aie.buffer(%178) {sym_name = "buf5"} : memref<64xi32, 2> + %181 = aie.lock(%178, 1) + %182 = aie.buffer(%178) {sym_name = "buf4"} : memref<64xi32, 2> + %183 = aie.lock(%178, 0) + %184 = aie.buffer(%178) {sym_name = "buf3"} : memref<64xi32, 2> + %185 = aie.mem(%178) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%183, Acquire, 0) - AIE.dma_bd(%184 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%183, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%183, Acquire, 0) + aie.dma_bd(%184 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%183, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%181, Acquire, 0) - AIE.dma_bd(%182 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%181, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%181, Acquire, 0) + aie.dma_bd(%182 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%181, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%179, Acquire, 1) - AIE.dma_bd(%180 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%179, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%179, Acquire, 1) + aie.dma_bd(%180 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%179, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %186 = AIE.core(%178) { + %186 = aie.core(%178) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%183, Acquire, 1) - AIE.use_lock(%181, Acquire, 1) - AIE.use_lock(%179, Acquire, 0) + aie.use_lock(%183, Acquire, 1) + aie.use_lock(%181, Acquire, 1) + aie.use_lock(%179, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %184[%arg0] : memref<64xi32, 2> %201 = affine.load %182[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %180[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%179, Release, 1) - AIE.use_lock(%181, Release, 0) - AIE.use_lock(%183, Release, 0) + aie.use_lock(%179, Release, 1) + aie.use_lock(%181, Release, 0) + aie.use_lock(%183, Release, 0) cf.br ^bb1 } - %187 = AIE.tile(2, 2) - %188 = AIE.tile(2, 1) - %189 = AIE.tile(2, 0) - %190 = AIE.tile(0, 0) - %191 = AIE.tile(7, 2) - %192 = AIE.lock(%191, 2) - %193 = AIE.buffer(%191) {sym_name = "buf2"} : memref<64xi32, 2> - %194 = AIE.lock(%191, 1) - %195 = AIE.buffer(%191) {sym_name = "buf1"} : memref<64xi32, 2> - %196 = AIE.lock(%191, 0) - %197 = AIE.buffer(%191) {sym_name = "buf0"} : memref<64xi32, 2> - %198 = AIE.mem(%191) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + %187 = aie.tile(2, 2) + %188 = aie.tile(2, 1) + %189 = aie.tile(2, 0) + %190 = aie.tile(0, 0) + %191 = aie.tile(7, 2) + %192 = aie.lock(%191, 2) + %193 = aie.buffer(%191) {sym_name = "buf2"} : memref<64xi32, 2> + %194 = aie.lock(%191, 1) + %195 = aie.buffer(%191) {sym_name = "buf1"} : memref<64xi32, 2> + %196 = aie.lock(%191, 0) + %197 = aie.buffer(%191) {sym_name = "buf0"} : memref<64xi32, 2> + %198 = aie.mem(%191) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%196, Acquire, 0) - AIE.dma_bd(%197 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%196, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%196, Acquire, 0) + aie.dma_bd(%197 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%196, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%194, Acquire, 0) - AIE.dma_bd(%195 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%194, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%194, Acquire, 0) + aie.dma_bd(%195 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%194, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%192, Acquire, 1) - AIE.dma_bd(%193 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%192, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%192, Acquire, 1) + aie.dma_bd(%193 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%192, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %199 = AIE.core(%191) { + %199 = aie.core(%191) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%196, Acquire, 1) - AIE.use_lock(%194, Acquire, 1) - AIE.use_lock(%192, Acquire, 0) + aie.use_lock(%196, Acquire, 1) + aie.use_lock(%194, Acquire, 1) + aie.use_lock(%192, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %197[%arg0] : memref<64xi32, 2> %201 = affine.load %195[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %193[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%192, Release, 1) - AIE.use_lock(%194, Release, 0) - AIE.use_lock(%196, Release, 0) + aie.use_lock(%192, Release, 1) + aie.use_lock(%194, Release, 0) + aie.use_lock(%196, Release, 0) cf.br ^bb1 } - AIE.flow(%189, DMA : 0, %191, DMA : 0) - AIE.flow(%189, DMA : 1, %191, DMA : 1) - AIE.flow(%191, DMA : 0, %189, DMA : 0) - AIE.flow(%176, DMA : 0, %178, DMA : 0) - AIE.flow(%176, DMA : 1, %178, DMA : 1) - AIE.flow(%178, DMA : 0, %189, DMA : 1) - AIE.flow(%164, DMA : 0, %165, DMA : 0) - AIE.flow(%164, DMA : 1, %165, DMA : 1) - AIE.flow(%165, DMA : 0, %176, DMA : 0) - AIE.flow(%152, DMA : 0, %153, DMA : 0) - AIE.flow(%152, DMA : 1, %153, DMA : 1) - AIE.flow(%153, DMA : 0, %176, DMA : 1) - AIE.flow(%140, DMA : 0, %142, DMA : 0) - AIE.flow(%140, DMA : 1, %142, DMA : 1) - AIE.flow(%142, DMA : 0, %164, DMA : 0) - AIE.flow(%128, DMA : 0, %130, DMA : 0) - AIE.flow(%128, DMA : 1, %130, DMA : 1) - AIE.flow(%130, DMA : 0, %164, DMA : 1) - AIE.flow(%116, DMA : 0, %117, DMA : 0) - AIE.flow(%116, DMA : 1, %117, DMA : 1) - AIE.flow(%117, DMA : 0, %152, DMA : 0) - AIE.flow(%104, DMA : 0, %105, DMA : 0) - AIE.flow(%104, DMA : 1, %105, DMA : 1) - AIE.flow(%105, DMA : 0, %152, DMA : 1) - AIE.flow(%91, DMA : 0, %93, DMA : 0) - AIE.flow(%91, DMA : 1, %93, DMA : 1) - AIE.flow(%93, DMA : 0, %140, DMA : 0) - AIE.flow(%78, DMA : 0, %80, DMA : 0) - AIE.flow(%78, DMA : 1, %80, DMA : 1) - AIE.flow(%80, DMA : 0, %140, DMA : 1) - AIE.flow(%66, DMA : 0, %67, DMA : 0) - AIE.flow(%66, DMA : 1, %67, DMA : 1) - AIE.flow(%67, DMA : 0, %128, DMA : 0) - AIE.flow(%54, DMA : 0, %55, DMA : 0) - AIE.flow(%54, DMA : 1, %55, DMA : 1) - AIE.flow(%55, DMA : 0, %128, DMA : 1) - AIE.flow(%41, DMA : 0, %43, DMA : 0) - AIE.flow(%41, DMA : 1, %43, DMA : 1) - AIE.flow(%43, DMA : 0, %116, DMA : 0) - AIE.flow(%28, DMA : 0, %30, DMA : 0) - AIE.flow(%28, DMA : 1, %30, DMA : 1) - AIE.flow(%30, DMA : 0, %116, DMA : 1) - AIE.flow(%15, DMA : 0, %17, DMA : 0) - AIE.flow(%15, DMA : 1, %17, DMA : 1) - AIE.flow(%17, DMA : 0, %104, DMA : 0) - AIE.flow(%2, DMA : 0, %4, DMA : 0) - AIE.flow(%2, DMA : 1, %4, DMA : 1) - AIE.flow(%4, DMA : 0, %104, DMA : 1) + aie.flow(%189, DMA : 0, %191, DMA : 0) + aie.flow(%189, DMA : 1, %191, DMA : 1) + aie.flow(%191, DMA : 0, %189, DMA : 0) + aie.flow(%176, DMA : 0, %178, DMA : 0) + aie.flow(%176, DMA : 1, %178, DMA : 1) + aie.flow(%178, DMA : 0, %189, DMA : 1) + aie.flow(%164, DMA : 0, %165, DMA : 0) + aie.flow(%164, DMA : 1, %165, DMA : 1) + aie.flow(%165, DMA : 0, %176, DMA : 0) + aie.flow(%152, DMA : 0, %153, DMA : 0) + aie.flow(%152, DMA : 1, %153, DMA : 1) + aie.flow(%153, DMA : 0, %176, DMA : 1) + aie.flow(%140, DMA : 0, %142, DMA : 0) + aie.flow(%140, DMA : 1, %142, DMA : 1) + aie.flow(%142, DMA : 0, %164, DMA : 0) + aie.flow(%128, DMA : 0, %130, DMA : 0) + aie.flow(%128, DMA : 1, %130, DMA : 1) + aie.flow(%130, DMA : 0, %164, DMA : 1) + aie.flow(%116, DMA : 0, %117, DMA : 0) + aie.flow(%116, DMA : 1, %117, DMA : 1) + aie.flow(%117, DMA : 0, %152, DMA : 0) + aie.flow(%104, DMA : 0, %105, DMA : 0) + aie.flow(%104, DMA : 1, %105, DMA : 1) + aie.flow(%105, DMA : 0, %152, DMA : 1) + aie.flow(%91, DMA : 0, %93, DMA : 0) + aie.flow(%91, DMA : 1, %93, DMA : 1) + aie.flow(%93, DMA : 0, %140, DMA : 0) + aie.flow(%78, DMA : 0, %80, DMA : 0) + aie.flow(%78, DMA : 1, %80, DMA : 1) + aie.flow(%80, DMA : 0, %140, DMA : 1) + aie.flow(%66, DMA : 0, %67, DMA : 0) + aie.flow(%66, DMA : 1, %67, DMA : 1) + aie.flow(%67, DMA : 0, %128, DMA : 0) + aie.flow(%54, DMA : 0, %55, DMA : 0) + aie.flow(%54, DMA : 1, %55, DMA : 1) + aie.flow(%55, DMA : 0, %128, DMA : 1) + aie.flow(%41, DMA : 0, %43, DMA : 0) + aie.flow(%41, DMA : 1, %43, DMA : 1) + aie.flow(%43, DMA : 0, %116, DMA : 0) + aie.flow(%28, DMA : 0, %30, DMA : 0) + aie.flow(%28, DMA : 1, %30, DMA : 1) + aie.flow(%30, DMA : 0, %116, DMA : 1) + aie.flow(%15, DMA : 0, %17, DMA : 0) + aie.flow(%15, DMA : 1, %17, DMA : 1) + aie.flow(%17, DMA : 0, %104, DMA : 0) + aie.flow(%2, DMA : 0, %4, DMA : 0) + aie.flow(%2, DMA : 1, %4, DMA : 1) + aie.flow(%4, DMA : 0, %104, DMA : 1) } } diff --git a/test/create-flows/vecmul_4x4.mlir b/test/create-flows/vecmul_4x4.mlir index 3f08e0c47f..17f07ae91c 100644 --- a/test/create-flows/vecmul_4x4.mlir +++ b/test/create-flows/vecmul_4x4.mlir @@ -9,994 +9,994 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-pathfinder-flows --aie-find-flows %s | FileCheck %s -// CHECK: %[[T2:.*]] = AIE.tile(47, 0) -// CHECK: %[[T4:.*]] = AIE.tile(10, 5) -// CHECK: %[[T15:.*]] = AIE.tile(46, 0) -// CHECK: %[[T17:.*]] = AIE.tile(9, 5) -// CHECK: %[[T28:.*]] = AIE.tile(43, 0) -// CHECK: %[[T30:.*]] = AIE.tile(8, 5) -// CHECK: %[[T41:.*]] = AIE.tile(42, 0) -// CHECK: %[[T43:.*]] = AIE.tile(7, 5) -// CHECK: %[[T54:.*]] = AIE.tile(35, 0) -// CHECK: %[[T55:.*]] = AIE.tile(10, 4) -// CHECK: %[[T66:.*]] = AIE.tile(34, 0) -// CHECK: %[[T67:.*]] = AIE.tile(9, 4) -// CHECK: %[[T78:.*]] = AIE.tile(27, 0) -// CHECK: %[[T80:.*]] = AIE.tile(8, 4) -// CHECK: %[[T91:.*]] = AIE.tile(26, 0) -// CHECK: %[[T93:.*]] = AIE.tile(7, 4) -// CHECK: %[[T104:.*]] = AIE.tile(19, 0) -// CHECK: %[[T105:.*]] = AIE.tile(10, 3) -// CHECK: %[[T116:.*]] = AIE.tile(18, 0) -// CHECK: %[[T117:.*]] = AIE.tile(9, 3) -// CHECK: %[[T128:.*]] = AIE.tile(11, 0) -// CHECK: %[[T130:.*]] = AIE.tile(8, 3) -// CHECK: %[[T140:.*]] = AIE.tile(10, 0) -// CHECK: %[[T142:.*]] = AIE.tile(7, 3) -// CHECK: %[[T152:.*]] = AIE.tile(7, 0) -// CHECK: %[[T153:.*]] = AIE.tile(10, 2) -// CHECK: %[[T164:.*]] = AIE.tile(6, 0) -// CHECK: %[[T165:.*]] = AIE.tile(9, 2) -// CHECK: %[[T176:.*]] = AIE.tile(3, 0) -// CHECK: %[[T178:.*]] = AIE.tile(8, 2) -// CHECK: %[[T189:.*]] = AIE.tile(2, 0) -// CHECK: %[[T191:.*]] = AIE.tile(7, 2) +// CHECK: %[[T2:.*]] = aie.tile(47, 0) +// CHECK: %[[T4:.*]] = aie.tile(10, 5) +// CHECK: %[[T15:.*]] = aie.tile(46, 0) +// CHECK: %[[T17:.*]] = aie.tile(9, 5) +// CHECK: %[[T28:.*]] = aie.tile(43, 0) +// CHECK: %[[T30:.*]] = aie.tile(8, 5) +// CHECK: %[[T41:.*]] = aie.tile(42, 0) +// CHECK: %[[T43:.*]] = aie.tile(7, 5) +// CHECK: %[[T54:.*]] = aie.tile(35, 0) +// CHECK: %[[T55:.*]] = aie.tile(10, 4) +// CHECK: %[[T66:.*]] = aie.tile(34, 0) +// CHECK: %[[T67:.*]] = aie.tile(9, 4) +// CHECK: %[[T78:.*]] = aie.tile(27, 0) +// CHECK: %[[T80:.*]] = aie.tile(8, 4) +// CHECK: %[[T91:.*]] = aie.tile(26, 0) +// CHECK: %[[T93:.*]] = aie.tile(7, 4) +// CHECK: %[[T104:.*]] = aie.tile(19, 0) +// CHECK: %[[T105:.*]] = aie.tile(10, 3) +// CHECK: %[[T116:.*]] = aie.tile(18, 0) +// CHECK: %[[T117:.*]] = aie.tile(9, 3) +// CHECK: %[[T128:.*]] = aie.tile(11, 0) +// CHECK: %[[T130:.*]] = aie.tile(8, 3) +// CHECK: %[[T140:.*]] = aie.tile(10, 0) +// CHECK: %[[T142:.*]] = aie.tile(7, 3) +// CHECK: %[[T152:.*]] = aie.tile(7, 0) +// CHECK: %[[T153:.*]] = aie.tile(10, 2) +// CHECK: %[[T164:.*]] = aie.tile(6, 0) +// CHECK: %[[T165:.*]] = aie.tile(9, 2) +// CHECK: %[[T176:.*]] = aie.tile(3, 0) +// CHECK: %[[T178:.*]] = aie.tile(8, 2) +// CHECK: %[[T189:.*]] = aie.tile(2, 0) +// CHECK: %[[T191:.*]] = aie.tile(7, 2) // -// CHECK: AIE.flow(%[[T2]], DMA : 0, %[[T4]], DMA : 0) -// CHECK: AIE.flow(%[[T2]], DMA : 1, %[[T4]], DMA : 1) -// CHECK: AIE.flow(%[[T4]], DMA : 0, %[[T104]], DMA : 1) -// CHECK: AIE.flow(%[[T15]], DMA : 0, %[[T17]], DMA : 0) -// CHECK: AIE.flow(%[[T15]], DMA : 1, %[[T17]], DMA : 1) -// CHECK: AIE.flow(%[[T17]], DMA : 0, %[[T104]], DMA : 0) -// CHECK: AIE.flow(%[[T28]], DMA : 0, %[[T30]], DMA : 0) -// CHECK: AIE.flow(%[[T28]], DMA : 1, %[[T30]], DMA : 1) -// CHECK: AIE.flow(%[[T30]], DMA : 0, %[[T116]], DMA : 1) -// CHECK: AIE.flow(%[[T41]], DMA : 0, %[[T43]], DMA : 0) -// CHECK: AIE.flow(%[[T41]], DMA : 1, %[[T43]], DMA : 1) -// CHECK: AIE.flow(%[[T43]], DMA : 0, %[[T116]], DMA : 0) -// CHECK: AIE.flow(%[[T54]], DMA : 0, %[[T55]], DMA : 0) -// CHECK: AIE.flow(%[[T54]], DMA : 1, %[[T55]], DMA : 1) -// CHECK: AIE.flow(%[[T55]], DMA : 0, %[[T128]], DMA : 1) -// CHECK: AIE.flow(%[[T66]], DMA : 0, %[[T67]], DMA : 0) -// CHECK: AIE.flow(%[[T66]], DMA : 1, %[[T67]], DMA : 1) -// CHECK: AIE.flow(%[[T67]], DMA : 0, %[[T128]], DMA : 0) -// CHECK: AIE.flow(%[[T78]], DMA : 0, %[[T80]], DMA : 0) -// CHECK: AIE.flow(%[[T78]], DMA : 1, %[[T80]], DMA : 1) -// CHECK: AIE.flow(%[[T80]], DMA : 0, %[[T140]], DMA : 1) -// CHECK: AIE.flow(%[[T91]], DMA : 0, %[[T93]], DMA : 0) -// CHECK: AIE.flow(%[[T91]], DMA : 1, %[[T93]], DMA : 1) -// CHECK: AIE.flow(%[[T93]], DMA : 0, %[[T140]], DMA : 0) -// CHECK: AIE.flow(%[[T104]], DMA : 0, %[[T105]], DMA : 0) -// CHECK: AIE.flow(%[[T104]], DMA : 1, %[[T105]], DMA : 1) -// CHECK: AIE.flow(%[[T105]], DMA : 0, %[[T152]], DMA : 1) -// CHECK: AIE.flow(%[[T116]], DMA : 0, %[[T117]], DMA : 0) -// CHECK: AIE.flow(%[[T116]], DMA : 1, %[[T117]], DMA : 1) -// CHECK: AIE.flow(%[[T117]], DMA : 0, %[[T152]], DMA : 0) -// CHECK: AIE.flow(%[[T128]], DMA : 0, %[[T130]], DMA : 0) -// CHECK: AIE.flow(%[[T128]], DMA : 1, %[[T130]], DMA : 1) -// CHECK: AIE.flow(%[[T130]], DMA : 0, %[[T164]], DMA : 1) -// CHECK: AIE.flow(%[[T140]], DMA : 0, %[[T142]], DMA : 0) -// CHECK: AIE.flow(%[[T140]], DMA : 1, %[[T142]], DMA : 1) -// CHECK: AIE.flow(%[[T142]], DMA : 0, %[[T164]], DMA : 0) -// CHECK: AIE.flow(%[[T152]], DMA : 0, %[[T153]], DMA : 0) -// CHECK: AIE.flow(%[[T152]], DMA : 1, %[[T153]], DMA : 1) -// CHECK: AIE.flow(%[[T153]], DMA : 0, %[[T176]], DMA : 1) -// CHECK: AIE.flow(%[[T164]], DMA : 0, %[[T165]], DMA : 0) -// CHECK: AIE.flow(%[[T164]], DMA : 1, %[[T165]], DMA : 1) -// CHECK: AIE.flow(%[[T165]], DMA : 0, %[[T176]], DMA : 0) -// CHECK: AIE.flow(%[[T176]], DMA : 0, %[[T178]], DMA : 0) -// CHECK: AIE.flow(%[[T176]], DMA : 1, %[[T178]], DMA : 1) -// CHECK: AIE.flow(%[[T178]], DMA : 0, %[[T189]], DMA : 1) -// CHECK: AIE.flow(%[[T189]], DMA : 0, %[[T191]], DMA : 0) -// CHECK: AIE.flow(%[[T189]], DMA : 1, %[[T191]], DMA : 1) -// CHECK: AIE.flow(%[[T191]], DMA : 0, %[[T189]], DMA : 0) +// CHECK: aie.flow(%[[T2]], DMA : 0, %[[T4]], DMA : 0) +// CHECK: aie.flow(%[[T2]], DMA : 1, %[[T4]], DMA : 1) +// CHECK: aie.flow(%[[T4]], DMA : 0, %[[T104]], DMA : 1) +// CHECK: aie.flow(%[[T15]], DMA : 0, %[[T17]], DMA : 0) +// CHECK: aie.flow(%[[T15]], DMA : 1, %[[T17]], DMA : 1) +// CHECK: aie.flow(%[[T17]], DMA : 0, %[[T104]], DMA : 0) +// CHECK: aie.flow(%[[T28]], DMA : 0, %[[T30]], DMA : 0) +// CHECK: aie.flow(%[[T28]], DMA : 1, %[[T30]], DMA : 1) +// CHECK: aie.flow(%[[T30]], DMA : 0, %[[T116]], DMA : 1) +// CHECK: aie.flow(%[[T41]], DMA : 0, %[[T43]], DMA : 0) +// CHECK: aie.flow(%[[T41]], DMA : 1, %[[T43]], DMA : 1) +// CHECK: aie.flow(%[[T43]], DMA : 0, %[[T116]], DMA : 0) +// CHECK: aie.flow(%[[T54]], DMA : 0, %[[T55]], DMA : 0) +// CHECK: aie.flow(%[[T54]], DMA : 1, %[[T55]], DMA : 1) +// CHECK: aie.flow(%[[T55]], DMA : 0, %[[T128]], DMA : 1) +// CHECK: aie.flow(%[[T66]], DMA : 0, %[[T67]], DMA : 0) +// CHECK: aie.flow(%[[T66]], DMA : 1, %[[T67]], DMA : 1) +// CHECK: aie.flow(%[[T67]], DMA : 0, %[[T128]], DMA : 0) +// CHECK: aie.flow(%[[T78]], DMA : 0, %[[T80]], DMA : 0) +// CHECK: aie.flow(%[[T78]], DMA : 1, %[[T80]], DMA : 1) +// CHECK: aie.flow(%[[T80]], DMA : 0, %[[T140]], DMA : 1) +// CHECK: aie.flow(%[[T91]], DMA : 0, %[[T93]], DMA : 0) +// CHECK: aie.flow(%[[T91]], DMA : 1, %[[T93]], DMA : 1) +// CHECK: aie.flow(%[[T93]], DMA : 0, %[[T140]], DMA : 0) +// CHECK: aie.flow(%[[T104]], DMA : 0, %[[T105]], DMA : 0) +// CHECK: aie.flow(%[[T104]], DMA : 1, %[[T105]], DMA : 1) +// CHECK: aie.flow(%[[T105]], DMA : 0, %[[T152]], DMA : 1) +// CHECK: aie.flow(%[[T116]], DMA : 0, %[[T117]], DMA : 0) +// CHECK: aie.flow(%[[T116]], DMA : 1, %[[T117]], DMA : 1) +// CHECK: aie.flow(%[[T117]], DMA : 0, %[[T152]], DMA : 0) +// CHECK: aie.flow(%[[T128]], DMA : 0, %[[T130]], DMA : 0) +// CHECK: aie.flow(%[[T128]], DMA : 1, %[[T130]], DMA : 1) +// CHECK: aie.flow(%[[T130]], DMA : 0, %[[T164]], DMA : 1) +// CHECK: aie.flow(%[[T140]], DMA : 0, %[[T142]], DMA : 0) +// CHECK: aie.flow(%[[T140]], DMA : 1, %[[T142]], DMA : 1) +// CHECK: aie.flow(%[[T142]], DMA : 0, %[[T164]], DMA : 0) +// CHECK: aie.flow(%[[T152]], DMA : 0, %[[T153]], DMA : 0) +// CHECK: aie.flow(%[[T152]], DMA : 1, %[[T153]], DMA : 1) +// CHECK: aie.flow(%[[T153]], DMA : 0, %[[T176]], DMA : 1) +// CHECK: aie.flow(%[[T164]], DMA : 0, %[[T165]], DMA : 0) +// CHECK: aie.flow(%[[T164]], DMA : 1, %[[T165]], DMA : 1) +// CHECK: aie.flow(%[[T165]], DMA : 0, %[[T176]], DMA : 0) +// CHECK: aie.flow(%[[T176]], DMA : 0, %[[T178]], DMA : 0) +// CHECK: aie.flow(%[[T176]], DMA : 1, %[[T178]], DMA : 1) +// CHECK: aie.flow(%[[T178]], DMA : 0, %[[T189]], DMA : 1) +// CHECK: aie.flow(%[[T189]], DMA : 0, %[[T191]], DMA : 0) +// CHECK: aie.flow(%[[T189]], DMA : 1, %[[T191]], DMA : 1) +// CHECK: aie.flow(%[[T191]], DMA : 0, %[[T189]], DMA : 0) module @vecmul_4x4 { - AIE.device(xcvc1902) { - %0 = AIE.tile(47, 2) - %1 = AIE.tile(47, 1) - %2 = AIE.tile(47, 0) - %3 = AIE.tile(3, 3) - %4 = AIE.tile(10, 5) - %5 = AIE.lock(%4, 2) - %6 = AIE.buffer(%4) {sym_name = "buf47"} : memref<64xi32, 2> - %7 = AIE.lock(%4, 1) - %8 = AIE.buffer(%4) {sym_name = "buf46"} : memref<64xi32, 2> - %9 = AIE.lock(%4, 0) - %10 = AIE.buffer(%4) {sym_name = "buf45"} : memref<64xi32, 2> - %11 = AIE.mem(%4) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.device(xcvc1902) { + %0 = aie.tile(47, 2) + %1 = aie.tile(47, 1) + %2 = aie.tile(47, 0) + %3 = aie.tile(3, 3) + %4 = aie.tile(10, 5) + %5 = aie.lock(%4, 2) + %6 = aie.buffer(%4) {sym_name = "buf47"} : memref<64xi32, 2> + %7 = aie.lock(%4, 1) + %8 = aie.buffer(%4) {sym_name = "buf46"} : memref<64xi32, 2> + %9 = aie.lock(%4, 0) + %10 = aie.buffer(%4) {sym_name = "buf45"} : memref<64xi32, 2> + %11 = aie.mem(%4) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%9, Acquire, 0) - AIE.dma_bd(%10 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%9, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%9, Acquire, 0) + aie.dma_bd(%10 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%9, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%7, Acquire, 0) - AIE.dma_bd(%8 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%7, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%7, Acquire, 0) + aie.dma_bd(%8 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%7, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%5, Acquire, 1) - AIE.dma_bd(%6 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%5, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%5, Acquire, 1) + aie.dma_bd(%6 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%5, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %12 = AIE.core(%4) { + %12 = aie.core(%4) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%9, Acquire, 1) - AIE.use_lock(%7, Acquire, 1) - AIE.use_lock(%5, Acquire, 0) + aie.use_lock(%9, Acquire, 1) + aie.use_lock(%7, Acquire, 1) + aie.use_lock(%5, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %10[%arg0] : memref<64xi32, 2> %201 = affine.load %8[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %6[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%5, Release, 1) - AIE.use_lock(%7, Release, 0) - AIE.use_lock(%9, Release, 0) - cf.br ^bb1 - } - %13 = AIE.tile(46, 2) - %14 = AIE.tile(46, 1) - %15 = AIE.tile(46, 0) - %16 = AIE.tile(2, 3) - %17 = AIE.tile(9, 5) - %18 = AIE.lock(%17, 2) - %19 = AIE.buffer(%17) {sym_name = "buf44"} : memref<64xi32, 2> - %20 = AIE.lock(%17, 1) - %21 = AIE.buffer(%17) {sym_name = "buf43"} : memref<64xi32, 2> - %22 = AIE.lock(%17, 0) - %23 = AIE.buffer(%17) {sym_name = "buf42"} : memref<64xi32, 2> - %24 = AIE.mem(%17) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%5, Release, 1) + aie.use_lock(%7, Release, 0) + aie.use_lock(%9, Release, 0) + cf.br ^bb1 + } + %13 = aie.tile(46, 2) + %14 = aie.tile(46, 1) + %15 = aie.tile(46, 0) + %16 = aie.tile(2, 3) + %17 = aie.tile(9, 5) + %18 = aie.lock(%17, 2) + %19 = aie.buffer(%17) {sym_name = "buf44"} : memref<64xi32, 2> + %20 = aie.lock(%17, 1) + %21 = aie.buffer(%17) {sym_name = "buf43"} : memref<64xi32, 2> + %22 = aie.lock(%17, 0) + %23 = aie.buffer(%17) {sym_name = "buf42"} : memref<64xi32, 2> + %24 = aie.mem(%17) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%22, Acquire, 0) - AIE.dma_bd(%23 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%22, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%22, Acquire, 0) + aie.dma_bd(%23 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%22, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%20, Acquire, 0) - AIE.dma_bd(%21 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%20, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%20, Acquire, 0) + aie.dma_bd(%21 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%20, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%18, Acquire, 1) - AIE.dma_bd(%19 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%18, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%18, Acquire, 1) + aie.dma_bd(%19 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%18, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %25 = AIE.core(%17) { + %25 = aie.core(%17) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%22, Acquire, 1) - AIE.use_lock(%20, Acquire, 1) - AIE.use_lock(%18, Acquire, 0) + aie.use_lock(%22, Acquire, 1) + aie.use_lock(%20, Acquire, 1) + aie.use_lock(%18, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %23[%arg0] : memref<64xi32, 2> %201 = affine.load %21[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %19[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%18, Release, 1) - AIE.use_lock(%20, Release, 0) - AIE.use_lock(%22, Release, 0) - cf.br ^bb1 - } - %26 = AIE.tile(43, 2) - %27 = AIE.tile(43, 1) - %28 = AIE.tile(43, 0) - %29 = AIE.tile(1, 3) - %30 = AIE.tile(8, 5) - %31 = AIE.lock(%30, 2) - %32 = AIE.buffer(%30) {sym_name = "buf41"} : memref<64xi32, 2> - %33 = AIE.lock(%30, 1) - %34 = AIE.buffer(%30) {sym_name = "buf40"} : memref<64xi32, 2> - %35 = AIE.lock(%30, 0) - %36 = AIE.buffer(%30) {sym_name = "buf39"} : memref<64xi32, 2> - %37 = AIE.mem(%30) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%18, Release, 1) + aie.use_lock(%20, Release, 0) + aie.use_lock(%22, Release, 0) + cf.br ^bb1 + } + %26 = aie.tile(43, 2) + %27 = aie.tile(43, 1) + %28 = aie.tile(43, 0) + %29 = aie.tile(1, 3) + %30 = aie.tile(8, 5) + %31 = aie.lock(%30, 2) + %32 = aie.buffer(%30) {sym_name = "buf41"} : memref<64xi32, 2> + %33 = aie.lock(%30, 1) + %34 = aie.buffer(%30) {sym_name = "buf40"} : memref<64xi32, 2> + %35 = aie.lock(%30, 0) + %36 = aie.buffer(%30) {sym_name = "buf39"} : memref<64xi32, 2> + %37 = aie.mem(%30) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%35, Acquire, 0) - AIE.dma_bd(%36 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%35, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%35, Acquire, 0) + aie.dma_bd(%36 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%35, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%33, Acquire, 0) - AIE.dma_bd(%34 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%33, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%33, Acquire, 0) + aie.dma_bd(%34 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%33, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%31, Acquire, 1) - AIE.dma_bd(%32 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%31, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%31, Acquire, 1) + aie.dma_bd(%32 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%31, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %38 = AIE.core(%30) { + %38 = aie.core(%30) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%35, Acquire, 1) - AIE.use_lock(%33, Acquire, 1) - AIE.use_lock(%31, Acquire, 0) + aie.use_lock(%35, Acquire, 1) + aie.use_lock(%33, Acquire, 1) + aie.use_lock(%31, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %36[%arg0] : memref<64xi32, 2> %201 = affine.load %34[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %32[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%31, Release, 1) - AIE.use_lock(%33, Release, 0) - AIE.use_lock(%35, Release, 0) - cf.br ^bb1 - } - %39 = AIE.tile(42, 2) - %40 = AIE.tile(42, 1) - %41 = AIE.tile(42, 0) - %42 = AIE.tile(0, 3) - %43 = AIE.tile(7, 5) - %44 = AIE.lock(%43, 2) - %45 = AIE.buffer(%43) {sym_name = "buf38"} : memref<64xi32, 2> - %46 = AIE.lock(%43, 1) - %47 = AIE.buffer(%43) {sym_name = "buf37"} : memref<64xi32, 2> - %48 = AIE.lock(%43, 0) - %49 = AIE.buffer(%43) {sym_name = "buf36"} : memref<64xi32, 2> - %50 = AIE.mem(%43) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%31, Release, 1) + aie.use_lock(%33, Release, 0) + aie.use_lock(%35, Release, 0) + cf.br ^bb1 + } + %39 = aie.tile(42, 2) + %40 = aie.tile(42, 1) + %41 = aie.tile(42, 0) + %42 = aie.tile(0, 3) + %43 = aie.tile(7, 5) + %44 = aie.lock(%43, 2) + %45 = aie.buffer(%43) {sym_name = "buf38"} : memref<64xi32, 2> + %46 = aie.lock(%43, 1) + %47 = aie.buffer(%43) {sym_name = "buf37"} : memref<64xi32, 2> + %48 = aie.lock(%43, 0) + %49 = aie.buffer(%43) {sym_name = "buf36"} : memref<64xi32, 2> + %50 = aie.mem(%43) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%48, Acquire, 0) - AIE.dma_bd(%49 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%48, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%48, Acquire, 0) + aie.dma_bd(%49 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%48, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%46, Acquire, 0) - AIE.dma_bd(%47 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%46, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%46, Acquire, 0) + aie.dma_bd(%47 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%46, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%44, Acquire, 1) - AIE.dma_bd(%45 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%44, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%44, Acquire, 1) + aie.dma_bd(%45 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%44, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %51 = AIE.core(%43) { + %51 = aie.core(%43) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%48, Acquire, 1) - AIE.use_lock(%46, Acquire, 1) - AIE.use_lock(%44, Acquire, 0) + aie.use_lock(%48, Acquire, 1) + aie.use_lock(%46, Acquire, 1) + aie.use_lock(%44, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %49[%arg0] : memref<64xi32, 2> %201 = affine.load %47[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %45[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%44, Release, 1) - AIE.use_lock(%46, Release, 0) - AIE.use_lock(%48, Release, 0) - cf.br ^bb1 - } - %52 = AIE.tile(35, 2) - %53 = AIE.tile(35, 1) - %54 = AIE.tile(35, 0) - %55 = AIE.tile(10, 4) - %56 = AIE.lock(%55, 2) - %57 = AIE.buffer(%55) {sym_name = "buf35"} : memref<64xi32, 2> - %58 = AIE.lock(%55, 1) - %59 = AIE.buffer(%55) {sym_name = "buf34"} : memref<64xi32, 2> - %60 = AIE.lock(%55, 0) - %61 = AIE.buffer(%55) {sym_name = "buf33"} : memref<64xi32, 2> - %62 = AIE.mem(%55) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%44, Release, 1) + aie.use_lock(%46, Release, 0) + aie.use_lock(%48, Release, 0) + cf.br ^bb1 + } + %52 = aie.tile(35, 2) + %53 = aie.tile(35, 1) + %54 = aie.tile(35, 0) + %55 = aie.tile(10, 4) + %56 = aie.lock(%55, 2) + %57 = aie.buffer(%55) {sym_name = "buf35"} : memref<64xi32, 2> + %58 = aie.lock(%55, 1) + %59 = aie.buffer(%55) {sym_name = "buf34"} : memref<64xi32, 2> + %60 = aie.lock(%55, 0) + %61 = aie.buffer(%55) {sym_name = "buf33"} : memref<64xi32, 2> + %62 = aie.mem(%55) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%60, Acquire, 0) - AIE.dma_bd(%61 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%60, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%60, Acquire, 0) + aie.dma_bd(%61 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%60, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%58, Acquire, 0) - AIE.dma_bd(%59 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%58, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%58, Acquire, 0) + aie.dma_bd(%59 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%58, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%56, Acquire, 1) - AIE.dma_bd(%57 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%56, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%56, Acquire, 1) + aie.dma_bd(%57 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%56, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %63 = AIE.core(%55) { + %63 = aie.core(%55) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%60, Acquire, 1) - AIE.use_lock(%58, Acquire, 1) - AIE.use_lock(%56, Acquire, 0) + aie.use_lock(%60, Acquire, 1) + aie.use_lock(%58, Acquire, 1) + aie.use_lock(%56, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %61[%arg0] : memref<64xi32, 2> %201 = affine.load %59[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %57[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%56, Release, 1) - AIE.use_lock(%58, Release, 0) - AIE.use_lock(%60, Release, 0) - cf.br ^bb1 - } - %64 = AIE.tile(34, 2) - %65 = AIE.tile(34, 1) - %66 = AIE.tile(34, 0) - %67 = AIE.tile(9, 4) - %68 = AIE.lock(%67, 2) - %69 = AIE.buffer(%67) {sym_name = "buf32"} : memref<64xi32, 2> - %70 = AIE.lock(%67, 1) - %71 = AIE.buffer(%67) {sym_name = "buf31"} : memref<64xi32, 2> - %72 = AIE.lock(%67, 0) - %73 = AIE.buffer(%67) {sym_name = "buf30"} : memref<64xi32, 2> - %74 = AIE.mem(%67) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%56, Release, 1) + aie.use_lock(%58, Release, 0) + aie.use_lock(%60, Release, 0) + cf.br ^bb1 + } + %64 = aie.tile(34, 2) + %65 = aie.tile(34, 1) + %66 = aie.tile(34, 0) + %67 = aie.tile(9, 4) + %68 = aie.lock(%67, 2) + %69 = aie.buffer(%67) {sym_name = "buf32"} : memref<64xi32, 2> + %70 = aie.lock(%67, 1) + %71 = aie.buffer(%67) {sym_name = "buf31"} : memref<64xi32, 2> + %72 = aie.lock(%67, 0) + %73 = aie.buffer(%67) {sym_name = "buf30"} : memref<64xi32, 2> + %74 = aie.mem(%67) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%72, Acquire, 0) - AIE.dma_bd(%73 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%72, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%72, Acquire, 0) + aie.dma_bd(%73 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%72, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%70, Acquire, 0) - AIE.dma_bd(%71 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%70, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%70, Acquire, 0) + aie.dma_bd(%71 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%70, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%68, Acquire, 1) - AIE.dma_bd(%69 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%68, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%68, Acquire, 1) + aie.dma_bd(%69 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%68, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %75 = AIE.core(%67) { + %75 = aie.core(%67) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%72, Acquire, 1) - AIE.use_lock(%70, Acquire, 1) - AIE.use_lock(%68, Acquire, 0) + aie.use_lock(%72, Acquire, 1) + aie.use_lock(%70, Acquire, 1) + aie.use_lock(%68, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %73[%arg0] : memref<64xi32, 2> %201 = affine.load %71[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %69[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%68, Release, 1) - AIE.use_lock(%70, Release, 0) - AIE.use_lock(%72, Release, 0) - cf.br ^bb1 - } - %76 = AIE.tile(27, 2) - %77 = AIE.tile(27, 1) - %78 = AIE.tile(27, 0) - %79 = AIE.tile(1, 2) - %80 = AIE.tile(8, 4) - %81 = AIE.lock(%80, 2) - %82 = AIE.buffer(%80) {sym_name = "buf29"} : memref<64xi32, 2> - %83 = AIE.lock(%80, 1) - %84 = AIE.buffer(%80) {sym_name = "buf28"} : memref<64xi32, 2> - %85 = AIE.lock(%80, 0) - %86 = AIE.buffer(%80) {sym_name = "buf27"} : memref<64xi32, 2> - %87 = AIE.mem(%80) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%68, Release, 1) + aie.use_lock(%70, Release, 0) + aie.use_lock(%72, Release, 0) + cf.br ^bb1 + } + %76 = aie.tile(27, 2) + %77 = aie.tile(27, 1) + %78 = aie.tile(27, 0) + %79 = aie.tile(1, 2) + %80 = aie.tile(8, 4) + %81 = aie.lock(%80, 2) + %82 = aie.buffer(%80) {sym_name = "buf29"} : memref<64xi32, 2> + %83 = aie.lock(%80, 1) + %84 = aie.buffer(%80) {sym_name = "buf28"} : memref<64xi32, 2> + %85 = aie.lock(%80, 0) + %86 = aie.buffer(%80) {sym_name = "buf27"} : memref<64xi32, 2> + %87 = aie.mem(%80) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%85, Acquire, 0) - AIE.dma_bd(%86 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%85, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%85, Acquire, 0) + aie.dma_bd(%86 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%85, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%83, Acquire, 0) - AIE.dma_bd(%84 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%83, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%83, Acquire, 0) + aie.dma_bd(%84 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%83, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%81, Acquire, 1) - AIE.dma_bd(%82 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%81, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%81, Acquire, 1) + aie.dma_bd(%82 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%81, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %88 = AIE.core(%80) { + %88 = aie.core(%80) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%85, Acquire, 1) - AIE.use_lock(%83, Acquire, 1) - AIE.use_lock(%81, Acquire, 0) + aie.use_lock(%85, Acquire, 1) + aie.use_lock(%83, Acquire, 1) + aie.use_lock(%81, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %86[%arg0] : memref<64xi32, 2> %201 = affine.load %84[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %82[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%81, Release, 1) - AIE.use_lock(%83, Release, 0) - AIE.use_lock(%85, Release, 0) - cf.br ^bb1 - } - %89 = AIE.tile(26, 2) - %90 = AIE.tile(26, 1) - %91 = AIE.tile(26, 0) - %92 = AIE.tile(0, 2) - %93 = AIE.tile(7, 4) - %94 = AIE.lock(%93, 2) - %95 = AIE.buffer(%93) {sym_name = "buf26"} : memref<64xi32, 2> - %96 = AIE.lock(%93, 1) - %97 = AIE.buffer(%93) {sym_name = "buf25"} : memref<64xi32, 2> - %98 = AIE.lock(%93, 0) - %99 = AIE.buffer(%93) {sym_name = "buf24"} : memref<64xi32, 2> - %100 = AIE.mem(%93) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%81, Release, 1) + aie.use_lock(%83, Release, 0) + aie.use_lock(%85, Release, 0) + cf.br ^bb1 + } + %89 = aie.tile(26, 2) + %90 = aie.tile(26, 1) + %91 = aie.tile(26, 0) + %92 = aie.tile(0, 2) + %93 = aie.tile(7, 4) + %94 = aie.lock(%93, 2) + %95 = aie.buffer(%93) {sym_name = "buf26"} : memref<64xi32, 2> + %96 = aie.lock(%93, 1) + %97 = aie.buffer(%93) {sym_name = "buf25"} : memref<64xi32, 2> + %98 = aie.lock(%93, 0) + %99 = aie.buffer(%93) {sym_name = "buf24"} : memref<64xi32, 2> + %100 = aie.mem(%93) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%98, Acquire, 0) - AIE.dma_bd(%99 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%98, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%98, Acquire, 0) + aie.dma_bd(%99 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%98, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%96, Acquire, 0) - AIE.dma_bd(%97 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%96, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%96, Acquire, 0) + aie.dma_bd(%97 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%96, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%94, Acquire, 1) - AIE.dma_bd(%95 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%94, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%94, Acquire, 1) + aie.dma_bd(%95 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%94, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %101 = AIE.core(%93) { + %101 = aie.core(%93) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%98, Acquire, 1) - AIE.use_lock(%96, Acquire, 1) - AIE.use_lock(%94, Acquire, 0) + aie.use_lock(%98, Acquire, 1) + aie.use_lock(%96, Acquire, 1) + aie.use_lock(%94, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %99[%arg0] : memref<64xi32, 2> %201 = affine.load %97[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %95[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%94, Release, 1) - AIE.use_lock(%96, Release, 0) - AIE.use_lock(%98, Release, 0) - cf.br ^bb1 - } - %102 = AIE.tile(19, 2) - %103 = AIE.tile(19, 1) - %104 = AIE.tile(19, 0) - %105 = AIE.tile(10, 3) - %106 = AIE.lock(%105, 2) - %107 = AIE.buffer(%105) {sym_name = "buf23"} : memref<64xi32, 2> - %108 = AIE.lock(%105, 1) - %109 = AIE.buffer(%105) {sym_name = "buf22"} : memref<64xi32, 2> - %110 = AIE.lock(%105, 0) - %111 = AIE.buffer(%105) {sym_name = "buf21"} : memref<64xi32, 2> - %112 = AIE.mem(%105) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%94, Release, 1) + aie.use_lock(%96, Release, 0) + aie.use_lock(%98, Release, 0) + cf.br ^bb1 + } + %102 = aie.tile(19, 2) + %103 = aie.tile(19, 1) + %104 = aie.tile(19, 0) + %105 = aie.tile(10, 3) + %106 = aie.lock(%105, 2) + %107 = aie.buffer(%105) {sym_name = "buf23"} : memref<64xi32, 2> + %108 = aie.lock(%105, 1) + %109 = aie.buffer(%105) {sym_name = "buf22"} : memref<64xi32, 2> + %110 = aie.lock(%105, 0) + %111 = aie.buffer(%105) {sym_name = "buf21"} : memref<64xi32, 2> + %112 = aie.mem(%105) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%110, Acquire, 0) - AIE.dma_bd(%111 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%110, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%110, Acquire, 0) + aie.dma_bd(%111 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%110, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%108, Acquire, 0) - AIE.dma_bd(%109 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%108, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%108, Acquire, 0) + aie.dma_bd(%109 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%108, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%106, Acquire, 1) - AIE.dma_bd(%107 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%106, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%106, Acquire, 1) + aie.dma_bd(%107 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%106, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %113 = AIE.core(%105) { + %113 = aie.core(%105) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%110, Acquire, 1) - AIE.use_lock(%108, Acquire, 1) - AIE.use_lock(%106, Acquire, 0) + aie.use_lock(%110, Acquire, 1) + aie.use_lock(%108, Acquire, 1) + aie.use_lock(%106, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %111[%arg0] : memref<64xi32, 2> %201 = affine.load %109[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %107[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%106, Release, 1) - AIE.use_lock(%108, Release, 0) - AIE.use_lock(%110, Release, 0) - cf.br ^bb1 - } - %114 = AIE.tile(18, 2) - %115 = AIE.tile(18, 1) - %116 = AIE.tile(18, 0) - %117 = AIE.tile(9, 3) - %118 = AIE.lock(%117, 2) - %119 = AIE.buffer(%117) {sym_name = "buf20"} : memref<64xi32, 2> - %120 = AIE.lock(%117, 1) - %121 = AIE.buffer(%117) {sym_name = "buf19"} : memref<64xi32, 2> - %122 = AIE.lock(%117, 0) - %123 = AIE.buffer(%117) {sym_name = "buf18"} : memref<64xi32, 2> - %124 = AIE.mem(%117) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%106, Release, 1) + aie.use_lock(%108, Release, 0) + aie.use_lock(%110, Release, 0) + cf.br ^bb1 + } + %114 = aie.tile(18, 2) + %115 = aie.tile(18, 1) + %116 = aie.tile(18, 0) + %117 = aie.tile(9, 3) + %118 = aie.lock(%117, 2) + %119 = aie.buffer(%117) {sym_name = "buf20"} : memref<64xi32, 2> + %120 = aie.lock(%117, 1) + %121 = aie.buffer(%117) {sym_name = "buf19"} : memref<64xi32, 2> + %122 = aie.lock(%117, 0) + %123 = aie.buffer(%117) {sym_name = "buf18"} : memref<64xi32, 2> + %124 = aie.mem(%117) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%122, Acquire, 0) - AIE.dma_bd(%123 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%122, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%122, Acquire, 0) + aie.dma_bd(%123 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%122, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%120, Acquire, 0) - AIE.dma_bd(%121 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%120, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%120, Acquire, 0) + aie.dma_bd(%121 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%120, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%118, Acquire, 1) - AIE.dma_bd(%119 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%118, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%118, Acquire, 1) + aie.dma_bd(%119 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%118, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %125 = AIE.core(%117) { + %125 = aie.core(%117) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%122, Acquire, 1) - AIE.use_lock(%120, Acquire, 1) - AIE.use_lock(%118, Acquire, 0) + aie.use_lock(%122, Acquire, 1) + aie.use_lock(%120, Acquire, 1) + aie.use_lock(%118, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %123[%arg0] : memref<64xi32, 2> %201 = affine.load %121[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %119[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%118, Release, 1) - AIE.use_lock(%120, Release, 0) - AIE.use_lock(%122, Release, 0) - cf.br ^bb1 - } - %126 = AIE.tile(11, 2) - %127 = AIE.tile(11, 1) - %128 = AIE.tile(11, 0) - %129 = AIE.tile(1, 1) - %130 = AIE.tile(8, 3) - %131 = AIE.lock(%130, 2) - %132 = AIE.buffer(%130) {sym_name = "buf17"} : memref<64xi32, 2> - %133 = AIE.lock(%130, 1) - %134 = AIE.buffer(%130) {sym_name = "buf16"} : memref<64xi32, 2> - %135 = AIE.lock(%130, 0) - %136 = AIE.buffer(%130) {sym_name = "buf15"} : memref<64xi32, 2> - %137 = AIE.mem(%130) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%118, Release, 1) + aie.use_lock(%120, Release, 0) + aie.use_lock(%122, Release, 0) + cf.br ^bb1 + } + %126 = aie.tile(11, 2) + %127 = aie.tile(11, 1) + %128 = aie.tile(11, 0) + %129 = aie.tile(1, 1) + %130 = aie.tile(8, 3) + %131 = aie.lock(%130, 2) + %132 = aie.buffer(%130) {sym_name = "buf17"} : memref<64xi32, 2> + %133 = aie.lock(%130, 1) + %134 = aie.buffer(%130) {sym_name = "buf16"} : memref<64xi32, 2> + %135 = aie.lock(%130, 0) + %136 = aie.buffer(%130) {sym_name = "buf15"} : memref<64xi32, 2> + %137 = aie.mem(%130) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%135, Acquire, 0) - AIE.dma_bd(%136 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%135, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%135, Acquire, 0) + aie.dma_bd(%136 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%135, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%133, Acquire, 0) - AIE.dma_bd(%134 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%133, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%133, Acquire, 0) + aie.dma_bd(%134 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%133, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%131, Acquire, 1) - AIE.dma_bd(%132 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%131, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%131, Acquire, 1) + aie.dma_bd(%132 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%131, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %138 = AIE.core(%130) { + %138 = aie.core(%130) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%135, Acquire, 1) - AIE.use_lock(%133, Acquire, 1) - AIE.use_lock(%131, Acquire, 0) + aie.use_lock(%135, Acquire, 1) + aie.use_lock(%133, Acquire, 1) + aie.use_lock(%131, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %136[%arg0] : memref<64xi32, 2> %201 = affine.load %134[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %132[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%131, Release, 1) - AIE.use_lock(%133, Release, 0) - AIE.use_lock(%135, Release, 0) - cf.br ^bb1 - } - %139 = AIE.tile(10, 1) - %140 = AIE.tile(10, 0) - %141 = AIE.tile(0, 1) - %142 = AIE.tile(7, 3) - %143 = AIE.lock(%142, 2) - %144 = AIE.buffer(%142) {sym_name = "buf14"} : memref<64xi32, 2> - %145 = AIE.lock(%142, 1) - %146 = AIE.buffer(%142) {sym_name = "buf13"} : memref<64xi32, 2> - %147 = AIE.lock(%142, 0) - %148 = AIE.buffer(%142) {sym_name = "buf12"} : memref<64xi32, 2> - %149 = AIE.mem(%142) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%131, Release, 1) + aie.use_lock(%133, Release, 0) + aie.use_lock(%135, Release, 0) + cf.br ^bb1 + } + %139 = aie.tile(10, 1) + %140 = aie.tile(10, 0) + %141 = aie.tile(0, 1) + %142 = aie.tile(7, 3) + %143 = aie.lock(%142, 2) + %144 = aie.buffer(%142) {sym_name = "buf14"} : memref<64xi32, 2> + %145 = aie.lock(%142, 1) + %146 = aie.buffer(%142) {sym_name = "buf13"} : memref<64xi32, 2> + %147 = aie.lock(%142, 0) + %148 = aie.buffer(%142) {sym_name = "buf12"} : memref<64xi32, 2> + %149 = aie.mem(%142) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%147, Acquire, 0) - AIE.dma_bd(%148 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%147, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%147, Acquire, 0) + aie.dma_bd(%148 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%147, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%145, Acquire, 0) - AIE.dma_bd(%146 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%145, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%145, Acquire, 0) + aie.dma_bd(%146 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%145, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%143, Acquire, 1) - AIE.dma_bd(%144 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%143, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%143, Acquire, 1) + aie.dma_bd(%144 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%143, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %150 = AIE.core(%142) { + %150 = aie.core(%142) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%147, Acquire, 1) - AIE.use_lock(%145, Acquire, 1) - AIE.use_lock(%143, Acquire, 0) + aie.use_lock(%147, Acquire, 1) + aie.use_lock(%145, Acquire, 1) + aie.use_lock(%143, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %148[%arg0] : memref<64xi32, 2> %201 = affine.load %146[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %144[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%143, Release, 1) - AIE.use_lock(%145, Release, 0) - AIE.use_lock(%147, Release, 0) - cf.br ^bb1 - } - %151 = AIE.tile(7, 1) - %152 = AIE.tile(7, 0) - %153 = AIE.tile(10, 2) - %154 = AIE.lock(%153, 2) - %155 = AIE.buffer(%153) {sym_name = "buf11"} : memref<64xi32, 2> - %156 = AIE.lock(%153, 1) - %157 = AIE.buffer(%153) {sym_name = "buf10"} : memref<64xi32, 2> - %158 = AIE.lock(%153, 0) - %159 = AIE.buffer(%153) {sym_name = "buf9"} : memref<64xi32, 2> - %160 = AIE.mem(%153) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%143, Release, 1) + aie.use_lock(%145, Release, 0) + aie.use_lock(%147, Release, 0) + cf.br ^bb1 + } + %151 = aie.tile(7, 1) + %152 = aie.tile(7, 0) + %153 = aie.tile(10, 2) + %154 = aie.lock(%153, 2) + %155 = aie.buffer(%153) {sym_name = "buf11"} : memref<64xi32, 2> + %156 = aie.lock(%153, 1) + %157 = aie.buffer(%153) {sym_name = "buf10"} : memref<64xi32, 2> + %158 = aie.lock(%153, 0) + %159 = aie.buffer(%153) {sym_name = "buf9"} : memref<64xi32, 2> + %160 = aie.mem(%153) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%158, Acquire, 0) - AIE.dma_bd(%159 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%158, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%158, Acquire, 0) + aie.dma_bd(%159 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%158, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%156, Acquire, 0) - AIE.dma_bd(%157 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%156, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%156, Acquire, 0) + aie.dma_bd(%157 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%156, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%154, Acquire, 1) - AIE.dma_bd(%155 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%154, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%154, Acquire, 1) + aie.dma_bd(%155 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%154, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %161 = AIE.core(%153) { + %161 = aie.core(%153) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%158, Acquire, 1) - AIE.use_lock(%156, Acquire, 1) - AIE.use_lock(%154, Acquire, 0) + aie.use_lock(%158, Acquire, 1) + aie.use_lock(%156, Acquire, 1) + aie.use_lock(%154, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %159[%arg0] : memref<64xi32, 2> %201 = affine.load %157[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %155[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%154, Release, 1) - AIE.use_lock(%156, Release, 0) - AIE.use_lock(%158, Release, 0) - cf.br ^bb1 - } - %162 = AIE.tile(6, 2) - %163 = AIE.tile(6, 1) - %164 = AIE.tile(6, 0) - %165 = AIE.tile(9, 2) - %166 = AIE.lock(%165, 2) - %167 = AIE.buffer(%165) {sym_name = "buf8"} : memref<64xi32, 2> - %168 = AIE.lock(%165, 1) - %169 = AIE.buffer(%165) {sym_name = "buf7"} : memref<64xi32, 2> - %170 = AIE.lock(%165, 0) - %171 = AIE.buffer(%165) {sym_name = "buf6"} : memref<64xi32, 2> - %172 = AIE.mem(%165) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%154, Release, 1) + aie.use_lock(%156, Release, 0) + aie.use_lock(%158, Release, 0) + cf.br ^bb1 + } + %162 = aie.tile(6, 2) + %163 = aie.tile(6, 1) + %164 = aie.tile(6, 0) + %165 = aie.tile(9, 2) + %166 = aie.lock(%165, 2) + %167 = aie.buffer(%165) {sym_name = "buf8"} : memref<64xi32, 2> + %168 = aie.lock(%165, 1) + %169 = aie.buffer(%165) {sym_name = "buf7"} : memref<64xi32, 2> + %170 = aie.lock(%165, 0) + %171 = aie.buffer(%165) {sym_name = "buf6"} : memref<64xi32, 2> + %172 = aie.mem(%165) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%170, Acquire, 0) - AIE.dma_bd(%171 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%170, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%170, Acquire, 0) + aie.dma_bd(%171 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%170, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%168, Acquire, 0) - AIE.dma_bd(%169 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%168, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%168, Acquire, 0) + aie.dma_bd(%169 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%168, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%166, Acquire, 1) - AIE.dma_bd(%167 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%166, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%166, Acquire, 1) + aie.dma_bd(%167 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%166, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %173 = AIE.core(%165) { + %173 = aie.core(%165) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%170, Acquire, 1) - AIE.use_lock(%168, Acquire, 1) - AIE.use_lock(%166, Acquire, 0) + aie.use_lock(%170, Acquire, 1) + aie.use_lock(%168, Acquire, 1) + aie.use_lock(%166, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %171[%arg0] : memref<64xi32, 2> %201 = affine.load %169[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %167[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%166, Release, 1) - AIE.use_lock(%168, Release, 0) - AIE.use_lock(%170, Release, 0) - cf.br ^bb1 - } - %174 = AIE.tile(3, 2) - %175 = AIE.tile(3, 1) - %176 = AIE.tile(3, 0) - %177 = AIE.tile(1, 0) - %178 = AIE.tile(8, 2) - %179 = AIE.lock(%178, 2) - %180 = AIE.buffer(%178) {sym_name = "buf5"} : memref<64xi32, 2> - %181 = AIE.lock(%178, 1) - %182 = AIE.buffer(%178) {sym_name = "buf4"} : memref<64xi32, 2> - %183 = AIE.lock(%178, 0) - %184 = AIE.buffer(%178) {sym_name = "buf3"} : memref<64xi32, 2> - %185 = AIE.mem(%178) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%166, Release, 1) + aie.use_lock(%168, Release, 0) + aie.use_lock(%170, Release, 0) + cf.br ^bb1 + } + %174 = aie.tile(3, 2) + %175 = aie.tile(3, 1) + %176 = aie.tile(3, 0) + %177 = aie.tile(1, 0) + %178 = aie.tile(8, 2) + %179 = aie.lock(%178, 2) + %180 = aie.buffer(%178) {sym_name = "buf5"} : memref<64xi32, 2> + %181 = aie.lock(%178, 1) + %182 = aie.buffer(%178) {sym_name = "buf4"} : memref<64xi32, 2> + %183 = aie.lock(%178, 0) + %184 = aie.buffer(%178) {sym_name = "buf3"} : memref<64xi32, 2> + %185 = aie.mem(%178) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%183, Acquire, 0) - AIE.dma_bd(%184 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%183, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%183, Acquire, 0) + aie.dma_bd(%184 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%183, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%181, Acquire, 0) - AIE.dma_bd(%182 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%181, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%181, Acquire, 0) + aie.dma_bd(%182 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%181, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%179, Acquire, 1) - AIE.dma_bd(%180 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%179, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%179, Acquire, 1) + aie.dma_bd(%180 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%179, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %186 = AIE.core(%178) { + %186 = aie.core(%178) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%183, Acquire, 1) - AIE.use_lock(%181, Acquire, 1) - AIE.use_lock(%179, Acquire, 0) + aie.use_lock(%183, Acquire, 1) + aie.use_lock(%181, Acquire, 1) + aie.use_lock(%179, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %184[%arg0] : memref<64xi32, 2> %201 = affine.load %182[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %180[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%179, Release, 1) - AIE.use_lock(%181, Release, 0) - AIE.use_lock(%183, Release, 0) - cf.br ^bb1 - } - %187 = AIE.tile(2, 2) - %188 = AIE.tile(2, 1) - %189 = AIE.tile(2, 0) - %190 = AIE.tile(0, 0) - %191 = AIE.tile(7, 2) - %192 = AIE.lock(%191, 2) - %193 = AIE.buffer(%191) {sym_name = "buf2"} : memref<64xi32, 2> - %194 = AIE.lock(%191, 1) - %195 = AIE.buffer(%191) {sym_name = "buf1"} : memref<64xi32, 2> - %196 = AIE.lock(%191, 0) - %197 = AIE.buffer(%191) {sym_name = "buf0"} : memref<64xi32, 2> - %198 = AIE.mem(%191) { - %200 = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) + aie.use_lock(%179, Release, 1) + aie.use_lock(%181, Release, 0) + aie.use_lock(%183, Release, 0) + cf.br ^bb1 + } + %187 = aie.tile(2, 2) + %188 = aie.tile(2, 1) + %189 = aie.tile(2, 0) + %190 = aie.tile(0, 0) + %191 = aie.tile(7, 2) + %192 = aie.lock(%191, 2) + %193 = aie.buffer(%191) {sym_name = "buf2"} : memref<64xi32, 2> + %194 = aie.lock(%191, 1) + %195 = aie.buffer(%191) {sym_name = "buf1"} : memref<64xi32, 2> + %196 = aie.lock(%191, 0) + %197 = aie.buffer(%191) {sym_name = "buf0"} : memref<64xi32, 2> + %198 = aie.mem(%191) { + %200 = aie.dma_start(S2MM, 0, ^bb1, ^bb4) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%196, Acquire, 0) - AIE.dma_bd(%197 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%196, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%196, Acquire, 0) + aie.dma_bd(%197 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%196, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb4 - %201 = AIE.dma_start(S2MM, 1, ^bb3, ^bb6) + %201 = aie.dma_start(S2MM, 1, ^bb3, ^bb6) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%194, Acquire, 0) - AIE.dma_bd(%195 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%194, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%194, Acquire, 0) + aie.dma_bd(%195 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%194, Release, 1) + aie.next_bd ^bb3 ^bb4: // pred: ^bb0 - %202 = AIE.dma_start(MM2S, 0, ^bb5, ^bb2) + %202 = aie.dma_start(MM2S, 0, ^bb5, ^bb2) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%192, Acquire, 1) - AIE.dma_bd(%193 : memref<64xi32, 2>, 0, 64) - AIE.use_lock(%192, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%192, Acquire, 1) + aie.dma_bd(%193 : memref<64xi32, 2>, 0, 64) + aie.use_lock(%192, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb2 - AIE.end + aie.end } - %199 = AIE.core(%191) { + %199 = aie.core(%191) { cf.br ^bb1 ^bb1: // 2 preds: ^bb0, ^bb2 cf.br ^bb2 ^bb2: // pred: ^bb1 - AIE.use_lock(%196, Acquire, 1) - AIE.use_lock(%194, Acquire, 1) - AIE.use_lock(%192, Acquire, 0) + aie.use_lock(%196, Acquire, 1) + aie.use_lock(%194, Acquire, 1) + aie.use_lock(%192, Acquire, 0) affine.for %arg0 = 0 to 64 { %200 = affine.load %197[%arg0] : memref<64xi32, 2> %201 = affine.load %195[%arg0] : memref<64xi32, 2> %202 = arith.muli %200, %201 : i32 affine.store %202, %193[%arg0] : memref<64xi32, 2> } - AIE.use_lock(%192, Release, 1) - AIE.use_lock(%194, Release, 0) - AIE.use_lock(%196, Release, 0) - cf.br ^bb1 - } - AIE.flow(%189, DMA : 0, %191, DMA : 0) - AIE.flow(%189, DMA : 1, %191, DMA : 1) - AIE.flow(%191, DMA : 0, %189, DMA : 0) - AIE.flow(%176, DMA : 0, %178, DMA : 0) - AIE.flow(%176, DMA : 1, %178, DMA : 1) - AIE.flow(%178, DMA : 0, %189, DMA : 1) - AIE.flow(%164, DMA : 0, %165, DMA : 0) - AIE.flow(%164, DMA : 1, %165, DMA : 1) - AIE.flow(%165, DMA : 0, %176, DMA : 0) - AIE.flow(%152, DMA : 0, %153, DMA : 0) - AIE.flow(%152, DMA : 1, %153, DMA : 1) - AIE.flow(%153, DMA : 0, %176, DMA : 1) - AIE.flow(%140, DMA : 0, %142, DMA : 0) - AIE.flow(%140, DMA : 1, %142, DMA : 1) - AIE.flow(%142, DMA : 0, %164, DMA : 0) - AIE.flow(%128, DMA : 0, %130, DMA : 0) - AIE.flow(%128, DMA : 1, %130, DMA : 1) - AIE.flow(%130, DMA : 0, %164, DMA : 1) - AIE.flow(%116, DMA : 0, %117, DMA : 0) - AIE.flow(%116, DMA : 1, %117, DMA : 1) - AIE.flow(%117, DMA : 0, %152, DMA : 0) - AIE.flow(%104, DMA : 0, %105, DMA : 0) - AIE.flow(%104, DMA : 1, %105, DMA : 1) - AIE.flow(%105, DMA : 0, %152, DMA : 1) - AIE.flow(%91, DMA : 0, %93, DMA : 0) - AIE.flow(%91, DMA : 1, %93, DMA : 1) - AIE.flow(%93, DMA : 0, %140, DMA : 0) - AIE.flow(%78, DMA : 0, %80, DMA : 0) - AIE.flow(%78, DMA : 1, %80, DMA : 1) - AIE.flow(%80, DMA : 0, %140, DMA : 1) - AIE.flow(%66, DMA : 0, %67, DMA : 0) - AIE.flow(%66, DMA : 1, %67, DMA : 1) - AIE.flow(%67, DMA : 0, %128, DMA : 0) - AIE.flow(%54, DMA : 0, %55, DMA : 0) - AIE.flow(%54, DMA : 1, %55, DMA : 1) - AIE.flow(%55, DMA : 0, %128, DMA : 1) - AIE.flow(%41, DMA : 0, %43, DMA : 0) - AIE.flow(%41, DMA : 1, %43, DMA : 1) - AIE.flow(%43, DMA : 0, %116, DMA : 0) - AIE.flow(%28, DMA : 0, %30, DMA : 0) - AIE.flow(%28, DMA : 1, %30, DMA : 1) - AIE.flow(%30, DMA : 0, %116, DMA : 1) - AIE.flow(%15, DMA : 0, %17, DMA : 0) - AIE.flow(%15, DMA : 1, %17, DMA : 1) - AIE.flow(%17, DMA : 0, %104, DMA : 0) - AIE.flow(%2, DMA : 0, %4, DMA : 0) - AIE.flow(%2, DMA : 1, %4, DMA : 1) - AIE.flow(%4, DMA : 0, %104, DMA : 1) + aie.use_lock(%192, Release, 1) + aie.use_lock(%194, Release, 0) + aie.use_lock(%196, Release, 0) + cf.br ^bb1 + } + aie.flow(%189, DMA : 0, %191, DMA : 0) + aie.flow(%189, DMA : 1, %191, DMA : 1) + aie.flow(%191, DMA : 0, %189, DMA : 0) + aie.flow(%176, DMA : 0, %178, DMA : 0) + aie.flow(%176, DMA : 1, %178, DMA : 1) + aie.flow(%178, DMA : 0, %189, DMA : 1) + aie.flow(%164, DMA : 0, %165, DMA : 0) + aie.flow(%164, DMA : 1, %165, DMA : 1) + aie.flow(%165, DMA : 0, %176, DMA : 0) + aie.flow(%152, DMA : 0, %153, DMA : 0) + aie.flow(%152, DMA : 1, %153, DMA : 1) + aie.flow(%153, DMA : 0, %176, DMA : 1) + aie.flow(%140, DMA : 0, %142, DMA : 0) + aie.flow(%140, DMA : 1, %142, DMA : 1) + aie.flow(%142, DMA : 0, %164, DMA : 0) + aie.flow(%128, DMA : 0, %130, DMA : 0) + aie.flow(%128, DMA : 1, %130, DMA : 1) + aie.flow(%130, DMA : 0, %164, DMA : 1) + aie.flow(%116, DMA : 0, %117, DMA : 0) + aie.flow(%116, DMA : 1, %117, DMA : 1) + aie.flow(%117, DMA : 0, %152, DMA : 0) + aie.flow(%104, DMA : 0, %105, DMA : 0) + aie.flow(%104, DMA : 1, %105, DMA : 1) + aie.flow(%105, DMA : 0, %152, DMA : 1) + aie.flow(%91, DMA : 0, %93, DMA : 0) + aie.flow(%91, DMA : 1, %93, DMA : 1) + aie.flow(%93, DMA : 0, %140, DMA : 0) + aie.flow(%78, DMA : 0, %80, DMA : 0) + aie.flow(%78, DMA : 1, %80, DMA : 1) + aie.flow(%80, DMA : 0, %140, DMA : 1) + aie.flow(%66, DMA : 0, %67, DMA : 0) + aie.flow(%66, DMA : 1, %67, DMA : 1) + aie.flow(%67, DMA : 0, %128, DMA : 0) + aie.flow(%54, DMA : 0, %55, DMA : 0) + aie.flow(%54, DMA : 1, %55, DMA : 1) + aie.flow(%55, DMA : 0, %128, DMA : 1) + aie.flow(%41, DMA : 0, %43, DMA : 0) + aie.flow(%41, DMA : 1, %43, DMA : 1) + aie.flow(%43, DMA : 0, %116, DMA : 0) + aie.flow(%28, DMA : 0, %30, DMA : 0) + aie.flow(%28, DMA : 1, %30, DMA : 1) + aie.flow(%30, DMA : 0, %116, DMA : 1) + aie.flow(%15, DMA : 0, %17, DMA : 0) + aie.flow(%15, DMA : 1, %17, DMA : 1) + aie.flow(%17, DMA : 0, %104, DMA : 0) + aie.flow(%2, DMA : 0, %4, DMA : 0) + aie.flow(%2, DMA : 1, %4, DMA : 1) + aie.flow(%4, DMA : 0, %104, DMA : 1) } } diff --git a/test/create-locks/test_lock0.mlir b/test/create-locks/test_lock0.mlir index d4bda3182d..384bbc49e3 100644 --- a/test/create-locks/test_lock0.mlir +++ b/test/create-locks/test_lock0.mlir @@ -10,17 +10,17 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_2:.*]] = AIE.lock(%[[VAL_1]], 0) -// CHECK: %[[VAL_5:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_2]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_2]], Release, 1) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_2:.*]] = aie.lock(%[[VAL_1]], 0) +// CHECK: %[[VAL_5:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_2]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_2]], Release, 1) // CHECK: } -// CHECK: %[[VAL_6:.*]] = AIE.core(%[[VAL_1]]) { -// CHECK: AIE.use_lock(%[[VAL_2]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_2]], Release, 0) +// CHECK: %[[VAL_6:.*]] = aie.core(%[[VAL_1]]) { +// CHECK: aie.use_lock(%[[VAL_2]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_2]], Release, 0) // CHECK: } // CHECK: } @@ -28,30 +28,30 @@ // Lower UseTokenOp to UseLockOp // Tile-Tile module @test_lock0 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %t23 = AIE.tile(2, 3) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %t23 = aie.tile(2, 3) - AIEX.token(0) {sym_name = "token0"} + aiex.token(0) {sym_name = "token0"} - %m33 = AIE.mem(%t33) { - AIE.end + %m33 = aie.mem(%t33) { + aie.end } - %m23 = AIE.mem(%t23) { - AIE.end + %m23 = aie.mem(%t23) { + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aie.end } - %c23 = AIE.core(%t23) { - AIEX.useToken @token0(Acquire, 1) - AIEX.useToken @token0(Release, 2) - AIE.end + %c23 = aie.core(%t23) { + aiex.useToken @token0(Acquire, 1) + aiex.useToken @token0(Release, 2) + aie.end } } } diff --git a/test/create-locks/test_lock1.mlir b/test/create-locks/test_lock1.mlir index 7b3b0fd977..e0998f4fba 100644 --- a/test/create-locks/test_lock1.mlir +++ b/test/create-locks/test_lock1.mlir @@ -10,26 +10,26 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_1:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_2]], 0) -// CHECK: %[[VAL_4:.*]] = AIE.tile(4, 3) -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: %[[VAL_8:.*]] = AIE.core(%[[VAL_2]]) { -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 1) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_1:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_2]], 0) +// CHECK: %[[VAL_4:.*]] = aie.tile(4, 3) +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: %[[VAL_8:.*]] = aie.core(%[[VAL_2]]) { +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 1) // CHECK: } -// CHECK: %[[VAL_9:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 1) +// CHECK: %[[VAL_9:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 1) // CHECK: } -// CHECK: %[[VAL_10:.*]] = AIE.core(%[[VAL_4]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 0) +// CHECK: %[[VAL_10:.*]] = aie.core(%[[VAL_4]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 0) // CHECK: } // CHECK: } @@ -37,41 +37,41 @@ // Lower UseTokenOp to UseLockOp // Tile-Tile-Tile module @test_lock1 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %t23 = AIE.tile(2, 3) - %t43 = AIE.tile(4, 3) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %t23 = aie.tile(2, 3) + %t43 = aie.tile(4, 3) - AIEX.token(0) {sym_name = "token0"} + aiex.token(0) {sym_name = "token0"} - %m33 = AIE.mem(%t33) { - AIE.end + %m33 = aie.mem(%t33) { + aie.end } - %m23 = AIE.mem(%t23) { - AIE.end + %m23 = aie.mem(%t23) { + aie.end } - %m43 = AIE.mem(%t43) { - AIE.end + %m43 = aie.mem(%t43) { + aie.end } - %c23 = AIE.core(%t23) { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIE.end + %c23 = aie.core(%t23) { + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token0(Acquire, 1) - AIEX.useToken @token0(Release, 2) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token0(Acquire, 1) + aiex.useToken @token0(Release, 2) + aie.end } - %c43 = AIE.core(%t43) { - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIE.end + %c43 = aie.core(%t43) { + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aie.end } } } diff --git a/test/create-locks/test_lock2.mlir b/test/create-locks/test_lock2.mlir index 26c0820b8e..ccedfba220 100644 --- a/test/create-locks/test_lock2.mlir +++ b/test/create-locks/test_lock2.mlir @@ -10,45 +10,45 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_1:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_2]], 0) -// CHECK: %[[VAL_4:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_4]], 0) -// CHECK: %[[VAL_6:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_7:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_7]], 0) -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: AIEX.token(0) {sym_name = "token1"} -// CHECK: AIEX.token(0) {sym_name = "token2"} -// CHECK: AIEX.token(0) {sym_name = "token3"} -// CHECK: %[[VAL_14:.*]] = AIE.core(%[[VAL_2]]) { -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 0) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_1:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_2]], 0) +// CHECK: %[[VAL_4:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_4]], 0) +// CHECK: %[[VAL_6:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_7:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_7]], 0) +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: aiex.token(0) {sym_name = "token1"} +// CHECK: aiex.token(0) {sym_name = "token2"} +// CHECK: aiex.token(0) {sym_name = "token3"} +// CHECK: %[[VAL_14:.*]] = aie.core(%[[VAL_2]]) { +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 0) // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) +// CHECK: %[[VAL_15:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.core(%[[VAL_4]]) { -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) +// CHECK: %[[VAL_16:.*]] = aie.core(%[[VAL_4]]) { +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_6]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 0) +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_6]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 0) // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_7]]) { -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 0) +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_7]]) { +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 0) // CHECK: } // CHECK: } @@ -61,72 +61,72 @@ // Tile // single producer (tile(3, 3)), multiple consumers module @test_lock2 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %t23 = AIE.tile(2, 3) - %t34 = AIE.tile(3, 4) - %t43 = AIE.tile(4, 3) - %t32 = AIE.tile(3, 2) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %t23 = aie.tile(2, 3) + %t34 = aie.tile(3, 4) + %t43 = aie.tile(4, 3) + %t32 = aie.tile(3, 2) - AIEX.token(0) {sym_name = "token0"} - AIEX.token(0) {sym_name = "token1"} - AIEX.token(0) {sym_name = "token2"} - AIEX.token(0) {sym_name = "token3"} + aiex.token(0) {sym_name = "token0"} + aiex.token(0) {sym_name = "token1"} + aiex.token(0) {sym_name = "token2"} + aiex.token(0) {sym_name = "token3"} - %m33 = AIE.mem(%t33) { - AIE.end + %m33 = aie.mem(%t33) { + aie.end } - %m23 = AIE.mem(%t23) { - AIE.end + %m23 = aie.mem(%t23) { + aie.end } - %m34 = AIE.mem(%t34) { - AIE.end + %m34 = aie.mem(%t34) { + aie.end } - %m43 = AIE.mem(%t43) { - AIE.end + %m43 = aie.mem(%t43) { + aie.end } - %m32 = AIE.mem(%t32) { - AIE.end + %m32 = aie.mem(%t32) { + aie.end } - %c23 = AIE.core(%t23) { - AIEX.useToken @token0(Acquire, 1) - AIEX.useToken @token0(Release, 2) - AIE.end + %c23 = aie.core(%t23) { + aiex.useToken @token0(Acquire, 1) + aiex.useToken @token0(Release, 2) + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token3(Acquire, 0) - AIEX.useToken @token2(Acquire, 0) - AIEX.useToken @token1(Acquire, 0) - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIEX.useToken @token1(Release, 1) - AIEX.useToken @token2(Release, 1) - AIEX.useToken @token3(Release, 1) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token3(Acquire, 0) + aiex.useToken @token2(Acquire, 0) + aiex.useToken @token1(Acquire, 0) + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aiex.useToken @token1(Release, 1) + aiex.useToken @token2(Release, 1) + aiex.useToken @token3(Release, 1) + aie.end } - %c34 = AIE.core(%t34) { - AIEX.useToken @token1(Acquire, 1) - AIEX.useToken @token1(Release, 2) - AIE.end + %c34 = aie.core(%t34) { + aiex.useToken @token1(Acquire, 1) + aiex.useToken @token1(Release, 2) + aie.end } - %c43 = AIE.core(%t43) { - AIEX.useToken @token2(Acquire, 1) - AIEX.useToken @token2(Release, 2) - AIE.end + %c43 = aie.core(%t43) { + aiex.useToken @token2(Acquire, 1) + aiex.useToken @token2(Release, 2) + aie.end } - %c32 = AIE.core(%t32) { - AIEX.useToken @token3(Acquire, 1) - AIEX.useToken @token3(Release, 2) - AIE.end + %c32 = aie.core(%t32) { + aiex.useToken @token3(Acquire, 1) + aiex.useToken @token3(Release, 2) + aie.end } } } diff --git a/test/create-locks/test_lock3.mlir b/test/create-locks/test_lock3.mlir index ad70586044..dc71cfc807 100644 --- a/test/create-locks/test_lock3.mlir +++ b/test/create-locks/test_lock3.mlir @@ -10,45 +10,45 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_1:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_2]], 0) -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_2]]) : memref<256xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: %[[VAL_6:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_7:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_1:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_2]], 0) +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_2]]) : memref<256xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: %[[VAL_6:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_7:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_8:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_9:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_8:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_9:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_10:.*]] = AIE.core(%[[VAL_2]]) { -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_10:.*]] = aie.core(%[[VAL_2]]) { +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_11:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 0) -// CHECK: AIE.end +// CHECK: %[[VAL_11:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_2]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: aie.flow(%[[VAL_2]], DMA : 0, %[[VAL_0]], DMA : 0) // CHECK: } // Generate LockOp in the top-level module @@ -56,42 +56,42 @@ // [Core-Mem] ---> [Core-Mem] (non-neighboring tiles) // single producer, single consumer module @test_lock3 { - AIE.device(xcvc1902) { - %t44 = AIE.tile(4, 4) - %t33 = AIE.tile(3, 3) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf44 = AIE.buffer(%t44) : memref<256xi32> - AIEX.token(0) {sym_name = "token0"} - %m33 = AIE.mem(%t33) { - %dmaSt = AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.device(xcvc1902) { + %t44 = aie.tile(4, 4) + %t33 = aie.tile(3, 3) + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf44 = aie.buffer(%t44) : memref<256xi32> + aiex.token(0) {sym_name = "token0"} + %m33 = aie.mem(%t33) { + %dmaSt = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m44 = AIE.mem(%t44) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m44 = aie.mem(%t44) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf44 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf44 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aie.end } - %c44 = AIE.core(%t44) { - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIE.end + %c44 = aie.core(%t44) { + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aie.end } - AIE.flow(%t33, DMA : 0, %t44, DMA : 0) + aie.flow(%t33, DMA : 0, %t44, DMA : 0) } } diff --git a/test/create-locks/test_lock4.mlir b/test/create-locks/test_lock4.mlir index d9389d3118..6d9f8111b0 100644 --- a/test/create-locks/test_lock4.mlir +++ b/test/create-locks/test_lock4.mlir @@ -10,149 +10,149 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(5, 5) -// CHECK: %[[VAL_1:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_2]], 1) -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_2]], 0) -// CHECK: %[[VAL_5:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_5]], 0) -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_5]]) : memref<256xi32> -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_2]]) : memref<256xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: %[[VAL_10:.*]] = AIE.mem(%[[VAL_5]]) { -// CHECK: %[[VAL_11:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(5, 5) +// CHECK: %[[VAL_1:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_2]], 1) +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_2]], 0) +// CHECK: %[[VAL_5:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_5]], 0) +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_5]]) : memref<256xi32> +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_2]]) : memref<256xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: %[[VAL_10:.*]] = aie.mem(%[[VAL_5]]) { +// CHECK: %[[VAL_11:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_13:.*]] = AIE.dma_start(S2MM, 0, ^bb2, ^bb1) +// CHECK: %[[VAL_12:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_13:.*]] = aie.dma_start(S2MM, 0, ^bb2, ^bb1) // CHECK: ^bb1: -// CHECK: %[[VAL_14:.*]] = AIE.dma_start(MM2S, 0, ^bb3, ^bb4) +// CHECK: %[[VAL_14:.*]] = aie.dma_start(MM2S, 0, ^bb3, ^bb4) // CHECK: ^bb2: -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb3: -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 0) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 0) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_16:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_15:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_16:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_5]]) { -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_5]]) { +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_2]]) { -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_2]]) { +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 0) -// CHECK: AIE.end +// CHECK: %[[VAL_19:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_5]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_2]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: aie.flow(%[[VAL_5]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_2]], DMA : 0, %[[VAL_0]], DMA : 0) // CHECK: } // Generate LockOp in the top-level module // Lower UseTokenOp to UseLockOp // [Core-Mem] ---> [Core-Mem] ---> [Core-Mem] (non-neighboring tiles) module @test_lock4 { - AIE.device(xcvc1902) { - %t55 = AIE.tile(5, 5) - %t44 = AIE.tile(4, 4) - %t33 = AIE.tile(3, 3) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf44 = AIE.buffer(%t44) : memref<256xi32> - %buf55 = AIE.buffer(%t55) : memref<256xi32> + aie.device(xcvc1902) { + %t55 = aie.tile(5, 5) + %t44 = aie.tile(4, 4) + %t33 = aie.tile(3, 3) + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf44 = aie.buffer(%t44) : memref<256xi32> + %buf55 = aie.buffer(%t55) : memref<256xi32> - AIEX.token(0) {sym_name = "token0"} + aiex.token(0) {sym_name = "token0"} - %m33 = AIE.mem(%t33) { - %dmaSt = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %m33 = aie.mem(%t33) { + %dmaSt = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m44 = AIE.mem(%t44) { - %dmaSt0 = AIE.dma_start(S2MM, 0, ^bd0, ^dma0) + %m44 = aie.mem(%t44) { + %dmaSt0 = aie.dma_start(S2MM, 0, ^bd0, ^dma0) ^dma0: - %dmaSt1 = AIE.dma_start(MM2S, 0, ^bd1, ^end) + %dmaSt1 = aie.dma_start(MM2S, 0, ^bd1, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf44 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf44 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^bd1: - AIEX.useToken @token0(Acquire, 3) - AIE.dma_bd(%buf44 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 4) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 3) + aie.dma_bd(%buf44 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 4) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m55 = AIE.mem(%t55) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m55 = aie.mem(%t55) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 3) - AIE.dma_bd(%buf55 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 4) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 3) + aie.dma_bd(%buf55 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 4) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aie.end } - %c44 = AIE.core(%t44) { - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIE.end + %c44 = aie.core(%t44) { + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aie.end } - %c55 = AIE.core(%t55) { - AIEX.useToken @token0(Acquire, 4) - AIEX.useToken @token0(Release, 5) - AIE.end + %c55 = aie.core(%t55) { + aiex.useToken @token0(Acquire, 4) + aiex.useToken @token0(Release, 5) + aie.end } - AIE.flow(%t33, DMA : 0, %t44, DMA : 0) - AIE.flow(%t44, DMA : 0, %t55, DMA : 0) + aie.flow(%t33, DMA : 0, %t44, DMA : 0) + aie.flow(%t44, DMA : 0, %t55, DMA : 0) } } diff --git a/test/create-locks/test_lock5.mlir b/test/create-locks/test_lock5.mlir index c68c4b8d1e..aa86769b14 100644 --- a/test/create-locks/test_lock5.mlir +++ b/test/create-locks/test_lock5.mlir @@ -10,56 +10,56 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(5, 5) -// CHECK: %[[VAL_1:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_2:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_2]], 0) -// CHECK: %[[VAL_4:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_4]], 1) -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_4]], 0) -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_4]]) : memref<256xi32> -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_2]]) : memref<256xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_10:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 0) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(5, 5) +// CHECK: %[[VAL_1:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_2:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_2]], 0) +// CHECK: %[[VAL_4:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_4]], 1) +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_4]], 0) +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_4]]) : memref<256xi32> +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_2]]) : memref<256xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_10:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 0) // CHECK: } -// CHECK: %[[VAL_13:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_13:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_15:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_4]]) { -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_4]]) { +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_2]]) { -// CHECK: AIE.use_lock(%[[VAL_3]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 0) -// CHECK: AIE.end +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_2]]) { +// CHECK: aie.use_lock(%[[VAL_3]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 0) -// CHECK: AIE.end +// CHECK: %[[VAL_19:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_4]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_4]], DMA : 1, %[[VAL_0]], DMA : 0) +// CHECK: aie.flow(%[[VAL_4]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_4]], DMA : 1, %[[VAL_0]], DMA : 0) // CHECK: } // Generate LockOp in the top-level module @@ -68,79 +68,79 @@ // |---------> [Core-Mem] // single producer, multipler consumers module @test_lock5 { - AIE.device(xcvc1902) { - %t55 = AIE.tile(5, 5) - %t44 = AIE.tile(4, 4) - %t33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %t55 = aie.tile(5, 5) + %t44 = aie.tile(4, 4) + %t33 = aie.tile(3, 3) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf44 = AIE.buffer(%t44) : memref<256xi32> - %buf55 = AIE.buffer(%t55) : memref<256xi32> + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf44 = aie.buffer(%t44) : memref<256xi32> + %buf55 = aie.buffer(%t55) : memref<256xi32> - AIEX.token(0) {sym_name = "token0"} - AIEX.token(0) {sym_name = "token1"} + aiex.token(0) {sym_name = "token0"} + aiex.token(0) {sym_name = "token1"} - %m33 = AIE.mem(%t33) { - %dmaSt0 = AIE.dma_start(MM2S, 0, ^bd0, ^dma0) + %m33 = aie.mem(%t33) { + %dmaSt0 = aie.dma_start(MM2S, 0, ^bd0, ^dma0) ^dma0: - %dmaSt1 = AIE.dma_start("MM2S", 1, ^bd1, ^end) + %dmaSt1 = aie.dma_start("MM2S", 1, ^bd1, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^bd1: - AIEX.useToken @token1(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token1(Release, 2) - AIE.next_bd ^end + aiex.useToken @token1(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token1(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m44 = AIE.mem(%t44) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m44 = aie.mem(%t44) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf44 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf44 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m55 = AIE.mem(%t55) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m55 = aie.mem(%t55) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token1(Acquire, 1) - AIE.dma_bd(%buf55 : memref<256xi32>, 0, 256) - AIEX.useToken @token1(Release, 2) - AIE.next_bd ^end + aiex.useToken @token1(Acquire, 1) + aie.dma_bd(%buf55 : memref<256xi32>, 0, 256) + aiex.useToken @token1(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token1(Acquire, 0) - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIEX.useToken @token1(Release, 1) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token1(Acquire, 0) + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aiex.useToken @token1(Release, 1) + aie.end } - %c44 = AIE.core(%t44) { - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIE.end + %c44 = aie.core(%t44) { + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aie.end } - %c55 = AIE.core(%t55) { - AIEX.useToken @token1(Acquire, 2) - AIEX.useToken @token1(Release, 3) - AIE.end + %c55 = aie.core(%t55) { + aiex.useToken @token1(Acquire, 2) + aiex.useToken @token1(Release, 3) + aie.end } - AIE.flow(%t33, DMA : 0, %t44, DMA : 0) - AIE.flow(%t33, DMA : 1, %t55, DMA : 0) + aie.flow(%t33, DMA : 0, %t44, DMA : 0) + aie.flow(%t33, DMA : 1, %t55, DMA : 0) } } diff --git a/test/create-locks/test_lock6.mlir b/test/create-locks/test_lock6.mlir index 0785189e0a..c96d1563e8 100644 --- a/test/create-locks/test_lock6.mlir +++ b/test/create-locks/test_lock6.mlir @@ -10,60 +10,60 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(5, 5) -// CHECK: %[[VAL_1:.*]] = AIE.lock(%[[VAL_0]], 1) -// CHECK: %[[VAL_2:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_3:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_3]], 0) -// CHECK: %[[VAL_5:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_5]], 0) -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_5]]) : memref<256xi32> -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_3]]) : memref<256xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_0]]) : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: AIEX.token(0) {sym_name = "token1"} -// CHECK: %[[VAL_11:.*]] = AIE.mem(%[[VAL_5]]) { -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 0) -// CHECK: AIE.end +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(5, 5) +// CHECK: %[[VAL_1:.*]] = aie.lock(%[[VAL_0]], 1) +// CHECK: %[[VAL_2:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_3:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_3]], 0) +// CHECK: %[[VAL_5:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_5]], 0) +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_5]]) : memref<256xi32> +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_3]]) : memref<256xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_0]]) : memref<256xi32> +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: aiex.token(0) {sym_name = "token1"} +// CHECK: %[[VAL_11:.*]] = aie.mem(%[[VAL_5]]) { +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_13:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 0) -// CHECK: AIE.end +// CHECK: %[[VAL_13:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_2]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_2]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_15:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_2]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_2]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_5]]) { -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_5]]) { +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.core(%[[VAL_3]]) { -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[VAL_19:.*]] = aie.core(%[[VAL_3]]) { +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_2]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_1]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_2]], Release, 0) -// CHECK: AIE.end +// CHECK: %[[VAL_20:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_2]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_1]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_2]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%[[VAL_5]], DMA : 0, %[[VAL_0]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_3]], DMA : 0, %[[VAL_0]], DMA : 1) +// CHECK: aie.flow(%[[VAL_5]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: aie.flow(%[[VAL_3]], DMA : 0, %[[VAL_0]], DMA : 1) // CHECK: } // Generate LockOp in the top-level module @@ -73,80 +73,80 @@ // [Core-Mem] ---/ // multiple producers, single consumer module @test_lock6 { - AIE.device(xcvc1902) { - %t55 = AIE.tile(5, 5) - %t44 = AIE.tile(4, 4) - %t33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %t55 = aie.tile(5, 5) + %t44 = aie.tile(4, 4) + %t33 = aie.tile(3, 3) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf44 = AIE.buffer(%t44) : memref<256xi32> - %buf55_0 = AIE.buffer(%t55) : memref<256xi32> - %buf55_1 = AIE.buffer(%t55) : memref<256xi32> + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf44 = aie.buffer(%t44) : memref<256xi32> + %buf55_0 = aie.buffer(%t55) : memref<256xi32> + %buf55_1 = aie.buffer(%t55) : memref<256xi32> - AIEX.token(0) {sym_name = "token0"} - AIEX.token(0) {sym_name = "token1"} + aiex.token(0) {sym_name = "token0"} + aiex.token(0) {sym_name = "token1"} - %m33 = AIE.mem(%t33) { - %dmaSt = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %m33 = aie.mem(%t33) { + %dmaSt = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m44 = AIE.mem(%t44) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m44 = aie.mem(%t44) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token1(Acquire, 1) - AIE.dma_bd(%buf44 : memref<256xi32>, 0, 256) - AIEX.useToken @token1(Release, 2) - AIE.next_bd ^end + aiex.useToken @token1(Acquire, 1) + aie.dma_bd(%buf44 : memref<256xi32>, 0, 256) + aiex.useToken @token1(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m55 = AIE.mem(%t55) { - %dmaSt0 = AIE.dma_start(S2MM, 0, ^bd0, ^dma0) + %m55 = aie.mem(%t55) { + %dmaSt0 = aie.dma_start(S2MM, 0, ^bd0, ^dma0) ^dma0: - %dmaSt1 = AIE.dma_start("S2MM", 1, ^bd1, ^end) + %dmaSt1 = aie.dma_start("S2MM", 1, ^bd1, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf55_0 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf55_0 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^bd1: - AIEX.useToken @token1(Acquire, 1) - AIE.dma_bd(%buf55_1 : memref<256xi32>, 0, 256) - AIEX.useToken @token1(Release, 2) - AIE.next_bd ^end + aiex.useToken @token1(Acquire, 1) + aie.dma_bd(%buf55_1 : memref<256xi32>, 0, 256) + aiex.useToken @token1(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aie.end } - %c44 = AIE.core(%t44) { - AIEX.useToken @token1(Acquire, 0) - AIEX.useToken @token1(Release, 1) - AIE.end + %c44 = aie.core(%t44) { + aiex.useToken @token1(Acquire, 0) + aiex.useToken @token1(Release, 1) + aie.end } - %c55 = AIE.core(%t55) { - AIEX.useToken @token1(Acquire, 2) - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIEX.useToken @token1(Release, 3) - AIE.end + %c55 = aie.core(%t55) { + aiex.useToken @token1(Acquire, 2) + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aiex.useToken @token1(Release, 3) + aie.end } - AIE.flow(%t33, DMA : 0, %t55, DMA : 0) - AIE.flow(%t44, DMA : 0, %t55, DMA : 1) + aie.flow(%t33, DMA : 0, %t55, DMA : 0) + aie.flow(%t44, DMA : 0, %t55, DMA : 1) } } diff --git a/test/create-locks/test_lock7.mlir b/test/create-locks/test_lock7.mlir index c4c7eee480..c7d952601e 100644 --- a/test/create-locks/test_lock7.mlir +++ b/test/create-locks/test_lock7.mlir @@ -14,58 +14,58 @@ // Fixme: create-locks iterates over maps, so this might fail. // CHECK-LABEL: module @test_lock5 { -// CHECK: %0 = AIE.tile(5, 5) -// CHECK: %1 = AIE.lock(%0, 0) -// CHECK: %2 = AIE.tile(4, 4) -// CHECK: %3 = AIE.lock(%2, 0) -// CHECK: %4 = AIE.tile(3, 3) -// CHECK: %5 = AIE.lock(%4, 1) -// CHECK: %6 = AIE.lock(%4, 0) -// CHECK: %7 = AIE.buffer(%4) : memref<256xi32> -// CHECK: %8 = AIE.buffer(%2) : memref<256xi32> -// CHECK: %9 = AIE.buffer(%0) : memref<256xi32> -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: AIEX.token(0) {sym_name = "token1"} -// CHECK: %10 = AIE.mem(%4) { -// CHECK: AIE.use_lock({{.*}}, Acquire, 1) -// CHECK: AIE.dma_bd(%7 : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock({{.*}}, Release, 0) -// CHECK: AIE.use_lock({{.*}}, Acquire, 1) -// CHECK: AIE.dma_bd(%7 : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock({{.*}}, Release, 0) -// CHECK: AIE.end +// CHECK: %0 = aie.tile(5, 5) +// CHECK: %1 = aie.lock(%0, 0) +// CHECK: %2 = aie.tile(4, 4) +// CHECK: %3 = aie.lock(%2, 0) +// CHECK: %4 = aie.tile(3, 3) +// CHECK: %5 = aie.lock(%4, 1) +// CHECK: %6 = aie.lock(%4, 0) +// CHECK: %7 = aie.buffer(%4) : memref<256xi32> +// CHECK: %8 = aie.buffer(%2) : memref<256xi32> +// CHECK: %9 = aie.buffer(%0) : memref<256xi32> +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: aiex.token(0) {sym_name = "token1"} +// CHECK: %10 = aie.mem(%4) { +// CHECK: aie.use_lock({{.*}}, Acquire, 1) +// CHECK: aie.dma_bd(%7 : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock({{.*}}, Release, 0) +// CHECK: aie.use_lock({{.*}}, Acquire, 1) +// CHECK: aie.dma_bd(%7 : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock({{.*}}, Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: %11 = AIE.mem(%2) { -// CHECK: AIE.use_lock(%3, Acquire, 0) -// CHECK: AIE.dma_bd(%8 : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%3, Release, 1) -// CHECK: AIE.end +// CHECK: %11 = aie.mem(%2) { +// CHECK: aie.use_lock(%3, Acquire, 0) +// CHECK: aie.dma_bd(%8 : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%3, Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %12 = AIE.mem(%0) { -// CHECK: AIE.use_lock(%1, Acquire, 0) -// CHECK: AIE.dma_bd(%9 : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%1, Release, 1) -// CHECK: AIE.end +// CHECK: %12 = aie.mem(%0) { +// CHECK: aie.use_lock(%1, Acquire, 0) +// CHECK: aie.dma_bd(%9 : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%1, Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %13 = AIE.core(%4) { -// CHECK: AIE.use_lock(%[[Lock1:.*]], Acquire, 0) -// CHECK: AIE.use_lock(%[[Lock2:.*]], Acquire, 0) -// CHECK: AIE.use_lock(%[[Lock1]], Release, 1) -// CHECK: AIE.use_lock(%[[Lock2]], Release, 1) -// CHECK: AIE.end +// CHECK: %13 = aie.core(%4) { +// CHECK: aie.use_lock(%[[Lock1:.*]], Acquire, 0) +// CHECK: aie.use_lock(%[[Lock2:.*]], Acquire, 0) +// CHECK: aie.use_lock(%[[Lock1]], Release, 1) +// CHECK: aie.use_lock(%[[Lock2]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %14 = AIE.core(%2) { -// CHECK: AIE.use_lock(%3, Acquire, 1) -// CHECK: AIE.use_lock(%3, Release, 0) -// CHECK: AIE.end +// CHECK: %14 = aie.core(%2) { +// CHECK: aie.use_lock(%3, Acquire, 1) +// CHECK: aie.use_lock(%3, Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: %15 = AIE.core(%0) { -// CHECK: AIE.use_lock(%1, Acquire, 1) -// CHECK: AIE.use_lock(%1, Release, 0) -// CHECK: AIE.end +// CHECK: %15 = aie.core(%0) { +// CHECK: aie.use_lock(%1, Acquire, 1) +// CHECK: aie.use_lock(%1, Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%4, DMA : 0, %2, DMA : 0) -// CHECK: AIE.flow(%4, DMA : 1, %0, DMA : 0) +// CHECK: aie.flow(%4, DMA : 0, %2, DMA : 0) +// CHECK: aie.flow(%4, DMA : 1, %0, DMA : 0) // CHECK:} // Generate LockOp in the top-level module @@ -74,77 +74,77 @@ // |---------> [Core-Mem] // single producer, multipler consumers module @test_lock5 { - AIE.device(xcvc1902) { - %t55 = AIE.tile(5, 5) - %t44 = AIE.tile(4, 4) - %t33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %t55 = aie.tile(5, 5) + %t44 = aie.tile(4, 4) + %t33 = aie.tile(3, 3) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf44 = AIE.buffer(%t44) : memref<256xi32> - %buf55 = AIE.buffer(%t55) : memref<256xi32> + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf44 = aie.buffer(%t44) : memref<256xi32> + %buf55 = aie.buffer(%t55) : memref<256xi32> - AIEX.token(0) {sym_name = "token0"} - AIEX.token(0) {sym_name = "token1"} + aiex.token(0) {sym_name = "token0"} + aiex.token(0) {sym_name = "token1"} - %m33 = AIE.mem(%t33) { - %dmaSt0 = AIE.dma_start(MM2S0, ^bd0, ^dma0) + %m33 = aie.mem(%t33) { + %dmaSt0 = aie.dma_start(MM2S0, ^bd0, ^dma0) ^dma0: - %dmaSt1 = AIE.dma_start("MM2S1", ^bd1, ^end) + %dmaSt1 = aie.dma_start("MM2S1", ^bd1, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^bd1: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m44 = AIE.mem(%t44) { - %dmaSt = AIE.dma_start(S2MM0, ^bd0, ^end) + %m44 = aie.mem(%t44) { + %dmaSt = aie.dma_start(S2MM0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf44 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf44 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m55 = AIE.mem(%t55) { - %dmaSt = AIE.dma_start(S2MM0, ^bd0, ^end) + %m55 = aie.mem(%t55) { + %dmaSt = aie.dma_start(S2MM0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf55 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf55 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %c33 = AIE.core(%t33) { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIE.end + %c33 = aie.core(%t33) { + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aie.end } - %c44 = AIE.core(%t44) { - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIE.end + %c44 = aie.core(%t44) { + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aie.end } - %c55 = AIE.core(%t55) { - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIE.end + %c55 = aie.core(%t55) { + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aie.end } - AIE.flow(%t33, DMA : 0, %t44, DMA : 0) - AIE.flow(%t33, DMA : 1, %t55, DMA : 0) + aie.flow(%t33, DMA : 0, %t44, DMA : 0) + aie.flow(%t33, DMA : 1, %t55, DMA : 0) } } diff --git a/test/create-locks/test_lock_shimdma.mlir b/test/create-locks/test_lock_shimdma.mlir index 7e8ac9c4c0..183d824772 100644 --- a/test/create-locks/test_lock_shimdma.mlir +++ b/test/create-locks/test_lock_shimdma.mlir @@ -12,44 +12,44 @@ // RUN: aie-opt --aie-create-locks %s | FileCheck %s // CHECK-LABELs: module @test_lock_shimdma { -// CHECK: AIEX.token(0) {sym_name = "token0"} -// CHECK: %0 = AIE.external_buffer : memref<256xi32> -// CHECK: %1 = AIE.tile(6, 0) -// CHECK: %2 = AIE.lock(%1, 0) -// CHECK: %3 = AIE.core(%1) { -// CHECK: AIE.use_lock(%2, Acquire, 1) -// CHECK: AIE.use_lock(%2, Release, 0) -// CHECK: AIE.end +// CHECK: aiex.token(0) {sym_name = "token0"} +// CHECK: %0 = aie.external_buffer : memref<256xi32> +// CHECK: %1 = aie.tile(6, 0) +// CHECK: %2 = aie.lock(%1, 0) +// CHECK: %3 = aie.core(%1) { +// CHECK: aie.use_lock(%2, Acquire, 1) +// CHECK: aie.use_lock(%2, Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: %4 = AIE.shim_dma(%1) { -// CHECK: %10 = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %4 = aie.shim_dma(%1) { +// CHECK: %10 = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: // pred: ^bb0 -// CHECK: AIE.use_lock(%2, Acquire, 0) -// CHECK: AIE.dma_bd(%0 : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%2, Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%2, Acquire, 0) +// CHECK: aie.dma_bd(%0 : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%2, Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %5 = AIE.tile(3, 3) -// CHECK: %6 = AIE.lock(%5, 0) -// CHECK: %7 = AIE.buffer(%5) : memref<256xi32> -// CHECK: %8 = AIE.core(%5) { -// CHECK: AIE.use_lock(%6, Acquire, 0) -// CHECK: AIE.use_lock(%6, Release, 1) -// CHECK: AIE.end +// CHECK: %5 = aie.tile(3, 3) +// CHECK: %6 = aie.lock(%5, 0) +// CHECK: %7 = aie.buffer(%5) : memref<256xi32> +// CHECK: %8 = aie.core(%5) { +// CHECK: aie.use_lock(%6, Acquire, 0) +// CHECK: aie.use_lock(%6, Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %9 = AIE.mem(%5) { -// CHECK: %10 = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %9 = aie.mem(%5) { +// CHECK: %10 = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // pred: ^bb0 -// CHECK: AIE.use_lock(%6, Acquire, 1) -// CHECK: AIE.dma_bd(%7 : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%6, Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%6, Acquire, 1) +// CHECK: aie.dma_bd(%7 : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%6, Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: AIE.flow(%5, DMA : 0, %1, DMA : 0) +// CHECK: aie.flow(%5, DMA : 0, %1, DMA : 0) // CHECK: } // Generate LockOp in the top-level module @@ -57,47 +57,47 @@ // [Core-Mem] ---> [ShimDMA] (non-neighboring tiles) // single producer, single consumer module @test_lock_shimdma { - AIE.device(xcvc1902) { - AIEX.token(0) {sym_name = "token0"} - %buf_ext = AIE.external_buffer : memref<256xi32> + aie.device(xcvc1902) { + aiex.token(0) {sym_name = "token0"} + %buf_ext = aie.external_buffer : memref<256xi32> - %t60 = AIE.tile(6, 0) - %c60 = AIE.core(%t60) { + %t60 = aie.tile(6, 0) + %c60 = aie.core(%t60) { // TODO: This represents the token uses on the host CPU. A representation of // the host CPU in MLIR might be a better place for holding this. - AIEX.useToken @token0(Acquire, 2) - AIEX.useToken @token0(Release, 3) - AIE.end + aiex.useToken @token0(Acquire, 2) + aiex.useToken @token0(Release, 3) + aie.end } - %m60 = AIE.shim_dma(%t60) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m60 = aie.shim_dma(%t60) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf_ext : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf_ext : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %t33 = AIE.tile(3, 3) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %c33 = AIE.core(%t33) { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token0(Release, 1) - AIE.end + %t33 = aie.tile(3, 3) + %buf33 = aie.buffer(%t33) : memref<256xi32> + %c33 = aie.core(%t33) { + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token0(Release, 1) + aie.end } - %m33 = AIE.mem(%t33) { - %dmaSt = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %m33 = aie.mem(%t33) { + %dmaSt = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIEX.useToken @token0(Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIEX.useToken @token0(Release, 2) - AIE.next_bd ^end + aiex.useToken @token0(Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aiex.useToken @token0(Release, 2) + aie.next_bd ^end ^end: - AIE.end + aie.end } - AIE.flow(%t33, DMA : 0, %t60, DMA : 0) + aie.flow(%t33, DMA : 0, %t60, DMA : 0) } } diff --git a/test/create-multicast/test_multicast.mlir b/test/create-multicast/test_multicast.mlir index 399aa78d0a..7d07678ba4 100644 --- a/test/create-multicast/test_multicast.mlir +++ b/test/create-multicast/test_multicast.mlir @@ -1,29 +1,29 @@ // RUN: aie-opt --aie-lower-multicast %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(7, 4) -// CHECK: %[[VAL_3:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(6, 4) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_3]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(7, 4) +// CHECK: %[[VAL_3:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(6, 4) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_3]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_4]], DMA : 0) // CHECK: } module @test_multicast { - AIE.device(xcvc1902) { - %70 = AIE.tile(7, 0) - %73 = AIE.tile(7, 3) - %74 = AIE.tile(7, 4) - %63 = AIE.tile(6, 3) - %64 = AIE.tile(6, 4) - AIEX.multicast(%70, "DMA" : 0){ - AIEX.multi_dest<%73, "DMA" : 0> - AIEX.multi_dest<%74, "DMA" : 0> - AIEX.multi_dest<%63, "DMA" : 0> - AIEX.multi_dest<%64, "DMA" : 0> + aie.device(xcvc1902) { + %70 = aie.tile(7, 0) + %73 = aie.tile(7, 3) + %74 = aie.tile(7, 4) + %63 = aie.tile(6, 3) + %64 = aie.tile(6, 4) + aiex.multicast(%70, "DMA" : 0){ + aiex.multi_dest<%73, "DMA" : 0> + aiex.multi_dest<%74, "DMA" : 0> + aiex.multi_dest<%63, "DMA" : 0> + aiex.multi_dest<%64, "DMA" : 0> } } } \ No newline at end of file diff --git a/test/create-packet-flows/circuit_and_packet_routing.mlir b/test/create-packet-flows/circuit_and_packet_routing.mlir index 5056da6645..244683361c 100644 --- a/test/create-packet-flows/circuit_and_packet_routing.mlir +++ b/test/create-packet-flows/circuit_and_packet_routing.mlir @@ -11,37 +11,37 @@ // RUN: aie-opt --aie-create-packet-flows %s | FileCheck %s // CHECK-LABEL: module @aie_module { -// CHECK: %[[VAL_0:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0:.*]]) { -// CHECK: %[[VAL_2:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_3:.*]] = AIE.masterset(DMA : 1, %[[VAL_2:.*]]) -// CHECK: AIE.packet_rules(North : 3) { -// CHECK: AIE.rule(31, 10, %[[VAL_2:.*]]) +// CHECK: %[[VAL_0:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0:.*]]) { +// CHECK: %[[VAL_2:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_3:.*]] = aie.masterset(DMA : 1, %[[VAL_2:.*]]) +// CHECK: aie.packet_rules(North : 3) { +// CHECK: aie.rule(31, 10, %[[VAL_2:.*]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_6:.*]] = AIE.switchbox(%[[VAL_5:.*]]) { -// CHECK: %[[VAL_7:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_8:.*]] = AIE.masterset(South : 3, %[[VAL_7:.*]]) -// CHECK: AIE.packet_rules(DMA : 0) { -// CHECK: AIE.rule(31, 10, %[[VAL_7:.*]]) +// CHECK: %[[VAL_5:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_6:.*]] = aie.switchbox(%[[VAL_5:.*]]) { +// CHECK: %[[VAL_7:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_8:.*]] = aie.masterset(South : 3, %[[VAL_7:.*]]) +// CHECK: aie.packet_rules(DMA : 0) { +// CHECK: aie.rule(31, 10, %[[VAL_7:.*]]) // CHECK: } // CHECK: } -// CHECK: AIE.flow(%[[VAL_0]], DMA : 1, %[[VAL_5]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 1, %[[VAL_5]], DMA : 0) // // one circuit routing and one packet routing // module @aie_module { - AIE.device(xcvc1902) { - %t70 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 3) + aie.device(xcvc1902) { + %t70 = aie.tile(7, 2) + %t71 = aie.tile(7, 3) - AIE.packet_flow(0xA) { - AIE.packet_source<%t71, DMA : 0> - AIE.packet_dest<%t70, DMA : 1> + aie.packet_flow(0xA) { + aie.packet_source<%t71, DMA : 0> + aie.packet_dest<%t70, DMA : 1> } - AIE.flow(%t70, DMA : 1, %t71, DMA : 0) + aie.flow(%t70, DMA : 1, %t71, DMA : 0) } } diff --git a/test/create-packet-flows/packet_routing_keep_pkt_header.mlir b/test/create-packet-flows/packet_routing_keep_pkt_header.mlir index 83f9d63ff9..685b6d52a9 100644 --- a/test/create-packet-flows/packet_routing_keep_pkt_header.mlir +++ b/test/create-packet-flows/packet_routing_keep_pkt_header.mlir @@ -11,36 +11,36 @@ // RUN: aie-opt --aie-create-packet-flows %s | FileCheck %s // CHECK-LABEL: module @aie_module { -// CHECK: %[[VAL_0:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %[[VAL_2:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_3:.*]] = AIE.masterset(DMA : 1, %[[VAL_2]]) -// CHECK: AIE.packet_rules(North : 3) { -// CHECK: AIE.rule(31, 1, %[[VAL_2]]) +// CHECK: %[[VAL_0:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_2:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_3:.*]] = aie.masterset(DMA : 1, %[[VAL_2]]) +// CHECK: aie.packet_rules(North : 3) { +// CHECK: aie.rule(31, 1, %[[VAL_2]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.tile(6, 3) -// CHECK: %[[VAL_5:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: %[[VAL_6:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_7:.*]] = AIE.masterset(South : 3, %[[VAL_6]]) -// CHECK: AIE.packet_rules(DMA : 0) { -// CHECK: AIE.rule(31, 1, %[[VAL_6]]) +// CHECK: %[[VAL_4:.*]] = aie.tile(6, 3) +// CHECK: %[[VAL_5:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: %[[VAL_6:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_7:.*]] = aie.masterset(South : 3, %[[VAL_6]]) +// CHECK: aie.packet_rules(DMA : 0) { +// CHECK: aie.rule(31, 1, %[[VAL_6]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_8:.*]] = AIE.tile(7, 2) -// CHECK: %[[VAL_9:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: %[[VAL_10:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_11:.*]] = AIE.masterset(DMA : 1, %[[VAL_10]]) {keep_pkt_header = "true"} -// CHECK: AIE.packet_rules(North : 3) { -// CHECK: AIE.rule(31, 2, %[[VAL_10]]) +// CHECK: %[[VAL_8:.*]] = aie.tile(7, 2) +// CHECK: %[[VAL_9:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: %[[VAL_10:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_11:.*]] = aie.masterset(DMA : 1, %[[VAL_10]]) {keep_pkt_header = "true"} +// CHECK: aie.packet_rules(North : 3) { +// CHECK: aie.rule(31, 2, %[[VAL_10]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.tile(7, 3) -// CHECK: %[[VAL_13:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: %[[VAL_14:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_15:.*]] = AIE.masterset(South : 3, %[[VAL_14]]) -// CHECK: AIE.packet_rules(DMA : 0) { -// CHECK: AIE.rule(31, 2, %[[VAL_14]]) +// CHECK: %[[VAL_12:.*]] = aie.tile(7, 3) +// CHECK: %[[VAL_13:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: %[[VAL_14:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_15:.*]] = aie.masterset(South : 3, %[[VAL_14]]) +// CHECK: aie.packet_rules(DMA : 0) { +// CHECK: aie.rule(31, 2, %[[VAL_14]]) // CHECK: } // CHECK: } @@ -49,20 +49,20 @@ // module @aie_module { - AIE.device(xcvc1902) { - %t62 = AIE.tile(6, 2) - %t63 = AIE.tile(6, 3) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) + aie.device(xcvc1902) { + %t62 = aie.tile(6, 2) + %t63 = aie.tile(6, 3) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) - AIE.packet_flow(0x1) { - AIE.packet_source<%t63, DMA : 0> - AIE.packet_dest<%t62, DMA : 1> + aie.packet_flow(0x1) { + aie.packet_source<%t63, DMA : 0> + aie.packet_dest<%t62, DMA : 1> } - AIE.packet_flow(0x2) { - AIE.packet_source<%t73, DMA : 0> - AIE.packet_dest<%t72, DMA : 1> + aie.packet_flow(0x2) { + aie.packet_source<%t73, DMA : 0> + aie.packet_dest<%t72, DMA : 1> } {keep_pkt_header = true} } } diff --git a/test/create-packet-flows/test_create_packet_flows0.mlir b/test/create-packet-flows/test_create_packet_flows0.mlir index 9c4705c530..93ac78552c 100644 --- a/test/create-packet-flows/test_create_packet_flows0.mlir +++ b/test/create-packet-flows/test_create_packet_flows0.mlir @@ -12,31 +12,31 @@ // one-to-many, single arbiter module @test_create_packet_flows0 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // CHECK-LABEL: module @test_create_packet_flows0 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { // The actual indices used for the amsel arguments is unimportant. -// CHECK: %[[VAL_6:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_7:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_4:.*]] = AIE.masterset(Core : 0, %[[VAL_2:.*]]) -// CHECK: %[[VAL_5:.*]] = AIE.masterset(Core : 1, %[[VAL_3:.*]]) -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(31, 1, %[[VAL_3]]) -// CHECK: AIE.rule(31, 0, %[[VAL_2]]) +// CHECK: %[[VAL_6:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_7:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_4:.*]] = aie.masterset(Core : 0, %[[VAL_2:.*]]) +// CHECK: %[[VAL_5:.*]] = aie.masterset(Core : 1, %[[VAL_3:.*]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(31, 1, %[[VAL_3]]) +// CHECK: aie.rule(31, 0, %[[VAL_2]]) // CHECK: } // CHECK: } // CHECK: } - %t11 = AIE.tile(1, 1) + %t11 = aie.tile(1, 1) - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> } - AIE.packet_flow(0x1) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 1> + aie.packet_flow(0x1) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 1> } } } diff --git a/test/create-packet-flows/test_create_packet_flows1.mlir b/test/create-packet-flows/test_create_packet_flows1.mlir index dbc80c9491..d29bcd0919 100644 --- a/test/create-packet-flows/test_create_packet_flows1.mlir +++ b/test/create-packet-flows/test_create_packet_flows1.mlir @@ -10,33 +10,33 @@ // RUN: aie-opt --aie-create-packet-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %[[VAL_2:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_3:.*]] = AIE.masterset(Core : 0, %[[VAL_2]]) -// CHECK: AIE.packet_rules(West : 1) { -// CHECK: AIE.rule(31, 1, %[[VAL_2]]) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_2:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_3:.*]] = aie.masterset(Core : 0, %[[VAL_2]]) +// CHECK: aie.packet_rules(West : 1) { +// CHECK: aie.rule(31, 1, %[[VAL_2]]) // CHECK: } -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(31, 0, %[[VAL_2]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(31, 0, %[[VAL_2]]) // CHECK: } // CHECK: } // CHECK: } // many-to-one, single arbiter module @test_create_packet_flows1 { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> } - AIE.packet_flow(0x1) { - AIE.packet_source<%t11, West : 1> - AIE.packet_dest<%t11, Core : 0> + aie.packet_flow(0x1) { + aie.packet_source<%t11, West : 1> + aie.packet_dest<%t11, Core : 0> } } } diff --git a/test/create-packet-flows/test_create_packet_flows2.mlir b/test/create-packet-flows/test_create_packet_flows2.mlir index ea3e0febee..97774da54f 100644 --- a/test/create-packet-flows/test_create_packet_flows2.mlir +++ b/test/create-packet-flows/test_create_packet_flows2.mlir @@ -12,33 +12,33 @@ // partial multicast module @test_create_packet_flows2 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // CHECK-LABEL: module @test_create_packet_flows2 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %[[VAL_6:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_7:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_4:.*]] = AIE.masterset(Core : 0, %[[VAL_2:.*]]) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_6:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_7:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_4:.*]] = aie.masterset(Core : 0, %[[VAL_2:.*]]) // VAL_3 should also appear here, but it's difficult to filecheck. -// CHECK: %[[VAL_5:.*]] = AIE.masterset(Core : 1, +// CHECK: %[[VAL_5:.*]] = aie.masterset(Core : 1, // CHECK-SACore : %[[VAL_2]] -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(31, 1, %[[VAL_3:.*]]) -// CHECK: AIE.rule(31, 0, %[[VAL_2]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(31, 1, %[[VAL_3:.*]]) +// CHECK: aie.rule(31, 0, %[[VAL_2]]) // CHECK: } // CHECK: } // CHECK: } - %t11 = AIE.tile(1, 1) + %t11 = aie.tile(1, 1) - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> - AIE.packet_dest<%t11, Core : 1> + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> + aie.packet_dest<%t11, Core : 1> } - AIE.packet_flow(0x1) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 1> + aie.packet_flow(0x1) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 1> } } } diff --git a/test/create-packet-flows/test_create_packet_flows3.mlir b/test/create-packet-flows/test_create_packet_flows3.mlir index a55ad9e217..ff9e1568ca 100644 --- a/test/create-packet-flows/test_create_packet_flows3.mlir +++ b/test/create-packet-flows/test_create_packet_flows3.mlir @@ -12,34 +12,34 @@ // many-to-many, 2 streams module @test_create_packet_flows3 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // CHECK-LABEL: module @test_create_packet_flows3 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %[[VAL_6:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_7:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_4:.*]] = AIE.masterset(Core : 0, %[[VAL_2:.*]]) -// CHECK: %[[VAL_5:.*]] = AIE.masterset(Core : 1, +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_6:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_7:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_4:.*]] = aie.masterset(Core : 0, %[[VAL_2:.*]]) +// CHECK: %[[VAL_5:.*]] = aie.masterset(Core : 1, // CHECK-SACore : %[[VAL_2]] -// CHECK: AIE.packet_rules(West : 1) { -// CHECK: AIE.rule(31, 1, %[[VAL_3:.*]]) +// CHECK: aie.packet_rules(West : 1) { +// CHECK: aie.rule(31, 1, %[[VAL_3:.*]]) // CHECK: } -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(31, 0, %[[VAL_2]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(31, 0, %[[VAL_2]]) // CHECK: } // CHECK: } // CHECK: } - %t11 = AIE.tile(1, 1) + %t11 = aie.tile(1, 1) - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> - AIE.packet_dest<%t11, Core : 1> + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> + aie.packet_dest<%t11, Core : 1> } - AIE.packet_flow(0x1) { - AIE.packet_source<%t11, West : 1> - AIE.packet_dest<%t11, Core : 1> + aie.packet_flow(0x1) { + aie.packet_source<%t11, West : 1> + aie.packet_dest<%t11, Core : 1> } } } diff --git a/test/create-packet-flows/test_create_packet_flows4.mlir b/test/create-packet-flows/test_create_packet_flows4.mlir index 51689bd07c..4b4a1bb36a 100644 --- a/test/create-packet-flows/test_create_packet_flows4.mlir +++ b/test/create-packet-flows/test_create_packet_flows4.mlir @@ -11,38 +11,38 @@ // RUN: aie-opt --aie-create-packet-flows %s | FileCheck %s module @test_create_packet_flows4 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // CHECK-LABEL: module @test_create_packet_flows4 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %[[VAL_6:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_7:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_4:.*]] = AIE.masterset(Core : 0, %[[VAL_3:.*]]) -// CHECK: %[[VAL_5:.*]] = AIE.masterset(Core : 1, %[[VAL_2:.*]]) -// CHECK: AIE.packet_rules(West : 1) { -// CHECK: AIE.rule(31, 0, %[[VAL_2]]) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_6:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_7:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_4:.*]] = aie.masterset(Core : 0, %[[VAL_3:.*]]) +// CHECK: %[[VAL_5:.*]] = aie.masterset(Core : 1, %[[VAL_2:.*]]) +// CHECK: aie.packet_rules(West : 1) { +// CHECK: aie.rule(31, 0, %[[VAL_2]]) // CHECK: } -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(31, 1, %[[VAL_2]]) -// CHECK: AIE.rule(31, 0, %[[VAL_3]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(31, 1, %[[VAL_2]]) +// CHECK: aie.rule(31, 0, %[[VAL_3]]) // CHECK: } // CHECK: } // CHECK: } - %t11 = AIE.tile(1, 1) + %t11 = aie.tile(1, 1) - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> } - AIE.packet_flow(0x1) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 1> + aie.packet_flow(0x1) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 1> } - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 1> - AIE.packet_dest<%t11, Core : 1> + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 1> + aie.packet_dest<%t11, Core : 1> } } } diff --git a/test/create-packet-flows/test_create_packet_flows5.mlir b/test/create-packet-flows/test_create_packet_flows5.mlir index c8daa90304..34c85258f0 100644 --- a/test/create-packet-flows/test_create_packet_flows5.mlir +++ b/test/create-packet-flows/test_create_packet_flows5.mlir @@ -8,38 +8,38 @@ // //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-create-packet-flows %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %[[VAL_2:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_3:.*]] = AIE.masterset(Core : 0, %[[VAL_2]]) -// CHECK: AIE.packet_rules(West : 1) { -// CHECK: AIE.rule(31, 2, %[[VAL_2]]) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_2:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_3:.*]] = aie.masterset(Core : 0, %[[VAL_2]]) +// CHECK: aie.packet_rules(West : 1) { +// CHECK: aie.rule(31, 2, %[[VAL_2]]) // CHECK: } -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(30, 0, %[[VAL_2]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(30, 0, %[[VAL_2]]) // CHECK: } // CHECK: } // CHECK: } // many-to-one, 3 streams module @test_create_packet_flows5 { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> } - AIE.packet_flow(0x1) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> + aie.packet_flow(0x1) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> } - AIE.packet_flow(0x2) { - AIE.packet_source<%t11, West : 1> - AIE.packet_dest<%t11, Core : 0> + aie.packet_flow(0x2) { + aie.packet_source<%t11, West : 1> + aie.packet_dest<%t11, Core : 0> } } } diff --git a/test/create-packet-flows/test_create_packet_flows6.mlir b/test/create-packet-flows/test_create_packet_flows6.mlir index e10139d384..e73c3b01f1 100644 --- a/test/create-packet-flows/test_create_packet_flows6.mlir +++ b/test/create-packet-flows/test_create_packet_flows6.mlir @@ -14,88 +14,88 @@ // Fixme: may fail non-deterministically module @test_create_packet_flows6 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // CHECK-LABEL: module @test_create_packet_flows6 { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %{{.*}} = AIE.amsel<0> (0) -// CHECK: %[[VAL_3:.*]] = AIE.masterset(East : 0, %[[VAL_2:.*]]) -// CHECK: AIE.packet_rules(DMA : 0) { -// CHECK: AIE.rule(28, 3, %[[VAL_2]]) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %{{.*}} = aie.amsel<0> (0) +// CHECK: %[[VAL_3:.*]] = aie.masterset(East : 0, %[[VAL_2:.*]]) +// CHECK: aie.packet_rules(DMA : 0) { +// CHECK: aie.rule(28, 3, %[[VAL_2]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_5:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: %{{.*}} = AIE.amsel<0> (0) -// CHECK: %{{.*}} = AIE.amsel<0> (1) -// CHECK: %[[VAL_8:.*]] = AIE.masterset(DMA : 0, %[[VAL_7:.*]]) -// CHECK: %[[VAL_9:.*]] = AIE.masterset(East : 0, %[[VAL_6:.*]]) -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(28, 3, %[[VAL_6]]) -// CHECK: AIE.rule(31, 0, %[[VAL_7]]) +// CHECK: %[[VAL_4:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_5:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: %{{.*}} = aie.amsel<0> (0) +// CHECK: %{{.*}} = aie.amsel<0> (1) +// CHECK: %[[VAL_8:.*]] = aie.masterset(DMA : 0, %[[VAL_7:.*]]) +// CHECK: %[[VAL_9:.*]] = aie.masterset(East : 0, %[[VAL_6:.*]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(28, 3, %[[VAL_6]]) +// CHECK: aie.rule(31, 0, %[[VAL_7]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_10:.*]] = AIE.tile(4, 2) -// CHECK: %[[VAL_11:.*]] = AIE.switchbox(%[[VAL_10]]) { -// CHECK: %{{.*}} = AIE.amsel<0> (0) -// CHECK: %{{.*}} = AIE.amsel<0> (1) -// CHECK: %[[VAL_14:.*]] = AIE.masterset(DMA : 0, %[[VAL_13:.*]]) -// CHECK: %[[VAL_15:.*]] = AIE.masterset(East : 0, %[[VAL_12:.*]]) -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(30, 3, %[[VAL_12]]) -// CHECK: AIE.rule(31, 1, %[[VAL_13]]) +// CHECK: %[[VAL_10:.*]] = aie.tile(4, 2) +// CHECK: %[[VAL_11:.*]] = aie.switchbox(%[[VAL_10]]) { +// CHECK: %{{.*}} = aie.amsel<0> (0) +// CHECK: %{{.*}} = aie.amsel<0> (1) +// CHECK: %[[VAL_14:.*]] = aie.masterset(DMA : 0, %[[VAL_13:.*]]) +// CHECK: %[[VAL_15:.*]] = aie.masterset(East : 0, %[[VAL_12:.*]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(30, 3, %[[VAL_12]]) +// CHECK: aie.rule(31, 1, %[[VAL_13]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.tile(5, 2) -// CHECK: %[[VAL_17:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: %[[VAL_18:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_19:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_20:.*]] = AIE.masterset(DMA : 0, %[[VAL_19]]) -// CHECK: %[[VAL_21:.*]] = AIE.masterset(East : 0, %[[VAL_18]]) -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(31, 3, %[[VAL_18]]) -// CHECK: AIE.rule(31, 2, %[[VAL_19]]) +// CHECK: %[[VAL_16:.*]] = aie.tile(5, 2) +// CHECK: %[[VAL_17:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: %[[VAL_18:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_19:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_20:.*]] = aie.masterset(DMA : 0, %[[VAL_19]]) +// CHECK: %[[VAL_21:.*]] = aie.masterset(East : 0, %[[VAL_18]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(31, 3, %[[VAL_18]]) +// CHECK: aie.rule(31, 2, %[[VAL_19]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_22:.*]] = AIE.tile(6, 2) -// CHECK: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: %{{.*}} = AIE.amsel<0> (0) -// CHECK: %[[VAL_25:.*]] = AIE.masterset(DMA : 0, %[[VAL_24:.*]]) -// CHECK: AIE.packet_rules(West : 0) { -// CHECK: AIE.rule(31, 3, %[[VAL_24]]) +// CHECK: %[[VAL_22:.*]] = aie.tile(6, 2) +// CHECK: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: %{{.*}} = aie.amsel<0> (0) +// CHECK: %[[VAL_25:.*]] = aie.masterset(DMA : 0, %[[VAL_24:.*]]) +// CHECK: aie.packet_rules(West : 0) { +// CHECK: aie.rule(31, 3, %[[VAL_24]]) // CHECK: } // CHECK: } // CHECK: } - %tile22 = AIE.tile(2, 2) - %tile32 = AIE.tile(3, 2) - %tile42 = AIE.tile(4, 2) - %tile52 = AIE.tile(5, 2) - %tile62 = AIE.tile(6, 2) + %tile22 = aie.tile(2, 2) + %tile32 = aie.tile(3, 2) + %tile42 = aie.tile(4, 2) + %tile52 = aie.tile(5, 2) + %tile62 = aie.tile(6, 2) // [2, 2] --> [3, 2] --> [4, 2] --> [5, 2] --> [6, 2] - AIE.packet_flow(0x0) { - AIE.packet_source<%tile22, DMA : 0> - AIE.packet_dest<%tile32, DMA : 0> + aie.packet_flow(0x0) { + aie.packet_source<%tile22, DMA : 0> + aie.packet_dest<%tile32, DMA : 0> } - AIE.packet_flow(0x1) { - AIE.packet_source<%tile22, DMA : 0> - AIE.packet_dest<%tile42, DMA : 0> + aie.packet_flow(0x1) { + aie.packet_source<%tile22, DMA : 0> + aie.packet_dest<%tile42, DMA : 0> } - AIE.packet_flow(0x2) { - AIE.packet_source<%tile22, DMA : 0> - AIE.packet_dest<%tile52, DMA : 0> + aie.packet_flow(0x2) { + aie.packet_source<%tile22, DMA : 0> + aie.packet_dest<%tile52, DMA : 0> } - AIE.packet_flow(0x3) { - AIE.packet_source<%tile22, DMA : 0> - AIE.packet_dest<%tile62, DMA : 0> + aie.packet_flow(0x3) { + aie.packet_source<%tile22, DMA : 0> + aie.packet_dest<%tile62, DMA : 0> } } } diff --git a/test/create-packet-flows/test_create_packet_flows_shim0.mlir b/test/create-packet-flows/test_create_packet_flows_shim0.mlir index c6dbae718c..99fe61f530 100644 --- a/test/create-packet-flows/test_create_packet_flows_shim0.mlir +++ b/test/create-packet-flows/test_create_packet_flows_shim0.mlir @@ -11,23 +11,23 @@ // RUN: aie-opt --aie-create-packet-flows %s | FileCheck %s // CHECK-LABEL: module @aie_module { -// CHECK: %[[VAL_0:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_1:.*]] = AIE.shim_mux(%[[VAL_0:.*]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_0:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_1:.*]] = aie.shim_mux(%[[VAL_0:.*]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_2:.*]] = AIE.switchbox(%[[VAL_0:.*]]) { -// CHECK: %[[VAL_3:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_4:.*]] = AIE.masterset(South : 3, %[[VAL_3:.*]]) -// CHECK: AIE.packet_rules(North : 3) { -// CHECK: AIE.rule(31, 10, %[[VAL_3:.*]]) +// CHECK: %[[VAL_2:.*]] = aie.switchbox(%[[VAL_0:.*]]) { +// CHECK: %[[VAL_3:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_4:.*]] = aie.masterset(South : 3, %[[VAL_3:.*]]) +// CHECK: aie.packet_rules(North : 3) { +// CHECK: aie.rule(31, 10, %[[VAL_3:.*]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_6:.*]] = AIE.switchbox(%[[VAL_5:.*]]) { -// CHECK: %[[VAL_7:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_8:.*]] = AIE.masterset(South : 3, %[[VAL_6:.*]]) -// CHECK: AIE.packet_rules(DMA : 0) { -// CHECK: AIE.rule(31, 10, %[[VAL_7:.*]]) +// CHECK: %[[VAL_5:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_6:.*]] = aie.switchbox(%[[VAL_5:.*]]) { +// CHECK: %[[VAL_7:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_8:.*]] = aie.masterset(South : 3, %[[VAL_6:.*]]) +// CHECK: aie.packet_rules(DMA : 0) { +// CHECK: aie.rule(31, 10, %[[VAL_7:.*]]) // CHECK: } // CHECK: } @@ -35,13 +35,13 @@ // one-to-one shim DMA destination // module @aie_module { - AIE.device(xcvc1902) { - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) + aie.device(xcvc1902) { + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) - AIE.packet_flow(0xA) { - AIE.packet_source<%t71, DMA : 0> - AIE.packet_dest<%t70, DMA : 1> + aie.packet_flow(0xA) { + aie.packet_source<%t71, DMA : 0> + aie.packet_dest<%t70, DMA : 1> } } } diff --git a/test/create-packet-flows/test_create_packet_flows_shim1.mlir b/test/create-packet-flows/test_create_packet_flows_shim1.mlir index 57df78bb2a..a6057799ed 100644 --- a/test/create-packet-flows/test_create_packet_flows_shim1.mlir +++ b/test/create-packet-flows/test_create_packet_flows_shim1.mlir @@ -11,23 +11,23 @@ // RUN: aie-opt --aie-create-packet-flows %s | FileCheck %s // CHECK-LABEL: module @aie_module { -// CHECK: %[[VAL_0:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_1:.*]] = AIE.shim_mux(%[[VAL_0:.*]]) { -// CHECK: AIE.connect +// CHECK: %[[VAL_0:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_1:.*]] = aie.shim_mux(%[[VAL_0:.*]]) { +// CHECK: aie.connect // CHECK: } -// CHECK: %[[VAL_2:.*]] = AIE.switchbox(%[[VAL_0:.*]]) { -// CHECK: %[[VAL_3:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_4:.*]] = AIE.masterset(North : 5, %[[VAL_3:.*]]) -// CHECK: AIE.packet_rules(South : 3) { -// CHECK: AIE.rule(31, 3, %[[VAL_3:.*]]) +// CHECK: %[[VAL_2:.*]] = aie.switchbox(%[[VAL_0:.*]]) { +// CHECK: %[[VAL_3:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_4:.*]] = aie.masterset(North : 5, %[[VAL_3:.*]]) +// CHECK: aie.packet_rules(South : 3) { +// CHECK: aie.rule(31, 3, %[[VAL_3:.*]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_6:.*]] = AIE.switchbox(%[[VAL_5:.*]]) { -// CHECK: %[[VAL_7:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_8:.*]] = AIE.masterset(DMA : 0, %[[VAL_7:.*]]) -// CHECK: AIE.packet_rules(South : 5) { -// CHECK: AIE.rule(31, 3, %[[VAL_7:.*]]) +// CHECK: %[[VAL_5:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_6:.*]] = aie.switchbox(%[[VAL_5:.*]]) { +// CHECK: %[[VAL_7:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_8:.*]] = aie.masterset(DMA : 0, %[[VAL_7:.*]]) +// CHECK: aie.packet_rules(South : 5) { +// CHECK: aie.rule(31, 3, %[[VAL_7:.*]]) // CHECK: } // CHECK: } @@ -35,13 +35,13 @@ // one-to-one shim DMA source // module @aie_module { - AIE.device(xcvc1902) { - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) + aie.device(xcvc1902) { + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) - AIE.packet_flow(0x3) { - AIE.packet_source<%t70, DMA : 0> - AIE.packet_dest<%t71, DMA : 0> + aie.packet_flow(0x3) { + aie.packet_source<%t70, DMA : 0> + aie.packet_dest<%t71, DMA : 0> } } } diff --git a/test/create-packet-flows/test_pktflow_weight_pusher.mlir b/test/create-packet-flows/test_pktflow_weight_pusher.mlir index f5f6f07c88..5e659492f3 100644 --- a/test/create-packet-flows/test_pktflow_weight_pusher.mlir +++ b/test/create-packet-flows/test_pktflow_weight_pusher.mlir @@ -21,243 +21,243 @@ // herd. What is missing here is the DMA configuration to set up the DMA in PacketSwitch mode. // Here we just concern with generating the packet-switched configuration automatically. module @test_pktflow_weight_pusher { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // Herd "compute" // CHECK: module @test_pktflow_weight_pusher { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 2) -// CHECK-NEXT: %[[VAL_1:.*]] = AIE.switchbox(%[[VAL_0]]) { -// CHECK: %[[VAL_2:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_3:.*]] = AIE.masterset(DMA : 1, %[[VAL_2]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 0, %[[VAL_2]]) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 2) +// CHECK-NEXT: %[[VAL_1:.*]] = aie.switchbox(%[[VAL_0]]) { +// CHECK: %[[VAL_2:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_3:.*]] = aie.masterset(DMA : 1, %[[VAL_2]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 0, %[[VAL_2]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_4:.*]] = AIE.tile(3, 2) -// CHECK-NEXT: %[[VAL_5:.*]] = AIE.switchbox(%[[VAL_4]]) { -// CHECK: %[[VAL_6:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_7:.*]] = AIE.masterset(DMA : 1, %[[VAL_6]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 4, %[[VAL_6]]) +// CHECK: %[[VAL_4:.*]] = aie.tile(3, 2) +// CHECK-NEXT: %[[VAL_5:.*]] = aie.switchbox(%[[VAL_4]]) { +// CHECK: %[[VAL_6:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_7:.*]] = aie.masterset(DMA : 1, %[[VAL_6]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 4, %[[VAL_6]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_8:.*]] = AIE.tile(4, 2) -// CHECK-NEXT: %[[VAL_9:.*]] = AIE.switchbox(%[[VAL_8]]) { -// CHECK: %[[VAL_10:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_11:.*]] = AIE.masterset(DMA : 1, %[[VAL_10]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 8, %[[VAL_10]]) +// CHECK: %[[VAL_8:.*]] = aie.tile(4, 2) +// CHECK-NEXT: %[[VAL_9:.*]] = aie.switchbox(%[[VAL_8]]) { +// CHECK: %[[VAL_10:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_11:.*]] = aie.masterset(DMA : 1, %[[VAL_10]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 8, %[[VAL_10]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.tile(5, 2) -// CHECK-NEXT: %[[VAL_13:.*]] = AIE.switchbox(%[[VAL_12]]) { -// CHECK: %[[VAL_14:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_15:.*]] = AIE.masterset(DMA : 1, %[[VAL_14]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 12, %[[VAL_14]]) +// CHECK: %[[VAL_12:.*]] = aie.tile(5, 2) +// CHECK-NEXT: %[[VAL_13:.*]] = aie.switchbox(%[[VAL_12]]) { +// CHECK: %[[VAL_14:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_15:.*]] = aie.masterset(DMA : 1, %[[VAL_14]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 12, %[[VAL_14]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.tile(2, 3) -// CHECK-NEXT: %[[VAL_17:.*]] = AIE.switchbox(%[[VAL_16]]) { -// CHECK: %[[VAL_18:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_19:.*]] = AIE.masterset(DMA : 1, %[[VAL_18]]) -// CHECK: %[[VAL_20:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_21:.*]] = AIE.masterset(South : 0, %[[VAL_20]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 1, %[[VAL_18]]) -// CHECK: AIE.rule(31, 0, %[[VAL_20]]) +// CHECK: %[[VAL_16:.*]] = aie.tile(2, 3) +// CHECK-NEXT: %[[VAL_17:.*]] = aie.switchbox(%[[VAL_16]]) { +// CHECK: %[[VAL_18:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_19:.*]] = aie.masterset(DMA : 1, %[[VAL_18]]) +// CHECK: %[[VAL_20:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_21:.*]] = aie.masterset(South : 0, %[[VAL_20]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 1, %[[VAL_18]]) +// CHECK: aie.rule(31, 0, %[[VAL_20]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_22:.*]] = AIE.tile(3, 3) -// CHECK-NEXT: %[[VAL_23:.*]] = AIE.switchbox(%[[VAL_22]]) { -// CHECK: %[[VAL_24:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_25:.*]] = AIE.masterset(DMA : 1, %[[VAL_24]]) -// CHECK: %[[VAL_26:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_27:.*]] = AIE.masterset(South : 0, %[[VAL_26]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 5, %[[VAL_24]]) -// CHECK: AIE.rule(31, 4, %[[VAL_26]]) +// CHECK: %[[VAL_22:.*]] = aie.tile(3, 3) +// CHECK-NEXT: %[[VAL_23:.*]] = aie.switchbox(%[[VAL_22]]) { +// CHECK: %[[VAL_24:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_25:.*]] = aie.masterset(DMA : 1, %[[VAL_24]]) +// CHECK: %[[VAL_26:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_27:.*]] = aie.masterset(South : 0, %[[VAL_26]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 5, %[[VAL_24]]) +// CHECK: aie.rule(31, 4, %[[VAL_26]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_28:.*]] = AIE.tile(4, 3) -// CHECK-NEXT: %[[VAL_29:.*]] = AIE.switchbox(%[[VAL_28]]) { -// CHECK: %[[VAL_30:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_31:.*]] = AIE.masterset(South : 0, %[[VAL_30]]) -// CHECK: %[[VAL_32:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_33:.*]] = AIE.masterset(DMA : 1, %[[VAL_32]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 9, %[[VAL_32]]) -// CHECK: AIE.rule(31, 8, %[[VAL_30]]) +// CHECK: %[[VAL_28:.*]] = aie.tile(4, 3) +// CHECK-NEXT: %[[VAL_29:.*]] = aie.switchbox(%[[VAL_28]]) { +// CHECK: %[[VAL_30:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_31:.*]] = aie.masterset(South : 0, %[[VAL_30]]) +// CHECK: %[[VAL_32:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_33:.*]] = aie.masterset(DMA : 1, %[[VAL_32]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 9, %[[VAL_32]]) +// CHECK: aie.rule(31, 8, %[[VAL_30]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_34:.*]] = AIE.tile(5, 3) -// CHECK-NEXT: %[[VAL_35:.*]] = AIE.switchbox(%[[VAL_34]]) { -// CHECK: %[[VAL_36:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_37:.*]] = AIE.masterset(DMA : 1, %[[VAL_36]]) -// CHECK: %[[VAL_38:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_39:.*]] = AIE.masterset(South : 0, %[[VAL_38]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 13, %[[VAL_36]]) -// CHECK: AIE.rule(31, 12, %[[VAL_38]]) +// CHECK: %[[VAL_34:.*]] = aie.tile(5, 3) +// CHECK-NEXT: %[[VAL_35:.*]] = aie.switchbox(%[[VAL_34]]) { +// CHECK: %[[VAL_36:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_37:.*]] = aie.masterset(DMA : 1, %[[VAL_36]]) +// CHECK: %[[VAL_38:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_39:.*]] = aie.masterset(South : 0, %[[VAL_38]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 13, %[[VAL_36]]) +// CHECK: aie.rule(31, 12, %[[VAL_38]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.tile(2, 4) -// CHECK-NEXT: %[[VAL_41:.*]] = AIE.switchbox(%[[VAL_40]]) { -// CHECK: %[[VAL_42:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_43:.*]] = AIE.masterset(DMA : 1, %[[VAL_42]]) -// CHECK: %[[VAL_44:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_45:.*]] = AIE.masterset(South : 0, %[[VAL_44]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 2, %[[VAL_42]]) -// CHECK: AIE.rule(30, 1, %[[VAL_44]]) +// CHECK: %[[VAL_40:.*]] = aie.tile(2, 4) +// CHECK-NEXT: %[[VAL_41:.*]] = aie.switchbox(%[[VAL_40]]) { +// CHECK: %[[VAL_42:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_43:.*]] = aie.masterset(DMA : 1, %[[VAL_42]]) +// CHECK: %[[VAL_44:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_45:.*]] = aie.masterset(South : 0, %[[VAL_44]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 2, %[[VAL_42]]) +// CHECK: aie.rule(30, 1, %[[VAL_44]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_46:.*]] = AIE.tile(3, 4) -// CHECK-NEXT: %[[VAL_47:.*]] = AIE.switchbox(%[[VAL_46]]) { -// CHECK: %[[VAL_48:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_49:.*]] = AIE.masterset(South : 0, %[[VAL_48]]) -// CHECK: %[[VAL_50:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_51:.*]] = AIE.masterset(DMA : 1, %[[VAL_50]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 6, %[[VAL_50]]) -// CHECK: AIE.rule(30, 5, %[[VAL_48]]) +// CHECK: %[[VAL_46:.*]] = aie.tile(3, 4) +// CHECK-NEXT: %[[VAL_47:.*]] = aie.switchbox(%[[VAL_46]]) { +// CHECK: %[[VAL_48:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_49:.*]] = aie.masterset(South : 0, %[[VAL_48]]) +// CHECK: %[[VAL_50:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_51:.*]] = aie.masterset(DMA : 1, %[[VAL_50]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 6, %[[VAL_50]]) +// CHECK: aie.rule(30, 5, %[[VAL_48]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_52:.*]] = AIE.tile(4, 4) -// CHECK-NEXT: %[[VAL_53:.*]] = AIE.switchbox(%[[VAL_52]]) { -// CHECK: %[[VAL_54:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_55:.*]] = AIE.masterset(DMA : 1, %[[VAL_54]]) -// CHECK: %[[VAL_56:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_57:.*]] = AIE.masterset(South : 0, %[[VAL_56]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 10, %[[VAL_54]]) -// CHECK: AIE.rule(30, 9, %[[VAL_56]]) +// CHECK: %[[VAL_52:.*]] = aie.tile(4, 4) +// CHECK-NEXT: %[[VAL_53:.*]] = aie.switchbox(%[[VAL_52]]) { +// CHECK: %[[VAL_54:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_55:.*]] = aie.masterset(DMA : 1, %[[VAL_54]]) +// CHECK: %[[VAL_56:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_57:.*]] = aie.masterset(South : 0, %[[VAL_56]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 10, %[[VAL_54]]) +// CHECK: aie.rule(30, 9, %[[VAL_56]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_58:.*]] = AIE.tile(5, 4) -// CHECK-NEXT: %[[VAL_59:.*]] = AIE.switchbox(%[[VAL_58]]) { -// CHECK: %[[VAL_60:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_61:.*]] = AIE.masterset(DMA : 1, %[[VAL_60]]) -// CHECK: %[[VAL_62:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_63:.*]] = AIE.masterset(South : 0, %[[VAL_62]]) -// CHECK: AIE.packet_rules(North : 0) { -// CHECK: AIE.rule(31, 14, %[[VAL_60]]) -// CHECK: AIE.rule(30, 13, %[[VAL_62]]) +// CHECK: %[[VAL_58:.*]] = aie.tile(5, 4) +// CHECK-NEXT: %[[VAL_59:.*]] = aie.switchbox(%[[VAL_58]]) { +// CHECK: %[[VAL_60:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_61:.*]] = aie.masterset(DMA : 1, %[[VAL_60]]) +// CHECK: %[[VAL_62:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_63:.*]] = aie.masterset(South : 0, %[[VAL_62]]) +// CHECK: aie.packet_rules(North : 0) { +// CHECK: aie.rule(31, 14, %[[VAL_60]]) +// CHECK: aie.rule(30, 13, %[[VAL_62]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_64:.*]] = AIE.tile(2, 5) -// CHECK-NEXT: %[[VAL_65:.*]] = AIE.switchbox(%[[VAL_64]]) { -// CHECK: %[[VAL_66:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_67:.*]] = AIE.masterset(DMA : 1, %[[VAL_66]]) -// CHECK: %[[VAL_68:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_69:.*]] = AIE.masterset(South : 0, %[[VAL_68]]) -// CHECK: AIE.packet_rules(East : 0) { -// CHECK: AIE.rule(31, 3, %[[VAL_66]]) -// CHECK: AIE.rule(28, 2, %[[VAL_68]]) +// CHECK: %[[VAL_64:.*]] = aie.tile(2, 5) +// CHECK-NEXT: %[[VAL_65:.*]] = aie.switchbox(%[[VAL_64]]) { +// CHECK: %[[VAL_66:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_67:.*]] = aie.masterset(DMA : 1, %[[VAL_66]]) +// CHECK: %[[VAL_68:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_69:.*]] = aie.masterset(South : 0, %[[VAL_68]]) +// CHECK: aie.packet_rules(East : 0) { +// CHECK: aie.rule(31, 3, %[[VAL_66]]) +// CHECK: aie.rule(28, 2, %[[VAL_68]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_70:.*]] = AIE.tile(3, 5) -// CHECK-NEXT: %[[VAL_71:.*]] = AIE.switchbox(%[[VAL_70]]) { -// CHECK: %[[VAL_72:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_73:.*]] = AIE.masterset(West : 0, %[[VAL_72]]) -// CHECK: %[[VAL_74:.*]] = AIE.amsel<0> (2) -// CHECK: %[[VAL_75:.*]] = AIE.masterset(South : 0, %[[VAL_74]]) -// CHECK: %[[VAL_76:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_77:.*]] = AIE.masterset(DMA : 1, %[[VAL_76]]) -// CHECK: AIE.packet_rules(East : 0) { -// CHECK: AIE.rule(31, 7, %[[VAL_76]]) -// CHECK: AIE.rule(28, 6, %[[VAL_74]]) -// CHECK: AIE.rule(28, 3, %[[VAL_72]]) +// CHECK: %[[VAL_70:.*]] = aie.tile(3, 5) +// CHECK-NEXT: %[[VAL_71:.*]] = aie.switchbox(%[[VAL_70]]) { +// CHECK: %[[VAL_72:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_73:.*]] = aie.masterset(West : 0, %[[VAL_72]]) +// CHECK: %[[VAL_74:.*]] = aie.amsel<0> (2) +// CHECK: %[[VAL_75:.*]] = aie.masterset(South : 0, %[[VAL_74]]) +// CHECK: %[[VAL_76:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_77:.*]] = aie.masterset(DMA : 1, %[[VAL_76]]) +// CHECK: aie.packet_rules(East : 0) { +// CHECK: aie.rule(31, 7, %[[VAL_76]]) +// CHECK: aie.rule(28, 6, %[[VAL_74]]) +// CHECK: aie.rule(28, 3, %[[VAL_72]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_78:.*]] = AIE.tile(4, 5) -// CHECK-NEXT: %[[VAL_79:.*]] = AIE.switchbox(%[[VAL_78]]) { -// CHECK: %[[VAL_80:.*]] = AIE.amsel<0> (2) -// CHECK: %[[VAL_81:.*]] = AIE.masterset(South : 0, %[[VAL_80]]) -// CHECK: %[[VAL_82:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_83:.*]] = AIE.masterset(DMA : 1, %[[VAL_82]]) -// CHECK: %[[VAL_84:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_85:.*]] = AIE.masterset(West : 0, %[[VAL_84]]) -// CHECK: AIE.packet_rules(East : 0) { -// CHECK: AIE.rule(31, 11, %[[VAL_82]]) -// CHECK: AIE.rule(28, 10, %[[VAL_80]]) -// CHECK: AIE.rule(24, 7, %[[VAL_84]]) +// CHECK: %[[VAL_78:.*]] = aie.tile(4, 5) +// CHECK-NEXT: %[[VAL_79:.*]] = aie.switchbox(%[[VAL_78]]) { +// CHECK: %[[VAL_80:.*]] = aie.amsel<0> (2) +// CHECK: %[[VAL_81:.*]] = aie.masterset(South : 0, %[[VAL_80]]) +// CHECK: %[[VAL_82:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_83:.*]] = aie.masterset(DMA : 1, %[[VAL_82]]) +// CHECK: %[[VAL_84:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_85:.*]] = aie.masterset(West : 0, %[[VAL_84]]) +// CHECK: aie.packet_rules(East : 0) { +// CHECK: aie.rule(31, 11, %[[VAL_82]]) +// CHECK: aie.rule(28, 10, %[[VAL_80]]) +// CHECK: aie.rule(24, 7, %[[VAL_84]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_86:.*]] = AIE.tile(5, 5) -// CHECK-NEXT: %[[VAL_87:.*]] = AIE.switchbox(%[[VAL_86]]) { -// CHECK: %[[VAL_88:.*]] = AIE.amsel<0> (1) -// CHECK: %[[VAL_89:.*]] = AIE.masterset(West : 0, %[[VAL_88]]) -// CHECK: %[[VAL_90:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_91:.*]] = AIE.masterset(DMA : 1, %[[VAL_90]]) -// CHECK: %[[VAL_92:.*]] = AIE.amsel<0> (2) -// CHECK: %[[VAL_93:.*]] = AIE.masterset(South : 0, %[[VAL_92]]) -// CHECK: AIE.packet_rules(East : 0) { -// CHECK: AIE.rule(31, 15, %[[VAL_90]]) -// CHECK: AIE.rule(28, 14, %[[VAL_92]]) -// CHECK: AIE.rule(16, 11, %[[VAL_88]]) +// CHECK: %[[VAL_86:.*]] = aie.tile(5, 5) +// CHECK-NEXT: %[[VAL_87:.*]] = aie.switchbox(%[[VAL_86]]) { +// CHECK: %[[VAL_88:.*]] = aie.amsel<0> (1) +// CHECK: %[[VAL_89:.*]] = aie.masterset(West : 0, %[[VAL_88]]) +// CHECK: %[[VAL_90:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_91:.*]] = aie.masterset(DMA : 1, %[[VAL_90]]) +// CHECK: %[[VAL_92:.*]] = aie.amsel<0> (2) +// CHECK: %[[VAL_93:.*]] = aie.masterset(South : 0, %[[VAL_92]]) +// CHECK: aie.packet_rules(East : 0) { +// CHECK: aie.rule(31, 15, %[[VAL_90]]) +// CHECK: aie.rule(28, 14, %[[VAL_92]]) +// CHECK: aie.rule(16, 11, %[[VAL_88]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_94:.*]] = AIE.tile(6, 5) -// CHECK-NEXT: %[[VAL_95:.*]] = AIE.switchbox(%[[VAL_94]]) { -// CHECK: %[[VAL_96:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_97:.*]] = AIE.masterset(West : 0, %[[VAL_96]]) -// CHECK: AIE.packet_rules(East : 0) { -// CHECK: AIE.rule(24, 15, %[[VAL_96]]) +// CHECK: %[[VAL_94:.*]] = aie.tile(6, 5) +// CHECK-NEXT: %[[VAL_95:.*]] = aie.switchbox(%[[VAL_94]]) { +// CHECK: %[[VAL_96:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_97:.*]] = aie.masterset(West : 0, %[[VAL_96]]) +// CHECK: aie.packet_rules(East : 0) { +// CHECK: aie.rule(24, 15, %[[VAL_96]]) // CHECK: } -// CHECK: AIE.packet_rules(DMA : 0) { -// CHECK: AIE.rule(24, 7, %[[VAL_96]]) +// CHECK: aie.packet_rules(DMA : 0) { +// CHECK: aie.rule(24, 7, %[[VAL_96]]) // CHECK: } // CHECK: } -// CHECK: %[[VAL_98:.*]] = AIE.tile(7, 5) -// CHECK-NEXT: %[[VAL_99:.*]] = AIE.switchbox(%[[VAL_98]]) { -// CHECK: %[[VAL_100:.*]] = AIE.amsel<0> (0) -// CHECK: %[[VAL_101:.*]] = AIE.masterset(West : 0, %[[VAL_100]]) -// CHECK: AIE.packet_rules(DMA : 0) { -// CHECK: AIE.rule(24, 15, %[[VAL_100]]) +// CHECK: %[[VAL_98:.*]] = aie.tile(7, 5) +// CHECK-NEXT: %[[VAL_99:.*]] = aie.switchbox(%[[VAL_98]]) { +// CHECK: %[[VAL_100:.*]] = aie.amsel<0> (0) +// CHECK: %[[VAL_101:.*]] = aie.masterset(West : 0, %[[VAL_100]]) +// CHECK: aie.packet_rules(DMA : 0) { +// CHECK: aie.rule(24, 15, %[[VAL_100]]) // CHECK: } // CHECK: } // CHECK: } - %tile22 = AIE.tile(2, 2) // 5'b0_0000 - %tile32 = AIE.tile(3, 2) // 5'b0_0100 - %tile42 = AIE.tile(4, 2) // 5'b0_1000 - %tile52 = AIE.tile(5, 2) // 5'b0_1100 - - %tile23 = AIE.tile(2, 3) // 5'b0_0001 - %tile33 = AIE.tile(3, 3) // 5'b0_0101 - %tile43 = AIE.tile(4, 3) // 5'b0_1001 - %tile53 = AIE.tile(5, 3) // 5'b0_1101 - - %tile24 = AIE.tile(2, 4) // 5'b0_0010 - %tile34 = AIE.tile(3, 4) // 5'b0_0110 - %tile44 = AIE.tile(4, 4) // 5'b0_1010 - %tile54 = AIE.tile(5, 4) // 5'b0_1110 - - %tile25 = AIE.tile(2, 5) // 5'b0_0011 - %tile35 = AIE.tile(3, 5) // 5'b0_0111 - %tile45 = AIE.tile(4, 5) // 5'b0_1011 - %tile55 = AIE.tile(5, 5) // 5'b0_1111 + %tile22 = aie.tile(2, 2) // 5'b0_0000 + %tile32 = aie.tile(3, 2) // 5'b0_0100 + %tile42 = aie.tile(4, 2) // 5'b0_1000 + %tile52 = aie.tile(5, 2) // 5'b0_1100 + + %tile23 = aie.tile(2, 3) // 5'b0_0001 + %tile33 = aie.tile(3, 3) // 5'b0_0101 + %tile43 = aie.tile(4, 3) // 5'b0_1001 + %tile53 = aie.tile(5, 3) // 5'b0_1101 + + %tile24 = aie.tile(2, 4) // 5'b0_0010 + %tile34 = aie.tile(3, 4) // 5'b0_0110 + %tile44 = aie.tile(4, 4) // 5'b0_1010 + %tile54 = aie.tile(5, 4) // 5'b0_1110 + + %tile25 = aie.tile(2, 5) // 5'b0_0011 + %tile35 = aie.tile(3, 5) // 5'b0_0111 + %tile45 = aie.tile(4, 5) // 5'b0_1011 + %tile55 = aie.tile(5, 5) // 5'b0_1111 // Herd "weight" - %tile65 = AIE.tile(6, 5) - %tile75 = AIE.tile(7, 5) + %tile65 = aie.tile(6, 5) + %tile75 = aie.tile(7, 5) // Tile (6, 5) streams data to the first two columns of herd "compute" @@ -273,85 +273,85 @@ module @test_pktflow_weight_pusher { // // weight[0]: 0 - 7 - AIE.packet_flow(0x0) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile22, DMA : 1> + aie.packet_flow(0x0) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile22, DMA : 1> } - AIE.packet_flow(0x1) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile23, DMA : 1> + aie.packet_flow(0x1) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile23, DMA : 1> } - AIE.packet_flow(0x2) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile24, DMA : 1> + aie.packet_flow(0x2) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile24, DMA : 1> } - AIE.packet_flow(0x3) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile25, DMA : 1> + aie.packet_flow(0x3) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile25, DMA : 1> } - AIE.packet_flow(0x4) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile32, DMA : 1> + aie.packet_flow(0x4) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile32, DMA : 1> } - AIE.packet_flow(0x5) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile33, DMA : 1> + aie.packet_flow(0x5) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile33, DMA : 1> } - AIE.packet_flow(0x6) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile34, DMA : 1> + aie.packet_flow(0x6) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile34, DMA : 1> } - AIE.packet_flow(0x7) { - AIE.packet_source<%tile65, DMA : 0> - AIE.packet_dest<%tile35, DMA : 1> + aie.packet_flow(0x7) { + aie.packet_source<%tile65, DMA : 0> + aie.packet_dest<%tile35, DMA : 1> } // weight[1]: 8 - 15 - AIE.packet_flow(0x8) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile42, DMA : 1> + aie.packet_flow(0x8) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile42, DMA : 1> } - AIE.packet_flow(0x9) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile43, DMA : 1> + aie.packet_flow(0x9) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile43, DMA : 1> } - AIE.packet_flow(0xa) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile44, DMA : 1> + aie.packet_flow(0xa) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile44, DMA : 1> } - AIE.packet_flow(0xb) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile45, DMA : 1> + aie.packet_flow(0xb) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile45, DMA : 1> } - AIE.packet_flow(0xc) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile52, DMA : 1> + aie.packet_flow(0xc) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile52, DMA : 1> } - AIE.packet_flow(0xd) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile53, DMA : 1> + aie.packet_flow(0xd) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile53, DMA : 1> } - AIE.packet_flow(0xe) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile54, DMA : 1> + aie.packet_flow(0xe) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile54, DMA : 1> } - AIE.packet_flow(0xf) { - AIE.packet_source<%tile75, DMA : 0> - AIE.packet_dest<%tile55, DMA : 1> + aie.packet_flow(0xf) { + aie.packet_source<%tile75, DMA : 0> + aie.packet_dest<%tile55, DMA : 1> } } diff --git a/test/dialect/AIE/badbuffer-ve2802.mlir b/test/dialect/AIE/badbuffer-ve2802.mlir index dedc3bb6f7..686a2ee19c 100644 --- a/test/dialect/AIE/badbuffer-ve2802.mlir +++ b/test/dialect/AIE/badbuffer-ve2802.mlir @@ -10,18 +10,18 @@ // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s // Row 2 is a memtile, not a coretile. -// CHECK: error{{.*}}'AIE.buffer' op in Column 1 and Row 2 is accessed from an unreachable tile in Column 1 and Row 3 +// CHECK: error{{.*}}'aie.buffer' op in Column 1 and Row 2 is accessed from an unreachable tile in Column 1 and Row 3 module @test { - AIE.device(xcve2802) { - %t1 = AIE.tile(1, 2) - %t2 = AIE.tile(1, 3) - %b1 = AIE.buffer(%t1) { sym_name = "a" } : memref<16xi32> - %core = AIE.core(%t2) { + aie.device(xcve2802) { + %t1 = aie.tile(1, 2) + %t2 = aie.tile(1, 3) + %b1 = aie.buffer(%t1) { sym_name = "a" } : memref<16xi32> + %core = aie.core(%t2) { %val1 = arith.constant 1 : i32 %idx1 = arith.constant 3 : index memref.store %val1, %b1[%idx1] : memref<16xi32> - AIE.end + aie.end } } } diff --git a/test/dialect/AIE/badbuffer.mlir b/test/dialect/AIE/badbuffer.mlir index a7ac7b6204..2f593e459f 100644 --- a/test/dialect/AIE/badbuffer.mlir +++ b/test/dialect/AIE/badbuffer.mlir @@ -9,16 +9,16 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.buffer' op in Column 1 and Row 1 is accessed from an unreachable tile in Column 4 and Row 4 +// CHECK: error{{.*}}'aie.buffer' op in Column 1 and Row 1 is accessed from an unreachable tile in Column 4 and Row 4 module @test { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(4, 4) - %b1 = AIE.buffer(%t1) { sym_name = "a" } : memref<16xi32> - %core = AIE.core(%t2) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(4, 4) + %b1 = aie.buffer(%t1) { sym_name = "a" } : memref<16xi32> + %core = aie.core(%t2) { %val1 = arith.constant 1 : i32 %idx1 = arith.constant 3 : index memref.store %val1, %b1[%idx1] : memref<16xi32> - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badcascade-vc1902.mlir b/test/dialect/AIE/badcascade-vc1902.mlir index a393193d84..b8f134d2ea 100644 --- a/test/dialect/AIE/badcascade-vc1902.mlir +++ b/test/dialect/AIE/badcascade-vc1902.mlir @@ -9,15 +9,15 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.putCascade' op must be a 384-bit type +// CHECK: error{{.*}}'aie.putCascade' op must be a 384-bit type module @test { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %c33 = AIE.core(%t33) { + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %c33 = aie.core(%t33) { %val2 = arith.constant 1 : i64 - AIE.putCascade(%val2: i64) - AIE.end + aie.putCascade(%val2: i64) + aie.end } } } diff --git a/test/dialect/AIE/badcascade-ve2802.mlir b/test/dialect/AIE/badcascade-ve2802.mlir index 23c592a211..2d13960e4a 100644 --- a/test/dialect/AIE/badcascade-ve2802.mlir +++ b/test/dialect/AIE/badcascade-ve2802.mlir @@ -9,15 +9,15 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.putCascade' op must be a 512-bit type +// CHECK: error{{.*}}'aie.putCascade' op must be a 512-bit type module @test { - AIE.device(xcve2802) { - %t33 = AIE.tile(3, 3) - %c33 = AIE.core(%t33) { + aie.device(xcve2802) { + %t33 = aie.tile(3, 3) + %c33 = aie.core(%t33) { %val2 = arith.constant 1 : i64 - AIE.putCascade(%val2: i64) - AIE.end + aie.putCascade(%val2: i64) + aie.end } } } diff --git a/test/dialect/AIE/badconnect.mlir b/test/dialect/AIE/badconnect.mlir index d576d95815..1c89f08af7 100644 --- a/test/dialect/AIE/badconnect.mlir +++ b/test/dialect/AIE/badconnect.mlir @@ -9,11 +9,11 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op source index cannot be less than zero +// CHECK: error{{.*}} 'aie.connect' op source index cannot be less than zero module { - %20 = AIE.tile(2, 0) - AIE.switchbox(%20) { - AIE.connect + %20 = aie.tile(2, 0) + aie.switchbox(%20) { + aie.connect } } diff --git a/test/dialect/AIE/badcore.mlir b/test/dialect/AIE/badcore.mlir index f3a339812b..0e282f94e2 100644 --- a/test/dialect/AIE/badcore.mlir +++ b/test/dialect/AIE/badcore.mlir @@ -9,11 +9,11 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.core' op failed to verify that op exists in a core tile +// CHECK: error{{.*}}'aie.core' op failed to verify that op exists in a core tile module @test { - %t1 = AIE.tile(4, 0) - %core = AIE.core(%t1) { - AIE.end + %t1 = aie.tile(4, 0) + %core = aie.core(%t1) { + aie.end } } diff --git a/test/dialect/AIE/badcore2.mlir b/test/dialect/AIE/badcore2.mlir index be42bb2873..7505327981 100644 --- a/test/dialect/AIE/badcore2.mlir +++ b/test/dialect/AIE/badcore2.mlir @@ -9,13 +9,13 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.core' op failed to verify that op exists in a core tile +// CHECK: error{{.*}}'aie.core' op failed to verify that op exists in a core tile module @test { - AIE.device(xcve2802) { - %t1 = AIE.tile(4, 1) - %core = AIE.core(%t1) { - AIE.end + aie.device(xcve2802) { + %t1 = aie.tile(4, 1) + %core = aie.core(%t1) { + aie.end } } } diff --git a/test/dialect/AIE/badgetcascade-vc1902.mlir b/test/dialect/AIE/badgetcascade-vc1902.mlir index b3d79cc47b..0fc7e3cf40 100644 --- a/test/dialect/AIE/badgetcascade-vc1902.mlir +++ b/test/dialect/AIE/badgetcascade-vc1902.mlir @@ -9,14 +9,14 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.get_cascade' op must be a 384-bit type +// CHECK: error{{.*}}'aie.get_cascade' op must be a 384-bit type module @test { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %c33 = AIE.core(%t33) { - %val2 = AIE.get_cascade() : i64 - AIE.end + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %c33 = aie.core(%t33) { + %val2 = aie.get_cascade() : i64 + aie.end } } } diff --git a/test/dialect/AIE/badgetcascade-ve2802.mlir b/test/dialect/AIE/badgetcascade-ve2802.mlir index c49986a6eb..3bc5524b3c 100644 --- a/test/dialect/AIE/badgetcascade-ve2802.mlir +++ b/test/dialect/AIE/badgetcascade-ve2802.mlir @@ -9,14 +9,14 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.get_cascade' op must be a 512-bit type +// CHECK: error{{.*}}'aie.get_cascade' op must be a 512-bit type module @test { - AIE.device(xcve2802) { - %t33 = AIE.tile(3, 3) - %c33 = AIE.core(%t33) { - %val2 = AIE.get_cascade() : i64 - AIE.end + aie.device(xcve2802) { + %t33 = aie.tile(3, 3) + %c33 = aie.core(%t33) { + %val2 = aie.get_cascade() : i64 + aie.end } } } diff --git a/test/dialect/AIE/badlock-vc1902.mlir b/test/dialect/AIE/badlock-vc1902.mlir index a99c18b7e2..780b3fccc7 100644 --- a/test/dialect/AIE/badlock-vc1902.mlir +++ b/test/dialect/AIE/badlock-vc1902.mlir @@ -9,8 +9,8 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.lock' op lock assigned invalid id (maximum is 15) +// CHECK: error{{.*}}'aie.lock' op lock assigned invalid id (maximum is 15) module @test { - %t1 = AIE.tile(1, 1) - %lock = AIE.lock(%t1, 16) { sym_name = "lock1" } + %t1 = aie.tile(1, 1) + %lock = aie.lock(%t1, 16) { sym_name = "lock1" } } diff --git a/test/dialect/AIE/badlock-ve2802.mlir b/test/dialect/AIE/badlock-ve2802.mlir index 1d91ec605a..657570ad0f 100644 --- a/test/dialect/AIE/badlock-ve2802.mlir +++ b/test/dialect/AIE/badlock-ve2802.mlir @@ -9,10 +9,10 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.lock' op lock assigned invalid id (maximum is 63) +// CHECK: error{{.*}}'aie.lock' op lock assigned invalid id (maximum is 63) module @test { - AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %lock = AIE.lock(%t1, 64) { sym_name = "lock1" } + aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %lock = aie.lock(%t1, 64) { sym_name = "lock1" } } } diff --git a/test/dialect/AIE/badlock.mlir b/test/dialect/AIE/badlock.mlir index 29c057e249..53d0661374 100644 --- a/test/dialect/AIE/badlock.mlir +++ b/test/dialect/AIE/badlock.mlir @@ -11,47 +11,47 @@ // RUN: aie-opt %s -split-input-file -verify-diagnostics -AIE.device(xcvc1902) { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(4, 4) - %lock = AIE.lock(%t2, 3) { sym_name = "lock1" } - // expected-error@-1 {{'AIE.lock' op in Column 4 and Row 4 is accessed from an unreachable tile in Column 1 and Row 1}} - AIE.core(%t1) { - AIE.use_lock(%lock, "Acquire", 1) +aie.device(xcvc1902) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(4, 4) + %lock = aie.lock(%t2, 3) { sym_name = "lock1" } + // expected-error@-1 {{'aie.lock' op in Column 4 and Row 4 is accessed from an unreachable tile in Column 1 and Row 1}} + aie.core(%t1) { + aie.use_lock(%lock, "Acquire", 1) // expected-note@-1 {{user}} - AIE.end + aie.end } } // ----- -AIE.device(xcvc1902) { - %t = AIE.tile(2, 2) - %l = AIE.lock(%t, 3) - AIE.use_lock(%l, "Acquire", 1) - // expected-error@-1 {{'AIE.use_lock' op must be used in a core or memory operation.}} +aie.device(xcvc1902) { + %t = aie.tile(2, 2) + %l = aie.lock(%t, 3) + aie.use_lock(%l, "Acquire", 1) + // expected-error@-1 {{'aie.use_lock' op must be used in a core or memory operation.}} } // ----- -AIE.device(xcvc1902) { - %t1 = AIE.tile(1, 1) - %lock = AIE.lock(%t1, -3) { sym_name = "lock1" } - // expected-error@-1 {{'AIE.lock' op attribute 'lockID' failed to satisfy constraint: 32-bit signless integer attribute whose minimum value is 0}} - AIE.core(%t1) { - AIE.use_lock(%lock, "Acquire", 1) - AIE.end +aie.device(xcvc1902) { + %t1 = aie.tile(1, 1) + %lock = aie.lock(%t1, -3) { sym_name = "lock1" } + // expected-error@-1 {{'aie.lock' op attribute 'lockID' failed to satisfy constraint: 32-bit signless integer attribute whose minimum value is 0}} + aie.core(%t1) { + aie.use_lock(%lock, "Acquire", 1) + aie.end } } // ----- -AIE.device(xcvc1902) { - %t = AIE.tile(3, 3) - %l = AIE.lock(%t, 0) - AIE.core(%t) { - // expected-error@+1 {{'AIE.use_lock' op AcquireGreaterEqual is not supported in AIE1.}} - AIE.use_lock(%l, AcquireGreaterEqual, 1) - AIE.end +aie.device(xcvc1902) { + %t = aie.tile(3, 3) + %l = aie.lock(%t, 0) + aie.core(%t) { + // expected-error@+1 {{'aie.use_lock' op AcquireGreaterEqual is not supported in AIE1.}} + aie.use_lock(%l, AcquireGreaterEqual, 1) + aie.end } } \ No newline at end of file diff --git a/test/dialect/AIE/badlockdma.mlir b/test/dialect/AIE/badlockdma.mlir index c3048c7bf5..9e79e66559 100644 --- a/test/dialect/AIE/badlockdma.mlir +++ b/test/dialect/AIE/badlockdma.mlir @@ -9,19 +9,19 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.lock' op in Column 4 and Row 4 is accessed from an unreachable tile in Column 1 and Row 1 +// CHECK: error{{.*}}'aie.lock' op in Column 4 and Row 4 is accessed from an unreachable tile in Column 1 and Row 1 module @test { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(4, 4) - %lock = AIE.lock(%t2, 3) { sym_name = "lock1" } + %t1 = aie.tile(1, 1) + %t2 = aie.tile(4, 4) + %lock = aie.lock(%t2, 3) { sym_name = "lock1" } - %mem13 = AIE.mem(%t1) { - %dma0 = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem13 = aie.mem(%t1) { + %dma0 = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock, "Acquire", 1) - AIE.use_lock(%lock, "Release", 0) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock, "Acquire", 1) + aie.use_lock(%lock, "Release", 0) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badlockfunc.mlir b/test/dialect/AIE/badlockfunc.mlir index 0bfaabbf0d..df345d3498 100644 --- a/test/dialect/AIE/badlockfunc.mlir +++ b/test/dialect/AIE/badlockfunc.mlir @@ -9,14 +9,14 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.lock' op is accessed outside of a tile +// CHECK: error{{.*}}'aie.lock' op is accessed outside of a tile module @test { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(4, 4) - %lock = AIE.lock(%t2, 3) { sym_name = "lock1" } + %t1 = aie.tile(1, 1) + %t2 = aie.tile(4, 4) + %lock = aie.lock(%t2, 3) { sym_name = "lock1" } func.func @task3() -> () { - AIE.use_lock(%lock, "Acquire", 1) + aie.use_lock(%lock, "Acquire", 1) return } } diff --git a/test/dialect/AIE/badmem.mlir b/test/dialect/AIE/badmem.mlir index 48f5ea6804..6989b38c40 100644 --- a/test/dialect/AIE/badmem.mlir +++ b/test/dialect/AIE/badmem.mlir @@ -12,13 +12,13 @@ // CHECK: 'cf.br' op is not an allowed terminator module @test { - %t1 = AIE.tile(1, 1) + %t1 = aie.tile(1, 1) - %mem13 = AIE.mem(%t1) { - %dma0 = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem13 = aie.mem(%t1) { + %dma0 = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: cf.br ^end ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badmem_duplicatechannel.mlir b/test/dialect/AIE/badmem_duplicatechannel.mlir index 6919596a84..a751562dbc 100644 --- a/test/dialect/AIE/badmem_duplicatechannel.mlir +++ b/test/dialect/AIE/badmem_duplicatechannel.mlir @@ -9,16 +9,16 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: 'AIE.dma_start' op duplicate DMA channel MM2S0 not allowed +// CHECK: 'aie.dma_start' op duplicate DMA channel MM2S0 not allowed module @test { - %t1 = AIE.tile(1, 1) + %t1 = aie.tile(1, 1) - %mem13 = AIE.mem(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %mem13 = aie.mem(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^bd0: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badmem_toomanybds.mlir b/test/dialect/AIE/badmem_toomanybds.mlir index e460e43809..d2ee04647f 100644 --- a/test/dialect/AIE/badmem_toomanybds.mlir +++ b/test/dialect/AIE/badmem_toomanybds.mlir @@ -9,63 +9,63 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: 'AIE.mem' op has more than 16 blocks +// CHECK: 'aie.mem' op has more than 16 blocks -AIE.device(xcvc1902) { - %t1 = AIE.tile(1, 1) - %buf = AIE.buffer(%t1) : memref<256xi32> - %mem = AIE.mem(%t1) { - %dma0 = AIE.dma_start("MM2S", 0, ^bd0, ^bd15) +aie.device(xcvc1902) { + %t1 = aie.tile(1, 1) + %buf = aie.buffer(%t1) : memref<256xi32> + %mem = aie.mem(%t1) { + %dma0 = aie.dma_start("MM2S", 0, ^bd0, ^bd15) ^bd0: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd1 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd3 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd4 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd4 ^bd4: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd5 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd5 ^bd5: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd6 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd6 ^bd6: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd7 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd7 ^bd7: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd8 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd8 ^bd8: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd9 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd9 ^bd9: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd10 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd10 ^bd10: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd11 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd11 ^bd11: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd12 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd12 ^bd12: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd13 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd13 ^bd13: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd14 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd14 ^bd14: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd15 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd15 ^bd15: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd16 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd16 ^bd16: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.end + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.end } } diff --git a/test/dialect/AIE/badmemtile_circ_sw.mlir b/test/dialect/AIE/badmemtile_circ_sw.mlir index 68df2f4310..6f56376cd2 100644 --- a/test/dialect/AIE/badmemtile_circ_sw.mlir +++ b/test/dialect/AIE/badmemtile_circ_sw.mlir @@ -9,11 +9,11 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal memtile stream switch connection +// CHECK: error{{.*}} 'aie.connect' op illegal memtile stream switch connection -AIE.device(xcve2802) { - %01 = AIE.tile(0, 1) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcve2802) { + %01 = aie.tile(0, 1) + aie.switchbox(%01) { + aie.connect } } diff --git a/test/dialect/AIE/badmemtile_pkt_sw.mlir b/test/dialect/AIE/badmemtile_pkt_sw.mlir index 352713a6b2..cae14a4230 100644 --- a/test/dialect/AIE/badmemtile_pkt_sw.mlir +++ b/test/dialect/AIE/badmemtile_pkt_sw.mlir @@ -9,15 +9,15 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.amsel' op illegal memtile stream switch connection +// CHECK: error{{.*}} 'aie.amsel' op illegal memtile stream switch connection -AIE.device(xcve2802) { - %01 = AIE.tile(0, 1) - AIE.switchbox(%01) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 1, %94) - AIE.packet_rules(South : 3) { - AIE.rule(31, 1, %94) +aie.device(xcve2802) { + %01 = aie.tile(0, 1) + aie.switchbox(%01) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 1, %94) + aie.packet_rules(South : 3) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badmemtiledma.mlir b/test/dialect/AIE/badmemtiledma.mlir index 25b621f342..4515d93eaa 100644 --- a/test/dialect/AIE/badmemtiledma.mlir +++ b/test/dialect/AIE/badmemtiledma.mlir @@ -9,14 +9,14 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: 'AIE.memtile_dma' op failed to verify that op exists in a MemTile +// CHECK: 'aie.memtile_dma' op failed to verify that op exists in a MemTile -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 3) - %buf = AIE.buffer(%t1) : memref<256xi32> - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^bd0) +aie.device(xcve2802) { + %t1 = aie.tile(1, 3) + %buf = aie.buffer(%t1) : memref<256xi32> + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^bd0) ^bd0: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badmemtiledma_channel4buffer.mlir b/test/dialect/AIE/badmemtiledma_channel4buffer.mlir index 06bc198949..7e797e30f7 100644 --- a/test/dialect/AIE/badmemtiledma_channel4buffer.mlir +++ b/test/dialect/AIE/badmemtiledma_channel4buffer.mlir @@ -9,29 +9,29 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.dma_bd' op is reachable from DMA channel 4 and attempts to access a non-local buffer +// CHECK: error{{.*}}'aie.dma_bd' op is reachable from DMA channel 4 and attempts to access a non-local buffer // CHECK: note: channel -// CHECK: AIE.dma_start("MM2S", 4, ^bd1, ^dma1) +// CHECK: aie.dma_start("MM2S", 4, ^bd1, ^dma1) // CHECK: note: buffer -// CHECK: %buf2 = AIE.buffer(%t2) : memref<256xi32> +// CHECK: %buf2 = aie.buffer(%t2) : memref<256xi32> -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(2, 1) - %buf1 = AIE.buffer(%t1) : memref<256xi32> - %buf2 = AIE.buffer(%t2) : memref<256xi32> - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 1, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(2, 1) + %buf1 = aie.buffer(%t1) : memref<256xi32> + %buf2 = aie.buffer(%t2) : memref<256xi32> + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 1, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 4, ^bd1, ^dma1) + aie.dma_start("MM2S", 4, ^bd1, ^dma1) ^bd0: - AIE.dma_bd(%buf1 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf1 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd1: - AIE.dma_bd(%buf2 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf2 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badmemtiledma_channel4lock.mlir b/test/dialect/AIE/badmemtiledma_channel4lock.mlir index f3b6a8e5a0..9de4558c84 100644 --- a/test/dialect/AIE/badmemtiledma_channel4lock.mlir +++ b/test/dialect/AIE/badmemtiledma_channel4lock.mlir @@ -9,31 +9,31 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.use_lock' op is reachable from DMA channel 4 and attempts to access a non-local lock +// CHECK: error{{.*}}'aie.use_lock' op is reachable from DMA channel 4 and attempts to access a non-local lock // CHECK: note: channel -// CHECK: AIE.dma_start("MM2S", 4, ^bd0, ^dma1) +// CHECK: aie.dma_start("MM2S", 4, ^bd0, ^dma1) // CHECK: note: lock -// CHECK: %lock2 = AIE.lock(%t2, 3) { sym_name = "lock2" } +// CHECK: %lock2 = aie.lock(%t2, 3) { sym_name = "lock2" } -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(2, 1) - %buf1 = AIE.buffer(%t1) : memref<256xi32> - %lock1 = AIE.lock(%t1, 3) { sym_name = "lock1" } - %lock2 = AIE.lock(%t2, 3) { sym_name = "lock2" } - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 4, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(2, 1) + %buf1 = aie.buffer(%t1) : memref<256xi32> + %lock1 = aie.lock(%t1, 3) { sym_name = "lock1" } + %lock2 = aie.lock(%t2, 3) { sym_name = "lock2" } + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 4, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd1, ^dma1) + aie.dma_start("MM2S", 1, ^bd1, ^dma1) ^bd0: - AIE.use_lock(%lock2, "Acquire", 1) - AIE.dma_bd(%buf1 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.use_lock(%lock2, "Acquire", 1) + aie.dma_bd(%buf1 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd1: - AIE.use_lock(%lock1, "Acquire", 1) - AIE.dma_bd(%buf1 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.use_lock(%lock1, "Acquire", 1) + aie.dma_bd(%buf1 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badmemtiledma_duplicatechannel.mlir b/test/dialect/AIE/badmemtiledma_duplicatechannel.mlir index ffce7318f3..cf0fd82f3f 100644 --- a/test/dialect/AIE/badmemtiledma_duplicatechannel.mlir +++ b/test/dialect/AIE/badmemtiledma_duplicatechannel.mlir @@ -9,16 +9,16 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: 'AIE.dma_start' op duplicate DMA channel MM2S0 not allowed +// CHECK: 'aie.dma_start' op duplicate DMA channel MM2S0 not allowed -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %buf = AIE.buffer(%t1) : memref<256xi32> - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %buf = aie.buffer(%t1) : memref<256xi32> + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^bd0: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badmemtiledma_neighboraccess.mlir b/test/dialect/AIE/badmemtiledma_neighboraccess.mlir index 0681bb386b..79eead4431 100644 --- a/test/dialect/AIE/badmemtiledma_neighboraccess.mlir +++ b/test/dialect/AIE/badmemtiledma_neighboraccess.mlir @@ -9,35 +9,35 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.buffer' op in Column 3 and Row 1 is accessed from an unreachable tile in Column 1 and Row 1 +// CHECK: error{{.*}}'aie.buffer' op in Column 3 and Row 1 is accessed from an unreachable tile in Column 1 and Row 1 // memtiles can only access neighboring memtiles -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(3, 1) - %t0 = AIE.tile(0, 1) - %buf = AIE.buffer(%t1) : memref<256xi32> - %buf2 = AIE.buffer(%t2) : memref<256xi32> - %buf0 = AIE.buffer(%t0) : memref<256xi32> - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(3, 1) + %t0 = aie.tile(0, 1) + %buf = aie.buffer(%t1) : memref<256xi32> + %buf2 = aie.buffer(%t2) : memref<256xi32> + %buf0 = aie.buffer(%t0) : memref<256xi32> + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd15, ^dma1) + aie.dma_start("MM2S", 1, ^bd15, ^dma1) ^bd0: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd1 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf0 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf0 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf2 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd15 + aie.dma_bd(%buf2 : memref<256xi32>, 0, 256) + aie.next_bd ^bd15 ^bd15: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd16 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd16 ^bd16: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.end + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.end } } diff --git a/test/dialect/AIE/badshim_duplicatechannel.mlir b/test/dialect/AIE/badshim_duplicatechannel.mlir index 2d6ad433dc..d5f297547d 100644 --- a/test/dialect/AIE/badshim_duplicatechannel.mlir +++ b/test/dialect/AIE/badshim_duplicatechannel.mlir @@ -9,16 +9,16 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: 'AIE.dma_start' op duplicate DMA channel MM2S0 not allowed +// CHECK: 'aie.dma_start' op duplicate DMA channel MM2S0 not allowed module @test { - %t1 = AIE.tile(2, 0) + %t1 = aie.tile(2, 0) - %mem13 = AIE.shim_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %mem13 = aie.shim_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^bd0: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badshim_notnoc.mlir b/test/dialect/AIE/badshim_notnoc.mlir index 4f12d2eb87..c1a9122922 100644 --- a/test/dialect/AIE/badshim_notnoc.mlir +++ b/test/dialect/AIE/badshim_notnoc.mlir @@ -9,16 +9,16 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: 'AIE.shim_dma' op failed to verify that op exists in a shim tile with NOC connection +// CHECK: 'aie.shim_dma' op failed to verify that op exists in a shim tile with NOC connection module @test { - %t1 = AIE.tile(1, 0) + %t1 = aie.tile(1, 0) - %mem13 = AIE.shim_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %mem13 = aie.shim_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^bd0: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badshim_toomanybds.mlir b/test/dialect/AIE/badshim_toomanybds.mlir index c96a2cadc4..2cb3e22adf 100644 --- a/test/dialect/AIE/badshim_toomanybds.mlir +++ b/test/dialect/AIE/badshim_toomanybds.mlir @@ -9,63 +9,63 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt --canonicalize %s 2>&1 | FileCheck %s -// CHECK: 'AIE.shim_dma' op has more than 16 blocks +// CHECK: 'aie.shim_dma' op has more than 16 blocks -AIE.device(xcvc1902) { - %t1 = AIE.tile(2, 0) - %buf = AIE.external_buffer : memref<256xi32> - %mem = AIE.shim_dma(%t1) { - %dma0 = AIE.dma_start("MM2S", 0, ^bd0, ^bd15) +aie.device(xcvc1902) { + %t1 = aie.tile(2, 0) + %buf = aie.external_buffer : memref<256xi32> + %mem = aie.shim_dma(%t1) { + %dma0 = aie.dma_start("MM2S", 0, ^bd0, ^bd15) ^bd0: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd1 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd3 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd4 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd4 ^bd4: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd5 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd5 ^bd5: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd6 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd6 ^bd6: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd7 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd7 ^bd7: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd8 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd8 ^bd8: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd9 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd9 ^bd9: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd10 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd10 ^bd10: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd11 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd11 ^bd11: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd12 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd12 ^bd12: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd13 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd13 ^bd13: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd14 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd14 ^bd14: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd15 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd15 ^bd15: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd16 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd16 ^bd16: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.end + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.end } } diff --git a/test/dialect/AIE/badswitchbox_dmanoc-vc1902.mlir b/test/dialect/AIE/badswitchbox_dmanoc-vc1902.mlir index 7c6c0d763d..28076286c2 100644 --- a/test/dialect/AIE/badswitchbox_dmanoc-vc1902.mlir +++ b/test/dialect/AIE/badswitchbox_dmanoc-vc1902.mlir @@ -14,12 +14,12 @@ // XFAIL: * module { - AIE.device(xcvc1902) { - %30 = AIE.tile(3, 0) // Shim-NOC - AIE.shim_mux(%30) { + aie.device(xcvc1902) { + %30 = aie.tile(3, 0) // Shim-NOC + aie.shim_mux(%30) { // Can't connect DMA and NOC in same tile. - AIE.connect - AIE.connect + aie.connect + aie.connect } } } diff --git a/test/dialect/AIE/badswitchbox_memtile_nofifo-ve2802.mlir b/test/dialect/AIE/badswitchbox_memtile_nofifo-ve2802.mlir index d9e9ddaedb..d4c9eaa330 100644 --- a/test/dialect/AIE/badswitchbox_memtile_nofifo-ve2802.mlir +++ b/test/dialect/AIE/badswitchbox_memtile_nofifo-ve2802.mlir @@ -10,13 +10,13 @@ // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.connect' op source bundle FIFO not supported +// CHECK: error{{.*}}'aie.connect' op source bundle FIFO not supported module { - AIE.device(xcve2802) { - %01 = AIE.tile(0, 1) // mem tile - AIE.switchbox(%01) { - AIE.connect // No fifo in memtile + aie.device(xcve2802) { + %01 = aie.tile(0, 1) // mem tile + aie.switchbox(%01) { + aie.connect // No fifo in memtile } } } diff --git a/test/dialect/AIE/badswitchbox_shimtile_nodma-ve2802.mlir b/test/dialect/AIE/badswitchbox_shimtile_nodma-ve2802.mlir index ffc5af4242..0540fcd7ca 100644 --- a/test/dialect/AIE/badswitchbox_shimtile_nodma-ve2802.mlir +++ b/test/dialect/AIE/badswitchbox_shimtile_nodma-ve2802.mlir @@ -10,13 +10,13 @@ // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.connect' op source bundle DMA not supported +// CHECK: error{{.*}}'aie.connect' op source bundle DMA not supported module { - AIE.device(xcve2802) { - %20 = AIE.tile(2, 0) // shim-noc tile - AIE.switchbox(%20) { - AIE.connect // No dma in shimtile.. Go through shim_mux + aie.device(xcve2802) { + %20 = aie.tile(2, 0) // shim-noc tile + aie.switchbox(%20) { + aie.connect // No dma in shimtile.. Go through shim_mux } } } diff --git a/test/dialect/AIE/badtile-ve2802.mlir b/test/dialect/AIE/badtile-ve2802.mlir index 2338eb7323..4cd7856bf9 100644 --- a/test/dialect/AIE/badtile-ve2802.mlir +++ b/test/dialect/AIE/badtile-ve2802.mlir @@ -9,10 +9,10 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.tile' op column index (50) must be less than the number of columns in the device (38) +// CHECK: error{{.*}}'aie.tile' op column index (50) must be less than the number of columns in the device (38) module @test { - AIE.device(xcve2802) { - %t1 = AIE.tile(50, 50) + aie.device(xcve2802) { + %t1 = aie.tile(50, 50) } } diff --git a/test/dialect/AIE/badtile.mlir b/test/dialect/AIE/badtile.mlir index 37cce841a2..1b96f7ae56 100644 --- a/test/dialect/AIE/badtile.mlir +++ b/test/dialect/AIE/badtile.mlir @@ -9,8 +9,8 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.tile' op attribute 'col' failed to satisfy constraint: 32-bit signless integer attribute whose minimum value is 0 +// CHECK: error{{.*}}'aie.tile' op attribute 'col' failed to satisfy constraint: 32-bit signless integer attribute whose minimum value is 0 module @test { - %t1 = AIE.tile(-1, -1) + %t1 = aie.tile(-1, -1) } diff --git a/test/dialect/AIE/badtile2.mlir b/test/dialect/AIE/badtile2.mlir index 169fb3b501..2c2aa27116 100644 --- a/test/dialect/AIE/badtile2.mlir +++ b/test/dialect/AIE/badtile2.mlir @@ -9,8 +9,8 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.tile' op column index (50) must be less than the number of columns in the device (50) +// CHECK: error{{.*}}'aie.tile' op column index (50) must be less than the number of columns in the device (50) module @test { - %t1 = AIE.tile(50, 50) + %t1 = aie.tile(50, 50) } diff --git a/test/dialect/AIE/badtiledma.mlir b/test/dialect/AIE/badtiledma.mlir index 4fb9104ef4..cb41a6114b 100644 --- a/test/dialect/AIE/badtiledma.mlir +++ b/test/dialect/AIE/badtiledma.mlir @@ -9,47 +9,47 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.use_lock' op used in a DMA block that have multiple locks. +// CHECK: error{{.*}}'aie.use_lock' op used in a DMA block that have multiple locks. module @test { - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - %t72 = AIE.tile(7, 2) + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + %t72 = aie.tile(7, 2) - %buf_e = AIE.buffer(%t63) { sym_name = "east" } : memref<256xi32> - %buf_l = AIE.buffer(%t73) { sym_name = "local" } : memref<256xi32> - %buf_n = AIE.buffer(%t74) { sym_name = "north" } : memref<256xi32> - %buf_s = AIE.buffer(%t72) { sym_name = "south" } : memref<256xi32> + %buf_e = aie.buffer(%t63) { sym_name = "east" } : memref<256xi32> + %buf_l = aie.buffer(%t73) { sym_name = "local" } : memref<256xi32> + %buf_n = aie.buffer(%t74) { sym_name = "north" } : memref<256xi32> + %buf_s = aie.buffer(%t72) { sym_name = "south" } : memref<256xi32> - %lock_e = AIE.lock(%t73, 0) - %lock_l = AIE.lock(%t73, 1) - %lock_n = AIE.lock(%t74, 0) - %lock_s = AIE.lock(%t72, 0) + %lock_e = aie.lock(%t73, 0) + %lock_l = aie.lock(%t73, 1) + %lock_n = aie.lock(%t74, 0) + %lock_s = aie.lock(%t72, 0) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_l, Acquire, 0) - AIE.dma_bd(%buf_e : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_e, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_l, Acquire, 0) + aie.dma_bd(%buf_e : memref<256xi32>, 0, 256) + aie.use_lock(%lock_e, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_l, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_l, Release, 1) + aie.next_bd ^end ^bd2: - AIE.dma_bd(%buf_n : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_n, Release, 1) - AIE.next_bd ^bd3 + aie.dma_bd(%buf_n : memref<256xi32>, 0, 256) + aie.use_lock(%lock_n, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf_s : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_s, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf_s : memref<256xi32>, 0, 256) + aie.use_lock(%lock_s, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badtiledma2.mlir b/test/dialect/AIE/badtiledma2.mlir index 9989421df7..ac37222545 100644 --- a/test/dialect/AIE/badtiledma2.mlir +++ b/test/dialect/AIE/badtiledma2.mlir @@ -9,46 +9,46 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.dma_bd' op can only access a buffer in the same tile. +// CHECK: error{{.*}}'aie.dma_bd' op can only access a buffer in the same tile. module @test { - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - %t72 = AIE.tile(7, 2) + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + %t72 = aie.tile(7, 2) - %buf_e = AIE.buffer(%t63) { sym_name = "east" } : memref<256xi32> - %buf_l = AIE.buffer(%t73) { sym_name = "local" } : memref<256xi32> - %buf_n = AIE.buffer(%t74) { sym_name = "north" } : memref<256xi32> - %buf_s = AIE.buffer(%t72) { sym_name = "south" } : memref<256xi32> + %buf_e = aie.buffer(%t63) { sym_name = "east" } : memref<256xi32> + %buf_l = aie.buffer(%t73) { sym_name = "local" } : memref<256xi32> + %buf_n = aie.buffer(%t74) { sym_name = "north" } : memref<256xi32> + %buf_s = aie.buffer(%t72) { sym_name = "south" } : memref<256xi32> - %lock_e = AIE.lock(%t63, 0) - %lock_l = AIE.lock(%t73, 0) - %lock_n = AIE.lock(%t74, 0) - %lock_s = AIE.lock(%t72, 0) + %lock_e = aie.lock(%t63, 0) + %lock_l = aie.lock(%t73, 0) + %lock_n = aie.lock(%t74, 0) + %lock_s = aie.lock(%t72, 0) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.dma_bd(%buf_e : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_e, Release, 1) - AIE.next_bd ^bd1 + aie.dma_bd(%buf_e : memref<256xi32>, 0, 256) + aie.use_lock(%lock_e, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_l, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_l, Release, 1) + aie.next_bd ^end ^bd2: - AIE.dma_bd(%buf_n : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_n, Release, 1) - AIE.next_bd ^bd3 + aie.dma_bd(%buf_n : memref<256xi32>, 0, 256) + aie.use_lock(%lock_n, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf_s : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_s, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf_s : memref<256xi32>, 0, 256) + aie.use_lock(%lock_s, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badtiledma3.mlir b/test/dialect/AIE/badtiledma3.mlir index 8b45949418..5af6a3cfc6 100644 --- a/test/dialect/AIE/badtiledma3.mlir +++ b/test/dialect/AIE/badtiledma3.mlir @@ -9,46 +9,46 @@ //===----------------------------------------------------------------------===// // RUN: not %PYTHON aiecc.py %s 2>&1 | FileCheck %s -// CHECK: error{{.*}}'AIE.use_lock' op can only access a lock in the same tile +// CHECK: error{{.*}}'aie.use_lock' op can only access a lock in the same tile module @test { - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) - %t72 = AIE.tile(7, 2) + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) + %t72 = aie.tile(7, 2) - %buf_e = AIE.buffer(%t63) { sym_name = "east" } : memref<256xi32> - %buf_l = AIE.buffer(%t73) { sym_name = "local" } : memref<256xi32> - %buf_n = AIE.buffer(%t74) { sym_name = "north" } : memref<256xi32> - %buf_s = AIE.buffer(%t72) { sym_name = "south" } : memref<256xi32> + %buf_e = aie.buffer(%t63) { sym_name = "east" } : memref<256xi32> + %buf_l = aie.buffer(%t73) { sym_name = "local" } : memref<256xi32> + %buf_n = aie.buffer(%t74) { sym_name = "north" } : memref<256xi32> + %buf_s = aie.buffer(%t72) { sym_name = "south" } : memref<256xi32> - %lock_e = AIE.lock(%t63, 0) - %lock_l = AIE.lock(%t73, 0) - %lock_n = AIE.lock(%t74, 0) - %lock_s = AIE.lock(%t72, 0) + %lock_e = aie.lock(%t63, 0) + %lock_l = aie.lock(%t73, 0) + %lock_n = aie.lock(%t74, 0) + %lock_s = aie.lock(%t72, 0) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_e, Release, 1) - AIE.next_bd ^bd1 + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_e, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_l, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_l, Release, 1) + aie.next_bd ^end ^bd2: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_n, Release, 1) - AIE.next_bd ^bd3 + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_n, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_s, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf_l : memref<256xi32>, 0, 256) + aie.use_lock(%lock_s, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/badtrace_core-vc1902.mlir b/test/dialect/AIE/badtrace_core-vc1902.mlir index 2e8dfcce56..8e12b5f452 100644 --- a/test/dialect/AIE/badtrace_core-vc1902.mlir +++ b/test/dialect/AIE/badtrace_core-vc1902.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcvc1902) { - %01 = AIE.tile(0, 3) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcvc1902) { + %01 = aie.tile(0, 3) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcvc1902) { - %02 = AIE.tile(0, 3) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcvc1902) { + %02 = aie.tile(0, 3) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badtrace_core-ve2302.mlir b/test/dialect/AIE/badtrace_core-ve2302.mlir index 13e62a938f..cc7458b46f 100644 --- a/test/dialect/AIE/badtrace_core-ve2302.mlir +++ b/test/dialect/AIE/badtrace_core-ve2302.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcve2302) { - %01 = AIE.tile(0, 3) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcve2302) { + %01 = aie.tile(0, 3) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcve2302) { - %02 = AIE.tile(0, 3) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcve2302) { + %02 = aie.tile(0, 3) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badtrace_core-ve2802.mlir b/test/dialect/AIE/badtrace_core-ve2802.mlir index 4f5450d97f..433a2fba67 100644 --- a/test/dialect/AIE/badtrace_core-ve2802.mlir +++ b/test/dialect/AIE/badtrace_core-ve2802.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcve2802) { - %01 = AIE.tile(0, 3) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcve2802) { + %01 = aie.tile(0, 3) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcve2802) { - %02 = AIE.tile(0, 3) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcve2802) { + %02 = aie.tile(0, 3) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badtrace_memtile-ve2302.mlir b/test/dialect/AIE/badtrace_memtile-ve2302.mlir index bab8f6ecfa..3210c0c08d 100644 --- a/test/dialect/AIE/badtrace_memtile-ve2302.mlir +++ b/test/dialect/AIE/badtrace_memtile-ve2302.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcve2302) { - %01 = AIE.tile(0, 1) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcve2302) { + %01 = aie.tile(0, 1) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcve2302) { - %02 = AIE.tile(0, 1) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcve2302) { + %02 = aie.tile(0, 1) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badtrace_memtile-ve2802.mlir b/test/dialect/AIE/badtrace_memtile-ve2802.mlir index 3bc0481d43..8e3a999ad3 100644 --- a/test/dialect/AIE/badtrace_memtile-ve2802.mlir +++ b/test/dialect/AIE/badtrace_memtile-ve2802.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcve2802) { - %01 = AIE.tile(2, 1) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcve2802) { + %01 = aie.tile(2, 1) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcve2802) { - %02 = AIE.tile(0, 1) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcve2802) { + %02 = aie.tile(0, 1) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badtrace_shim-vc1902.mlir b/test/dialect/AIE/badtrace_shim-vc1902.mlir index 198ad5d73f..ae739be0d2 100644 --- a/test/dialect/AIE/badtrace_shim-vc1902.mlir +++ b/test/dialect/AIE/badtrace_shim-vc1902.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcvc1902) { - %01 = AIE.tile(2, 0) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcvc1902) { + %01 = aie.tile(2, 0) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcvc1902) { - %02 = AIE.tile(1, 0) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcvc1902) { + %02 = aie.tile(1, 0) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badtrace_shim-ve2302.mlir b/test/dialect/AIE/badtrace_shim-ve2302.mlir index bd2522eb74..390f9fd44f 100644 --- a/test/dialect/AIE/badtrace_shim-ve2302.mlir +++ b/test/dialect/AIE/badtrace_shim-ve2302.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcve2302) { - %01 = AIE.tile(2, 0) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcve2302) { + %01 = aie.tile(2, 0) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcve2302) { - %02 = AIE.tile(1, 0) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcve2302) { + %02 = aie.tile(1, 0) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/badtrace_shim-ve2802.mlir b/test/dialect/AIE/badtrace_shim-ve2802.mlir index 4140b7633d..eebd45a199 100644 --- a/test/dialect/AIE/badtrace_shim-ve2802.mlir +++ b/test/dialect/AIE/badtrace_shim-ve2802.mlir @@ -9,26 +9,26 @@ //===----------------------------------------------------------------------===// // RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s -// CHECK: error{{.*}} 'AIE.connect' op illegal Trace destination +// CHECK: error{{.*}} 'aie.connect' op illegal Trace destination -AIE.device(xcve2802) { - %01 = AIE.tile(2, 0) - AIE.switchbox(%01) { - AIE.connect +aie.device(xcve2802) { + %01 = aie.tile(2, 0) + aie.switchbox(%01) { + aie.connect } } // ----- -// CHECK: error{{.*}} 'AIE.amsel' op illegal Trace destination +// CHECK: error{{.*}} 'aie.amsel' op illegal Trace destination -AIE.device(xcve2802) { - %02 = AIE.tile(1, 0) - AIE.switchbox(%02) { - %94 = AIE.amsel<0> (0) - %95 = AIE.masterset(North : 0, %94) - AIE.packet_rules(Trace : 1) { - AIE.rule(31, 1, %94) +aie.device(xcve2802) { + %02 = aie.tile(1, 0) + aie.switchbox(%02) { + %94 = aie.amsel<0> (0) + %95 = aie.masterset(North : 0, %94) + aie.packet_rules(Trace : 1) { + aie.rule(31, 1, %94) } } } diff --git a/test/dialect/AIE/canonicalize-mem.mlir b/test/dialect/AIE/canonicalize-mem.mlir index e46c5eaf5a..ab1181ce9f 100644 --- a/test/dialect/AIE/canonicalize-mem.mlir +++ b/test/dialect/AIE/canonicalize-mem.mlir @@ -9,31 +9,31 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --canonicalize %s | FileCheck %s -// Verify that canonicalize does not remove chained AIE.next_bd +// Verify that canonicalize does not remove chained aie.next_bd // CHECK-LABEL: module @test { -// CHECK-NEXT: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK-NEXT: %[[VAL_1:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK-NEXT: %[[VAL_2:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK-NEXT: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK-NEXT: %[[VAL_1:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK-NEXT: %[[VAL_2:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK-NEXT: ^bb1: // pred: ^bb0 -// CHECK-NEXT: AIE.next_bd ^bb2 +// CHECK-NEXT: aie.next_bd ^bb2 // CHECK-NEXT: ^bb2: // pred: ^bb1 -// CHECK-NEXT: AIE.next_bd ^bb3 +// CHECK-NEXT: aie.next_bd ^bb3 // CHECK-NEXT: ^bb3: // 2 preds: ^bb0, ^bb2 -// CHECK-NEXT: AIE.end +// CHECK-NEXT: aie.end // CHECK-NEXT: } // CHECK-NEXT: } module @test { - %t1 = AIE.tile(1, 1) + %t1 = aie.tile(1, 1) - %mem13 = AIE.mem(%t1) { - %dma0 = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem13 = aie.mem(%t1) { + %dma0 = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.next_bd ^bd1 // point to the next BD, or termination + aie.next_bd ^bd1 // point to the next BD, or termination ^bd1: - AIE.next_bd ^end // point to the next BD, or termination + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/cascade-vc1902.mlir b/test/dialect/AIE/cascade-vc1902.mlir index ce51c454e7..232d9fa36a 100644 --- a/test/dialect/AIE/cascade-vc1902.mlir +++ b/test/dialect/AIE/cascade-vc1902.mlir @@ -12,12 +12,12 @@ // RUN: aie-opt %s module @test { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %c33 = AIE.core(%t33) { - %val2 = AIE.get_cascade() : i384 - AIE.putCascade(%val2: i384) - AIE.end + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %c33 = aie.core(%t33) { + %val2 = aie.get_cascade() : i384 + aie.putCascade(%val2: i384) + aie.end } } } diff --git a/test/dialect/AIE/cascade-ve2802.mlir b/test/dialect/AIE/cascade-ve2802.mlir index 7758cb614b..ad5bd02aa6 100644 --- a/test/dialect/AIE/cascade-ve2802.mlir +++ b/test/dialect/AIE/cascade-ve2802.mlir @@ -11,12 +11,12 @@ // RUN: aie-opt %s module @test { - AIE.device(xcve2802) { - %t33 = AIE.tile(3, 3) - %c33 = AIE.core(%t33) { - %val2 = AIE.get_cascade() : vector<16xi32> - AIE.putCascade(%val2: vector<16xi32>) - AIE.end + aie.device(xcve2802) { + %t33 = aie.tile(3, 3) + %c33 = aie.core(%t33) { + %val2 = aie.get_cascade() : vector<16xi32> + aie.putCascade(%val2: vector<16xi32>) + aie.end } } diff --git a/test/dialect/AIE/example0.mlir b/test/dialect/AIE/example0.mlir index 668976ff35..5b57a8aae0 100644 --- a/test/dialect/AIE/example0.mlir +++ b/test/dialect/AIE/example0.mlir @@ -30,105 +30,105 @@ module @example0 { // (2, 3) (3, 3) (4, 3) (5, 3) // (2, 2) (3, 2) (4, 2) (5, 2) - %t33 = AIE.tile(3, 3) - %t42 = AIE.tile(4, 2) - %t44 = AIE.tile(4, 4) + %t33 = aie.tile(3, 3) + %t42 = aie.tile(4, 2) + %t44 = aie.tile(4, 4) - %l33_0 = AIE.lock(%t33, 0) - %l33_1 = AIE.lock(%t33, 1) - %l42_0 = AIE.lock(%t42, 0) - %l44_0 = AIE.lock(%t44, 0) + %l33_0 = aie.lock(%t33, 0) + %l33_1 = aie.lock(%t33, 1) + %l42_0 = aie.lock(%t42, 0) + %l44_0 = aie.lock(%t44, 0) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf42 = AIE.buffer(%t42) : memref<256xi32> - %buf44 = AIE.buffer(%t44) : memref<256xi32> + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf42 = aie.buffer(%t42) : memref<256xi32> + %buf44 = aie.buffer(%t44) : memref<256xi32> - %m33 = AIE.mem(%t33) { - %dmaSt0 = AIE.dma_start(MM2S, 0, ^bd0, ^dma0) + %m33 = aie.mem(%t33) { + %dmaSt0 = aie.dma_start(MM2S, 0, ^bd0, ^dma0) ^dma0: - %dmaSt1 = AIE.dma_start("MM2S", 1, ^bd1, ^end) + %dmaSt1 = aie.dma_start("MM2S", 1, ^bd1, ^end) ^bd0: - AIE.use_lock(%l33_0, Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_0, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l33_0, Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_0, Release, 0) + aie.next_bd ^end ^bd1: - AIE.use_lock(%l33_1, Acquire, 0) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_1, Release, 1) - AIE.next_bd ^end + aie.use_lock(%l33_1, Acquire, 0) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_1, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m42 = AIE.mem(%t42) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m42 = aie.mem(%t42) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l42_0, Acquire, 0) - AIE.dma_bd(%buf42 : memref<256xi32>, 0, 256) - AIE.use_lock(%l42_0, Release, 1) - AIE.next_bd ^end + aie.use_lock(%l42_0, Acquire, 0) + aie.dma_bd(%buf42 : memref<256xi32>, 0, 256) + aie.use_lock(%l42_0, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m44 = AIE.mem(%t44) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m44 = aie.mem(%t44) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l44_0, Acquire, 1) - AIE.dma_bd(%buf44 : memref<256xi32>, 0, 256) - AIE.use_lock(%l44_0, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l44_0, Acquire, 1) + aie.dma_bd(%buf44 : memref<256xi32>, 0, 256) + aie.use_lock(%l44_0, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %s33 = AIE.switchbox(%t33) { - AIE.connect - AIE.connect + %s33 = aie.switchbox(%t33) { + aie.connect + aie.connect } - %s42 = AIE.switchbox(%t42) { - AIE.connect + %s42 = aie.switchbox(%t42) { + aie.connect } - %s44 = AIE.switchbox(%t44) { - AIE.connect + %s44 = aie.switchbox(%t44) { + aie.connect } - %c33 = AIE.core(%t33) { - AIE.use_lock(%l33_1, Acquire, 0) - AIE.use_lock(%l33_0, Acquire, 0) + %c33 = aie.core(%t33) { + aie.use_lock(%l33_1, Acquire, 0) + aie.use_lock(%l33_0, Acquire, 0) // code %val0 = arith.constant 16 : i32 %0 = arith.constant 0 : i32 - AIE.put_stream(%0 : i32, %val0 : i32) - %val1 = AIE.get_stream(%0 : i32) : i128 + aie.put_stream(%0 : i32, %val0 : i32) + %val1 = aie.get_stream(%0 : i32) : i128 %val2 = arith.constant 1 : i384 - AIE.putCascade(%val2: i384) + aie.putCascade(%val2: i384) - AIE.use_lock(%l33_0, Release, 1) - AIE.use_lock(%l33_1, Release, 1) + aie.use_lock(%l33_0, Release, 1) + aie.use_lock(%l33_1, Release, 1) - AIE.end + aie.end } - %c42 = AIE.core(%t42) { - AIE.use_lock(%l42_0, Acquire, 1) + %c42 = aie.core(%t42) { + aie.use_lock(%l42_0, Acquire, 1) // code - AIE.use_lock(%l42_0, Release, 0) - AIE.end + aie.use_lock(%l42_0, Release, 0) + aie.end } - %c44 = AIE.core(%t44) { - AIE.use_lock(%l44_0, Acquire, 1) + %c44 = aie.core(%t44) { + aie.use_lock(%l44_0, Acquire, 1) // code - AIE.use_lock(%l44_0, Release, 0) - AIE.end + aie.use_lock(%l44_0, Release, 0) + aie.end } } diff --git a/test/dialect/AIE/memory-affinity-vc1902.mlir b/test/dialect/AIE/memory-affinity-vc1902.mlir index 6b89dd1185..f764657016 100644 --- a/test/dialect/AIE/memory-affinity-vc1902.mlir +++ b/test/dialect/AIE/memory-affinity-vc1902.mlir @@ -16,7 +16,7 @@ // CHECK: } module @example0 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // Odd AIE rows: DMem on the East // Even AIE rows: DMem on the West @@ -29,37 +29,37 @@ module @example0 { // v // (2, 2) (3, 2) (4, 2) (5, 2) - %t33 = AIE.tile(3, 3) - %t32 = AIE.tile(3, 2) - %t34 = AIE.tile(3, 4) - %t23 = AIE.tile(2, 3) - %t35 = AIE.tile(3, 5) - %t44 = AIE.tile(4, 4) + %t33 = aie.tile(3, 3) + %t32 = aie.tile(3, 2) + %t34 = aie.tile(3, 4) + %t23 = aie.tile(2, 3) + %t35 = aie.tile(3, 5) + %t44 = aie.tile(4, 4) - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf32 = AIE.buffer(%t32) : memref<256xi32> - %buf34 = AIE.buffer(%t34) : memref<256xi32> - %buf23 = AIE.buffer(%t23) : memref<256xi32> - %buf35 = AIE.buffer(%t35) : memref<256xi32> - %buf44 = AIE.buffer(%t44) : memref<256xi32> + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf32 = aie.buffer(%t32) : memref<256xi32> + %buf34 = aie.buffer(%t34) : memref<256xi32> + %buf23 = aie.buffer(%t23) : memref<256xi32> + %buf35 = aie.buffer(%t35) : memref<256xi32> + %buf44 = aie.buffer(%t44) : memref<256xi32> - %c33 = AIE.core(%t33) { + %c33 = aie.core(%t33) { %idx1 = arith.constant 3 : index %val1 = arith.constant 7 : i32 memref.store %val1, %buf33[%idx1] : memref<256xi32> memref.store %val1, %buf32[%idx1] : memref<256xi32> memref.store %val1, %buf34[%idx1] : memref<256xi32> memref.store %val1, %buf23[%idx1] : memref<256xi32> - AIE.end + aie.end } - %c34 = AIE.core(%t34) { + %c34 = aie.core(%t34) { %idx1 = arith.constant 3 : index %val1 = arith.constant 7 : i32 memref.store %val1, %buf34[%idx1] : memref<256xi32> memref.store %val1, %buf33[%idx1] : memref<256xi32> memref.store %val1, %buf35[%idx1] : memref<256xi32> memref.store %val1, %buf44[%idx1] : memref<256xi32> - AIE.end + aie.end } } } diff --git a/test/dialect/AIE/memory-affinity-vc2302.mlir b/test/dialect/AIE/memory-affinity-vc2302.mlir index 9482a8459e..7347fea1fa 100644 --- a/test/dialect/AIE/memory-affinity-vc2302.mlir +++ b/test/dialect/AIE/memory-affinity-vc2302.mlir @@ -16,7 +16,7 @@ // CHECK: } module @example0 { - AIE.device(xcve2302) { + aie.device(xcve2302) { // All AIE rows: Local Memory on the East @@ -24,28 +24,28 @@ module @example0 { // v // (2, 2) (3, 2) (4, 2) (5, 2) - %t33 = AIE.tile(3, 3) - %t32 = AIE.tile(3, 2) - // %t34 = AIE.tile(3, 4) - %t23 = AIE.tile(2, 3) - // %t35 = AIE.tile(3, 5) - // %t24 = AIE.tile(2, 4) - - %buf33 = AIE.buffer(%t33) : memref<256xi32> - %buf32 = AIE.buffer(%t32) : memref<256xi32> - // %buf34 = AIE.buffer(%t34) : memref<256xi32> - %buf23 = AIE.buffer(%t23) : memref<256xi32> - // %buf35 = AIE.buffer(%t35) : memref<256xi32> - // %buf24 = AIE.buffer(%t24) : memref<256xi32> - - %c33 = AIE.core(%t33) { + %t33 = aie.tile(3, 3) + %t32 = aie.tile(3, 2) + // %t34 = aie.tile(3, 4) + %t23 = aie.tile(2, 3) + // %t35 = aie.tile(3, 5) + // %t24 = aie.tile(2, 4) + + %buf33 = aie.buffer(%t33) : memref<256xi32> + %buf32 = aie.buffer(%t32) : memref<256xi32> + // %buf34 = aie.buffer(%t34) : memref<256xi32> + %buf23 = aie.buffer(%t23) : memref<256xi32> + // %buf35 = aie.buffer(%t35) : memref<256xi32> + // %buf24 = aie.buffer(%t24) : memref<256xi32> + + %c33 = aie.core(%t33) { %idx1 = arith.constant 3 : index %val1 = arith.constant 7 : i32 memref.store %val1, %buf33[%idx1] : memref<256xi32> memref.store %val1, %buf32[%idx1] : memref<256xi32> // memref.store %val1, %buf34[%idx1] : memref<256xi32> memref.store %val1, %buf23[%idx1] : memref<256xi32> - AIE.end + aie.end } } } diff --git a/test/dialect/AIE/memory-affinity-vc2802.mlir b/test/dialect/AIE/memory-affinity-vc2802.mlir index 88e2ab857c..3c2a4ef8c8 100644 --- a/test/dialect/AIE/memory-affinity-vc2802.mlir +++ b/test/dialect/AIE/memory-affinity-vc2802.mlir @@ -16,7 +16,7 @@ // CHECK: } module @example0 { - AIE.device(xcve2802) { + aie.device(xcve2802) { // All AIE rows: Local Memory on the East // (2, 5) (3, 5) (4, 5) (5, 5) @@ -27,37 +27,37 @@ module @example0 { // X // (2, 2) (3, 2) (4, 2) (5, 2) // Memtile row - %t33 = AIE.tile(3, 3) - // %t32 = AIE.tile(3, 2) This is a mem tile and can't be accessed - %t34 = AIE.tile(3, 4) - %t23 = AIE.tile(2, 3) - %t35 = AIE.tile(3, 5) - %t24 = AIE.tile(2, 4) - - %buf33 = AIE.buffer(%t33) : memref<256xi32> - // %buf32 = AIE.buffer(%t32) : memref<256xi32> - %buf34 = AIE.buffer(%t34) : memref<256xi32> - %buf23 = AIE.buffer(%t23) : memref<256xi32> - %buf35 = AIE.buffer(%t35) : memref<256xi32> - %buf24 = AIE.buffer(%t24) : memref<256xi32> - - %c33 = AIE.core(%t33) { + %t33 = aie.tile(3, 3) + // %t32 = aie.tile(3, 2) This is a mem tile and can't be accessed + %t34 = aie.tile(3, 4) + %t23 = aie.tile(2, 3) + %t35 = aie.tile(3, 5) + %t24 = aie.tile(2, 4) + + %buf33 = aie.buffer(%t33) : memref<256xi32> + // %buf32 = aie.buffer(%t32) : memref<256xi32> + %buf34 = aie.buffer(%t34) : memref<256xi32> + %buf23 = aie.buffer(%t23) : memref<256xi32> + %buf35 = aie.buffer(%t35) : memref<256xi32> + %buf24 = aie.buffer(%t24) : memref<256xi32> + + %c33 = aie.core(%t33) { %idx1 = arith.constant 3 : index %val1 = arith.constant 7 : i32 memref.store %val1, %buf33[%idx1] : memref<256xi32> // memref.store %val1, %buf32[%idx1] : memref<256xi32> memref.store %val1, %buf34[%idx1] : memref<256xi32> memref.store %val1, %buf23[%idx1] : memref<256xi32> - AIE.end + aie.end } - %c34 = AIE.core(%t34) { + %c34 = aie.core(%t34) { %idx1 = arith.constant 3 : index %val1 = arith.constant 7 : i32 memref.store %val1, %buf34[%idx1] : memref<256xi32> memref.store %val1, %buf33[%idx1] : memref<256xi32> memref.store %val1, %buf35[%idx1] : memref<256xi32> memref.store %val1, %buf24[%idx1] : memref<256xi32> - AIE.end + aie.end } } } diff --git a/test/dialect/AIE/memtiledma.mlir b/test/dialect/AIE/memtiledma.mlir index a735aa4f4f..d740b09ee6 100644 --- a/test/dialect/AIE/memtiledma.mlir +++ b/test/dialect/AIE/memtiledma.mlir @@ -15,63 +15,63 @@ // CHECK-LABEL: module { // CHECK: } -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %buf = AIE.buffer(%t1) : memref<256xi32> - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %buf = aie.buffer(%t1) : memref<256xi32> + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd15, ^dma1) + aie.dma_start("MM2S", 1, ^bd15, ^dma1) ^bd0: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd1 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd3 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd4 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd4 ^bd4: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd5 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd5 ^bd5: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd6 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd6 ^bd6: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd7 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd7 ^bd7: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd8 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd8 ^bd8: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd9 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd9 ^bd9: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd10 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd10 ^bd10: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd11 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd11 ^bd11: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd12 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd12 ^bd12: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd13 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd13 ^bd13: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd14 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd14 ^bd14: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd15 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd15 ^bd15: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd16 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd16 ^bd16: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.end + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.end } } diff --git a/test/dialect/AIE/memtiledma_channel4buffer.mlir b/test/dialect/AIE/memtiledma_channel4buffer.mlir index b05121b082..c29a297aa0 100644 --- a/test/dialect/AIE/memtiledma_channel4buffer.mlir +++ b/test/dialect/AIE/memtiledma_channel4buffer.mlir @@ -15,22 +15,22 @@ // CHECK-LABEL: module { // CHECK: } -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(2, 1) - %buf1 = AIE.buffer(%t1) : memref<256xi32> - %buf2 = AIE.buffer(%t2) : memref<256xi32> - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 4, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(2, 1) + %buf1 = aie.buffer(%t1) : memref<256xi32> + %buf2 = aie.buffer(%t2) : memref<256xi32> + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 4, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd1, ^dma1) + aie.dma_start("MM2S", 1, ^bd1, ^dma1) ^bd0: - AIE.dma_bd(%buf1 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf1 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd1: - AIE.dma_bd(%buf2 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf2 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/memtiledma_channel4lock.mlir b/test/dialect/AIE/memtiledma_channel4lock.mlir index e4bd199910..61135e2add 100644 --- a/test/dialect/AIE/memtiledma_channel4lock.mlir +++ b/test/dialect/AIE/memtiledma_channel4lock.mlir @@ -15,25 +15,25 @@ // CHECK-LABEL: module { // CHECK: } -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(2, 1) - %buf1 = AIE.buffer(%t1) : memref<256xi32> - %lock1 = AIE.lock(%t1, 3) { sym_name = "lock1" } - %lock2 = AIE.lock(%t2, 3) { sym_name = "lock2" } - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 4, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(2, 1) + %buf1 = aie.buffer(%t1) : memref<256xi32> + %lock1 = aie.lock(%t1, 3) { sym_name = "lock1" } + %lock2 = aie.lock(%t2, 3) { sym_name = "lock2" } + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 4, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd1, ^dma1) + aie.dma_start("MM2S", 1, ^bd1, ^dma1) ^bd0: - AIE.use_lock(%lock1, "Acquire", 1) - AIE.dma_bd(%buf1 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.use_lock(%lock1, "Acquire", 1) + aie.dma_bd(%buf1 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd1: - AIE.use_lock(%lock2, "Acquire", 1) - AIE.dma_bd(%buf1 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.use_lock(%lock2, "Acquire", 1) + aie.dma_bd(%buf1 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/memtiledma_neighboraccess.mlir b/test/dialect/AIE/memtiledma_neighboraccess.mlir index dfd0144a29..73da83a2a9 100644 --- a/test/dialect/AIE/memtiledma_neighboraccess.mlir +++ b/test/dialect/AIE/memtiledma_neighboraccess.mlir @@ -15,31 +15,31 @@ // CHECK-LABEL: module { // CHECK: } -AIE.device(xcve2802) { - %t1 = AIE.tile(1, 1) - %t2 = AIE.tile(2, 1) - %t0 = AIE.tile(0, 1) - %buf = AIE.buffer(%t1) : memref<256xi32> - %buf2 = AIE.buffer(%t2) : memref<256xi32> - %buf0 = AIE.buffer(%t0) : memref<256xi32> - %mem = AIE.memtile_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) +aie.device(xcve2802) { + %t1 = aie.tile(1, 1) + %t2 = aie.tile(2, 1) + %t0 = aie.tile(0, 1) + %buf = aie.buffer(%t1) : memref<256xi32> + %buf2 = aie.buffer(%t2) : memref<256xi32> + %buf0 = aie.buffer(%t0) : memref<256xi32> + %mem = aie.memtile_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd15, ^dma1) + aie.dma_start("MM2S", 1, ^bd15, ^dma1) ^bd0: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd1 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf0 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf0 : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf2 : memref<256xi32>, 0, 256) - AIE.next_bd ^bd15 + aie.dma_bd(%buf2 : memref<256xi32>, 0, 256) + aie.next_bd ^bd15 ^bd15: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd16 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd16 ^bd16: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.end + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.end } } diff --git a/test/dialect/AIE/nd-dma-oob.mlir b/test/dialect/AIE/nd-dma-oob.mlir index ad670d5871..814b4a6112 100644 --- a/test/dialect/AIE/nd-dma-oob.mlir +++ b/test/dialect/AIE/nd-dma-oob.mlir @@ -12,28 +12,28 @@ module @tutorial_2b { - AIE.device(xcve2802) { - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) + aie.device(xcve2802) { + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) - AIE.flow(%tile14, DMA : 0, %tile34, DMA : 0) + aie.flow(%tile14, DMA : 0, %tile34, DMA : 0) - %buf14 = AIE.buffer(%tile14) { sym_name = "buf14" } : memref<128xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "buf14" } : memref<128xi32> - %lock14_done = AIE.lock(%tile14, 0) { init = 0 : i32, sym_name = "lock14_done" } + %lock14_done = aie.lock(%tile14, 0) { init = 0 : i32, sym_name = "lock14_done" } - %mem14 = AIE.mem(%tile14) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: // The following should generate an out-of-bounds error: the second // repetition of accessing array %buf14 with stride of 128 will // attempt an access at index 128, which is OOB for a 128xi32 // memref. // expected-error@+1 {{Specified stepsize(s) and wrap(s) result in out of bounds access}} - AIE.dma_bd(%buf14 : memref<128xi32>, 0, 128, []) - AIE.next_bd ^end + aie.dma_bd(%buf14 : memref<128xi32>, 0, 128, []) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/nd-dma-too-many-dims-1.mlir b/test/dialect/AIE/nd-dma-too-many-dims-1.mlir index 42471f7ff3..b592187d9a 100644 --- a/test/dialect/AIE/nd-dma-too-many-dims-1.mlir +++ b/test/dialect/AIE/nd-dma-too-many-dims-1.mlir @@ -12,19 +12,19 @@ module @tutorial_2b { - AIE.device(xcve2802) { - %tile31 = AIE.tile(3, 1) + aie.device(xcve2802) { + %tile31 = aie.tile(3, 1) - %buf31 = AIE.buffer(%tile31) { sym_name = "buf31" } : memref<128xi32> + %buf31 = aie.buffer(%tile31) { sym_name = "buf31" } : memref<128xi32> - %mem31 = AIE.memtile_dma(%tile31) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem31 = aie.memtile_dma(%tile31) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: //expected-error@+1 {{Cannot give more than 4 dimensions}} - AIE.dma_bd(%buf31 : memref<128xi32>, 0, 128, [, , , , ]) - AIE.next_bd ^end + aie.dma_bd(%buf31 : memref<128xi32>, 0, 128, [, , , , ]) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/nd-dma-too-many-dims-2.mlir b/test/dialect/AIE/nd-dma-too-many-dims-2.mlir index 763e39a2a2..24e1b360dc 100644 --- a/test/dialect/AIE/nd-dma-too-many-dims-2.mlir +++ b/test/dialect/AIE/nd-dma-too-many-dims-2.mlir @@ -12,19 +12,19 @@ module @tutorial_2b { - AIE.device(xcve2802) { - %tile33 = AIE.tile(3, 3) + aie.device(xcve2802) { + %tile33 = aie.tile(3, 3) - %buf33 = AIE.buffer(%tile33) { sym_name = "buf33" } : memref<128xi32> + %buf33 = aie.buffer(%tile33) { sym_name = "buf33" } : memref<128xi32> - %mem33 = AIE.mem(%tile33) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem33 = aie.mem(%tile33) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: //expected-error@+1 {{Cannot give more than 3 dimensions}} - AIE.dma_bd(%buf33 : memref<128xi32>, 0, 128, [, , , ]) - AIE.next_bd ^end + aie.dma_bd(%buf33 : memref<128xi32>, 0, 128, [, , , ]) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/dialect/AIE/shimdma.mlir b/test/dialect/AIE/shimdma.mlir index 1d9cd58cf0..6aaf7223b7 100644 --- a/test/dialect/AIE/shimdma.mlir +++ b/test/dialect/AIE/shimdma.mlir @@ -15,60 +15,60 @@ // CHECK-LABEL: module { // CHECK: } -AIE.device(xcvc1902) { - %t1 = AIE.tile(2, 0) - %buf = AIE.external_buffer : memref<256xi32> - %mem = AIE.shim_dma(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) +aie.device(xcvc1902) { + %t1 = aie.tile(2, 0) + %buf = aie.external_buffer : memref<256xi32> + %mem = aie.shim_dma(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd15, ^dma1) + aie.dma_start("MM2S", 1, ^bd15, ^dma1) ^bd0: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd1 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd3 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd4 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd4 ^bd4: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd5 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd5 ^bd5: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd6 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd6 ^bd6: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd7 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd7 ^bd7: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd8 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd8 ^bd8: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd9 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd9 ^bd9: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd10 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd10 ^bd10: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd11 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd11 ^bd11: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd12 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd12 ^bd12: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd13 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd13 ^bd13: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd14 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd14 ^bd14: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd15 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd15 ^bd15: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.end + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.end } } diff --git a/test/dialect/AIE/simple-vc1902.mlir b/test/dialect/AIE/simple-vc1902.mlir index 635a4d58a7..ca6a117b2b 100644 --- a/test/dialect/AIE/simple-vc1902.mlir +++ b/test/dialect/AIE/simple-vc1902.mlir @@ -9,16 +9,16 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt %s | FileCheck %s -// CHECK: %[[T01:.*]] = AIE.tile(0, 1) -// CHECK: %[[T12:.*]] = AIE.tile(1, 2) -// CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) +// CHECK: %[[T01:.*]] = aie.tile(0, 1) +// CHECK: %[[T12:.*]] = aie.tile(1, 2) +// CHECK: aie.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) module { - AIE.device(xcvc1902) { - %01 = AIE.tile(0, 1) - %12 = AIE.tile(1, 2) - %02 = AIE.tile(0, 2) - %lock = AIE.lock(%12, 15) { sym_name = "lock1" } - AIE.flow(%01, DMA : 0, %12, Core : 1) + aie.device(xcvc1902) { + %01 = aie.tile(0, 1) + %12 = aie.tile(1, 2) + %02 = aie.tile(0, 2) + %lock = aie.lock(%12, 15) { sym_name = "lock1" } + aie.flow(%01, DMA : 0, %12, Core : 1) } } diff --git a/test/dialect/AIE/simple-ve2802.mlir b/test/dialect/AIE/simple-ve2802.mlir index bebf75b295..a6b7768e66 100644 --- a/test/dialect/AIE/simple-ve2802.mlir +++ b/test/dialect/AIE/simple-ve2802.mlir @@ -9,16 +9,16 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt %s | FileCheck %s -// CHECK: %[[T01:.*]] = AIE.tile(0, 1) -// CHECK: %[[T12:.*]] = AIE.tile(1, 2) -// CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) +// CHECK: %[[T01:.*]] = aie.tile(0, 1) +// CHECK: %[[T12:.*]] = aie.tile(1, 2) +// CHECK: aie.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) module { - AIE.device(xcve2802) { - %01 = AIE.tile(0, 1) - %12 = AIE.tile(1, 2) - %02 = AIE.tile(0, 2) - %lock = AIE.lock(%12, 63) { sym_name = "lock1" } - AIE.flow(%01, DMA : 0, %12, Core : 1) + aie.device(xcve2802) { + %01 = aie.tile(0, 1) + %12 = aie.tile(1, 2) + %02 = aie.tile(0, 2) + %lock = aie.lock(%12, 63) { sym_name = "lock1" } + aie.flow(%01, DMA : 0, %12, Core : 1) } } diff --git a/test/dialect/AIE/simple.mlir b/test/dialect/AIE/simple.mlir index 2a612999b0..b5f83f6a69 100644 --- a/test/dialect/AIE/simple.mlir +++ b/test/dialect/AIE/simple.mlir @@ -9,13 +9,13 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt %s | FileCheck %s -// CHECK: %[[T01:.*]] = AIE.tile(0, 1) -// CHECK: %[[T12:.*]] = AIE.tile(1, 2) -// CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) +// CHECK: %[[T01:.*]] = aie.tile(0, 1) +// CHECK: %[[T12:.*]] = aie.tile(1, 2) +// CHECK: aie.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) module { - %01 = AIE.tile(0, 1) - %12 = AIE.tile(1, 2) - %02 = AIE.tile(49, 8) // Largest valid indices - AIE.flow(%01, DMA : 0, %12, Core : 1) + %01 = aie.tile(0, 1) + %12 = aie.tile(1, 2) + %02 = aie.tile(49, 8) // Largest valid indices + aie.flow(%01, DMA : 0, %12, Core : 1) } diff --git a/test/dialect/AIE/switchbox-vc1902.mlir b/test/dialect/AIE/switchbox-vc1902.mlir index c39cfa1611..fd5ee94b4c 100644 --- a/test/dialect/AIE/switchbox-vc1902.mlir +++ b/test/dialect/AIE/switchbox-vc1902.mlir @@ -11,84 +11,84 @@ // RUN: aie-opt %s module { - AIE.device(xcvc1902) { - %20 = AIE.tile(2, 0) // Shim-NOC - AIE.switchbox(%20) { - AIE.connect // Feedback OK - AIE.connect // Bounce OK - AIE.connect // Two fifo connections - AIE.connect // 6 northgoing connections - AIE.connect // 4 westgoing connections - AIE.connect // 4 southgoing connections - AIE.connect // 4 eastgoing connections - AIE.connect + aie.device(xcvc1902) { + %20 = aie.tile(2, 0) // Shim-NOC + aie.switchbox(%20) { + aie.connect // Feedback OK + aie.connect // Bounce OK + aie.connect // Two fifo connections + aie.connect // 6 northgoing connections + aie.connect // 4 westgoing connections + aie.connect // 4 southgoing connections + aie.connect // 4 eastgoing connections + aie.connect } - %30 = AIE.tile(3, 0) // Shim-NOC - AIE.shim_mux(%30) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %30 = aie.tile(3, 0) // Shim-NOC + aie.shim_mux(%30) { + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect } - %40 = AIE.tile(4, 0) // Shim-PL tile - AIE.switchbox(%40) { - AIE.connect // Feedback OK - AIE.connect // Bounce OK - AIE.connect // Two fifo connections - AIE.connect // 6 northgoing connections - AIE.connect // 4 westgoing connections - AIE.connect // 4 southgoing connections - AIE.connect // 4 eastgoing connections - AIE.connect + %40 = aie.tile(4, 0) // Shim-PL tile + aie.switchbox(%40) { + aie.connect // Feedback OK + aie.connect // Bounce OK + aie.connect // Two fifo connections + aie.connect // 6 northgoing connections + aie.connect // 4 westgoing connections + aie.connect // 4 southgoing connections + aie.connect // 4 eastgoing connections + aie.connect } - %60 = AIE.tile(6, 0) // Shim-NOC - AIE.shim_mux(%60) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %60 = aie.tile(6, 0) // Shim-NOC + aie.shim_mux(%60) { + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.shim_mux(%60) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.shim_mux(%60) { + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect } - %01 = AIE.tile(1, 1) - AIE.switchbox(%01) { - AIE.connect // Feedback OK - AIE.connect // Bounce OK - AIE.connect // Two core connections - AIE.connect // Two core connections - AIE.connect // Two fifo connections - AIE.connect // 6 northgoing connections - AIE.connect // 4 westgoing connections - AIE.connect // 4 southgoing connections - AIE.connect // 4 eastgoing connections + %01 = aie.tile(1, 1) + aie.switchbox(%01) { + aie.connect // Feedback OK + aie.connect // Bounce OK + aie.connect // Two core connections + aie.connect // Two core connections + aie.connect // Two fifo connections + aie.connect // 6 northgoing connections + aie.connect // 4 westgoing connections + aie.connect // 4 southgoing connections + aie.connect // 4 eastgoing connections } } } diff --git a/test/dialect/AIE/switchbox-ve2802.mlir b/test/dialect/AIE/switchbox-ve2802.mlir index 61c4634eca..ace4c863c8 100644 --- a/test/dialect/AIE/switchbox-ve2802.mlir +++ b/test/dialect/AIE/switchbox-ve2802.mlir @@ -11,94 +11,94 @@ // RUN: aie-opt %s module { - AIE.device(xcve2802) { - %20 = AIE.tile(2, 0) // Shim-NOC - AIE.switchbox(%20) { - AIE.connect // Feedback OK - AIE.connect // Bounce OK - AIE.connect // One fifo connections - AIE.connect // 6 northgoing connections - AIE.connect // 4 westgoing connections - AIE.connect // 4 southgoing connections - AIE.connect // 4 eastgoing connections - AIE.connect + aie.device(xcve2802) { + %20 = aie.tile(2, 0) // Shim-NOC + aie.switchbox(%20) { + aie.connect // Feedback OK + aie.connect // Bounce OK + aie.connect // One fifo connections + aie.connect // 6 northgoing connections + aie.connect // 4 westgoing connections + aie.connect // 4 southgoing connections + aie.connect // 4 eastgoing connections + aie.connect } - %30 = AIE.tile(3, 0) // Shim-NOC - AIE.shim_mux(%30) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %30 = aie.tile(3, 0) // Shim-NOC + aie.shim_mux(%30) { + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect } - %40 = AIE.tile(4, 0) // Shim-PL tile - AIE.switchbox(%40) { - AIE.connect // Feedback OK - AIE.connect // Bounce OK - AIE.connect // One fifo connections - AIE.connect // 6 northgoing connections - AIE.connect // 4 westgoing connections - AIE.connect // 4 southgoing connections - AIE.connect // 4 eastgoing connections - AIE.connect + %40 = aie.tile(4, 0) // Shim-PL tile + aie.switchbox(%40) { + aie.connect // Feedback OK + aie.connect // Bounce OK + aie.connect // One fifo connections + aie.connect // 6 northgoing connections + aie.connect // 4 westgoing connections + aie.connect // 4 southgoing connections + aie.connect // 4 eastgoing connections + aie.connect } - %60 = AIE.tile(6, 0) // Shim-NOC - AIE.shim_mux(%60) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect + %60 = aie.tile(6, 0) // Shim-NOC + aie.shim_mux(%60) { + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect } - AIE.shim_mux(%60) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect - AIE.connect + aie.shim_mux(%60) { + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect + aie.connect } - %01 = AIE.tile(0, 1) // mem tile - AIE.switchbox(%01) { - AIE.connect // Feedback OK - AIE.connect // Bounce OK - AIE.connect // 5 DMA connections - AIE.connect // 6 northgoing connections - AIE.connect // 4 southgoing connections - AIE.connect + %01 = aie.tile(0, 1) // mem tile + aie.switchbox(%01) { + aie.connect // Feedback OK + aie.connect // Bounce OK + aie.connect // 5 DMA connections + aie.connect // 6 northgoing connections + aie.connect // 4 southgoing connections + aie.connect } - %03 = AIE.tile(1, 3) // core tile - AIE.switchbox(%03) { - AIE.connect // Feedback OK - AIE.connect // Bounce OK - AIE.connect // Two DMA connections - AIE.connect // One core connections - AIE.connect // One fifo connections - AIE.connect // 6 northgoing connections - AIE.connect // 4 westgoing connections - AIE.connect // 4 southgoing connections - AIE.connect // 4 eastgoing connections + %03 = aie.tile(1, 3) // core tile + aie.switchbox(%03) { + aie.connect // Feedback OK + aie.connect // Bounce OK + aie.connect // Two DMA connections + aie.connect // One core connections + aie.connect // One fifo connections + aie.connect // 6 northgoing connections + aie.connect // 4 westgoing connections + aie.connect // 4 southgoing connections + aie.connect // 4 eastgoing connections } } } diff --git a/test/dialect/AIE/tiledma.mlir b/test/dialect/AIE/tiledma.mlir index d69eb12e62..2a56055e0d 100644 --- a/test/dialect/AIE/tiledma.mlir +++ b/test/dialect/AIE/tiledma.mlir @@ -15,60 +15,60 @@ // CHECK-LABEL: module { // CHECK: } -AIE.device(xcvc1902) { - %t1 = AIE.tile(1, 1) - %buf = AIE.buffer(%t1) : memref<256xi32> - %mem = AIE.mem(%t1) { - AIE.dma_start("MM2S", 0, ^bd0, ^dma1) +aie.device(xcvc1902) { + %t1 = aie.tile(1, 1) + %buf = aie.buffer(%t1) : memref<256xi32> + %mem = aie.mem(%t1) { + aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - AIE.dma_start("MM2S", 1, ^bd15, ^dma1) + aie.dma_start("MM2S", 1, ^bd15, ^dma1) ^bd0: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd1 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd1 ^bd1: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd2 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd2 ^bd2: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd3 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd3 ^bd3: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd4 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd4 ^bd4: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd5 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd5 ^bd5: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd6 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd6 ^bd6: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd7 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd7 ^bd7: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd8 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd8 ^bd8: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd9 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd9 ^bd9: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd10 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd10 ^bd10: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd11 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd11 ^bd11: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd12 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd12 ^bd12: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd13 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd13 ^bd13: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd14 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd14 ^bd14: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.next_bd ^bd15 + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.next_bd ^bd15 ^bd15: - AIE.dma_bd(%buf : memref<256xi32>, 0, 256) - AIE.end + aie.dma_bd(%buf : memref<256xi32>, 0, 256) + aie.end } } diff --git a/test/dialect/AIEX/bad_ipu_nd_length.mlir b/test/dialect/AIEX/bad_ipu_nd_length.mlir index e36a85e030..2f7e0f708f 100644 --- a/test/dialect/AIEX/bad_ipu_nd_length.mlir +++ b/test/dialect/AIEX/bad_ipu_nd_length.mlir @@ -11,16 +11,16 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<1920x1080xi32>, %buf : memref<32xi32>, %out : memref<1920x1080xi32>) { %c0 = arith.constant 0 : i32 %c1 = arith.constant 1 : i32 %c1920 = arith.constant 1920 : i32 %c1080 = arith.constant 1080 : i32 // expected-error@+1 {{Length 0 exceeds the [0:1023] range}} - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1080,%c1920][%c0,%c0,%c1920]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<1920x1080xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1080,%c1920][%c0,%c0,%c1920]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<1920x1080xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_nd_repeat.mlir b/test/dialect/AIEX/bad_ipu_nd_repeat.mlir index 00b3acb677..9ad9f31798 100644 --- a/test/dialect/AIEX/bad_ipu_nd_repeat.mlir +++ b/test/dialect/AIEX/bad_ipu_nd_repeat.mlir @@ -11,7 +11,7 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<128x4x2x8xi32>, %buf : memref<32xi32>, %out : memref<8192xi32>) { %c0 = arith.constant 0 : i32 %c1 = arith.constant 1 : i32 @@ -22,9 +22,9 @@ module { %c32 = arith.constant 32 : i32 %c128 = arith.constant 128 : i32 // expected-error@+1 {{Length 3 exceeds the [1:64] range}} - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c128,%c2,%c2,%c8][%c0,%c16,%c8]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<128x4x2x8xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c128,%c2,%c2,%c8][%c0,%c16,%c8]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<128x4x2x8xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_nd_stride.mlir b/test/dialect/AIEX/bad_ipu_nd_stride.mlir index ac23fccee8..5e39c893f3 100644 --- a/test/dialect/AIEX/bad_ipu_nd_stride.mlir +++ b/test/dialect/AIEX/bad_ipu_nd_stride.mlir @@ -11,16 +11,16 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<8388608xi32>, %buf : memref<32xi32>, %out : memref<8388608xi32>) { %c0 = arith.constant 0 : i32 %c1 = arith.constant 1 : i32 %c2 = arith.constant 2 : i32 %c2097152 = arith.constant 2097152 : i32 // expected-error@+1 {{Stride 1 exceeds the [1:1M] range}} - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c2,%c2][%c0,%c0,%c2097152]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<8388608xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c2,%c2][%c0,%c0,%c2097152]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<8388608xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_nd_type.mlir b/test/dialect/AIEX/bad_ipu_nd_type.mlir index 644cafcee6..f7b2e3fdc3 100644 --- a/test/dialect/AIEX/bad_ipu_nd_type.mlir +++ b/test/dialect/AIEX/bad_ipu_nd_type.mlir @@ -11,16 +11,16 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<1920x1080xi8>, %buf : memref<32xi32>, %out : memref<1920x1080xi8>) { %c0 = arith.constant 0 : i32 %c1 = arith.constant 1 : i32 %c1920 = arith.constant 1920 : i32 %c1080 = arith.constant 1080 : i32 // expected-error@+1 {{must be used with memref type i32.}} - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1080,%c1920][%c0,%c0,%c1920]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<1920x1080xi8>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1080,%c1920][%c0,%c0,%c1920]) { metadata = @of_fromMem, id = 0 : i32 } : (i32, i32, memref<1920x1080xi8>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_push_queue_bd.mlir b/test/dialect/AIEX/bad_ipu_push_queue_bd.mlir index d6dc9125b2..f2365c2f31 100644 --- a/test/dialect/AIEX/bad_ipu_push_queue_bd.mlir +++ b/test/dialect/AIEX/bad_ipu_push_queue_bd.mlir @@ -11,12 +11,12 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<128x4x2x8xi32>, %buf : memref<32xi32>, %out : memref<8192xi32>) { // expected-error@+1 {{BD ID exceeds the maximum ID.}} - AIEX.ipu.shimtile_push_queue {metadata = @of_fromMem, issue_token = false, repeat_count = 3 : i32, bd_id = 28 : i32 } + aiex.ipu.shimtile_push_queue {metadata = @of_fromMem, issue_token = false, repeat_count = 3 : i32, bd_id = 28 : i32 } return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_push_queue_repeat.mlir b/test/dialect/AIEX/bad_ipu_push_queue_repeat.mlir index 242c7c61ed..109c936077 100644 --- a/test/dialect/AIEX/bad_ipu_push_queue_repeat.mlir +++ b/test/dialect/AIEX/bad_ipu_push_queue_repeat.mlir @@ -11,12 +11,12 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<128x4x2x8xi32>, %buf : memref<32xi32>, %out : memref<8192xi32>) { // expected-error@+1 {{Repeat count exceeds the [0:255] range.}} - AIEX.ipu.shimtile_push_queue {metadata = @of_fromMem, issue_token = false, repeat_count = 384 : i32, bd_id = 8 : i32 } + aiex.ipu.shimtile_push_queue {metadata = @of_fromMem, issue_token = false, repeat_count = 384 : i32, bd_id = 8 : i32 } return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_write_bd_bd.mlir b/test/dialect/AIEX/bad_ipu_write_bd_bd.mlir index 31ff71873b..818a23a9b4 100644 --- a/test/dialect/AIEX/bad_ipu_write_bd_bd.mlir +++ b/test/dialect/AIEX/bad_ipu_write_bd_bd.mlir @@ -11,12 +11,12 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<128x4x2x8xi32>, %buf : memref<32xi32>, %out : memref<8192xi32>) { // expected-error@+1 {{BD ID exceeds the maximum ID.}} - AIEX.ipu.writebd_shimtile {bd_id = 17 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 2 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} + aiex.ipu.writebd_shimtile {bd_id = 17 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 2 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_write_bd_it_wrap.mlir b/test/dialect/AIEX/bad_ipu_write_bd_it_wrap.mlir index cb23b7fff8..de71688966 100644 --- a/test/dialect/AIEX/bad_ipu_write_bd_it_wrap.mlir +++ b/test/dialect/AIEX/bad_ipu_write_bd_it_wrap.mlir @@ -11,12 +11,12 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<128x4x2x8xi32>, %buf : memref<32xi32>, %out : memref<8192xi32>) { // expected-error@+1 {{Iteration Wrap exceeds the [0:63] range.}} - AIEX.ipu.writebd_shimtile {bd_id = 7 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 4 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 1024 : i32, iteration_wrap = 128 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} + aiex.ipu.writebd_shimtile {bd_id = 7 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 4 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 1024 : i32, iteration_wrap = 128 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_write_bd_stepsize.mlir b/test/dialect/AIEX/bad_ipu_write_bd_stepsize.mlir index 0a8deaca57..619d612e89 100644 --- a/test/dialect/AIEX/bad_ipu_write_bd_stepsize.mlir +++ b/test/dialect/AIEX/bad_ipu_write_bd_stepsize.mlir @@ -11,12 +11,12 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<128x4x2x8xi32>, %buf : memref<32xi32>, %out : memref<8192xi32>) { // expected-error@+1 {{D0 Stepsize exceeds the [0:1M-1] range.}} - AIEX.ipu.writebd_shimtile {bd_id = 2 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 2097356 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 2 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} + aiex.ipu.writebd_shimtile {bd_id = 2 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 2097356 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 2 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/dialect/AIEX/bad_ipu_write_bd_wrap.mlir b/test/dialect/AIEX/bad_ipu_write_bd_wrap.mlir index fafd436774..dde9f93c94 100644 --- a/test/dialect/AIEX/bad_ipu_write_bd_wrap.mlir +++ b/test/dialect/AIEX/bad_ipu_write_bd_wrap.mlir @@ -11,12 +11,12 @@ // RUN: aie-opt --verify-diagnostics %s module { - AIE.device(ipu) { + aie.device(ipu) { func.func @sequence(%in : memref<128x4x2x8xi32>, %buf : memref<32xi32>, %out : memref<8192xi32>) { // expected-error@+1 {{D1 Wrap exceeds the [0:1023] range.}} - AIEX.ipu.writebd_shimtile {bd_id = 7 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 1024 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} + aiex.ipu.writebd_shimtile {bd_id = 7 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, column_num = 1 : i32, d0_stepsize = 0 : i32, d0_wrap = 8 : i32, d1_stepsize = 7 : i32, d1_wrap = 1024 : i32, d2_stepsize = 15 : i32, ddr_id = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_stepsize = 0 : i32, iteration_wrap = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} return } - AIE.shim_dma_allocation @of_fromMem (MM2S, 0, 0) + aie.shim_dma_allocation @of_fromMem (MM2S, 0, 0) } } \ No newline at end of file diff --git a/test/example1.mlir b/test/example1.mlir index ded319ef8f..89e23d4a5b 100644 --- a/test/example1.mlir +++ b/test/example1.mlir @@ -23,20 +23,20 @@ // CHECK: } module @example1 { - %t33 = AIE.tile(3, 3) - %t42 = AIE.tile(4, 2) - %t44 = AIE.tile(4, 4) + %t33 = aie.tile(3, 3) + %t42 = aie.tile(4, 2) + %t44 = aie.tile(4, 4) %buf0 = memref.alloc() : memref<256xi32> %buf1 = memref.alloc() : memref<256xi32> %buf2 = memref.alloc() : memref<256xi32> - AIEX.token(0) { sym_name="token0" } - AIEX.token(0) { sym_name="token1" } + aiex.token(0) { sym_name="token0" } + aiex.token(0) { sym_name="token1" } func.func @task0(%arg0: memref<256xi32>, %arg1: i32) -> () { - AIEX.useToken @token0(Acquire, 0) - AIEX.useToken @token1(Acquire, 0) + aiex.useToken @token0(Acquire, 0) + aiex.useToken @token1(Acquire, 0) // code %i = arith.constant 8: index @@ -44,26 +44,26 @@ module @example1 { memref.store %arg1, %arg0[%i] : memref<256xi32> //store %k, %arg0[%i] : memref<256xi32> - AIEX.useToken @token0(Release, 1) - AIEX.useToken @token1(Release, 1) + aiex.useToken @token0(Release, 1) + aiex.useToken @token1(Release, 1) return } func.func @task1(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token0(Acquire, 2) + aiex.useToken @token0(Acquire, 2) // code - AIEX.useToken @token0(Release, 3) + aiex.useToken @token0(Release, 3) return } func.func @task2(%arg0: memref<256xi32>) -> () { - AIEX.useToken @token1(Acquire, 2) + aiex.useToken @token1(Acquire, 2) // code - AIEX.useToken @token1(Release, 3) + aiex.useToken @token1(Release, 3) return } @@ -77,6 +77,6 @@ module @example1 { func.call @task2(%buf2) { aie.x = 4, aie.y = 4 } : (memref<256xi32>) -> () func.call @task3() : () -> () - AIEX.memcpy @token0(1, 2) (%t33 : <%buf0, 0, 256>, %t42 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) - AIEX.memcpy @token1(1, 2) (%t33 : <%buf0, 0, 256>, %t44 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token0(1, 2) (%t33 : <%buf0, 0, 256>, %t42 : <%buf1, 0, 256>) : (memref<256xi32>, memref<256xi32>) + aiex.memcpy @token1(1, 2) (%t33 : <%buf0, 0, 256>, %t44 : <%buf2, 0, 256>) : (memref<256xi32>, memref<256xi32>) } diff --git a/test/find-flows/find_flows.mlir b/test/find-flows/find_flows.mlir index 66d16d2926..f6279bcdd5 100644 --- a/test/find-flows/find_flows.mlir +++ b/test/find-flows/find_flows.mlir @@ -9,44 +9,44 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt -aie-find-flows %s | FileCheck %s -// CHECK: %[[T23:.*]] = AIE.tile(2, 3) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: AIE.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) -// CHECK: AIE.flow(%[[T22]], Core : 0, %[[T22]], Core : 0) -// CHECK: AIE.flow(%[[T22]], Core : 1, %[[T23]], Core : 1) -// CHECK: AIE.packet_flow(0) { -// CHECK: AIE.packet_source<%[[T22]], DMA : 0> -// CHECK: AIE.packet_dest<%[[T23]], DMA : 1> +// CHECK: %[[T23:.*]] = aie.tile(2, 3) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: aie.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) +// CHECK: aie.flow(%[[T22]], Core : 0, %[[T22]], Core : 0) +// CHECK: aie.flow(%[[T22]], Core : 1, %[[T23]], Core : 1) +// CHECK: aie.packet_flow(0) { +// CHECK: aie.packet_source<%[[T22]], DMA : 0> +// CHECK: aie.packet_dest<%[[T23]], DMA : 1> // CHECK: } module { - AIE.device(xcvc1902) { - %tile0 = AIE.tile(2, 3) - %tile1 = AIE.tile(2, 2) + aie.device(xcvc1902) { + %tile0 = aie.tile(2, 3) + %tile1 = aie.tile(2, 2) - %0 = AIE.switchbox(%tile0) { - AIE.connect - AIE.connect - AIE.connect - %16 = AIE.amsel<0> (0) - %17 = AIE.masterset(DMA : 1, %16) - AIE.packet_rules(South : 0) { - AIE.rule(31, 0, %16) + %0 = aie.switchbox(%tile0) { + aie.connect + aie.connect + aie.connect + %16 = aie.amsel<0> (0) + %17 = aie.masterset(DMA : 1, %16) + aie.packet_rules(South : 0) { + aie.rule(31, 0, %16) } } - %1 = AIE.switchbox(%tile1) { - AIE.connect - AIE.connect - AIE.connect - %18 = AIE.amsel<0> (0) - %19 = AIE.masterset(North : 0, %18) - AIE.packet_rules(DMA : 0) { - AIE.rule(31, 0, %18) + %1 = aie.switchbox(%tile1) { + aie.connect + aie.connect + aie.connect + %18 = aie.amsel<0> (0) + %19 = aie.masterset(North : 0, %18) + aie.packet_rules(DMA : 0) { + aie.rule(31, 0, %18) } } - AIE.wire(%0: Core, %tile0: Core) - AIE.wire(%1: Core, %tile1: Core) - AIE.wire(%0: DMA, %tile0: DMA) - AIE.wire(%1: DMA, %tile1: DMA) - AIE.wire(%0: South, %1: North) + aie.wire(%0: Core, %tile0: Core) + aie.wire(%1: Core, %tile1: Core) + aie.wire(%0: DMA, %tile0: DMA) + aie.wire(%1: DMA, %tile1: DMA) + aie.wire(%0: South, %1: North) } } diff --git a/test/find-flows/id_check.mlir b/test/find-flows/id_check.mlir index 6c229c7290..3c9d42b396 100644 --- a/test/find-flows/id_check.mlir +++ b/test/find-flows/id_check.mlir @@ -9,35 +9,35 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt -aie-find-flows %s | FileCheck %s -// CHECK: %[[T23:.*]] = AIE.tile(2, 3) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: AIE.packet_flow(15) { -// CHECK: AIE.packet_source<%[[T22]], DMA : 0> -// CHECK: AIE.packet_dest<%[[T23]], DMA : 1> +// CHECK: %[[T23:.*]] = aie.tile(2, 3) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: aie.packet_flow(15) { +// CHECK: aie.packet_source<%[[T22]], DMA : 0> +// CHECK: aie.packet_dest<%[[T23]], DMA : 1> // CHECK: } module { - AIE.device(xcvc1902) { - %tile0 = AIE.tile(2, 3) - %tile1 = AIE.tile(2, 2) + aie.device(xcvc1902) { + %tile0 = aie.tile(2, 3) + %tile1 = aie.tile(2, 2) - %0 = AIE.switchbox(%tile0) { - %16 = AIE.amsel<0> (0) - %17 = AIE.masterset(DMA : 1, %16) - AIE.packet_rules(South : 0) { - AIE.rule(7, 7, %16) + %0 = aie.switchbox(%tile0) { + %16 = aie.amsel<0> (0) + %17 = aie.masterset(DMA : 1, %16) + aie.packet_rules(South : 0) { + aie.rule(7, 7, %16) } } - %1 = AIE.switchbox(%tile1) { - %18 = AIE.amsel<0> (0) - %19 = AIE.masterset(North : 0, %18) - AIE.packet_rules(DMA : 0) { - AIE.rule(15, 15, %18) + %1 = aie.switchbox(%tile1) { + %18 = aie.amsel<0> (0) + %19 = aie.masterset(North : 0, %18) + aie.packet_rules(DMA : 0) { + aie.rule(15, 15, %18) } } - AIE.wire(%0: Core, %tile0: Core) - AIE.wire(%1: Core, %tile1: Core) - AIE.wire(%0: DMA, %tile0: DMA) - AIE.wire(%1: DMA, %tile1: DMA) - AIE.wire(%0: South, %1: North) + aie.wire(%0: Core, %tile0: Core) + aie.wire(%1: Core, %tile1: Core) + aie.wire(%0: DMA, %tile0: DMA) + aie.wire(%1: DMA, %tile1: DMA) + aie.wire(%0: South, %1: North) } } diff --git a/test/find-flows/id_check2.mlir b/test/find-flows/id_check2.mlir index 3f75f60a31..3f9f6a1ceb 100644 --- a/test/find-flows/id_check2.mlir +++ b/test/find-flows/id_check2.mlir @@ -9,35 +9,35 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt -aie-find-flows %s | FileCheck %s -// CHECK: %[[T23:.*]] = AIE.tile(2, 3) -// CHECK: %[[T22:.*]] = AIE.tile(2, 2) -// CHECK: AIE.packet_flow(13) { -// CHECK: AIE.packet_source<%[[T22]], DMA : 0> -// CHECK: AIE.packet_dest<%[[T23]], DMA : 1> +// CHECK: %[[T23:.*]] = aie.tile(2, 3) +// CHECK: %[[T22:.*]] = aie.tile(2, 2) +// CHECK: aie.packet_flow(13) { +// CHECK: aie.packet_source<%[[T22]], DMA : 0> +// CHECK: aie.packet_dest<%[[T23]], DMA : 1> // CHECK: } module { - AIE.device(xcvc1902) { - %tile0 = AIE.tile(2, 3) - %tile1 = AIE.tile(2, 2) + aie.device(xcvc1902) { + %tile0 = aie.tile(2, 3) + %tile1 = aie.tile(2, 2) - %0 = AIE.switchbox(%tile0) { - %16 = AIE.amsel<0> (0) - %17 = AIE.masterset(DMA : 1, %16) - AIE.packet_rules(South : 0) { - AIE.rule(7, 5, %16) + %0 = aie.switchbox(%tile0) { + %16 = aie.amsel<0> (0) + %17 = aie.masterset(DMA : 1, %16) + aie.packet_rules(South : 0) { + aie.rule(7, 5, %16) } } - %1 = AIE.switchbox(%tile1) { - %18 = AIE.amsel<0> (0) - %19 = AIE.masterset(North : 0, %18) - AIE.packet_rules(DMA : 0) { - AIE.rule(12, 12, %18) + %1 = aie.switchbox(%tile1) { + %18 = aie.amsel<0> (0) + %19 = aie.masterset(North : 0, %18) + aie.packet_rules(DMA : 0) { + aie.rule(12, 12, %18) } } - AIE.wire(%0: Core, %tile0: Core) - AIE.wire(%1: Core, %tile1: Core) - AIE.wire(%0: DMA, %tile0: DMA) - AIE.wire(%1: DMA, %tile1: DMA) - AIE.wire(%0: South, %1: North) + aie.wire(%0: Core, %tile0: Core) + aie.wire(%1: Core, %tile1: Core) + aie.wire(%0: DMA, %tile0: DMA) + aie.wire(%1: DMA, %tile1: DMA) + aie.wire(%0: South, %1: North) } } diff --git a/test/find-flows/shim.mlir b/test/find-flows/shim.mlir index b7ce594119..29768b3a9a 100644 --- a/test/find-flows/shim.mlir +++ b/test/find-flows/shim.mlir @@ -10,89 +10,89 @@ // RUN: aie-opt --aie-find-flows -split-input-file %s | FileCheck %s -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_6:.*]] = AIE.shim_dma(%[[VAL_1]]) -// CHECK: AIE.flow(%[[VAL_0]], Core : 0, %[[VAL_6]], DMA : 0) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_6:.*]] = aie.shim_dma(%[[VAL_1]]) +// CHECK: aie.flow(%[[VAL_0]], Core : 0, %[[VAL_6]], DMA : 0) module { - AIE.device(xcvc1902) { - %t21 = AIE.tile(2, 1) - %t20 = AIE.tile(2, 0) - %c21 = AIE.core(%t21) { - AIE.end + aie.device(xcvc1902) { + %t21 = aie.tile(2, 1) + %t20 = aie.tile(2, 0) + %c21 = aie.core(%t21) { + aie.end } - %s21 = AIE.switchbox(%t21) { - AIE.connect + %s21 = aie.switchbox(%t21) { + aie.connect } - %s20 = AIE.switchbox(%t20) { - AIE.connect + %s20 = aie.switchbox(%t20) { + aie.connect } - %mux = AIE.shim_mux(%t20) { - AIE.connect + %mux = aie.shim_mux(%t20) { + aie.connect } - %dma = AIE.shim_dma(%t20) { - AIE.end + %dma = aie.shim_dma(%t20) { + aie.end } - AIE.wire(%s21 : South, %s20 : North) - AIE.wire(%s20 : South, %mux : North) - AIE.wire(%mux : DMA, %dma : DMA) - AIE.wire(%mux : South, %t20 : DMA) - AIE.wire(%s21 : Core, %c21 : Core) - AIE.wire(%s21 : Core, %t21 : Core) + aie.wire(%s21 : South, %s20 : North) + aie.wire(%s20 : South, %mux : North) + aie.wire(%mux : DMA, %dma : DMA) + aie.wire(%mux : South, %t20 : DMA) + aie.wire(%s21 : Core, %c21 : Core) + aie.wire(%s21 : Core, %t21 : Core) } } // ----- -// CHECK: %tile_2_1 = AIE.tile(2, 1) -// CHECK: %tile_2_0 = AIE.tile(2, 0) -// CHECK: %core_2_1 = AIE.core(%tile_2_1) { -// CHECK: AIE.end +// CHECK: %tile_2_1 = aie.tile(2, 1) +// CHECK: %tile_2_0 = aie.tile(2, 0) +// CHECK: %core_2_1 = aie.core(%tile_2_1) { +// CHECK: aie.end // CHECK: } -// CHECK: %switchbox_2_1 = AIE.switchbox(%tile_2_1) { -// CHECK: AIE.connect +// CHECK: %switchbox_2_1 = aie.switchbox(%tile_2_1) { +// CHECK: aie.connect // CHECK: } -// CHECK: %switchbox_2_0 = AIE.switchbox(%tile_2_0) { -// CHECK: AIE.connect +// CHECK: %switchbox_2_0 = aie.switchbox(%tile_2_0) { +// CHECK: aie.connect // CHECK: } -// CHECK: %shim_mux_2_0 = AIE.shim_mux(%tile_2_0) { -// CHECK: AIE.connect +// CHECK: %shim_mux_2_0 = aie.shim_mux(%tile_2_0) { +// CHECK: aie.connect // CHECK: } -// CHECK: %shim_dma_2_0 = AIE.shim_dma(%tile_2_0) { -// CHECK: AIE.end +// CHECK: %shim_dma_2_0 = aie.shim_dma(%tile_2_0) { +// CHECK: aie.end // CHECK: } -// CHECK: AIE.wire(%switchbox_2_1 : South, %switchbox_2_0 : North) -// CHECK: AIE.wire(%switchbox_2_0 : South, %shim_mux_2_0 : North) -// CHECK: AIE.wire(%shim_mux_2_0 : DMA, %shim_dma_2_0 : DMA) -// CHECK: AIE.wire(%shim_mux_2_0 : South, %tile_2_0 : DMA) -// CHECK: AIE.wire(%switchbox_2_1 : Core, %core_2_1 : Core) -// CHECK: AIE.wire(%switchbox_2_1 : Core, %tile_2_1 : Core) -// CHECK: AIE.flow(%tile_2_1, Core : 0, %shim_dma_2_0, DMA : 0) +// CHECK: aie.wire(%switchbox_2_1 : South, %switchbox_2_0 : North) +// CHECK: aie.wire(%switchbox_2_0 : South, %shim_mux_2_0 : North) +// CHECK: aie.wire(%shim_mux_2_0 : DMA, %shim_dma_2_0 : DMA) +// CHECK: aie.wire(%shim_mux_2_0 : South, %tile_2_0 : DMA) +// CHECK: aie.wire(%switchbox_2_1 : Core, %core_2_1 : Core) +// CHECK: aie.wire(%switchbox_2_1 : Core, %tile_2_1 : Core) +// CHECK: aie.flow(%tile_2_1, Core : 0, %shim_dma_2_0, DMA : 0) module { - AIE.device(xcvc1902) { - %t21 = AIE.tile(2, 1) - %t20 = AIE.tile(2, 0) - %c21 = AIE.core(%t21) { - AIE.end + aie.device(xcvc1902) { + %t21 = aie.tile(2, 1) + %t20 = aie.tile(2, 0) + %c21 = aie.core(%t21) { + aie.end } - %s21 = AIE.switchbox(%t21) { - AIE.connect + %s21 = aie.switchbox(%t21) { + aie.connect } - %s20 = AIE.switchbox(%t20) { - AIE.connect + %s20 = aie.switchbox(%t20) { + aie.connect } - %mux = AIE.shim_mux(%t20) { - AIE.connect + %mux = aie.shim_mux(%t20) { + aie.connect } - %dma = AIE.shim_dma(%t20) { - AIE.end + %dma = aie.shim_dma(%t20) { + aie.end } - AIE.wire(%s21 : South, %s20 : North) - AIE.wire(%s20 : South, %mux : North) - AIE.wire(%mux : DMA, %dma : DMA) - AIE.wire(%mux : South, %t20 : DMA) - AIE.wire(%s21 : Core, %c21 : Core) - AIE.wire(%s21 : Core, %t21 : Core) + aie.wire(%s21 : South, %s20 : North) + aie.wire(%s20 : South, %mux : North) + aie.wire(%mux : DMA, %dma : DMA) + aie.wire(%mux : South, %t20 : DMA) + aie.wire(%s21 : Core, %c21 : Core) + aie.wire(%s21 : Core, %t21 : Core) } } \ No newline at end of file diff --git a/test/foldinterface.mlir b/test/foldinterface.mlir index 823dca1cab..64a9a6e4ce 100644 --- a/test/foldinterface.mlir +++ b/test/foldinterface.mlir @@ -8,17 +8,17 @@ // //===----------------------------------------------------------------------===// -// Check that the arith.constants in AIE.core are not moved out of the region by pass +// Check that the arith.constants in aie.core are not moved out of the region by pass // RUN: aie-opt %s -canonicalize | FileCheck %s -// CHECK: AIE.core +// CHECK: aie.core // CHECK: arith.constant module @aie.herd_0 { - %0 = AIE.tile(8, 3) - %1 = AIE.buffer(%0) {sym_name = "b2"} : memref<32x32xi32> - %2 = AIE.buffer(%0) {sym_name = "b1"} : memref<32x32xi32> - %3 = AIE.buffer(%0) {sym_name = "b0"} : memref<32x32xi32> - %4 = AIE.core(%0) { + %0 = aie.tile(8, 3) + %1 = aie.buffer(%0) {sym_name = "b2"} : memref<32x32xi32> + %2 = aie.buffer(%0) {sym_name = "b1"} : memref<32x32xi32> + %3 = aie.buffer(%0) {sym_name = "b0"} : memref<32x32xi32> + %4 = aie.core(%0) { cf.br ^bb1 ^bb1: // pred: ^bb0 cf.br ^bb2 @@ -40,6 +40,6 @@ module @aie.herd_0 { } } } - AIE.end + aie.end } } diff --git a/test/generate-mmap/allocation_error.mlir b/test/generate-mmap/allocation_error.mlir index 9d450ce23f..c21b61dbe4 100644 --- a/test/generate-mmap/allocation_error.mlir +++ b/test/generate-mmap/allocation_error.mlir @@ -19,7 +19,7 @@ // If we use all of the local memory, then linking the AIE executable should fail. module @example0 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { memref.global @x : memref<4xi8> = uninitialized func.func @test (%i: index, %v: i8) -> i8 { %x = memref.get_global @x : memref<4xi8> @@ -28,17 +28,17 @@ module @example0 { func.return %r : i8 } - %t33 = AIE.tile(3, 3) + %t33 = aie.tile(3, 3) // Use all the local memory for buffers, combined with the 1024 byte stack size. - %buf33 = AIE.buffer(%t33) : memref<31744xi8> + %buf33 = aie.buffer(%t33) : memref<31744xi8> - %c33 = AIE.core(%t33) { + %c33 = aie.core(%t33) { %idx1 = arith.constant 3 : index %val1 = arith.constant 7 : i8 memref.store %val1, %buf33[%idx1] : memref<31744xi8> func.call @test(%idx1, %val1) : (index, i8) -> i8 - AIE.end + aie.end } } } diff --git a/test/generate-mmap/test_mmap0.mlir b/test/generate-mmap/test_mmap0.mlir index 1546352cfa..05de8322c0 100644 --- a/test/generate-mmap/test_mmap0.mlir +++ b/test/generate-mmap/test_mmap0.mlir @@ -116,23 +116,23 @@ // LD44-NEXT: . += 0x20 module @test_mmap0 { - AIE.device(xcvc1902) { - %t44 = AIE.tile(4, 4) - %t34 = AIE.tile(3, 4) - %t54 = AIE.tile(5, 4) - %t43 = AIE.tile(4, 3) - %t45 = AIE.tile(4, 5) + aie.device(xcvc1902) { + %t44 = aie.tile(4, 4) + %t34 = aie.tile(3, 4) + %t54 = aie.tile(5, 4) + %t43 = aie.tile(4, 3) + %t45 = aie.tile(4, 5) - %buf44_0 = AIE.buffer(%t44) { sym_name = "a", address = 0x0 } : memref<4xi32> - %buf44_1 = AIE.buffer(%t44) { sym_name = "b", address = 0x10 } : memref<16xi32> - %buf44_2 = AIE.buffer(%t44) { sym_name = "c", address = 0x50 } : memref<256xi32> - %buf34_0 = AIE.buffer(%t34) { sym_name = "x", address = 0x0 } : memref<8xi32> - %buf54_0 = AIE.buffer(%t54) { sym_name = "y", address = 0x0 } : memref<8xi32> - %buf43_0 = AIE.buffer(%t43) { sym_name = "z", address = 0x0 } : memref<8xi32> - %buf45_0 = AIE.buffer(%t45) { sym_name = "t", address = 0x0 } : memref<8xi32> + %buf44_0 = aie.buffer(%t44) { sym_name = "a", address = 0x0 } : memref<4xi32> + %buf44_1 = aie.buffer(%t44) { sym_name = "b", address = 0x10 } : memref<16xi32> + %buf44_2 = aie.buffer(%t44) { sym_name = "c", address = 0x50 } : memref<256xi32> + %buf34_0 = aie.buffer(%t34) { sym_name = "x", address = 0x0 } : memref<8xi32> + %buf54_0 = aie.buffer(%t54) { sym_name = "y", address = 0x0 } : memref<8xi32> + %buf43_0 = aie.buffer(%t43) { sym_name = "z", address = 0x0 } : memref<8xi32> + %buf45_0 = aie.buffer(%t45) { sym_name = "t", address = 0x0 } : memref<8xi32> - AIE.core(%t44) { - AIE.end + aie.core(%t44) { + aie.end } } } diff --git a/test/generate-mmap/test_mmap1.mlir b/test/generate-mmap/test_mmap1.mlir index 19ab983997..b60d0dc645 100644 --- a/test/generate-mmap/test_mmap1.mlir +++ b/test/generate-mmap/test_mmap1.mlir @@ -22,14 +22,14 @@ // CHECK: _symbol a 0x28000 16 module @test_mmap1 { - AIE.device(xcvc1902) { - %t34 = AIE.tile(3, 4) - %t24 = AIE.tile(2, 4) // Different column - %t44 = AIE.tile(4, 4) // Different column - %t33 = AIE.tile(3, 3) // Different row - %t35 = AIE.tile(3, 5) // Different row + aie.device(xcvc1902) { + %t34 = aie.tile(3, 4) + %t24 = aie.tile(2, 4) // Different column + %t44 = aie.tile(4, 4) // Different column + %t33 = aie.tile(3, 3) // Different row + %t35 = aie.tile(3, 5) // Different row - %buf34_0 = AIE.buffer(%t34) { sym_name = "a", address = 0x0 } : memref<4xi32> + %buf34_0 = aie.buffer(%t34) { sym_name = "a", address = 0x0 } : memref<4xi32> } } diff --git a/test/generate-mmap/test_mmap2.mlir b/test/generate-mmap/test_mmap2.mlir index bd660505b9..1dec6f2481 100644 --- a/test/generate-mmap/test_mmap2.mlir +++ b/test/generate-mmap/test_mmap2.mlir @@ -22,14 +22,14 @@ // CHECK: _symbol a 0x20000 16 module @test_mmap1 { - AIE.device(xcvc1902) { - %tsame = AIE.tile(3, 3) - %twest = AIE.tile(2, 3) // Different column - %teast = AIE.tile(4, 3) // Different column - %tsouth = AIE.tile(3, 2) // Different row - %tnorth = AIE.tile(3, 4) // Different row + aie.device(xcvc1902) { + %tsame = aie.tile(3, 3) + %twest = aie.tile(2, 3) // Different column + %teast = aie.tile(4, 3) // Different column + %tsouth = aie.tile(3, 2) // Different row + %tnorth = aie.tile(3, 4) // Different row - %bufsame = AIE.buffer(%tsame) { sym_name = "a", address = 0x0 } : memref<4xi32> + %bufsame = aie.buffer(%tsame) { sym_name = "a", address = 0x0 } : memref<4xi32> } } diff --git a/test/generate-mmap/test_mmap3.mlir b/test/generate-mmap/test_mmap3.mlir index 0736f13ea7..a2b02ce5e2 100644 --- a/test/generate-mmap/test_mmap3.mlir +++ b/test/generate-mmap/test_mmap3.mlir @@ -18,17 +18,17 @@ // CHECK-NEXT: _symbol east 0x38000 16 module @test_mmap1 { - AIE.device(xcvc1902) { - %tsame = AIE.tile(3, 4) - %twest = AIE.tile(2, 4) // Different column - %teast = AIE.tile(4, 4) // Different column - %tsouth = AIE.tile(3, 3) // Different row - %tnorth = AIE.tile(3, 5) // Different row + aie.device(xcvc1902) { + %tsame = aie.tile(3, 4) + %twest = aie.tile(2, 4) // Different column + %teast = aie.tile(4, 4) // Different column + %tsouth = aie.tile(3, 3) // Different row + %tnorth = aie.tile(3, 5) // Different row - %bufsame = AIE.buffer(%tsame) { sym_name = "same", address = 0x0 } : memref<4xi32> - %bufeast = AIE.buffer(%teast) { sym_name = "east", address = 0x0 } : memref<4xi32> - %bufwest = AIE.buffer(%twest) { sym_name = "west", address = 0x0 } : memref<4xi32> - %bufsouth = AIE.buffer(%tsouth) { sym_name = "south", address = 0x0 } : memref<4xi32> - %bufnorth = AIE.buffer(%tnorth) { sym_name = "north", address = 0x0 } : memref<4xi32> + %bufsame = aie.buffer(%tsame) { sym_name = "same", address = 0x0 } : memref<4xi32> + %bufeast = aie.buffer(%teast) { sym_name = "east", address = 0x0 } : memref<4xi32> + %bufwest = aie.buffer(%twest) { sym_name = "west", address = 0x0 } : memref<4xi32> + %bufsouth = aie.buffer(%tsouth) { sym_name = "south", address = 0x0 } : memref<4xi32> + %bufnorth = aie.buffer(%tnorth) { sym_name = "north", address = 0x0 } : memref<4xi32> } } diff --git a/test/generate-mmap/test_mmap4.mlir b/test/generate-mmap/test_mmap4.mlir index 3ecd296791..e5e46520eb 100644 --- a/test/generate-mmap/test_mmap4.mlir +++ b/test/generate-mmap/test_mmap4.mlir @@ -18,17 +18,17 @@ // CHECK-NEXT: _symbol east 0x38000 16 module @test_mmap1 { - AIE.device(xcvc1902) { - %tsame = AIE.tile(2, 4) - %twest = AIE.tile(1, 4) // Different column - %teast = AIE.tile(3, 4) // Different column - %tsouth = AIE.tile(2, 3) // Different row - %tnorth = AIE.tile(2, 5) // Different row + aie.device(xcvc1902) { + %tsame = aie.tile(2, 4) + %twest = aie.tile(1, 4) // Different column + %teast = aie.tile(3, 4) // Different column + %tsouth = aie.tile(2, 3) // Different row + %tnorth = aie.tile(2, 5) // Different row - %bufsame = AIE.buffer(%tsame) { sym_name = "same", address = 0x0 } : memref<4xi32> - %bufeast = AIE.buffer(%teast) { sym_name = "east", address = 0x0 } : memref<4xi32> - %bufwest = AIE.buffer(%twest) { sym_name = "west", address = 0x0 } : memref<4xi32> - %bufsouth = AIE.buffer(%tsouth) { sym_name = "south", address = 0x0 } : memref<4xi32> - %bufnorth = AIE.buffer(%tnorth) { sym_name = "north", address = 0x0 } : memref<4xi32> + %bufsame = aie.buffer(%tsame) { sym_name = "same", address = 0x0 } : memref<4xi32> + %bufeast = aie.buffer(%teast) { sym_name = "east", address = 0x0 } : memref<4xi32> + %bufwest = aie.buffer(%twest) { sym_name = "west", address = 0x0 } : memref<4xi32> + %bufsouth = aie.buffer(%tsouth) { sym_name = "south", address = 0x0 } : memref<4xi32> + %bufnorth = aie.buffer(%tnorth) { sym_name = "north", address = 0x0 } : memref<4xi32> } } diff --git a/test/generate-mmap/test_mmap5.mlir b/test/generate-mmap/test_mmap5.mlir index eba4cc160e..a6739d47c0 100644 --- a/test/generate-mmap/test_mmap5.mlir +++ b/test/generate-mmap/test_mmap5.mlir @@ -18,17 +18,17 @@ // CHECK-NEXT: _symbol same 0x38000 16 module @test_mmap1 { - AIE.device(xcvc1902) { - %tsame = AIE.tile(3, 3) - %twest = AIE.tile(2, 3) // Different column - %teast = AIE.tile(4, 3) // Different column - %tsouth = AIE.tile(3, 2) // Different row - %tnorth = AIE.tile(3, 4) // Different row + aie.device(xcvc1902) { + %tsame = aie.tile(3, 3) + %twest = aie.tile(2, 3) // Different column + %teast = aie.tile(4, 3) // Different column + %tsouth = aie.tile(3, 2) // Different row + %tnorth = aie.tile(3, 4) // Different row - %bufsame = AIE.buffer(%tsame) { sym_name = "same", address = 0x0 } : memref<4xi32> - %bufeast = AIE.buffer(%teast) { sym_name = "east", address = 0x0 } : memref<4xi32> - %bufwest = AIE.buffer(%twest) { sym_name = "west", address = 0x0 } : memref<4xi32> - %bufsouth = AIE.buffer(%tsouth) { sym_name = "south", address = 0x0 } : memref<4xi32> - %bufnorth = AIE.buffer(%tnorth) { sym_name = "north", address = 0x0 } : memref<4xi32> + %bufsame = aie.buffer(%tsame) { sym_name = "same", address = 0x0 } : memref<4xi32> + %bufeast = aie.buffer(%teast) { sym_name = "east", address = 0x0 } : memref<4xi32> + %bufwest = aie.buffer(%twest) { sym_name = "west", address = 0x0 } : memref<4xi32> + %bufsouth = aie.buffer(%tsouth) { sym_name = "south", address = 0x0 } : memref<4xi32> + %bufnorth = aie.buffer(%tnorth) { sym_name = "north", address = 0x0 } : memref<4xi32> } } diff --git a/test/herd-routing/test_herd_routing0.mlir b/test/herd-routing/test_herd_routing0.mlir index 915bb1cacf..6655e151b6 100644 --- a/test/herd-routing/test_herd_routing0.mlir +++ b/test/herd-routing/test_herd_routing0.mlir @@ -12,52 +12,52 @@ // RUN: aie-opt --aie-herd-routing %s | FileCheck %s // CHECK-LABEL: module @test_herd_routing0 { -// CHECK: %0 = AIE.herd[1] [1] {sym_name = "t"} -// CHECK: %1 = AIE.herd[1] [1] {sym_name = "s"} -// CHECK: %2 = AIE.iter(0, 1, 1) -// CHECK: %3 = AIE.select(%0, %2, %2) -// CHECK: %4 = AIE.select(%1, %2, %2) -// CHECK: %5 = AIE.iter(3, 4, 1) -// CHECK: %6 = AIE.iter(1, 2, 1) -// CHECK: %7 = AIE.select(%0, %5, %6) -// CHECK: %8 = AIE.switchbox(%7) { -// CHECK: AIE.connect +// CHECK: %0 = aie.herd[1] [1] {sym_name = "t"} +// CHECK: %1 = aie.herd[1] [1] {sym_name = "s"} +// CHECK: %2 = aie.iter(0, 1, 1) +// CHECK: %3 = aie.select(%0, %2, %2) +// CHECK: %4 = aie.select(%1, %2, %2) +// CHECK: %5 = aie.iter(3, 4, 1) +// CHECK: %6 = aie.iter(1, 2, 1) +// CHECK: %7 = aie.select(%0, %5, %6) +// CHECK: %8 = aie.switchbox(%7) { +// CHECK: aie.connect // CHECK: } -// CHECK: %9 = AIE.iter(1, 2, 1) -// CHECK: %10 = AIE.iter(0, 1, 1) -// CHECK: %11 = AIE.select(%0, %9, %10) -// CHECK: %12 = AIE.switchbox(%11) { -// CHECK: AIE.connect +// CHECK: %9 = aie.iter(1, 2, 1) +// CHECK: %10 = aie.iter(0, 1, 1) +// CHECK: %11 = aie.select(%0, %9, %10) +// CHECK: %12 = aie.switchbox(%11) { +// CHECK: aie.connect // CHECK: } -// CHECK: %13 = AIE.iter(3, 4, 1) -// CHECK: %14 = AIE.iter(2, 3, 1) -// CHECK: %15 = AIE.select(%0, %13, %14) -// CHECK: %16 = AIE.switchbox(%15) { -// CHECK: AIE.connect +// CHECK: %13 = aie.iter(3, 4, 1) +// CHECK: %14 = aie.iter(2, 3, 1) +// CHECK: %15 = aie.select(%0, %13, %14) +// CHECK: %16 = aie.switchbox(%15) { +// CHECK: aie.connect // CHECK: } -// CHECK: %17 = AIE.iter(0, 1, 1) -// CHECK: %18 = AIE.iter(0, 1, 1) -// CHECK: %19 = AIE.select(%0, %17, %18) -// CHECK: %20 = AIE.switchbox(%19) { -// CHECK: AIE.connect +// CHECK: %17 = aie.iter(0, 1, 1) +// CHECK: %18 = aie.iter(0, 1, 1) +// CHECK: %19 = aie.select(%0, %17, %18) +// CHECK: %20 = aie.switchbox(%19) { +// CHECK: aie.connect // CHECK: } -// CHECK: %21 = AIE.iter(3, 4, 1) -// CHECK: %22 = AIE.iter(3, 4, 1) -// CHECK: %23 = AIE.select(%0, %21, %22) -// CHECK: %24 = AIE.switchbox(%23) { -// CHECK: AIE.connect +// CHECK: %21 = aie.iter(3, 4, 1) +// CHECK: %22 = aie.iter(3, 4, 1) +// CHECK: %23 = aie.select(%0, %21, %22) +// CHECK: %24 = aie.switchbox(%23) { +// CHECK: aie.connect // CHECK: } -// CHECK: %25 = AIE.iter(2, 3, 1) -// CHECK: %26 = AIE.iter(0, 1, 1) -// CHECK: %27 = AIE.select(%0, %25, %26) -// CHECK: %28 = AIE.switchbox(%27) { -// CHECK: AIE.connect +// CHECK: %25 = aie.iter(2, 3, 1) +// CHECK: %26 = aie.iter(0, 1, 1) +// CHECK: %27 = aie.select(%0, %25, %26) +// CHECK: %28 = aie.switchbox(%27) { +// CHECK: aie.connect // CHECK: } -// CHECK: %29 = AIE.iter(3, 4, 1) -// CHECK: %30 = AIE.iter(0, 1, 1) -// CHECK: %31 = AIE.select(%0, %29, %30) -// CHECK: %32 = AIE.switchbox(%31) { -// CHECK: AIE.connect +// CHECK: %29 = aie.iter(3, 4, 1) +// CHECK: %30 = aie.iter(0, 1, 1) +// CHECK: %31 = aie.select(%0, %29, %30) +// CHECK: %32 = aie.switchbox(%31) { +// CHECK: aie.connect // CHECK: } // CHECK: } @@ -69,15 +69,15 @@ // // t[0][0] copies to s[0][0] module @test_herd_routing0 { - AIE.device(xcvc1902) { - %0 = AIE.herd[1][1] { sym_name = "t" } // herd t - %1 = AIE.herd[1][1] { sym_name = "s" } // herd s + aie.device(xcvc1902) { + %0 = aie.herd[1][1] { sym_name = "t" } // herd t + %1 = aie.herd[1][1] { sym_name = "s" } // herd s - %i0 = AIE.iter(0, 1, 1) + %i0 = aie.iter(0, 1, 1) - %2 = AIE.select(%0, %i0, %i0) - %3 = AIE.select(%1, %i0, %i0) - AIE.place(%0, %1, 3, 3) // herd t[0][0] and herd s[0][0] are spaced by 3-horizontally and 3-vertically - AIE.route(<%2, DMA: 0>, <%3, DMA: 0>) + %2 = aie.select(%0, %i0, %i0) + %3 = aie.select(%1, %i0, %i0) + aie.place(%0, %1, 3, 3) // herd t[0][0] and herd s[0][0] are spaced by 3-horizontally and 3-vertically + aie.route(<%2, DMA: 0>, <%3, DMA: 0>) } } diff --git a/test/herd-routing/test_herd_routing1.mlir b/test/herd-routing/test_herd_routing1.mlir index e09728b953..d3de2b5f3f 100644 --- a/test/herd-routing/test_herd_routing1.mlir +++ b/test/herd-routing/test_herd_routing1.mlir @@ -12,144 +12,144 @@ // RUN: aie-opt --aie-herd-routing %s | FileCheck %s // CHECK-LABEL: module @test_herd_routing1 { -// CHECK: %0 = AIE.herd[4] [1] {sym_name = "t"} -// CHECK: %1 = AIE.herd[4] [4] {sym_name = "s"} -// CHECK: %2 = AIE.iter(0, 1, 1) -// CHECK: %3 = AIE.iter(0, 4, 1) -// CHECK: %4 = AIE.iter(0, 4, 1) -// CHECK: %5 = AIE.select(%0, %3, %2) -// CHECK: %6 = AIE.select(%1, %3, %4) -// CHECK: %7 = AIE.iter(1, 2, 1) -// CHECK: %8 = AIE.iter(4, 5, 1) -// CHECK: %9 = AIE.select(%0, %7, %8) -// CHECK: %10 = AIE.switchbox(%9) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %11 = AIE.iter(1, 2, 1) -// CHECK: %12 = AIE.iter(3, 4, 1) -// CHECK: %13 = AIE.select(%0, %11, %12) -// CHECK: %14 = AIE.switchbox(%13) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %15 = AIE.iter(0, 1, 1) -// CHECK: %16 = AIE.iter(4, 5, 1) -// CHECK: %17 = AIE.select(%0, %15, %16) -// CHECK: %18 = AIE.switchbox(%17) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %19 = AIE.iter(1, 2, 1) -// CHECK: %20 = AIE.iter(0, 1, 1) -// CHECK: %21 = AIE.select(%0, %19, %20) -// CHECK: %22 = AIE.switchbox(%21) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %23 = AIE.iter(3, 4, 1) -// CHECK: %24 = AIE.iter(2, 3, 1) -// CHECK: %25 = AIE.select(%0, %23, %24) -// CHECK: %26 = AIE.switchbox(%25) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %27 = AIE.iter(1, 2, 1) -// CHECK: %28 = AIE.iter(2, 3, 1) -// CHECK: %29 = AIE.select(%0, %27, %28) -// CHECK: %30 = AIE.switchbox(%29) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %31 = AIE.iter(2, 3, 1) -// CHECK: %32 = AIE.iter(2, 3, 1) -// CHECK: %33 = AIE.select(%0, %31, %32) -// CHECK: %34 = AIE.switchbox(%33) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %35 = AIE.iter(0, 1, 1) -// CHECK: %36 = AIE.iter(0, 1, 1) -// CHECK: %37 = AIE.select(%0, %35, %36) -// CHECK: %38 = AIE.switchbox(%37) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %39 = AIE.iter(3, 4, 1) -// CHECK: %40 = AIE.iter(3, 4, 1) -// CHECK: %41 = AIE.select(%0, %39, %40) -// CHECK: %42 = AIE.switchbox(%41) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %43 = AIE.iter(3, 4, 1) -// CHECK: %44 = AIE.iter(0, 1, 1) -// CHECK: %45 = AIE.select(%0, %43, %44) -// CHECK: %46 = AIE.switchbox(%45) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %47 = AIE.iter(2, 3, 1) -// CHECK: %48 = AIE.iter(3, 4, 1) -// CHECK: %49 = AIE.select(%0, %47, %48) -// CHECK: %50 = AIE.switchbox(%49) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %51 = AIE.iter(0, 1, 1) -// CHECK: %52 = AIE.iter(3, 4, 1) -// CHECK: %53 = AIE.select(%0, %51, %52) -// CHECK: %54 = AIE.switchbox(%53) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %55 = AIE.iter(2, 3, 1) -// CHECK: %56 = AIE.iter(4, 5, 1) -// CHECK: %57 = AIE.select(%0, %55, %56) -// CHECK: %58 = AIE.switchbox(%57) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %59 = AIE.iter(2, 3, 1) -// CHECK: %60 = AIE.iter(0, 1, 1) -// CHECK: %61 = AIE.select(%0, %59, %60) -// CHECK: %62 = AIE.switchbox(%61) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %63 = AIE.iter(3, 4, 1) -// CHECK: %64 = AIE.iter(1, 2, 1) -// CHECK: %65 = AIE.select(%0, %63, %64) -// CHECK: %66 = AIE.switchbox(%65) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %67 = AIE.iter(3, 4, 1) -// CHECK: %68 = AIE.iter(4, 5, 1) -// CHECK: %69 = AIE.select(%0, %67, %68) -// CHECK: %70 = AIE.switchbox(%69) { -// CHECK: AIE.connect -// CHECK: } -// CHECK: %71 = AIE.iter(1, 2, 1) -// CHECK: %72 = AIE.iter(1, 2, 1) -// CHECK: %73 = AIE.select(%0, %71, %72) -// CHECK: %74 = AIE.switchbox(%73) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %75 = AIE.iter(2, 3, 1) -// CHECK: %76 = AIE.iter(1, 2, 1) -// CHECK: %77 = AIE.select(%0, %75, %76) -// CHECK: %78 = AIE.switchbox(%77) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %79 = AIE.iter(0, 1, 1) -// CHECK: %80 = AIE.iter(2, 3, 1) -// CHECK: %81 = AIE.select(%0, %79, %80) -// CHECK: %82 = AIE.switchbox(%81) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: } -// CHECK: %83 = AIE.iter(0, 1, 1) -// CHECK: %84 = AIE.iter(1, 2, 1) -// CHECK: %85 = AIE.select(%0, %83, %84) -// CHECK: %86 = AIE.switchbox(%85) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %0 = aie.herd[4] [1] {sym_name = "t"} +// CHECK: %1 = aie.herd[4] [4] {sym_name = "s"} +// CHECK: %2 = aie.iter(0, 1, 1) +// CHECK: %3 = aie.iter(0, 4, 1) +// CHECK: %4 = aie.iter(0, 4, 1) +// CHECK: %5 = aie.select(%0, %3, %2) +// CHECK: %6 = aie.select(%1, %3, %4) +// CHECK: %7 = aie.iter(1, 2, 1) +// CHECK: %8 = aie.iter(4, 5, 1) +// CHECK: %9 = aie.select(%0, %7, %8) +// CHECK: %10 = aie.switchbox(%9) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %11 = aie.iter(1, 2, 1) +// CHECK: %12 = aie.iter(3, 4, 1) +// CHECK: %13 = aie.select(%0, %11, %12) +// CHECK: %14 = aie.switchbox(%13) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %15 = aie.iter(0, 1, 1) +// CHECK: %16 = aie.iter(4, 5, 1) +// CHECK: %17 = aie.select(%0, %15, %16) +// CHECK: %18 = aie.switchbox(%17) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %19 = aie.iter(1, 2, 1) +// CHECK: %20 = aie.iter(0, 1, 1) +// CHECK: %21 = aie.select(%0, %19, %20) +// CHECK: %22 = aie.switchbox(%21) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %23 = aie.iter(3, 4, 1) +// CHECK: %24 = aie.iter(2, 3, 1) +// CHECK: %25 = aie.select(%0, %23, %24) +// CHECK: %26 = aie.switchbox(%25) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %27 = aie.iter(1, 2, 1) +// CHECK: %28 = aie.iter(2, 3, 1) +// CHECK: %29 = aie.select(%0, %27, %28) +// CHECK: %30 = aie.switchbox(%29) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %31 = aie.iter(2, 3, 1) +// CHECK: %32 = aie.iter(2, 3, 1) +// CHECK: %33 = aie.select(%0, %31, %32) +// CHECK: %34 = aie.switchbox(%33) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %35 = aie.iter(0, 1, 1) +// CHECK: %36 = aie.iter(0, 1, 1) +// CHECK: %37 = aie.select(%0, %35, %36) +// CHECK: %38 = aie.switchbox(%37) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %39 = aie.iter(3, 4, 1) +// CHECK: %40 = aie.iter(3, 4, 1) +// CHECK: %41 = aie.select(%0, %39, %40) +// CHECK: %42 = aie.switchbox(%41) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %43 = aie.iter(3, 4, 1) +// CHECK: %44 = aie.iter(0, 1, 1) +// CHECK: %45 = aie.select(%0, %43, %44) +// CHECK: %46 = aie.switchbox(%45) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %47 = aie.iter(2, 3, 1) +// CHECK: %48 = aie.iter(3, 4, 1) +// CHECK: %49 = aie.select(%0, %47, %48) +// CHECK: %50 = aie.switchbox(%49) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %51 = aie.iter(0, 1, 1) +// CHECK: %52 = aie.iter(3, 4, 1) +// CHECK: %53 = aie.select(%0, %51, %52) +// CHECK: %54 = aie.switchbox(%53) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %55 = aie.iter(2, 3, 1) +// CHECK: %56 = aie.iter(4, 5, 1) +// CHECK: %57 = aie.select(%0, %55, %56) +// CHECK: %58 = aie.switchbox(%57) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %59 = aie.iter(2, 3, 1) +// CHECK: %60 = aie.iter(0, 1, 1) +// CHECK: %61 = aie.select(%0, %59, %60) +// CHECK: %62 = aie.switchbox(%61) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %63 = aie.iter(3, 4, 1) +// CHECK: %64 = aie.iter(1, 2, 1) +// CHECK: %65 = aie.select(%0, %63, %64) +// CHECK: %66 = aie.switchbox(%65) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %67 = aie.iter(3, 4, 1) +// CHECK: %68 = aie.iter(4, 5, 1) +// CHECK: %69 = aie.select(%0, %67, %68) +// CHECK: %70 = aie.switchbox(%69) { +// CHECK: aie.connect +// CHECK: } +// CHECK: %71 = aie.iter(1, 2, 1) +// CHECK: %72 = aie.iter(1, 2, 1) +// CHECK: %73 = aie.select(%0, %71, %72) +// CHECK: %74 = aie.switchbox(%73) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %75 = aie.iter(2, 3, 1) +// CHECK: %76 = aie.iter(1, 2, 1) +// CHECK: %77 = aie.select(%0, %75, %76) +// CHECK: %78 = aie.switchbox(%77) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %79 = aie.iter(0, 1, 1) +// CHECK: %80 = aie.iter(2, 3, 1) +// CHECK: %81 = aie.select(%0, %79, %80) +// CHECK: %82 = aie.switchbox(%81) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: } +// CHECK: %83 = aie.iter(0, 1, 1) +// CHECK: %84 = aie.iter(1, 2, 1) +// CHECK: %85 = aie.select(%0, %83, %84) +// CHECK: %86 = aie.switchbox(%85) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } // CHECK: } @@ -164,17 +164,17 @@ // t[2][0] broadcasts to s[2][0], s[2][1], s[2][2], s[2][3] // t[3][0] broadcasts to s[3][0], s[3][1], s[3][2], s[3][3] module @test_herd_routing1 { - AIE.device(xcvc1902) { - %0 = AIE.herd[4][1] { sym_name = "t" } // herd t - %1 = AIE.herd[4][4] { sym_name = "s" } // herd s + aie.device(xcvc1902) { + %0 = aie.herd[4][1] { sym_name = "t" } // herd t + %1 = aie.herd[4][4] { sym_name = "s" } // herd s - %i0 = AIE.iter(0, 1, 1) - %i1 = AIE.iter(0, 4, 1) - %i2 = AIE.iter(0, 4, 1) + %i0 = aie.iter(0, 1, 1) + %i1 = aie.iter(0, 4, 1) + %i2 = aie.iter(0, 4, 1) - %2 = AIE.select(%0, %i1, %i0) - %3 = AIE.select(%1, %i1, %i2) - AIE.place(%0, %1, 0, 1) // herd t[0][0] and herd s[0][0] are spaced by 0-horizontally and 1-vertically - AIE.route(<%2, DMA: 0>, <%3, DMA: 0>) + %2 = aie.select(%0, %i1, %i0) + %3 = aie.select(%1, %i1, %i2) + aie.place(%0, %1, 0, 1) // herd t[0][0] and herd s[0][0] are spaced by 0-horizontally and 1-vertically + aie.route(<%2, DMA: 0>, <%3, DMA: 0>) } } diff --git a/test/herd-routing/test_herd_routing2.mlir b/test/herd-routing/test_herd_routing2.mlir index 4e4e538153..52ef49c514 100644 --- a/test/herd-routing/test_herd_routing2.mlir +++ b/test/herd-routing/test_herd_routing2.mlir @@ -18,31 +18,31 @@ // Herd "pp" streams data to the first column of Herd "compute" // Herd "ifm" streams data to Herd "compute" column-by-column module @test_herd_routing2 { - AIE.device(xcvc1902) { - %0 = AIE.herd[4][1] { sym_name = "pp" } // herd ping-pong - %1 = AIE.herd[4][1] { sym_name = "ifm" } // herd input-feature-map - %2 = AIE.herd[4][4] { sym_name = "compute" } // herd compute + aie.device(xcvc1902) { + %0 = aie.herd[4][1] { sym_name = "pp" } // herd ping-pong + %1 = aie.herd[4][1] { sym_name = "ifm" } // herd input-feature-map + %2 = aie.herd[4][4] { sym_name = "compute" } // herd compute - AIE.place(%0, %2, 0, 2) - AIE.place(%1, %2, 0, 1) + aie.place(%0, %2, 0, 2) + aie.place(%1, %2, 0, 1) - %i0 = AIE.iter(0, 1, 1) // 0 - %i1 = AIE.iter(0, 4, 1) // 0, 1, 2, 3 - %i2 = AIE.iter(0, 4, 1) // 0, 1, 2, 3 + %i0 = aie.iter(0, 1, 1) // 0 + %i1 = aie.iter(0, 4, 1) // 0, 1, 2, 3 + %i2 = aie.iter(0, 4, 1) // 0, 1, 2, 3 - %3 = AIE.select(%0, %i1, %i0) // (0, 0), (1, 0), (2, 0), (3, 0) + %3 = aie.select(%0, %i1, %i0) // (0, 0), (1, 0), (2, 0), (3, 0) // | | | | // v v v v - %4 = AIE.select(%2, %i0, %i1) // (0, 0), (0, 1), (0, 2), (0, 3) - AIE.route(<%3, DMA: 0>, <%4, DMA: 0>) + %4 = aie.select(%2, %i0, %i1) // (0, 0), (0, 1), (0, 2), (0, 3) + aie.route(<%3, DMA: 0>, <%4, DMA: 0>) - %5 = AIE.select(%1, %i1, %i0) // (0, 0), (1, 0), (2, 0), (3, 0) + %5 = aie.select(%1, %i1, %i0) // (0, 0), (1, 0), (2, 0), (3, 0) // | | | | // v v v v - %6 = AIE.select(%2, %i1, %i2) // (0, 0), (1, 0), (2, 0), (3, 0) + %6 = aie.select(%2, %i1, %i2) // (0, 0), (1, 0), (2, 0), (3, 0) // (0, 1), (1, 1), (2, 1), (3, 1) // (0, 2), (1, 2), (2, 2), (3, 2) // (0, 3), (1, 3), (2, 3), (3, 3) - AIE.route(<%5, DMA: 0>, <%6, DMA: 1>) + aie.route(<%5, DMA: 0>, <%6, DMA: 1>) } } diff --git a/test/herd.mlir b/test/herd.mlir index 836da6935e..6934fb0973 100644 --- a/test/herd.mlir +++ b/test/herd.mlir @@ -13,9 +13,9 @@ // CHECK: } module { - %2 = AIE.tile(2, 3) - %3 = AIE.tile(2, 2) - AIE.flow(%2, Core : 0, %3, Core : 1) - AIE.flow(%3, Core : 0, %3, Core : 0) - AIE.flow(%3, Core : 1, %2, Core : 1) + %2 = aie.tile(2, 3) + %3 = aie.tile(2, 2) + aie.flow(%2, Core : 0, %3, Core : 1) + aie.flow(%3, Core : 0, %3, Core : 0) + aie.flow(%3, Core : 1, %2, Core : 1) } diff --git a/test/ipu-xrt/add_one_objFifo/aie.mlir b/test/ipu-xrt/add_one_objFifo/aie.mlir index 7c8950e1cd..62528247bb 100644 --- a/test/ipu-xrt/add_one_objFifo/aie.mlir +++ b/test/ipu-xrt/add_one_objFifo/aie.mlir @@ -6,46 +6,46 @@ //===----------------------------------------------------------------------===// module { - AIE.device(ipu) { - %t00 = AIE.tile(0, 0) - %t01 = AIE.tile(0, 1) - %t02 = AIE.tile(0, 2) + aie.device(ipu) { + %t00 = aie.tile(0, 0) + %t01 = aie.tile(0, 1) + %t02 = aie.tile(0, 2) - AIE.objectfifo @objFifo_in0(%t00, {%t01}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @objFifo_in1(%t01, {%t02}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo.link [@objFifo_in0] -> [@objFifo_in1] () - AIE.objectfifo @objFifo_out0(%t01, {%t00}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @objFifo_out1(%t02, {%t01}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo.link [@objFifo_out1] -> [@objFifo_out0] () + aie.objectfifo @objFifo_in0(%t00, {%t01}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @objFifo_in1(%t01, {%t02}, 2 : i32) : !aie.objectfifo> + aie.objectfifo.link [@objFifo_in0] -> [@objFifo_in1] () + aie.objectfifo @objFifo_out0(%t01, {%t00}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @objFifo_out1(%t02, {%t01}, 2 : i32) : !aie.objectfifo> + aie.objectfifo.link [@objFifo_out1] -> [@objFifo_out0] () - AIE.core(%t02) { + aie.core(%t02) { %c8 = arith.constant 8 : index %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c1_32 = arith.constant 1 : i32 scf.for %steps = %c0 to %c8 step %c1 { - %subview0 = AIE.objectfifo.acquire @objFifo_in1(Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<8xi32> - %subview1 = AIE.objectfifo.acquire @objFifo_out1(Produce, 1) : !AIE.objectfifosubview> - %elem1 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<8xi32> + %subview0 = aie.objectfifo.acquire @objFifo_in1(Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<8xi32> + %subview1 = aie.objectfifo.acquire @objFifo_out1(Produce, 1) : !aie.objectfifosubview> + %elem1 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<8xi32> scf.for %arg3 = %c0 to %c8 step %c1 { %0 = memref.load %elem0[%arg3] : memref<8xi32> %1 = arith.addi %0, %c1_32 : i32 memref.store %1, %elem1[%arg3] : memref<8xi32> } - AIE.objectfifo.release @objFifo_in1(Consume, 1) - AIE.objectfifo.release @objFifo_out1(Produce, 1) + aie.objectfifo.release @objFifo_in1(Consume, 1) + aie.objectfifo.release @objFifo_out1(Produce, 1) } - AIE.end + aie.end } func.func @sequence(%in : memref<64xi32>, %buf : memref<32xi32>, %out : memref<64xi32>) { %c0 = arith.constant 0 : i32 %c1 = arith.constant 1 : i32 %c64 = arith.constant 64 : i32 - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_out0, id = 1 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_in0, id = 0 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) - AIEX.ipu.sync { column = 0 : i32, row = 0 : i32, direction = 0 : i32, channel = 0 : i32, column_num = 1 : i32, row_num = 1 : i32 } + aiex.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_out0, id = 1 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_in0, id = 0 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) + aiex.ipu.sync { column = 0 : i32, row = 0 : i32, direction = 0 : i32, channel = 0 : i32, column_num = 1 : i32, row_num = 1 : i32 } return } } diff --git a/test/localize-locks/locks-ve2802.mlir b/test/localize-locks/locks-ve2802.mlir index d2fc5a8a70..66e6965cff 100644 --- a/test/localize-locks/locks-ve2802.mlir +++ b/test/localize-locks/locks-ve2802.mlir @@ -10,88 +10,88 @@ // RUN: aie-opt --aie-localize-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2802) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 5) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_4:.*]] = AIE.tile(4, 4) -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_3]], 8) -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_4]], 8) -// CHECK: %[[VAL_8:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK-LABEL: aie.device(xcve2802) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 5) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_4:.*]] = aie.tile(4, 4) +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_3]], 8) +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_4]], 8) +// CHECK: %[[VAL_8:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_9:.*]] = arith.constant 48 : index -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_10:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_10:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_11:.*]] = arith.constant 8 : index -// CHECK: AIE.use_lock(%[[VAL_11]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_11]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.core(%[[VAL_2]]) { +// CHECK: %[[VAL_12:.*]] = aie.core(%[[VAL_2]]) { // CHECK: %[[VAL_13:.*]] = arith.constant 40 : index -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_14:.*]] = AIE.core(%[[VAL_3]]) { +// CHECK: %[[VAL_14:.*]] = aie.core(%[[VAL_3]]) { // CHECK: %[[VAL_15:.*]] = arith.constant 56 : index -// CHECK: AIE.use_lock(%[[VAL_15]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_15]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.core(%[[VAL_4]]) { +// CHECK: %[[VAL_16:.*]] = aie.core(%[[VAL_4]]) { // CHECK: %[[VAL_17:.*]] = arith.constant 56 : index // CHECK: %[[VAL_18:.*]] = arith.constant 24 : index -// CHECK: AIE.use_lock(%[[VAL_18]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_18]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_17]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_17]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_18]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_18]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_17]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_17]], Release, 1) +// CHECK: aie.end // CHECK: } // CHECK: } module @test_xaie0 { - AIE.device(xcve2802) { - %t13 = AIE.tile(1, 3) - %t35 = AIE.tile(3, 5) - %t33 = AIE.tile(3, 3) - %t34 = AIE.tile(3, 4) - %t44 = AIE.tile(4, 4) + aie.device(xcve2802) { + %t13 = aie.tile(1, 3) + %t35 = aie.tile(3, 5) + %t33 = aie.tile(3, 3) + %t34 = aie.tile(3, 4) + %t44 = aie.tile(4, 4) - %l11_8 = AIE.lock(%t13, 0) - %l33_8 = AIE.lock(%t34, 8) - %l43_8 = AIE.lock(%t44, 8) + %l11_8 = aie.lock(%t13, 0) + %l33_8 = aie.lock(%t34, 8) + %l43_8 = aie.lock(%t44, 8) - AIE.core(%t13) { - AIE.use_lock(%l11_8, Acquire, 0) - AIE.use_lock(%l11_8, Release, 1) - AIE.end + aie.core(%t13) { + aie.use_lock(%l11_8, Acquire, 0) + aie.use_lock(%l11_8, Release, 1) + aie.end } - AIE.core(%t35) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.end + aie.core(%t35) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.end } - AIE.core(%t33) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.end + aie.core(%t33) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.end } - AIE.core(%t34) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.end + aie.core(%t34) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.end } - AIE.core(%t44) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.use_lock(%l43_8, Acquire, 0) - AIE.use_lock(%l43_8, Release, 1) - AIE.end + aie.core(%t44) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.use_lock(%l43_8, Acquire, 0) + aie.use_lock(%l43_8, Release, 1) + aie.end } } } diff --git a/test/localize-locks/locks1.mlir b/test/localize-locks/locks1.mlir index d8b75a6eab..d9ec3b5bb8 100644 --- a/test/localize-locks/locks1.mlir +++ b/test/localize-locks/locks1.mlir @@ -9,88 +9,88 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-localize-locks %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 4) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(4, 3) -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_3]], 8) -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_4]], 8) -// CHECK: %[[VAL_8:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 4) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(4, 3) +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_3]], 8) +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_4]], 8) +// CHECK: %[[VAL_8:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_9:.*]] = arith.constant 48 : index -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_10:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_10:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_11:.*]] = arith.constant 8 : index -// CHECK: AIE.use_lock(%[[VAL_11]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_11]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.core(%[[VAL_2]]) { +// CHECK: %[[VAL_12:.*]] = aie.core(%[[VAL_2]]) { // CHECK: %[[VAL_13:.*]] = arith.constant 40 : index -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_14:.*]] = AIE.core(%[[VAL_3]]) { +// CHECK: %[[VAL_14:.*]] = aie.core(%[[VAL_3]]) { // CHECK: %[[VAL_15:.*]] = arith.constant 56 : index -// CHECK: AIE.use_lock(%[[VAL_15]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_15]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.core(%[[VAL_4]]) { +// CHECK: %[[VAL_16:.*]] = aie.core(%[[VAL_4]]) { // CHECK: %[[VAL_17:.*]] = arith.constant 56 : index // CHECK: %[[VAL_18:.*]] = arith.constant 24 : index -// CHECK: AIE.use_lock(%[[VAL_18]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_18]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_17]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_17]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_18]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_18]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_17]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_17]], Release, 1) +// CHECK: aie.end // CHECK: } // CHECK: } module @test_xaie0 { - AIE.device(xcvc1902) { - %t11 = AIE.tile(1, 1) - %t34 = AIE.tile(3, 4) - %t32 = AIE.tile(3, 2) - %t33 = AIE.tile(3, 3) - %t43 = AIE.tile(4, 3) + aie.device(xcvc1902) { + %t11 = aie.tile(1, 1) + %t34 = aie.tile(3, 4) + %t32 = aie.tile(3, 2) + %t33 = aie.tile(3, 3) + %t43 = aie.tile(4, 3) - %l11_8 = AIE.lock(%t11, 0) - %l33_8 = AIE.lock(%t33, 8) - %l43_8 = AIE.lock(%t43, 8) + %l11_8 = aie.lock(%t11, 0) + %l33_8 = aie.lock(%t33, 8) + %l43_8 = aie.lock(%t43, 8) - AIE.core(%t11) { - AIE.use_lock(%l11_8, Acquire, 0) - AIE.use_lock(%l11_8, Release, 1) - AIE.end + aie.core(%t11) { + aie.use_lock(%l11_8, Acquire, 0) + aie.use_lock(%l11_8, Release, 1) + aie.end } - AIE.core(%t34) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.end + aie.core(%t34) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.end } - AIE.core(%t32) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.end + aie.core(%t32) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.end } - AIE.core(%t33) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.end + aie.core(%t33) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.end } - AIE.core(%t43) { - AIE.use_lock(%l33_8, Acquire, 0) - AIE.use_lock(%l33_8, Release, 1) - AIE.use_lock(%l43_8, Acquire, 0) - AIE.use_lock(%l43_8, Release, 1) - AIE.end + aie.core(%t43) { + aie.use_lock(%l33_8, Acquire, 0) + aie.use_lock(%l33_8, Release, 1) + aie.use_lock(%l43_8, Acquire, 0) + aie.use_lock(%l43_8, Release, 1) + aie.end } } } diff --git a/test/lower-to-standard/local_locks.mlir b/test/lower-to-standard/local_locks.mlir index fb088354a5..84e89a26e1 100644 --- a/test/lower-to-standard/local_locks.mlir +++ b/test/lower-to-standard/local_locks.mlir @@ -22,13 +22,13 @@ // CHECK33: } module @local_locks { - AIE.device(xcvc1902) { - %3 = AIE.tile(3, 3) - %11 = AIE.core(%3) { + aie.device(xcvc1902) { + %3 = aie.tile(3, 3) + %11 = aie.core(%3) { %c56 = arith.constant 56 : index - AIE.use_lock(%c56, Acquire, 0) - AIE.use_lock(%c56, Release, 1) - AIE.end + aie.use_lock(%c56, Acquire, 0) + aie.use_lock(%c56, Release, 1) + aie.end } } } diff --git a/test/lower-to-standard/lower_buffer.mlir b/test/lower-to-standard/lower_buffer.mlir index 3c47799c71..c93ebc7b50 100644 --- a/test/lower-to-standard/lower_buffer.mlir +++ b/test/lower-to-standard/lower_buffer.mlir @@ -29,22 +29,22 @@ // CHECK33: } module @codegen1 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %a = AIE.buffer(%t33) { sym_name = "a" } : memref<4xi32> - %core33 = AIE.core(%t33) { + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %a = aie.buffer(%t33) { sym_name = "a" } : memref<4xi32> + %core33 = aie.core(%t33) { %0 = arith.constant 0 : index %377 = arith.constant 377 : i32 memref.store %377, %a[%0] : memref<4xi32> - AIE.end + aie.end } - %t34 = AIE.tile(4, 3) + %t34 = aie.tile(4, 3) - %core34 = AIE.core(%t34) { + %core34 = aie.core(%t34) { %0 = arith.constant 0 : index %1 = memref.load %a[%0] : memref<4xi32> -// AIE.debug(%1 : i32) - AIE.end +// aie.debug(%1 : i32) + aie.end } } } diff --git a/test/lower-to-standard/lower_buffer_and_lock.mlir b/test/lower-to-standard/lower_buffer_and_lock.mlir index 878b44d23a..379d462858 100644 --- a/test/lower-to-standard/lower_buffer_and_lock.mlir +++ b/test/lower-to-standard/lower_buffer_and_lock.mlir @@ -18,7 +18,7 @@ // - Buffer: depending on which tile (or memory module) a buffer is instantiated, create an LLVM // static allocation (for now) for each core that can access to the buffer module @test_core_llvm1 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // CHECK11: memref.global "public" @a : memref<256xi32> // CHECK11: func.func @core_1_1() { // CHECK11: %c56 = arith.constant 56 : index @@ -51,27 +51,27 @@ module @test_core_llvm1 { // CHECK12: call @llvm.aie.lock.release.reg(%3, %c0_i32) : (i32, i32) -> () // CHECK12: return // CHECK12: } - %tile11 = AIE.tile(1, 1) - %tile12 = AIE.tile(1, 2) + %tile11 = aie.tile(1, 1) + %tile12 = aie.tile(1, 2) - %lock11_8 = AIE.lock(%tile11, 8) - %buf11_0 = AIE.buffer(%tile11) { sym_name = "a" } : memref<256xi32> + %lock11_8 = aie.lock(%tile11, 8) + %buf11_0 = aie.buffer(%tile11) { sym_name = "a" } : memref<256xi32> - %core11 = AIE.core(%tile11) { - AIE.use_lock(%lock11_8, Acquire, 0) + %core11 = aie.core(%tile11) { + aie.use_lock(%lock11_8, Acquire, 0) %0 = arith.constant 1 : i32 %i = arith.constant 16 : index memref.store %0, %buf11_0[%i] : memref<256xi32> - AIE.use_lock(%lock11_8, Release, 1) - AIE.end + aie.use_lock(%lock11_8, Release, 1) + aie.end } - %core12 = AIE.core(%tile12) { - AIE.use_lock(%lock11_8, Acquire, 1) + %core12 = aie.core(%tile12) { + aie.use_lock(%lock11_8, Acquire, 1) %i = arith.constant 16 : index %0 = memref.load %buf11_0[%i] : memref<256xi32> - AIE.use_lock(%lock11_8, Release, 0) - AIE.end + aie.use_lock(%lock11_8, Release, 0) + aie.end } } } diff --git a/test/lower-to-standard/lower_dma.mlir b/test/lower-to-standard/lower_dma.mlir index 034b396d53..ef95218584 100644 --- a/test/lower-to-standard/lower_dma.mlir +++ b/test/lower-to-standard/lower_dma.mlir @@ -17,7 +17,7 @@ // CHECK: call @llvm.aie.lock.release.reg({{.*}}, %c1_i32) : (i32, i32) -> () module @example0 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // Odd AIE rows: DMem on the East // Even AIE rows: DMem on the West @@ -26,67 +26,67 @@ module @example0 { // (2, 3) (3, 3) (4, 3) (5, 3) // (2, 2) (3, 2) (4, 2) (5, 2) - %t11 = AIE.tile(1, 1) - %t33 = AIE.tile(3, 3) - %t43 = AIE.tile(4, 3) + %t11 = aie.tile(1, 1) + %t33 = aie.tile(3, 3) + %t43 = aie.tile(4, 3) - %l33_0 = AIE.lock(%t33, 0) - %l33_1 = AIE.lock(%t33, 1) - %l43_0 = AIE.lock(%t43, 0) + %l33_0 = aie.lock(%t33, 0) + %l33_1 = aie.lock(%t33, 1) + %l43_0 = aie.lock(%t43, 0) - %buf33 = AIE.buffer(%t33) { sym_name = "a" } : memref<256xi32> - %buf43 = AIE.buffer(%t43) { sym_name = "b" } : memref<256xi32> + %buf33 = aie.buffer(%t33) { sym_name = "a" } : memref<256xi32> + %buf43 = aie.buffer(%t43) { sym_name = "b" } : memref<256xi32> - %m33 = AIE.mem(%t33) { - %dmaSt0 = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %m33 = aie.mem(%t33) { + %dmaSt0 = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l33_0, Acquire, 1) - AIE.dma_bd(%buf33 : memref<256xi32>, 0, 256) - AIE.use_lock(%l33_0, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l33_0, Acquire, 1) + aie.dma_bd(%buf33 : memref<256xi32>, 0, 256) + aie.use_lock(%l33_0, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m43 = AIE.mem(%t43) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m43 = aie.mem(%t43) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l43_0, Acquire, 0) - AIE.dma_bd(%buf43 : memref<256xi32>, 0, 256) - AIE.use_lock(%l43_0, Release, 1) - AIE.next_bd ^end + aie.use_lock(%l43_0, Acquire, 0) + aie.dma_bd(%buf43 : memref<256xi32>, 0, 256) + aie.use_lock(%l43_0, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %s33 = AIE.switchbox(%t33) { - AIE.connect + %s33 = aie.switchbox(%t33) { + aie.connect } - %s43 = AIE.switchbox(%t43) { - AIE.connect + %s43 = aie.switchbox(%t43) { + aie.connect } - %c33 = AIE.core(%t33) { - AIE.use_lock(%l33_0, Acquire, 0) + %c33 = aie.core(%t33) { + aie.use_lock(%l33_0, Acquire, 0) // code %val0 = arith.constant 16 : i32 %0 = arith.constant 0 : i32 - AIE.put_stream(%0 : i32, %val0 : i32) - %val1 = AIE.get_stream(%0 : i32) : i128 + aie.put_stream(%0 : i32, %val0 : i32) + %val1 = aie.get_stream(%0 : i32) : i128 %val2 = arith.constant 1 : i384 - AIE.putCascade(%val2: i384) - AIE.use_lock(%l33_0, Release, 1) - AIE.end + aie.putCascade(%val2: i384) + aie.use_lock(%l33_0, Release, 1) + aie.end } - %c43 = AIE.core(%t43) { - AIE.use_lock(%l43_0, Acquire, 1) + %c43 = aie.core(%t43) { + aie.use_lock(%l43_0, Acquire, 1) // code - AIE.use_lock(%l43_0, Release, 0) - AIE.end + aie.use_lock(%l43_0, Release, 0) + aie.end } } } diff --git a/test/lower-to-standard/lower_event.mlir b/test/lower-to-standard/lower_event.mlir index 5215e9a088..11e5646b64 100644 --- a/test/lower-to-standard/lower_event.mlir +++ b/test/lower-to-standard/lower_event.mlir @@ -13,12 +13,12 @@ // CHECK: call @llvm.aie.event0() // CHECK: call @llvm.aie.event1() module @test { - AIE.device(xcvc1902) { - %tile11 = AIE.tile(1, 1) - %core11 = AIE.core(%tile11) { - AIE.event(0) - AIE.event(1) - AIE.end + aie.device(xcvc1902) { + %tile11 = aie.tile(1, 1) + %core11 = aie.core(%tile11) { + aie.event(0) + aie.event(1) + aie.end } } } diff --git a/test/lower-to-standard/lower_stream.mlir b/test/lower-to-standard/lower_stream.mlir index d20ebf7a5c..496581cd96 100644 --- a/test/lower-to-standard/lower_stream.mlir +++ b/test/lower-to-standard/lower_stream.mlir @@ -36,31 +36,31 @@ // Test LLVM lowering to some AIE scalar intrinsic functions (streams, cascades) // Each core's region is lowered to LLVM Dialect module @test_core_llvm0 { - AIE.device(xcvc1902) { - %tile11 = AIE.tile(1, 1) - %tile21 = AIE.tile(2, 1) + aie.device(xcvc1902) { + %tile11 = aie.tile(1, 1) + %tile21 = aie.tile(2, 1) - %core11 = AIE.core(%tile11) { + %core11 = aie.core(%tile11) { %0 = arith.constant 0 : i32 %1 = arith.constant 1 : i32 %val0 = arith.constant 16 : i32 %val1 = arith.constant 32 : i128 - AIE.put_stream(%0 : i32, %val0 : i32) - AIE.put_stream(%1 : i32, %val1 : i128) + aie.put_stream(%0 : i32, %val0 : i32) + aie.put_stream(%1 : i32, %val1 : i128) %val2 = arith.constant 64 : i384 - AIE.putCascade(%val2 : i384) - AIE.end + aie.putCascade(%val2 : i384) + aie.end } - %core21 = AIE.core(%tile21) { + %core21 = aie.core(%tile21) { %0 = arith.constant 0 : i32 %1 = arith.constant 1 : i32 - //%val0 = AIE.get_stream(0) : i32 - %val0 = AIE.get_stream(%0 : i32) : i32 - %val1 = AIE.get_stream(%1 : i32) : i32 + //%val0 = aie.get_stream(0) : i32 + %val0 = aie.get_stream(%0 : i32) : i32 + %val1 = aie.get_stream(%1 : i32) : i32 %2 = arith.addi %val0, %val1 : i32 - %3 = AIE.get_cascade() : i384 - AIE.end + %3 = aie.get_cascade() : i384 + aie.end } } diff --git a/test/lower-to-standard/useLock_in_func.mlir b/test/lower-to-standard/useLock_in_func.mlir index 34ef7dc8d0..60d8bb7945 100644 --- a/test/lower-to-standard/useLock_in_func.mlir +++ b/test/lower-to-standard/useLock_in_func.mlir @@ -15,18 +15,18 @@ // CHECK: } module @test { - AIE.device(xcvc1902) { - %tile13 = AIE.tile(1, 3) - %lock13_3 = AIE.lock(%tile13, 0) + aie.device(xcvc1902) { + %tile13 = aie.tile(1, 3) + %lock13_3 = aie.lock(%tile13, 0) func.func private @kernel(%lock : index) { - AIE.use_lock(%lock, "Acquire", 0) + aie.use_lock(%lock, "Acquire", 0) return } - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { func.call @kernel(%lock13_3) : (index) -> () - AIE.end + aie.end } } } diff --git a/test/merge-buffers/test_buffer_merge0.mlir b/test/merge-buffers/test_buffer_merge0.mlir index ea8869b5a7..75d154cf43 100644 --- a/test/merge-buffers/test_buffer_merge0.mlir +++ b/test/merge-buffers/test_buffer_merge0.mlir @@ -13,36 +13,36 @@ // The idea of this pass is probably not a good one. //CHECK-LABEL: module @test_buffer_merge0 { -//CHECK: %[[TILE33:.*]] = AIE.tile(3, 3) -//CHECK: %[[TILE34:.*]] = AIE.tile(3, 4) -//CHECK: %[[TILE32:.*]] = AIE.tile(3, 2) -//CHECK: %[[LOCK33:.*]] = AIE.lock(%[[TILE33]], 0) -//CHECK: %[[LOCK34:.*]] = AIE.lock(%[[TILE34]], 0) -//CHECK: %[[LOCK32:.*]] = AIE.lock(%[[TILE32]], 0) -//CHECK: %[[BUF33:.*]] = AIE.buffer(%[[TILE33]]) : memref<256xi32> -//CHECK: %[[BUF34:.*]] = AIE.buffer(%[[TILE34]]) : memref<256xi32> -//CHECK: %[[BUF32:.*]] = AIE.buffer(%[[TILE32]]) : memref<256xi32> -//CHECK: %11 = AIE.core(%2) { -//CHECK: AIE.use_lock(%1, Acquire, 0) +//CHECK: %[[TILE33:.*]] = aie.tile(3, 3) +//CHECK: %[[TILE34:.*]] = aie.tile(3, 4) +//CHECK: %[[TILE32:.*]] = aie.tile(3, 2) +//CHECK: %[[LOCK33:.*]] = aie.lock(%[[TILE33]], 0) +//CHECK: %[[LOCK34:.*]] = aie.lock(%[[TILE34]], 0) +//CHECK: %[[LOCK32:.*]] = aie.lock(%[[TILE32]], 0) +//CHECK: %[[BUF33:.*]] = aie.buffer(%[[TILE33]]) : memref<256xi32> +//CHECK: %[[BUF34:.*]] = aie.buffer(%[[TILE34]]) : memref<256xi32> +//CHECK: %[[BUF32:.*]] = aie.buffer(%[[TILE32]]) : memref<256xi32> +//CHECK: %11 = aie.core(%2) { +//CHECK: aie.use_lock(%1, Acquire, 0) //CHECK: %c16 = arith.constant 16 : index //CHECK: %c1_i32 = arith.constant 1 : i32 //CHECK: store %c1_i32, %6[%c16] : memref<256xi32> -//CHECK: AIE.use_lock(%1, Release, 1) -//CHECK: AIE.end +//CHECK: aie.use_lock(%1, Release, 1) +//CHECK: aie.end //CHECK: } -//CHECK: %12 = AIE.core(%3) { -//CHECK: AIE.use_lock(%1, Acquire, 1) +//CHECK: %12 = aie.core(%3) { +//CHECK: aie.use_lock(%1, Acquire, 1) //CHECK: %c16 = arith.constant 16 : index //CHECK: %c1_i32 = arith.constant 1 : i32 //CHECK: %16 = memref.load %6[%c16] : memref<256xi32> -//CHECK: AIE.use_lock(%1, Release, 0) -//CHECK: AIE.end +//CHECK: aie.use_lock(%1, Release, 0) +//CHECK: aie.end //CHECK: } -//CHECK: %13 = AIE.switchbox(%2) { +//CHECK: %13 = aie.switchbox(%2) { //CHECK: } -//CHECK: %14 = AIE.switchbox(%0) { +//CHECK: %14 = aie.switchbox(%0) { //CHECK: } -//CHECK: %15 = AIE.switchbox(%3) { +//CHECK: %15 = aie.switchbox(%3) { //CHECK: } //CHECK: } @@ -63,67 +63,67 @@ // 6. Remove the associated DMA operations (or Block Descriptors) // 7. Remove the associated routing ConnectOps for the DMA operations module @test_buffer_merge0 { - AIE.device(xcvc1902) { - %t33 = AIE.tile(3, 3) - %t34 = AIE.tile(3, 4) - %t32 = AIE.tile(3, 2) + aie.device(xcvc1902) { + %t33 = aie.tile(3, 3) + %t34 = aie.tile(3, 4) + %t32 = aie.tile(3, 2) - %l34_0 = AIE.lock(%t34, 0) - %l32_0 = AIE.lock(%t32, 0) + %l34_0 = aie.lock(%t34, 0) + %l32_0 = aie.lock(%t32, 0) - %buf34_0 = AIE.buffer(%t34) : memref<256xi32> - %buf32_0 = AIE.buffer(%t32) : memref<256xi32> + %buf34_0 = aie.buffer(%t34) : memref<256xi32> + %buf32_0 = aie.buffer(%t32) : memref<256xi32> - %m34 = AIE.mem(%t34) { - %dmaSt = AIE.dma_start(MM2S, 0, ^bd0, ^end) + %m34 = aie.mem(%t34) { + %dmaSt = aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l34_0, Acquire, 1) - AIE.dma_bd(%buf34_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l34_0, Release, 0) - AIE.next_bd ^end + aie.use_lock(%l34_0, Acquire, 1) + aie.dma_bd(%buf34_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l34_0, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m32 = AIE.mem(%t32) { - %dmaSt = AIE.dma_start(S2MM, 0, ^bd0, ^end) + %m32 = aie.mem(%t32) { + %dmaSt = aie.dma_start(S2MM, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l32_0, Acquire, 0) - AIE.dma_bd(%buf32_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l32_0, Release, 1) - AIE.next_bd ^end + aie.use_lock(%l32_0, Acquire, 0) + aie.dma_bd(%buf32_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l32_0, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %c34 = AIE.core(%t34) { - AIE.use_lock(%l34_0, Acquire, 0) + %c34 = aie.core(%t34) { + aie.use_lock(%l34_0, Acquire, 0) %i = arith.constant 16 : index %0 = arith.constant 1 : i32 store %0, %buf34_0[%i] : memref<256xi32> - AIE.use_lock(%l34_0, Release, 1) - AIE.end + aie.use_lock(%l34_0, Release, 1) + aie.end } - %c32 = AIE.core(%t32) { - AIE.use_lock(%l32_0, Acquire, 1) + %c32 = aie.core(%t32) { + aie.use_lock(%l32_0, Acquire, 1) %i = arith.constant 16 : index %0 = arith.constant 1 : i32 %1 = memref.load %buf32_0[%i] : memref<256xi32> - AIE.use_lock(%l32_0, Release, 0) - AIE.end + aie.use_lock(%l32_0, Release, 0) + aie.end } - %s34 = AIE.switchbox(%t34) { - AIE.connect + %s34 = aie.switchbox(%t34) { + aie.connect } - %s33 = AIE.switchbox(%t33) { - AIE.connect + %s33 = aie.switchbox(%t33) { + aie.connect } - %s32 = AIE.switchbox(%t32) { - AIE.connect + %s32 = aie.switchbox(%t32) { + aie.connect } } } diff --git a/test/negative.mlir b/test/negative.mlir index c8911a22ba..9c8c7fd504 100644 --- a/test/negative.mlir +++ b/test/negative.mlir @@ -13,10 +13,10 @@ // CHECK: } module { - %0 = "AIE.tile"() {col=2 : i32, row=3 : i32} : () -> (index) - %1 = "AIE.switchbox"(%0) ({ - "AIE.connect"() {sourceBundle=0:i32,sourceChannel=0:i32,destBundle=3:i32,destChannel=0:i32}: () -> () - "AIE.connect"() {sourceBundle=1:i32,sourceChannel=1:i32,destBundle=4:i32,destChannel=0:i32}: () -> () - "AIE.end"() : () -> () + %0 = "aie.tile"() {col=2 : i32, row=3 : i32} : () -> (index) + %1 = "aie.switchbox"(%0) ({ + "aie.connect"() {sourceBundle=0:i32,sourceChannel=0:i32,destBundle=3:i32,destChannel=0:i32}: () -> () + "aie.connect"() {sourceBundle=1:i32,sourceChannel=1:i32,destBundle=4:i32,destChannel=0:i32}: () -> () + "aie.end"() : () -> () }) : (index) -> (index) } diff --git a/test/normalize_address_spaces/normalize_call_op.mlir b/test/normalize_address_spaces/normalize_call_op.mlir index 70d0603c29..5bdbcb34d6 100644 --- a/test/normalize_address_spaces/normalize_call_op.mlir +++ b/test/normalize_address_spaces/normalize_call_op.mlir @@ -15,14 +15,14 @@ // CHECK: call @external_function(%[[VAL_0]]) : (memref<1024xi32>) -> () // CHECK: func.func private @external_function(memref<1024xi32>) module @aie attributes {llvm.target_triple = "aie"} { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { memref.global "public" @buffer : memref<1024xi32, 2> func.func @coreXY() { %0 = memref.get_global @buffer : memref<1024xi32, 2> memref.assume_alignment %0, 32 : memref<1024xi32, 2> - AIE.next_bd ^bb1 + aie.next_bd ^bb1 ^bb1: // pred: ^bb0 - AIE.next_bd ^bb2 + aie.next_bd ^bb2 ^bb2: // pred: ^bb1 call @external_function(%0) : (memref<1024xi32, 2>) -> () return diff --git a/test/objectFifo-register-process/base_test_1.aie.mlir b/test/objectFifo-register-process/base_test_1.aie.mlir index 9faae9c070..6b4446d2f2 100644 --- a/test/objectFifo-register-process/base_test_1.aie.mlir +++ b/test/objectFifo-register-process/base_test_1.aie.mlir @@ -12,36 +12,36 @@ // RUN: aie-opt --aie-register-objectFifos %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: AIE.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !AIE.objectfifo> +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: aie.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !aie.objectfifo> // CHECK: %[[VAL_2:.*]] = arith.constant dense<1> : tensor<1xi32> // CHECK: %[[VAL_3:.*]] = arith.constant dense<1> : tensor<1xi32> // CHECK: %[[VAL_4:.*]] = arith.constant 10 : index // CHECK: func.func @producer_work() { // CHECK: return // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_5:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_6:.*]] = arith.constant 0 : index // CHECK: %[[VAL_7:.*]] = arith.constant 10 : index // CHECK: %[[VAL_8:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_9:.*]] = %[[VAL_6]] to %[[VAL_7]] step %[[VAL_8]] { -// CHECK: %[[VAL_10:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_11:.*]] = AIE.objectfifo.subview.access %[[VAL_10]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.objectfifo.acquire @objfifo(Produce, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_11:.*]] = aie.objectfifo.subview.access %[[VAL_10]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 1) +// CHECK: aie.objectfifo.release @objfifo(Produce, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @registerPatterns { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> %acquirePattern = arith.constant dense<[1]> : tensor<1xi32> %releasePattern = arith.constant dense<[1]> : tensor<1xi32> @@ -50,6 +50,6 @@ module @registerPatterns { return } - AIE.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<1xi32>, %releasePattern : tensor<1xi32>, @producer_work, %length) + aie.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<1xi32>, %releasePattern : tensor<1xi32>, @producer_work, %length) } } diff --git a/test/objectFifo-register-process/base_test_2.aie.mlir b/test/objectFifo-register-process/base_test_2.aie.mlir index a63ad27c86..ba301c2a35 100644 --- a/test/objectFifo-register-process/base_test_2.aie.mlir +++ b/test/objectFifo-register-process/base_test_2.aie.mlir @@ -12,47 +12,47 @@ // RUN: aie-opt --aie-register-objectFifos %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: AIE.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !AIE.objectfifo> +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: aie.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !aie.objectfifo> // CHECK: %[[VAL_2:.*]] = arith.constant dense<[2, 3, 3, 2]> : tensor<4xi32> // CHECK: %[[VAL_3:.*]] = arith.constant dense<[0, 1, 1, 2]> : tensor<4xi32> // CHECK: %[[VAL_4:.*]] = arith.constant 10 : index // CHECK: func.func @producer_work() { // CHECK: return // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: %[[VAL_6:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 2) : !AIE.objectfifosubview> -// CHECK: %[[VAL_7:.*]] = AIE.objectfifo.subview.access %[[VAL_6]][0] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.objectfifo.subview.access %[[VAL_6]][1] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: %[[VAL_6:.*]] = aie.objectfifo.acquire @objfifo(Produce, 2) : !aie.objectfifosubview> +// CHECK: %[[VAL_7:.*]] = aie.objectfifo.subview.access %[[VAL_6]][0] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.objectfifo.subview.access %[[VAL_6]][1] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () // CHECK: %[[VAL_9:.*]] = arith.constant 0 : index // CHECK: %[[VAL_10:.*]] = arith.constant 2 : index // CHECK: %[[VAL_11:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_12:.*]] = %[[VAL_9]] to %[[VAL_10]] step %[[VAL_11]] { -// CHECK: %[[VAL_13:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 3) : !AIE.objectfifosubview> -// CHECK: %[[VAL_14:.*]] = AIE.objectfifo.subview.access %[[VAL_13]][0] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_15:.*]] = AIE.objectfifo.subview.access %[[VAL_13]][1] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_16:.*]] = AIE.objectfifo.subview.access %[[VAL_13]][2] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_13:.*]] = aie.objectfifo.acquire @objfifo(Produce, 3) : !aie.objectfifosubview> +// CHECK: %[[VAL_14:.*]] = aie.objectfifo.subview.access %[[VAL_13]][0] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_15:.*]] = aie.objectfifo.subview.access %[[VAL_13]][1] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_16:.*]] = aie.objectfifo.subview.access %[[VAL_13]][2] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 1) +// CHECK: aie.objectfifo.release @objfifo(Produce, 1) // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 2) : !AIE.objectfifosubview> -// CHECK: %[[VAL_18:.*]] = AIE.objectfifo.subview.access %[[VAL_17]][0] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_19:.*]] = AIE.objectfifo.subview.access %[[VAL_17]][1] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_17:.*]] = aie.objectfifo.acquire @objfifo(Produce, 2) : !aie.objectfifosubview> +// CHECK: %[[VAL_18:.*]] = aie.objectfifo.subview.access %[[VAL_17]][0] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_19:.*]] = aie.objectfifo.subview.access %[[VAL_17]][1] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 2) -// CHECK: AIE.end +// CHECK: aie.objectfifo.release @objfifo(Produce, 2) +// CHECK: aie.end // CHECK: } // CHECK: } module @registerPatterns { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> %acquirePattern = arith.constant dense<[2,3,3,2]> : tensor<4xi32> %releasePattern = arith.constant dense<[0,1,1,2]> : tensor<4xi32> @@ -61,6 +61,6 @@ module @registerPatterns { return } - AIE.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<4xi32>, %releasePattern : tensor<4xi32>, @producer_work, %length) + aie.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<4xi32>, %releasePattern : tensor<4xi32>, @producer_work, %length) } } diff --git a/test/objectFifo-register-process/base_test_3.aie.mlir b/test/objectFifo-register-process/base_test_3.aie.mlir index dbda31442f..f22ee67d53 100644 --- a/test/objectFifo-register-process/base_test_3.aie.mlir +++ b/test/objectFifo-register-process/base_test_3.aie.mlir @@ -12,11 +12,11 @@ // RUN: aie-opt --aie-register-objectFifos %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 3) -// CHECK: AIE.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_2]], %[[VAL_1]]}, 2 : i32) : !AIE.objectfifo> +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 3) +// CHECK: aie.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_2]], %[[VAL_1]]}, 2 : i32) : !aie.objectfifo> // CHECK: %[[VAL_3:.*]] = arith.constant dense<1> : tensor<1xi32> // CHECK: %[[VAL_4:.*]] = arith.constant dense<1> : tensor<1xi32> // CHECK: %[[VAL_5:.*]] = arith.constant 10 : index @@ -35,52 +35,52 @@ // CHECK: func.func @consumer_work2() { // CHECK: return // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_12:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_13:.*]] = arith.constant 0 : index // CHECK: %[[VAL_14:.*]] = arith.constant 10 : index // CHECK: %[[VAL_15:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_16:.*]] = %[[VAL_13]] to %[[VAL_14]] step %[[VAL_15]] { -// CHECK: %[[VAL_17:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_18:.*]] = AIE.objectfifo.subview.access %[[VAL_17]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_17:.*]] = aie.objectfifo.acquire @objfifo(Produce, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_18:.*]] = aie.objectfifo.subview.access %[[VAL_17]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 1) +// CHECK: aie.objectfifo.release @objfifo(Produce, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.core(%[[VAL_2]]) { +// CHECK: %[[VAL_19:.*]] = aie.core(%[[VAL_2]]) { // CHECK: %[[VAL_20:.*]] = arith.constant 0 : index // CHECK: %[[VAL_21:.*]] = arith.constant 10 : index // CHECK: %[[VAL_22:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_23:.*]] = %[[VAL_20]] to %[[VAL_21]] step %[[VAL_22]] { -// CHECK: %[[VAL_24:.*]] = AIE.objectfifo.acquire @objfifo(Consume, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_25:.*]] = AIE.objectfifo.subview.access %[[VAL_24]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_24:.*]] = aie.objectfifo.acquire @objfifo(Consume, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_25:.*]] = aie.objectfifo.subview.access %[[VAL_24]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @consumer_work1() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Consume, 1) +// CHECK: aie.objectfifo.release @objfifo(Consume, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_26:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_27:.*]] = arith.constant 0 : index // CHECK: %[[VAL_28:.*]] = arith.constant 10 : index // CHECK: %[[VAL_29:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_30:.*]] = %[[VAL_27]] to %[[VAL_28]] step %[[VAL_29]] { -// CHECK: %[[VAL_31:.*]] = AIE.objectfifo.acquire @objfifo(Consume, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_32:.*]] = AIE.objectfifo.subview.access %[[VAL_31]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_31:.*]] = aie.objectfifo.acquire @objfifo(Consume, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_32:.*]] = aie.objectfifo.subview.access %[[VAL_31]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @consumer_work2() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Consume, 1) +// CHECK: aie.objectfifo.release @objfifo(Consume, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @registerPatterns { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @objfifo (%tile12, {%tile33, %tile13}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile33, %tile13}, 2 : i32) : !aie.objectfifo> %prodAcqPattern = arith.constant dense<[1]> : tensor<1xi32> %prodRelPattern = arith.constant dense<[1]> : tensor<1xi32> @@ -103,8 +103,8 @@ module @registerPatterns { return } - AIE.objectfifo.register_process @objfifo (Produce, %prodAcqPattern : tensor<1xi32>, %prodRelPattern : tensor<1xi32>, @producer_work, %prodLength) - AIE.objectfifo.register_process @objfifo (Consume, %consAcqPattern1 : tensor<1xi32>, %consRelPattern1 : tensor<1xi32>, @consumer_work1, %consLength1) - AIE.objectfifo.register_process @objfifo (Consume, %consAcqPattern2 : tensor<1xi32>, %consRelPattern2 : tensor<1xi32>, @consumer_work2, %consLength2) + aie.objectfifo.register_process @objfifo (Produce, %prodAcqPattern : tensor<1xi32>, %prodRelPattern : tensor<1xi32>, @producer_work, %prodLength) + aie.objectfifo.register_process @objfifo (Consume, %consAcqPattern1 : tensor<1xi32>, %consRelPattern1 : tensor<1xi32>, @consumer_work1, %consLength1) + aie.objectfifo.register_process @objfifo (Consume, %consAcqPattern2 : tensor<1xi32>, %consRelPattern2 : tensor<1xi32>, @consumer_work2, %consLength2) } } diff --git a/test/objectFifo-register-process/base_test_4.aie.mlir b/test/objectFifo-register-process/base_test_4.aie.mlir index e5d671d641..6ab7974f88 100644 --- a/test/objectFifo-register-process/base_test_4.aie.mlir +++ b/test/objectFifo-register-process/base_test_4.aie.mlir @@ -12,49 +12,49 @@ // RUN: aie-opt --aie-register-objectFifos %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: AIE.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !AIE.objectfifo> +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: aie.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !aie.objectfifo> // CHECK: %[[VAL_2:.*]] = arith.constant dense<[2, 3, 3, 3, 0]> : tensor<5xi32> // CHECK: %[[VAL_3:.*]] = arith.constant dense<[0, 1, 1, 2, 1]> : tensor<5xi32> // CHECK: %[[VAL_4:.*]] = arith.constant 10 : index // CHECK: func.func @producer_work() { // CHECK: return // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: %[[VAL_6:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 2) : !AIE.objectfifosubview> -// CHECK: %[[VAL_7:.*]] = AIE.objectfifo.subview.access %[[VAL_6]][0] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.objectfifo.subview.access %[[VAL_6]][1] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: %[[VAL_6:.*]] = aie.objectfifo.acquire @objfifo(Produce, 2) : !aie.objectfifosubview> +// CHECK: %[[VAL_7:.*]] = aie.objectfifo.subview.access %[[VAL_6]][0] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.objectfifo.subview.access %[[VAL_6]][1] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () // CHECK: %[[VAL_9:.*]] = arith.constant 0 : index // CHECK: %[[VAL_10:.*]] = arith.constant 2 : index // CHECK: %[[VAL_11:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_12:.*]] = %[[VAL_9]] to %[[VAL_10]] step %[[VAL_11]] { -// CHECK: %[[VAL_13:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 3) : !AIE.objectfifosubview> -// CHECK: %[[VAL_14:.*]] = AIE.objectfifo.subview.access %[[VAL_13]][0] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_15:.*]] = AIE.objectfifo.subview.access %[[VAL_13]][1] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_16:.*]] = AIE.objectfifo.subview.access %[[VAL_13]][2] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_13:.*]] = aie.objectfifo.acquire @objfifo(Produce, 3) : !aie.objectfifosubview> +// CHECK: %[[VAL_14:.*]] = aie.objectfifo.subview.access %[[VAL_13]][0] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_15:.*]] = aie.objectfifo.subview.access %[[VAL_13]][1] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_16:.*]] = aie.objectfifo.subview.access %[[VAL_13]][2] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 1) +// CHECK: aie.objectfifo.release @objfifo(Produce, 1) // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 3) : !AIE.objectfifosubview> -// CHECK: %[[VAL_18:.*]] = AIE.objectfifo.subview.access %[[VAL_17]][0] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_19:.*]] = AIE.objectfifo.subview.access %[[VAL_17]][1] : !AIE.objectfifosubview> -> memref<16xi32> -// CHECK: %[[VAL_20:.*]] = AIE.objectfifo.subview.access %[[VAL_17]][2] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_17:.*]] = aie.objectfifo.acquire @objfifo(Produce, 3) : !aie.objectfifosubview> +// CHECK: %[[VAL_18:.*]] = aie.objectfifo.subview.access %[[VAL_17]][0] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_19:.*]] = aie.objectfifo.subview.access %[[VAL_17]][1] : !aie.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_20:.*]] = aie.objectfifo.subview.access %[[VAL_17]][2] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 2) -// CHECK: AIE.objectfifo.release @objfifo(Produce, 1) -// CHECK: AIE.end +// CHECK: aie.objectfifo.release @objfifo(Produce, 2) +// CHECK: aie.objectfifo.release @objfifo(Produce, 1) +// CHECK: aie.end // CHECK: } // CHECK: } module @registerPatterns { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> %acquirePattern = arith.constant dense<[2,3,3,3,0]> : tensor<5xi32> %releasePattern = arith.constant dense<[0,1,1,2,1]> : tensor<5xi32> @@ -63,6 +63,6 @@ module @registerPatterns { return } - AIE.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<5xi32>, %releasePattern : tensor<5xi32>, @producer_work, %length) + aie.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<5xi32>, %releasePattern : tensor<5xi32>, @producer_work, %length) } } diff --git a/test/objectFifo-register-process/base_test_5.aie.mlir b/test/objectFifo-register-process/base_test_5.aie.mlir index e630340010..9e98abd5d5 100644 --- a/test/objectFifo-register-process/base_test_5.aie.mlir +++ b/test/objectFifo-register-process/base_test_5.aie.mlir @@ -12,43 +12,43 @@ // RUN: aie-opt --aie-register-objectFifos %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: AIE.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !AIE.objectfifo> +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: aie.objectfifo @objfifo(%[[VAL_0]], {%[[VAL_1]]}, 4 : i32) : !aie.objectfifo> // CHECK: %[[VAL_2:.*]] = arith.constant dense<1> : tensor<1xi32> // CHECK: %[[VAL_3:.*]] = arith.constant dense<[0, 1, 1, 1, 2]> : tensor<5xi32> // CHECK: %[[VAL_4:.*]] = arith.constant 5 : index // CHECK: func.func @producer_work() { // CHECK: return // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: %[[VAL_6:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_7:.*]] = AIE.objectfifo.subview.access %[[VAL_6]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: %[[VAL_6:.*]] = aie.objectfifo.acquire @objfifo(Produce, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_7:.*]] = aie.objectfifo.subview.access %[[VAL_6]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () // CHECK: %[[VAL_8:.*]] = arith.constant 0 : index // CHECK: %[[VAL_9:.*]] = arith.constant 3 : index // CHECK: %[[VAL_10:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_11:.*]] = %[[VAL_8]] to %[[VAL_9]] step %[[VAL_10]] { -// CHECK: %[[VAL_12:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_13:.*]] = AIE.objectfifo.subview.access %[[VAL_12]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_12:.*]] = aie.objectfifo.acquire @objfifo(Produce, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_13:.*]] = aie.objectfifo.subview.access %[[VAL_12]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 1) +// CHECK: aie.objectfifo.release @objfifo(Produce, 1) // CHECK: } -// CHECK: %[[VAL_14:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_15:.*]] = AIE.objectfifo.subview.access %[[VAL_14]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_14:.*]] = aie.objectfifo.acquire @objfifo(Produce, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_15:.*]] = aie.objectfifo.subview.access %[[VAL_14]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 2) -// CHECK: AIE.end +// CHECK: aie.objectfifo.release @objfifo(Produce, 2) +// CHECK: aie.end // CHECK: } // CHECK: } module @registerPatterns { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> %acquirePattern = arith.constant dense<[1]> : tensor<1xi32> %releasePattern = arith.constant dense<[0,1,1,1,2]> : tensor<5xi32> @@ -57,6 +57,6 @@ module @registerPatterns { return } - AIE.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<1xi32>, %releasePattern : tensor<5xi32>, @producer_work, %length) + aie.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<1xi32>, %releasePattern : tensor<5xi32>, @producer_work, %length) } } diff --git a/test/objectFifo-register-process/nd_dma_test_aie2.mlir b/test/objectFifo-register-process/nd_dma_test_aie2.mlir index 590d4a3690..8401cd492e 100644 --- a/test/objectFifo-register-process/nd_dma_test_aie2.mlir +++ b/test/objectFifo-register-process/nd_dma_test_aie2.mlir @@ -12,36 +12,36 @@ // RUN: aie-opt --aie-register-objectFifos %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: AIE.objectfifo @objfifo(%[[VAL_0]] toStream [], {%[[VAL_1]] fromStream []}, 4 : i32) : !AIE.objectfifo> +// CHECK-LABEL: aie.device(xcve2302) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: aie.objectfifo @objfifo(%[[VAL_0]] toStream [], {%[[VAL_1]] fromStream []}, 4 : i32) : !aie.objectfifo> // CHECK: %[[VAL_2:.*]] = arith.constant dense<1> : tensor<1xi32> // CHECK: %[[VAL_3:.*]] = arith.constant dense<1> : tensor<1xi32> // CHECK: %[[VAL_4:.*]] = arith.constant 10 : index // CHECK: func.func @producer_work() { // CHECK: return // CHECK: } -// CHECK: %[[VAL_5:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_5:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_6:.*]] = arith.constant 0 : index // CHECK: %[[VAL_7:.*]] = arith.constant 10 : index // CHECK: %[[VAL_8:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_9:.*]] = %[[VAL_6]] to %[[VAL_7]] step %[[VAL_8]] { -// CHECK: %[[VAL_10:.*]] = AIE.objectfifo.acquire @objfifo(Produce, 1) : !AIE.objectfifosubview> -// CHECK: %[[VAL_11:.*]] = AIE.objectfifo.subview.access %[[VAL_10]][0] : !AIE.objectfifosubview> -> memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.objectfifo.acquire @objfifo(Produce, 1) : !aie.objectfifosubview> +// CHECK: %[[VAL_11:.*]] = aie.objectfifo.subview.access %[[VAL_10]][0] : !aie.objectfifosubview> -> memref<16xi32> // CHECK: func.call @producer_work() : () -> () -// CHECK: AIE.objectfifo.release @objfifo(Produce, 1) +// CHECK: aie.objectfifo.release @objfifo(Produce, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @registerPatterns { - AIE.device(xcve2302) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcve2302) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @objfifo (%tile12 toStream [], {%tile13 fromStream []}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12 toStream [], {%tile13 fromStream []}, 4 : i32) : !aie.objectfifo> %acquirePattern = arith.constant dense<[1]> : tensor<1xi32> %releasePattern = arith.constant dense<[1]> : tensor<1xi32> @@ -50,6 +50,6 @@ module @registerPatterns { return } - AIE.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<1xi32>, %releasePattern : tensor<1xi32>, @producer_work, %length) + aie.objectfifo.register_process @objfifo (Produce, %acquirePattern : tensor<1xi32>, %releasePattern : tensor<1xi32>, @producer_work, %length) } } diff --git a/test/objectFifo-stateful-transform/AIE2_cyclostatic_dma.mlir b/test/objectFifo-stateful-transform/AIE2_cyclostatic_dma.mlir index 4001097348..9585be1151 100644 --- a/test/objectFifo-stateful-transform/AIE2_cyclostatic_dma.mlir +++ b/test/objectFifo-stateful-transform/AIE2_cyclostatic_dma.mlir @@ -13,124 +13,124 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @aie2_cyclostatic_dma { -// CHECK: AIE.device(xcve2302) { -// CHECK: %[[t0:.*]] = AIE.tile(2, 2) -// CHECK: %[[t1:.*]] = AIE.tile(8, 3) -// CHECK: %[[buf1_0:.*]] = AIE.buffer(%[[t1]]) {sym_name = "fifo_cons_buff_0"} : memref -// CHECK: %[[buf1_1:.*]] = AIE.buffer(%[[t1]]) {sym_name = "fifo_cons_buff_1"} : memref -// CHECK: %[[buf1_2:.*]] = AIE.buffer(%[[t1]]) {sym_name = "fifo_cons_buff_2"} : memref -// CHECK: %[[C_PL:.*]] = AIE.lock(%[[t1]], 0) {init = 3 : i32, sym_name = "fifo_cons_prod_lock"} -// CHECK: %[[C_CL:.*]] = AIE.lock(%[[t1]], 1) {init = 0 : i32, sym_name = "fifo_cons_cons_lock"} -// CHECK: %[[buf0_0:.*]] = AIE.buffer(%[[t0]]) {sym_name = "fifo_buff_0"} : memref -// CHECK: %[[buf0_1:.*]] = AIE.buffer(%[[t0]]) {sym_name = "fifo_buff_1"} : memref -// CHECK: %[[PL:.*]] = AIE.lock(%[[t0]], 0) {init = 2 : i32, sym_name = "fifo_prod_lock"} -// CHECK: %[[CL:.*]] = AIE.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} -// CHECK: AIE.flow(%[[t0]], DMA : 0, %[[t1]], DMA : 0) -// CHECK: %[[c0:.*]] = AIE.core(%[[t0]]) { -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.device(xcve2302) { +// CHECK: %[[t0:.*]] = aie.tile(2, 2) +// CHECK: %[[t1:.*]] = aie.tile(8, 3) +// CHECK: %[[buf1_0:.*]] = aie.buffer(%[[t1]]) {sym_name = "fifo_cons_buff_0"} : memref +// CHECK: %[[buf1_1:.*]] = aie.buffer(%[[t1]]) {sym_name = "fifo_cons_buff_1"} : memref +// CHECK: %[[buf1_2:.*]] = aie.buffer(%[[t1]]) {sym_name = "fifo_cons_buff_2"} : memref +// CHECK: %[[C_PL:.*]] = aie.lock(%[[t1]], 0) {init = 3 : i32, sym_name = "fifo_cons_prod_lock"} +// CHECK: %[[C_CL:.*]] = aie.lock(%[[t1]], 1) {init = 0 : i32, sym_name = "fifo_cons_cons_lock"} +// CHECK: %[[buf0_0:.*]] = aie.buffer(%[[t0]]) {sym_name = "fifo_buff_0"} : memref +// CHECK: %[[buf0_1:.*]] = aie.buffer(%[[t0]]) {sym_name = "fifo_buff_1"} : memref +// CHECK: %[[PL:.*]] = aie.lock(%[[t0]], 0) {init = 2 : i32, sym_name = "fifo_prod_lock"} +// CHECK: %[[CL:.*]] = aie.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} +// CHECK: aie.flow(%[[t0]], DMA : 0, %[[t1]], DMA : 0) +// CHECK: %[[c0:.*]] = aie.core(%[[t0]]) { +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[c1:.*]] = AIE.core(%[[t1]]) { -// CHECK: AIE.use_lock(%[[C_CL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[C_PL]], Release, 1) -// CHECK: AIE.use_lock(%[[C_CL]], AcquireGreaterEqual, 2) -// CHECK: AIE.use_lock(%[[C_PL]], Release, 2) -// CHECK: AIE.use_lock(%[[C_CL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[C_PL]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[c1:.*]] = aie.core(%[[t1]]) { +// CHECK: aie.use_lock(%[[C_CL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[C_PL]], Release, 1) +// CHECK: aie.use_lock(%[[C_CL]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[C_PL]], Release, 2) +// CHECK: aie.use_lock(%[[C_CL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[C_PL]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[m0:.*]] = AIE.mem(%[[t0]]) { -// CHECK: %[[dma0:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[m0:.*]] = aie.mem(%[[t0]]) { +// CHECK: %[[dma0:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[buf0_0]] : memref, 0, 1) -// CHECK: AIE.use_lock(%[[PL]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[buf0_0]] : memref, 0, 1) +// CHECK: aie.use_lock(%[[PL]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[buf0_1:.*]] : memref, 0, 1) -// CHECK: AIE.use_lock(%[[PL]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[buf0_1:.*]] : memref, 0, 1) +// CHECK: aie.use_lock(%[[PL]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[m1:.*]] = AIE.mem(%[[t1]]) { -// CHECK: %[[dma1:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[m1:.*]] = aie.mem(%[[t1]]) { +// CHECK: %[[dma1:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb3 -// CHECK: AIE.use_lock(%[[C_PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[buf1_0:.*]] : memref, 0, 1) -// CHECK: AIE.use_lock(%[[C_CL]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[C_PL]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[buf1_0:.*]] : memref, 0, 1) +// CHECK: aie.use_lock(%[[C_CL]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[C_PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[buf1_1]] : memref, 0, 1) -// CHECK: AIE.use_lock(%[[C_CL]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[C_PL]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[buf1_1]] : memref, 0, 1) +// CHECK: aie.use_lock(%[[C_CL]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[C_PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[buf1_2]] : memref, 0, 1) -// CHECK: AIE.use_lock(%[[C_CL]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[C_PL]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[buf1_2]] : memref, 0, 1) +// CHECK: aie.use_lock(%[[C_CL]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb4: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } module @aie2_cyclostatic_dma { - AIE.device(xcve2302) { + aie.device(xcve2302) { - %tile22 = AIE.tile(2, 2) // producer tile - %tile83 = AIE.tile(8, 3) // consumer tile - %buf83 = AIE.buffer(%tile83) {sym_name = "buf83"} : memref<4xi32> + %tile22 = aie.tile(2, 2) // producer tile + %tile83 = aie.tile(8, 3) // consumer tile + %buf83 = aie.buffer(%tile83) {sym_name = "buf83"} : memref<4xi32> // ObjectFifo that can hold 4 memrefs, populated by tile22 and // consumed by tile23 - AIE.objectfifo @fifo (%tile22, {%tile83}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @fifo (%tile22, {%tile83}, 4 : i32) : !aie.objectfifo> // Producer core - %core22 = AIE.core(%tile22) { + %core22 = aie.core(%tile22) { %c55 = arith.constant 55 : i32 %c66 = arith.constant 66 : i32 %c77 = arith.constant 77 : i32 %c88 = arith.constant 88 : i32 // Push 55 - %subview0 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref + %subview0 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref memref.store %c55, %subview0_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // Push 66 - %subview1 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview1_obj = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref + %subview1 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview1_obj = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref memref.store %c66, %subview1_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // Push 77 - %subview2 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref + %subview2 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref memref.store %c77, %subview2_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // Push 88 - %subview3 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview3_obj = AIE.objectfifo.subview.access %subview3[0] : !AIE.objectfifosubview> -> memref + %subview3 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview3_obj = aie.objectfifo.subview.access %subview3[0] : !aie.objectfifosubview> -> memref memref.store %c88, %subview3_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) - AIE.end + aie.end } // Consumer core - %core28 = AIE.core(%tile83) { + %core28 = aie.core(%tile83) { // Consumer pattern: {1, 2, 1} %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index @@ -138,30 +138,30 @@ module @aie2_cyclostatic_dma { %i3 = arith.constant 3 : index // Pop 1 object off queue - %subview0 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref + %subview0 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref %v55 = memref.load %subview0_obj[] : memref memref.store %v55, %buf83[%i0] : memref<4xi32> - AIE.objectfifo.release @fifo (Consume, 1) + aie.objectfifo.release @fifo (Consume, 1) // Pop 2 objects off queue - %subview1 = AIE.objectfifo.acquire @fifo (Consume, 2) : !AIE.objectfifosubview> - %subview1_obj0 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref - %subview1_obj1 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref + %subview1 = aie.objectfifo.acquire @fifo (Consume, 2) : !aie.objectfifosubview> + %subview1_obj0 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref + %subview1_obj1 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref %v66 = memref.load %subview1_obj0[] : memref %v77 = memref.load %subview1_obj1[] : memref memref.store %v66, %buf83[%i1] : memref<4xi32> memref.store %v77, %buf83[%i2] : memref<4xi32> - AIE.objectfifo.release @fifo (Consume, 2) + aie.objectfifo.release @fifo (Consume, 2) // Pop 1 object off queue - %subview2 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref + %subview2 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref %v88 = memref.load %subview2_obj[] : memref memref.store %v88, %buf83[%i3] : memref<4xi32> - AIE.objectfifo.release @fifo (Consume, 1) + aie.objectfifo.release @fifo (Consume, 1) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/AIE2_cyclostatic_l1.mlir b/test/objectFifo-stateful-transform/AIE2_cyclostatic_l1.mlir index 6850c3a779..4fcf696e7a 100644 --- a/test/objectFifo-stateful-transform/AIE2_cyclostatic_l1.mlir +++ b/test/objectFifo-stateful-transform/AIE2_cyclostatic_l1.mlir @@ -14,81 +14,81 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @aie2_cyclostatic_l1 { -// CHECK: AIE.device(xcve2302) { -// CHECK: %[[t0:.*]] = AIE.tile(2, 2) -// CHECK: %[[t1:.*]] = AIE.tile(2, 3) -// CHECK: %[[PL:.*]] = AIE.lock(%[[t0]], 0) {init = 4 : i32, sym_name = "fifo_prod_lock"} -// CHECK: %[[CL:.*]] = AIE.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} -// CHECK: %[[c0:.*]] = AIE.core(%[[t0]]) { -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.device(xcve2302) { +// CHECK: %[[t0:.*]] = aie.tile(2, 2) +// CHECK: %[[t1:.*]] = aie.tile(2, 3) +// CHECK: %[[PL:.*]] = aie.lock(%[[t0]], 0) {init = 4 : i32, sym_name = "fifo_prod_lock"} +// CHECK: %[[CL:.*]] = aie.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} +// CHECK: %[[c0:.*]] = aie.core(%[[t0]]) { +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[c1:.*]] = AIE.core(%[[t1]]) { -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[PL]], Release, 1) -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 2) -// CHECK: AIE.use_lock(%[[PL]], Release, 2) -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[PL]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[c1:.*]] = aie.core(%[[t1]]) { +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[PL]], Release, 1) +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[PL]], Release, 2) +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[PL]], Release, 1) +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } module @aie2_cyclostatic_l1 { - AIE.device(xcve2302) { + aie.device(xcve2302) { - %tile22 = AIE.tile(2, 2) // producer tile - %tile23 = AIE.tile(2, 3) // consumer tile - %buf23 = AIE.buffer(%tile23) {sym_name = "buf23"} : memref<4xi32> + %tile22 = aie.tile(2, 2) // producer tile + %tile23 = aie.tile(2, 3) // consumer tile + %buf23 = aie.buffer(%tile23) {sym_name = "buf23"} : memref<4xi32> // ObjectFifo that can hold 4 memrefs, populated by tile22 and // consumed by tile23 - AIE.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !aie.objectfifo> // Producer core - %core22 = AIE.core(%tile22) { + %core22 = aie.core(%tile22) { %c55 = arith.constant 55 : i32 %c66 = arith.constant 66 : i32 %c77 = arith.constant 77 : i32 %c88 = arith.constant 88 : i32 // Push 55 - %subview0 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref + %subview0 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref memref.store %c55, %subview0_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // Push 66 - %subview1 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview1_obj = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref + %subview1 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview1_obj = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref memref.store %c66, %subview1_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // Push 77 - %subview2 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref + %subview2 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref memref.store %c77, %subview2_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // Push 88 - %subview3 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview3_obj = AIE.objectfifo.subview.access %subview3[0] : !AIE.objectfifosubview> -> memref + %subview3 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview3_obj = aie.objectfifo.subview.access %subview3[0] : !aie.objectfifosubview> -> memref memref.store %c88, %subview3_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) - AIE.end + aie.end } // Consumer core - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { // Consumer pattern: {1, 2, 1} %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index @@ -96,30 +96,30 @@ module @aie2_cyclostatic_l1 { %i3 = arith.constant 3 : index // Pop 1 object off queue - %subview0 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref + %subview0 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref %v55 = memref.load %subview0_obj[] : memref memref.store %v55, %buf23[%i0] : memref<4xi32> - AIE.objectfifo.release @fifo (Consume, 1) + aie.objectfifo.release @fifo (Consume, 1) // Pop 2 objects off queue - %subview1 = AIE.objectfifo.acquire @fifo (Consume, 2) : !AIE.objectfifosubview> - %subview1_obj0 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref - %subview1_obj1 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref + %subview1 = aie.objectfifo.acquire @fifo (Consume, 2) : !aie.objectfifosubview> + %subview1_obj0 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref + %subview1_obj1 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref %v66 = memref.load %subview1_obj0[] : memref %v77 = memref.load %subview1_obj1[] : memref memref.store %v66, %buf23[%i1] : memref<4xi32> memref.store %v77, %buf23[%i2] : memref<4xi32> - AIE.objectfifo.release @fifo (Consume, 2) + aie.objectfifo.release @fifo (Consume, 2) // Pop 1 object off queue - %subview2 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref + %subview2 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref %v88 = memref.load %subview2_obj[] : memref memref.store %v88, %buf23[%i3] : memref<4xi32> - AIE.objectfifo.release @fifo (Consume, 1) + aie.objectfifo.release @fifo (Consume, 1) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/AIE2_cyclostatic_l2.mlir b/test/objectFifo-stateful-transform/AIE2_cyclostatic_l2.mlir index 8ad435e002..6c0198272a 100644 --- a/test/objectFifo-stateful-transform/AIE2_cyclostatic_l2.mlir +++ b/test/objectFifo-stateful-transform/AIE2_cyclostatic_l2.mlir @@ -38,71 +38,71 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @aie2_cyclostatic_l2 { -// CHECK: AIE.device(xcve2302) { -// CHECK: %[[t0:.*]] = AIE.tile(2, 2) -// CHECK: %[[t1:.*]] = AIE.tile(2, 1) -// CHECK: %[[t2:.*]] = AIE.tile(8, 3) - -// CHECK: %[[fifo1_cons_buff_0:.*]] = AIE.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_0"} : memref<1xi32> -// CHECK: %[[fifo1_cons_buff_1:.*]] = AIE.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_1"} : memref<1xi32> -// CHECK: %[[fifo1_cons_buff_2:.*]] = AIE.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_2"} : memref<1xi32> -// CHECK: %[[fifo1_cons_buff_3:.*]] = AIE.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_3"} : memref<1xi32> -// CHECK: %[[fifo1_cons_prod_lock:.*]] = AIE.lock(%[[t2]], 0) {init = 4 : i32, sym_name = "fifo1_cons_prod_lock"} -// CHECK: %[[fifo1_cons_cons_lock:.*]] = AIE.lock(%[[t2]], 1) {init = 0 : i32, sym_name = "fifo1_cons_cons_lock"} +// CHECK: aie.device(xcve2302) { +// CHECK: %[[t0:.*]] = aie.tile(2, 2) +// CHECK: %[[t1:.*]] = aie.tile(2, 1) +// CHECK: %[[t2:.*]] = aie.tile(8, 3) + +// CHECK: %[[fifo1_cons_buff_0:.*]] = aie.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_0"} : memref<1xi32> +// CHECK: %[[fifo1_cons_buff_1:.*]] = aie.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_1"} : memref<1xi32> +// CHECK: %[[fifo1_cons_buff_2:.*]] = aie.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_2"} : memref<1xi32> +// CHECK: %[[fifo1_cons_buff_3:.*]] = aie.buffer(%[[t2]]) {sym_name = "fifo1_cons_buff_3"} : memref<1xi32> +// CHECK: %[[fifo1_cons_prod_lock:.*]] = aie.lock(%[[t2]], 0) {init = 4 : i32, sym_name = "fifo1_cons_prod_lock"} +// CHECK: %[[fifo1_cons_cons_lock:.*]] = aie.lock(%[[t2]], 1) {init = 0 : i32, sym_name = "fifo1_cons_cons_lock"} // The consume buffers are used at the receiving end of a stream to notify the // sender to send more objects once they have been consumed. In this case, // the (intermediary) consumer is the memtile. -// CHECK: %[[fifo0_cons_buff_0:.*]] = AIE.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_0"} : memref<1xi32> -// CHECK: %[[fifo0_cons_buff_1:.*]] = AIE.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_1"} : memref<1xi32> -// CHECK: %[[fifo0_cons_buff_2:.*]] = AIE.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_2"} : memref<1xi32> -// CHECK: %[[fifo0_cons_buff_3:.*]] = AIE.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_3"} : memref<1xi32> +// CHECK: %[[fifo0_cons_buff_0:.*]] = aie.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_0"} : memref<1xi32> +// CHECK: %[[fifo0_cons_buff_1:.*]] = aie.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_1"} : memref<1xi32> +// CHECK: %[[fifo0_cons_buff_2:.*]] = aie.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_2"} : memref<1xi32> +// CHECK: %[[fifo0_cons_buff_3:.*]] = aie.buffer(%[[t1]]) {sym_name = "fifo0_cons_buff_3"} : memref<1xi32> -// CHECK: %[[fifo0_cons_prod_lock:.*]] = AIE.lock(%[[t1]], 0) {init = 4 : i32, sym_name = "fifo0_cons_prod_lock"} -// CHECK: %[[fifo0_cons_cons_lock:.*]] = AIE.lock(%[[t1]], 1) {init = 0 : i32, sym_name = "fifo0_cons_cons_lock"} +// CHECK: %[[fifo0_cons_prod_lock:.*]] = aie.lock(%[[t1]], 0) {init = 4 : i32, sym_name = "fifo0_cons_prod_lock"} +// CHECK: %[[fifo0_cons_cons_lock:.*]] = aie.lock(%[[t1]], 1) {init = 0 : i32, sym_name = "fifo0_cons_cons_lock"} // The objectFifo lowering creates two buffers (for ping-pong) on the producer // side to which elements are written. -// CHECK: %[[fifo0_buff_0:.*]] = AIE.buffer(%[[t0]]) {sym_name = "fifo0_buff_0"} : memref<1xi32> -// CHECK: %[[fifo0_buff_1:.*]] = AIE.buffer(%[[t0]]) {sym_name = "fifo0_buff_1"} : memref<1xi32> +// CHECK: %[[fifo0_buff_0:.*]] = aie.buffer(%[[t0]]) {sym_name = "fifo0_buff_0"} : memref<1xi32> +// CHECK: %[[fifo0_buff_1:.*]] = aie.buffer(%[[t0]]) {sym_name = "fifo0_buff_1"} : memref<1xi32> // Whenever the prod lock can be acquired, the core can proceed to put another // object into the fifo, i.e. there is space in the queue. -// CHECK: %[[fifo0_prod_lock:.*]] = AIE.lock(%[[t0]], 0) {init = 2 : i32, sym_name = "fifo0_prod_lock"} +// CHECK: %[[fifo0_prod_lock:.*]] = aie.lock(%[[t0]], 0) {init = 2 : i32, sym_name = "fifo0_prod_lock"} // Whenever the cons lock can be acquired, there is an object available in the // queue to be consumed. -// CHECK: %[[fifo0_cons_lock:.*]] = AIE.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo0_cons_lock"} +// CHECK: %[[fifo0_cons_lock:.*]] = aie.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo0_cons_lock"} -// CHECK: %[[buf83:.*]] = AIE.buffer(%[[t2]]) {sym_name = "buf83"} : memref<1xi32> +// CHECK: %[[buf83:.*]] = aie.buffer(%[[t2]]) {sym_name = "buf83"} : memref<1xi32> // We expect a flow out of t0's core into the memtile: -// CHECK: AIE.flow(%[[t0]], DMA : 0, %[[t1]], DMA : 0) +// CHECK: aie.flow(%[[t0]], DMA : 0, %[[t1]], DMA : 0) // Flow out of the memtile into t2's DMA. This is mostly analogous to the // flow from t0 to the memtile. -// CHECK: AIE.flow(%[[t1]], DMA : 0, %[[t2]], DMA : 0) +// CHECK: aie.flow(%[[t1]], DMA : 0, %[[t2]], DMA : 0) // ////////////////////////////////////////////////////////////////////////// // // Producer core: // ////////////////////////////////////////////////////////////////////////// // -// CHECK: %[[c0:.*]] = AIE.core(%[[t0]]) { +// CHECK: %[[c0:.*]] = aie.core(%[[t0]]) { // CHECK: %c0 = arith.constant 0 : index -// CHECK: AIE.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) // CHECK: memref.store %c55_i32, %[[fifo0_buff_0]][%c0] : memref<1xi32> -// CHECK: AIE.use_lock(%[[fifo0_cons_lock]], Release, 1) -// CHECK: AIE.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) // CHECK: memref.store %c66_i32, %[[fifo0_buff_1]][%c0] : memref<1xi32> -// CHECK: AIE.use_lock(%[[fifo0_cons_lock]], Release, 1) -// CHECK: AIE.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) // CHECK: memref.store %c77_i32, %[[fifo0_buff_0]][%c0] : memref<1xi32> -// CHECK: AIE.use_lock(%[[fifo0_cons_lock]], Release, 1) -// CHECK: AIE.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo0_prod_lock]], AcquireGreaterEqual, 1) // CHECK: memref.store %c88_i32, %[[fifo0_buff_1]][%c0] : memref<1xi32> -// CHECK: AIE.use_lock(%[[fifo0_cons_lock]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[fifo0_cons_lock]], Release, 1) +// CHECK: aie.end // CHECK: } @@ -110,7 +110,7 @@ // Consumer core: // ////////////////////////////////////////////////////////////////////////// // -// CHECK: %[[c2:.*]] = AIE.core(%[[t2]]) { +// CHECK: %[[c2:.*]] = aie.core(%[[t2]]) { // CHECK: %c0 = arith.constant 0 : index // CHECK: %c1 = arith.constant 1 : index // CHECK: %c2 = arith.constant 2 : index @@ -120,25 +120,25 @@ // DMA received an object from the stream and wrote it to the buffer. First, // we only want to consume one object, so it suffices to acquire this lock // with a value of 1: -// CHECK: AIE.use_lock(%[[fifo1_cons_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo1_cons_cons_lock]], AcquireGreaterEqual, 1) // CHECK: %[[load0:.*]] = memref.load %[[fifo1_cons_buff_0]][%c0] : memref<1xi32> -// CHECK: AIE.use_lock(%[[fifo1_cons_prod_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo1_cons_prod_lock]], Release, 1) // We released the lock above, meaning we are done with the one object we // received. Now we want 2 _new_ objects, so the cons_cons lock is acquired // twice, meaning it has to be released twice before both acquires succeed; // this, again, meaning that the DMA has received two objects on the stream // and put them in the respective buffers. -// CHECK: AIE.use_lock(%[[fifo1_cons_cons_lock]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[fifo1_cons_cons_lock]], AcquireGreaterEqual, 2) // CHECK: %[[load1:.*]] = memref.load %[[fifo1_cons_buff_1]][%c0] : memref<1xi32> // CHECK: %[[load2:.*]] = memref.load %[[fifo1_cons_buff_2]][%c0] : memref<1xi32> -// CHECK: AIE.use_lock(%[[fifo1_cons_prod_lock]], Release, 2) +// CHECK: aie.use_lock(%[[fifo1_cons_prod_lock]], Release, 2) // Lastly, receive just one object: -// CHECK: AIE.use_lock(%[[fifo1_cons_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo1_cons_cons_lock]], AcquireGreaterEqual, 1) // CHECK: %[[load3:.*]] = memref.load %[[fifo1_cons_buff_3]][%c0] : memref<1xi32> -// CHECK: AIE.use_lock(%[[fifo1_cons_prod_lock]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[fifo1_cons_prod_lock]], Release, 1) +// CHECK: aie.end // CHECK: } @@ -146,27 +146,27 @@ // Producer tile's DMA: // ////////////////////////////////////////////////////////////////////////// // -// CHECK: %[[mem0:.*]] = AIE.mem(%[[t0]]) { -// CHECK: %[[dma0:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[mem0:.*]] = aie.mem(%[[t0]]) { +// CHECK: %[[dma0:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // Memory to stream: As soon as we get an object in fifo0_buff_0, put it onto // the stream, then move on to bb2. // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[fifo0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_buff_0]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[fifo0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_buff_0]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // Now, if we get 4 bytes in fifo0_buff_1, put that on the stream, then // go back to bb1. Ping-pong. // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[fifo0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_buff_1]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[fifo0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_buff_1]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } @@ -174,58 +174,58 @@ // Mem tile: // ////////////////////////////////////////////////////////////////////////// // -// CHECK: %[[memtile:.*]] = AIE.memtile_dma(%[[t1]]) { -// CHECK: %[[VAL_25:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[memtile:.*]] = aie.memtile_dma(%[[t1]]) { +// CHECK: %[[VAL_25:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // Fill our four buffers, fifo0_cons_buff_0 through fif0_cons_buff_3, // allocated inside the memory tile, one by one (round robin) as we receive // things through the stream: // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_0]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_0]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_1]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_1]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_2]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_2]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_3]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_3]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // Now map everything we read in back out onto the stream towards tile 2: // CHECK: ^bb5: // pred: ^bb0 -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(MM2S, 0, ^bb6, ^bb10) +// CHECK: %[[VAL_26:.*]] = aie.dma_start(MM2S, 0, ^bb6, ^bb10) // CHECK: ^bb6: // 2 preds: ^bb5, ^bb9 -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_0]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_0]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb7: // pred: ^bb6 -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_1]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb8 +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_1]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb8 // CHECK: ^bb8: // pred: ^bb7 -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_2]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb9 +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_2]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb9 // CHECK: ^bb9: // pred: ^bb8 -// CHECK: AIE.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo0_cons_buff_3]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[fifo0_cons_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo0_cons_buff_3]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo0_cons_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb10: // pred: ^bb5 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } @@ -238,30 +238,30 @@ // at a time. This uses the separate _cons locks, which increase/decrease // by one. -// CHECK: %[[mem2:.*]] = AIE.mem(%[[t2]]) { -// CHECK: %[[dma2:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[mem2:.*]] = aie.mem(%[[t2]]) { +// CHECK: %[[dma2:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo1_cons_buff_0]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo1_cons_buff_0]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo1_cons_buff_1]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo1_cons_buff_1]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo1_cons_buff_2]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo1_cons_buff_2]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo1_cons_buff_3]] : memref<1xi32>, 0, 1) -// CHECK: AIE.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[fifo1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo1_cons_buff_3]] : memref<1xi32>, 0, 1) +// CHECK: aie.use_lock(%[[fifo1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } @@ -272,21 +272,21 @@ // ////////////////////////////////////////////////////////////////////////// // module @aie2_cyclostatic_l2 { - AIE.device(xcve2302) { + aie.device(xcve2302) { - %tile22 = AIE.tile(2, 2) // producer tile - %memtile = AIE.tile(2, 1) // mem tile - %tile83 = AIE.tile(8, 3) // consumer tile - %buf83 = AIE.buffer(%tile83) {sym_name = "buf83"} : memref<1xi32> + %tile22 = aie.tile(2, 2) // producer tile + %memtile = aie.tile(2, 1) // mem tile + %tile83 = aie.tile(8, 3) // consumer tile + %buf83 = aie.buffer(%tile83) {sym_name = "buf83"} : memref<1xi32> // ObjectFifo that can hold 4 memref<1xi32>s, populated by tile22 and // consumed by tile23 - AIE.objectfifo @fifo0 (%tile22, {%memtile}, 4 : i32) : !AIE.objectfifo> - AIE.objectfifo @fifo1 (%memtile, {%tile83}, [4, 4]) : !AIE.objectfifo> - AIE.objectfifo.link [@fifo0] -> [@fifo1] () + aie.objectfifo @fifo0 (%tile22, {%memtile}, 4 : i32) : !aie.objectfifo> + aie.objectfifo @fifo1 (%memtile, {%tile83}, [4, 4]) : !aie.objectfifo> + aie.objectfifo.link [@fifo0] -> [@fifo1] () // Producer core - %core22 = AIE.core(%tile22) { + %core22 = aie.core(%tile22) { %i0 = arith.constant 0 : index %c55 = arith.constant 55 : i32 %c66 = arith.constant 66 : i32 @@ -294,34 +294,34 @@ module @aie2_cyclostatic_l2 { %c88 = arith.constant 88 : i32 // Push 55 - %subview0 = AIE.objectfifo.acquire @fifo0 (Produce, 1) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<1xi32> + %subview0 = aie.objectfifo.acquire @fifo0 (Produce, 1) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<1xi32> memref.store %c55, %subview0_obj[%i0] : memref<1xi32> - AIE.objectfifo.release @fifo0 (Produce, 1) + aie.objectfifo.release @fifo0 (Produce, 1) // Push 66 - %subview1 = AIE.objectfifo.acquire @fifo0 (Produce, 1) : !AIE.objectfifosubview> - %subview1_obj = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<1xi32> + %subview1 = aie.objectfifo.acquire @fifo0 (Produce, 1) : !aie.objectfifosubview> + %subview1_obj = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<1xi32> memref.store %c66, %subview1_obj[%i0] : memref<1xi32> - AIE.objectfifo.release @fifo0 (Produce, 1) + aie.objectfifo.release @fifo0 (Produce, 1) // Push 77 - %subview2 = AIE.objectfifo.acquire @fifo0 (Produce, 1) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref<1xi32> + %subview2 = aie.objectfifo.acquire @fifo0 (Produce, 1) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref<1xi32> memref.store %c77, %subview2_obj[%i0] : memref<1xi32> - AIE.objectfifo.release @fifo0 (Produce, 1) + aie.objectfifo.release @fifo0 (Produce, 1) // Push 88 - %subview3 = AIE.objectfifo.acquire @fifo0 (Produce, 1) : !AIE.objectfifosubview> - %subview3_obj = AIE.objectfifo.subview.access %subview3[0] : !AIE.objectfifosubview> -> memref<1xi32> + %subview3 = aie.objectfifo.acquire @fifo0 (Produce, 1) : !aie.objectfifosubview> + %subview3_obj = aie.objectfifo.subview.access %subview3[0] : !aie.objectfifosubview> -> memref<1xi32> memref.store %c88, %subview3_obj[%i0] : memref<1xi32> - AIE.objectfifo.release @fifo0 (Produce, 1) + aie.objectfifo.release @fifo0 (Produce, 1) - AIE.end + aie.end } // Consumer core - %core28 = AIE.core(%tile83) { + %core28 = aie.core(%tile83) { // Consumer pattern: {1, 2, 1} %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index @@ -329,30 +329,30 @@ module @aie2_cyclostatic_l2 { %i3 = arith.constant 3 : index // Pop 1 object off queue - %subview0 = AIE.objectfifo.acquire @fifo1 (Consume, 1) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<1xi32> + %subview0 = aie.objectfifo.acquire @fifo1 (Consume, 1) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<1xi32> %v55 = memref.load %subview0_obj[%i0] : memref<1xi32> memref.store %v55, %buf83[%i0] : memref<1xi32> - AIE.objectfifo.release @fifo1 (Consume, 1) + aie.objectfifo.release @fifo1 (Consume, 1) // Pop 2 objects off queue - %subview1 = AIE.objectfifo.acquire @fifo1 (Consume, 2) : !AIE.objectfifosubview> - %subview1_obj0 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<1xi32> - %subview1_obj1 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref<1xi32> + %subview1 = aie.objectfifo.acquire @fifo1 (Consume, 2) : !aie.objectfifosubview> + %subview1_obj0 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<1xi32> + %subview1_obj1 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref<1xi32> %v66 = memref.load %subview1_obj0[%i0] : memref<1xi32> %v77 = memref.load %subview1_obj1[%i0] : memref<1xi32> memref.store %v66, %buf83[%i1] : memref<1xi32> memref.store %v77, %buf83[%i2] : memref<1xi32> - AIE.objectfifo.release @fifo1 (Consume, 2) + aie.objectfifo.release @fifo1 (Consume, 2) // Pop 1 object off queue - %subview2 = AIE.objectfifo.acquire @fifo1 (Consume, 1) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref<1xi32> + %subview2 = aie.objectfifo.acquire @fifo1 (Consume, 1) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref<1xi32> %v88 = memref.load %subview2_obj[%i0] : memref<1xi32> memref.store %v88, %buf83[%i3] : memref<1xi32> - AIE.objectfifo.release @fifo1 (Consume, 1) + aie.objectfifo.release @fifo1 (Consume, 1) - AIE.end + aie.end } } diff --git a/test/objectFifo-stateful-transform/AIE2_delayed_release.mlir b/test/objectFifo-stateful-transform/AIE2_delayed_release.mlir index b1d671d949..f828d32900 100644 --- a/test/objectFifo-stateful-transform/AIE2_delayed_release.mlir +++ b/test/objectFifo-stateful-transform/AIE2_delayed_release.mlir @@ -31,53 +31,53 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @AIE2_delayed_release { -// CHECK: AIE.device(xcve2302) { -// CHECK: %[[tile0:.*]] = AIE.tile(2, 2) -// CHECK: %[[tile1:.*]] = AIE.tile(2, 3) -// CHECK: %[[fifo_buff_0:.*]] = AIE.buffer(%[[tile0]]) {sym_name = "fifo_buff_0"} : memref -// CHECK: %[[fifo_buff_1:.*]] = AIE.buffer(%[[tile0]]) {sym_name = "fifo_buff_1"} : memref -// CHECK: %[[fifo_buff_2:.*]] = AIE.buffer(%[[tile0]]) {sym_name = "fifo_buff_2"} : memref -// CHECK: %[[fifo_buff_3:.*]] = AIE.buffer(%[[tile0]]) {sym_name = "fifo_buff_3"} : memref -// CHECK: %[[fifo_prod_lock:.*]] = AIE.lock(%[[tile0]], 0) {init = 4 : i32, sym_name = "fifo_prod_lock"} -// CHECK: %[[fifo_cons_lock:.*]] = AIE.lock(%[[tile0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} -// CHECK: %[[buf23:.*]] = AIE.buffer(%[[tile1]]) {sym_name = "buf23"} : memref<4xi32> -// CHECK: %[[core0:.*]] = AIE.core(%[[tile0]]) { +// CHECK: aie.device(xcve2302) { +// CHECK: %[[tile0:.*]] = aie.tile(2, 2) +// CHECK: %[[tile1:.*]] = aie.tile(2, 3) +// CHECK: %[[fifo_buff_0:.*]] = aie.buffer(%[[tile0]]) {sym_name = "fifo_buff_0"} : memref +// CHECK: %[[fifo_buff_1:.*]] = aie.buffer(%[[tile0]]) {sym_name = "fifo_buff_1"} : memref +// CHECK: %[[fifo_buff_2:.*]] = aie.buffer(%[[tile0]]) {sym_name = "fifo_buff_2"} : memref +// CHECK: %[[fifo_buff_3:.*]] = aie.buffer(%[[tile0]]) {sym_name = "fifo_buff_3"} : memref +// CHECK: %[[fifo_prod_lock:.*]] = aie.lock(%[[tile0]], 0) {init = 4 : i32, sym_name = "fifo_prod_lock"} +// CHECK: %[[fifo_cons_lock:.*]] = aie.lock(%[[tile0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} +// CHECK: %[[buf23:.*]] = aie.buffer(%[[tile1]]) {sym_name = "buf23"} : memref<4xi32> +// CHECK: %[[core0:.*]] = aie.core(%[[tile0]]) { // CHECK: %c99_i32 = arith.constant 99 : i32 // CHECK: %c0 = arith.constant 0 : index // CHECK: %c1 = arith.constant 1 : index // CHECK: %c4 = arith.constant 4 : index // # Objects Held: 0 # Objects Requested: 1 # Acquire Needed: 1 -// CHECK: AIE.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) // # Objects Held: 1 // CHECK: memref.store %c99_i32, %[[fifo_buff_0]][] : memref -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo_cons_lock]], Release, 1) // # Objects Held: 0 (After release) // # Objects Held: 0 # Objects Requested: 1 # Acquire Needed: 1 -// CHECK: AIE.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) // # Objects Held: 1 // CHECK: memref.store %c99_i32, %[[fifo_buff_1]][] : memref -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo_cons_lock]], Release, 1) // # Objects Held: 0 (After release) // # Objects Held: 0 # Objects Requested: 1 # Acquire Needed: 1 -// CHECK: AIE.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) // # Objects Held: 1 // CHECK: memref.store %c99_i32, %[[fifo_buff_2]][] : memref -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo_cons_lock]], Release, 1) // # Objects Held: 0 (After release) // # Objects Held: 0 # Objects Requested: 1 # Acquire Needed: 1 -// CHECK: AIE.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) // # Objects Held: 1 // CHECK: memref.store %c99_i32, %[[fifo_buff_3]][] : memref -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo_cons_lock]], Release, 1) // # Objects Held: 0 (After release) -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[core1:.*]] = AIE.core(%[[tile1]]) { +// CHECK: %[[core1:.*]] = aie.core(%[[tile1]]) { // CHECK: %c0 = arith.constant 0 : index // CHECK: %c1 = arith.constant 1 : index // CHECK: %c2 = arith.constant 2 : index @@ -85,7 +85,7 @@ // -- Requested: 2 -- // # Objects Held: 0 # Objects Requested: 2 # Acquire Needed: 2 -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[fifo_cons_lock]], AcquireGreaterEqual, 2) // # Objects Held: 2 // CHECK: %[[VAL_11:.*]] = memref.load %[[fifo_buff_0]][] : memref @@ -100,7 +100,7 @@ // -- Requested: 3 -- // Since we already hold 2 and are requesting 3, we expect one acquire here. // # Objects Held: 2 # Objects Requested: 3 # Acquire Needed: 1 -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[fifo_cons_lock]], AcquireGreaterEqual, 1) // # Objects Held: 3 // CHECK: %[[VAL_13:.*]] = memref.load %[[fifo_buff_0]][] : memref // CHECK: memref.store %[[VAL_13]], %[[buf23]][%c2] : memref<4xi32> @@ -111,72 +111,72 @@ // CHECK: memref.store %[[VAL_14]], %[[buf23]][%c3] : memref<4xi32> // These releases should all succeed. -// CHECK: AIE.use_lock(%[[fifo_prod_lock]], Release, 3) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[fifo_prod_lock]], Release, 3) +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } module @AIE2_delayed_release { - AIE.device(xcve2302) { - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) - %buf23 = AIE.buffer(%tile23) {sym_name = "buf23"} : memref<4xi32> + aie.device(xcve2302) { + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) + %buf23 = aie.buffer(%tile23) {sym_name = "buf23"} : memref<4xi32> - AIE.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !aie.objectfifo> // Producer -- produces one element at a time - %core22 = AIE.core(%tile22) { + %core22 = aie.core(%tile22) { %c99 = arith.constant 99 : i32 %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index %i4 = arith.constant 4 : index scf.for %it = %i0 to %i4 step %i1 { // Produce one 1 element (acquire producer lock) ... - %subview = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview_obj = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref + %subview = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview_obj = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref memref.store %c99, %subview_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // ... done producing (release consumer lock) } - AIE.end + aie.end } // Consumer -- consumes {2, 1, 3, 1}; releases {0, 0, 0, 2} - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index %i2 = arith.constant 2 : index %i3 = arith.constant 3 : index // Begin consuming 2 elements (acquire consumer lock with value 2) - %subview0 = AIE.objectfifo.acquire @fifo (Consume, 2) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref + %subview0 = aie.objectfifo.acquire @fifo (Consume, 2) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref %v0 = memref.load %subview0_obj[] : memref memref.store %v0, %buf23[%i0] : memref<4xi32> // For the next step, we only need one element (this could be a subroutine that acquires 1, not knowing that we already acquired 2) - %subview1 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview1_obj = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref + %subview1 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview1_obj = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref %v1 = memref.load %subview1_obj[] : memref memref.store %v1, %buf23[%i1] : memref<4xi32> // Actually, give us the two from before and one more for three objects total (consumer lock should increase by one) - %subview2 = AIE.objectfifo.acquire @fifo (Consume, 3) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref + %subview2 = aie.objectfifo.acquire @fifo (Consume, 3) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref %v2 = memref.load %subview2_obj[] : memref memref.store %v2, %buf23[%i2] : memref<4xi32> // Now let's just work on one element (consumer lock should not change value) - %subview3 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview3_obj = AIE.objectfifo.subview.access %subview3[0] : !AIE.objectfifosubview> -> memref + %subview3 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview3_obj = aie.objectfifo.subview.access %subview3[0] : !aie.objectfifosubview> -> memref %v3 = memref.load %subview3_obj[] : memref memref.store %v3, %buf23[%i3] : memref<4xi32> // Done, let's release everything we hold (we hold 3 objects from our max acquire) - AIE.objectfifo.release @fifo (Consume, 3) + aie.objectfifo.release @fifo (Consume, 3) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/AIE2_delayed_release_inside_funcs.mlir b/test/objectFifo-stateful-transform/AIE2_delayed_release_inside_funcs.mlir index 8b848e0aa7..1aa565eda9 100644 --- a/test/objectFifo-stateful-transform/AIE2_delayed_release_inside_funcs.mlir +++ b/test/objectFifo-stateful-transform/AIE2_delayed_release_inside_funcs.mlir @@ -20,28 +20,28 @@ // RUN: aie-opt --verify-diagnostics --aie-objectFifo-stateful-transform %s module @AIE2_delayed_release { - AIE.device(xcve2302) { - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) - %buf23 = AIE.buffer(%tile23) {sym_name = "buf23"} : memref<4xi32> + aie.device(xcve2302) { + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) + %buf23 = aie.buffer(%tile23) {sym_name = "buf23"} : memref<4xi32> - AIE.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !aie.objectfifo> // Producer -- produces one element at a time - %core22 = AIE.core(%tile22) { + %core22 = aie.core(%tile22) { %c99 = arith.constant 99 : i32 %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index %i4 = arith.constant 4 : index scf.for %it = %i0 to %i4 step %i1 { // Produce one 1 element (acquire producer lock) ... - %subview = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %subview_obj = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref + %subview = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %subview_obj = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref memref.store %c99, %subview_obj[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // ... done producing (release consumer lock) } - AIE.end + aie.end } // The following three functions encapsulate the consumers functionality @@ -50,8 +50,8 @@ module @AIE2_delayed_release { %i0 = arith.constant 0 : index // Begin consuming 2 elements (acquire consumer lock with value 2) // expected-error@+1 {{op must be called from inside a CoreOp}} - %subview0 = AIE.objectfifo.acquire @fifo (Consume, 2) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref + %subview0 = aie.objectfifo.acquire @fifo (Consume, 2) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref %v0 = memref.load %subview0_obj[] : memref memref.store %v0, %buf[%i0] : memref<4xi32> return @@ -60,8 +60,8 @@ module @AIE2_delayed_release { func.func @step2(%buf : memref<4xi32>) -> () { %i1 = arith.constant 1 : index // For the next step, we only need one element (this could be a subroutine that acquires 1, not knowing that we already acquired 2) - %subview1 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview1_obj = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref + %subview1 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview1_obj = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref %v1 = memref.load %subview1_obj[] : memref memref.store %v1, %buf[%i1] : memref<4xi32> return @@ -70,8 +70,8 @@ module @AIE2_delayed_release { func.func @step3(%buf : memref<4xi32>) -> () { %i2 = arith.constant 2 : index // Actually, give us the two from before and one more for three objects total (consumer lock should increase by one) - %subview2 = AIE.objectfifo.acquire @fifo (Consume, 3) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref + %subview2 = aie.objectfifo.acquire @fifo (Consume, 3) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref %v2 = memref.load %subview2_obj[] : memref memref.store %v2, %buf[%i2] : memref<4xi32> return @@ -80,24 +80,24 @@ module @AIE2_delayed_release { func.func @step4(%buf : memref<4xi32>) -> () { %i3 = arith.constant 3 : index // Now let's just work on one element (consumer lock should not change value) - %subview3 = AIE.objectfifo.acquire @fifo (Consume, 1) : !AIE.objectfifosubview> - %subview3_obj = AIE.objectfifo.subview.access %subview3[0] : !AIE.objectfifosubview> -> memref + %subview3 = aie.objectfifo.acquire @fifo (Consume, 1) : !aie.objectfifosubview> + %subview3_obj = aie.objectfifo.subview.access %subview3[0] : !aie.objectfifosubview> -> memref %v3 = memref.load %subview3_obj[] : memref memref.store %v3, %buf[%i3] : memref<4xi32> return } // Consumer -- consumes {2, 1, 3, 1}; releases {0, 0, 0, 2} - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { func.call @step1(%buf23) : (memref<4xi32>) -> () func.call @step2(%buf23) : (memref<4xi32>) -> () func.call @step3(%buf23) : (memref<4xi32>) -> () func.call @step4(%buf23) : (memref<4xi32>) -> () // Done, let's release everything we hold (we hold 3 objects from our max acquire) - AIE.objectfifo.release @fifo (Consume, 3) + aie.objectfifo.release @fifo (Consume, 3) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/AIE2_dynamic_locks.mlir b/test/objectFifo-stateful-transform/AIE2_dynamic_locks.mlir index 75bf7063c8..8d08bad92f 100644 --- a/test/objectFifo-stateful-transform/AIE2_dynamic_locks.mlir +++ b/test/objectFifo-stateful-transform/AIE2_dynamic_locks.mlir @@ -31,20 +31,20 @@ // test currently fails because this is only a concept and not yet implemented: // CHECK: module @aie2_dynamic_locks { -// CHECK: AIE.device(xcve2302) { -// CHECK: %[[tile23:.*]] = AIE.tile(2, 2) -// CHECK: %[[tile43:.*]] = AIE.tile(4, 3) +// CHECK: aie.device(xcve2302) { +// CHECK: %[[tile23:.*]] = aie.tile(2, 2) +// CHECK: %[[tile43:.*]] = aie.tile(4, 3) // The setup for flows, locks, and buffers can be the same in the dynamic case: -// CHECK: %[[fifo_buff_0:.*]] = AIE.buffer(%[[tile23]]) {sym_name = "fifo_buff_0"} : memref -// CHECK: %[[fifo_prod_lock:.*]] = AIE.lock(%[[tile23]], 0) {init = 1 : i32, sym_name = "fifo_prod_lock"} -// CHECK: %[[fifo_cons_lock:.*]] = AIE.lock(%[[tile23]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} -// CHECK: %[[fifo_cons_buff_0:.*]] = AIE.buffer(%[[tile43]]) {sym_name = "fifo_cons_buff_0"} : memref -// CHECK: %[[fifo_cons_prod_lock:.*]] = AIE.lock(%[[tile43]], 0) {init = 1 : i32, sym_name = "fifo_cons_prod_lock"} -// CHECK: %[[fifo_cons_cons_lock:.*]] = AIE.lock(%[[tile43]], 1) {init = 0 : i32, sym_name = "fifo_cons_cons_lock"} -// CHECK: AIE.flow(%[[tile23]], DMA : 0, %[[tile43]], DMA : 0) - -// CHECK: %[[ssa8:.*]] = AIE.core(%[[tile23]]) { +// CHECK: %[[fifo_buff_0:.*]] = aie.buffer(%[[tile23]]) {sym_name = "fifo_buff_0"} : memref +// CHECK: %[[fifo_prod_lock:.*]] = aie.lock(%[[tile23]], 0) {init = 1 : i32, sym_name = "fifo_prod_lock"} +// CHECK: %[[fifo_cons_lock:.*]] = aie.lock(%[[tile23]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} +// CHECK: %[[fifo_cons_buff_0:.*]] = aie.buffer(%[[tile43]]) {sym_name = "fifo_cons_buff_0"} : memref +// CHECK: %[[fifo_cons_prod_lock:.*]] = aie.lock(%[[tile43]], 0) {init = 1 : i32, sym_name = "fifo_cons_prod_lock"} +// CHECK: %[[fifo_cons_cons_lock:.*]] = aie.lock(%[[tile43]], 1) {init = 0 : i32, sym_name = "fifo_cons_cons_lock"} +// CHECK: aie.flow(%[[tile23]], DMA : 0, %[[tile43]], DMA : 0) + +// CHECK: %[[ssa8:.*]] = aie.core(%[[tile23]]) { // CHECK: %c0 = arith.constant 0 : index // CHECK: %c1 = arith.constant 1 : index // CHECK: %c3 = arith.constant 3 : index @@ -60,7 +60,7 @@ // have the value change from iteration to iteration). // This is what currently is being generated: -// AIE.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) +// aie.use_lock(%[[fifo_prod_lock]], AcquireGreaterEqual, 1) // Instead: // Initialize the number of objects held, which is always zero at the // beginning before any acquires: @@ -82,7 +82,7 @@ // The only thing that is different about acquiring the lock is that we use // a new useLockDyn that takes an SSA value instead of a constant for the // lock value, so that it can be dynamic. -// CHECK: AIEX.useLockDyn(%[[fifo_prod_lock]], AcquireGreaterEqual, %[[uselock0_diff]]) +// CHECK: aiex.useLockDyn(%[[fifo_prod_lock]], AcquireGreaterEqual, %[[uselock0_diff]]) // We also need to update how many elements we hold now that we acquired more: // CHECK: %[[uselock0_newnum:.*]] = arith.addi %[[lock0_num0]], 1 : i32 // CHECK: scf.yield %[[uselock0_newnum]] @@ -112,7 +112,7 @@ // CHECK: %[[uselock1_diff:.*]] = arith.subi %[[lock0_num_iter]], %[[uselock1_target:.*]] : i32 // CHECK: %[[uselock1_need_acq:.*]] = arith.cmpi "sgt" %[[uselock1_diff]], 1 : i32 // CHECK: %[[lock0_num3:.*]] = scf.if %[[uselock1_need_acq]] -> (i32) { -// CHECK: AIEX.useLockDyn(%[[fifo_prod_lock]], AcquireGreaterEqual, %[[uselock1_diff]]) +// CHECK: aiex.useLockDyn(%[[fifo_prod_lock]], AcquireGreaterEqual, %[[uselock1_diff]]) // CHECK: %[[uselock1_newnum:.*]] = arith.addi %[[lock0_num_iter]], 1 : i32 // CHECK: scf.yield %[[uselock1_newnum]] // CHECK: } else { @@ -122,36 +122,36 @@ // Release inside loop: // The release will always release, but additionally to -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], Release, 1) +// CHECK: aie.use_lock(%[[fifo_cons_lock]], Release, 1) // CHECK: %[[lock0_num4:.*]] = arith.subi %[[lock0_num3]], 1 : i32 // At the very end of the loop, we need to yield how many objects are being held // after all the acquires and releases inside the loop: // CHECK: scf.yield %lock0_num4 // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // The DMAs should remain all the same and will be configured statically: -// CHECK: %[[ssa9:.*]] = AIE.mem(%[[tile23]]) { -// CHECK: %11 = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[ssa9:.*]] = aie.mem(%[[tile23]]) { +// CHECK: %11 = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[fifo_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo_buff_0]] : memref, 0, 1) -// CHECK: AIE.use_lock(%[[fifo_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[fifo_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo_buff_0]] : memref, 0, 1) +// CHECK: aie.use_lock(%[[fifo_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %10 = AIE.mem(%[[tile43]]) { -// CHECK: %11 = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: %10 = aie.mem(%[[tile43]]) { +// CHECK: %11 = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[fifo_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[fifo_cons_buff_0]] : memref, 0, 1) -// CHECK: AIE.use_lock(%[[fifo_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[fifo_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[fifo_cons_buff_0]] : memref, 0, 1) +// CHECK: aie.use_lock(%[[fifo_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } @@ -162,13 +162,13 @@ module @aie2_dynamic_locks { - AIE.device(xcve2302) { - %tile22 = AIE.tile(2, 2) // producer tile - %tile43 = AIE.tile(4, 3) // consumer tile - AIE.objectfifo @fifo (%tile22, {%tile43}, 1 : i32) : !AIE.objectfifo> + aie.device(xcve2302) { + %tile22 = aie.tile(2, 2) // producer tile + %tile43 = aie.tile(4, 3) // consumer tile + aie.objectfifo @fifo (%tile22, {%tile43}, 1 : i32) : !aie.objectfifo> // Producer core - %core22 = AIE.core(%tile22) { + %core22 = aie.core(%tile22) { // Initialize value to zero %i_c0 = arith.constant 0 : index %i_c1 = arith.constant 1 : index @@ -177,7 +177,7 @@ module @aie2_dynamic_locks { %c1 = arith.constant 1 : i64 // Acquire one element. - %subview0 = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> + %subview0 = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> scf.for %idx = %i_c0 to %i_c3 step %i_c1 { // Acquire one element (again). In the first iteration of the @@ -186,13 +186,13 @@ module @aie2_dynamic_locks { // just above the loop. In the second iteration, that object // has been released, and now a lock acquire 1 would be // required. - %subview = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %elem = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref + %subview = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %elem = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref memref.store %c1, %elem[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) } - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/AIE2_static_l1.mlir b/test/objectFifo-stateful-transform/AIE2_static_l1.mlir index a37c3c9be7..c83495a4a5 100644 --- a/test/objectFifo-stateful-transform/AIE2_static_l1.mlir +++ b/test/objectFifo-stateful-transform/AIE2_static_l1.mlir @@ -17,53 +17,53 @@ // In the end, %dstbuf23 should hold [0, 1, 2, 3, 4, 5, ... 15] // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK: %[[t0:.*]] = AIE.tile(2, 2) -// CHECK: %[[t1:.*]] = AIE.tile(2, 3) -// CHECK: %[[PL:.*]] = AIE.lock(%[[t0]], 0) {init = 4 : i32, sym_name = "fifo_prod_lock"} -// CHECK: %[[CL:.*]] = AIE.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} -// CHECK: %[[c0:.*]] = AIE.core(%[[t0]]) { -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.use_lock(%[[PL]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[CL]], Release, 1) -// CHECK: AIE.end +// CHECK: %[[t0:.*]] = aie.tile(2, 2) +// CHECK: %[[t1:.*]] = aie.tile(2, 3) +// CHECK: %[[PL:.*]] = aie.lock(%[[t0]], 0) {init = 4 : i32, sym_name = "fifo_prod_lock"} +// CHECK: %[[CL:.*]] = aie.lock(%[[t0]], 1) {init = 0 : i32, sym_name = "fifo_cons_lock"} +// CHECK: %[[c0:.*]] = aie.core(%[[t0]]) { +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.use_lock(%[[PL]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[CL]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[c1:.*]] = AIE.core(%[[t1]]) { -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 2) -// CHECK: AIE.use_lock(%[[PL]], Release, 2) -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 2) -// CHECK: AIE.use_lock(%[[PL]], Release, 2) -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 2) -// CHECK: AIE.use_lock(%[[PL]], Release, 2) -// CHECK: AIE.use_lock(%[[CL]], AcquireGreaterEqual, 2) -// CHECK: AIE.use_lock(%[[PL]], Release, 2) +// CHECK: %[[c1:.*]] = aie.core(%[[t1]]) { +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[PL]], Release, 2) +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[PL]], Release, 2) +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[PL]], Release, 2) +// CHECK: aie.use_lock(%[[CL]], AcquireGreaterEqual, 2) +// CHECK: aie.use_lock(%[[PL]], Release, 2) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } module @aie2_static_l1 { - AIE.device(xcve2302) { + aie.device(xcve2302) { %i_c0 = arith.constant 0 : index %i_c1 = arith.constant 1 : index %i_c2 = arith.constant 2 : index %i_c16 = arith.constant 16 : index - %tile22 = AIE.tile(2, 2) // producer tile - %srcbuf22 = AIE.buffer(%tile22) { sym_name = "srcbuf22" } : memref + %tile22 = aie.tile(2, 2) // producer tile + %srcbuf22 = aie.buffer(%tile22) { sym_name = "srcbuf22" } : memref - %tile23 = AIE.tile(2, 3) // consumer tile - %dstbuf23 = AIE.buffer(%tile23) { sym_name = "dstbuf22" } : memref<16xi32> + %tile23 = aie.tile(2, 3) // consumer tile + %dstbuf23 = aie.buffer(%tile23) { sym_name = "dstbuf22" } : memref<16xi32> // ObjectFifo that can hold 4 memrefs, populated by tile22 and // consumed by tile23 - AIE.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @fifo (%tile22, {%tile23}, 4 : i32) : !aie.objectfifo> // Producer core - %core22 = AIE.core(%tile22) { + %core22 = aie.core(%tile22) { // Initialize value to zero %c0 = arith.constant 0 : i32 %c1 = arith.constant 1 : i32 @@ -73,34 +73,34 @@ module @aie2_static_l1 { scf.for %idx = %i_c0 to %i_c16 step %i_c1 { %val0 = memref.load %srcbuf22[] : memref // Produce 1 elements, so acquire 1 element - %subview = AIE.objectfifo.acquire @fifo (Produce, 1) : !AIE.objectfifosubview> - %elem = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref + %subview = aie.objectfifo.acquire @fifo (Produce, 1) : !aie.objectfifosubview> + %elem = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref memref.store %val0, %elem[] : memref - AIE.objectfifo.release @fifo (Produce, 1) + aie.objectfifo.release @fifo (Produce, 1) // Increment %val1 = arith.addi %c1, %val0 : i32 memref.store %val1, %srcbuf22[] : memref } - AIE.end + aie.end } // Consumer core - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { scf.for %idx = %i_c0 to %i_c16 step %i_c2 { // Consume _two_ elements at once (cyclo static) - %subview = AIE.objectfifo.acquire @fifo (Consume, 2) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref + %subview = aie.objectfifo.acquire @fifo (Consume, 2) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref %val0 = memref.load %elem0[] : memref %val1 = memref.load %elem1[] : memref // Pass through to destination buffer func.call @store2(%val0, %val1, %idx, %dstbuf23) : (i32, i32, index, memref<16xi32>) -> () // Release consumed objects - AIE.objectfifo.release @fifo (Consume, 2) + aie.objectfifo.release @fifo (Consume, 2) } - AIE.end + aie.end } func.func @store2(%val0: i32, %val1: i32, %base : index, %buf : memref<16xi32>) -> () { diff --git a/test/objectFifo-stateful-transform/allocation_info_test.mlir b/test/objectFifo-stateful-transform/allocation_info_test.mlir index 342a19902b..a5ca9d8605 100644 --- a/test/objectFifo-stateful-transform/allocation_info_test.mlir +++ b/test/objectFifo-stateful-transform/allocation_info_test.mlir @@ -12,30 +12,30 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 3) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 1, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_2]], DMA : 0, %[[VAL_0]], DMA : 1) -// CHECK: AIE.shim_dma_allocation @of_in_0(MM2S, 0, 2) -// CHECK: AIE.shim_dma_allocation @of_out_0(S2MM, 0, 2) -// CHECK: AIE.shim_dma_allocation @of_in_1(MM2S, 1, 2) -// CHECK: AIE.shim_dma_allocation @of_out_1(S2MM, 1, 2) +// CHECK-LABEL: aie.device(xcve2302) { +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 3) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 1, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_2]], DMA : 0, %[[VAL_0]], DMA : 1) +// CHECK: aie.shim_dma_allocation @of_in_0(MM2S, 0, 2) +// CHECK: aie.shim_dma_allocation @of_out_0(S2MM, 0, 2) +// CHECK: aie.shim_dma_allocation @of_in_1(MM2S, 1, 2) +// CHECK: aie.shim_dma_allocation @of_out_1(S2MM, 1, 2) // CHECK: } module @alloc { - AIE.device(xcve2302) { - %tile20 = AIE.tile(2, 0) - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2302) { + %tile20 = aie.tile(2, 0) + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) - AIE.objectfifo @of_in_0 (%tile20, {%tile22}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out_0 (%tile22, {%tile20}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in_0 (%tile20, {%tile22}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_out_0 (%tile22, {%tile20}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of_in_1 (%tile20, {%tile23}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out_1 (%tile23, {%tile20}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in_1 (%tile20, {%tile23}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_out_1 (%tile23, {%tile20}, 2 : i32) : !aie.objectfifo> } } diff --git a/test/objectFifo-stateful-transform/base_test_AIE1.mlir b/test/objectFifo-stateful-transform/base_test_AIE1.mlir index 432c759b90..f41513a72e 100644 --- a/test/objectFifo-stateful-transform/base_test_AIE1.mlir +++ b/test/objectFifo-stateful-transform/base_test_AIE1.mlir @@ -14,71 +14,71 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @elementGenerationAIE1 { -// CHECK: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 0 : i32, sym_name = "of1_cons_lock_0"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of1_cons_lock_1"} -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of1_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of1_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "of1_lock_0"} -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_0]], 5) {init = 0 : i32, sym_name = "of1_lock_1"} -// CHECK: %[[VAL_11:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_12:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_13:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_14:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of0_lock_0"} -// CHECK: %[[VAL_16:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of0_lock_1"} -// CHECK: %[[VAL_17:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "of0_lock_2"} -// CHECK: %[[VAL_18:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of0_lock_3"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: %[[VAL_19:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_2]], 0) {init = 0 : i32, sym_name = "of1_cons_lock_0"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of1_cons_lock_1"} +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of1_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of1_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "of1_lock_0"} +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_0]], 5) {init = 0 : i32, sym_name = "of1_lock_1"} +// CHECK: %[[VAL_11:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_12:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_13:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_14:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of0_lock_0"} +// CHECK: %[[VAL_16:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of0_lock_1"} +// CHECK: %[[VAL_17:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "of0_lock_2"} +// CHECK: %[[VAL_18:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of0_lock_3"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: %[[VAL_19:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_10]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_10]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_20:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_20:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } module @elementGenerationAIE1 { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile33 = aie.tile(3, 3) // In the shared memory case, the number of elements does not change. - AIE.objectfifo @of0 (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @of0 (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> // In the non-adjacent memory case, the number of elements depends on the max amount acquired by // the processes running on each core (here nothing is specified so it cannot be derived). - AIE.objectfifo @of1 (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of1 (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> } } diff --git a/test/objectFifo-stateful-transform/base_test_AIE2.mlir b/test/objectFifo-stateful-transform/base_test_AIE2.mlir index 9973fdb94f..6bae85d560 100644 --- a/test/objectFifo-stateful-transform/base_test_AIE2.mlir +++ b/test/objectFifo-stateful-transform/base_test_AIE2.mlir @@ -14,69 +14,69 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @elementGenerationAIE2 { -// CHECK: AIE.device(xcve2302) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of1_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of1_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 2 : i32, sym_name = "of1_prod_lock"} -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of1_cons_lock"} -// CHECK: %[[VAL_11:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_12:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_13:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_14:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of0_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 4 : i32, sym_name = "of0_prod_lock"} -// CHECK: %[[VAL_16:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: %[[VAL_17:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: aie.device(xcve2302) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of1_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of1_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of1_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 2) {init = 2 : i32, sym_name = "of1_prod_lock"} +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of1_cons_lock"} +// CHECK: %[[VAL_11:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_12:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_13:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_14:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of0_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_0]], 0) {init = 4 : i32, sym_name = "of0_prod_lock"} +// CHECK: %[[VAL_16:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: %[[VAL_17:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_18:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } module @elementGenerationAIE2 { - AIE.device(xcve2302) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2302) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile33 = aie.tile(3, 3) // In the shared memory case, the number of elements does not change. - AIE.objectfifo @of0 (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @of0 (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> // In the non-adjacent memory case, the number of elements depends on the max amount acquired by // the processes running on each core (here nothing is specified so it cannot be derived). - AIE.objectfifo @of1 (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of1 (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> } } diff --git a/test/objectFifo-stateful-transform/broadcast_error_test.mlir b/test/objectFifo-stateful-transform/broadcast_error_test.mlir index dd2165e21b..31bf439fea 100644 --- a/test/objectFifo-stateful-transform/broadcast_error_test.mlir +++ b/test/objectFifo-stateful-transform/broadcast_error_test.mlir @@ -12,16 +12,16 @@ // RUN: not aie-opt --aie-objectFifo-stateful-transform %s 2>&1 | FileCheck %s -// CHECK: error: 'AIE.objectfifo' op does not have enough depths specified for producer and for each consumer. +// CHECK: error: 'aie.objectfifo' op does not have enough depths specified for producer and for each consumer. module @broadcast_error { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) - %tile32 = AIE.tile(3, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) + %tile32 = aie.tile(3, 2) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @broadcast_of (%tile13, {%tile12, %tile14, %tile32, %tile33}, [2, 2, 3]) : !AIE.objectfifo> + aie.objectfifo @broadcast_of (%tile13, {%tile12, %tile14, %tile32, %tile33}, [2, 2, 3]) : !aie.objectfifo> } } diff --git a/test/objectFifo-stateful-transform/broadcast_test.mlir b/test/objectFifo-stateful-transform/broadcast_test.mlir index 6402ed8167..251cff9e8e 100644 --- a/test/objectFifo-stateful-transform/broadcast_test.mlir +++ b/test/objectFifo-stateful-transform/broadcast_test.mlir @@ -13,354 +13,354 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { +// CHECK-LABEL: aie.device(xcvc1902) { // CHECK: memref.global "public" @broadcast_of_0_cons : memref<16xi32> // CHECK: memref.global "public" @broadcast_of_1_cons : memref<16xi32> // CHECK: memref.global "public" @broadcast_of_2_cons : memref<16xi32> // CHECK: memref.global "public" @broadcast_of_3_cons : memref<16xi32> // CHECK: memref.global "public" @broadcast_of : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.tile(1, 4) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 2) -// CHECK: %[[VAL_4:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "broadcast_of_0_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "broadcast_of_0_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "broadcast_of_0_cons_lock_0"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "broadcast_of_0_cons_lock_1"} -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "broadcast_of_1_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "broadcast_of_1_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_11:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "broadcast_of_1_cons_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 0 : i32, sym_name = "broadcast_of_1_cons_lock_0"} -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "broadcast_of_1_cons_lock_1"} -// CHECK: %[[VAL_14:.*]] = AIE.lock(%[[VAL_2]], 2) {init = 0 : i32, sym_name = "broadcast_of_1_cons_lock_2"} -// CHECK: %[[VAL_15:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_16:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_17:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_18:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_19:.*]] = AIE.lock(%[[VAL_3]], 0) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_0"} -// CHECK: %[[VAL_20:.*]] = AIE.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_1"} -// CHECK: %[[VAL_21:.*]] = AIE.lock(%[[VAL_3]], 2) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_2"} -// CHECK: %[[VAL_22:.*]] = AIE.lock(%[[VAL_3]], 3) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_3"} -// CHECK: %[[VAL_23:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "broadcast_of_3_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_24:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "broadcast_of_3_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_25:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "broadcast_of_3_cons_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_26:.*]] = AIE.lock(%[[VAL_4]], 0) {init = 0 : i32, sym_name = "broadcast_of_3_cons_lock_0"} -// CHECK: %[[VAL_27:.*]] = AIE.lock(%[[VAL_4]], 1) {init = 0 : i32, sym_name = "broadcast_of_3_cons_lock_1"} -// CHECK: %[[VAL_28:.*]] = AIE.lock(%[[VAL_4]], 2) {init = 0 : i32, sym_name = "broadcast_of_3_cons_lock_2"} -// CHECK: %[[VAL_29:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "broadcast_of_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_30:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "broadcast_of_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_31:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "broadcast_of_lock_0"} -// CHECK: %[[VAL_32:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "broadcast_of_lock_1"} -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_4]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_3]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.tile(1, 4) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 2) +// CHECK: %[[VAL_4:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "broadcast_of_0_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "broadcast_of_0_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "broadcast_of_0_cons_lock_0"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "broadcast_of_0_cons_lock_1"} +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "broadcast_of_1_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "broadcast_of_1_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_11:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "broadcast_of_1_cons_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_2]], 0) {init = 0 : i32, sym_name = "broadcast_of_1_cons_lock_0"} +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "broadcast_of_1_cons_lock_1"} +// CHECK: %[[VAL_14:.*]] = aie.lock(%[[VAL_2]], 2) {init = 0 : i32, sym_name = "broadcast_of_1_cons_lock_2"} +// CHECK: %[[VAL_15:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_16:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_17:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_18:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "broadcast_of_2_cons_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_19:.*]] = aie.lock(%[[VAL_3]], 0) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_0"} +// CHECK: %[[VAL_20:.*]] = aie.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_1"} +// CHECK: %[[VAL_21:.*]] = aie.lock(%[[VAL_3]], 2) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_2"} +// CHECK: %[[VAL_22:.*]] = aie.lock(%[[VAL_3]], 3) {init = 0 : i32, sym_name = "broadcast_of_2_cons_lock_3"} +// CHECK: %[[VAL_23:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "broadcast_of_3_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_24:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "broadcast_of_3_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_25:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "broadcast_of_3_cons_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_26:.*]] = aie.lock(%[[VAL_4]], 0) {init = 0 : i32, sym_name = "broadcast_of_3_cons_lock_0"} +// CHECK: %[[VAL_27:.*]] = aie.lock(%[[VAL_4]], 1) {init = 0 : i32, sym_name = "broadcast_of_3_cons_lock_1"} +// CHECK: %[[VAL_28:.*]] = aie.lock(%[[VAL_4]], 2) {init = 0 : i32, sym_name = "broadcast_of_3_cons_lock_2"} +// CHECK: %[[VAL_29:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "broadcast_of_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_30:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "broadcast_of_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_31:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "broadcast_of_lock_0"} +// CHECK: %[[VAL_32:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "broadcast_of_lock_1"} +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_4]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_3]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) // CHECK: func.func @some_work(%[[VAL_33:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_34:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_34:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_35:.*]] = arith.constant 0 : index // CHECK: %[[VAL_36:.*]] = arith.constant 1 : index // CHECK: %[[VAL_37:.*]] = arith.constant 12 : index // CHECK: %[[VAL_38:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_39:.*]] = %[[VAL_35]] to %[[VAL_37]] step %[[VAL_38]] { -// CHECK: AIE.use_lock(%[[VAL_31]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_31]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_29]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_31]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_32]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_31]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_32]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_30]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_32]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_32]], Release, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_40:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_41:.*]] = arith.constant 0 : index // CHECK: %[[VAL_42:.*]] = arith.constant 1 : index // CHECK: %[[VAL_43:.*]] = arith.constant 12 : index // CHECK: %[[VAL_44:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_45:.*]] = %[[VAL_41]] to %[[VAL_43]] step %[[VAL_44]] { -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_5]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_6]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 0) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_46:.*]] = AIE.core(%[[VAL_2]]) { +// CHECK: %[[VAL_46:.*]] = aie.core(%[[VAL_2]]) { // CHECK: %[[VAL_47:.*]] = arith.constant 0 : index // CHECK: %[[VAL_48:.*]] = arith.constant 1 : index // CHECK: %[[VAL_49:.*]] = arith.constant 12 : index // CHECK: %[[VAL_50:.*]] = arith.constant 3 : index // CHECK: scf.for %[[VAL_51:.*]] = %[[VAL_47]] to %[[VAL_49]] step %[[VAL_50]] { -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_10]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_14]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_14]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_11]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_14]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_10]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_11]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 0) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_52:.*]] = AIE.core(%[[VAL_3]]) { +// CHECK: %[[VAL_52:.*]] = aie.core(%[[VAL_3]]) { // CHECK: %[[VAL_53:.*]] = arith.constant 0 : index // CHECK: %[[VAL_54:.*]] = arith.constant 1 : index // CHECK: %[[VAL_55:.*]] = arith.constant 12 : index // CHECK: %[[VAL_56:.*]] = arith.constant 4 : index // CHECK: scf.for %[[VAL_57:.*]] = %[[VAL_53]] to %[[VAL_55]] step %[[VAL_56]] { -// CHECK: AIE.use_lock(%[[VAL_19]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_20]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_21]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_19]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_20]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_21]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_15]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_16]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_17]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_22]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_22]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_16]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_17]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_18]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_19]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_19]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_17]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_18]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_15]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_20]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_20]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_18]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_15]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_16]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 0) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_58:.*]] = AIE.core(%[[VAL_4]]) { +// CHECK: %[[VAL_58:.*]] = aie.core(%[[VAL_4]]) { // CHECK: %[[VAL_59:.*]] = arith.constant 0 : index // CHECK: %[[VAL_60:.*]] = arith.constant 1 : index // CHECK: %[[VAL_61:.*]] = arith.constant 12 : index // CHECK: %[[VAL_62:.*]] = arith.constant 3 : index // CHECK: scf.for %[[VAL_63:.*]] = %[[VAL_59]] to %[[VAL_61]] step %[[VAL_62]] { -// CHECK: AIE.use_lock(%[[VAL_26]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_27]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_26]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_27]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_23]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_24]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_26]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_28]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_26]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_28]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_24]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_25]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_27]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_26]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_27]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_26]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_25]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_23]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_28]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_28]], Release, 0) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_64:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_65:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_64:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_65:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_31]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_29]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_31]], Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_31]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_29]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_31]], Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_32]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_30]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_32]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_32]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_30]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_32]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_66:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_67:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_66:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_67:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_68:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_69:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_68:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_69:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb3 -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_14]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_11]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_14]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_11]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb4: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_70:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: %[[VAL_71:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_70:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: %[[VAL_71:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[VAL_19]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_15]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_19]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_15]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_20]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_16]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_20]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_16]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_21]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_21]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[VAL_22]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_22]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_72:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_73:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_72:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_73:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb3 -// CHECK: AIE.use_lock(%[[VAL_26]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_23]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_26]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_26]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_23]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_26]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_27]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_24]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_27]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_27]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_24]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_27]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_28]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_25]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_28]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_28]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_25]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_28]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb4: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @broadcast { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) - %tile32 = AIE.tile(3, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) + %tile32 = aie.tile(3, 2) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @broadcast_of (%tile13, {%tile12, %tile14, %tile32, %tile33}, [2, 2, 3, 4, 3]) : !AIE.objectfifo> + aie.objectfifo @broadcast_of (%tile13, {%tile12, %tile14, %tile32, %tile33}, [2, 2, 3, 4, 3]) : !aie.objectfifo> func.func @some_work(%lineOut : memref<16xi32>) -> () { return } - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @broadcast_of (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @broadcast_of (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @broadcast_of (Produce, 1) + aie.objectfifo.release @broadcast_of (Produce, 1) } - AIE.end + aie.end } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @broadcast_of (Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @broadcast_of (Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @broadcast_of (Consume, 1) + aie.objectfifo.release @broadcast_of (Consume, 1) } - AIE.end + aie.end } - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @broadcast_of (Consume, 2) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @broadcast_of (Consume, 2) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () func.call @some_work(%elem1) : (memref<16xi32>) -> () - AIE.objectfifo.release @broadcast_of (Consume, 2) + aie.objectfifo.release @broadcast_of (Consume, 2) } - AIE.end + aie.end } - %core32 = AIE.core(%tile32) { + %core32 = aie.core(%tile32) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @broadcast_of (Consume, 3) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> - %elem2 = AIE.objectfifo.subview.access %subview[2] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @broadcast_of (Consume, 3) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> + %elem2 = aie.objectfifo.subview.access %subview[2] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () func.call @some_work(%elem1) : (memref<16xi32>) -> () func.call @some_work(%elem2) : (memref<16xi32>) -> () - AIE.objectfifo.release @broadcast_of (Consume, 1) + aie.objectfifo.release @broadcast_of (Consume, 1) } - AIE.end + aie.end } - %core33 = AIE.core(%tile33) { + %core33 = aie.core(%tile33) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @broadcast_of (Consume, 2) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @broadcast_of (Consume, 2) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () func.call @some_work(%elem1) : (memref<16xi32>) -> () - AIE.objectfifo.release @broadcast_of (Consume, 1) + aie.objectfifo.release @broadcast_of (Consume, 1) } - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/cyclostatic_AIE2_sharedMem.mlir b/test/objectFifo-stateful-transform/cyclostatic_AIE2_sharedMem.mlir index 20b300b79f..d56e6212b4 100644 --- a/test/objectFifo-stateful-transform/cyclostatic_AIE2_sharedMem.mlir +++ b/test/objectFifo-stateful-transform/cyclostatic_AIE2_sharedMem.mlir @@ -12,16 +12,16 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 4 : i32, sym_name = "fifo0_prod_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "fifo0_cons_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK-LABEL: aie.device(xcve2302) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "fifo0_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 0) {init = 4 : i32, sym_name = "fifo0_prod_lock"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "fifo0_cons_lock"} +// CHECK: %[[VAL_8:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_9:.*]] = arith.constant 11 : i32 // CHECK: %[[VAL_10:.*]] = arith.constant 0 : index // CHECK: %[[VAL_11:.*]] = arith.constant 1 : index @@ -29,119 +29,119 @@ // CHECK: %[[VAL_13:.*]] = arith.constant 8 : index // CHECK: %[[VAL_14:.*]] = arith.constant 4 : index // CHECK: scf.for %[[VAL_15:.*]] = %[[VAL_10]] to %[[VAL_13]] step %[[VAL_14]] { -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) // CHECK: memref.store %[[VAL_9]], %[[VAL_2]]{{\[}}%[[VAL_10]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) // CHECK: memref.store %[[VAL_9]], %[[VAL_3]]{{\[}}%[[VAL_10]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) // CHECK: memref.store %[[VAL_9]], %[[VAL_4]]{{\[}}%[[VAL_10]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) // CHECK: memref.store %[[VAL_9]], %[[VAL_5]]{{\[}}%[[VAL_10]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) // CHECK: memref.store %[[VAL_9]], %[[VAL_2]]{{\[}}%[[VAL_10]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_16:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_17:.*]] = arith.constant 0 : index // CHECK: %[[VAL_18:.*]] = arith.constant 1 : index // CHECK: %[[VAL_19:.*]] = arith.constant 9 : index -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) // CHECK: %[[VAL_20:.*]] = memref.load %[[VAL_2]]{{\[}}%[[VAL_17]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) // CHECK: %[[VAL_21:.*]] = arith.constant 8 : index // CHECK: %[[VAL_22:.*]] = arith.constant 4 : index // CHECK: scf.for %[[VAL_23:.*]] = %[[VAL_17]] to %[[VAL_21]] step %[[VAL_22]] { -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 3) +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 3) // CHECK: %[[VAL_24:.*]] = memref.load %[[VAL_3]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_25:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_26:.*]] = memref.load %[[VAL_5]]{{\[}}%[[VAL_17]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) // CHECK: %[[VAL_27:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_28:.*]] = memref.load %[[VAL_5]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_29:.*]] = memref.load %[[VAL_2]]{{\[}}%[[VAL_17]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) // CHECK: %[[VAL_30:.*]] = memref.load %[[VAL_5]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_31:.*]] = memref.load %[[VAL_2]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_32:.*]] = memref.load %[[VAL_3]]{{\[}}%[[VAL_17]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) // CHECK: %[[VAL_33:.*]] = memref.load %[[VAL_2]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_34:.*]] = memref.load %[[VAL_3]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_35:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_17]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) // CHECK: %[[VAL_36:.*]] = memref.load %[[VAL_3]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_37:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_38:.*]] = memref.load %[[VAL_5]]{{\[}}%[[VAL_17]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) // CHECK: %[[VAL_39:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_17]]] : memref<16xi32> // CHECK: %[[VAL_40:.*]] = memref.load %[[VAL_5]]{{\[}}%[[VAL_17]]] : memref<16xi32> -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 2) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_6]], Release, 2) +// CHECK: aie.end // CHECK: } // CHECK: } module @cyclostatic { - AIE.device(xcve2302) { - %tile12 = AIE.tile(1, 2) - %tile23 = AIE.tile(2, 2) + aie.device(xcve2302) { + %tile12 = aie.tile(1, 2) + %tile23 = aie.tile(2, 2) - AIE.objectfifo @fifo0 (%tile12, {%tile23}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @fifo0 (%tile12, {%tile23}, 4 : i32) : !aie.objectfifo> - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %v11 = arith.constant 11 : i32 %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c9 = arith.constant 9 : index scf.for %indexInHeight = %c0 to %c9 step %c1 { - %subview1 = AIE.objectfifo.acquire @fifo0 (Produce, 1) : !AIE.objectfifosubview> - %subview1_obj = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview1 = aie.objectfifo.acquire @fifo0 (Produce, 1) : !aie.objectfifosubview> + %subview1_obj = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> memref.store %v11, %subview1_obj[%c0] : memref<16xi32> - AIE.objectfifo.release @fifo0 (Produce, 1) + aie.objectfifo.release @fifo0 (Produce, 1) } - AIE.end + aie.end } - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c9 = arith.constant 9 : index - %subview0 = AIE.objectfifo.acquire @fifo0 (Consume, 1) : !AIE.objectfifosubview> - %subview0_obj = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview0 = aie.objectfifo.acquire @fifo0 (Consume, 1) : !aie.objectfifosubview> + %subview0_obj = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> %v0 = memref.load %subview0_obj[%c0] : memref<16xi32> - AIE.objectfifo.release @fifo0 (Consume, 1) + aie.objectfifo.release @fifo0 (Consume, 1) scf.for %indexInHeight = %c0 to %c9 step %c1 { - %subview1 = AIE.objectfifo.acquire @fifo0 (Consume, 3) : !AIE.objectfifosubview> - %subview1_obj = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> - %subview1_obj1 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref<16xi32> - %subview1_obj2 = AIE.objectfifo.subview.access %subview1[2] : !AIE.objectfifosubview> -> memref<16xi32> + %subview1 = aie.objectfifo.acquire @fifo0 (Consume, 3) : !aie.objectfifosubview> + %subview1_obj = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> + %subview1_obj1 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref<16xi32> + %subview1_obj2 = aie.objectfifo.subview.access %subview1[2] : !aie.objectfifosubview> -> memref<16xi32> %v1 = memref.load %subview1_obj[%c0] : memref<16xi32> %v2 = memref.load %subview1_obj1[%c0] : memref<16xi32> %v3 = memref.load %subview1_obj2[%c0] : memref<16xi32> - AIE.objectfifo.release @fifo0 (Consume, 1) + aie.objectfifo.release @fifo0 (Consume, 1) } - %subview2 = AIE.objectfifo.acquire @fifo0 (Consume, 2) : !AIE.objectfifosubview> - %subview2_obj = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref<16xi32> - %subview2_obj1 = AIE.objectfifo.subview.access %subview2[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview2 = aie.objectfifo.acquire @fifo0 (Consume, 2) : !aie.objectfifosubview> + %subview2_obj = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref<16xi32> + %subview2_obj1 = aie.objectfifo.subview.access %subview2[1] : !aie.objectfifosubview> -> memref<16xi32> %v4 = memref.load %subview2_obj[%c0] : memref<16xi32> %v5 = memref.load %subview2_obj1[%c0] : memref<16xi32> - AIE.objectfifo.release @fifo0 (Consume, 2) + aie.objectfifo.release @fifo0 (Consume, 2) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/link_test_AIE1.mlir b/test/objectFifo-stateful-transform/link_test_AIE1.mlir index 12ea70d28e..579060f303 100644 --- a/test/objectFifo-stateful-transform/link_test_AIE1.mlir +++ b/test/objectFifo-stateful-transform/link_test_AIE1.mlir @@ -12,93 +12,93 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { +// CHECK-LABEL: aie.device(xcvc1902) { // CHECK: memref.global "public" @of2_cons : memref<16xi32> // CHECK: memref.global "public" @of2 : memref<16xi32> // CHECK: memref.global "public" @of1_cons : memref<16xi32> // CHECK: memref.global "public" @of1 : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 4) -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of2_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of2_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 0 : i32, sym_name = "of2_cons_lock_0"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of2_cons_lock_1"} -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of1_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of1_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "of1_cons_lock_0"} -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of1_cons_lock_1"} -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of1_lock_0"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: %[[VAL_12:.*]] = AIE.external_buffer {sym_name = "ext_buff_in"} : memref<16xi32> -// CHECK: AIE.shim_dma_allocation @of1(MM2S, 0, 2) -// CHECK: %[[VAL_13:.*]] = AIE.shim_dma(%[[VAL_0]]) { -// CHECK: %[[VAL_14:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 4) +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of2_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of2_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_2]], 0) {init = 0 : i32, sym_name = "of2_cons_lock_0"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of2_cons_lock_1"} +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of1_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of1_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "of1_cons_lock_0"} +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of1_cons_lock_1"} +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of1_lock_0"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: %[[VAL_12:.*]] = aie.external_buffer {sym_name = "ext_buff_in"} : memref<16xi32> +// CHECK: aie.shim_dma_allocation @of1(MM2S, 0, 2) +// CHECK: %[[VAL_13:.*]] = aie.shim_dma(%[[VAL_0]]) { +// CHECK: %[[VAL_14:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_11]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_11]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_16:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_15:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_16:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_10]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_10]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_17:.*]] = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %[[VAL_17:.*]] = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 0) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 0) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_10]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 0) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_10]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 0) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_19:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_18:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_19:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @link_AIE1 { - AIE.device(xcvc1902) { - %tile20 = AIE.tile(2, 0) - %tile22 = AIE.tile(2, 2) - %tile24 = AIE.tile(2, 4) + aie.device(xcvc1902) { + %tile20 = aie.tile(2, 0) + %tile22 = aie.tile(2, 2) + %tile24 = aie.tile(2, 4) - AIE.objectfifo @of1 (%tile20, {%tile22}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of2 (%tile22, {%tile24}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of1 (%tile20, {%tile22}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of2 (%tile22, {%tile24}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo.link [@of1] -> [@of2] () + aie.objectfifo.link [@of1] -> [@of2] () - %ext_buff_in = AIE.external_buffer {sym_name = "ext_buff_in"} : memref<16xi32> - AIE.objectfifo.register_external_buffers @of1 (%tile20, {%ext_buff_in}) : (memref<16xi32>) + %ext_buff_in = aie.external_buffer {sym_name = "ext_buff_in"} : memref<16xi32> + aie.objectfifo.register_external_buffers @of1 (%tile20, {%ext_buff_in}) : (memref<16xi32>) } } diff --git a/test/objectFifo-stateful-transform/link_test_AIE2.mlir b/test/objectFifo-stateful-transform/link_test_AIE2.mlir index 6b9b9866ec..2c3f32a436 100644 --- a/test/objectFifo-stateful-transform/link_test_AIE2.mlir +++ b/test/objectFifo-stateful-transform/link_test_AIE2.mlir @@ -12,203 +12,203 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @mem_out_cons : memref<3000xi32> // CHECK: memref.global "public" @mem_out : memref<3000xi32> // CHECK: memref.global "public" @mem_in_0_cons : memref<3000xi32> // CHECK: memref.global "public" @mem_in_1_cons : memref<3000xi32> // CHECK: memref.global "public" @mem_in : memref<3000xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 1) -// CHECK: %[[VAL_2:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_3:.*]] = AIE.tile(0, 3) -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_0"} : memref<3000xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_1"} : memref<3000xi32> -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_2"} : memref<3000xi32> -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_3"} : memref<3000xi32> -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_3]], 0) {init = 4 : i32, sym_name = "mem_out_cons_prod_lock"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "mem_out_cons_cons_lock"} -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "mem_in_0_cons_buff_0"} : memref<3000xi32> -// CHECK: %[[VAL_11:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "mem_in_0_cons_buff_1"} : memref<3000xi32> -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "mem_in_0_cons_prod_lock"} -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "mem_in_0_cons_cons_lock"} -// CHECK: %[[VAL_14:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_0"} : memref<3000xi32> -// CHECK: %[[VAL_15:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_1"} : memref<3000xi32> -// CHECK: %[[VAL_16:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_2"} : memref<3000xi32> -// CHECK: %[[VAL_17:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_3"} : memref<3000xi32> -// CHECK: %[[VAL_18:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_4"} : memref<3000xi32> -// CHECK: %[[VAL_19:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_5"} : memref<3000xi32> -// CHECK: %[[VAL_20:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_6"} : memref<3000xi32> -// CHECK: %[[VAL_21:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 7 : i32, sym_name = "mem_in_1_cons_prod_lock"} -// CHECK: %[[VAL_22:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "mem_in_1_cons_cons_lock"} -// CHECK: %[[VAL_23:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "mem_in_prod_lock"} -// CHECK: %[[VAL_24:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "mem_in_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_3]], DMA : 0) -// CHECK: %[[VAL_25:.*]] = AIE.core(%[[VAL_2]]) { +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 1) +// CHECK: %[[VAL_2:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_3:.*]] = aie.tile(0, 3) +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_0"} : memref<3000xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_1"} : memref<3000xi32> +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_2"} : memref<3000xi32> +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "mem_out_cons_buff_3"} : memref<3000xi32> +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_3]], 0) {init = 4 : i32, sym_name = "mem_out_cons_prod_lock"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "mem_out_cons_cons_lock"} +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "mem_in_0_cons_buff_0"} : memref<3000xi32> +// CHECK: %[[VAL_11:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "mem_in_0_cons_buff_1"} : memref<3000xi32> +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "mem_in_0_cons_prod_lock"} +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "mem_in_0_cons_cons_lock"} +// CHECK: %[[VAL_14:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_0"} : memref<3000xi32> +// CHECK: %[[VAL_15:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_1"} : memref<3000xi32> +// CHECK: %[[VAL_16:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_2"} : memref<3000xi32> +// CHECK: %[[VAL_17:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_3"} : memref<3000xi32> +// CHECK: %[[VAL_18:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_4"} : memref<3000xi32> +// CHECK: %[[VAL_19:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_5"} : memref<3000xi32> +// CHECK: %[[VAL_20:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "mem_in_1_cons_buff_6"} : memref<3000xi32> +// CHECK: %[[VAL_21:.*]] = aie.lock(%[[VAL_1]], 0) {init = 7 : i32, sym_name = "mem_in_1_cons_prod_lock"} +// CHECK: %[[VAL_22:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "mem_in_1_cons_cons_lock"} +// CHECK: %[[VAL_23:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "mem_in_prod_lock"} +// CHECK: %[[VAL_24:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "mem_in_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_3]], DMA : 0) +// CHECK: %[[VAL_25:.*]] = aie.core(%[[VAL_2]]) { // CHECK: %[[VAL_26:.*]] = arith.constant 11 : i32 // CHECK: %[[VAL_27:.*]] = arith.constant 0 : index -// CHECK: AIE.use_lock(%[[VAL_13]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_13]], AcquireGreaterEqual, 1) // CHECK: memref.store %[[VAL_26]], %[[VAL_10]]{{\[}}%[[VAL_27]]] : memref<3000xi32> -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: AIE.shim_dma_allocation @mem_in(MM2S, 0, 0) -// CHECK: %[[VAL_28:.*]] = AIE.core(%[[VAL_3]]) { +// CHECK: aie.shim_dma_allocation @mem_in(MM2S, 0, 0) +// CHECK: %[[VAL_28:.*]] = aie.core(%[[VAL_3]]) { // CHECK: %[[VAL_29:.*]] = arith.constant 11 : i32 // CHECK: %[[VAL_30:.*]] = arith.constant 0 : index -// CHECK: AIE.use_lock(%[[VAL_9]], AcquireGreaterEqual, 3) +// CHECK: aie.use_lock(%[[VAL_9]], AcquireGreaterEqual, 3) // CHECK: memref.store %[[VAL_29]], %[[VAL_4]]{{\[}}%[[VAL_30]]] : memref<3000xi32> -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_32:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_31:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_32:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_11]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_11]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.memtile_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_34:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb8) +// CHECK: %[[VAL_33:.*]] = aie.memtile_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_34:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb8) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb7 -// CHECK: AIE.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_14]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_14]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_15]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_15]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_16]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_16]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb6: // pred: ^bb5 -// CHECK: AIE.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_19]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_19]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb7: // pred: ^bb6 -// CHECK: AIE.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_20]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_21]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_20]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb8: // pred: ^bb0 -// CHECK: %[[VAL_35:.*]] = AIE.dma_start(MM2S, 0, ^bb9, ^bb16) +// CHECK: %[[VAL_35:.*]] = aie.dma_start(MM2S, 0, ^bb9, ^bb16) // CHECK: ^bb9: // 2 preds: ^bb8, ^bb15 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_14]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb10 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_14]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb10 // CHECK: ^bb10: // pred: ^bb9 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_15]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb11 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_15]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb11 // CHECK: ^bb11: // pred: ^bb10 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_16]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb12 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_16]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb12 // CHECK: ^bb12: // pred: ^bb11 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb13 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb13 // CHECK: ^bb13: // pred: ^bb12 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb14 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb14 // CHECK: ^bb14: // pred: ^bb13 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_19]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb15 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_19]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb15 // CHECK: ^bb15: // pred: ^bb14 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_20]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb9 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_20]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb9 // CHECK: ^bb16: // pred: ^bb8 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_36:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: %[[VAL_37:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_36:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: %[[VAL_37:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<3000xi32>, 0, 3000) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<3000xi32>, 0, 3000) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @link_AIE2 { - AIE.device(xcve2302) { - %tile00 = AIE.tile(0, 0) - %tile01 = AIE.tile(0, 1) - %tile02 = AIE.tile(0, 2) - %tile03 = AIE.tile(0, 3) + aie.device(xcve2302) { + %tile00 = aie.tile(0, 0) + %tile01 = aie.tile(0, 1) + %tile02 = aie.tile(0, 2) + %tile03 = aie.tile(0, 3) - AIE.objectfifo @mem_in (%tile00, {%tile02, %tile01}, [2,2,7]) : !AIE.objectfifo> - AIE.objectfifo @mem_out (%tile01, {%tile03}, 7 : i32) : !AIE.objectfifo> - AIE.objectfifo.link [@mem_in] -> [@mem_out] () + aie.objectfifo @mem_in (%tile00, {%tile02, %tile01}, [2,2,7]) : !aie.objectfifo> + aie.objectfifo @mem_out (%tile01, {%tile03}, 7 : i32) : !aie.objectfifo> + aie.objectfifo.link [@mem_in] -> [@mem_out] () - %core02 = AIE.core(%tile02) { + %core02 = aie.core(%tile02) { %v11 = arith.constant 11 : i32 %c0 = arith.constant 0 : index - %subview = AIE.objectfifo.acquire @mem_in (Consume, 1) : !AIE.objectfifosubview> - %subview_obj = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<3000xi32> + %subview = aie.objectfifo.acquire @mem_in (Consume, 1) : !aie.objectfifosubview> + %subview_obj = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<3000xi32> memref.store %v11, %subview_obj[%c0] : memref<3000xi32> - AIE.end + aie.end } - %core03 = AIE.core(%tile03) { + %core03 = aie.core(%tile03) { %v11 = arith.constant 11 : i32 %c0 = arith.constant 0 : index - %subview = AIE.objectfifo.acquire @mem_out (Consume, 3) : !AIE.objectfifosubview> - %subview_obj = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<3000xi32> + %subview = aie.objectfifo.acquire @mem_out (Consume, 3) : !aie.objectfifosubview> + %subview_obj = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<3000xi32> memref.store %v11, %subview_obj[%c0] : memref<3000xi32> - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/link_test_DDR_to_L1.mlir b/test/objectFifo-stateful-transform/link_test_DDR_to_L1.mlir index 209d9309f2..67c70fe591 100644 --- a/test/objectFifo-stateful-transform/link_test_DDR_to_L1.mlir +++ b/test/objectFifo-stateful-transform/link_test_DDR_to_L1.mlir @@ -12,94 +12,94 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @from_memTile_cons : memref<16xi32> // CHECK: memref.global "public" @from_memTile : memref<16xi32> // CHECK: memref.global "public" @to_memTile_cons : memref<16xi32> // CHECK: memref.global "public" @to_memTile : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "from_memTile_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "from_memTile_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "from_memTile_cons_prod_lock"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "from_memTile_cons_cons_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "to_memTile_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "to_memTile_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "to_memTile_cons_prod_lock"} -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "to_memTile_cons_cons_lock"} -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "to_memTile_prod_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "to_memTile_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: %[[VAL_13:.*]] = AIE.external_buffer {sym_name = "ext_buff_in"} : memref<16xi32> -// CHECK: AIE.shim_dma_allocation @to_memTile(MM2S, 0, 2) -// CHECK: %[[VAL_14:.*]] = AIE.shim_dma(%[[VAL_0]]) { -// CHECK: %[[VAL_15:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "from_memTile_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "from_memTile_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "from_memTile_cons_prod_lock"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "from_memTile_cons_cons_lock"} +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "to_memTile_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "to_memTile_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "to_memTile_cons_prod_lock"} +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "to_memTile_cons_cons_lock"} +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "to_memTile_prod_lock"} +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "to_memTile_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: %[[VAL_13:.*]] = aie.external_buffer {sym_name = "ext_buff_in"} : memref<16xi32> +// CHECK: aie.shim_dma_allocation @to_memTile(MM2S, 0, 2) +// CHECK: %[[VAL_14:.*]] = aie.shim_dma(%[[VAL_0]]) { +// CHECK: %[[VAL_15:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_13]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_13]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.memtile_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_17:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_16:.*]] = aie.memtile_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_17:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_18:.*]] = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %[[VAL_18:.*]] = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_19:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_20:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_19:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_20:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @link_DDR_L1 { - AIE.device(xcve2302) { - %tile20 = AIE.tile(2, 0) - %tile21 = AIE.tile(2, 1) - %tile22 = AIE.tile(2, 2) + aie.device(xcve2302) { + %tile20 = aie.tile(2, 0) + %tile21 = aie.tile(2, 1) + %tile22 = aie.tile(2, 2) - AIE.objectfifo @to_memTile (%tile20, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @from_memTile (%tile21, {%tile22}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @to_memTile (%tile20, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @from_memTile (%tile21, {%tile22}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo.link [@to_memTile] -> [@from_memTile] () + aie.objectfifo.link [@to_memTile] -> [@from_memTile] () - %ext_buff_in = AIE.external_buffer {sym_name = "ext_buff_in"}: memref<16xi32> - AIE.objectfifo.register_external_buffers @to_memTile (%tile20, {%ext_buff_in}) : (memref<16xi32>) + %ext_buff_in = aie.external_buffer {sym_name = "ext_buff_in"}: memref<16xi32> + aie.objectfifo.register_external_buffers @to_memTile (%tile20, {%ext_buff_in}) : (memref<16xi32>) } } diff --git a/test/objectFifo-stateful-transform/link_test_L1_to_DDR.mlir b/test/objectFifo-stateful-transform/link_test_L1_to_DDR.mlir index 4b5e2b2d98..70d539fbd5 100644 --- a/test/objectFifo-stateful-transform/link_test_L1_to_DDR.mlir +++ b/test/objectFifo-stateful-transform/link_test_L1_to_DDR.mlir @@ -12,94 +12,94 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @from_memTile_cons : memref<48xi32> // CHECK: memref.global "public" @from_memTile : memref<48xi32> // CHECK: memref.global "public" @to_memTile_cons : memref<16xi32> // CHECK: memref.global "public" @to_memTile : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "from_memTile_cons_prod_lock"} -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "from_memTile_cons_cons_lock"} -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "from_memTile_buff_0"} : memref<48xi32> -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "from_memTile_buff_1"} : memref<48xi32> -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "from_memTile_prod_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "from_memTile_cons_lock"} -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "to_memTile_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "to_memTile_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "to_memTile_prod_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "to_memTile_cons_lock"} -// CHECK: AIE.flow(%[[VAL_2]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) -// CHECK: %[[VAL_13:.*]] = AIE.external_buffer {sym_name = "ext_buff_in"} : memref<48xi32> -// CHECK: %[[VAL_14:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_15:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "from_memTile_cons_prod_lock"} +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "from_memTile_cons_cons_lock"} +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "from_memTile_buff_0"} : memref<48xi32> +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "from_memTile_buff_1"} : memref<48xi32> +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "from_memTile_prod_lock"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "from_memTile_cons_lock"} +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "to_memTile_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "to_memTile_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "to_memTile_prod_lock"} +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "to_memTile_cons_lock"} +// CHECK: aie.flow(%[[VAL_2]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: %[[VAL_13:.*]] = aie.external_buffer {sym_name = "ext_buff_in"} : memref<48xi32> +// CHECK: %[[VAL_14:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_15:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_12]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_16:.*]] = AIE.memtile_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_17:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_16:.*]] = aie.memtile_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_17:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_18:.*]] = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %[[VAL_18:.*]] = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: AIE.shim_dma_allocation @from_memTile(S2MM, 0, 2) -// CHECK: %[[VAL_19:.*]] = AIE.shim_dma(%[[VAL_0]]) { -// CHECK: %[[VAL_20:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: aie.shim_dma_allocation @from_memTile(S2MM, 0, 2) +// CHECK: %[[VAL_19:.*]] = aie.shim_dma(%[[VAL_0]]) { +// CHECK: %[[VAL_20:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_3]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_13]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_3]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_13]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @link_L1_DDR { - AIE.device(xcve2302) { - %tile20 = AIE.tile(2, 0) - %tile21 = AIE.tile(2, 1) - %tile22 = AIE.tile(2, 2) + aie.device(xcve2302) { + %tile20 = aie.tile(2, 0) + %tile21 = aie.tile(2, 1) + %tile22 = aie.tile(2, 2) - AIE.objectfifo @to_memTile (%tile22, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @from_memTile (%tile21, {%tile20}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @to_memTile (%tile22, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @from_memTile (%tile21, {%tile20}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo.link [@to_memTile] -> [@from_memTile] () + aie.objectfifo.link [@to_memTile] -> [@from_memTile] () - %ext_buff_in = AIE.external_buffer {sym_name = "ext_buff_in"}: memref<48xi32> - AIE.objectfifo.register_external_buffers @from_memTile (%tile20, {%ext_buff_in}) : (memref<48xi32>) + %ext_buff_in = aie.external_buffer {sym_name = "ext_buff_in"}: memref<48xi32> + aie.objectfifo.register_external_buffers @from_memTile (%tile20, {%ext_buff_in}) : (memref<48xi32>) } } diff --git a/test/objectFifo-stateful-transform/link_test_broadcast.mlir b/test/objectFifo-stateful-transform/link_test_broadcast.mlir index 43fca43bb2..6a8a5b6cc6 100644 --- a/test/objectFifo-stateful-transform/link_test_broadcast.mlir +++ b/test/objectFifo-stateful-transform/link_test_broadcast.mlir @@ -12,7 +12,7 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @skip_connection_cons : memref<16xi32> // CHECK: memref.global "public" @skip_connection : memref<16xi32> // CHECK: memref.global "public" @link2_0_cons : memref<16xi32> @@ -20,138 +20,138 @@ // CHECK: memref.global "public" @link2 : memref<16xi32> // CHECK: memref.global "public" @link1_cons : memref<48xi32> // CHECK: memref.global "public" @link1 : memref<48xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "skip_connection_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "skip_connection_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_3]], 2) {init = 2 : i32, sym_name = "skip_connection_cons_prod_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_3]], 3) {init = 0 : i32, sym_name = "skip_connection_cons_cons_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "skip_connection_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "skip_connection_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_2]], 2) {init = 2 : i32, sym_name = "skip_connection_prod_lock"} -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_2]], 3) {init = 0 : i32, sym_name = "skip_connection_cons_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "link2_0_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_13:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "link2_0_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_14:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "link2_0_cons_prod_lock"} -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "link2_0_cons_cons_lock"} -// CHECK: %[[VAL_16:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "link2_1_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_17:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "link2_1_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_18:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "link2_1_cons_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_19:.*]] = AIE.lock(%[[VAL_3]], 0) {init = 3 : i32, sym_name = "link2_1_cons_prod_lock"} -// CHECK: %[[VAL_20:.*]] = AIE.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "link2_1_cons_cons_lock"} -// CHECK: %[[VAL_21:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_0"} : memref<48xi32> -// CHECK: %[[VAL_22:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_1"} : memref<48xi32> -// CHECK: %[[VAL_23:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "link1_cons_prod_lock"} -// CHECK: %[[VAL_24:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "link1_cons_cons_lock"} -// CHECK: %[[VAL_25:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "link1_prod_lock"} -// CHECK: %[[VAL_26:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "link1_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_3]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_2]], DMA : 0, %[[VAL_3]], DMA : 1) -// CHECK: AIE.shim_dma_allocation @link1(MM2S, 0, 2) -// CHECK: %[[VAL_27:.*]] = AIE.memtile_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_28:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "skip_connection_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "skip_connection_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_3]], 2) {init = 2 : i32, sym_name = "skip_connection_cons_prod_lock"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_3]], 3) {init = 0 : i32, sym_name = "skip_connection_cons_cons_lock"} +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "skip_connection_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "skip_connection_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_2]], 2) {init = 2 : i32, sym_name = "skip_connection_prod_lock"} +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_2]], 3) {init = 0 : i32, sym_name = "skip_connection_cons_lock"} +// CHECK: %[[VAL_12:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "link2_0_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_13:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "link2_0_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_14:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "link2_0_cons_prod_lock"} +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "link2_0_cons_cons_lock"} +// CHECK: %[[VAL_16:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "link2_1_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_17:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "link2_1_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_18:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "link2_1_cons_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_19:.*]] = aie.lock(%[[VAL_3]], 0) {init = 3 : i32, sym_name = "link2_1_cons_prod_lock"} +// CHECK: %[[VAL_20:.*]] = aie.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "link2_1_cons_cons_lock"} +// CHECK: %[[VAL_21:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_0"} : memref<48xi32> +// CHECK: %[[VAL_22:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_1"} : memref<48xi32> +// CHECK: %[[VAL_23:.*]] = aie.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "link1_cons_prod_lock"} +// CHECK: %[[VAL_24:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "link1_cons_cons_lock"} +// CHECK: %[[VAL_25:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "link1_prod_lock"} +// CHECK: %[[VAL_26:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "link1_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_3]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_2]], DMA : 0, %[[VAL_3]], DMA : 1) +// CHECK: aie.shim_dma_allocation @link1(MM2S, 0, 2) +// CHECK: %[[VAL_27:.*]] = aie.memtile_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_28:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_21]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_24]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_21]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_24]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_22]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_24]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_22]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_24]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_29:.*]] = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %[[VAL_29:.*]] = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_24]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_21]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_23]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_24]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_21]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_23]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_24]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_22]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_23]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_24]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_22]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_23]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_30:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_31:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_30:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_31:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_13]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_13]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_32:.*]] = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %[[VAL_32:.*]] = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: %[[VAL_34:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_33:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: %[[VAL_34:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb3 -// CHECK: AIE.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_16]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_16]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb4: // pred: ^bb0 -// CHECK: %[[VAL_35:.*]] = AIE.dma_start(S2MM, 1, ^bb5, ^bb7) +// CHECK: %[[VAL_35:.*]] = aie.dma_start(S2MM, 1, ^bb5, ^bb7) // CHECK: ^bb5: // 2 preds: ^bb4, ^bb6 -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb6: // pred: ^bb5 -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb7: // pred: ^bb4 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @link_broadcast { - AIE.device(xcve2302) { - %tile20 = AIE.tile(2, 0) - %tile21 = AIE.tile(2, 1) - %tile22 = AIE.tile(2, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2302) { + %tile20 = aie.tile(2, 0) + %tile21 = aie.tile(2, 1) + %tile22 = aie.tile(2, 2) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @link1 (%tile20, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link2 (%tile21, {%tile22, %tile33}, [2, 2, 3]) : !AIE.objectfifo> + aie.objectfifo @link1 (%tile20, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link2 (%tile21, {%tile22, %tile33}, [2, 2, 3]) : !aie.objectfifo> - AIE.objectfifo @skip_connection (%tile22, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @skip_connection (%tile22, {%tile33}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo.link [@link1] -> [@link2] () + aie.objectfifo.link [@link1] -> [@link2] () } } diff --git a/test/objectFifo-stateful-transform/link_test_distribute.mlir b/test/objectFifo-stateful-transform/link_test_distribute.mlir index f3e22ac18b..c95d8b6e10 100644 --- a/test/objectFifo-stateful-transform/link_test_distribute.mlir +++ b/test/objectFifo-stateful-transform/link_test_distribute.mlir @@ -12,7 +12,7 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @link4_cons : memref<12xi32> // CHECK: memref.global "public" @link4 : memref<12xi32> // CHECK: memref.global "public" @link3_cons : memref<20xi32> @@ -21,159 +21,159 @@ // CHECK: memref.global "public" @link2 : memref<4x4xi32> // CHECK: memref.global "public" @link1_cons : memref<48xi32> // CHECK: memref.global "public" @link1 : memref<48xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_3:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_4:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "link4_cons_buff_0"} : memref<12xi32> -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "link4_cons_buff_1"} : memref<12xi32> -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_4]], 0) {init = 2 : i32, sym_name = "link4_cons_prod_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_4]], 1) {init = 0 : i32, sym_name = "link4_cons_cons_lock"} -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "link3_cons_buff_0"} : memref<20xi32> -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "link3_cons_buff_1"} : memref<20xi32> -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_3]], 0) {init = 2 : i32, sym_name = "link3_cons_prod_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "link3_cons_cons_lock"} -// CHECK: %[[VAL_13:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "link2_cons_buff_0"} : memref<4x4xi32> -// CHECK: %[[VAL_14:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "link2_cons_buff_1"} : memref<4x4xi32> -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "link2_cons_prod_lock"} -// CHECK: %[[VAL_16:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "link2_cons_cons_lock"} -// CHECK: %[[VAL_17:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_0"} : memref<48xi32> -// CHECK: %[[VAL_18:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_1"} : memref<48xi32> -// CHECK: %[[VAL_19:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 6 : i32, sym_name = "link1_cons_prod_lock"} -// CHECK: %[[VAL_20:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "link1_cons_cons_lock"} -// CHECK: %[[VAL_21:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "link1_prod_lock"} -// CHECK: %[[VAL_22:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "link1_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 1, %[[VAL_3]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 2, %[[VAL_4]], DMA : 0) -// CHECK: %[[VAL_23:.*]] = AIE.external_buffer {sym_name = "ext_buffer_in"} : memref<48xi32> -// CHECK: AIE.shim_dma_allocation @link1(MM2S, 0, 2) -// CHECK: %[[VAL_24:.*]] = AIE.shim_dma(%[[VAL_0]]) { -// CHECK: %[[VAL_25:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_3:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_4:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "link4_cons_buff_0"} : memref<12xi32> +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "link4_cons_buff_1"} : memref<12xi32> +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_4]], 0) {init = 2 : i32, sym_name = "link4_cons_prod_lock"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_4]], 1) {init = 0 : i32, sym_name = "link4_cons_cons_lock"} +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "link3_cons_buff_0"} : memref<20xi32> +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "link3_cons_buff_1"} : memref<20xi32> +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_3]], 0) {init = 2 : i32, sym_name = "link3_cons_prod_lock"} +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "link3_cons_cons_lock"} +// CHECK: %[[VAL_13:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "link2_cons_buff_0"} : memref<4x4xi32> +// CHECK: %[[VAL_14:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "link2_cons_buff_1"} : memref<4x4xi32> +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "link2_cons_prod_lock"} +// CHECK: %[[VAL_16:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "link2_cons_cons_lock"} +// CHECK: %[[VAL_17:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_0"} : memref<48xi32> +// CHECK: %[[VAL_18:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "link1_cons_buff_1"} : memref<48xi32> +// CHECK: %[[VAL_19:.*]] = aie.lock(%[[VAL_1]], 0) {init = 6 : i32, sym_name = "link1_cons_prod_lock"} +// CHECK: %[[VAL_20:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "link1_cons_cons_lock"} +// CHECK: %[[VAL_21:.*]] = aie.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "link1_prod_lock"} +// CHECK: %[[VAL_22:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "link1_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 1, %[[VAL_3]], DMA : 0) +// CHECK: aie.flow(%[[VAL_1]], DMA : 2, %[[VAL_4]], DMA : 0) +// CHECK: %[[VAL_23:.*]] = aie.external_buffer {sym_name = "ext_buffer_in"} : memref<48xi32> +// CHECK: aie.shim_dma_allocation @link1(MM2S, 0, 2) +// CHECK: %[[VAL_24:.*]] = aie.shim_dma(%[[VAL_0]]) { +// CHECK: %[[VAL_25:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_23]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_21]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_22]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_23]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_21]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_26:.*]] = AIE.memtile_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_27:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_26:.*]] = aie.memtile_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_27:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_19]], AcquireGreaterEqual, 3) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 3) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_19]], AcquireGreaterEqual, 3) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 3) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_19]], AcquireGreaterEqual, 3) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<48xi32>, 0, 48) -// CHECK: AIE.use_lock(%[[VAL_20]], Release, 3) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_19]], AcquireGreaterEqual, 3) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<48xi32>, 0, 48) +// CHECK: aie.use_lock(%[[VAL_20]], Release, 3) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_28:.*]] = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %[[VAL_28:.*]] = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<48xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<48xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<48xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<48xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: %[[VAL_29:.*]] = AIE.dma_start(MM2S, 1, ^bb7, ^bb9) +// CHECK: %[[VAL_29:.*]] = aie.dma_start(MM2S, 1, ^bb7, ^bb9) // CHECK: ^bb7: // 2 preds: ^bb6, ^bb8 -// CHECK: AIE.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<48xi32>, 64, 20) -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 1) -// CHECK: AIE.next_bd ^bb8 +// CHECK: aie.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<48xi32>, 64, 20) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 1) +// CHECK: aie.next_bd ^bb8 // CHECK: ^bb8: // pred: ^bb7 -// CHECK: AIE.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<48xi32>, 64, 20) -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<48xi32>, 64, 20) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb9: // pred: ^bb6 -// CHECK: %[[VAL_30:.*]] = AIE.dma_start(MM2S, 2, ^bb10, ^bb12) +// CHECK: %[[VAL_30:.*]] = aie.dma_start(MM2S, 2, ^bb10, ^bb12) // CHECK: ^bb10: // 2 preds: ^bb9, ^bb11 -// CHECK: AIE.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<48xi32>, 144, 12) -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 1) -// CHECK: AIE.next_bd ^bb11 +// CHECK: aie.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<48xi32>, 144, 12) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 1) +// CHECK: aie.next_bd ^bb11 // CHECK: ^bb11: // pred: ^bb10 -// CHECK: AIE.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<48xi32>, 144, 12) -// CHECK: AIE.use_lock(%[[VAL_19]], Release, 1) -// CHECK: AIE.next_bd ^bb10 +// CHECK: aie.use_lock(%[[VAL_20]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<48xi32>, 144, 12) +// CHECK: aie.use_lock(%[[VAL_19]], Release, 1) +// CHECK: aie.next_bd ^bb10 // CHECK: ^bb12: // pred: ^bb9 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_32:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_31:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_32:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_13]] : memref<4x4xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_16]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_13]] : memref<4x4xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_16]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_14]] : memref<4x4xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_16]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_14]] : memref<4x4xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_16]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_33:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: %[[VAL_34:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_33:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: %[[VAL_34:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<20xi32>, 0, 20) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<20xi32>, 0, 20) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<20xi32>, 0, 20) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<20xi32>, 0, 20) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_35:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_36:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_35:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_36:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<12xi32>, 0, 12) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<12xi32>, 0, 12) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<12xi32>, 0, 12) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<12xi32>, 0, 12) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @link_distribute { - AIE.device(xcve2302) { - %tile20 = AIE.tile(2, 0) - %tile21 = AIE.tile(2, 1) - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2302) { + %tile20 = aie.tile(2, 0) + %tile21 = aie.tile(2, 1) + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @link1 (%tile20, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link2 (%tile21, {%tile22}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link3 (%tile21, {%tile23}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link4 (%tile21, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @link1 (%tile20, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link2 (%tile21, {%tile22}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link3 (%tile21, {%tile23}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link4 (%tile21, {%tile33}, 2 : i32) : !aie.objectfifo> - %ext_buffer_in = AIE.external_buffer {sym_name = "ext_buffer_in"}: memref<48xi32> - AIE.objectfifo.register_external_buffers @link1 (%tile20, {%ext_buffer_in}) : (memref<48xi32>) + %ext_buffer_in = aie.external_buffer {sym_name = "ext_buffer_in"}: memref<48xi32> + aie.objectfifo.register_external_buffers @link1 (%tile20, {%ext_buffer_in}) : (memref<48xi32>) - AIE.objectfifo.link [@link1] -> [@link2, @link3, @link4] () + aie.objectfifo.link [@link1] -> [@link2, @link3, @link4] () } } diff --git a/test/objectFifo-stateful-transform/link_test_join.mlir b/test/objectFifo-stateful-transform/link_test_join.mlir index e3cdc853cd..be54b1630c 100644 --- a/test/objectFifo-stateful-transform/link_test_join.mlir +++ b/test/objectFifo-stateful-transform/link_test_join.mlir @@ -12,7 +12,7 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @link5_cons : memref<512xi8> // CHECK: memref.global "public" @link5 : memref<512xi8> // CHECK: memref.global "public" @link4_cons : memref<128xi8> @@ -23,194 +23,194 @@ // CHECK: memref.global "public" @link2 : memref<128xi8> // CHECK: memref.global "public" @link1_cons : memref<128xi8> // CHECK: memref.global "public" @link1 : memref<128xi8> -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_2:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_3:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_4:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_5:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "link5_cons_prod_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "link5_cons_cons_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "link5_buff_0"} : memref<512xi8> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "link5_buff_1"} : memref<512xi8> -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 8 : i32, sym_name = "link5_prod_lock"} -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "link5_cons_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.buffer(%[[VAL_5]]) {sym_name = "link4_buff_0"} : memref<128xi8> -// CHECK: %[[VAL_13:.*]] = AIE.buffer(%[[VAL_5]]) {sym_name = "link4_buff_1"} : memref<128xi8> -// CHECK: %[[VAL_14:.*]] = AIE.lock(%[[VAL_5]], 0) {init = 2 : i32, sym_name = "link4_prod_lock"} -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_5]], 1) {init = 0 : i32, sym_name = "link4_cons_lock"} -// CHECK: %[[VAL_16:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "link3_buff_0"} : memref<128xi8> -// CHECK: %[[VAL_17:.*]] = AIE.buffer(%[[VAL_4]]) {sym_name = "link3_buff_1"} : memref<128xi8> -// CHECK: %[[VAL_18:.*]] = AIE.lock(%[[VAL_4]], 0) {init = 2 : i32, sym_name = "link3_prod_lock"} -// CHECK: %[[VAL_19:.*]] = AIE.lock(%[[VAL_4]], 1) {init = 0 : i32, sym_name = "link3_cons_lock"} -// CHECK: %[[VAL_20:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "link2_buff_0"} : memref<128xi8> -// CHECK: %[[VAL_21:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "link2_buff_1"} : memref<128xi8> -// CHECK: %[[VAL_22:.*]] = AIE.lock(%[[VAL_3]], 0) {init = 2 : i32, sym_name = "link2_prod_lock"} -// CHECK: %[[VAL_23:.*]] = AIE.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "link2_cons_lock"} -// CHECK: %[[VAL_24:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "link1_buff_0"} : memref<128xi8> -// CHECK: %[[VAL_25:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "link1_buff_1"} : memref<128xi8> -// CHECK: %[[VAL_26:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "link1_prod_lock"} -// CHECK: %[[VAL_27:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "link1_cons_lock"} -// CHECK: AIE.flow(%[[VAL_2]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_3]], DMA : 0, %[[VAL_1]], DMA : 1) -// CHECK: AIE.flow(%[[VAL_4]], DMA : 0, %[[VAL_1]], DMA : 2) -// CHECK: AIE.flow(%[[VAL_5]], DMA : 0, %[[VAL_1]], DMA : 3) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) -// CHECK: %[[VAL_28:.*]] = AIE.external_buffer {sym_name = "ext_buffer_in"} : memref<512xi8> -// CHECK: %[[VAL_29:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_30:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_2:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_3:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_4:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_5:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "link5_cons_prod_lock"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "link5_cons_cons_lock"} +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "link5_buff_0"} : memref<512xi8> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "link5_buff_1"} : memref<512xi8> +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_1]], 0) {init = 8 : i32, sym_name = "link5_prod_lock"} +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "link5_cons_lock"} +// CHECK: %[[VAL_12:.*]] = aie.buffer(%[[VAL_5]]) {sym_name = "link4_buff_0"} : memref<128xi8> +// CHECK: %[[VAL_13:.*]] = aie.buffer(%[[VAL_5]]) {sym_name = "link4_buff_1"} : memref<128xi8> +// CHECK: %[[VAL_14:.*]] = aie.lock(%[[VAL_5]], 0) {init = 2 : i32, sym_name = "link4_prod_lock"} +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_5]], 1) {init = 0 : i32, sym_name = "link4_cons_lock"} +// CHECK: %[[VAL_16:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "link3_buff_0"} : memref<128xi8> +// CHECK: %[[VAL_17:.*]] = aie.buffer(%[[VAL_4]]) {sym_name = "link3_buff_1"} : memref<128xi8> +// CHECK: %[[VAL_18:.*]] = aie.lock(%[[VAL_4]], 0) {init = 2 : i32, sym_name = "link3_prod_lock"} +// CHECK: %[[VAL_19:.*]] = aie.lock(%[[VAL_4]], 1) {init = 0 : i32, sym_name = "link3_cons_lock"} +// CHECK: %[[VAL_20:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "link2_buff_0"} : memref<128xi8> +// CHECK: %[[VAL_21:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "link2_buff_1"} : memref<128xi8> +// CHECK: %[[VAL_22:.*]] = aie.lock(%[[VAL_3]], 0) {init = 2 : i32, sym_name = "link2_prod_lock"} +// CHECK: %[[VAL_23:.*]] = aie.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "link2_cons_lock"} +// CHECK: %[[VAL_24:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "link1_buff_0"} : memref<128xi8> +// CHECK: %[[VAL_25:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "link1_buff_1"} : memref<128xi8> +// CHECK: %[[VAL_26:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "link1_prod_lock"} +// CHECK: %[[VAL_27:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "link1_cons_lock"} +// CHECK: aie.flow(%[[VAL_2]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_3]], DMA : 0, %[[VAL_1]], DMA : 1) +// CHECK: aie.flow(%[[VAL_4]], DMA : 0, %[[VAL_1]], DMA : 2) +// CHECK: aie.flow(%[[VAL_5]], DMA : 0, %[[VAL_1]], DMA : 3) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: %[[VAL_28:.*]] = aie.external_buffer {sym_name = "ext_buffer_in"} : memref<512xi8> +// CHECK: %[[VAL_29:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_30:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_27]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_24]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_26]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_27]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_24]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_26]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_27]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_25]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_26]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_27]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_25]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_26]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_31:.*]] = AIE.memtile_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_32:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_31:.*]] = aie.memtile_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_32:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<512xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<512xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<512xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<512xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_33:.*]] = AIE.dma_start(S2MM, 1, ^bb4, ^bb6) +// CHECK: %[[VAL_33:.*]] = aie.dma_start(S2MM, 1, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<512xi8>, 128, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<512xi8>, 128, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<512xi8>, 128, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<512xi8>, 128, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: %[[VAL_34:.*]] = AIE.dma_start(S2MM, 2, ^bb7, ^bb9) +// CHECK: %[[VAL_34:.*]] = aie.dma_start(S2MM, 2, ^bb7, ^bb9) // CHECK: ^bb7: // 2 preds: ^bb6, ^bb8 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<512xi8>, 256, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb8 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<512xi8>, 256, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb8 // CHECK: ^bb8: // pred: ^bb7 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<512xi8>, 256, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<512xi8>, 256, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb9: // pred: ^bb6 -// CHECK: %[[VAL_35:.*]] = AIE.dma_start(S2MM, 3, ^bb10, ^bb12) +// CHECK: %[[VAL_35:.*]] = aie.dma_start(S2MM, 3, ^bb10, ^bb12) // CHECK: ^bb10: // 2 preds: ^bb9, ^bb11 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<512xi8>, 384, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb11 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<512xi8>, 384, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb11 // CHECK: ^bb11: // pred: ^bb10 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<512xi8>, 384, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb10 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<512xi8>, 384, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb10 // CHECK: ^bb12: // pred: ^bb9 -// CHECK: %[[VAL_36:.*]] = AIE.dma_start(MM2S, 0, ^bb13, ^bb15) +// CHECK: %[[VAL_36:.*]] = aie.dma_start(MM2S, 0, ^bb13, ^bb15) // CHECK: ^bb13: // 2 preds: ^bb12, ^bb14 -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 4) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<512xi8>, 0, 512) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 4) -// CHECK: AIE.next_bd ^bb14 +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 4) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<512xi8>, 0, 512) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 4) +// CHECK: aie.next_bd ^bb14 // CHECK: ^bb14: // pred: ^bb13 -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 4) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<512xi8>, 0, 512) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 4) -// CHECK: AIE.next_bd ^bb13 +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 4) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<512xi8>, 0, 512) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 4) +// CHECK: aie.next_bd ^bb13 // CHECK: ^bb15: // pred: ^bb12 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_37:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: %[[VAL_38:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_37:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: %[[VAL_38:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_20]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_20]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_21]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_22]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_23]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_21]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_22]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_39:.*]] = AIE.mem(%[[VAL_4]]) { -// CHECK: %[[VAL_40:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_39:.*]] = aie.mem(%[[VAL_4]]) { +// CHECK: %[[VAL_40:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_16]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_18]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_16]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_18]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_17]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_18]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_19]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_17]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_18]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.mem(%[[VAL_5]]) { -// CHECK: %[[VAL_42:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_41:.*]] = aie.mem(%[[VAL_5]]) { +// CHECK: %[[VAL_42:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_12]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_12]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_13]] : memref<128xi8>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_15]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_13]] : memref<128xi8>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: AIE.shim_dma_allocation @link5(S2MM, 0, 2) -// CHECK: %[[VAL_43:.*]] = AIE.shim_dma(%[[VAL_0]]) { -// CHECK: %[[VAL_44:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) +// CHECK: aie.shim_dma_allocation @link5(S2MM, 0, 2) +// CHECK: %[[VAL_43:.*]] = aie.shim_dma(%[[VAL_0]]) { +// CHECK: %[[VAL_44:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_28]] : memref<512xi8>, 0, 512) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_28]] : memref<512xi8>, 0, 512) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @link_join { - AIE.device(xcve2302) { - %tile20 = AIE.tile(2, 0) - %tile21 = AIE.tile(2, 1) - %tile12 = AIE.tile(1, 2) - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2302) { + %tile20 = aie.tile(2, 0) + %tile21 = aie.tile(2, 1) + %tile12 = aie.tile(1, 2) + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @link1 (%tile12, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link2 (%tile22, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link3 (%tile23, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link4 (%tile33, {%tile21}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @link5 (%tile21, {%tile20}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @link1 (%tile12, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link2 (%tile22, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link3 (%tile23, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link4 (%tile33, {%tile21}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @link5 (%tile21, {%tile20}, 2 : i32) : !aie.objectfifo> - %ext_buffer_in = AIE.external_buffer {sym_name = "ext_buffer_in"}: memref<512xi8> - AIE.objectfifo.register_external_buffers @link5 (%tile20, {%ext_buffer_in}) : (memref<512xi8>) + %ext_buffer_in = aie.external_buffer {sym_name = "ext_buffer_in"}: memref<512xi8> + aie.objectfifo.register_external_buffers @link5 (%tile20, {%ext_buffer_in}) : (memref<512xi8>) - AIE.objectfifo.link [@link1, @link2, @link3, @link4] -> [@link5] () + aie.objectfifo.link [@link1, @link2, @link3, @link4] -> [@link5] () } } diff --git a/test/objectFifo-stateful-transform/loop_test.aie.mlir b/test/objectFifo-stateful-transform/loop_test.aie.mlir index 3fd24a2e21..5776be595a 100644 --- a/test/objectFifo-stateful-transform/loop_test.aie.mlir +++ b/test/objectFifo-stateful-transform/loop_test.aie.mlir @@ -12,119 +12,119 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { +// CHECK-LABEL: aie.device(xcvc1902) { // CHECK: memref.global "public" @loop_of : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "loop_of_lock_0"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "loop_of_lock_1"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "loop_of_lock_2"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "loop_of_lock_3"} +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "loop_of_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "loop_of_lock_0"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "loop_of_lock_1"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "loop_of_lock_2"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "loop_of_lock_3"} // CHECK: func.func @some_work(%[[VAL_10:.*]]: memref<16xi32>, %[[VAL_11:.*]]: index) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_12:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_13:.*]] = arith.constant 0 : index // CHECK: %[[VAL_14:.*]] = arith.constant 1 : index // CHECK: %[[VAL_15:.*]] = arith.constant 2 : index // CHECK: %[[VAL_16:.*]] = arith.constant 4 : index // CHECK: %[[VAL_17:.*]] = arith.constant 21 : index -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_2]], %[[VAL_13]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) // CHECK: %[[VAL_18:.*]] = arith.constant 16 : index // CHECK: %[[VAL_19:.*]] = arith.constant 8 : index // CHECK: scf.for %[[VAL_20:.*]] = %[[VAL_14]] to %[[VAL_18]] step %[[VAL_19]] { -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_3]], %[[VAL_20]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) // CHECK: %[[VAL_21:.*]] = arith.constant 2 : index // CHECK: %[[VAL_22:.*]] = arith.addi %[[VAL_20]], %[[VAL_21]] : index // CHECK: func.call @some_work(%[[VAL_4]], %[[VAL_22]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) // CHECK: %[[VAL_23:.*]] = arith.constant 4 : index // CHECK: %[[VAL_24:.*]] = arith.addi %[[VAL_20]], %[[VAL_23]] : index // CHECK: func.call @some_work(%[[VAL_5]], %[[VAL_24]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) // CHECK: %[[VAL_25:.*]] = arith.constant 6 : index // CHECK: %[[VAL_26:.*]] = arith.addi %[[VAL_20]], %[[VAL_25]] : index // CHECK: func.call @some_work(%[[VAL_2]], %[[VAL_26]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) // CHECK: %[[VAL_27:.*]] = arith.constant 0 : index // CHECK: %[[VAL_28:.*]] = arith.addi %[[VAL_18]], %[[VAL_27]] : index // CHECK: func.call @some_work(%[[VAL_3]], %[[VAL_28]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) // CHECK: %[[VAL_29:.*]] = arith.constant 2 : index // CHECK: %[[VAL_30:.*]] = arith.addi %[[VAL_18]], %[[VAL_29]] : index // CHECK: func.call @some_work(%[[VAL_4]], %[[VAL_30]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) // CHECK: %[[VAL_31:.*]] = arith.constant 0 : index // CHECK: %[[VAL_32:.*]] = arith.addi %[[VAL_14]], %[[VAL_31]] : index // CHECK: func.call @some_work(%[[VAL_5]], %[[VAL_32]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) // CHECK: %[[VAL_33:.*]] = arith.constant 1 : index // CHECK: %[[VAL_34:.*]] = arith.addi %[[VAL_14]], %[[VAL_33]] : index // CHECK: func.call @some_work(%[[VAL_2]], %[[VAL_34]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) // CHECK: %[[VAL_35:.*]] = arith.constant 2 : index // CHECK: %[[VAL_36:.*]] = arith.addi %[[VAL_14]], %[[VAL_35]] : index // CHECK: func.call @some_work(%[[VAL_3]], %[[VAL_36]]) : (memref<16xi32>, index) -> () -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.end // CHECK: } // CHECK: } module @loop { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @loop_of (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @loop_of (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> func.func @some_work(%line_in:memref<16xi32>, %index:index) -> () { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c2 = arith.constant 2 : index %c4 = arith.constant 4 : index %c21 = arith.constant 21 : index - %subviewTop0 = AIE.objectfifo.acquire @loop_of (Produce, 1) : !AIE.objectfifosubview> - %elemTop0 = AIE.objectfifo.subview.access %subviewTop0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewTop0 = aie.objectfifo.acquire @loop_of (Produce, 1) : !aie.objectfifosubview> + %elemTop0 = aie.objectfifo.subview.access %subviewTop0[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elemTop0, %c0) : (memref<16xi32>,index) -> () - AIE.objectfifo.release @loop_of (Produce, 1) + aie.objectfifo.release @loop_of (Produce, 1) scf.for %indexInHeight = %c1 to %c21 step %c2 { - %subview = AIE.objectfifo.acquire @loop_of (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @loop_of (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0,%indexInHeight) : (memref<16xi32>,index) -> () - AIE.objectfifo.release @loop_of (Produce, 1) + aie.objectfifo.release @loop_of (Produce, 1) } scf.for %indexInHeight = %c1 to %c4 step %c1 { - %subview = AIE.objectfifo.acquire @loop_of (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @loop_of (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0,%indexInHeight) : (memref<16xi32>,index) -> () - AIE.objectfifo.release @loop_of (Produce, 1) + aie.objectfifo.release @loop_of (Produce, 1) } - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/matmul_test.mlir b/test/objectFifo-stateful-transform/matmul_test.mlir index 664cbb8dcd..292c438220 100644 --- a/test/objectFifo-stateful-transform/matmul_test.mlir +++ b/test/objectFifo-stateful-transform/matmul_test.mlir @@ -9,37 +9,37 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK: %[[VAL_0:.*]] = AIE.tile(0, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(0, 2) -// CHECK: %[[VAL_2:.*]] = AIE.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "outC_cons_prod_lock"} -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_0]], 5) {init = 0 : i32, sym_name = "outC_cons_cons_lock"} -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "outC_buff_0"} : memref<16x16xi16> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "outC_buff_1"} : memref<16x16xi16> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_1]], 4) {init = 2 : i32, sym_name = "outC_prod_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_1]], 5) {init = 0 : i32, sym_name = "outC_cons_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "inB_cons_buff_0"} : memref<8x16xi16> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "inB_cons_buff_1"} : memref<8x16xi16> -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_1]], 2) {init = 2 : i32, sym_name = "inB_cons_prod_lock"} -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_1]], 3) {init = 0 : i32, sym_name = "inB_cons_cons_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "inB_prod_lock"} -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "inB_cons_lock"} -// CHECK: %[[VAL_14:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "inA_cons_buff_0"} : memref<16x8xi16> -// CHECK: %[[VAL_15:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "inA_cons_buff_1"} : memref<16x8xi16> -// CHECK: %[[VAL_16:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "inA_cons_prod_lock"} -// CHECK: %[[VAL_17:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "inA_cons_cons_lock"} -// CHECK: %[[VAL_18:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "inA_prod_lock"} -// CHECK: %[[VAL_19:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "inA_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 1, %[[VAL_1]], DMA : 1) -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: %[[VAL_0:.*]] = aie.tile(0, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(0, 2) +// CHECK: %[[VAL_2:.*]] = aie.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "outC_cons_prod_lock"} +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_0]], 5) {init = 0 : i32, sym_name = "outC_cons_cons_lock"} +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "outC_buff_0"} : memref<16x16xi16> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "outC_buff_1"} : memref<16x16xi16> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_1]], 4) {init = 2 : i32, sym_name = "outC_prod_lock"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_1]], 5) {init = 0 : i32, sym_name = "outC_cons_lock"} +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "inB_cons_buff_0"} : memref<8x16xi16> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "inB_cons_buff_1"} : memref<8x16xi16> +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_1]], 2) {init = 2 : i32, sym_name = "inB_cons_prod_lock"} +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_1]], 3) {init = 0 : i32, sym_name = "inB_cons_cons_lock"} +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "inB_prod_lock"} +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "inB_cons_lock"} +// CHECK: %[[VAL_14:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "inA_cons_buff_0"} : memref<16x8xi16> +// CHECK: %[[VAL_15:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "inA_cons_buff_1"} : memref<16x8xi16> +// CHECK: %[[VAL_16:.*]] = aie.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "inA_cons_prod_lock"} +// CHECK: %[[VAL_17:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "inA_cons_cons_lock"} +// CHECK: %[[VAL_18:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "inA_prod_lock"} +// CHECK: %[[VAL_19:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "inA_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 1, %[[VAL_1]], DMA : 1) +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) // CHECK: func.func @zero_scalar_i16(%[[VAL_20:.*]]: memref<16x16xi16>) { // CHECK: return // CHECK: } // CHECK: func.func @matmul_scalar_i16_i16(%[[VAL_21:.*]]: memref<16x8xi16>, %[[VAL_22:.*]]: memref<8x16xi16>, %[[VAL_23:.*]]: memref<16x16xi16>) { // CHECK: return // CHECK: } -// CHECK: AIE.shim_dma_allocation @inA(MM2S, 0, 0) -// CHECK: %[[VAL_24:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: aie.shim_dma_allocation @inA(MM2S, 0, 0) +// CHECK: %[[VAL_24:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_25:.*]] = arith.constant 0 : index // CHECK: %[[VAL_26:.*]] = arith.constant 1 : index // CHECK: %[[VAL_27:.*]] = arith.constant 4 : index @@ -47,98 +47,98 @@ // CHECK: scf.for %[[VAL_29:.*]] = %[[VAL_25]] to %[[VAL_28]] step %[[VAL_26]] { // CHECK: %[[VAL_30:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_31:.*]] = %[[VAL_25]] to %[[VAL_27]] step %[[VAL_30]] { -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) // CHECK: func.call @zero_scalar_i16(%[[VAL_4]]) : (memref<16x16xi16>) -> () // CHECK: %[[VAL_32:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_33:.*]] = %[[VAL_25]] to %[[VAL_27]] step %[[VAL_32]] { -// CHECK: AIE.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) // CHECK: func.call @matmul_scalar_i16_i16(%[[VAL_14]], %[[VAL_8]], %[[VAL_4]]) : (memref<16x8xi16>, memref<8x16xi16>, memref<16x16xi16>) -> () -// CHECK: AIE.use_lock(%[[VAL_16]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_16]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) // CHECK: func.call @matmul_scalar_i16_i16(%[[VAL_15]], %[[VAL_9]], %[[VAL_4]]) : (memref<16x8xi16>, memref<8x16xi16>, memref<16x16xi16>) -> () -// CHECK: AIE.use_lock(%[[VAL_16]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_16]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) // CHECK: func.call @zero_scalar_i16(%[[VAL_5]]) : (memref<16x16xi16>) -> () // CHECK: %[[VAL_34:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_35:.*]] = %[[VAL_25]] to %[[VAL_27]] step %[[VAL_34]] { -// CHECK: AIE.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) // CHECK: func.call @matmul_scalar_i16_i16(%[[VAL_14]], %[[VAL_8]], %[[VAL_5]]) : (memref<16x8xi16>, memref<8x16xi16>, memref<16x16xi16>) -> () -// CHECK: AIE.use_lock(%[[VAL_16]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) -// CHECK: AIE.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_16]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_11]], AcquireGreaterEqual, 1) // CHECK: func.call @matmul_scalar_i16_i16(%[[VAL_15]], %[[VAL_9]], %[[VAL_5]]) : (memref<16x8xi16>, memref<8x16xi16>, memref<16x16xi16>) -> () -// CHECK: AIE.use_lock(%[[VAL_16]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_10]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_16]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_10]], Release, 1) // CHECK: } -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) // CHECK: } // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: AIE.shim_dma_allocation @inB(MM2S, 1, 0) -// CHECK: AIE.shim_dma_allocation @outC(S2MM, 0, 0) -// CHECK: %[[VAL_36:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_37:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: aie.shim_dma_allocation @inB(MM2S, 1, 0) +// CHECK: aie.shim_dma_allocation @outC(S2MM, 0, 0) +// CHECK: %[[VAL_36:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_37:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_16]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_14]] : memref<16x8xi16>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_17]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_16]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_14]] : memref<16x8xi16>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_17]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_16]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_15]] : memref<16x8xi16>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_17]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_16]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_15]] : memref<16x8xi16>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_17]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_38:.*]] = AIE.dma_start(S2MM, 1, ^bb4, ^bb6) +// CHECK: %[[VAL_38:.*]] = aie.dma_start(S2MM, 1, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<8x16xi16>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<8x16xi16>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<8x16xi16>, 0, 128) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<8x16xi16>, 0, 128) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: %[[VAL_39:.*]] = AIE.dma_start(MM2S, 0, ^bb7, ^bb9) +// CHECK: %[[VAL_39:.*]] = aie.dma_start(MM2S, 0, ^bb7, ^bb9) // CHECK: ^bb7: // 2 preds: ^bb6, ^bb8 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16x16xi16>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb8 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16x16xi16>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb8 // CHECK: ^bb8: // pred: ^bb7 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<16x16xi16>, 0, 256) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<16x16xi16>, 0, 256) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb9: // pred: ^bb6 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } module @matmul { - AIE.device(xcve2302) { + aie.device(xcve2302) { - %t00 = AIE.tile(0, 0) - %t02 = AIE.tile(0, 2) + %t00 = aie.tile(0, 0) + %t02 = aie.tile(0, 2) - AIE.objectfifo @inA (%t00, { %t02 }, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @inB (%t00, { %t02 }, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @outC (%t02, { %t00 }, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @inA (%t00, { %t02 }, 2 : i32) : !aie.objectfifo> + aie.objectfifo @inB (%t00, { %t02 }, 2 : i32) : !aie.objectfifo> + aie.objectfifo @outC (%t02, { %t00 }, 2 : i32) : !aie.objectfifo> func.func @zero_scalar_i16(%elem0 : memref<16x16xi16>) -> () { return } func.func @matmul_scalar_i16_i16(%elem0 : memref<16x8xi16>, %elem1 : memref<8x16xi16>, %elem2 : memref<16x16xi16>) -> () { return } - AIE.core(%t02) { + aie.core(%t02) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c4 = arith.constant 4 : index @@ -147,25 +147,25 @@ module @matmul { scf.for %reps = %c0 to %intmax step %c1 { scf.for %arg2 = %c0 to %c4 step %c1 { - %subview2 = AIE.objectfifo.acquire @outC (Produce, 1) : !AIE.objectfifosubview> - %elem2 = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref<16x16xi16> + %subview2 = aie.objectfifo.acquire @outC (Produce, 1) : !aie.objectfifosubview> + %elem2 = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref<16x16xi16> func.call @zero_scalar_i16(%elem2) : (memref<16x16xi16>) -> () scf.for %arg3 = %c0 to %c4 step %c1 { - %subview0 = AIE.objectfifo.acquire @inA (Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16x8xi16> - %subview1 = AIE.objectfifo.acquire @inB (Consume, 1) : !AIE.objectfifosubview> - %elem1 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<8x16xi16> + %subview0 = aie.objectfifo.acquire @inA (Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16x8xi16> + %subview1 = aie.objectfifo.acquire @inB (Consume, 1) : !aie.objectfifosubview> + %elem1 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<8x16xi16> func.call @matmul_scalar_i16_i16(%elem0, %elem1, %elem2) : (memref<16x8xi16>, memref<8x16xi16>, memref<16x16xi16>) -> () - AIE.objectfifo.release @inA (Consume, 1) - AIE.objectfifo.release @inB (Consume, 1) + aie.objectfifo.release @inA (Consume, 1) + aie.objectfifo.release @inB (Consume, 1) } - AIE.objectfifo.release @outC (Produce, 1) + aie.objectfifo.release @outC (Produce, 1) } } - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/memTile_test.mlir b/test/objectFifo-stateful-transform/memTile_test.mlir index 6fc9186e1f..285fc45baf 100644 --- a/test/objectFifo-stateful-transform/memTile_test.mlir +++ b/test/objectFifo-stateful-transform/memTile_test.mlir @@ -13,57 +13,57 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_cons : memref<16xi32> // CHECK: memref.global "public" @of : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "of_cons_prod_lock"} -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_cons_cons_lock"} -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 2 : i32, sym_name = "of_prod_lock"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: %[[VAL_10:.*]] = AIE.memtile_dma(%[[VAL_0]]) { -// CHECK: %[[VAL_11:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "of_cons_prod_lock"} +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_cons_cons_lock"} +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_0]], 0) {init = 2 : i32, sym_name = "of_prod_lock"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: %[[VAL_10:.*]] = aie.memtile_dma(%[[VAL_0]]) { +// CHECK: %[[VAL_11:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_13:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_12:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_13:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @memTile { - AIE.device(xcve2302) { - %tile11 = AIE.tile(2, 1) - %tile12 = AIE.tile(2, 2) + aie.device(xcve2302) { + %tile11 = aie.tile(2, 1) + %tile12 = aie.tile(2, 2) - AIE.objectfifo @of (%tile11, {%tile12}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile11, {%tile12}, 2 : i32) : !aie.objectfifo> } } diff --git a/test/objectFifo-stateful-transform/nd_dma_base_AIE2.mlir b/test/objectFifo-stateful-transform/nd_dma_base_AIE2.mlir index b1a5fa611a..88397e945b 100644 --- a/test/objectFifo-stateful-transform/nd_dma_base_AIE2.mlir +++ b/test/objectFifo-stateful-transform/nd_dma_base_AIE2.mlir @@ -14,129 +14,129 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @ndDMAObjFifoAIE2 { -// CHECK: AIE.device(xcve2302) { +// CHECK: aie.device(xcve2302) { // CHECK: memref.global "public" @of1_cons : memref<256xi32> // CHECK: memref.global "public" @of1 : memref<256xi32> // CHECK: memref.global "public" @of0_cons : memref<256xi32> // CHECK: memref.global "public" @of0 : memref<256xi32> -// CHECK: %[[tile_1_2:.*]] = AIE.tile(1, 2) -// CHECK: %[[tile_1_3:.*]] = AIE.tile(1, 3) -// CHECK: %[[tile_3_3:.*]] = AIE.tile(3, 3) -// CHECK: %[[of1_cons_buff_0:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_0"} : memref<256xi32> -// CHECK: %[[of1_cons_buff_1:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_1"} : memref<256xi32> -// CHECK: %[[of1_cons_prod_lock:.*]] = AIE.lock(%[[tile_3_3]], 0) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} -// CHECK: %[[of1_cons_cons_lock:.*]] = AIE.lock(%[[tile_3_3]], 1) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} -// CHECK: %[[of1_buff_0:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_0"} : memref<256xi32> -// CHECK: %[[of1_buff_1:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_1"} : memref<256xi32> -// CHECK: %[[of1_prod_lock:.*]] = AIE.lock(%[[tile_1_2]], 2) {init = 2 : i32, sym_name = "of1_prod_lock"} -// CHECK: %[[of1_cons_lock:.*]] = AIE.lock(%[[tile_1_2]], 3) {init = 0 : i32, sym_name = "of1_cons_lock"} -// CHECK: %[[of0_cons_buff_0:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_0"} : memref<256xi32> -// CHECK: %[[of0_cons_buff_1:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_1"} : memref<256xi32> -// CHECK: %[[of0_cons_buff_2:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_2"} : memref<256xi32> -// CHECK: %[[of0_cons_buff_3:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_3"} : memref<256xi32> -// CHECK: %[[of0_cons_prod_lock:.*]] = AIE.lock(%[[tile_1_3]], 0) {init = 4 : i32, sym_name = "of0_cons_prod_lock"} -// CHECK: %[[of0_cons_cons_lock:.*]] = AIE.lock(%[[tile_1_3]], 1) {init = 0 : i32, sym_name = "of0_cons_cons_lock"} -// CHECK: %[[of0_buff_0:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_0"} : memref<256xi32> -// CHECK: %[[of0_buff_1:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_1"} : memref<256xi32> -// CHECK: %[[of0_buff_2:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_2"} : memref<256xi32> -// CHECK: %[[of0_buff_3:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_3"} : memref<256xi32> -// CHECK: %[[of0_prod_lock:.*]] = AIE.lock(%[[tile_1_2]], 0) {init = 4 : i32, sym_name = "of0_prod_lock"} -// CHECK: %[[of0_cons_lock:.*]] = AIE.lock(%[[tile_1_2]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} -// CHECK: AIE.flow(%[[tile_1_2]], DMA : 0, %[[tile_1_3]], DMA : 0) -// CHECK: AIE.flow(%[[tile_1_2]], DMA : 1, %[[tile_3_3]], DMA : 0) -// CHECK: %[[VAL_23:.*]] = AIE.mem(%[[tile_1_2]]) { -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb5) +// CHECK: %[[tile_1_2:.*]] = aie.tile(1, 2) +// CHECK: %[[tile_1_3:.*]] = aie.tile(1, 3) +// CHECK: %[[tile_3_3:.*]] = aie.tile(3, 3) +// CHECK: %[[of1_cons_buff_0:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_0"} : memref<256xi32> +// CHECK: %[[of1_cons_buff_1:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_1"} : memref<256xi32> +// CHECK: %[[of1_cons_prod_lock:.*]] = aie.lock(%[[tile_3_3]], 0) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} +// CHECK: %[[of1_cons_cons_lock:.*]] = aie.lock(%[[tile_3_3]], 1) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} +// CHECK: %[[of1_buff_0:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_0"} : memref<256xi32> +// CHECK: %[[of1_buff_1:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_1"} : memref<256xi32> +// CHECK: %[[of1_prod_lock:.*]] = aie.lock(%[[tile_1_2]], 2) {init = 2 : i32, sym_name = "of1_prod_lock"} +// CHECK: %[[of1_cons_lock:.*]] = aie.lock(%[[tile_1_2]], 3) {init = 0 : i32, sym_name = "of1_cons_lock"} +// CHECK: %[[of0_cons_buff_0:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_0"} : memref<256xi32> +// CHECK: %[[of0_cons_buff_1:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_1"} : memref<256xi32> +// CHECK: %[[of0_cons_buff_2:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_2"} : memref<256xi32> +// CHECK: %[[of0_cons_buff_3:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_cons_buff_3"} : memref<256xi32> +// CHECK: %[[of0_cons_prod_lock:.*]] = aie.lock(%[[tile_1_3]], 0) {init = 4 : i32, sym_name = "of0_cons_prod_lock"} +// CHECK: %[[of0_cons_cons_lock:.*]] = aie.lock(%[[tile_1_3]], 1) {init = 0 : i32, sym_name = "of0_cons_cons_lock"} +// CHECK: %[[of0_buff_0:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_0"} : memref<256xi32> +// CHECK: %[[of0_buff_1:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_1"} : memref<256xi32> +// CHECK: %[[of0_buff_2:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_2"} : memref<256xi32> +// CHECK: %[[of0_buff_3:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_3"} : memref<256xi32> +// CHECK: %[[of0_prod_lock:.*]] = aie.lock(%[[tile_1_2]], 0) {init = 4 : i32, sym_name = "of0_prod_lock"} +// CHECK: %[[of0_cons_lock:.*]] = aie.lock(%[[tile_1_2]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} +// CHECK: aie.flow(%[[tile_1_2]], DMA : 0, %[[tile_1_3]], DMA : 0) +// CHECK: aie.flow(%[[tile_1_2]], DMA : 1, %[[tile_3_3]], DMA : 0) +// CHECK: %[[VAL_23:.*]] = aie.mem(%[[tile_1_2]]) { +// CHECK: %[[VAL_26:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_0]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_0]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_1]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_1]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_2]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_2]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_3]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_3]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: %[[VAL_27:.*]] = AIE.dma_start(MM2S, 1, ^bb6, ^bb8) +// CHECK: %[[VAL_27:.*]] = aie.dma_start(MM2S, 1, ^bb6, ^bb8) // CHECK: ^bb6: // 2 preds: ^bb5, ^bb7 -// CHECK: AIE.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_buff_0]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of1_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_buff_0]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of1_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb7: // pred: ^bb6 -// CHECK: AIE.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_buff_1]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of1_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_buff_1]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of1_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb8: // pred: ^bb5 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_24:.*]] = AIE.mem(%[[tile_1_3]]) { -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_24:.*]] = aie.mem(%[[tile_1_3]]) { +// CHECK: %[[VAL_26:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buff_0]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buff_0]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buff_1]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buff_1]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buff_2]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buff_2]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buff_3]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buff_3]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_25:.*]] = AIE.mem(%[[tile_3_3]]) { -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_25:.*]] = aie.mem(%[[tile_3_3]]) { +// CHECK: %[[VAL_26:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_cons_buff_0]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_cons_buff_0]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_cons_buff_1]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_cons_buff_1]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @ndDMAObjFifoAIE2 { - AIE.device(xcve2302) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2302) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile33 = aie.tile(3, 3) // Even if an objectFifo could be implemented in shared memory, as with // this case between two adjacent tiles, we need to use DMAs if a data // layout transformation with toStream and fromStream was specified. - AIE.objectfifo @of0 (%tile12 toStream [, , ], // transpose + aie.objectfifo @of0 (%tile12 toStream [, , ], // transpose {%tile13 fromStream []}, - 4 : i32) : !AIE.objectfifo> + 4 : i32) : !aie.objectfifo> - AIE.objectfifo @of1 (%tile12 toStream [], {%tile33}, - 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of1 (%tile12 toStream [], {%tile33}, + 2 : i32) : !aie.objectfifo> } } diff --git a/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2.mlir b/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2.mlir index 6440d81e84..101922d4d7 100644 --- a/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2.mlir +++ b/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2.mlir @@ -11,129 +11,129 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s // CHECK: module @ndDMAObjFifoAIE2 { -// CHECK: AIE.device(xcve2302) { +// CHECK: aie.device(xcve2302) { // CHECK: memref.global "public" @of2_cons : memref<128xi32> // CHECK: memref.global "public" @of2 : memref<128xi32> // CHECK: memref.global "public" @of1_cons : memref<128xi32> // CHECK: memref.global "public" @of1 : memref<128xi32> // CHECK: memref.global "public" @of0_cons : memref<256xi32> // CHECK: memref.global "public" @of0 : memref<256xi32> -// CHECK: %[[tile_1_0:.*]] = AIE.tile(1, 0) -// CHECK: %[[tile_1_1:.*]] = AIE.tile(1, 1) -// CHECK: %[[tile_2_2:.*]] = AIE.tile(2, 2) -// CHECK: %[[tile_2_3:.*]] = AIE.tile(2, 3) -// CHECK: %[[of2_cons_buf_0:.*]] = AIE.buffer(%[[tile_2_3:.*]]) {sym_name = "of2_cons_buff_0"} : memref<128xi32> -// CHECK: %[[of2_cons_buf_1:.*]] = AIE.buffer(%[[tile_2_3:.*]]) {sym_name = "of2_cons_buff_1"} : memref<128xi32> -// CHECK: %[[of2_cons_prod_lock:.*]] = AIE.lock(%[[tile_2_3:.*]], 0) {init = 2 : i32, sym_name = "of2_cons_prod_lock"} -// CHECK: %[[of2_cons_cons_lock:.*]] = AIE.lock(%[[tile_2_3:.*]], 1) {init = 0 : i32, sym_name = "of2_cons_cons_lock"} -// CHECK: %[[of1_cons_buf_0:.*]] = AIE.buffer(%[[tile_2_2:.*]]) {sym_name = "of1_cons_buff_0"} : memref<128xi32> -// CHECK: %[[of1_cons_buf_1:.*]] = AIE.buffer(%[[tile_2_2:.*]]) {sym_name = "of1_cons_buff_1"} : memref<128xi32> -// CHECK: %[[of1_cons_prod_lock:.*]] = AIE.lock(%[[tile_2_2:.*]], 0) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} -// CHECK: %[[of1_cons_cons_lock:.*]] = AIE.lock(%[[tile_2_2:.*]], 1) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} -// CHECK: %[[of0_cons_buf_0:.*]] = AIE.buffer(%[[tile_1_1:.*]]) {sym_name = "of0_cons_buff_0"} : memref<256xi32> -// CHECK: %[[of0_cons_buf_1:.*]] = AIE.buffer(%[[tile_1_1:.*]]) {sym_name = "of0_cons_buff_1"} : memref<256xi32> -// CHECK: %[[of0_cons_prod_lock:.*]] = AIE.lock(%[[tile_1_1:.*]], 0) {init = 4 : i32, sym_name = "of0_cons_prod_lock"} -// CHECK: %[[of0_cons_cons_lock:.*]] = AIE.lock(%[[tile_1_1:.*]], 1) {init = 0 : i32, sym_name = "of0_cons_cons_lock"} -// CHECK: %[[of0_prod_lock:.*]] = AIE.lock(%[[tile_1_0:.*]], 0) {init = 0 : i32, sym_name = "of0_prod_lock"} -// CHECK: %[[of0_cons_lock:.*]] = AIE.lock(%[[tile_1_0:.*]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} -// CHECK: AIE.flow(%[[tile_1_0:.*]], DMA : 0, %[[tile_1_1:.*]], DMA : 0) -// CHECK: AIE.flow(%[[tile_1_1:.*]], DMA : 0, %[[tile_2_2:.*]], DMA : 0) -// CHECK: AIE.flow(%[[tile_1_1:.*]], DMA : 1, %[[tile_2_3:.*]], DMA : 0) -// CHECK: AIE.shim_dma_allocation @of0(MM2S, 0, 1) -// CHECK: %18 = AIE.memtile_dma(%[[tile_1_1:.*]]) { -// CHECK: %21 = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[tile_1_0:.*]] = aie.tile(1, 0) +// CHECK: %[[tile_1_1:.*]] = aie.tile(1, 1) +// CHECK: %[[tile_2_2:.*]] = aie.tile(2, 2) +// CHECK: %[[tile_2_3:.*]] = aie.tile(2, 3) +// CHECK: %[[of2_cons_buf_0:.*]] = aie.buffer(%[[tile_2_3:.*]]) {sym_name = "of2_cons_buff_0"} : memref<128xi32> +// CHECK: %[[of2_cons_buf_1:.*]] = aie.buffer(%[[tile_2_3:.*]]) {sym_name = "of2_cons_buff_1"} : memref<128xi32> +// CHECK: %[[of2_cons_prod_lock:.*]] = aie.lock(%[[tile_2_3:.*]], 0) {init = 2 : i32, sym_name = "of2_cons_prod_lock"} +// CHECK: %[[of2_cons_cons_lock:.*]] = aie.lock(%[[tile_2_3:.*]], 1) {init = 0 : i32, sym_name = "of2_cons_cons_lock"} +// CHECK: %[[of1_cons_buf_0:.*]] = aie.buffer(%[[tile_2_2:.*]]) {sym_name = "of1_cons_buff_0"} : memref<128xi32> +// CHECK: %[[of1_cons_buf_1:.*]] = aie.buffer(%[[tile_2_2:.*]]) {sym_name = "of1_cons_buff_1"} : memref<128xi32> +// CHECK: %[[of1_cons_prod_lock:.*]] = aie.lock(%[[tile_2_2:.*]], 0) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} +// CHECK: %[[of1_cons_cons_lock:.*]] = aie.lock(%[[tile_2_2:.*]], 1) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} +// CHECK: %[[of0_cons_buf_0:.*]] = aie.buffer(%[[tile_1_1:.*]]) {sym_name = "of0_cons_buff_0"} : memref<256xi32> +// CHECK: %[[of0_cons_buf_1:.*]] = aie.buffer(%[[tile_1_1:.*]]) {sym_name = "of0_cons_buff_1"} : memref<256xi32> +// CHECK: %[[of0_cons_prod_lock:.*]] = aie.lock(%[[tile_1_1:.*]], 0) {init = 4 : i32, sym_name = "of0_cons_prod_lock"} +// CHECK: %[[of0_cons_cons_lock:.*]] = aie.lock(%[[tile_1_1:.*]], 1) {init = 0 : i32, sym_name = "of0_cons_cons_lock"} +// CHECK: %[[of0_prod_lock:.*]] = aie.lock(%[[tile_1_0:.*]], 0) {init = 0 : i32, sym_name = "of0_prod_lock"} +// CHECK: %[[of0_cons_lock:.*]] = aie.lock(%[[tile_1_0:.*]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} +// CHECK: aie.flow(%[[tile_1_0:.*]], DMA : 0, %[[tile_1_1:.*]], DMA : 0) +// CHECK: aie.flow(%[[tile_1_1:.*]], DMA : 0, %[[tile_2_2:.*]], DMA : 0) +// CHECK: aie.flow(%[[tile_1_1:.*]], DMA : 1, %[[tile_2_3:.*]], DMA : 0) +// CHECK: aie.shim_dma_allocation @of0(MM2S, 0, 1) +// CHECK: %18 = aie.memtile_dma(%[[tile_1_1:.*]]) { +// CHECK: %21 = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock:.*]], AcquireGreaterEqual, 2) -// CHECK: AIE.dma_bd(%[[of0_cons_buf_0:.*]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock:.*]], Release, 2) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of0_cons_prod_lock:.*]], AcquireGreaterEqual, 2) +// CHECK: aie.dma_bd(%[[of0_cons_buf_0:.*]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of0_cons_cons_lock:.*]], Release, 2) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock:.*]], AcquireGreaterEqual, 2) -// CHECK: AIE.dma_bd(%[[of0_cons_buf_1:.*]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock:.*]], Release, 2) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of0_cons_prod_lock:.*]], AcquireGreaterEqual, 2) +// CHECK: aie.dma_bd(%[[of0_cons_buf_1:.*]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of0_cons_cons_lock:.*]], Release, 2) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %22 = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %22 = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buf_0:.*]] : memref<256xi32>, 0, 128, [, , , ]) -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buf_0:.*]] : memref<256xi32>, 0, 128, [, , , ]) +// CHECK: aie.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buf_1:.*]] : memref<256xi32>, 0, 128, [, , , ]) -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buf_1:.*]] : memref<256xi32>, 0, 128, [, , , ]) +// CHECK: aie.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: %23 = AIE.dma_start(MM2S, 1, ^bb7, ^bb9) +// CHECK: %23 = aie.dma_start(MM2S, 1, ^bb7, ^bb9) // CHECK: ^bb7: // 2 preds: ^bb6, ^bb8 -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buf_0:.*]] : memref<256xi32>, 512, 128, [, , , ]) -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb8 +// CHECK: aie.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buf_0:.*]] : memref<256xi32>, 512, 128, [, , , ]) +// CHECK: aie.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb8 // CHECK: ^bb8: // pred: ^bb7 -// CHECK: AIE.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_cons_buf_1:.*]] : memref<256xi32>, 512, 128, [, , , ]) -// CHECK: AIE.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[of0_cons_cons_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_cons_buf_1:.*]] : memref<256xi32>, 512, 128, [, , , ]) +// CHECK: aie.use_lock(%[[of0_cons_prod_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb9: // pred: ^bb6 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %19 = AIE.mem(%[[tile_2_2:.*]]) { -// CHECK: %21 = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %19 = aie.mem(%[[tile_2_2:.*]]) { +// CHECK: %21 = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[of1_cons_prod_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_cons_buf_0:.*]] : memref<128xi32>, 0, 128) -// CHECK: AIE.use_lock(%[[of1_cons_cons_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of1_cons_prod_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_cons_buf_0:.*]] : memref<128xi32>, 0, 128) +// CHECK: aie.use_lock(%[[of1_cons_cons_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of1_cons_prod_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_cons_buf_1:.*]] : memref<128xi32>, 0, 128) -// CHECK: AIE.use_lock(%[[of1_cons_cons_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of1_cons_prod_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_cons_buf_1:.*]] : memref<128xi32>, 0, 128) +// CHECK: aie.use_lock(%[[of1_cons_cons_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %20 = AIE.mem(%[[tile_2_3:.*]]) { -// CHECK: %21 = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %20 = aie.mem(%[[tile_2_3:.*]]) { +// CHECK: %21 = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[of2_cons_prod_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of2_cons_buf_0:.*]] : memref<128xi32>, 0, 128) -// CHECK: AIE.use_lock(%[[of2_cons_cons_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of2_cons_prod_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of2_cons_buf_0:.*]] : memref<128xi32>, 0, 128) +// CHECK: aie.use_lock(%[[of2_cons_cons_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of2_cons_prod_lock:.*]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of2_cons_buf_1:.*]] : memref<128xi32>, 0, 128) -// CHECK: AIE.use_lock(%[[of2_cons_cons_lock:.*]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of2_cons_prod_lock:.*]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of2_cons_buf_1:.*]] : memref<128xi32>, 0, 128) +// CHECK: aie.use_lock(%[[of2_cons_cons_lock:.*]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } module @ndDMAObjFifoAIE2 { - AIE.device(xcve2302) { - %tile10 = AIE.tile(1, 0) - %tile11 = AIE.tile(1, 1) - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2302) { + %tile10 = aie.tile(1, 0) + %tile11 = aie.tile(1, 1) + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) - AIE.objectfifo @of0 (%tile10, {%tile11}, - 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of0 (%tile10, {%tile11}, + 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of1 (%tile11 toStream [, + aie.objectfifo @of1 (%tile11 toStream [, , , ], - {%tile22}, 2 : i32) : !AIE.objectfifo> + {%tile22}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of2 (%tile11 toStream [, + aie.objectfifo @of2 (%tile11 toStream [, , , ], - {%tile23}, 2 : i32) : !AIE.objectfifo> - // expected-error@+1 {{'AIE.objectfifo.link' op currently does not support objectFifos with dimensionsFromStreamPerConsumer.}} - AIE.objectfifo.link [ @of0 ] -> [ @of1, @of2 ] () + {%tile23}, 2 : i32) : !aie.objectfifo> + // expected-error@+1 {{'aie.objectfifo.link' op currently does not support objectFifos with dimensionsFromStreamPerConsumer.}} + aie.objectfifo.link [ @of0 ] -> [ @of1, @of2 ] () } } diff --git a/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2_bad.mlir b/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2_bad.mlir index 6e5a2a3b2e..16dda6cef1 100644 --- a/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2_bad.mlir +++ b/test/objectFifo-stateful-transform/nd_dma_distribute_AIE2_bad.mlir @@ -11,28 +11,28 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform --verify-diagnostics %s module @ndDMAObjFifoAIE2 { - AIE.device(xcve2302) { - %tile10 = AIE.tile(1, 0) - %tile11 = AIE.tile(1, 1) - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2302) { + %tile10 = aie.tile(1, 0) + %tile11 = aie.tile(1, 1) + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) - AIE.objectfifo @of0 (%tile10, {%tile11 fromStream [, + aie.objectfifo @of0 (%tile10, {%tile11 fromStream [, ]}, - 2 : i32) : !AIE.objectfifo> + 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of1 (%tile11 toStream [, + aie.objectfifo @of1 (%tile11 toStream [, , , ], - {%tile22}, 2 : i32) : !AIE.objectfifo> + {%tile22}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of2 (%tile11 toStream [, + aie.objectfifo @of2 (%tile11 toStream [, , , ], - {%tile23}, 2 : i32) : !AIE.objectfifo> - // expected-error@+1 {{'AIE.objectfifo.link' op currently does not support objectFifos with dimensionsFromStreamPerConsumer.}} - AIE.objectfifo.link [ @of0 ] -> [ @of1, @of2 ] () + {%tile23}, 2 : i32) : !aie.objectfifo> + // expected-error@+1 {{'aie.objectfifo.link' op currently does not support objectFifos with dimensionsFromStreamPerConsumer.}} + aie.objectfifo.link [ @of0 ] -> [ @of1, @of2 ] () } } diff --git a/test/objectFifo-stateful-transform/nd_dma_distribute_broadcast_AIE2_bad.mlir b/test/objectFifo-stateful-transform/nd_dma_distribute_broadcast_AIE2_bad.mlir index 8b262dc8da..17db0b617c 100644 --- a/test/objectFifo-stateful-transform/nd_dma_distribute_broadcast_AIE2_bad.mlir +++ b/test/objectFifo-stateful-transform/nd_dma_distribute_broadcast_AIE2_bad.mlir @@ -11,29 +11,29 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform --verify-diagnostics %s module @ndDMAObjFifoAIE2 { - AIE.device(xcve2302) { - %tile10 = AIE.tile(1, 0) - %tile11 = AIE.tile(1, 1) - %tile12 = AIE.tile(1, 2) - %tile22 = AIE.tile(2, 2) - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2302) { + %tile10 = aie.tile(1, 0) + %tile11 = aie.tile(1, 1) + %tile12 = aie.tile(1, 2) + %tile22 = aie.tile(2, 2) + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) - AIE.objectfifo @of0 (%tile10, {%tile11}, - 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of0 (%tile10, {%tile11}, + 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of1 (%tile11 toStream [, + aie.objectfifo @of1 (%tile11 toStream [, , , ], - {%tile12, %tile22}, 2 : i32) : !AIE.objectfifo> + {%tile12, %tile22}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of2 (%tile11 toStream [, + aie.objectfifo @of2 (%tile11 toStream [, , , ], - {%tile13, %tile23}, 2 : i32) : !AIE.objectfifo> - // expected-error@+1 {{'AIE.objectfifo.link' op currently does not support objectFifos with dimensionsToStream and multiple consumers.}} - AIE.objectfifo.link [ @of0 ] -> [ @of1, @of2 ] () + {%tile13, %tile23}, 2 : i32) : !aie.objectfifo> + // expected-error@+1 {{'aie.objectfifo.link' op currently does not support objectFifos with dimensionsToStream and multiple consumers.}} + aie.objectfifo.link [ @of0 ] -> [ @of1, @of2 ] () } } diff --git a/test/objectFifo-stateful-transform/nd_dma_multiple_consumers_AIE2.mlir b/test/objectFifo-stateful-transform/nd_dma_multiple_consumers_AIE2.mlir index 1e96e95360..de6f98d9c3 100644 --- a/test/objectFifo-stateful-transform/nd_dma_multiple_consumers_AIE2.mlir +++ b/test/objectFifo-stateful-transform/nd_dma_multiple_consumers_AIE2.mlir @@ -14,199 +14,199 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s // CHECK: module @ndDMAObjFifoAIE2 { -// CHECK: AIE.device(xcve2302) { -// CHECK: %[[tile_1_2:.*]] = AIE.tile(1, 2) -// CHECK: %[[tile_1_3:.*]] = AIE.tile(1, 3) -// CHECK: %[[tile_3_3:.*]] = AIE.tile(3, 3) -// CHECK: %[[tile_2_2:.*]] = AIE.tile(2, 2) -// CHECK: %[[tile_2_3:.*]] = AIE.tile(2, 3) -// CHECK: %[[of3_cons_buff_0:.*]] = AIE.buffer(%[[tile_2_3]]) {sym_name = "of3_cons_buff_0"} : memref<256xi32> -// CHECK: %[[of3_cons_buff_1:.*]] = AIE.buffer(%[[tile_2_3]]) {sym_name = "of3_cons_buff_1"} : memref<256xi32> -// CHECK: %[[of3_cons_prod_lock:.*]] = AIE.lock(%[[tile_2_3]], 0) {init = 2 : i32, sym_name = "of3_cons_prod_lock"} -// CHECK: %[[of3_cons_cons_lock:.*]] = AIE.lock(%[[tile_2_3]], 1) {init = 0 : i32, sym_name = "of3_cons_cons_lock"} -// CHECK: %[[of3_buff_0:.*]] = AIE.buffer(%[[tile_2_2]]) {sym_name = "of3_buff_0"} : memref<256xi32> -// CHECK: %[[of3_buff_1:.*]] = AIE.buffer(%[[tile_2_2]]) {sym_name = "of3_buff_1"} : memref<256xi32> -// CHECK: %[[of3_prod_lock:.*]] = AIE.lock(%[[tile_2_2]], 0) {init = 2 : i32, sym_name = "of3_prod_lock"} -// CHECK: %[[of3_cons_lock:.*]] = AIE.lock(%[[tile_2_2]], 1) {init = 0 : i32, sym_name = "of3_cons_lock"} -// CHECK: %[[of1_cons_buff_0:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_0"} : memref<256xi32> -// CHECK: %[[of1_cons_buff_1:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_1"} : memref<256xi32> -// CHECK: %[[of1_cons_prod_lock:.*]] = AIE.lock(%[[tile_3_3]], 2) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} -// CHECK: %[[of1_cons_cons_lock:.*]] = AIE.lock(%[[tile_3_3]], 3) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} -// CHECK: %[[of1_buff_0:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_0"} : memref<256xi32> -// CHECK: %[[of1_buff_1:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_1"} : memref<256xi32> -// CHECK: %[[of1_prod_lock:.*]] = AIE.lock(%[[tile_1_2]], 2) {init = 2 : i32, sym_name = "of1_prod_lock"} -// CHECK: %[[of1_cons_lock:.*]] = AIE.lock(%[[tile_1_2]], 3) {init = 0 : i32, sym_name = "of1_cons_lock"} -// CHECK: %[[of0_0_cons_buff_0:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_0"} : memref<256xi32> -// CHECK: %[[of0_0_cons_buff_1:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_1"} : memref<256xi32> -// CHECK: %[[of0_0_cons_buff_2:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_2"} : memref<256xi32> -// CHECK: %[[of0_0_cons_buff_3:.*]] = AIE.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_3"} : memref<256xi32> -// CHECK: %[[of0_0_cons_prod_lock:.*]] = AIE.lock(%[[tile_1_3]], 0) {init = 4 : i32, sym_name = "of0_0_cons_prod_lock"} -// CHECK: %[[of0_0_cons_cons_lock:.*]] = AIE.lock(%[[tile_1_3]], 1) {init = 0 : i32, sym_name = "of0_0_cons_cons_lock"} -// CHECK: %[[of0_1_cons_buff_0:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_0"} : memref<256xi32> -// CHECK: %[[of0_1_cons_buff_1:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_1"} : memref<256xi32> -// CHECK: %[[of0_1_cons_buff_2:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_2"} : memref<256xi32> -// CHECK: %[[of0_1_cons_buff_3:.*]] = AIE.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_3"} : memref<256xi32> -// CHECK: %[[of0_1_cons_prod_lock:.*]] = AIE.lock(%[[tile_3_3]], 0) {init = 4 : i32, sym_name = "of0_1_cons_prod_lock"} -// CHECK: %[[of0_1_cons_cons_lock:.*]] = AIE.lock(%[[tile_3_3]], 1) {init = 0 : i32, sym_name = "of0_1_cons_cons_lock"} -// CHECK: %[[of0_buff_0:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_0"} : memref<256xi32> -// CHECK: %[[of0_buff_1:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_1"} : memref<256xi32> -// CHECK: %[[of0_buff_2:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_2"} : memref<256xi32> -// CHECK: %[[of0_buff_3:.*]] = AIE.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_3"} : memref<256xi32> -// CHECK: %[[of0_prod_lock:.*]] = AIE.lock(%[[tile_1_2]], 0) {init = 4 : i32, sym_name = "of0_prod_lock"} -// CHECK: %[[of0_cons_lock:.*]] = AIE.lock(%[[tile_1_2]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} -// CHECK: AIE.flow(%[[tile_1_2]], DMA : 0, %[[tile_3_3]], DMA : 0) -// CHECK: AIE.flow(%[[tile_1_2]], DMA : 0, %[[tile_1_3]], DMA : 0) -// CHECK: AIE.flow(%[[tile_1_2]], DMA : 1, %[[tile_3_3]], DMA : 1) -// CHECK: AIE.flow(%[[tile_2_2]], DMA : 0, %[[tile_2_3]], DMA : 0) -// CHECK: %[[VAL_39:.*]] = AIE.mem(%[[tile_1_2]]) { -// CHECK: %[[VAL_44:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb5) +// CHECK: aie.device(xcve2302) { +// CHECK: %[[tile_1_2:.*]] = aie.tile(1, 2) +// CHECK: %[[tile_1_3:.*]] = aie.tile(1, 3) +// CHECK: %[[tile_3_3:.*]] = aie.tile(3, 3) +// CHECK: %[[tile_2_2:.*]] = aie.tile(2, 2) +// CHECK: %[[tile_2_3:.*]] = aie.tile(2, 3) +// CHECK: %[[of3_cons_buff_0:.*]] = aie.buffer(%[[tile_2_3]]) {sym_name = "of3_cons_buff_0"} : memref<256xi32> +// CHECK: %[[of3_cons_buff_1:.*]] = aie.buffer(%[[tile_2_3]]) {sym_name = "of3_cons_buff_1"} : memref<256xi32> +// CHECK: %[[of3_cons_prod_lock:.*]] = aie.lock(%[[tile_2_3]], 0) {init = 2 : i32, sym_name = "of3_cons_prod_lock"} +// CHECK: %[[of3_cons_cons_lock:.*]] = aie.lock(%[[tile_2_3]], 1) {init = 0 : i32, sym_name = "of3_cons_cons_lock"} +// CHECK: %[[of3_buff_0:.*]] = aie.buffer(%[[tile_2_2]]) {sym_name = "of3_buff_0"} : memref<256xi32> +// CHECK: %[[of3_buff_1:.*]] = aie.buffer(%[[tile_2_2]]) {sym_name = "of3_buff_1"} : memref<256xi32> +// CHECK: %[[of3_prod_lock:.*]] = aie.lock(%[[tile_2_2]], 0) {init = 2 : i32, sym_name = "of3_prod_lock"} +// CHECK: %[[of3_cons_lock:.*]] = aie.lock(%[[tile_2_2]], 1) {init = 0 : i32, sym_name = "of3_cons_lock"} +// CHECK: %[[of1_cons_buff_0:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_0"} : memref<256xi32> +// CHECK: %[[of1_cons_buff_1:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of1_cons_buff_1"} : memref<256xi32> +// CHECK: %[[of1_cons_prod_lock:.*]] = aie.lock(%[[tile_3_3]], 2) {init = 2 : i32, sym_name = "of1_cons_prod_lock"} +// CHECK: %[[of1_cons_cons_lock:.*]] = aie.lock(%[[tile_3_3]], 3) {init = 0 : i32, sym_name = "of1_cons_cons_lock"} +// CHECK: %[[of1_buff_0:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_0"} : memref<256xi32> +// CHECK: %[[of1_buff_1:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of1_buff_1"} : memref<256xi32> +// CHECK: %[[of1_prod_lock:.*]] = aie.lock(%[[tile_1_2]], 2) {init = 2 : i32, sym_name = "of1_prod_lock"} +// CHECK: %[[of1_cons_lock:.*]] = aie.lock(%[[tile_1_2]], 3) {init = 0 : i32, sym_name = "of1_cons_lock"} +// CHECK: %[[of0_0_cons_buff_0:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_0"} : memref<256xi32> +// CHECK: %[[of0_0_cons_buff_1:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_1"} : memref<256xi32> +// CHECK: %[[of0_0_cons_buff_2:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_2"} : memref<256xi32> +// CHECK: %[[of0_0_cons_buff_3:.*]] = aie.buffer(%[[tile_1_3]]) {sym_name = "of0_0_cons_buff_3"} : memref<256xi32> +// CHECK: %[[of0_0_cons_prod_lock:.*]] = aie.lock(%[[tile_1_3]], 0) {init = 4 : i32, sym_name = "of0_0_cons_prod_lock"} +// CHECK: %[[of0_0_cons_cons_lock:.*]] = aie.lock(%[[tile_1_3]], 1) {init = 0 : i32, sym_name = "of0_0_cons_cons_lock"} +// CHECK: %[[of0_1_cons_buff_0:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_0"} : memref<256xi32> +// CHECK: %[[of0_1_cons_buff_1:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_1"} : memref<256xi32> +// CHECK: %[[of0_1_cons_buff_2:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_2"} : memref<256xi32> +// CHECK: %[[of0_1_cons_buff_3:.*]] = aie.buffer(%[[tile_3_3]]) {sym_name = "of0_1_cons_buff_3"} : memref<256xi32> +// CHECK: %[[of0_1_cons_prod_lock:.*]] = aie.lock(%[[tile_3_3]], 0) {init = 4 : i32, sym_name = "of0_1_cons_prod_lock"} +// CHECK: %[[of0_1_cons_cons_lock:.*]] = aie.lock(%[[tile_3_3]], 1) {init = 0 : i32, sym_name = "of0_1_cons_cons_lock"} +// CHECK: %[[of0_buff_0:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_0"} : memref<256xi32> +// CHECK: %[[of0_buff_1:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_1"} : memref<256xi32> +// CHECK: %[[of0_buff_2:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_2"} : memref<256xi32> +// CHECK: %[[of0_buff_3:.*]] = aie.buffer(%[[tile_1_2]]) {sym_name = "of0_buff_3"} : memref<256xi32> +// CHECK: %[[of0_prod_lock:.*]] = aie.lock(%[[tile_1_2]], 0) {init = 4 : i32, sym_name = "of0_prod_lock"} +// CHECK: %[[of0_cons_lock:.*]] = aie.lock(%[[tile_1_2]], 1) {init = 0 : i32, sym_name = "of0_cons_lock"} +// CHECK: aie.flow(%[[tile_1_2]], DMA : 0, %[[tile_3_3]], DMA : 0) +// CHECK: aie.flow(%[[tile_1_2]], DMA : 0, %[[tile_1_3]], DMA : 0) +// CHECK: aie.flow(%[[tile_1_2]], DMA : 1, %[[tile_3_3]], DMA : 1) +// CHECK: aie.flow(%[[tile_2_2]], DMA : 0, %[[tile_2_3]], DMA : 0) +// CHECK: %[[VAL_39:.*]] = aie.mem(%[[tile_1_2]]) { +// CHECK: %[[VAL_44:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_0]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_0]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_1]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_1]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_2]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_2]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_buff_3]] : memref<256xi32>, 0, 256, [, , ]) -// CHECK: AIE.use_lock(%[[of0_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of0_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_buff_3]] : memref<256xi32>, 0, 256, [, , ]) +// CHECK: aie.use_lock(%[[of0_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: %[[VAL_45:.*]] = AIE.dma_start(MM2S, 1, ^bb6, ^bb8) +// CHECK: %[[VAL_45:.*]] = aie.dma_start(MM2S, 1, ^bb6, ^bb8) // CHECK: ^bb6: // 2 preds: ^bb5, ^bb7 -// CHECK: AIE.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_buff_0]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of1_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_buff_0]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of1_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb7: // pred: ^bb6 -// CHECK: AIE.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_buff_1]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of1_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[of1_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_buff_1]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of1_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb8: // pred: ^bb5 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_40:.*]] = AIE.mem(%[[tile_1_3]]) { -// CHECK: %[[VAL_44:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_40:.*]] = aie.mem(%[[tile_1_3]]) { +// CHECK: %[[VAL_44:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_0_cons_buff_0]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_0_cons_buff_0]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_0_cons_buff_1]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_0_cons_buff_1]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_0_cons_buff_2]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_0_cons_buff_2]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_0_cons_buff_3]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of0_0_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_0_cons_buff_3]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_0_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_41:.*]] = AIE.mem(%[[tile_3_3]]) { -// CHECK: %[[VAL_44:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_41:.*]] = aie.mem(%[[tile_3_3]]) { +// CHECK: %[[VAL_44:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_1_cons_buff_0]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_1_cons_buff_0]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_1_cons_buff_1]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_1_cons_buff_1]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_1_cons_buff_2]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_1_cons_buff_2]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of0_1_cons_buff_3]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of0_1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of0_1_cons_buff_3]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of0_1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: %[[VAL_45:.*]] = AIE.dma_start(S2MM, 1, ^bb6, ^bb8) +// CHECK: %[[VAL_45:.*]] = aie.dma_start(S2MM, 1, ^bb6, ^bb8) // CHECK: ^bb6: // 2 preds: ^bb5, ^bb7 -// CHECK: AIE.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_cons_buff_0]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_cons_buff_0]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb7: // pred: ^bb6 -// CHECK: AIE.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of1_cons_buff_1]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of1_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[of1_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of1_cons_buff_1]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of1_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb8: // pred: ^bb5 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_42:.*]] = AIE.mem(%[[tile_2_2]]) { -// CHECK: %[[VAL_44:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_42:.*]] = aie.mem(%[[tile_2_2]]) { +// CHECK: %[[VAL_44:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[of3_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of3_buff_0]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of3_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of3_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of3_buff_0]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of3_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of3_cons_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of3_buff_1]] : memref<256xi32>, 0, 256) -// CHECK: AIE.use_lock(%[[of3_prod_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of3_cons_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of3_buff_1]] : memref<256xi32>, 0, 256) +// CHECK: aie.use_lock(%[[of3_prod_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_43:.*]] = AIE.mem(%[[tile_2_3]]) { -// CHECK: %[[VAL_44:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_43:.*]] = aie.mem(%[[tile_2_3]]) { +// CHECK: %[[VAL_44:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[of3_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of3_cons_buff_0]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of3_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[of3_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of3_cons_buff_0]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of3_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[of3_cons_prod_lock]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[of3_cons_buff_1]] : memref<256xi32>, 0, 256, []) -// CHECK: AIE.use_lock(%[[of3_cons_cons_lock]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[of3_cons_prod_lock]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[of3_cons_buff_1]] : memref<256xi32>, 0, 256, []) +// CHECK: aie.use_lock(%[[of3_cons_cons_lock]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } // CHECK: } module @ndDMAObjFifoAIE2 { - AIE.device(xcve2302) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile33 = AIE.tile(3, 3) - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2302) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile33 = aie.tile(3, 3) + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) - AIE.objectfifo @of0 (%tile12 toStream [, , ], // transpose + aie.objectfifo @of0 (%tile12 toStream [, , ], // transpose {%tile13 fromStream [], %tile33 fromStream []}, - 4 : i32) : !AIE.objectfifo> + 4 : i32) : !aie.objectfifo> - AIE.objectfifo @of1 (%tile12 toStream [], {%tile33}, - 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of1 (%tile12 toStream [], {%tile33}, + 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of3 (%tile22, {%tile23 fromStream []}, - 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of3 (%tile22, {%tile23 fromStream []}, + 2 : i32) : !aie.objectfifo> } } diff --git a/test/objectFifo-stateful-transform/non_adjacency_test_1.mlir b/test/objectFifo-stateful-transform/non_adjacency_test_1.mlir index c16d0460f5..cec4b4d461 100644 --- a/test/objectFifo-stateful-transform/non_adjacency_test_1.mlir +++ b/test/objectFifo-stateful-transform/non_adjacency_test_1.mlir @@ -12,124 +12,124 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { +// CHECK-LABEL: aie.device(xcvc1902) { // CHECK: memref.global "public" @objfifo_cons : memref<16xi32> // CHECK: memref.global "public" @objfifo : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_lock_1"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_lock_1"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) // CHECK: func.func @some_work(%[[VAL_10:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_11:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_11:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_12:.*]] = arith.constant 0 : index // CHECK: %[[VAL_13:.*]] = arith.constant 1 : index // CHECK: %[[VAL_14:.*]] = arith.constant 12 : index // CHECK: %[[VAL_15:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_16:.*]] = %[[VAL_12]] to %[[VAL_14]] step %[[VAL_15]] { -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_6]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_7]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_18:.*]] = arith.constant 0 : index // CHECK: %[[VAL_19:.*]] = arith.constant 1 : index // CHECK: %[[VAL_20:.*]] = arith.constant 12 : index // CHECK: %[[VAL_21:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_22:.*]] = %[[VAL_18]] to %[[VAL_20]] step %[[VAL_21]] { -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_24:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_23:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_24:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_25:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_25:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_26:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @non_adjacency { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> func.func @some_work(%lineOut : memref<16xi32>) -> () { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @objfifo (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @objfifo (Produce, 1) + aie.objectfifo.release @objfifo (Produce, 1) } - AIE.end + aie.end } - %core33 = AIE.core(%tile33) { + %core33 = aie.core(%tile33) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @objfifo (Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @objfifo (Consume, 1) + aie.objectfifo.release @objfifo (Consume, 1) } - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/non_adjacency_test_2.mlir b/test/objectFifo-stateful-transform/non_adjacency_test_2.mlir index 9768573664..0ea8e204bb 100644 --- a/test/objectFifo-stateful-transform/non_adjacency_test_2.mlir +++ b/test/objectFifo-stateful-transform/non_adjacency_test_2.mlir @@ -12,148 +12,148 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { +// CHECK-LABEL: aie.device(xcvc1902) { // CHECK: memref.global "public" @objfifo_cons : memref<16xi32> // CHECK: memref.global "public" @objfifo : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_1]], 2) {init = 0 : i32, sym_name = "objfifo_cons_lock_2"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_1]], 3) {init = 0 : i32, sym_name = "objfifo_cons_lock_3"} -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_11:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_lock_1"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_1]], 2) {init = 0 : i32, sym_name = "objfifo_cons_lock_2"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_1]], 3) {init = 0 : i32, sym_name = "objfifo_cons_lock_3"} +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_11:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_lock_1"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) // CHECK: func.func @some_work(%[[VAL_14:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_15:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_15:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_16:.*]] = arith.constant 0 : index // CHECK: %[[VAL_17:.*]] = arith.constant 1 : index // CHECK: %[[VAL_18:.*]] = arith.constant 12 : index // CHECK: %[[VAL_19:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_20:.*]] = %[[VAL_16]] to %[[VAL_18]] step %[[VAL_19]] { -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_10]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_11]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_21:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_21:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_22:.*]] = arith.constant 0 : index // CHECK: %[[VAL_23:.*]] = arith.constant 1 : index // CHECK: %[[VAL_24:.*]] = arith.constant 12 : index // CHECK: %[[VAL_25:.*]] = arith.constant 4 : index // CHECK: scf.for %[[VAL_26:.*]] = %[[VAL_22]] to %[[VAL_24]] step %[[VAL_25]] { -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_4]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_5]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 0) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_28:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_27:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_28:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_11]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_11]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_29:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_30:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb5) +// CHECK: %[[VAL_29:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_30:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb5) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb4 -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb4: // pred: ^bb3 -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb5: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @non_adjacency { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> func.func @some_work(%lineOut : memref<16xi32>) -> () { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @objfifo (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @objfifo (Produce, 1) + aie.objectfifo.release @objfifo (Produce, 1) } - AIE.end + aie.end } - %core33 = AIE.core(%tile33) { + %core33 = aie.core(%tile33) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @objfifo (Consume, 3) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> - %elem2 = AIE.objectfifo.subview.access %subview[2] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Consume, 3) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> + %elem2 = aie.objectfifo.subview.access %subview[2] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @objfifo (Consume, 1) + aie.objectfifo.release @objfifo (Consume, 1) } - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/non_adjacency_test_AIE2.mlir b/test/objectFifo-stateful-transform/non_adjacency_test_AIE2.mlir index f5f79f4cda..d27177511e 100644 --- a/test/objectFifo-stateful-transform/non_adjacency_test_AIE2.mlir +++ b/test/objectFifo-stateful-transform/non_adjacency_test_AIE2.mlir @@ -13,124 +13,124 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_cons : memref<16xi32> // CHECK: memref.global "public" @of : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "of_cons_prod_lock"} -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_cons_cons_lock"} -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 2 : i32, sym_name = "of_prod_lock"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "of_cons_prod_lock"} +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_cons_cons_lock"} +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_0]], 0) {init = 2 : i32, sym_name = "of_prod_lock"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) // CHECK: func.func @some_work(%[[VAL_10:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_11:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_11:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_12:.*]] = arith.constant 0 : index // CHECK: %[[VAL_13:.*]] = arith.constant 1 : index // CHECK: %[[VAL_14:.*]] = arith.constant 12 : index // CHECK: %[[VAL_15:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_16:.*]] = %[[VAL_12]] to %[[VAL_14]] step %[[VAL_15]] { -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) // CHECK: func.call @some_work(%[[VAL_6]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_8]], AcquireGreaterEqual, 1) // CHECK: func.call @some_work(%[[VAL_7]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_1]]) { +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_1]]) { // CHECK: %[[VAL_18:.*]] = arith.constant 0 : index // CHECK: %[[VAL_19:.*]] = arith.constant 1 : index // CHECK: %[[VAL_20:.*]] = arith.constant 12 : index // CHECK: %[[VAL_21:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_22:.*]] = %[[VAL_18]] to %[[VAL_20]] step %[[VAL_21]] { -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_24:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_23:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_24:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_9]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_25:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_25:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_26:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_4]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @non_adjacency_AIE2 { - AIE.device(xcve2302) { - %tile12 = AIE.tile(1, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2302) { + %tile12 = aie.tile(1, 2) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @of (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> func.func @some_work(%lineOut : memref<16xi32>) -> () { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @of (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @of (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Produce, 1) + aie.objectfifo.release @of (Produce, 1) } - AIE.end + aie.end } - %core33 = AIE.core(%tile33) { + %core33 = aie.core(%tile33) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Consume, 1) + aie.objectfifo.release @of (Consume, 1) } - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/register_external_buffers_test.mlir b/test/objectFifo-stateful-transform/register_external_buffers_test.mlir index 6c80413f6a..dd57f1c5f0 100644 --- a/test/objectFifo-stateful-transform/register_external_buffers_test.mlir +++ b/test/objectFifo-stateful-transform/register_external_buffers_test.mlir @@ -13,92 +13,92 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { +// CHECK-LABEL: aie.device(xcvc1902) { // CHECK: memref.global "public" @ext_of_cons : memref<16xi32> // CHECK: memref.global "public" @ext_of : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "ext_of_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "ext_of_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "ext_of_cons_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "ext_of_cons_lock_0"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "ext_of_cons_lock_1"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "ext_of_cons_lock_2"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "ext_of_lock_0"} -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) -// CHECK: %[[VAL_9:.*]] = AIE.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> +// CHECK: %[[VAL_0:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "ext_of_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "ext_of_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "ext_of_cons_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "ext_of_cons_lock_0"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "ext_of_cons_lock_1"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "ext_of_cons_lock_2"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "ext_of_lock_0"} +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: %[[VAL_9:.*]] = aie.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> // CHECK: func.func @some_work(%[[VAL_10:.*]]: memref<16xi32>, %[[VAL_11:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_12:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_13:.*]] = arith.constant 0 : index // CHECK: %[[VAL_14:.*]] = arith.constant 1 : index // CHECK: %[[VAL_15:.*]] = arith.constant 12 : index -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_2]], %[[VAL_3]]) : (memref<16xi32>, memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.shim_dma_allocation @ext_of(MM2S, 0, 7) -// CHECK: %[[VAL_16:.*]] = AIE.shim_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_17:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: aie.shim_dma_allocation @ext_of(MM2S, 0, 7) +// CHECK: %[[VAL_16:.*]] = aie.shim_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_17:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<64xi32>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<64xi32>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_19:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_18:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_19:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb3 -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb4: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @register_external_buffers { - AIE.device(xcvc1902) { - %tile71 = AIE.tile(7, 1) - %tile70 = AIE.tile(7, 0) + aie.device(xcvc1902) { + %tile71 = aie.tile(7, 1) + %tile70 = aie.tile(7, 0) - AIE.objectfifo @ext_of (%tile70, {%tile71}, 3 : i32) : !AIE.objectfifo> + aie.objectfifo @ext_of (%tile70, {%tile71}, 3 : i32) : !aie.objectfifo> - %ext_buffer_in = AIE.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> - AIE.objectfifo.register_external_buffers @ext_of (%tile70, {%ext_buffer_in}) : (memref<64xi32>) + %ext_buffer_in = aie.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> + aie.objectfifo.register_external_buffers @ext_of (%tile70, {%ext_buffer_in}) : (memref<64xi32>) func.func @some_work(%a : memref<16xi32>, %b : memref<16xi32>) -> () { return } - %core71 = AIE.core(%tile71) { + %core71 = aie.core(%tile71) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index - %subview = AIE.objectfifo.acquire @ext_of (Consume, 2) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @ext_of (Consume, 2) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0, %elem1) : (memref<16xi32>, memref<16xi32>) -> () - AIE.objectfifo.release @ext_of (Consume, 1) + aie.objectfifo.release @ext_of (Consume, 1) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/same_core_producer_consumer_test.mlir b/test/objectFifo-stateful-transform/same_core_producer_consumer_test.mlir index 95c9e90492..c85cb7ca86 100644 --- a/test/objectFifo-stateful-transform/same_core_producer_consumer_test.mlir +++ b/test/objectFifo-stateful-transform/same_core_producer_consumer_test.mlir @@ -12,69 +12,69 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { +// CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 3 : i32, sym_name = "of_prod_lock"} -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_cons_lock"} +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_0]], 0) {init = 3 : i32, sym_name = "of_prod_lock"} +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_cons_lock"} // CHECK: func.func @some_work(%[[VAL_6:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_7:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_4]], AcquireGreaterEqual, 2) +// CHECK: %[[VAL_7:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_4]], AcquireGreaterEqual, 2) // CHECK: func.call @some_work(%[[VAL_1]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) // CHECK: func.call @some_work(%[[VAL_1]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_5]], AcquireGreaterEqual, 1) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.end // CHECK: } // CHECK: } module @same_core { - AIE.device(xcve2302) { - %tile12 = AIE.tile(1, 2) + aie.device(xcve2302) { + %tile12 = aie.tile(1, 2) - AIE.objectfifo @of (%tile12, {%tile12}, 3 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile12, {%tile12}, 3 : i32) : !aie.objectfifo> func.func @some_work(%line_in:memref<16xi32>) -> () { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { // this acquires 2 elements - %subview0 = AIE.objectfifo.acquire @of (Produce, 2) : !AIE.objectfifosubview> - %elem00 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem01 = AIE.objectfifo.subview.access %subview0[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview0 = aie.objectfifo.acquire @of (Produce, 2) : !aie.objectfifosubview> + %elem00 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem01 = aie.objectfifo.subview.access %subview0[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem00) : (memref<16xi32>) -> () func.call @some_work(%elem01) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Produce, 1) + aie.objectfifo.release @of (Produce, 1) - %subview1 = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %elem10 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview1 = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %elem10 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem10) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Consume, 1) + aie.objectfifo.release @of (Consume, 1) - %subview2 = AIE.objectfifo.acquire @of (Produce, 1) : !AIE.objectfifosubview> - %elem20 = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview2 = aie.objectfifo.acquire @of (Produce, 1) : !aie.objectfifosubview> + %elem20 = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem20) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Produce, 1) + aie.objectfifo.release @of (Produce, 1) - %subview3 = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %elem30 = AIE.objectfifo.subview.access %subview3[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview3 = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %elem30 = aie.objectfifo.subview.access %subview3[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem30) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Consume, 1) + aie.objectfifo.release @of (Consume, 1) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/shimRow_mem_test.mlir b/test/objectFifo-stateful-transform/shimRow_mem_test.mlir index b3024337da..8a9c1e1c32 100644 --- a/test/objectFifo-stateful-transform/shimRow_mem_test.mlir +++ b/test/objectFifo-stateful-transform/shimRow_mem_test.mlir @@ -13,90 +13,90 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(7, 1) -// CHECK: %[[VAL_1:.*]] = AIE.tile(7, 0) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_cons_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "objfifo_cons_lock_2"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) -// CHECK: %[[VAL_9:.*]] = AIE.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(7, 1) +// CHECK: %[[VAL_1:.*]] = aie.tile(7, 0) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_cons_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "objfifo_cons_lock_2"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: %[[VAL_9:.*]] = aie.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> // CHECK: func.func @some_work(%[[VAL_10:.*]]: memref<16xi32>, %[[VAL_11:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_12:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_12:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_13:.*]] = arith.constant 0 : index // CHECK: %[[VAL_14:.*]] = arith.constant 1 : index // CHECK: %[[VAL_15:.*]] = arith.constant 12 : index -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_2]], %[[VAL_3]]) : (memref<16xi32>, memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: AIE.shim_dma_allocation @objfifo(MM2S, 0, 7) -// CHECK: %[[VAL_16:.*]] = AIE.shim_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_17:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK: aie.shim_dma_allocation @objfifo(MM2S, 0, 7) +// CHECK: %[[VAL_16:.*]] = aie.shim_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_17:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<64xi32>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<64xi32>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_19:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb4) +// CHECK: %[[VAL_18:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_19:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb4) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb3 -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb3: // pred: ^bb2 -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb4: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @shimRow_mem { - AIE.device(xcvc1902) { - %tile71 = AIE.tile(7, 1) - %tile70 = AIE.tile(7, 0) + aie.device(xcvc1902) { + %tile71 = aie.tile(7, 1) + %tile70 = aie.tile(7, 0) - AIE.objectfifo @objfifo (%tile70, {%tile71}, 3 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile70, {%tile71}, 3 : i32) : !aie.objectfifo> - %ext_buffer_in = AIE.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> - AIE.objectfifo.register_external_buffers @objfifo (%tile70, {%ext_buffer_in}) : (memref<64xi32>) + %ext_buffer_in = aie.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> + aie.objectfifo.register_external_buffers @objfifo (%tile70, {%ext_buffer_in}) : (memref<64xi32>) func.func @some_work(%a : memref<16xi32>, %b : memref<16xi32>) -> () { return } - %core71 = AIE.core(%tile71) { + %core71 = aie.core(%tile71) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index - %subview = AIE.objectfifo.acquire @objfifo (Consume, 2) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Consume, 2) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0, %elem1) : (memref<16xi32>, memref<16xi32>) -> () - AIE.objectfifo.release @objfifo (Consume, 1) + aie.objectfifo.release @objfifo (Consume, 1) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/shim_AIE2_test.mlir b/test/objectFifo-stateful-transform/shim_AIE2_test.mlir index 310264fac4..5ea7bbe720 100644 --- a/test/objectFifo-stateful-transform/shim_AIE2_test.mlir +++ b/test/objectFifo-stateful-transform/shim_AIE2_test.mlir @@ -12,84 +12,84 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_2:.*]] = AIE.lock(%[[VAL_1]], 2) {init = 1 : i32, sym_name = "of_out_cons_prod_lock"} -// CHECK: %[[VAL_3:.*]] = AIE.lock(%[[VAL_1]], 3) {init = 0 : i32, sym_name = "of_out_cons_cons_lock"} -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_out_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_out_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 2 : i32, sym_name = "of_out_prod_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of_out_cons_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_in_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_in_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 2 : i32, sym_name = "of_in_cons_prod_lock"} -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_in_cons_cons_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 1 : i32, sym_name = "of_in_prod_lock"} -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_in_cons_lock"} -// CHECK: AIE.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: %[[VAL_14:.*]] = AIE.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> -// CHECK: %[[VAL_15:.*]] = AIE.external_buffer {sym_name = "ext_buffer_out"} : memref<64xi32> -// CHECK: AIE.shim_dma_allocation @of_in(MM2S, 0, 2) -// CHECK: %[[VAL_16:.*]] = AIE.shim_dma(%[[VAL_1]]) { -// CHECK: %[[VAL_17:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK-LABEL: aie.device(xcve2302) { +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_2:.*]] = aie.lock(%[[VAL_1]], 2) {init = 1 : i32, sym_name = "of_out_cons_prod_lock"} +// CHECK: %[[VAL_3:.*]] = aie.lock(%[[VAL_1]], 3) {init = 0 : i32, sym_name = "of_out_cons_cons_lock"} +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_out_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_out_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 2) {init = 2 : i32, sym_name = "of_out_prod_lock"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of_out_cons_lock"} +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_in_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_in_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_0]], 0) {init = 2 : i32, sym_name = "of_in_cons_prod_lock"} +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_in_cons_cons_lock"} +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_1]], 0) {init = 1 : i32, sym_name = "of_in_prod_lock"} +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_in_cons_lock"} +// CHECK: aie.flow(%[[VAL_1]], DMA : 0, %[[VAL_0]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: %[[VAL_14:.*]] = aie.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> +// CHECK: %[[VAL_15:.*]] = aie.external_buffer {sym_name = "ext_buffer_out"} : memref<64xi32> +// CHECK: aie.shim_dma_allocation @of_in(MM2S, 0, 2) +// CHECK: %[[VAL_16:.*]] = aie.shim_dma(%[[VAL_1]]) { +// CHECK: %[[VAL_17:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_13]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_14]] : memref<64xi32>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_13]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_14]] : memref<64xi32>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: %[[VAL_18:.*]] = AIE.dma_start(S2MM, 0, ^bb3, ^bb4) +// CHECK: %[[VAL_18:.*]] = aie.dma_start(S2MM, 0, ^bb3, ^bb4) // CHECK: ^bb3: // 2 preds: ^bb2, ^bb3 -// CHECK: AIE.use_lock(%[[VAL_2]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_15]] : memref<64xi32>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_3]], Release, 1) -// CHECK: AIE.next_bd ^bb3 +// CHECK: aie.use_lock(%[[VAL_2]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_15]] : memref<64xi32>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_3]], Release, 1) +// CHECK: aie.next_bd ^bb3 // CHECK: ^bb4: // pred: ^bb2 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: AIE.shim_dma_allocation @of_out(S2MM, 0, 2) -// CHECK: %[[VAL_19:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_20:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: aie.shim_dma_allocation @of_out(S2MM, 0, 2) +// CHECK: %[[VAL_19:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_20:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_21:.*]] = AIE.dma_start(MM2S, 0, ^bb4, ^bb6) +// CHECK: %[[VAL_21:.*]] = aie.dma_start(MM2S, 0, ^bb4, ^bb6) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb5 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb5 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb5 // CHECK: ^bb5: // pred: ^bb4 -// CHECK: AIE.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_7]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb6: // pred: ^bb3 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @shim_AIE2 { - AIE.device(xcve2302) { - %tile22 = AIE.tile(2, 2) - %tile20 = AIE.tile(2, 0) + aie.device(xcve2302) { + %tile22 = aie.tile(2, 2) + %tile20 = aie.tile(2, 0) - AIE.objectfifo @of_in (%tile20, {%tile22}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out (%tile22, {%tile20}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile20, {%tile22}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_out (%tile22, {%tile20}, 2 : i32) : !aie.objectfifo> - %ext_buffer_in = AIE.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> - %ext_buffer_out = AIE.external_buffer {sym_name = "ext_buffer_out"}: memref<64xi32> - AIE.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in}) : (memref<64xi32>) - AIE.objectfifo.register_external_buffers @of_out (%tile20, {%ext_buffer_out}) : (memref<64xi32>) + %ext_buffer_in = aie.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> + %ext_buffer_out = aie.external_buffer {sym_name = "ext_buffer_out"}: memref<64xi32> + aie.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in}) : (memref<64xi32>) + aie.objectfifo.register_external_buffers @of_out (%tile20, {%ext_buffer_out}) : (memref<64xi32>) } } diff --git a/test/objectFifo-stateful-transform/shim_broadcast_test.mlir b/test/objectFifo-stateful-transform/shim_broadcast_test.mlir index 23a5c791e9..a1382f0c2c 100644 --- a/test/objectFifo-stateful-transform/shim_broadcast_test.mlir +++ b/test/objectFifo-stateful-transform/shim_broadcast_test.mlir @@ -12,97 +12,97 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcve2302) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(2, 0) -// CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -// CHECK: %[[VAL_2:.*]] = AIE.tile(2, 3) -// CHECK: %[[VAL_3:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of_in_0_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of_in_0_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "of_in_0_cons_prod_lock"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_in_0_cons_cons_lock"} -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of_in_1_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_2]]) {sym_name = "of_in_1_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_10:.*]] = AIE.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "of_in_1_cons_prod_lock"} -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of_in_1_cons_cons_lock"} -// CHECK: %[[VAL_12:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "of_in_2_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_13:.*]] = AIE.buffer(%[[VAL_3]]) {sym_name = "of_in_2_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_14:.*]] = AIE.lock(%[[VAL_3]], 0) {init = 2 : i32, sym_name = "of_in_2_cons_prod_lock"} -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "of_in_2_cons_cons_lock"} -// CHECK: %[[VAL_16:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "of_in_prod_lock"} -// CHECK: %[[VAL_17:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_in_cons_lock"} -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_3]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) -// CHECK: %[[VAL_18:.*]] = AIE.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> -// CHECK: AIE.shim_dma_allocation @of_in(MM2S, 0, 2) -// CHECK: %[[VAL_19:.*]] = AIE.shim_dma(%[[VAL_0]]) { -// CHECK: %[[VAL_20:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) +// CHECK-LABEL: aie.device(xcve2302) { +// CHECK: %[[VAL_0:.*]] = aie.tile(2, 0) +// CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +// CHECK: %[[VAL_2:.*]] = aie.tile(2, 3) +// CHECK: %[[VAL_3:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of_in_0_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of_in_0_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_1]], 0) {init = 2 : i32, sym_name = "of_in_0_cons_prod_lock"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of_in_0_cons_cons_lock"} +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of_in_1_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_2]]) {sym_name = "of_in_1_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.lock(%[[VAL_2]], 0) {init = 2 : i32, sym_name = "of_in_1_cons_prod_lock"} +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_2]], 1) {init = 0 : i32, sym_name = "of_in_1_cons_cons_lock"} +// CHECK: %[[VAL_12:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "of_in_2_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_13:.*]] = aie.buffer(%[[VAL_3]]) {sym_name = "of_in_2_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_14:.*]] = aie.lock(%[[VAL_3]], 0) {init = 2 : i32, sym_name = "of_in_2_cons_prod_lock"} +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_3]], 1) {init = 0 : i32, sym_name = "of_in_2_cons_cons_lock"} +// CHECK: %[[VAL_16:.*]] = aie.lock(%[[VAL_0]], 0) {init = 1 : i32, sym_name = "of_in_prod_lock"} +// CHECK: %[[VAL_17:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_in_cons_lock"} +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_3]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_2]], DMA : 0) +// CHECK: aie.flow(%[[VAL_0]], DMA : 0, %[[VAL_1]], DMA : 0) +// CHECK: %[[VAL_18:.*]] = aie.external_buffer {sym_name = "ext_buffer_in"} : memref<64xi32> +// CHECK: aie.shim_dma_allocation @of_in(MM2S, 0, 2) +// CHECK: %[[VAL_19:.*]] = aie.shim_dma(%[[VAL_0]]) { +// CHECK: %[[VAL_20:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb2) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb1 -// CHECK: AIE.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_18]] : memref<64xi32>, 0, 64) -// CHECK: AIE.use_lock(%[[VAL_16]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_17]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_18]] : memref<64xi32>, 0, 64) +// CHECK: aie.use_lock(%[[VAL_16]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb2: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_21:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_22:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_21:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_22:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_4]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_6]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_5]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.mem(%[[VAL_2]]) { -// CHECK: %[[VAL_24:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_23:.*]] = aie.mem(%[[VAL_2]]) { +// CHECK: %[[VAL_24:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_8]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_10]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_9]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_25:.*]] = AIE.mem(%[[VAL_3]]) { -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_25:.*]] = aie.mem(%[[VAL_3]]) { +// CHECK: %[[VAL_26:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) -// CHECK: AIE.dma_bd(%[[VAL_13]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_14]], AcquireGreaterEqual, 1) +// CHECK: aie.dma_bd(%[[VAL_13]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @shim_broadcast { - AIE.device(xcve2302) { - %tile20 = AIE.tile(2, 0) - %tile22 = AIE.tile(2, 2) - %tile23 = AIE.tile(2, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2302) { + %tile20 = aie.tile(2, 0) + %tile22 = aie.tile(2, 2) + %tile23 = aie.tile(2, 3) + %tile33 = aie.tile(3, 3) - AIE.objectfifo @of_in (%tile20, {%tile22, %tile23, %tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile20, {%tile22, %tile23, %tile33}, 2 : i32) : !aie.objectfifo> - %ext_buffer_in = AIE.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> - AIE.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in}) : (memref<64xi32>) + %ext_buffer_in = aie.external_buffer {sym_name = "ext_buffer_in"}: memref<64xi32> + aie.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in}) : (memref<64xi32>) } } diff --git a/test/objectFifo-stateful-transform/subview_test_1.mlir b/test/objectFifo-stateful-transform/subview_test_1.mlir index 966f398eca..31e46cfbd7 100644 --- a/test/objectFifo-stateful-transform/subview_test_1.mlir +++ b/test/objectFifo-stateful-transform/subview_test_1.mlir @@ -12,86 +12,86 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_lock_1"} -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "objfifo_lock_2"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "objfifo_lock_3"} +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "objfifo_lock_0"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "objfifo_lock_1"} +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "objfifo_lock_2"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "objfifo_lock_3"} // CHECK: func.func @some_work(%[[VAL_10:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_11:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: %[[VAL_11:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_4]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_4]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_5]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_4]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_5]]) : (memref<16xi32>) -> () -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @singleFifo { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> func.func @some_work(%line_in:memref<16xi32>) -> () { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { // this acquires 2 elements - %subview0 = AIE.objectfifo.acquire @objfifo (Produce, 2) : !AIE.objectfifosubview> - %elem00 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem01 = AIE.objectfifo.subview.access %subview0[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview0 = aie.objectfifo.acquire @objfifo (Produce, 2) : !aie.objectfifosubview> + %elem00 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem01 = aie.objectfifo.subview.access %subview0[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem00) : (memref<16xi32>) -> () func.call @some_work(%elem01) : (memref<16xi32>) -> () // this should only acquire one new element, previous two are still acquired - %subview1 = AIE.objectfifo.acquire @objfifo (Produce, 3) : !AIE.objectfifosubview> - %elem10 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem11 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref<16xi32> - %elem12 = AIE.objectfifo.subview.access %subview1[2] : !AIE.objectfifosubview> -> memref<16xi32> + %subview1 = aie.objectfifo.acquire @objfifo (Produce, 3) : !aie.objectfifosubview> + %elem10 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem11 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref<16xi32> + %elem12 = aie.objectfifo.subview.access %subview1[2] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem10) : (memref<16xi32>) -> () func.call @some_work(%elem11) : (memref<16xi32>) -> () func.call @some_work(%elem12) : (memref<16xi32>) -> () // one new acquire should take place - AIE.objectfifo.release @objfifo (Produce, 1) - AIE.objectfifo.release @objfifo (Produce, 1) - %subview2 = AIE.objectfifo.acquire @objfifo (Produce, 2) : !AIE.objectfifosubview> - %elem20 = AIE.objectfifo.subview.access %subview2[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem21 = AIE.objectfifo.subview.access %subview2[1] : !AIE.objectfifosubview> -> memref<16xi32> + aie.objectfifo.release @objfifo (Produce, 1) + aie.objectfifo.release @objfifo (Produce, 1) + %subview2 = aie.objectfifo.acquire @objfifo (Produce, 2) : !aie.objectfifosubview> + %elem20 = aie.objectfifo.subview.access %subview2[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem21 = aie.objectfifo.subview.access %subview2[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem20) : (memref<16xi32>) -> () func.call @some_work(%elem21) : (memref<16xi32>) -> () // no new acquires should take place, elem30 should be third element of objFifo (with index 2) - %subview3 = AIE.objectfifo.acquire @objfifo (Produce, 2) : !AIE.objectfifosubview> - %elem30 = AIE.objectfifo.subview.access %subview3[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem31 = AIE.objectfifo.subview.access %subview3[1] : !AIE.objectfifosubview> -> memref<16xi32> - //%elem32 = AIE.subview.access %subview3[2] : !AIE.subview> -> memref<16xi32> // expected to fail if this line is uncommented + %subview3 = aie.objectfifo.acquire @objfifo (Produce, 2) : !aie.objectfifosubview> + %elem30 = aie.objectfifo.subview.access %subview3[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem31 = aie.objectfifo.subview.access %subview3[1] : !aie.objectfifosubview> -> memref<16xi32> + //%elem32 = aie.subview.access %subview3[2] : !aie.subview> -> memref<16xi32> // expected to fail if this line is uncommented func.call @some_work(%elem30) : (memref<16xi32>) -> () func.call @some_work(%elem31) : (memref<16xi32>) -> () - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/subview_test_2.mlir b/test/objectFifo-stateful-transform/subview_test_2.mlir index 1423097ba2..c0003f5e90 100644 --- a/test/objectFifo-stateful-transform/subview_test_2.mlir +++ b/test/objectFifo-stateful-transform/subview_test_2.mlir @@ -12,137 +12,137 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { +// CHECK-LABEL: aie.device(xcvc1902) { // CHECK: memref.global "public" @of2 : memref<16xi32> // CHECK: memref.global "public" @of : memref<16xi32> -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of2_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of2_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of2_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "of2_lock_0"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_0]], 5) {init = 0 : i32, sym_name = "of2_lock_1"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_0]], 6) {init = 0 : i32, sym_name = "of2_lock_2"} -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_11:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of_lock_0"} -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_lock_1"} -// CHECK: %[[VAL_14:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "of_lock_2"} -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of_lock_3"} +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of2_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of2_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of2_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "of2_lock_0"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_0]], 5) {init = 0 : i32, sym_name = "of2_lock_1"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_0]], 6) {init = 0 : i32, sym_name = "of2_lock_2"} +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_11:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of_lock_0"} +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_lock_1"} +// CHECK: %[[VAL_14:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "of_lock_2"} +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of_lock_3"} // CHECK: func.func @some_work(%[[VAL_16:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 0) +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_8]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_14]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_15]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_15]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_10]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_11]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_4]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_1]]) { -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 1) +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_1]]) { +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_8]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_14]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_10]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 0) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_13]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 0) +// CHECK: aie.end // CHECK: } // CHECK: } module @multiFifo { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @of (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> - AIE.objectfifo @of2 (%tile12, {%tile13}, 3 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> + aie.objectfifo @of2 (%tile12, {%tile13}, 3 : i32) : !aie.objectfifo> func.func @some_work(%line_in:memref<16xi32>) -> () { return } - %core12 = AIE.core(%tile12) { - %subview0 = AIE.objectfifo.acquire @of (Produce, 2) : !AIE.objectfifosubview> - %elem00 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem01 = AIE.objectfifo.subview.access %subview0[1] : !AIE.objectfifosubview> -> memref<16xi32> + %core12 = aie.core(%tile12) { + %subview0 = aie.objectfifo.acquire @of (Produce, 2) : !aie.objectfifosubview> + %elem00 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem01 = aie.objectfifo.subview.access %subview0[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem00) : (memref<16xi32>) -> () func.call @some_work(%elem01) : (memref<16xi32>) -> () - %subview02 = AIE.objectfifo.acquire @of2 (Produce, 1) : !AIE.objectfifosubview> - %elem002 = AIE.objectfifo.subview.access %subview02[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview02 = aie.objectfifo.acquire @of2 (Produce, 1) : !aie.objectfifosubview> + %elem002 = aie.objectfifo.subview.access %subview02[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem002) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Produce, 1) - %subview1 = AIE.objectfifo.acquire @of (Produce, 3) : !AIE.objectfifosubview> - %elem10 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem11 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref<16xi32> - %elem12 = AIE.objectfifo.subview.access %subview1[2] : !AIE.objectfifosubview> -> memref<16xi32> + aie.objectfifo.release @of (Produce, 1) + %subview1 = aie.objectfifo.acquire @of (Produce, 3) : !aie.objectfifosubview> + %elem10 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem11 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref<16xi32> + %elem12 = aie.objectfifo.subview.access %subview1[2] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem10) : (memref<16xi32>) -> () func.call @some_work(%elem11) : (memref<16xi32>) -> () func.call @some_work(%elem12) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Produce, 3) + aie.objectfifo.release @of (Produce, 3) - AIE.objectfifo.release @of2 (Produce, 1) - %subview12 = AIE.objectfifo.acquire @of2 (Produce, 2) : !AIE.objectfifosubview> - %elem102 = AIE.objectfifo.subview.access %subview12[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem112 = AIE.objectfifo.subview.access %subview12[1] : !AIE.objectfifosubview> -> memref<16xi32> + aie.objectfifo.release @of2 (Produce, 1) + %subview12 = aie.objectfifo.acquire @of2 (Produce, 2) : !aie.objectfifosubview> + %elem102 = aie.objectfifo.subview.access %subview12[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem112 = aie.objectfifo.subview.access %subview12[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem102) : (memref<16xi32>) -> () func.call @some_work(%elem112) : (memref<16xi32>) -> () - AIE.objectfifo.release @of2 (Produce, 1) + aie.objectfifo.release @of2 (Produce, 1) - AIE.end + aie.end } - %core13 = AIE.core(%tile13) { - %subview0 = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %elem00 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %core13 = aie.core(%tile13) { + %subview0 = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %elem00 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem00) : (memref<16xi32>) -> () - %subview02 = AIE.objectfifo.acquire @of2 (Consume, 2) : !AIE.objectfifosubview> - %elem002 = AIE.objectfifo.subview.access %subview02[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem012 = AIE.objectfifo.subview.access %subview02[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview02 = aie.objectfifo.acquire @of2 (Consume, 2) : !aie.objectfifosubview> + %elem002 = aie.objectfifo.subview.access %subview02[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem012 = aie.objectfifo.subview.access %subview02[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem002) : (memref<16xi32>) -> () func.call @some_work(%elem012) : (memref<16xi32>) -> () - AIE.objectfifo.release @of2 (Consume, 2) + aie.objectfifo.release @of2 (Consume, 2) - AIE.objectfifo.release @of (Consume, 1) - %subview1 = AIE.objectfifo.acquire @of (Consume, 2) : !AIE.objectfifosubview> - %elem10 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem11 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref<16xi32> + aie.objectfifo.release @of (Consume, 1) + %subview1 = aie.objectfifo.acquire @of (Consume, 2) : !aie.objectfifosubview> + %elem10 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem11 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem10) : (memref<16xi32>) -> () func.call @some_work(%elem11) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Consume, 2) + aie.objectfifo.release @of (Consume, 2) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/subview_test_3.mlir b/test/objectFifo-stateful-transform/subview_test_3.mlir index 7ab747f246..6a02e76a18 100644 --- a/test/objectFifo-stateful-transform/subview_test_3.mlir +++ b/test/objectFifo-stateful-transform/subview_test_3.mlir @@ -12,135 +12,135 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(1, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of2_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of2_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "of2_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "of2_lock_0"} -// CHECK: %[[VAL_6:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of2_lock_1"} -// CHECK: %[[VAL_7:.*]] = AIE.lock(%[[VAL_1]], 2) {init = 0 : i32, sym_name = "of2_lock_2"} -// CHECK: %[[VAL_8:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_9:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_2"} : memref<16xi32> -// CHECK: %[[VAL_11:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "of_buff_3"} : memref<16xi32> -// CHECK: %[[VAL_12:.*]] = AIE.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of_lock_0"} -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_lock_1"} -// CHECK: %[[VAL_14:.*]] = AIE.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "of_lock_2"} -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of_lock_3"} +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(1, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of2_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of2_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "of2_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "of2_lock_0"} +// CHECK: %[[VAL_6:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "of2_lock_1"} +// CHECK: %[[VAL_7:.*]] = aie.lock(%[[VAL_1]], 2) {init = 0 : i32, sym_name = "of2_lock_2"} +// CHECK: %[[VAL_8:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_9:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_2"} : memref<16xi32> +// CHECK: %[[VAL_11:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "of_buff_3"} : memref<16xi32> +// CHECK: %[[VAL_12:.*]] = aie.lock(%[[VAL_0]], 0) {init = 0 : i32, sym_name = "of_lock_0"} +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_0]], 1) {init = 0 : i32, sym_name = "of_lock_1"} +// CHECK: %[[VAL_14:.*]] = aie.lock(%[[VAL_0]], 2) {init = 0 : i32, sym_name = "of_lock_2"} +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "of_lock_3"} // CHECK: func.func @some_work(%[[VAL_16:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_0]]) { -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 0) +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_0]]) { +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_8]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_14]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_15]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_15]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_10]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_11]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_7]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_7]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_4]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 0) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_6]], Release, 0) +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_18:.*]] = AIE.core(%[[VAL_1]]) { -// CHECK: AIE.use_lock(%[[VAL_12]], Acquire, 1) +// CHECK: %[[VAL_18:.*]] = aie.core(%[[VAL_1]]) { +// CHECK: aie.use_lock(%[[VAL_12]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_8]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.use_lock(%[[VAL_6]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_6]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_2]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_3]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_6]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_12]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 1) -// CHECK: AIE.use_lock(%[[VAL_14]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_6]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_12]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 1) +// CHECK: aie.use_lock(%[[VAL_14]], Acquire, 1) // CHECK: func.call @some_work(%[[VAL_9]]) : (memref<16xi32>) -> () // CHECK: func.call @some_work(%[[VAL_10]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 0) -// CHECK: AIE.use_lock(%[[VAL_14]], Release, 0) -// CHECK: AIE.end +// CHECK: aie.use_lock(%[[VAL_13]], Release, 0) +// CHECK: aie.use_lock(%[[VAL_14]], Release, 0) +// CHECK: aie.end // CHECK: } // CHECK: } module @multiCoreMixedFifo { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) - AIE.objectfifo @of (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> - AIE.objectfifo @of2 (%tile13, {%tile12}, 3 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> + aie.objectfifo @of2 (%tile13, {%tile12}, 3 : i32) : !aie.objectfifo> func.func @some_work(%line_in:memref<16xi32>) -> () { return } - %core11 = AIE.core(%tile12) { - %subview0 = AIE.objectfifo.acquire @of (Produce, 2) : !AIE.objectfifosubview> - %elem00 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem01 = AIE.objectfifo.subview.access %subview0[1] : !AIE.objectfifosubview> -> memref<16xi32> + %core11 = aie.core(%tile12) { + %subview0 = aie.objectfifo.acquire @of (Produce, 2) : !aie.objectfifosubview> + %elem00 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem01 = aie.objectfifo.subview.access %subview0[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem00) : (memref<16xi32>) -> () func.call @some_work(%elem01) : (memref<16xi32>) -> () - %subview02 = AIE.objectfifo.acquire @of2 (Consume, 1) : !AIE.objectfifosubview> - %elem002 = AIE.objectfifo.subview.access %subview02[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview02 = aie.objectfifo.acquire @of2 (Consume, 1) : !aie.objectfifosubview> + %elem002 = aie.objectfifo.subview.access %subview02[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem002) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Produce, 1) - %subview1 = AIE.objectfifo.acquire @of (Produce, 3) : !AIE.objectfifosubview> - %elem10 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem11 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref<16xi32> - %elem12 = AIE.objectfifo.subview.access %subview1[2] : !AIE.objectfifosubview> -> memref<16xi32> + aie.objectfifo.release @of (Produce, 1) + %subview1 = aie.objectfifo.acquire @of (Produce, 3) : !aie.objectfifosubview> + %elem10 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem11 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref<16xi32> + %elem12 = aie.objectfifo.subview.access %subview1[2] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem10) : (memref<16xi32>) -> () func.call @some_work(%elem11) : (memref<16xi32>) -> () func.call @some_work(%elem12) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Produce, 3) + aie.objectfifo.release @of (Produce, 3) - AIE.objectfifo.release @of2 (Consume, 1) - %subview12 = AIE.objectfifo.acquire @of2 (Consume, 2) : !AIE.objectfifosubview> - %elem102 = AIE.objectfifo.subview.access %subview12[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem112 = AIE.objectfifo.subview.access %subview12[1] : !AIE.objectfifosubview> -> memref<16xi32> + aie.objectfifo.release @of2 (Consume, 1) + %subview12 = aie.objectfifo.acquire @of2 (Consume, 2) : !aie.objectfifosubview> + %elem102 = aie.objectfifo.subview.access %subview12[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem112 = aie.objectfifo.subview.access %subview12[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem102) : (memref<16xi32>) -> () func.call @some_work(%elem112) : (memref<16xi32>) -> () - AIE.objectfifo.release @of2 (Consume, 1) + aie.objectfifo.release @of2 (Consume, 1) - AIE.end + aie.end } - %core12 = AIE.core(%tile13) { - %subview0 = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %elem00 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %core12 = aie.core(%tile13) { + %subview0 = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %elem00 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem00) : (memref<16xi32>) -> () - %subview02 = AIE.objectfifo.acquire @of2 (Produce, 2) : !AIE.objectfifosubview> - %elem002 = AIE.objectfifo.subview.access %subview02[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem012 = AIE.objectfifo.subview.access %subview02[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview02 = aie.objectfifo.acquire @of2 (Produce, 2) : !aie.objectfifosubview> + %elem002 = aie.objectfifo.subview.access %subview02[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem012 = aie.objectfifo.subview.access %subview02[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem002) : (memref<16xi32>) -> () func.call @some_work(%elem012) : (memref<16xi32>) -> () - AIE.objectfifo.release @of2 (Produce, 2) + aie.objectfifo.release @of2 (Produce, 2) - AIE.objectfifo.release @of (Consume, 1) - %subview1 = AIE.objectfifo.acquire @of (Consume, 2) : !AIE.objectfifosubview> - %elem10 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem11 = AIE.objectfifo.subview.access %subview1[1] : !AIE.objectfifosubview> -> memref<16xi32> + aie.objectfifo.release @of (Consume, 1) + %subview1 = aie.objectfifo.acquire @of (Consume, 2) : !aie.objectfifosubview> + %elem10 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem11 = aie.objectfifo.subview.access %subview1[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem10) : (memref<16xi32>) -> () func.call @some_work(%elem11) : (memref<16xi32>) -> () - AIE.objectfifo.release @of (Consume, 2) + aie.objectfifo.release @of (Consume, 2) - AIE.end + aie.end } } } diff --git a/test/objectFifo-stateful-transform/tileDMA_test.mlir b/test/objectFifo-stateful-transform/tileDMA_test.mlir index 04a85b02b3..bea2793512 100644 --- a/test/objectFifo-stateful-transform/tileDMA_test.mlir +++ b/test/objectFifo-stateful-transform/tileDMA_test.mlir @@ -13,147 +13,147 @@ // RUN: aie-opt --aie-objectFifo-stateful-transform %s | FileCheck %s -// CHECK-LABEL: AIE.device(xcvc1902) { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 2) -// CHECK: %[[VAL_1:.*]] = AIE.tile(3, 3) -// CHECK: %[[VAL_2:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_3:.*]] = AIE.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_4:.*]] = AIE.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} -// CHECK: %[[VAL_5:.*]] = AIE.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} -// CHECK: %[[VAL_6:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> -// CHECK: %[[VAL_7:.*]] = AIE.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> -// CHECK: %[[VAL_8:.*]] = AIE.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "objfifo_lock_0"} -// CHECK: %[[VAL_9:.*]] = AIE.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "objfifo_lock_1"} -// CHECK: %[[VAL_10:.*]] = AIE.buffer(%[[VAL_0]]) : memref<16xi32> -// CHECK: %[[VAL_11:.*]] = AIE.lock(%[[VAL_0]], 0) -// CHECK: %[[VAL_12:.*]] = AIE.buffer(%[[VAL_0]]) : memref<16xi32> -// CHECK: %[[VAL_13:.*]] = AIE.lock(%[[VAL_0]], 1) -// CHECK: %[[VAL_14:.*]] = AIE.buffer(%[[VAL_0]]) : memref<16xi32> -// CHECK: %[[VAL_15:.*]] = AIE.lock(%[[VAL_0]], 2) -// CHECK: AIE.flow(%[[VAL_0]], DMA : 1, %[[VAL_1]], DMA : 0) +// CHECK-LABEL: aie.device(xcvc1902) { +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 2) +// CHECK: %[[VAL_1:.*]] = aie.tile(3, 3) +// CHECK: %[[VAL_2:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_3:.*]] = aie.buffer(%[[VAL_1]]) {sym_name = "objfifo_cons_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_4:.*]] = aie.lock(%[[VAL_1]], 0) {init = 0 : i32, sym_name = "objfifo_cons_lock_0"} +// CHECK: %[[VAL_5:.*]] = aie.lock(%[[VAL_1]], 1) {init = 0 : i32, sym_name = "objfifo_cons_lock_1"} +// CHECK: %[[VAL_6:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_0"} : memref<16xi32> +// CHECK: %[[VAL_7:.*]] = aie.buffer(%[[VAL_0]]) {sym_name = "objfifo_buff_1"} : memref<16xi32> +// CHECK: %[[VAL_8:.*]] = aie.lock(%[[VAL_0]], 3) {init = 0 : i32, sym_name = "objfifo_lock_0"} +// CHECK: %[[VAL_9:.*]] = aie.lock(%[[VAL_0]], 4) {init = 0 : i32, sym_name = "objfifo_lock_1"} +// CHECK: %[[VAL_10:.*]] = aie.buffer(%[[VAL_0]]) : memref<16xi32> +// CHECK: %[[VAL_11:.*]] = aie.lock(%[[VAL_0]], 0) +// CHECK: %[[VAL_12:.*]] = aie.buffer(%[[VAL_0]]) : memref<16xi32> +// CHECK: %[[VAL_13:.*]] = aie.lock(%[[VAL_0]], 1) +// CHECK: %[[VAL_14:.*]] = aie.buffer(%[[VAL_0]]) : memref<16xi32> +// CHECK: %[[VAL_15:.*]] = aie.lock(%[[VAL_0]], 2) +// CHECK: aie.flow(%[[VAL_0]], DMA : 1, %[[VAL_1]], DMA : 0) // CHECK: func.func @some_work(%[[VAL_16:.*]]: memref<16xi32>) { // CHECK: return // CHECK: } -// CHECK: %[[VAL_17:.*]] = AIE.core(%[[VAL_0]]) { +// CHECK: %[[VAL_17:.*]] = aie.core(%[[VAL_0]]) { // CHECK: %[[VAL_18:.*]] = arith.constant 0 : index // CHECK: %[[VAL_19:.*]] = arith.constant 1 : index // CHECK: %[[VAL_20:.*]] = arith.constant 12 : index // CHECK: %[[VAL_21:.*]] = arith.constant 2 : index // CHECK: scf.for %[[VAL_22:.*]] = %[[VAL_18]] to %[[VAL_20]] step %[[VAL_21]] { -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_6]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 1) -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 0) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 0) // CHECK: func.call @some_work(%[[VAL_7]]) : (memref<16xi32>) -> () -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 1) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 1) // CHECK: } -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_23:.*]] = AIE.mem(%[[VAL_0]]) { -// CHECK: %[[VAL_24:.*]] = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_23:.*]] = aie.mem(%[[VAL_0]]) { +// CHECK: %[[VAL_24:.*]] = aie.dma_start(MM2S, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_11]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_11]], Release, 0) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_11]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_10]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_11]], Release, 0) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_13]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_13]], Release, 0) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_13]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_12]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_13]], Release, 0) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: %[[VAL_25:.*]] = AIE.dma_start(S2MM, 0, ^bb4, ^bb5) +// CHECK: %[[VAL_25:.*]] = aie.dma_start(S2MM, 0, ^bb4, ^bb5) // CHECK: ^bb4: // 2 preds: ^bb3, ^bb4 -// CHECK: AIE.use_lock(%[[VAL_15]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_14]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_15]], Release, 1) -// CHECK: AIE.next_bd ^bb4 +// CHECK: aie.use_lock(%[[VAL_15]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_14]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_15]], Release, 1) +// CHECK: aie.next_bd ^bb4 // CHECK: ^bb5: // pred: ^bb3 -// CHECK: %[[VAL_26:.*]] = AIE.dma_start(MM2S, 1, ^bb6, ^bb8) +// CHECK: %[[VAL_26:.*]] = aie.dma_start(MM2S, 1, ^bb6, ^bb8) // CHECK: ^bb6: // 2 preds: ^bb5, ^bb7 -// CHECK: AIE.use_lock(%[[VAL_8]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_8]], Release, 0) -// CHECK: AIE.next_bd ^bb7 +// CHECK: aie.use_lock(%[[VAL_8]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_6]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_8]], Release, 0) +// CHECK: aie.next_bd ^bb7 // CHECK: ^bb7: // pred: ^bb6 -// CHECK: AIE.use_lock(%[[VAL_9]], Acquire, 1) -// CHECK: AIE.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_9]], Release, 0) -// CHECK: AIE.next_bd ^bb6 +// CHECK: aie.use_lock(%[[VAL_9]], Acquire, 1) +// CHECK: aie.dma_bd(%[[VAL_7]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_9]], Release, 0) +// CHECK: aie.next_bd ^bb6 // CHECK: ^bb8: // pred: ^bb5 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } -// CHECK: %[[VAL_27:.*]] = AIE.mem(%[[VAL_1]]) { -// CHECK: %[[VAL_28:.*]] = AIE.dma_start(S2MM, 0, ^bb1, ^bb3) +// CHECK: %[[VAL_27:.*]] = aie.mem(%[[VAL_1]]) { +// CHECK: %[[VAL_28:.*]] = aie.dma_start(S2MM, 0, ^bb1, ^bb3) // CHECK: ^bb1: // 2 preds: ^bb0, ^bb2 -// CHECK: AIE.use_lock(%[[VAL_4]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_4]], Release, 1) -// CHECK: AIE.next_bd ^bb2 +// CHECK: aie.use_lock(%[[VAL_4]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_2]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_4]], Release, 1) +// CHECK: aie.next_bd ^bb2 // CHECK: ^bb2: // pred: ^bb1 -// CHECK: AIE.use_lock(%[[VAL_5]], Acquire, 0) -// CHECK: AIE.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) -// CHECK: AIE.use_lock(%[[VAL_5]], Release, 1) -// CHECK: AIE.next_bd ^bb1 +// CHECK: aie.use_lock(%[[VAL_5]], Acquire, 0) +// CHECK: aie.dma_bd(%[[VAL_3]] : memref<16xi32>, 0, 16) +// CHECK: aie.use_lock(%[[VAL_5]], Release, 1) +// CHECK: aie.next_bd ^bb1 // CHECK: ^bb3: // pred: ^bb0 -// CHECK: AIE.end +// CHECK: aie.end // CHECK: } // CHECK: } module @tileDMA_channels { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile33 = aie.tile(3, 3) - %buff0 = AIE.buffer(%tile12) : memref<16xi32> - %lock0 = AIE.lock(%tile12, 0) - %buff1 = AIE.buffer(%tile12) : memref<16xi32> - %lock1 = AIE.lock(%tile12, 1) - %buff2 = AIE.buffer(%tile12) : memref<16xi32> - %lock2 = AIE.lock(%tile12, 2) + %buff0 = aie.buffer(%tile12) : memref<16xi32> + %lock0 = aie.lock(%tile12, 0) + %buff1 = aie.buffer(%tile12) : memref<16xi32> + %lock1 = aie.lock(%tile12, 1) + %buff2 = aie.buffer(%tile12) : memref<16xi32> + %lock2 = aie.lock(%tile12, 2) - AIE.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> func.func @some_work(%lineOut : memref<16xi32>) -> () { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 12 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @objfifo (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @some_work(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @objfifo (Produce, 1) + aie.objectfifo.release @objfifo (Produce, 1) } - AIE.end + aie.end } - %mem12 = AIE.mem(%tile12) { - %dma1 = AIE.dma_start(MM2S, 0, ^bb1, ^bb3) + %mem12 = aie.mem(%tile12) { + %dma1 = aie.dma_start(MM2S, 0, ^bb1, ^bb3) ^bb1: - AIE.use_lock(%lock0, Acquire, 1) - AIE.dma_bd(%buff0 : memref<16xi32>, 0, 16) - AIE.use_lock(%lock0, Release, 0) - AIE.next_bd ^bb2 + aie.use_lock(%lock0, Acquire, 1) + aie.dma_bd(%buff0 : memref<16xi32>, 0, 16) + aie.use_lock(%lock0, Release, 0) + aie.next_bd ^bb2 ^bb2: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buff1 : memref<16xi32>, 0, 16) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bb1 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buff1 : memref<16xi32>, 0, 16) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bb1 ^bb3: - %dma2 = AIE.dma_start(S2MM, 0, ^bb4, ^bb5) + %dma2 = aie.dma_start(S2MM, 0, ^bb4, ^bb5) ^bb4: - AIE.use_lock(%lock2, Acquire, 0) - AIE.dma_bd(%buff2 : memref<16xi32>, 0, 16) - AIE.use_lock(%lock2, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%lock2, Acquire, 0) + aie.dma_bd(%buff2 : memref<16xi32>, 0, 16) + aie.use_lock(%lock2, Release, 1) + aie.next_bd ^bb4 ^bb5: - AIE.end + aie.end } } } diff --git a/test/objectFifo_tests/broadcast/aie.mlir b/test/objectFifo_tests/broadcast/aie.mlir index 485ba2f746..07c78922ec 100755 --- a/test/objectFifo_tests/broadcast/aie.mlir +++ b/test/objectFifo_tests/broadcast/aie.mlir @@ -20,20 +20,20 @@ // adjusted based on the maximum acquire value of the producer. module @broadcast { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) + %tile33 = aie.tile(3, 3) - %buff_out_12 = AIE.buffer(%tile12) { sym_name = "out12" } : memref<4x16xi32> - %lock_out_12 = AIE.lock(%tile12, 0) { sym_name = "lock_out12" } - %buff_out_14 = AIE.buffer(%tile14) { sym_name = "out14" } : memref<4x16xi32> - %lock_out_14 = AIE.lock(%tile14, 0) { sym_name = "lock_out14" } - %buff_out_33 = AIE.buffer(%tile33) { sym_name = "out33" } : memref<4x16xi32> - %lock_out_33 = AIE.lock(%tile33, 0) { sym_name = "lock_out33" } + %buff_out_12 = aie.buffer(%tile12) { sym_name = "out12" } : memref<4x16xi32> + %lock_out_12 = aie.lock(%tile12, 0) { sym_name = "lock_out12" } + %buff_out_14 = aie.buffer(%tile14) { sym_name = "out14" } : memref<4x16xi32> + %lock_out_14 = aie.lock(%tile14, 0) { sym_name = "lock_out14" } + %buff_out_33 = aie.buffer(%tile33) { sym_name = "out33" } : memref<4x16xi32> + %lock_out_33 = aie.lock(%tile33, 0) { sym_name = "lock_out33" } - AIE.objectfifo @objfifo (%tile13, {%tile12, %tile14, %tile33}, 7 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile13, {%tile12, %tile14, %tile33}, 7 : i32) : !aie.objectfifo> func.func @generateLineScalar(%lineOut : memref<16xi32>) -> () { %c0 = arith.constant 0 : index @@ -47,19 +47,19 @@ module @broadcast { return } - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 4 : index scf.for %indexInLine = %c0 to %height step %c1 { - %subview0 = AIE.objectfifo.acquire @objfifo (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview0 = aie.objectfifo.acquire @objfifo (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @generateLineScalar(%elem0) : (memref<16xi32>) -> () - AIE.objectfifo.release @objfifo (Produce, 1) + aie.objectfifo.release @objfifo (Produce, 1) } - AIE.end + aie.end } func.func @storeLineScalar(%lineIn : memref<16xi32>, %row : index, %bufferOut : memref<4x16xi32>) -> () { @@ -74,46 +74,46 @@ module @broadcast { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 4 : index - AIE.use_lock(%lock_out_12, "Acquire", 0) + aie.use_lock(%lock_out_12, "Acquire", 0) scf.for %indexInLine = %c0 to %height step %c1 { - %subview0 = AIE.objectfifo.acquire @objfifo (Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview0 = aie.objectfifo.acquire @objfifo (Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @storeLineScalar(%elem0, %indexInLine, %buff_out_12) : (memref<16xi32>, index, memref<4x16xi32>) -> () - AIE.objectfifo.release @objfifo (Consume, 1) + aie.objectfifo.release @objfifo (Consume, 1) } - AIE.use_lock(%lock_out_12, "Release", 1) + aie.use_lock(%lock_out_12, "Release", 1) - AIE.end + aie.end } - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c2 = arith.constant 2 : index %height = arith.constant 4 : index - AIE.use_lock(%lock_out_14, "Acquire", 0) + aie.use_lock(%lock_out_14, "Acquire", 0) scf.for %indexInLine = %c0 to %height step %c2 { - %subview = AIE.objectfifo.acquire @objfifo (Consume, 2) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Consume, 2) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @storeLineScalar(%elem0, %indexInLine, %buff_out_14) : (memref<16xi32>, index, memref<4x16xi32>) -> () %indexPlusOne = arith.addi %indexInLine, %c1 : index func.call @storeLineScalar(%elem1, %indexPlusOne, %buff_out_14) : (memref<16xi32>, index, memref<4x16xi32>) -> () - AIE.objectfifo.release @objfifo (Consume, 2) + aie.objectfifo.release @objfifo (Consume, 2) } - AIE.use_lock(%lock_out_14, "Release", 1) + aie.use_lock(%lock_out_14, "Release", 1) - AIE.end + aie.end } func.func @addAndStore(%lineIn0 : memref<16xi32>, %lineIn1 : memref<16xi32>, %row : index, %bufferOut : memref<4x16xi32>) -> () { @@ -130,30 +130,30 @@ module @broadcast { return } - %core33 = AIE.core(%tile33) { + %core33 = aie.core(%tile33) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c3 = arith.constant 3 : index %height = arith.constant 3 : index - AIE.use_lock(%lock_out_33, "Acquire", 0) + aie.use_lock(%lock_out_33, "Acquire", 0) scf.for %indexInLine = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @objfifo (Consume, 2) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Consume, 2) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @addAndStore(%elem0, %elem1, %indexInLine, %buff_out_33) : (memref<16xi32>, memref<16xi32>, index, memref<4x16xi32>) -> () - AIE.objectfifo.release @objfifo (Consume, 1) + aie.objectfifo.release @objfifo (Consume, 1) } - %subview = AIE.objectfifo.acquire @objfifo (Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @storeLineScalar(%elem0, %c3, %buff_out_33) : (memref<16xi32>, index, memref<4x16xi32>) -> () - AIE.objectfifo.release @objfifo (Consume, 1) + aie.objectfifo.release @objfifo (Consume, 1) - AIE.use_lock(%lock_out_33, "Release", 1) + aie.use_lock(%lock_out_33, "Release", 1) - AIE.end + aie.end } } } diff --git a/test/objectFifo_tests/ping_pong/aie.mlir b/test/objectFifo_tests/ping_pong/aie.mlir index 5291d58758..7982aa9df0 100755 --- a/test/objectFifo_tests/ping_pong/aie.mlir +++ b/test/objectFifo_tests/ping_pong/aie.mlir @@ -19,14 +19,14 @@ // that a flow and dma operations are established between the memory modules. module @ping_pong { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile33 = aie.tile(3, 3) - %buff_out = AIE.buffer(%tile33) { sym_name = "out" } : memref<10x16xi32> - %lock_out = AIE.lock(%tile33, 0) { sym_name = "lock_out" } + %buff_out = aie.buffer(%tile33) { sym_name = "out" } : memref<10x16xi32> + %lock_out = aie.lock(%tile33, 0) { sym_name = "lock_out" } - AIE.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @objfifo (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> // Fills the given memref with the same input index value. func.func @generateLineScalar(%valueIndex : index, %lineOut : memref<16xi32>) -> () { @@ -43,24 +43,24 @@ module @ping_pong { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 10 : index scf.for %indexInHeight = %c0 to %height step %c1 { // acquire next element for produce - %subview = AIE.objectfifo.acquire @objfifo (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> // call generator function func.call @generateLineScalar(%indexInHeight, %elem0) : (index, memref<16xi32>) -> () // release next element for consume - AIE.objectfifo.release @objfifo (Produce, 1) + aie.objectfifo.release @objfifo (Produce, 1) } - AIE.end + aie.end } // Stores the given memref in the bufferOut at the given row index. @@ -76,30 +76,30 @@ module @ping_pong { return } - %core33 = AIE.core(%tile33) { + %core33 = aie.core(%tile33) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 10 : index // acquire output buffer - AIE.use_lock(%lock_out, "Acquire", 0) // acquire for produce + aie.use_lock(%lock_out, "Acquire", 0) // acquire for produce scf.for %indexInHeight = %c0 to %height step %c1 { // acquire next element for consume - %subview = AIE.objectfifo.acquire @objfifo (Consume, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @objfifo (Consume, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> // call consumer function func.call @storeLineScalar(%elem0, %indexInHeight, %buff_out) : (memref<16xi32>, index, memref<10x16xi32>) -> () // release next element for produce - AIE.objectfifo.release @objfifo (Consume, 1) + aie.objectfifo.release @objfifo (Consume, 1) } // release output buffer - AIE.use_lock(%lock_out, "Release", 1) // release for consume + aie.use_lock(%lock_out, "Release", 1) // release for consume - AIE.end + aie.end } } } diff --git a/test/objectFifo_tests/tileDMA_channels/aie.mlir b/test/objectFifo_tests/tileDMA_channels/aie.mlir index 381cfc9f96..be9429870f 100755 --- a/test/objectFifo_tests/tileDMA_channels/aie.mlir +++ b/test/objectFifo_tests/tileDMA_channels/aie.mlir @@ -20,18 +20,18 @@ // final output. module @dmaChannels { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile33 = AIE.tile(3, 3) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile33 = aie.tile(3, 3) - %buff_out = AIE.buffer(%tile33) { sym_name = "out" } : memref<10x16xi32> - %lock_out = AIE.lock(%tile33, 0) { sym_name = "lock_out" } + %buff_out = aie.buffer(%tile33) { sym_name = "out" } : memref<10x16xi32> + %lock_out = aie.lock(%tile33, 0) { sym_name = "lock_out" } - AIE.objectfifo @of_in0 (%tile33, {%tile12}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_in1 (%tile33, {%tile12}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in0 (%tile33, {%tile12}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_in1 (%tile33, {%tile12}, 2 : i32) : !aie.objectfifo> - AIE.objectfifo @of_out0 (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out1 (%tile12, {%tile33}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_out0 (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_out1 (%tile12, {%tile33}, 2 : i32) : !aie.objectfifo> func.func @copy(%lineIn : memref<16xi32>, %lineOut : memref<16xi32>) -> () { %c0 = arith.constant 0 : index @@ -45,34 +45,34 @@ module @dmaChannels { return } - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 10 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subviewIn0 = AIE.objectfifo.acquire @of_in0 (Consume, 1) : !AIE.objectfifosubview> - %elemIn0 = AIE.objectfifo.subview.access %subviewIn0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewIn0 = aie.objectfifo.acquire @of_in0 (Consume, 1) : !aie.objectfifosubview> + %elemIn0 = aie.objectfifo.subview.access %subviewIn0[0] : !aie.objectfifosubview> -> memref<16xi32> - %subviewIn1 = AIE.objectfifo.acquire @of_in1 (Consume, 1) : !AIE.objectfifosubview> - %elemIn1 = AIE.objectfifo.subview.access %subviewIn1[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewIn1 = aie.objectfifo.acquire @of_in1 (Consume, 1) : !aie.objectfifosubview> + %elemIn1 = aie.objectfifo.subview.access %subviewIn1[0] : !aie.objectfifosubview> -> memref<16xi32> - %subviewOut0 = AIE.objectfifo.acquire @of_out0 (Produce, 1) : !AIE.objectfifosubview> - %elemOut0 = AIE.objectfifo.subview.access %subviewOut0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewOut0 = aie.objectfifo.acquire @of_out0 (Produce, 1) : !aie.objectfifosubview> + %elemOut0 = aie.objectfifo.subview.access %subviewOut0[0] : !aie.objectfifosubview> -> memref<16xi32> - %subviewOut1 = AIE.objectfifo.acquire @of_out1 (Produce, 1) : !AIE.objectfifosubview> - %elemOut1 = AIE.objectfifo.subview.access %subviewOut1[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewOut1 = aie.objectfifo.acquire @of_out1 (Produce, 1) : !aie.objectfifosubview> + %elemOut1 = aie.objectfifo.subview.access %subviewOut1[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @copy(%elemIn0, %elemOut0) : (memref<16xi32>, memref<16xi32>) -> () func.call @copy(%elemIn1, %elemOut1) : (memref<16xi32>, memref<16xi32>) -> () - AIE.objectfifo.release @of_in0 (Consume, 1) - AIE.objectfifo.release @of_in1 (Consume, 1) - AIE.objectfifo.release @of_out0 (Produce, 1) - AIE.objectfifo.release @of_out1 (Produce, 1) + aie.objectfifo.release @of_in0 (Consume, 1) + aie.objectfifo.release @of_in1 (Consume, 1) + aie.objectfifo.release @of_out0 (Produce, 1) + aie.objectfifo.release @of_out1 (Produce, 1) } - AIE.end + aie.end } // Fills the given memref. @@ -103,44 +103,44 @@ module @dmaChannels { return } - %core33 = AIE.core(%tile33) { + %core33 = aie.core(%tile33) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 10 : index // acquire output buffer - AIE.use_lock(%lock_out, "Acquire", 0) // acquire for produce + aie.use_lock(%lock_out, "Acquire", 0) // acquire for produce scf.for %indexInHeight = %c0 to %height step %c1 { - %subviewOut0 = AIE.objectfifo.acquire @of_in0 (Produce, 1) : !AIE.objectfifosubview> - %elemOut0 = AIE.objectfifo.subview.access %subviewOut0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewOut0 = aie.objectfifo.acquire @of_in0 (Produce, 1) : !aie.objectfifosubview> + %elemOut0 = aie.objectfifo.subview.access %subviewOut0[0] : !aie.objectfifosubview> -> memref<16xi32> - %subviewOut1 = AIE.objectfifo.acquire @of_in1 (Produce, 1) : !AIE.objectfifosubview> - %elemOut1 = AIE.objectfifo.subview.access %subviewOut1[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewOut1 = aie.objectfifo.acquire @of_in1 (Produce, 1) : !aie.objectfifosubview> + %elemOut1 = aie.objectfifo.subview.access %subviewOut1[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @generateLineScalar(%elemOut0) : (memref<16xi32>) -> () func.call @generateLineScalar(%elemOut1) : (memref<16xi32>) -> () - AIE.objectfifo.release @of_in0 (Produce, 1) - AIE.objectfifo.release @of_in1 (Produce, 1) + aie.objectfifo.release @of_in0 (Produce, 1) + aie.objectfifo.release @of_in1 (Produce, 1) - %subviewIn0 = AIE.objectfifo.acquire @of_out0 (Consume, 1) : !AIE.objectfifosubview> - %elemIn0 = AIE.objectfifo.subview.access %subviewIn0[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewIn0 = aie.objectfifo.acquire @of_out0 (Consume, 1) : !aie.objectfifosubview> + %elemIn0 = aie.objectfifo.subview.access %subviewIn0[0] : !aie.objectfifosubview> -> memref<16xi32> - %subviewIn1 = AIE.objectfifo.acquire @of_out1 (Consume, 1) : !AIE.objectfifosubview> - %elemIn1 = AIE.objectfifo.subview.access %subviewIn1[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewIn1 = aie.objectfifo.acquire @of_out1 (Consume, 1) : !aie.objectfifosubview> + %elemIn1 = aie.objectfifo.subview.access %subviewIn1[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @addAndStore(%elemIn0, %elemIn1, %indexInHeight, %buff_out) : (memref<16xi32>, memref<16xi32>, index, memref<10x16xi32>) -> () - AIE.objectfifo.release @of_out0 (Consume, 1) - AIE.objectfifo.release @of_out1 (Consume, 1) + aie.objectfifo.release @of_out0 (Consume, 1) + aie.objectfifo.release @of_out1 (Consume, 1) } // release output buffer - AIE.use_lock(%lock_out, "Release", 1) // release for consume + aie.use_lock(%lock_out, "Release", 1) // release for consume - AIE.end + aie.end } } } diff --git a/test/objectFifo_tests/twoFilter2D/aie.mlir b/test/objectFifo_tests/twoFilter2D/aie.mlir index adba953085..50b835a552 100755 --- a/test/objectFifo_tests/twoFilter2D/aie.mlir +++ b/test/objectFifo_tests/twoFilter2D/aie.mlir @@ -19,16 +19,16 @@ // At the top and bottom borders only two lines are acquired, instead of three. module @twoFilter2D { - AIE.device(xcvc1902) { - %tile12 = AIE.tile(1, 2) - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + aie.device(xcvc1902) { + %tile12 = aie.tile(1, 2) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buff_out = AIE.buffer(%tile14) { sym_name = "out" } : memref<10x16xi32> - %lock_out = AIE.lock(%tile14, 0) { sym_name = "lock_out" } + %buff_out = aie.buffer(%tile14) { sym_name = "out" } : memref<10x16xi32> + %lock_out = aie.lock(%tile14, 0) { sym_name = "lock_out" } - AIE.objectfifo @of1 (%tile12, {%tile13}, 4 : i32) : !AIE.objectfifo> - AIE.objectfifo @of2 (%tile13, {%tile14}, 4 : i32) : !AIE.objectfifo> + aie.objectfifo @of1 (%tile12, {%tile13}, 4 : i32) : !aie.objectfifo> + aie.objectfifo @of2 (%tile13, {%tile14}, 4 : i32) : !aie.objectfifo> // Kernel Functions func.func @generateLineScalar(%valueIndex : index, %lineOut : memref<16xi32>) -> () { @@ -106,23 +106,23 @@ module @twoFilter2D { } // Producer of @of1 - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 10 : index scf.for %indexInHeight = %c0 to %height step %c1 { - %subview = AIE.objectfifo.acquire @of1 (Produce, 1) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @of1 (Produce, 1) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @generateLineScalar(%indexInHeight, %elem0) : (index, memref<16xi32>) -> () - AIE.objectfifo.release @of1 (Produce, 1) + aie.objectfifo.release @of1 (Produce, 1) } - AIE.end + aie.end } // Consumer of objFifoOne; Producer of @of2 - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %zero = arith.constant 0 : i32 %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index @@ -130,85 +130,85 @@ module @twoFilter2D { %height = arith.constant 9 : index // Top Border - %subviewOneTop = AIE.objectfifo.acquire @of1 (Consume, 2) : !AIE.objectfifosubview> - %elemOneTop0 = AIE.objectfifo.subview.access %subviewOneTop[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elemOneTop1 = AIE.objectfifo.subview.access %subviewOneTop[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewOneTop = aie.objectfifo.acquire @of1 (Consume, 2) : !aie.objectfifosubview> + %elemOneTop0 = aie.objectfifo.subview.access %subviewOneTop[0] : !aie.objectfifosubview> -> memref<16xi32> + %elemOneTop1 = aie.objectfifo.subview.access %subviewOneTop[1] : !aie.objectfifosubview> -> memref<16xi32> - %subviewTwoTop = AIE.objectfifo.acquire @of2 (Produce, 1) : !AIE.objectfifosubview> - %elemTwoTop0 = AIE.objectfifo.subview.access %subviewTwoTop[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewTwoTop = aie.objectfifo.acquire @of2 (Produce, 1) : !aie.objectfifosubview> + %elemTwoTop0 = aie.objectfifo.subview.access %subviewTwoTop[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @firstFilterTwoLines(%elemOneTop0, %elemOneTop1, %elemTwoTop0) : (memref<16xi32>, memref<16xi32>, memref<16xi32>) -> () - AIE.objectfifo.release @of2 (Produce, 1) + aie.objectfifo.release @of2 (Produce, 1) // Middle scf.for %indexInHeight = %c1 to %height step %c1 { - %subviewOne = AIE.objectfifo.acquire @of1 (Consume, 3) : !AIE.objectfifosubview> - %elemOne0 = AIE.objectfifo.subview.access %subviewOne[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elemOne1 = AIE.objectfifo.subview.access %subviewOne[1] : !AIE.objectfifosubview> -> memref<16xi32> - %elemOne2 = AIE.objectfifo.subview.access %subviewOne[2] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewOne = aie.objectfifo.acquire @of1 (Consume, 3) : !aie.objectfifosubview> + %elemOne0 = aie.objectfifo.subview.access %subviewOne[0] : !aie.objectfifosubview> -> memref<16xi32> + %elemOne1 = aie.objectfifo.subview.access %subviewOne[1] : !aie.objectfifosubview> -> memref<16xi32> + %elemOne2 = aie.objectfifo.subview.access %subviewOne[2] : !aie.objectfifosubview> -> memref<16xi32> - %subviewTwo = AIE.objectfifo.acquire @of2 (Produce, 1) : !AIE.objectfifosubview> - %elemTwo0 = AIE.objectfifo.subview.access %subviewTwo[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewTwo = aie.objectfifo.acquire @of2 (Produce, 1) : !aie.objectfifosubview> + %elemTwo0 = aie.objectfifo.subview.access %subviewTwo[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @firstFilterThreeLines(%elemOne0, %elemOne1, %elemOne2, %elemTwo0) : (memref<16xi32>, memref<16xi32>, memref<16xi32>, memref<16xi32>) -> () - AIE.objectfifo.release @of1 (Consume, 1) - AIE.objectfifo.release @of2 (Produce, 1) + aie.objectfifo.release @of1 (Consume, 1) + aie.objectfifo.release @of2 (Produce, 1) } // Bottom Border - %subviewOneBottom = AIE.objectfifo.acquire @of1 (Consume, 2) : !AIE.objectfifosubview> - %elemOneBottom0 = AIE.objectfifo.subview.access %subviewOneBottom[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elemOneBottom1 = AIE.objectfifo.subview.access %subviewOneBottom[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewOneBottom = aie.objectfifo.acquire @of1 (Consume, 2) : !aie.objectfifosubview> + %elemOneBottom0 = aie.objectfifo.subview.access %subviewOneBottom[0] : !aie.objectfifosubview> -> memref<16xi32> + %elemOneBottom1 = aie.objectfifo.subview.access %subviewOneBottom[1] : !aie.objectfifosubview> -> memref<16xi32> - %subviewTwoBottom = AIE.objectfifo.acquire @of2 (Produce, 1) : !AIE.objectfifosubview> - %elemTwoBottom0 = AIE.objectfifo.subview.access %subviewTwoBottom[0] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewTwoBottom = aie.objectfifo.acquire @of2 (Produce, 1) : !aie.objectfifosubview> + %elemTwoBottom0 = aie.objectfifo.subview.access %subviewTwoBottom[0] : !aie.objectfifosubview> -> memref<16xi32> func.call @firstFilterTwoLines(%elemOneBottom0, %elemOneBottom1, %elemTwoBottom0) : (memref<16xi32>, memref<16xi32>, memref<16xi32>) -> () - AIE.objectfifo.release @of1 (Consume, 2) - AIE.objectfifo.release @of2 (Produce, 1) + aie.objectfifo.release @of1 (Consume, 2) + aie.objectfifo.release @of2 (Produce, 1) - AIE.end + aie.end } // Consumer of objFifoTwo - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %zero = arith.constant 0 : i32 %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %lineWidth = arith.constant 16 : index %height = arith.constant 9 : index - AIE.use_lock(%lock_out, "Acquire", 0) // acquire output buffer for produce + aie.use_lock(%lock_out, "Acquire", 0) // acquire output buffer for produce // Top Border - %subviewTop = AIE.objectfifo.acquire @of2 (Consume, 2) : !AIE.objectfifosubview> - %elemTop0 = AIE.objectfifo.subview.access %subviewTop[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elemTop1 = AIE.objectfifo.subview.access %subviewTop[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewTop = aie.objectfifo.acquire @of2 (Consume, 2) : !aie.objectfifosubview> + %elemTop0 = aie.objectfifo.subview.access %subviewTop[0] : !aie.objectfifosubview> -> memref<16xi32> + %elemTop1 = aie.objectfifo.subview.access %subviewTop[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @secondFilterTwoLines(%elemTop0, %elemTop1, %c0, %buff_out) : (memref<16xi32>, memref<16xi32>, index, memref<10x16xi32>) -> () // Middle scf.for %indexInHeight = %c1 to %height step %c1 { - %subview = AIE.objectfifo.acquire @of2 (Consume, 3) : !AIE.objectfifosubview> - %elem0 = AIE.objectfifo.subview.access %subview[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elem1 = AIE.objectfifo.subview.access %subview[1] : !AIE.objectfifosubview> -> memref<16xi32> - %elem2 = AIE.objectfifo.subview.access %subview[2] : !AIE.objectfifosubview> -> memref<16xi32> + %subview = aie.objectfifo.acquire @of2 (Consume, 3) : !aie.objectfifosubview> + %elem0 = aie.objectfifo.subview.access %subview[0] : !aie.objectfifosubview> -> memref<16xi32> + %elem1 = aie.objectfifo.subview.access %subview[1] : !aie.objectfifosubview> -> memref<16xi32> + %elem2 = aie.objectfifo.subview.access %subview[2] : !aie.objectfifosubview> -> memref<16xi32> func.call @secondFilterThreeLines(%elem0, %elem1, %elem2, %indexInHeight, %buff_out) : (memref<16xi32>, memref<16xi32>, memref<16xi32>, index, memref<10x16xi32>) -> () - AIE.objectfifo.release @of2 (Consume, 1) + aie.objectfifo.release @of2 (Consume, 1) } // Bottom Border - %subviewBottom = AIE.objectfifo.acquire @of2 (Consume, 2) : !AIE.objectfifosubview> - %elemBottom0 = AIE.objectfifo.subview.access %subviewBottom[0] : !AIE.objectfifosubview> -> memref<16xi32> - %elemBottom1 = AIE.objectfifo.subview.access %subviewBottom[1] : !AIE.objectfifosubview> -> memref<16xi32> + %subviewBottom = aie.objectfifo.acquire @of2 (Consume, 2) : !aie.objectfifosubview> + %elemBottom0 = aie.objectfifo.subview.access %subviewBottom[0] : !aie.objectfifosubview> -> memref<16xi32> + %elemBottom1 = aie.objectfifo.subview.access %subviewBottom[1] : !aie.objectfifosubview> -> memref<16xi32> func.call @secondFilterTwoLines(%elemBottom0, %elemBottom1, %height, %buff_out) : (memref<16xi32>, memref<16xi32>, index, memref<10x16xi32>) -> () - AIE.objectfifo.release @of2 (Consume, 2) + aie.objectfifo.release @of2 (Consume, 2) - AIE.use_lock(%lock_out, "Release", 1) // release output buffer for consume + aie.use_lock(%lock_out, "Release", 1) // release output buffer for consume - AIE.end + aie.end } } } diff --git a/test/python/aie_ops.py b/test/python/aie_ops.py index 9788e626cb..a058f5c25e 100644 --- a/test/python/aie_ops.py +++ b/test/python/aie_ops.py @@ -30,16 +30,16 @@ # CHECK-LABEL: tileOp -# CHECK: AIE.tile(0, 0) +# CHECK: aie.tile(0, 0) @construct_and_print_module def tileOp(): t = tile(col=0, row=0) # CHECK-LABEL: coreOp -# CHECK: %[[VAL1:.*]] = AIE.tile(1, 1) -# CHECK: %[[VAL2:.*]] = AIE.core(%[[VAL1]]) { -# CHECK: AIE.end +# CHECK: %[[VAL1:.*]] = aie.tile(1, 1) +# CHECK: %[[VAL2:.*]] = aie.core(%[[VAL1]]) { +# CHECK: aie.end # CHECK: } @construct_and_print_module def coreOp(): @@ -51,21 +51,22 @@ def coreOp(): # CHECK-LABEL: memOp -# CHECK: %[[VAL1:.*]] = AIE.tile(2, 2) -# CHECK: %[[VAL2:.*]] = AIE.mem(%[[VAL1]]) { -# CHECK: AIE.end +# CHECK: %[[VAL1:.*]] = aie.tile(2, 2) +# CHECK: %[[VAL2:.*]] = aie.mem(%[[VAL1]]) { +# CHECK: aie.end # CHECK: } @construct_and_print_module def memOp(): t = tile(col=2, row=2) m = MemOp(T.index(), t) + assert isinstance(m.result.owner.opview, MemOp) bb = Block.create_at_start(m.body) with InsertionPoint(bb): end() # CHECK-LABEL: deviceOp -# CHECK: AIE.device +# CHECK: aie.device @construct_and_print_module def deviceOp(): dev = Device(AIEDevice.xcvc1902) @@ -75,8 +76,8 @@ def deviceOp(): # CHECK-LABEL: bufferOp -# CHECK: %[[VAL_0:.*]] = AIE.tile(0, 3) -# CHECK: %[[VAL_1:.*]] = AIE.buffer(%[[VAL_0]]) : memref<12xi32> +# CHECK: %[[VAL_0:.*]] = aie.tile(0, 3) +# CHECK: %[[VAL_1:.*]] = aie.buffer(%[[VAL_0]]) : memref<12xi32> @construct_and_print_module def bufferOp(): t = tile(col=0, row=3) @@ -84,16 +85,16 @@ def bufferOp(): # CHECK-LABEL: externalBufferOp -# CHECK: %[[VAL_0:.*]] = AIE.external_buffer : memref<12xi32> +# CHECK: %[[VAL_0:.*]] = aie.external_buffer : memref<12xi32> @construct_and_print_module def externalBufferOp(): b = ExternalBuffer(size=(12,), datatype=T.i32()) # CHECK-LABEL: objFifo -# CHECK: %[[VAL0:.*]] = AIE.tile(6, 6) -# CHECK: %[[VAL1:.*]] = AIE.tile(2, 2) -# CHECK: AIE.objectfifo @of0(%[[VAL0]] toStream [], {%[[VAL1]] fromStream []}, 2 : i32) : !AIE.objectfifo> +# CHECK: %[[VAL0:.*]] = aie.tile(6, 6) +# CHECK: %[[VAL1:.*]] = aie.tile(2, 2) +# CHECK: aie.objectfifo @of0(%[[VAL0]] toStream [], {%[[VAL1]] fromStream []}, 2 : i32) : !aie.objectfifo> @construct_and_print_module def objFifo(): dev = Device(AIEDevice.xcvc1902) @@ -114,12 +115,12 @@ def objFifo(): # CHECK-LABEL: objFifoLink -# CHECK: %[[VAL_0:.*]] = AIE.tile(6, 6) -# CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -# CHECK: %[[VAL_2:.*]] = AIE.tile(7, 7) -# CHECK: AIE.objectfifo @[[VAL_3:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @[[VAL_4:.*]](%[[VAL_1]], {%[[VAL_2]]}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo.link [@[[VAL_3]]] -> [@[[VAL_4]]]() +# CHECK: %[[VAL_0:.*]] = aie.tile(6, 6) +# CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +# CHECK: %[[VAL_2:.*]] = aie.tile(7, 7) +# CHECK: aie.objectfifo @[[VAL_3:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @[[VAL_4:.*]](%[[VAL_1]], {%[[VAL_2]]}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo.link [@[[VAL_3]]] -> [@[[VAL_4]]]() @construct_and_print_module def objFifoLink(): dev = Device(AIEDevice.xcvc1902) @@ -151,10 +152,10 @@ def objFifoLink(): # CHECK-LABEL: objFifoAcquire -# CHECK: %[[VAL_0:.*]] = AIE.tile(6, 6) -# CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -# CHECK: AIE.objectfifo @[[VAL_2:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !AIE.objectfifo> -# CHECK: %[[VAL_3:.*]] = AIE.objectfifo.acquire @[[VAL_2]](Consume, 1) : !AIE.objectfifosubview> +# CHECK: %[[VAL_0:.*]] = aie.tile(6, 6) +# CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +# CHECK: aie.objectfifo @[[VAL_2:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !aie.objectfifo> +# CHECK: %[[VAL_3:.*]] = aie.objectfifo.acquire @[[VAL_2]](Consume, 1) : !aie.objectfifosubview> @construct_and_print_module def objFifoAcquire(): dev = Device(AIEDevice.xcvc1902) @@ -184,11 +185,11 @@ def objFifoAcquire(): # CHECK-LABEL: objFifoSubviewAccess -# CHECK: %[[VAL_0:.*]] = AIE.tile(6, 6) -# CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -# CHECK: AIE.objectfifo @[[VAL_2:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !AIE.objectfifo> -# CHECK: %[[VAL_3:.*]] = AIE.objectfifo.acquire @[[VAL_2]](Consume, 1) : !AIE.objectfifosubview> -# CHECK: %[[VAL_4:.*]] = AIE.objectfifo.subview.access %[[VAL_3]][0] : !AIE.objectfifosubview> -> memref<12xf16> +# CHECK: %[[VAL_0:.*]] = aie.tile(6, 6) +# CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +# CHECK: aie.objectfifo @[[VAL_2:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !aie.objectfifo> +# CHECK: %[[VAL_3:.*]] = aie.objectfifo.acquire @[[VAL_2]](Consume, 1) : !aie.objectfifosubview> +# CHECK: %[[VAL_4:.*]] = aie.objectfifo.subview.access %[[VAL_3]][0] : !aie.objectfifosubview> -> memref<12xf16> @construct_and_print_module def objFifoSubviewAccess(): dev = Device(AIEDevice.xcvc1902) @@ -221,10 +222,10 @@ def objFifoSubviewAccess(): # CHECK-LABEL: objFifoRelease -# CHECK: %[[VAL_0:.*]] = AIE.tile(6, 6) -# CHECK: %[[VAL_1:.*]] = AIE.tile(2, 2) -# CHECK: AIE.objectfifo @[[VAL_2:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo.release @[[VAL_2]](Produce, 1) +# CHECK: %[[VAL_0:.*]] = aie.tile(6, 6) +# CHECK: %[[VAL_1:.*]] = aie.tile(2, 2) +# CHECK: aie.objectfifo @[[VAL_2:.*]](%[[VAL_0]], {%[[VAL_1]]}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo.release @[[VAL_2]](Produce, 1) @construct_and_print_module def objFifoRelease(): dev = Device(AIEDevice.xcvc1902) @@ -250,9 +251,9 @@ def objFifoRelease(): # CHECK-LABEL: test_module_context # CHECK: module { -# CHECK: %tile_1_1 = AIE.tile(1, 1) -# CHECK: %core_1_1 = AIE.core(%tile_1_1) { -# CHECK: AIE.end +# CHECK: %tile_1_1 = aie.tile(1, 1) +# CHECK: %core_1_1 = aie.core(%tile_1_1) { +# CHECK: aie.end # CHECK: } # CHECK: } def test_module_context(): diff --git a/test/python/aiecc_simple.py b/test/python/aiecc_simple.py index ec23b6360e..c8a9331276 100644 --- a/test/python/aiecc_simple.py +++ b/test/python/aiecc_simple.py @@ -12,13 +12,13 @@ module = """ module { - %12 = AIE.tile(1, 2) - %buf = AIE.buffer(%12) : memref<256xi32> - %4 = AIE.core(%12) { + %12 = aie.tile(1, 2) + %buf = aie.buffer(%12) : memref<256xi32> + %4 = aie.core(%12) { %0 = arith.constant 0 : i32 %1 = arith.constant 0 : index memref.store %0, %buf[%1] : memref<256xi32> - AIE.end + aie.end } } """ diff --git a/test/python/aiex_ops.py b/test/python/aiex_ops.py index 442156b02e..4cf731154a 100644 --- a/test/python/aiex_ops.py +++ b/test/python/aiex_ops.py @@ -10,7 +10,7 @@ # CHECK-LABEL: getTileOp -# CHECK: AIEX.getTile +# CHECK: aiex.getTile @construct_and_print_module def getTileOp(): four = arith.constant(4, index=True) diff --git a/test/python/code_region.py b/test/python/code_region.py index 3af1b84785..1d9534440e 100644 --- a/test/python/code_region.py +++ b/test/python/code_region.py @@ -26,25 +26,25 @@ # CHECK: module { -# CHECK: AIE.device(xcve2802) { +# CHECK: aie.device(xcve2802) { # CHECK: func.func private @test_func(memref<8x8xi32>) -> i32 -# CHECK: %tile_0_2 = AIE.tile(0, 2) -# CHECK: %tile_1_2 = AIE.tile(1, 2) -# CHECK: %tile_3_3 = AIE.tile(3, 3) -# CHECK: AIE.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @of1(%tile_1_2, {%tile_3_3}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo.link [@of0] -> [@of1]() -# CHECK: %core_3_3 = AIE.core(%tile_3_3) { +# CHECK: %tile_0_2 = aie.tile(0, 2) +# CHECK: %tile_1_2 = aie.tile(1, 2) +# CHECK: %tile_3_3 = aie.tile(3, 3) +# CHECK: aie.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @of1(%tile_1_2, {%tile_3_3}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo.link [@of0] -> [@of1]() +# CHECK: %core_3_3 = aie.core(%tile_3_3) { # CHECK: %c0 = arith.constant 0 : index # CHECK: %c10 = arith.constant 10 : index # CHECK: %c1 = arith.constant 1 : index # CHECK: scf.for %arg0 = %c0 to %c10 step %c1 { -# CHECK: %0 = AIE.objectfifo.acquire @of1(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<8x8xi32> +# CHECK: %0 = aie.objectfifo.acquire @of1(Consume, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<8x8xi32> # CHECK: %2 = func.call @test_func(%1) : (memref<8x8xi32>) -> i32 -# CHECK: AIE.objectfifo.release @of1(Consume, 1) +# CHECK: aie.objectfifo.release @of1(Consume, 1) # CHECK: } -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } {link_with = "test.o"} # CHECK: } # CHECK: } diff --git a/test/python/core_ext_kernel.py b/test/python/core_ext_kernel.py index 2c8aa94609..7acf045f62 100644 --- a/test/python/core_ext_kernel.py +++ b/test/python/core_ext_kernel.py @@ -4,7 +4,6 @@ # RUN: %python %s | FileCheck %s import aie.extras.types as T -from aie.dialects._AIE_ops_gen import end from aie.dialects.aie import ( AIEDevice, Call, @@ -18,6 +17,7 @@ objectfifo_link, objectfifo_release, tile, + end, ) from aie.extras.dialects.ext import arith from aie.dialects.scf import for_, yield_ @@ -29,26 +29,26 @@ # CHECK: module { -# CHECK: AIE.device(xcve2802) { +# CHECK: aie.device(xcve2802) { # CHECK: func.func private @test_func(memref<8x8xi32>, i32) -> i32 -# CHECK: %tile_0_2 = AIE.tile(0, 2) -# CHECK: %tile_1_2 = AIE.tile(1, 2) -# CHECK: %tile_3_3 = AIE.tile(3, 3) -# CHECK: AIE.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @of1(%tile_1_2, {%tile_3_3}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo.link [@of0] -> [@of1]() -# CHECK: %core_3_3 = AIE.core(%tile_3_3) { +# CHECK: %tile_0_2 = aie.tile(0, 2) +# CHECK: %tile_1_2 = aie.tile(1, 2) +# CHECK: %tile_3_3 = aie.tile(3, 3) +# CHECK: aie.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @of1(%tile_1_2, {%tile_3_3}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo.link [@of0] -> [@of1]() +# CHECK: %core_3_3 = aie.core(%tile_3_3) { # CHECK: %c0 = arith.constant 0 : index # CHECK: %c10 = arith.constant 10 : index # CHECK: %c1 = arith.constant 1 : index # CHECK: scf.for %arg0 = %c0 to %c10 step %c1 { -# CHECK: %0 = AIE.objectfifo.acquire @of1(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<8x8xi32> +# CHECK: %0 = aie.objectfifo.acquire @of1(Consume, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<8x8xi32> # CHECK: %c4_i32 = arith.constant 4 : i32 # CHECK: %2 = func.call @test_func(%1, %c4_i32) : (memref<8x8xi32>, i32) -> i32 -# CHECK: AIE.objectfifo.release @of1(Consume, 1) +# CHECK: aie.objectfifo.release @of1(Consume, 1) # CHECK: } -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } {link_with = "test.o"} # CHECK: } # CHECK: } diff --git a/test/python/ipu.py b/test/python/ipu.py index e3a6f29ba9..cd9bca882e 100644 --- a/test/python/ipu.py +++ b/test/python/ipu.py @@ -46,37 +46,37 @@ def construct_and_print_module(f): # CHECK-LABEL: my_vector_scalar # CHECK: module { -# CHECK: AIE.device(ipu) { +# CHECK: aie.device(ipu) { # CHECK: func.func private @scale_int32(memref<1024xi32>, memref<1024xi32>) -# CHECK: %tile_0_0 = AIE.tile(0, 0) -# CHECK: %tile_0_2 = AIE.tile(0, 2) -# CHECK: AIE.objectfifo @in(%tile_0_0, {%tile_0_2}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @out(%tile_0_2, {%tile_0_0}, 2 : i32) : !AIE.objectfifo> -# CHECK: %core_0_2 = AIE.core(%tile_0_2) { +# CHECK: %tile_0_0 = aie.tile(0, 0) +# CHECK: %tile_0_2 = aie.tile(0, 2) +# CHECK: aie.objectfifo @in(%tile_0_0, {%tile_0_2}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @out(%tile_0_2, {%tile_0_0}, 2 : i32) : !aie.objectfifo> +# CHECK: %core_0_2 = aie.core(%tile_0_2) { # CHECK: %c4 = arith.constant 4 : index # CHECK: %c0 = arith.constant 0 : index # CHECK: %c4294967295 = arith.constant 4294967295 : index # CHECK: %c1 = arith.constant 1 : index # CHECK: scf.for %arg0 = %c0 to %c4294967295 step %c1 { # CHECK: scf.for %arg1 = %c0 to %c4 step %c1 { -# CHECK: %0 = AIE.objectfifo.acquire @out(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<1024xi32> -# CHECK: %2 = AIE.objectfifo.acquire @in(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %3 = AIE.objectfifo.subview.access %2[0] : !AIE.objectfifosubview> -> memref<1024xi32> +# CHECK: %0 = aie.objectfifo.acquire @out(Produce, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<1024xi32> +# CHECK: %2 = aie.objectfifo.acquire @in(Consume, 1) : !aie.objectfifosubview> +# CHECK: %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview> -> memref<1024xi32> # CHECK: func.call @scale_int32(%3, %1) : (memref<1024xi32>, memref<1024xi32>) -> () -# CHECK: AIE.objectfifo.release @in(Consume, 1) -# CHECK: AIE.objectfifo.release @out(Produce, 1) +# CHECK: aie.objectfifo.release @in(Consume, 1) +# CHECK: aie.objectfifo.release @out(Produce, 1) # CHECK: } # CHECK: } -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } {link_with = "scale.o"} # CHECK: func.func @sequence(%arg0: memref<4096xi32>, %arg1: memref<4096xi32>, %arg2: memref<4096xi32>) { # CHECK: %c0_i32 = arith.constant 0 : i32 # CHECK: %c1_i32 = arith.constant 1 : i32 # CHECK: %c4096_i32 = arith.constant 4096 : i32 -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg2[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c1_i32, %c4096_i32] [%c0_i32, %c0_i32, %c0_i32]) {id = 0 : i32, metadata = @out} : (i32, i32, memref<4096xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c1_i32, %c4096_i32] [%c0_i32, %c0_i32, %c0_i32]) {id = 1 : i32, metadata = @in} : (i32, i32, memref<4096xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg2[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c1_i32, %c4096_i32] [%c0_i32, %c0_i32, %c0_i32]) {id = 0 : i32, metadata = @out} : (i32, i32, memref<4096xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c1_i32, %c4096_i32] [%c0_i32, %c0_i32, %c0_i32]) {id = 1 : i32, metadata = @in} : (i32, i32, memref<4096xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} # CHECK: return # CHECK: } # CHECK: } @@ -148,39 +148,39 @@ def sequence(A, B, C): # CHECK-LABEL: my_matmul # CHECK: module { -# CHECK: AIE.device(ipu) { +# CHECK: aie.device(ipu) { # CHECK: func.func private @zero_scalar_i16(memref<64x64xi16>) # CHECK: func.func private @zero_i16(memref<64x64xi16>) # CHECK: func.func private @matmul_scalar_i16_i16(memref<64x32xi16>, memref<32x64xi16>, memref<64x64xi16>) # CHECK: func.func private @matmul_i16_i16(memref<64x32xi16>, memref<32x64xi16>, memref<64x64xi16>) -# CHECK: %tile_0_0 = AIE.tile(0, 0) -# CHECK: %tile_0_2 = AIE.tile(0, 2) -# CHECK: AIE.objectfifo @inA(%tile_0_0, {%tile_0_2}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @inB(%tile_0_0, {%tile_0_2}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @outC(%tile_0_2, {%tile_0_0}, 2 : i32) : !AIE.objectfifo> -# CHECK: %core_0_2 = AIE.core(%tile_0_2) { +# CHECK: %tile_0_0 = aie.tile(0, 0) +# CHECK: %tile_0_2 = aie.tile(0, 2) +# CHECK: aie.objectfifo @inA(%tile_0_0, {%tile_0_2}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @inB(%tile_0_0, {%tile_0_2}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @outC(%tile_0_2, {%tile_0_0}, 2 : i32) : !aie.objectfifo> +# CHECK: %core_0_2 = aie.core(%tile_0_2) { # CHECK: %c4 = arith.constant 4 : index # CHECK: %c0 = arith.constant 0 : index # CHECK: %c4294967295 = arith.constant 4294967295 : index # CHECK: %c1 = arith.constant 1 : index # CHECK: scf.for %arg0 = %c0 to %c4294967295 step %c1 { # CHECK: scf.for %arg1 = %c0 to %c4 step %c1 { -# CHECK: %0 = AIE.objectfifo.acquire @outC(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<64x64xi16> +# CHECK: %0 = aie.objectfifo.acquire @outC(Produce, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<64x64xi16> # CHECK: func.call @zero_i16(%1) : (memref<64x64xi16>) -> () # CHECK: scf.for %arg2 = %c0 to %c4 step %c1 { -# CHECK: %2 = AIE.objectfifo.acquire @inA(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %3 = AIE.objectfifo.subview.access %2[0] : !AIE.objectfifosubview> -> memref<64x32xi16> -# CHECK: %4 = AIE.objectfifo.acquire @inB(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %5 = AIE.objectfifo.subview.access %4[0] : !AIE.objectfifosubview> -> memref<32x64xi16> +# CHECK: %2 = aie.objectfifo.acquire @inA(Consume, 1) : !aie.objectfifosubview> +# CHECK: %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview> -> memref<64x32xi16> +# CHECK: %4 = aie.objectfifo.acquire @inB(Consume, 1) : !aie.objectfifosubview> +# CHECK: %5 = aie.objectfifo.subview.access %4[0] : !aie.objectfifosubview> -> memref<32x64xi16> # CHECK: func.call @matmul_i16_i16(%3, %5, %1) : (memref<64x32xi16>, memref<32x64xi16>, memref<64x64xi16>) -> () -# CHECK: AIE.objectfifo.release @inA(Consume, 1) -# CHECK: AIE.objectfifo.release @inB(Consume, 1) +# CHECK: aie.objectfifo.release @inA(Consume, 1) +# CHECK: aie.objectfifo.release @inB(Consume, 1) # CHECK: } -# CHECK: AIE.objectfifo.release @outC(Produce, 1) +# CHECK: aie.objectfifo.release @outC(Produce, 1) # CHECK: } # CHECK: } -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } {link_with = "mm.o"} # CHECK: func.func @sequence(%arg0: memref<8192xi32>, %arg1: memref<8192xi32>, %arg2: memref<8192xi32>) { # CHECK: %c2048_i32 = arith.constant 2048 : i32 @@ -191,12 +191,12 @@ def sequence(A, B, C): # CHECK: %c64_i32 = arith.constant 64 : i32 # CHECK: %c32_i32 = arith.constant 32 : i32 # CHECK: %c4096_i32 = arith.constant 4096 : i32 -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg2[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c2_i32, %c64_i32, %c32_i32] [%c4096_i32, %c32_i32, %c64_i32]) {id = 0 : i32, metadata = @outC} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c4_i32, %c64_i32, %c16_i32] [%c0_i32, %c16_i32, %c64_i32]) {id = 1 : i32, metadata = @inA} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg1[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c4_i32, %c32_i32, %c32_i32] [%c32_i32, %c2048_i32, %c64_i32]) {id = 2 : i32, metadata = @inB} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c4096_i32] [%c2_i32, %c4_i32, %c64_i32, %c16_i32] [%c0_i32, %c16_i32, %c64_i32]) {id = 3 : i32, metadata = @inA} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg1[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c4_i32, %c32_i32, %c32_i32] [%c32_i32, %c2048_i32, %c64_i32]) {id = 4 : i32, metadata = @inB} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg2[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c2_i32, %c64_i32, %c32_i32] [%c4096_i32, %c32_i32, %c64_i32]) {id = 0 : i32, metadata = @outC} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c4_i32, %c64_i32, %c16_i32] [%c0_i32, %c16_i32, %c64_i32]) {id = 1 : i32, metadata = @inA} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg1[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c4_i32, %c32_i32, %c32_i32] [%c32_i32, %c2048_i32, %c64_i32]) {id = 2 : i32, metadata = @inB} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c4096_i32] [%c2_i32, %c4_i32, %c64_i32, %c16_i32] [%c0_i32, %c16_i32, %c64_i32]) {id = 3 : i32, metadata = @inA} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg1[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c2_i32, %c4_i32, %c32_i32, %c32_i32] [%c32_i32, %c2048_i32, %c64_i32]) {id = 4 : i32, metadata = @inB} : (i32, i32, memref<8192xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} # CHECK: return # CHECK: } # CHECK: } @@ -377,45 +377,45 @@ def sequence(A, B, C): # CHECK-LABEL: edge_detect # CHECK: module { -# CHECK: AIE.device(ipu) { +# CHECK: aie.device(ipu) { # CHECK: func.func private @rgba2gray_line(memref<256xui8>, memref<64xui8>, i32) # CHECK: func.func private @filter2d_line(memref<64xui8>, memref<64xui8>, memref<64xui8>, memref<64xui8>, i32, memref<3x3xi16>) # CHECK: func.func private @threshold_line(memref<64xui8>, memref<64xui8>, i32, i16, i16, i8) # CHECK: func.func private @gray2rgba_line(memref<64xui8>, memref<256xui8>, i32) # CHECK: func.func private @add_weighted_line(memref<256xui8>, memref<256xui8>, memref<256xui8>, i32, i16, i16, i8) -# CHECK: %tile_0_0 = AIE.tile(0, 0) -# CHECK: %tile_0_1 = AIE.tile(0, 1) -# CHECK: %tile_0_2 = AIE.tile(0, 2) -# CHECK: %tile_0_3 = AIE.tile(0, 3) -# CHECK: %tile_0_4 = AIE.tile(0, 4) -# CHECK: %tile_0_5 = AIE.tile(0, 5) -# CHECK: AIE.objectfifo @inOF_L3L2(%tile_0_0, {%tile_0_1}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @inOF_L2L1(%tile_0_1, {%tile_0_2, %tile_0_5}, [2 : i32, 2 : i32, 7 : i32]) : !AIE.objectfifo> -# CHECK: AIE.objectfifo.link [@inOF_L3L2] -> [@inOF_L2L1]() -# CHECK: AIE.objectfifo @outOF_L2L3(%tile_0_1, {%tile_0_0}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @outOF_L1L2(%tile_0_5, {%tile_0_1}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo.link [@outOF_L1L2] -> [@outOF_L2L3]() -# CHECK: AIE.objectfifo @OF_2to3(%tile_0_2, {%tile_0_3}, 4 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @OF_3to4(%tile_0_3, {%tile_0_4}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @OF_4to5(%tile_0_4, {%tile_0_5}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @OF_5to5(%tile_0_5, {%tile_0_5}, 1 : i32) : !AIE.objectfifo> -# CHECK: %core_0_2 = AIE.core(%tile_0_2) { +# CHECK: %tile_0_0 = aie.tile(0, 0) +# CHECK: %tile_0_1 = aie.tile(0, 1) +# CHECK: %tile_0_2 = aie.tile(0, 2) +# CHECK: %tile_0_3 = aie.tile(0, 3) +# CHECK: %tile_0_4 = aie.tile(0, 4) +# CHECK: %tile_0_5 = aie.tile(0, 5) +# CHECK: aie.objectfifo @inOF_L3L2(%tile_0_0, {%tile_0_1}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @inOF_L2L1(%tile_0_1, {%tile_0_2, %tile_0_5}, [2 : i32, 2 : i32, 7 : i32]) : !aie.objectfifo> +# CHECK: aie.objectfifo.link [@inOF_L3L2] -> [@inOF_L2L1]() +# CHECK: aie.objectfifo @outOF_L2L3(%tile_0_1, {%tile_0_0}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @outOF_L1L2(%tile_0_5, {%tile_0_1}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo.link [@outOF_L1L2] -> [@outOF_L2L3]() +# CHECK: aie.objectfifo @OF_2to3(%tile_0_2, {%tile_0_3}, 4 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @OF_3to4(%tile_0_3, {%tile_0_4}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @OF_4to5(%tile_0_4, {%tile_0_5}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @OF_5to5(%tile_0_5, {%tile_0_5}, 1 : i32) : !aie.objectfifo> +# CHECK: %core_0_2 = aie.core(%tile_0_2) { # CHECK: %c64_i32 = arith.constant 64 : i32 # CHECK: %c0 = arith.constant 0 : index # CHECK: %c36 = arith.constant 36 : index # CHECK: %c1 = arith.constant 1 : index # CHECK: scf.for %arg0 = %c0 to %c36 step %c1 { -# CHECK: %0 = AIE.objectfifo.acquire @inOF_L2L1(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<256xui8> -# CHECK: %2 = AIE.objectfifo.acquire @OF_2to3(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %3 = AIE.objectfifo.subview.access %2[0] : !AIE.objectfifosubview> -> memref<64xui8> +# CHECK: %0 = aie.objectfifo.acquire @inOF_L2L1(Consume, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<256xui8> +# CHECK: %2 = aie.objectfifo.acquire @OF_2to3(Produce, 1) : !aie.objectfifosubview> +# CHECK: %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview> -> memref<64xui8> # CHECK: func.call @rgba2gray_line(%1, %3, %c64_i32) : (memref<256xui8>, memref<64xui8>, i32) -> () -# CHECK: AIE.objectfifo.release @inOF_L2L1(Consume, 1) -# CHECK: AIE.objectfifo.release @OF_2to3(Produce, 1) +# CHECK: aie.objectfifo.release @inOF_L2L1(Consume, 1) +# CHECK: aie.objectfifo.release @OF_2to3(Produce, 1) # CHECK: } -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } {link_with = "rgba2gray.cc.o"} -# CHECK: %core_0_3 = AIE.core(%tile_0_3) { +# CHECK: %core_0_3 = aie.core(%tile_0_3) { # CHECK: %c35 = arith.constant 35 : index # CHECK: %c64_i32 = arith.constant 64 : i32 # CHECK: %c2 = arith.constant 2 : index @@ -434,35 +434,35 @@ def sequence(A, B, C): # CHECK: memref.store %c0_i16, %alloc[%c2, %c0] : memref<3x3xi16> # CHECK: memref.store %c4096_i16, %alloc[%c2, %c1] : memref<3x3xi16> # CHECK: memref.store %c0_i16, %alloc[%c2, %c2] : memref<3x3xi16> -# CHECK: %0 = AIE.objectfifo.acquire @OF_2to3(Consume, 2) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %2 = AIE.objectfifo.subview.access %0[1] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %3 = AIE.objectfifo.acquire @OF_3to4(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %4 = AIE.objectfifo.subview.access %3[0] : !AIE.objectfifosubview> -> memref<64xui8> +# CHECK: %0 = aie.objectfifo.acquire @OF_2to3(Consume, 2) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %2 = aie.objectfifo.subview.access %0[1] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %3 = aie.objectfifo.acquire @OF_3to4(Produce, 1) : !aie.objectfifosubview> +# CHECK: %4 = aie.objectfifo.subview.access %3[0] : !aie.objectfifosubview> -> memref<64xui8> # CHECK: func.call @filter2d_line(%1, %1, %2, %4, %c64_i32, %alloc) : (memref<64xui8>, memref<64xui8>, memref<64xui8>, memref<64xui8>, i32, memref<3x3xi16>) -> () -# CHECK: AIE.objectfifo.release @OF_3to4(Produce, 1) +# CHECK: aie.objectfifo.release @OF_3to4(Produce, 1) # CHECK: scf.for %arg0 = %c1 to %c35 step %c1 { -# CHECK: %10 = AIE.objectfifo.acquire @OF_2to3(Consume, 3) : !AIE.objectfifosubview> -# CHECK: %11 = AIE.objectfifo.subview.access %10[0] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %12 = AIE.objectfifo.subview.access %10[1] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %13 = AIE.objectfifo.subview.access %10[2] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %14 = AIE.objectfifo.acquire @OF_3to4(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %15 = AIE.objectfifo.subview.access %14[0] : !AIE.objectfifosubview> -> memref<64xui8> +# CHECK: %10 = aie.objectfifo.acquire @OF_2to3(Consume, 3) : !aie.objectfifosubview> +# CHECK: %11 = aie.objectfifo.subview.access %10[0] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %12 = aie.objectfifo.subview.access %10[1] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %13 = aie.objectfifo.subview.access %10[2] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %14 = aie.objectfifo.acquire @OF_3to4(Produce, 1) : !aie.objectfifosubview> +# CHECK: %15 = aie.objectfifo.subview.access %14[0] : !aie.objectfifosubview> -> memref<64xui8> # CHECK: func.call @filter2d_line(%11, %12, %13, %15, %c64_i32, %alloc) : (memref<64xui8>, memref<64xui8>, memref<64xui8>, memref<64xui8>, i32, memref<3x3xi16>) -> () -# CHECK: AIE.objectfifo.release @OF_2to3(Consume, 1) -# CHECK: AIE.objectfifo.release @OF_3to4(Produce, 1) +# CHECK: aie.objectfifo.release @OF_2to3(Consume, 1) +# CHECK: aie.objectfifo.release @OF_3to4(Produce, 1) # CHECK: } -# CHECK: %5 = AIE.objectfifo.acquire @OF_2to3(Consume, 2) : !AIE.objectfifosubview> -# CHECK: %6 = AIE.objectfifo.subview.access %5[0] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %7 = AIE.objectfifo.subview.access %5[1] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %8 = AIE.objectfifo.acquire @OF_3to4(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %9 = AIE.objectfifo.subview.access %8[0] : !AIE.objectfifosubview> -> memref<64xui8> +# CHECK: %5 = aie.objectfifo.acquire @OF_2to3(Consume, 2) : !aie.objectfifosubview> +# CHECK: %6 = aie.objectfifo.subview.access %5[0] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %7 = aie.objectfifo.subview.access %5[1] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %8 = aie.objectfifo.acquire @OF_3to4(Produce, 1) : !aie.objectfifosubview> +# CHECK: %9 = aie.objectfifo.subview.access %8[0] : !aie.objectfifosubview> -> memref<64xui8> # CHECK: func.call @filter2d_line(%6, %7, %7, %9, %c64_i32, %alloc) : (memref<64xui8>, memref<64xui8>, memref<64xui8>, memref<64xui8>, i32, memref<3x3xi16>) -> () -# CHECK: AIE.objectfifo.release @OF_2to3(Consume, 2) -# CHECK: AIE.objectfifo.release @OF_3to4(Produce, 1) -# CHECK: AIE.end +# CHECK: aie.objectfifo.release @OF_2to3(Consume, 2) +# CHECK: aie.objectfifo.release @OF_3to4(Produce, 1) +# CHECK: aie.end # CHECK: } {link_with = "filter2d.cc.o"} -# CHECK: %core_0_4 = AIE.core(%tile_0_4) { +# CHECK: %core_0_4 = aie.core(%tile_0_4) { # CHECK: %c64_i32 = arith.constant 64 : i32 # CHECK: %c10_i16 = arith.constant 10 : i16 # CHECK: %c255_i16 = arith.constant 255 : i16 @@ -471,17 +471,17 @@ def sequence(A, B, C): # CHECK: %c36 = arith.constant 36 : index # CHECK: %c1 = arith.constant 1 : index # CHECK: scf.for %arg0 = %c0 to %c36 step %c1 { -# CHECK: %0 = AIE.objectfifo.acquire @OF_3to4(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %2 = AIE.objectfifo.acquire @OF_4to5(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %3 = AIE.objectfifo.subview.access %2[0] : !AIE.objectfifosubview> -> memref<64xui8> +# CHECK: %0 = aie.objectfifo.acquire @OF_3to4(Consume, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %2 = aie.objectfifo.acquire @OF_4to5(Produce, 1) : !aie.objectfifosubview> +# CHECK: %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview> -> memref<64xui8> # CHECK: func.call @threshold_line(%1, %3, %c64_i32, %c10_i16, %c255_i16, %c0_i8) : (memref<64xui8>, memref<64xui8>, i32, i16, i16, i8) -> () -# CHECK: AIE.objectfifo.release @OF_3to4(Consume, 1) -# CHECK: AIE.objectfifo.release @OF_4to5(Produce, 1) +# CHECK: aie.objectfifo.release @OF_3to4(Consume, 1) +# CHECK: aie.objectfifo.release @OF_4to5(Produce, 1) # CHECK: } -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } {link_with = "threshold.cc.o"} -# CHECK: %core_0_5 = AIE.core(%tile_0_5) { +# CHECK: %core_0_5 = aie.core(%tile_0_5) { # CHECK: %c256_i32 = arith.constant 256 : i32 # CHECK: %c0_i8 = arith.constant 0 : i8 # CHECK: %c16384_i16 = arith.constant 16384 : i16 @@ -490,34 +490,34 @@ def sequence(A, B, C): # CHECK: %c36 = arith.constant 36 : index # CHECK: %c1 = arith.constant 1 : index # CHECK: scf.for %arg0 = %c0 to %c36 step %c1 { -# CHECK: %0 = AIE.objectfifo.acquire @OF_4to5(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<64xui8> -# CHECK: %2 = AIE.objectfifo.acquire @OF_5to5(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %3 = AIE.objectfifo.subview.access %2[0] : !AIE.objectfifosubview> -> memref<256xui8> +# CHECK: %0 = aie.objectfifo.acquire @OF_4to5(Consume, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<64xui8> +# CHECK: %2 = aie.objectfifo.acquire @OF_5to5(Produce, 1) : !aie.objectfifosubview> +# CHECK: %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview> -> memref<256xui8> # CHECK: func.call @gray2rgba_line(%1, %3, %c64_i32) : (memref<64xui8>, memref<256xui8>, i32) -> () -# CHECK: AIE.objectfifo.release @OF_4to5(Consume, 1) -# CHECK: AIE.objectfifo.release @OF_5to5(Produce, 1) -# CHECK: %4 = AIE.objectfifo.acquire @OF_5to5(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %5 = AIE.objectfifo.subview.access %4[0] : !AIE.objectfifosubview> -> memref<256xui8> -# CHECK: %6 = AIE.objectfifo.acquire @inOF_L2L1(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %7 = AIE.objectfifo.subview.access %6[0] : !AIE.objectfifosubview> -> memref<256xui8> -# CHECK: %8 = AIE.objectfifo.acquire @outOF_L1L2(Produce, 1) : !AIE.objectfifosubview> -# CHECK: %9 = AIE.objectfifo.subview.access %8[0] : !AIE.objectfifosubview> -> memref<256xui8> +# CHECK: aie.objectfifo.release @OF_4to5(Consume, 1) +# CHECK: aie.objectfifo.release @OF_5to5(Produce, 1) +# CHECK: %4 = aie.objectfifo.acquire @OF_5to5(Consume, 1) : !aie.objectfifosubview> +# CHECK: %5 = aie.objectfifo.subview.access %4[0] : !aie.objectfifosubview> -> memref<256xui8> +# CHECK: %6 = aie.objectfifo.acquire @inOF_L2L1(Consume, 1) : !aie.objectfifosubview> +# CHECK: %7 = aie.objectfifo.subview.access %6[0] : !aie.objectfifosubview> -> memref<256xui8> +# CHECK: %8 = aie.objectfifo.acquire @outOF_L1L2(Produce, 1) : !aie.objectfifosubview> +# CHECK: %9 = aie.objectfifo.subview.access %8[0] : !aie.objectfifosubview> -> memref<256xui8> # CHECK: func.call @add_weighted_line(%5, %7, %9, %c256_i32, %c16384_i16, %c16384_i16, %c0_i8) : (memref<256xui8>, memref<256xui8>, memref<256xui8>, i32, i16, i16, i8) -> () -# CHECK: AIE.objectfifo.release @OF_5to5(Consume, 1) -# CHECK: AIE.objectfifo.release @inOF_L2L1(Consume, 1) -# CHECK: AIE.objectfifo.release @outOF_L1L2(Produce, 1) +# CHECK: aie.objectfifo.release @OF_5to5(Consume, 1) +# CHECK: aie.objectfifo.release @inOF_L2L1(Consume, 1) +# CHECK: aie.objectfifo.release @outOF_L1L2(Produce, 1) # CHECK: } -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } {link_with = "combined_gray2rgba_addWeighted.a"} # CHECK: func.func @sequence(%arg0: memref<2304xi32>, %arg1: memref<2304xi32>, %arg2: memref<2304xi32>) { # CHECK: %c0_i32 = arith.constant 0 : i32 # CHECK: %c1_i32 = arith.constant 1 : i32 # CHECK: %c36_i32 = arith.constant 36 : i32 # CHECK: %c64_i32 = arith.constant 64 : i32 -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg2[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c36_i32, %c64_i32] [%c0_i32, %c0_i32, %c64_i32]) {id = 0 : i32, metadata = @outOF_L2L3} : (i32, i32, memref<2304xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c36_i32, %c64_i32] [%c0_i32, %c0_i32, %c64_i32]) {id = 1 : i32, metadata = @inOF_L3L2} : (i32, i32, memref<2304xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) -# CHECK: AIEX.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg2[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c36_i32, %c64_i32] [%c0_i32, %c0_i32, %c64_i32]) {id = 0 : i32, metadata = @outOF_L2L3} : (i32, i32, memref<2304xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.dma_memcpy_nd(%c0_i32, %c0_i32, %arg0[%c0_i32, %c0_i32, %c0_i32, %c0_i32] [%c1_i32, %c1_i32, %c36_i32, %c64_i32] [%c0_i32, %c0_i32, %c64_i32]) {id = 1 : i32, metadata = @inOF_L3L2} : (i32, i32, memref<2304xi32>, [i32, i32, i32, i32], [i32, i32, i32, i32], [i32, i32, i32]) +# CHECK: aiex.ipu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} # CHECK: return # CHECK: } # CHECK: } @@ -844,46 +844,46 @@ def sequence(I, B, O): # CHECK-LABEL: my_add_one_objFifo # module { -# AIE.device(ipu) { -# %t00 = AIE.tile(0, 0) -# %t01 = AIE.tile(0, 1) -# %t02 = AIE.tile(0, 2) +# aie.device(ipu) { +# %t00 = aie.tile(0, 0) +# %t01 = aie.tile(0, 1) +# %t02 = aie.tile(0, 2) # -# AIE.objectfifo @objFifo_in0(%t00, {%t01}, 2 : i32) : !AIE.objectfifo> -# AIE.objectfifo @objFifo_in1(%t01, {%t02}, 2 : i32) : !AIE.objectfifo> -# AIE.objectfifo.link [@objFifo_in0] -> [@objFifo_in1] () -# AIE.objectfifo @objFifo_out0(%t01, {%t00}, 2 : i32) : !AIE.objectfifo> -# AIE.objectfifo @objFifo_out1(%t02, {%t01}, 2 : i32) : !AIE.objectfifo> -# AIE.objectfifo.link [@objFifo_out1] -> [@objFifo_out0] () +# aie.objectfifo @objFifo_in0(%t00, {%t01}, 2 : i32) : !aie.objectfifo> +# aie.objectfifo @objFifo_in1(%t01, {%t02}, 2 : i32) : !aie.objectfifo> +# aie.objectfifo.link [@objFifo_in0] -> [@objFifo_in1] () +# aie.objectfifo @objFifo_out0(%t01, {%t00}, 2 : i32) : !aie.objectfifo> +# aie.objectfifo @objFifo_out1(%t02, {%t01}, 2 : i32) : !aie.objectfifo> +# aie.objectfifo.link [@objFifo_out1] -> [@objFifo_out0] () # -# AIE.core(%t02) { +# aie.core(%t02) { # %c8 = arith.constant 8 : index # %c0 = arith.constant 0 : index # %c1 = arith.constant 1 : index # %c1_32 = arith.constant 1 : i32 # # scf.for %steps = %c0 to %c8 step %c1 { -# %subview0 = AIE.objectfifo.acquire @objFifo_in1(Consume, 1) : !AIE.objectfifosubview> -# %elem0 = AIE.objectfifo.subview.access %subview0[0] : !AIE.objectfifosubview> -> memref<8xi32> -# %subview1 = AIE.objectfifo.acquire @objFifo_out1(Produce, 1) : !AIE.objectfifosubview> -# %elem1 = AIE.objectfifo.subview.access %subview1[0] : !AIE.objectfifosubview> -> memref<8xi32> +# %subview0 = aie.objectfifo.acquire @objFifo_in1(Consume, 1) : !aie.objectfifosubview> +# %elem0 = aie.objectfifo.subview.access %subview0[0] : !aie.objectfifosubview> -> memref<8xi32> +# %subview1 = aie.objectfifo.acquire @objFifo_out1(Produce, 1) : !aie.objectfifosubview> +# %elem1 = aie.objectfifo.subview.access %subview1[0] : !aie.objectfifosubview> -> memref<8xi32> # scf.for %arg3 = %c0 to %c8 step %c1 { # %0 = memref.load %elem0[%arg3] : memref<8xi32> # %1 = arith.addi %0, %c1_32 : i32 # memref.store %1, %elem1[%arg3] : memref<8xi32> # } -# AIE.objectfifo.release @objFifo_in1(Consume, 1) -# AIE.objectfifo.release @objFifo_out1(Produce, 1) +# aie.objectfifo.release @objFifo_in1(Consume, 1) +# aie.objectfifo.release @objFifo_out1(Produce, 1) # } -# AIE.end +# aie.end # } # func.func @sequence(%in : memref<64xi32>, %buf : memref<32xi32>, %out : memref<64xi32>) { # %c0 = arith.constant 0 : i32 # %c1 = arith.constant 1 : i32 # %c64 = arith.constant 64 : i32 -# AIEX.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_out0, id = 1 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) -# AIEX.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_in0, id = 0 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) -# AIEX.ipu.sync { column = 0 : i32, row = 0 : i32, direction = 0 : i32, channel = 0 : i32, column_num = 1 : i32, row_num = 1 : i32 } +# aiex.ipu.dma_memcpy_nd (%c0, %c0, %out[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_out0, id = 1 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) +# aiex.ipu.dma_memcpy_nd (%c0, %c0, %in[%c0,%c0,%c0,%c0][%c1,%c1,%c1,%c64][%c0,%c0,%c0]) { metadata = @objFifo_in0, id = 0 : i32 } : (i32, i32, memref<64xi32>, [i32,i32,i32,i32], [i32,i32,i32,i32], [i32,i32,i32]) +# aiex.ipu.sync { column = 0 : i32, row = 0 : i32, direction = 0 : i32, channel = 0 : i32, column_num = 1 : i32, row_num = 1 : i32 } # return # } # } diff --git a/test/python/objFifo.py b/test/python/objFifo.py index 73f2f84365..6a9a093a80 100644 --- a/test/python/objFifo.py +++ b/test/python/objFifo.py @@ -23,18 +23,18 @@ # CHECK: module { -# CHECK: AIE.device(xcve2302) { -# CHECK: %tile_0_2 = AIE.tile(0, 2) -# CHECK: %tile_1_2 = AIE.tile(1, 2) -# CHECK: AIE.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !AIE.objectfifo> -# CHECK: %core_1_2 = AIE.core(%tile_1_2) { -# CHECK: %0 = AIE.objectfifo.acquire @of0(Consume, 1) : !AIE.objectfifosubview> -# CHECK: %1 = AIE.objectfifo.subview.access %0[0] : !AIE.objectfifosubview> -> memref<256xi32> +# CHECK: aie.device(xcve2302) { +# CHECK: %tile_0_2 = aie.tile(0, 2) +# CHECK: %tile_1_2 = aie.tile(1, 2) +# CHECK: aie.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !aie.objectfifo> +# CHECK: %core_1_2 = aie.core(%tile_1_2) { +# CHECK: %0 = aie.objectfifo.acquire @of0(Consume, 1) : !aie.objectfifosubview> +# CHECK: %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview> -> memref<256xi32> # CHECK: %c10_i32 = arith.constant 10 : i32 # CHECK: %c0 = arith.constant 0 : index # CHECK: memref.store %c10_i32, %1[%c0] : memref<256xi32> -# CHECK: AIE.objectfifo.release @of0(Consume, 1) -# CHECK: AIE.end +# CHECK: aie.objectfifo.release @of0(Consume, 1) +# CHECK: aie.end # CHECK: } # CHECK: } # CHECK: } diff --git a/test/python/objFifo_link.py b/test/python/objFifo_link.py index 28d98d042b..66c4477638 100644 --- a/test/python/objFifo_link.py +++ b/test/python/objFifo_link.py @@ -19,15 +19,15 @@ # CHECK: module { -# CHECK: AIE.device(xcve2802) { -# CHECK: %tile_0_2 = AIE.tile(0, 2) -# CHECK: %tile_1_2 = AIE.tile(1, 2) -# CHECK: %tile_2_2 = AIE.tile(2, 2) -# CHECK: %tile_2_3 = AIE.tile(2, 3) -# CHECK: AIE.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo @of1(%tile_1_2, {%tile_2_2, %tile_2_3}, 2 : i32) : !AIE.objectfifo> -# CHECK: AIE.objectfifo.link [@of0] -> [@of1]() -# CHECK: AIE.objectfifo @of2(%tile_1_2 toStream [], {%tile_2_2 fromStream [], %tile_2_3 fromStream []}, [2 : i32, 2 : i32, 7 : i32]) : !AIE.objectfifo> +# CHECK: aie.device(xcve2802) { +# CHECK: %tile_0_2 = aie.tile(0, 2) +# CHECK: %tile_1_2 = aie.tile(1, 2) +# CHECK: %tile_2_2 = aie.tile(2, 2) +# CHECK: %tile_2_3 = aie.tile(2, 3) +# CHECK: aie.objectfifo @of0(%tile_0_2, {%tile_1_2}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo @of1(%tile_1_2, {%tile_2_2, %tile_2_3}, 2 : i32) : !aie.objectfifo> +# CHECK: aie.objectfifo.link [@of0] -> [@of1]() +# CHECK: aie.objectfifo @of2(%tile_1_2 toStream [], {%tile_2_2 fromStream [], %tile_2_3 fromStream []}, [2 : i32, 2 : i32, 7 : i32]) : !aie.objectfifo> # CHECK: } # CHECK: } @construct_and_print_module diff --git a/test/python/python_passes.py b/test/python/python_passes.py index 10b25b2204..da8552d8a2 100644 --- a/test/python/python_passes.py +++ b/test/python/python_passes.py @@ -44,33 +44,33 @@ def test_broadcast(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T03:.*]] = AIE.tile(0, 3) - # CHECK: %[[T02:.*]] = AIE.tile(0, 2) - # CHECK: %[[T00:.*]] = AIE.tile(0, 0) - # CHECK: %[[T13:.*]] = AIE.tile(1, 3) - # CHECK: %[[T11:.*]] = AIE.tile(1, 1) - # CHECK: %[[T10:.*]] = AIE.tile(1, 0) - # CHECK: %[[T20:.*]] = AIE.tile(2, 0) - # CHECK: %[[T30:.*]] = AIE.tile(3, 0) - # CHECK: %[[T22:.*]] = AIE.tile(2, 2) - # CHECK: %[[T31:.*]] = AIE.tile(3, 1) - # CHECK: %[[T60:.*]] = AIE.tile(6, 0) - # CHECK: %[[T70:.*]] = AIE.tile(7, 0) - # CHECK: %[[T71:.*]] = AIE.tile(7, 1) - # CHECK: %[[T72:.*]] = AIE.tile(7, 2) - # CHECK: %[[T73:.*]] = AIE.tile(7, 3) - # CHECK: %[[T80:.*]] = AIE.tile(8, 0) - # CHECK: %[[T82:.*]] = AIE.tile(8, 2) - # CHECK: %[[T83:.*]] = AIE.tile(8, 3) + # CHECK: %[[T03:.*]] = aie.tile(0, 3) + # CHECK: %[[T02:.*]] = aie.tile(0, 2) + # CHECK: %[[T00:.*]] = aie.tile(0, 0) + # CHECK: %[[T13:.*]] = aie.tile(1, 3) + # CHECK: %[[T11:.*]] = aie.tile(1, 1) + # CHECK: %[[T10:.*]] = aie.tile(1, 0) + # CHECK: %[[T20:.*]] = aie.tile(2, 0) + # CHECK: %[[T30:.*]] = aie.tile(3, 0) + # CHECK: %[[T22:.*]] = aie.tile(2, 2) + # CHECK: %[[T31:.*]] = aie.tile(3, 1) + # CHECK: %[[T60:.*]] = aie.tile(6, 0) + # CHECK: %[[T70:.*]] = aie.tile(7, 0) + # CHECK: %[[T71:.*]] = aie.tile(7, 1) + # CHECK: %[[T72:.*]] = aie.tile(7, 2) + # CHECK: %[[T73:.*]] = aie.tile(7, 3) + # CHECK: %[[T80:.*]] = aie.tile(8, 0) + # CHECK: %[[T82:.*]] = aie.tile(8, 2) + # CHECK: %[[T83:.*]] = aie.tile(8, 3) # - # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T71]], DMA : 0) - # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T31]], DMA : 0) - # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T82]], DMA : 0) - # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T13]], DMA : 0) - # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T83]], DMA : 1) - # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T22]], DMA : 1) - # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T02]], DMA : 1) - # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T31]], DMA : 1) + # CHECK: aie.flow(%[[T20]], DMA : 0, %[[T71]], DMA : 0) + # CHECK: aie.flow(%[[T20]], DMA : 0, %[[T31]], DMA : 0) + # CHECK: aie.flow(%[[T20]], DMA : 0, %[[T82]], DMA : 0) + # CHECK: aie.flow(%[[T20]], DMA : 0, %[[T13]], DMA : 0) + # CHECK: aie.flow(%[[T60]], DMA : 0, %[[T83]], DMA : 1) + # CHECK: aie.flow(%[[T60]], DMA : 0, %[[T22]], DMA : 1) + # CHECK: aie.flow(%[[T60]], DMA : 0, %[[T02]], DMA : 1) + # CHECK: aie.flow(%[[T60]], DMA : 0, %[[T31]], DMA : 1) print(mlir_module) @@ -88,48 +88,48 @@ def test_flow_test_1(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[t20:.*]] = AIE.tile(2, 0) - # CHECK: %[[t30:.*]] = AIE.tile(3, 0) - # CHECK: %[[t34:.*]] = AIE.tile(3, 4) - # CHECK: %[[t43:.*]] = AIE.tile(4, 3) - # CHECK: %[[t44:.*]] = AIE.tile(4, 4) - # CHECK: %[[t54:.*]] = AIE.tile(5, 4) - # CHECK: %[[t60:.*]] = AIE.tile(6, 0) - # CHECK: %[[t63:.*]] = AIE.tile(6, 3) - # CHECK: %[[t70:.*]] = AIE.tile(7, 0) - # CHECK: %[[t72:.*]] = AIE.tile(7, 2) - # CHECK: %[[t83:.*]] = AIE.tile(8, 3) - # CHECK: %[[t84:.*]] = AIE.tile(8, 4) + # CHECK: %[[t20:.*]] = aie.tile(2, 0) + # CHECK: %[[t30:.*]] = aie.tile(3, 0) + # CHECK: %[[t34:.*]] = aie.tile(3, 4) + # CHECK: %[[t43:.*]] = aie.tile(4, 3) + # CHECK: %[[t44:.*]] = aie.tile(4, 4) + # CHECK: %[[t54:.*]] = aie.tile(5, 4) + # CHECK: %[[t60:.*]] = aie.tile(6, 0) + # CHECK: %[[t63:.*]] = aie.tile(6, 3) + # CHECK: %[[t70:.*]] = aie.tile(7, 0) + # CHECK: %[[t72:.*]] = aie.tile(7, 2) + # CHECK: %[[t83:.*]] = aie.tile(8, 3) + # CHECK: %[[t84:.*]] = aie.tile(8, 4) # - # CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t63]], DMA : 0) - # CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 0) - # CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t72]], DMA : 0) - # CHECK: AIE.flow(%[[t30]], DMA : 1, %[[t54]], DMA : 0) + # CHECK: aie.flow(%[[t20]], DMA : 0, %[[t63]], DMA : 0) + # CHECK: aie.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 0) + # CHECK: aie.flow(%[[t30]], DMA : 0, %[[t72]], DMA : 0) + # CHECK: aie.flow(%[[t30]], DMA : 1, %[[t54]], DMA : 0) # - # CHECK: AIE.flow(%[[t34]], Core : 0, %[[t63]], Core : 1) - # CHECK: AIE.flow(%[[t34]], DMA : 1, %[[t70]], DMA : 0) - # CHECK: AIE.flow(%[[t43]], Core : 0, %[[t84]], Core : 1) - # CHECK: AIE.flow(%[[t43]], DMA : 1, %[[t60]], DMA : 1) + # CHECK: aie.flow(%[[t34]], Core : 0, %[[t63]], Core : 1) + # CHECK: aie.flow(%[[t34]], DMA : 1, %[[t70]], DMA : 0) + # CHECK: aie.flow(%[[t43]], Core : 0, %[[t84]], Core : 1) + # CHECK: aie.flow(%[[t43]], DMA : 1, %[[t60]], DMA : 1) # - # CHECK: AIE.flow(%[[t44]], Core : 0, %[[t54]], Core : 1) - # CHECK: AIE.flow(%[[t44]], DMA : 1, %[[t60]], DMA : 0) - # CHECK: AIE.flow(%[[t54]], Core : 0, %[[t43]], Core : 1) - # CHECK: AIE.flow(%[[t54]], DMA : 1, %[[t30]], DMA : 1) + # CHECK: aie.flow(%[[t44]], Core : 0, %[[t54]], Core : 1) + # CHECK: aie.flow(%[[t44]], DMA : 1, %[[t60]], DMA : 0) + # CHECK: aie.flow(%[[t54]], Core : 0, %[[t43]], Core : 1) + # CHECK: aie.flow(%[[t54]], DMA : 1, %[[t30]], DMA : 1) # - # CHECK: AIE.flow(%[[t60]], DMA : 0, %[[t44]], DMA : 0) - # CHECK: AIE.flow(%[[t60]], DMA : 1, %[[t43]], DMA : 0) - # CHECK: AIE.flow(%[[t63]], Core : 0, %[[t34]], Core : 1) - # CHECK: AIE.flow(%[[t63]], DMA : 1, %[[t20]], DMA : 1) + # CHECK: aie.flow(%[[t60]], DMA : 0, %[[t44]], DMA : 0) + # CHECK: aie.flow(%[[t60]], DMA : 1, %[[t43]], DMA : 0) + # CHECK: aie.flow(%[[t63]], Core : 0, %[[t34]], Core : 1) + # CHECK: aie.flow(%[[t63]], DMA : 1, %[[t20]], DMA : 1) # - # CHECK: AIE.flow(%[[t70]], DMA : 0, %[[t34]], DMA : 0) - # CHECK: AIE.flow(%[[t70]], DMA : 1, %[[t84]], DMA : 0) - # CHECK: AIE.flow(%[[t72]], Core : 0, %[[t83]], Core : 1) - # CHECK: AIE.flow(%[[t72]], DMA : 1, %[[t30]], DMA : 0) + # CHECK: aie.flow(%[[t70]], DMA : 0, %[[t34]], DMA : 0) + # CHECK: aie.flow(%[[t70]], DMA : 1, %[[t84]], DMA : 0) + # CHECK: aie.flow(%[[t72]], Core : 0, %[[t83]], Core : 1) + # CHECK: aie.flow(%[[t72]], DMA : 1, %[[t30]], DMA : 0) # - # CHECK: AIE.flow(%[[t83]], Core : 0, %[[t44]], Core : 1) - # CHECK: AIE.flow(%[[t83]], DMA : 1, %[[t20]], DMA : 0) - # CHECK: AIE.flow(%[[t84]], Core : 0, %[[t72]], Core : 1) - # CHECK: AIE.flow(%[[t84]], DMA : 1, %[[t70]], DMA : 1) + # CHECK: aie.flow(%[[t83]], Core : 0, %[[t44]], Core : 1) + # CHECK: aie.flow(%[[t83]], DMA : 1, %[[t20]], DMA : 0) + # CHECK: aie.flow(%[[t84]], Core : 0, %[[t72]], Core : 1) + # CHECK: aie.flow(%[[t84]], DMA : 1, %[[t70]], DMA : 1) print(mlir_module) @@ -147,48 +147,48 @@ def test_flow_test_2(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[t01:.*]] = AIE.tile(0, 1) - # CHECK: %[[t02:.*]] = AIE.tile(0, 2) - # CHECK: %[[t03:.*]] = AIE.tile(0, 3) - # CHECK: %[[t04:.*]] = AIE.tile(0, 4) - # CHECK: %[[t11:.*]] = AIE.tile(1, 1) - # CHECK: %[[t12:.*]] = AIE.tile(1, 2) - # CHECK: %[[t13:.*]] = AIE.tile(1, 3) - # CHECK: %[[t14:.*]] = AIE.tile(1, 4) - # CHECK: %[[t20:.*]] = AIE.tile(2, 0) - # CHECK: %[[t21:.*]] = AIE.tile(2, 1) - # CHECK: %[[t22:.*]] = AIE.tile(2, 2) - # CHECK: %[[t23:.*]] = AIE.tile(2, 3) - # CHECK: %[[t24:.*]] = AIE.tile(2, 4) - # CHECK: %[[t30:.*]] = AIE.tile(3, 0) - # CHECK: %[[t31:.*]] = AIE.tile(3, 1) - # CHECK: %[[t32:.*]] = AIE.tile(3, 2) - # CHECK: %[[t33:.*]] = AIE.tile(3, 3) - # CHECK: %[[t34:.*]] = AIE.tile(3, 4) - - # CHECK: AIE.flow(%[[t01]], Core : 0, %[[t12]], Core : 0) - # CHECK: AIE.flow(%[[t02]], DMA : 0, %[[t20]], DMA : 0) - # CHECK: AIE.flow(%[[t04]], Core : 0, %[[t13]], Core : 0) - # CHECK: AIE.flow(%[[t11]], Core : 0, %[[t01]], Core : 0) - # CHECK: AIE.flow(%[[t12]], Core : 0, %[[t02]], Core : 0) - # CHECK: AIE.flow(%[[t13]], DMA : 0, %[[t20]], DMA : 1) - # CHECK: AIE.flow(%[[t14]], Core : 0, %[[t04]], Core : 0) - # CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t11]], DMA : 0) - # CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t14]], DMA : 0) - # CHECK: AIE.flow(%[[t21]], Core : 0, %[[t33]], Core : 0) - # CHECK: AIE.flow(%[[t22]], Core : 0, %[[t34]], Core : 0) - # CHECK: AIE.flow(%[[t23]], Core : 1, %[[t34]], Core : 1) - # CHECK: AIE.flow(%[[t23]], DMA : 0, %[[t30]], DMA : 0) - # CHECK: AIE.flow(%[[t24]], Core : 0, %[[t23]], Core : 0) - # CHECK: AIE.flow(%[[t24]], Core : 1, %[[t33]], Core : 1) - # CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t21]], DMA : 0) - # CHECK: AIE.flow(%[[t30]], DMA : 1, %[[t31]], DMA : 1) - # CHECK: AIE.flow(%[[t31]], Core : 1, %[[t23]], Core : 1) - # CHECK: AIE.flow(%[[t32]], DMA : 1, %[[t30]], DMA : 1) - # CHECK: AIE.flow(%[[t33]], Core : 0, %[[t22]], Core : 0) - # CHECK: AIE.flow(%[[t33]], Core : 1, %[[t32]], Core : 1) - # CHECK: AIE.flow(%[[t34]], Core : 0, %[[t24]], Core : 0) - # CHECK: AIE.flow(%[[t34]], Core : 1, %[[t24]], Core : 1) + # CHECK: %[[t01:.*]] = aie.tile(0, 1) + # CHECK: %[[t02:.*]] = aie.tile(0, 2) + # CHECK: %[[t03:.*]] = aie.tile(0, 3) + # CHECK: %[[t04:.*]] = aie.tile(0, 4) + # CHECK: %[[t11:.*]] = aie.tile(1, 1) + # CHECK: %[[t12:.*]] = aie.tile(1, 2) + # CHECK: %[[t13:.*]] = aie.tile(1, 3) + # CHECK: %[[t14:.*]] = aie.tile(1, 4) + # CHECK: %[[t20:.*]] = aie.tile(2, 0) + # CHECK: %[[t21:.*]] = aie.tile(2, 1) + # CHECK: %[[t22:.*]] = aie.tile(2, 2) + # CHECK: %[[t23:.*]] = aie.tile(2, 3) + # CHECK: %[[t24:.*]] = aie.tile(2, 4) + # CHECK: %[[t30:.*]] = aie.tile(3, 0) + # CHECK: %[[t31:.*]] = aie.tile(3, 1) + # CHECK: %[[t32:.*]] = aie.tile(3, 2) + # CHECK: %[[t33:.*]] = aie.tile(3, 3) + # CHECK: %[[t34:.*]] = aie.tile(3, 4) + + # CHECK: aie.flow(%[[t01]], Core : 0, %[[t12]], Core : 0) + # CHECK: aie.flow(%[[t02]], DMA : 0, %[[t20]], DMA : 0) + # CHECK: aie.flow(%[[t04]], Core : 0, %[[t13]], Core : 0) + # CHECK: aie.flow(%[[t11]], Core : 0, %[[t01]], Core : 0) + # CHECK: aie.flow(%[[t12]], Core : 0, %[[t02]], Core : 0) + # CHECK: aie.flow(%[[t13]], DMA : 0, %[[t20]], DMA : 1) + # CHECK: aie.flow(%[[t14]], Core : 0, %[[t04]], Core : 0) + # CHECK: aie.flow(%[[t20]], DMA : 0, %[[t11]], DMA : 0) + # CHECK: aie.flow(%[[t20]], DMA : 1, %[[t14]], DMA : 0) + # CHECK: aie.flow(%[[t21]], Core : 0, %[[t33]], Core : 0) + # CHECK: aie.flow(%[[t22]], Core : 0, %[[t34]], Core : 0) + # CHECK: aie.flow(%[[t23]], Core : 1, %[[t34]], Core : 1) + # CHECK: aie.flow(%[[t23]], DMA : 0, %[[t30]], DMA : 0) + # CHECK: aie.flow(%[[t24]], Core : 0, %[[t23]], Core : 0) + # CHECK: aie.flow(%[[t24]], Core : 1, %[[t33]], Core : 1) + # CHECK: aie.flow(%[[t30]], DMA : 0, %[[t21]], DMA : 0) + # CHECK: aie.flow(%[[t30]], DMA : 1, %[[t31]], DMA : 1) + # CHECK: aie.flow(%[[t31]], Core : 1, %[[t23]], Core : 1) + # CHECK: aie.flow(%[[t32]], DMA : 1, %[[t30]], DMA : 1) + # CHECK: aie.flow(%[[t33]], Core : 0, %[[t22]], Core : 0) + # CHECK: aie.flow(%[[t33]], Core : 1, %[[t32]], Core : 1) + # CHECK: aie.flow(%[[t34]], Core : 0, %[[t24]], Core : 0) + # CHECK: aie.flow(%[[t34]], Core : 1, %[[t24]], Core : 1) print(mlir_module) @@ -206,50 +206,50 @@ def test_flow_test_3(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[t01:.*]] = AIE.tile(0, 1) - # CHECK: %[[t02:.*]] = AIE.tile(0, 2) - # CHECK: %[[t03:.*]] = AIE.tile(0, 3) - # CHECK: %[[t04:.*]] = AIE.tile(0, 4) - # CHECK: %[[t11:.*]] = AIE.tile(1, 1) - # CHECK: %[[t12:.*]] = AIE.tile(1, 2) - # CHECK: %[[t13:.*]] = AIE.tile(1, 3) - # CHECK: %[[t14:.*]] = AIE.tile(1, 4) - # CHECK: %[[t20:.*]] = AIE.tile(2, 0) - # CHECK: %[[t21:.*]] = AIE.tile(2, 1) - # CHECK: %[[t22:.*]] = AIE.tile(2, 2) - # CHECK: %[[t23:.*]] = AIE.tile(2, 3) - # CHECK: %[[t24:.*]] = AIE.tile(2, 4) - # CHECK: %[[t30:.*]] = AIE.tile(3, 0) - # CHECK: %[[t71:.*]] = AIE.tile(7, 1) - # CHECK: %[[t72:.*]] = AIE.tile(7, 2) - # CHECK: %[[t73:.*]] = AIE.tile(7, 3) - # CHECK: %[[t74:.*]] = AIE.tile(7, 4) - # CHECK: %[[t81:.*]] = AIE.tile(8, 1) - # CHECK: %[[t82:.*]] = AIE.tile(8, 2) - # CHECK: %[[t83:.*]] = AIE.tile(8, 3) - # CHECK: %[[t84:.*]] = AIE.tile(8, 4) + # CHECK: %[[t01:.*]] = aie.tile(0, 1) + # CHECK: %[[t02:.*]] = aie.tile(0, 2) + # CHECK: %[[t03:.*]] = aie.tile(0, 3) + # CHECK: %[[t04:.*]] = aie.tile(0, 4) + # CHECK: %[[t11:.*]] = aie.tile(1, 1) + # CHECK: %[[t12:.*]] = aie.tile(1, 2) + # CHECK: %[[t13:.*]] = aie.tile(1, 3) + # CHECK: %[[t14:.*]] = aie.tile(1, 4) + # CHECK: %[[t20:.*]] = aie.tile(2, 0) + # CHECK: %[[t21:.*]] = aie.tile(2, 1) + # CHECK: %[[t22:.*]] = aie.tile(2, 2) + # CHECK: %[[t23:.*]] = aie.tile(2, 3) + # CHECK: %[[t24:.*]] = aie.tile(2, 4) + # CHECK: %[[t30:.*]] = aie.tile(3, 0) + # CHECK: %[[t71:.*]] = aie.tile(7, 1) + # CHECK: %[[t72:.*]] = aie.tile(7, 2) + # CHECK: %[[t73:.*]] = aie.tile(7, 3) + # CHECK: %[[t74:.*]] = aie.tile(7, 4) + # CHECK: %[[t81:.*]] = aie.tile(8, 1) + # CHECK: %[[t82:.*]] = aie.tile(8, 2) + # CHECK: %[[t83:.*]] = aie.tile(8, 3) + # CHECK: %[[t84:.*]] = aie.tile(8, 4) # - # CHECK: AIE.flow(%[[t01]], Core : 0, %[[t83]], Core : 0) - # CHECK: AIE.flow(%[[t01]], Core : 1, %[[t72]], Core : 1) - # CHECK: AIE.flow(%[[t02]], Core : 1, %[[t24]], Core : 1) - # CHECK: AIE.flow(%[[t03]], Core : 0, %[[t71]], Core : 0) - # CHECK: AIE.flow(%[[t11]], Core : 0, %[[t24]], Core : 0) - # CHECK: AIE.flow(%[[t14]], Core : 0, %[[t01]], Core : 0) - # CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t03]], DMA : 0) - # CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 1) - # CHECK: AIE.flow(%[[t21]], Core : 0, %[[t73]], Core : 0) - # CHECK: AIE.flow(%[[t24]], Core : 1, %[[t71]], Core : 1) - # CHECK: AIE.flow(%[[t24]], DMA : 0, %[[t20]], DMA : 0) - # CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t14]], DMA : 0) - # CHECK: AIE.flow(%[[t71]], Core : 0, %[[t84]], Core : 0) - # CHECK: AIE.flow(%[[t71]], Core : 1, %[[t84]], Core : 1) - # CHECK: AIE.flow(%[[t72]], Core : 1, %[[t02]], Core : 1) - # CHECK: AIE.flow(%[[t73]], Core : 0, %[[t82]], Core : 0) - # CHECK: AIE.flow(%[[t82]], DMA : 0, %[[t30]], DMA : 0) - # CHECK: AIE.flow(%[[t83]], Core : 0, %[[t21]], Core : 0) - # CHECK: AIE.flow(%[[t83]], Core : 1, %[[t01]], Core : 1) - # CHECK: AIE.flow(%[[t84]], Core : 0, %[[t11]], Core : 0) - # CHECK: AIE.flow(%[[t84]], DMA : 1, %[[t20]], DMA : 1) + # CHECK: aie.flow(%[[t01]], Core : 0, %[[t83]], Core : 0) + # CHECK: aie.flow(%[[t01]], Core : 1, %[[t72]], Core : 1) + # CHECK: aie.flow(%[[t02]], Core : 1, %[[t24]], Core : 1) + # CHECK: aie.flow(%[[t03]], Core : 0, %[[t71]], Core : 0) + # CHECK: aie.flow(%[[t11]], Core : 0, %[[t24]], Core : 0) + # CHECK: aie.flow(%[[t14]], Core : 0, %[[t01]], Core : 0) + # CHECK: aie.flow(%[[t20]], DMA : 0, %[[t03]], DMA : 0) + # CHECK: aie.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 1) + # CHECK: aie.flow(%[[t21]], Core : 0, %[[t73]], Core : 0) + # CHECK: aie.flow(%[[t24]], Core : 1, %[[t71]], Core : 1) + # CHECK: aie.flow(%[[t24]], DMA : 0, %[[t20]], DMA : 0) + # CHECK: aie.flow(%[[t30]], DMA : 0, %[[t14]], DMA : 0) + # CHECK: aie.flow(%[[t71]], Core : 0, %[[t84]], Core : 0) + # CHECK: aie.flow(%[[t71]], Core : 1, %[[t84]], Core : 1) + # CHECK: aie.flow(%[[t72]], Core : 1, %[[t02]], Core : 1) + # CHECK: aie.flow(%[[t73]], Core : 0, %[[t82]], Core : 0) + # CHECK: aie.flow(%[[t82]], DMA : 0, %[[t30]], DMA : 0) + # CHECK: aie.flow(%[[t83]], Core : 0, %[[t21]], Core : 0) + # CHECK: aie.flow(%[[t83]], Core : 1, %[[t01]], Core : 1) + # CHECK: aie.flow(%[[t84]], Core : 0, %[[t11]], Core : 0) + # CHECK: aie.flow(%[[t84]], DMA : 1, %[[t20]], DMA : 1) print(mlir_module) @@ -267,31 +267,31 @@ def test_many_flows(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T02:.*]] = AIE.tile(0, 2) - # CHECK: %[[T03:.*]] = AIE.tile(0, 3) - # CHECK: %[[T11:.*]] = AIE.tile(1, 1) - # CHECK: %[[T13:.*]] = AIE.tile(1, 3) - # CHECK: %[[T20:.*]] = AIE.tile(2, 0) - # CHECK: %[[T22:.*]] = AIE.tile(2, 2) - # CHECK: %[[T30:.*]] = AIE.tile(3, 0) - # CHECK: %[[T31:.*]] = AIE.tile(3, 1) - # CHECK: %[[T60:.*]] = AIE.tile(6, 0) - # CHECK: %[[T70:.*]] = AIE.tile(7, 0) - # CHECK: %[[T73:.*]] = AIE.tile(7, 3) - # CHECK: AIE.flow(%[[T02]], Core : 1, %[[T22]], Core : 1) - # CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) - # CHECK: AIE.flow(%[[T03]], Core : 0, %[[T13]], Core : 0) - # CHECK: AIE.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) - # CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T70]], DMA : 0) - # CHECK: AIE.flow(%[[T13]], Core : 1, %[[T22]], Core : 0) - # CHECK: AIE.flow(%[[T13]], DMA : 0, %[[T70]], DMA : 1) - # CHECK: AIE.flow(%[[T22]], DMA : 0, %[[T60]], DMA : 1) - # CHECK: AIE.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) - # CHECK: AIE.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) - # CHECK: AIE.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) - # CHECK: AIE.flow(%[[T73]], Core : 1, %[[T31]], Core : 1) - # CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T20]], DMA : 0) - # CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T30]], DMA : 0) + # CHECK: %[[T02:.*]] = aie.tile(0, 2) + # CHECK: %[[T03:.*]] = aie.tile(0, 3) + # CHECK: %[[T11:.*]] = aie.tile(1, 1) + # CHECK: %[[T13:.*]] = aie.tile(1, 3) + # CHECK: %[[T20:.*]] = aie.tile(2, 0) + # CHECK: %[[T22:.*]] = aie.tile(2, 2) + # CHECK: %[[T30:.*]] = aie.tile(3, 0) + # CHECK: %[[T31:.*]] = aie.tile(3, 1) + # CHECK: %[[T60:.*]] = aie.tile(6, 0) + # CHECK: %[[T70:.*]] = aie.tile(7, 0) + # CHECK: %[[T73:.*]] = aie.tile(7, 3) + # CHECK: aie.flow(%[[T02]], Core : 1, %[[T22]], Core : 1) + # CHECK: aie.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) + # CHECK: aie.flow(%[[T03]], Core : 0, %[[T13]], Core : 0) + # CHECK: aie.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) + # CHECK: aie.flow(%[[T03]], DMA : 0, %[[T70]], DMA : 0) + # CHECK: aie.flow(%[[T13]], Core : 1, %[[T22]], Core : 0) + # CHECK: aie.flow(%[[T13]], DMA : 0, %[[T70]], DMA : 1) + # CHECK: aie.flow(%[[T22]], DMA : 0, %[[T60]], DMA : 1) + # CHECK: aie.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) + # CHECK: aie.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) + # CHECK: aie.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) + # CHECK: aie.flow(%[[T73]], Core : 1, %[[T31]], Core : 1) + # CHECK: aie.flow(%[[T73]], DMA : 0, %[[T20]], DMA : 0) + # CHECK: aie.flow(%[[T73]], DMA : 1, %[[T30]], DMA : 0) print(mlir_module) @@ -309,32 +309,32 @@ def test_many_flows2(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T02:.*]] = AIE.tile(0, 2) - # CHECK: %[[T03:.*]] = AIE.tile(0, 3) - # CHECK: %[[T11:.*]] = AIE.tile(1, 1) - # CHECK: %[[T13:.*]] = AIE.tile(1, 3) - # CHECK: %[[T20:.*]] = AIE.tile(2, 0) - # CHECK: %[[T22:.*]] = AIE.tile(2, 2) - # CHECK: %[[T30:.*]] = AIE.tile(3, 0) - # CHECK: %[[T31:.*]] = AIE.tile(3, 1) - # CHECK: %[[T60:.*]] = AIE.tile(6, 0) - # CHECK: %[[T70:.*]] = AIE.tile(7, 0) - # CHECK: %[[T73:.*]] = AIE.tile(7, 3) + # CHECK: %[[T02:.*]] = aie.tile(0, 2) + # CHECK: %[[T03:.*]] = aie.tile(0, 3) + # CHECK: %[[T11:.*]] = aie.tile(1, 1) + # CHECK: %[[T13:.*]] = aie.tile(1, 3) + # CHECK: %[[T20:.*]] = aie.tile(2, 0) + # CHECK: %[[T22:.*]] = aie.tile(2, 2) + # CHECK: %[[T30:.*]] = aie.tile(3, 0) + # CHECK: %[[T31:.*]] = aie.tile(3, 1) + # CHECK: %[[T60:.*]] = aie.tile(6, 0) + # CHECK: %[[T70:.*]] = aie.tile(7, 0) + # CHECK: %[[T73:.*]] = aie.tile(7, 3) # - # CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) - # CHECK: AIE.flow(%[[T03]], Core : 0, %[[T02]], Core : 1) - # CHECK: AIE.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) - # CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T30]], DMA : 0) - # CHECK: AIE.flow(%[[T03]], DMA : 1, %[[T70]], DMA : 1) - # CHECK: AIE.flow(%[[T13]], Core : 1, %[[T31]], Core : 1) - # CHECK: AIE.flow(%[[T22]], Core : 0, %[[T13]], Core : 0) - # CHECK: AIE.flow(%[[T22]], DMA : 0, %[[T20]], DMA : 0) - # CHECK: AIE.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) - # CHECK: AIE.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) - # CHECK: AIE.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) - # CHECK: AIE.flow(%[[T73]], Core : 1, %[[T22]], Core : 1) - # CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T60]], DMA : 1) - # CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 0) + # CHECK: aie.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) + # CHECK: aie.flow(%[[T03]], Core : 0, %[[T02]], Core : 1) + # CHECK: aie.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) + # CHECK: aie.flow(%[[T03]], DMA : 0, %[[T30]], DMA : 0) + # CHECK: aie.flow(%[[T03]], DMA : 1, %[[T70]], DMA : 1) + # CHECK: aie.flow(%[[T13]], Core : 1, %[[T31]], Core : 1) + # CHECK: aie.flow(%[[T22]], Core : 0, %[[T13]], Core : 0) + # CHECK: aie.flow(%[[T22]], DMA : 0, %[[T20]], DMA : 0) + # CHECK: aie.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) + # CHECK: aie.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) + # CHECK: aie.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) + # CHECK: aie.flow(%[[T73]], Core : 1, %[[T22]], Core : 1) + # CHECK: aie.flow(%[[T73]], DMA : 0, %[[T60]], DMA : 1) + # CHECK: aie.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 0) print(mlir_module) @@ -352,22 +352,22 @@ def test_memtile(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T04:.*]] = AIE.tile(0, 4) - # CHECK: %[[T03:.*]] = AIE.tile(0, 3) - # CHECK: %[[T02:.*]] = AIE.tile(0, 2) - # CHECK: %[[T01:.*]] = AIE.tile(0, 1) - # CHECK: AIE.flow(%[[T04]], DMA : 0, %[[T02]], DMA : 4) - # CHECK: AIE.flow(%[[T04]], DMA : 1, %[[T02]], DMA : 5) - # CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T02]], DMA : 2) - # CHECK: AIE.flow(%[[T03]], DMA : 1, %[[T02]], DMA : 3) - # CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T01]], DMA : 0) - # CHECK: AIE.flow(%[[T02]], DMA : 1, %[[T01]], DMA : 1) - # CHECK: AIE.flow(%[[T02]], DMA : 2, %[[T03]], DMA : 0) - # CHECK: AIE.flow(%[[T02]], DMA : 3, %[[T03]], DMA : 1) - # CHECK: AIE.flow(%[[T02]], DMA : 4, %[[T04]], DMA : 0) - # CHECK: AIE.flow(%[[T02]], DMA : 5, %[[T04]], DMA : 1) - # CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T02]], DMA : 0) - # CHECK: AIE.flow(%[[T01]], DMA : 1, %[[T02]], DMA : 1) + # CHECK: %[[T04:.*]] = aie.tile(0, 4) + # CHECK: %[[T03:.*]] = aie.tile(0, 3) + # CHECK: %[[T02:.*]] = aie.tile(0, 2) + # CHECK: %[[T01:.*]] = aie.tile(0, 1) + # CHECK: aie.flow(%[[T04]], DMA : 0, %[[T02]], DMA : 4) + # CHECK: aie.flow(%[[T04]], DMA : 1, %[[T02]], DMA : 5) + # CHECK: aie.flow(%[[T03]], DMA : 0, %[[T02]], DMA : 2) + # CHECK: aie.flow(%[[T03]], DMA : 1, %[[T02]], DMA : 3) + # CHECK: aie.flow(%[[T02]], DMA : 0, %[[T01]], DMA : 0) + # CHECK: aie.flow(%[[T02]], DMA : 1, %[[T01]], DMA : 1) + # CHECK: aie.flow(%[[T02]], DMA : 2, %[[T03]], DMA : 0) + # CHECK: aie.flow(%[[T02]], DMA : 3, %[[T03]], DMA : 1) + # CHECK: aie.flow(%[[T02]], DMA : 4, %[[T04]], DMA : 0) + # CHECK: aie.flow(%[[T02]], DMA : 5, %[[T04]], DMA : 1) + # CHECK: aie.flow(%[[T01]], DMA : 0, %[[T02]], DMA : 0) + # CHECK: aie.flow(%[[T01]], DMA : 1, %[[T02]], DMA : 1) print(mlir_module) @@ -389,13 +389,13 @@ def test_memtile_routing_constraints(): device = mlir_module.body.operations[0] pm.run(device.operation) - # %[[T24:.*]] = AIE.tile(2, 4) - # %[[T23:.*]] = AIE.tile(2, 3) - # %[[T22:.*]] = AIE.tile(2, 2) - # %[[T21:.*]] = AIE.tile(2, 1) - # %[[T20:.*]] = AIE.tile(2, 0) - # AIE.flow(%[[T22]], DMA : 0, %[[T21]], DMA : 0) - # AIE.flow(%[[T23]], DMA : 0, %[[T20]], DMA : 0) + # %[[T24:.*]] = aie.tile(2, 4) + # %[[T23:.*]] = aie.tile(2, 3) + # %[[T22:.*]] = aie.tile(2, 2) + # %[[T21:.*]] = aie.tile(2, 1) + # %[[T20:.*]] = aie.tile(2, 0) + # aie.flow(%[[T22]], DMA : 0, %[[T21]], DMA : 0) + # aie.flow(%[[T23]], DMA : 0, %[[T20]], DMA : 0) print(mlir_module) @@ -413,27 +413,27 @@ def test_mmult(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHEC: %[[T1:.*]] = AIE.tile(7, 0) - # CHEC: %[[T3:.*]] = AIE.tile(8, 3) - # CHEC: %[[T15:.*]] = AIE.tile(6, 0) - # CHEC: %[[T17:.*]] = AIE.tile(7, 3) - # CHEC: %[[T29:.*]] = AIE.tile(3, 0) - # CHEC: %[[T31:.*]] = AIE.tile(8, 2) - # CHEC: %[[T43:.*]] = AIE.tile(2, 0) - # CHEC: %[[T45:.*]] = AIE.tile(7, 2) - - # CHEC: AIE.flow(%[[T1]], DMA : 0, %[[T3]], DMA : 0) - # CHEC: AIE.flow(%[[T1]], DMA : 1, %[[T3]], DMA : 1) - # CHEC: AIE.flow(%[[T3]], DMA : 0, %[[T29]], DMA : 1) - # CHEC: AIE.flow(%[[T15]], DMA : 0, %[[T17]], DMA : 0) - # CHEC: AIE.flow(%[[T15]], DMA : 1, %[[T17]], DMA : 1) - # CHEC: AIE.flow(%[[T17]], DMA : 0, %[[T29]], DMA : 0) - # CHEC: AIE.flow(%[[T29]], DMA : 0, %[[T31]], DMA : 0) - # CHEC: AIE.flow(%[[T29]], DMA : 1, %[[T31]], DMA : 1) - # CHEC: AIE.flow(%[[T31]], DMA : 0, %[[T43]], DMA : 1) - # CHEC: AIE.flow(%[[T43]], DMA : 0, %[[T45]], DMA : 0) - # CHEC: AIE.flow(%[[T43]], DMA : 1, %[[T45]], DMA : 1) - # CHEC: AIE.flow(%[[T45]], DMA : 0, %[[T43]], DMA : 0) + # CHEC: %[[T1:.*]] = aie.tile(7, 0) + # CHEC: %[[T3:.*]] = aie.tile(8, 3) + # CHEC: %[[T15:.*]] = aie.tile(6, 0) + # CHEC: %[[T17:.*]] = aie.tile(7, 3) + # CHEC: %[[T29:.*]] = aie.tile(3, 0) + # CHEC: %[[T31:.*]] = aie.tile(8, 2) + # CHEC: %[[T43:.*]] = aie.tile(2, 0) + # CHEC: %[[T45:.*]] = aie.tile(7, 2) + + # CHEC: aie.flow(%[[T1]], DMA : 0, %[[T3]], DMA : 0) + # CHEC: aie.flow(%[[T1]], DMA : 1, %[[T3]], DMA : 1) + # CHEC: aie.flow(%[[T3]], DMA : 0, %[[T29]], DMA : 1) + # CHEC: aie.flow(%[[T15]], DMA : 0, %[[T17]], DMA : 0) + # CHEC: aie.flow(%[[T15]], DMA : 1, %[[T17]], DMA : 1) + # CHEC: aie.flow(%[[T17]], DMA : 0, %[[T29]], DMA : 0) + # CHEC: aie.flow(%[[T29]], DMA : 0, %[[T31]], DMA : 0) + # CHEC: aie.flow(%[[T29]], DMA : 1, %[[T31]], DMA : 1) + # CHEC: aie.flow(%[[T31]], DMA : 0, %[[T43]], DMA : 1) + # CHEC: aie.flow(%[[T43]], DMA : 0, %[[T45]], DMA : 0) + # CHEC: aie.flow(%[[T43]], DMA : 1, %[[T45]], DMA : 1) + # CHEC: aie.flow(%[[T45]], DMA : 0, %[[T43]], DMA : 0) print(mlir_module) @@ -457,54 +457,54 @@ def test_more_flows_shim(): print(mlir_module) # CHECK-LABEL: test70 - # CHECK: %[[T70:.*]] = AIE.tile(7, 0) - # CHECK: %[[T71:.*]] = AIE.tile(7, 1) - # CHECK: %[[SB70:.*]] = AIE.switchbox(%[[T70]]) { - # CHECK: AIE.connect + # CHECK: %[[T70:.*]] = aie.tile(7, 0) + # CHECK: %[[T71:.*]] = aie.tile(7, 1) + # CHECK: %[[SB70:.*]] = aie.switchbox(%[[T70]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[SH70:.*]] = AIE.shim_mux(%[[T70]]) { - # CHECK: AIE.connect + # CHECK: %[[SH70:.*]] = aie.shim_mux(%[[T70]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[SB71:.*]] = AIE.switchbox(%[[T71]]) { - # CHECK: AIE.connect + # CHECK: %[[SB71:.*]] = aie.switchbox(%[[T71]]) { + # CHECK: aie.connect # CHECK: } # CHECK-LABEL: test60 - # CHECK: %[[T60:.*]] = AIE.tile(6, 0) - # CHECK: %[[T61:.*]] = AIE.tile(6, 1) - # CHECK: %[[SB60:.*]] = AIE.switchbox(%[[T60]]) { - # CHECK: AIE.connect + # CHECK: %[[T60:.*]] = aie.tile(6, 0) + # CHECK: %[[T61:.*]] = aie.tile(6, 1) + # CHECK: %[[SB60:.*]] = aie.switchbox(%[[T60]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[SH60:.*]] = AIE.shim_mux(%[[T60]]) { - # CHECK: AIE.connect + # CHECK: %[[SH60:.*]] = aie.shim_mux(%[[T60]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[SB61:.*]] = AIE.switchbox(%[[T61]]) { - # CHECK: AIE.connect + # CHECK: %[[SB61:.*]] = aie.switchbox(%[[T61]]) { + # CHECK: aie.connect # CHECK: } # CHECK-LABEL: test40 - # CHECK: %[[T40:.*]] = AIE.tile(4, 0) - # CHECK: %[[T41:.*]] = AIE.tile(4, 1) - # CHECK: %[[SB40:.*]] = AIE.switchbox(%[[T40]]) { - # CHECK: AIE.connect - # CHECK: AIE.connect + # CHECK: %[[T40:.*]] = aie.tile(4, 0) + # CHECK: %[[T41:.*]] = aie.tile(4, 1) + # CHECK: %[[SB40:.*]] = aie.switchbox(%[[T40]]) { + # CHECK: aie.connect + # CHECK: aie.connect # CHECK: } - # CHECK: %[[SB41:.*]] = AIE.switchbox(%[[T41]]) { - # CHECK: AIE.connect - # CHECK: AIE.connect + # CHECK: %[[SB41:.*]] = aie.switchbox(%[[T41]]) { + # CHECK: aie.connect + # CHECK: aie.connect # CHECK: } # CHECK-LABEL: test100 - # CHECK: %[[T100:.*]] = AIE.tile(10, 0) - # CHECK: %[[T101:.*]] = AIE.tile(10, 1) - # CHECK: %[[SB100:.*]] = AIE.switchbox(%[[T100]]) { - # CHECK: AIE.connect + # CHECK: %[[T100:.*]] = aie.tile(10, 0) + # CHECK: %[[T101:.*]] = aie.tile(10, 1) + # CHECK: %[[SB100:.*]] = aie.switchbox(%[[T100]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[SH100:.*]] = AIE.shim_mux(%[[T100]]) { - # CHECK: AIE.connect + # CHECK: %[[SH100:.*]] = aie.shim_mux(%[[T100]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[SB101:.*]] = AIE.switchbox(%[[T101]]) { - # CHECK: AIE.connect + # CHECK: %[[SB101:.*]] = aie.switchbox(%[[T101]]) { + # CHECK: aie.connect # CHECK: } @@ -522,32 +522,32 @@ def test_over_flows(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T03:.*]] = AIE.tile(0, 3) - # CHECK: %[[T02:.*]] = AIE.tile(0, 2) - # CHECK: %[[T00:.*]] = AIE.tile(0, 0) - # CHECK: %[[T13:.*]] = AIE.tile(1, 3) - # CHECK: %[[T11:.*]] = AIE.tile(1, 1) - # CHECK: %[[T10:.*]] = AIE.tile(1, 0) - # CHECK: %[[T20:.*]] = AIE.tile(2, 0) - # CHECK: %[[T30:.*]] = AIE.tile(3, 0) - # CHECK: %[[T22:.*]] = AIE.tile(2, 2) - # CHECK: %[[T31:.*]] = AIE.tile(3, 1) - # CHECK: %[[T60:.*]] = AIE.tile(6, 0) - # CHECK: %[[T70:.*]] = AIE.tile(7, 0) - # CHECK: %[[T71:.*]] = AIE.tile(7, 1) - # CHECK: %[[T72:.*]] = AIE.tile(7, 2) - # CHECK: %[[T73:.*]] = AIE.tile(7, 3) - # CHECK: %[[T80:.*]] = AIE.tile(8, 0) - # CHECK: %[[T82:.*]] = AIE.tile(8, 2) - # CHECK: %[[T83:.*]] = AIE.tile(8, 3) - # CHECK: AIE.flow(%[[T71]], DMA : 0, %[[T20]], DMA : 0) - # CHECK: AIE.flow(%[[T71]], DMA : 1, %[[T20]], DMA : 1) - # CHECK: AIE.flow(%[[T72]], DMA : 0, %[[T60]], DMA : 0) - # CHECK: AIE.flow(%[[T72]], DMA : 1, %[[T60]], DMA : 1) - # CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T70]], DMA : 0) - # CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 1) - # CHECK: AIE.flow(%[[T83]], DMA : 0, %[[T30]], DMA : 0) - # CHECK: AIE.flow(%[[T83]], DMA : 1, %[[T30]], DMA : 1) + # CHECK: %[[T03:.*]] = aie.tile(0, 3) + # CHECK: %[[T02:.*]] = aie.tile(0, 2) + # CHECK: %[[T00:.*]] = aie.tile(0, 0) + # CHECK: %[[T13:.*]] = aie.tile(1, 3) + # CHECK: %[[T11:.*]] = aie.tile(1, 1) + # CHECK: %[[T10:.*]] = aie.tile(1, 0) + # CHECK: %[[T20:.*]] = aie.tile(2, 0) + # CHECK: %[[T30:.*]] = aie.tile(3, 0) + # CHECK: %[[T22:.*]] = aie.tile(2, 2) + # CHECK: %[[T31:.*]] = aie.tile(3, 1) + # CHECK: %[[T60:.*]] = aie.tile(6, 0) + # CHECK: %[[T70:.*]] = aie.tile(7, 0) + # CHECK: %[[T71:.*]] = aie.tile(7, 1) + # CHECK: %[[T72:.*]] = aie.tile(7, 2) + # CHECK: %[[T73:.*]] = aie.tile(7, 3) + # CHECK: %[[T80:.*]] = aie.tile(8, 0) + # CHECK: %[[T82:.*]] = aie.tile(8, 2) + # CHECK: %[[T83:.*]] = aie.tile(8, 3) + # CHECK: aie.flow(%[[T71]], DMA : 0, %[[T20]], DMA : 0) + # CHECK: aie.flow(%[[T71]], DMA : 1, %[[T20]], DMA : 1) + # CHECK: aie.flow(%[[T72]], DMA : 0, %[[T60]], DMA : 0) + # CHECK: aie.flow(%[[T72]], DMA : 1, %[[T60]], DMA : 1) + # CHECK: aie.flow(%[[T73]], DMA : 0, %[[T70]], DMA : 0) + # CHECK: aie.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 1) + # CHECK: aie.flow(%[[T83]], DMA : 0, %[[T30]], DMA : 0) + # CHECK: aie.flow(%[[T83]], DMA : 1, %[[T30]], DMA : 1) print(mlir_module) @@ -558,23 +558,23 @@ def test_overlap(): src = dedent( """\ module @aie.herd_0 { - AIE.device(xcvc1902) { - %tile_3_0 = AIE.tile(3, 0) - %tile_3_1 = AIE.tile(3, 1) - %tile_6_1 = AIE.tile(6, 1) - %tile_7_3 = AIE.tile(7, 3) - %tile_8_2 = AIE.tile(8, 2) - %tile_8_3 = AIE.tile(8, 3) - %switchbox_3_0 = AIE.switchbox(%tile_3_0) { - AIE.connect - AIE.connect - AIE.connect - AIE.connect - } - AIE.flow(%tile_3_1, South : 0, %tile_8_2, DMA : 0) - AIE.flow(%tile_3_1, South : 1, %tile_8_2, DMA : 1) - AIE.flow(%tile_6_1, South : 0, %tile_7_3, DMA : 0) - AIE.flow(%tile_6_1, South : 1, %tile_7_3, DMA : 1) + aie.device(xcvc1902) { + %tile_3_0 = aie.tile(3, 0) + %tile_3_1 = aie.tile(3, 1) + %tile_6_1 = aie.tile(6, 1) + %tile_7_3 = aie.tile(7, 3) + %tile_8_2 = aie.tile(8, 2) + %tile_8_3 = aie.tile(8, 3) + %switchbox_3_0 = aie.switchbox(%tile_3_0) { + aie.connect + aie.connect + aie.connect + aie.connect + } + aie.flow(%tile_3_1, South : 0, %tile_8_2, DMA : 0) + aie.flow(%tile_3_1, South : 1, %tile_8_2, DMA : 1) + aie.flow(%tile_6_1, South : 0, %tile_7_3, DMA : 0) + aie.flow(%tile_6_1, South : 1, %tile_7_3, DMA : 1) } } """ @@ -596,190 +596,190 @@ def test_routed_herd_3x1_mine_1(): src = dedent( """\ module { - AIE.device(xcvc1902) { - %tile_0_0 = AIE.tile(0, 0) - %tile_0_1 = AIE.tile(0, 1) - %tile_0_2 = AIE.tile(0, 2) - %tile_0_3 = AIE.tile(0, 3) - %tile_0_4 = AIE.tile(0, 4) - %tile_1_0 = AIE.tile(1, 0) - %tile_1_1 = AIE.tile(1, 1) - %tile_1_2 = AIE.tile(1, 2) - %tile_1_3 = AIE.tile(1, 3) - %tile_1_4 = AIE.tile(1, 4) - %tile_2_0 = AIE.tile(2, 0) - %tile_2_1 = AIE.tile(2, 1) - %tile_2_2 = AIE.tile(2, 2) - %tile_2_3 = AIE.tile(2, 3) - %tile_2_4 = AIE.tile(2, 4) - %tile_3_0 = AIE.tile(3, 0) - %tile_3_1 = AIE.tile(3, 1) - %tile_3_2 = AIE.tile(3, 2) - %tile_3_3 = AIE.tile(3, 3) - %tile_3_4 = AIE.tile(3, 4) - %tile_4_0 = AIE.tile(4, 0) - %tile_4_1 = AIE.tile(4, 1) - %tile_4_2 = AIE.tile(4, 2) - %tile_4_3 = AIE.tile(4, 3) - %tile_4_4 = AIE.tile(4, 4) - %tile_5_0 = AIE.tile(5, 0) - %tile_5_1 = AIE.tile(5, 1) - %tile_5_2 = AIE.tile(5, 2) - %tile_5_3 = AIE.tile(5, 3) - %tile_5_4 = AIE.tile(5, 4) - %tile_6_0 = AIE.tile(6, 0) - %tile_6_1 = AIE.tile(6, 1) - %tile_6_2 = AIE.tile(6, 2) - %tile_6_3 = AIE.tile(6, 3) - %tile_6_4 = AIE.tile(6, 4) - %tile_7_0 = AIE.tile(7, 0) - %tile_7_1 = AIE.tile(7, 1) - %tile_7_2 = AIE.tile(7, 2) - %tile_7_3 = AIE.tile(7, 3) - %tile_7_4 = AIE.tile(7, 4) - %tile_8_0 = AIE.tile(8, 0) - %tile_8_1 = AIE.tile(8, 1) - %tile_8_2 = AIE.tile(8, 2) - %tile_8_3 = AIE.tile(8, 3) - %tile_8_4 = AIE.tile(8, 4) - %tile_9_0 = AIE.tile(9, 0) - %tile_9_1 = AIE.tile(9, 1) - %tile_9_2 = AIE.tile(9, 2) - %tile_9_3 = AIE.tile(9, 3) - %tile_9_4 = AIE.tile(9, 4) - %tile_10_0 = AIE.tile(10, 0) - %tile_10_1 = AIE.tile(10, 1) - %tile_10_2 = AIE.tile(10, 2) - %tile_10_3 = AIE.tile(10, 3) - %tile_10_4 = AIE.tile(10, 4) - %tile_11_0 = AIE.tile(11, 0) - %tile_11_1 = AIE.tile(11, 1) - %tile_11_2 = AIE.tile(11, 2) - %tile_11_3 = AIE.tile(11, 3) - %tile_11_4 = AIE.tile(11, 4) - %tile_12_1 = AIE.tile(12, 1) - %tile_12_2 = AIE.tile(12, 2) - %tile_12_3 = AIE.tile(12, 3) - %tile_12_4 = AIE.tile(12, 4) - %tile_18_0 = AIE.tile(18, 0) - %tile_19_0 = AIE.tile(19, 0) + aie.device(xcvc1902) { + %tile_0_0 = aie.tile(0, 0) + %tile_0_1 = aie.tile(0, 1) + %tile_0_2 = aie.tile(0, 2) + %tile_0_3 = aie.tile(0, 3) + %tile_0_4 = aie.tile(0, 4) + %tile_1_0 = aie.tile(1, 0) + %tile_1_1 = aie.tile(1, 1) + %tile_1_2 = aie.tile(1, 2) + %tile_1_3 = aie.tile(1, 3) + %tile_1_4 = aie.tile(1, 4) + %tile_2_0 = aie.tile(2, 0) + %tile_2_1 = aie.tile(2, 1) + %tile_2_2 = aie.tile(2, 2) + %tile_2_3 = aie.tile(2, 3) + %tile_2_4 = aie.tile(2, 4) + %tile_3_0 = aie.tile(3, 0) + %tile_3_1 = aie.tile(3, 1) + %tile_3_2 = aie.tile(3, 2) + %tile_3_3 = aie.tile(3, 3) + %tile_3_4 = aie.tile(3, 4) + %tile_4_0 = aie.tile(4, 0) + %tile_4_1 = aie.tile(4, 1) + %tile_4_2 = aie.tile(4, 2) + %tile_4_3 = aie.tile(4, 3) + %tile_4_4 = aie.tile(4, 4) + %tile_5_0 = aie.tile(5, 0) + %tile_5_1 = aie.tile(5, 1) + %tile_5_2 = aie.tile(5, 2) + %tile_5_3 = aie.tile(5, 3) + %tile_5_4 = aie.tile(5, 4) + %tile_6_0 = aie.tile(6, 0) + %tile_6_1 = aie.tile(6, 1) + %tile_6_2 = aie.tile(6, 2) + %tile_6_3 = aie.tile(6, 3) + %tile_6_4 = aie.tile(6, 4) + %tile_7_0 = aie.tile(7, 0) + %tile_7_1 = aie.tile(7, 1) + %tile_7_2 = aie.tile(7, 2) + %tile_7_3 = aie.tile(7, 3) + %tile_7_4 = aie.tile(7, 4) + %tile_8_0 = aie.tile(8, 0) + %tile_8_1 = aie.tile(8, 1) + %tile_8_2 = aie.tile(8, 2) + %tile_8_3 = aie.tile(8, 3) + %tile_8_4 = aie.tile(8, 4) + %tile_9_0 = aie.tile(9, 0) + %tile_9_1 = aie.tile(9, 1) + %tile_9_2 = aie.tile(9, 2) + %tile_9_3 = aie.tile(9, 3) + %tile_9_4 = aie.tile(9, 4) + %tile_10_0 = aie.tile(10, 0) + %tile_10_1 = aie.tile(10, 1) + %tile_10_2 = aie.tile(10, 2) + %tile_10_3 = aie.tile(10, 3) + %tile_10_4 = aie.tile(10, 4) + %tile_11_0 = aie.tile(11, 0) + %tile_11_1 = aie.tile(11, 1) + %tile_11_2 = aie.tile(11, 2) + %tile_11_3 = aie.tile(11, 3) + %tile_11_4 = aie.tile(11, 4) + %tile_12_1 = aie.tile(12, 1) + %tile_12_2 = aie.tile(12, 2) + %tile_12_3 = aie.tile(12, 3) + %tile_12_4 = aie.tile(12, 4) + %tile_18_0 = aie.tile(18, 0) + %tile_19_0 = aie.tile(19, 0) - %switchbox_0_1 = AIE.switchbox(%tile_0_1) { - AIE.connect + %switchbox_0_1 = aie.switchbox(%tile_0_1) { + aie.connect } - %switchbox_0_2 = AIE.switchbox(%tile_0_2) { - AIE.connect + %switchbox_0_2 = aie.switchbox(%tile_0_2) { + aie.connect } - %switchbox_0_3 = AIE.switchbox(%tile_0_3) { - AIE.connect - AIE.connect + %switchbox_0_3 = aie.switchbox(%tile_0_3) { + aie.connect + aie.connect } - %switchbox_1_1 = AIE.switchbox(%tile_1_1) { - AIE.connect + %switchbox_1_1 = aie.switchbox(%tile_1_1) { + aie.connect } - %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - AIE.connect + %switchbox_1_2 = aie.switchbox(%tile_1_2) { + aie.connect } - %switchbox_1_3 = AIE.switchbox(%tile_1_3) { - AIE.connect + %switchbox_1_3 = aie.switchbox(%tile_1_3) { + aie.connect } - %switchbox_1_4 = AIE.switchbox(%tile_1_4) { - AIE.connect + %switchbox_1_4 = aie.switchbox(%tile_1_4) { + aie.connect } - %switchbox_2_1 = AIE.switchbox(%tile_2_1) { - AIE.connect + %switchbox_2_1 = aie.switchbox(%tile_2_1) { + aie.connect } - %switchbox_2_2 = AIE.switchbox(%tile_2_2) { - AIE.connect + %switchbox_2_2 = aie.switchbox(%tile_2_2) { + aie.connect } - %switchbox_2_3 = AIE.switchbox(%tile_2_3) { - AIE.connect + %switchbox_2_3 = aie.switchbox(%tile_2_3) { + aie.connect } - %switchbox_2_4 = AIE.switchbox(%tile_2_4) { - AIE.connect + %switchbox_2_4 = aie.switchbox(%tile_2_4) { + aie.connect } - %switchbox_3_1 = AIE.switchbox(%tile_3_1) { - AIE.connect + %switchbox_3_1 = aie.switchbox(%tile_3_1) { + aie.connect } - %switchbox_3_2 = AIE.switchbox(%tile_3_2) { - AIE.connect + %switchbox_3_2 = aie.switchbox(%tile_3_2) { + aie.connect } - %switchbox_3_3 = AIE.switchbox(%tile_3_3) { - AIE.connect + %switchbox_3_3 = aie.switchbox(%tile_3_3) { + aie.connect } - %switchbox_3_4 = AIE.switchbox(%tile_3_4) { + %switchbox_3_4 = aie.switchbox(%tile_3_4) { } - %switchbox_4_1 = AIE.switchbox(%tile_4_1) { - AIE.connect + %switchbox_4_1 = aie.switchbox(%tile_4_1) { + aie.connect } - %switchbox_4_2 = AIE.switchbox(%tile_4_2) { - AIE.connect + %switchbox_4_2 = aie.switchbox(%tile_4_2) { + aie.connect } - %switchbox_5_1 = AIE.switchbox(%tile_5_1) { - AIE.connect + %switchbox_5_1 = aie.switchbox(%tile_5_1) { + aie.connect } - %switchbox_5_2 = AIE.switchbox(%tile_5_2) { - AIE.connect + %switchbox_5_2 = aie.switchbox(%tile_5_2) { + aie.connect } - %switchbox_5_3 = AIE.switchbox(%tile_5_3) { - AIE.connect + %switchbox_5_3 = aie.switchbox(%tile_5_3) { + aie.connect } - %switchbox_6_1 = AIE.switchbox(%tile_6_1) { - AIE.connect - AIE.connect + %switchbox_6_1 = aie.switchbox(%tile_6_1) { + aie.connect + aie.connect } - %switchbox_6_2 = AIE.switchbox(%tile_6_2) { - AIE.connect - AIE.connect + %switchbox_6_2 = aie.switchbox(%tile_6_2) { + aie.connect + aie.connect } - %switchbox_6_3 = AIE.switchbox(%tile_6_3) { - AIE.connect - AIE.connect + %switchbox_6_3 = aie.switchbox(%tile_6_3) { + aie.connect + aie.connect } - %switchbox_7_1 = AIE.switchbox(%tile_7_1) { - AIE.connect - AIE.connect + %switchbox_7_1 = aie.switchbox(%tile_7_1) { + aie.connect + aie.connect } - %switchbox_7_2 = AIE.switchbox(%tile_7_2) { - AIE.connect - AIE.connect + %switchbox_7_2 = aie.switchbox(%tile_7_2) { + aie.connect + aie.connect } - %switchbox_7_3 = AIE.switchbox(%tile_7_3) { - AIE.connect - AIE.connect + %switchbox_7_3 = aie.switchbox(%tile_7_3) { + aie.connect + aie.connect } - %switchbox_7_4 = AIE.switchbox(%tile_7_4) { - AIE.connect - AIE.connect + %switchbox_7_4 = aie.switchbox(%tile_7_4) { + aie.connect + aie.connect } - %switchbox_9_1 = AIE.switchbox(%tile_9_1) { - AIE.connect + %switchbox_9_1 = aie.switchbox(%tile_9_1) { + aie.connect } - %switchbox_9_2 = AIE.switchbox(%tile_9_2) { - AIE.connect + %switchbox_9_2 = aie.switchbox(%tile_9_2) { + aie.connect } - %switchbox_10_1 = AIE.switchbox(%tile_10_1) { - AIE.connect + %switchbox_10_1 = aie.switchbox(%tile_10_1) { + aie.connect } - %switchbox_10_2 = AIE.switchbox(%tile_10_2) { - AIE.connect + %switchbox_10_2 = aie.switchbox(%tile_10_2) { + aie.connect } - %switchbox_11_1 = AIE.switchbox(%tile_11_1) { - AIE.connect - AIE.connect + %switchbox_11_1 = aie.switchbox(%tile_11_1) { + aie.connect + aie.connect } - %switchbox_11_2 = AIE.switchbox(%tile_11_2) { - AIE.connect - AIE.connect + %switchbox_11_2 = aie.switchbox(%tile_11_2) { + aie.connect + aie.connect } - %switchbox_11_3 = AIE.switchbox(%tile_11_3) { - AIE.connect - AIE.connect + %switchbox_11_3 = aie.switchbox(%tile_11_3) { + aie.connect + aie.connect } - AIE.flow(%tile_6_0, DMA : 1, %tile_4_0, North : 0) - AIE.flow(%tile_7_0, DMA : 0, %tile_1_0, North : 0) - AIE.flow(%tile_7_0, DMA : 1, %tile_5_0, North : 0) - AIE.flow(%tile_19_0, DMA : 0, %tile_7_0, North : 0) + aie.flow(%tile_6_0, DMA : 1, %tile_4_0, North : 0) + aie.flow(%tile_7_0, DMA : 0, %tile_1_0, North : 0) + aie.flow(%tile_7_0, DMA : 1, %tile_5_0, North : 0) + aie.flow(%tile_19_0, DMA : 0, %tile_7_0, North : 0) } } """ @@ -795,11 +795,11 @@ def test_routed_herd_3x1_mine_1(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: AIE.flow(%tile_6_0, DMA : 1, %tile_4_2, DMA : 0) - # CHECK: AIE.flow(%tile_7_0, DMA : 0, %tile_0_3, DMA : 1) - # AIE.flow(%tile_7_0, DMA : 0, %tile_7_4, DMA : 1) - # CHECK: AIE.flow(%tile_7_0, DMA : 1, %tile_5_3, DMA : 0) - # CHECK: AIE.flow(%tile_19_0, DMA : 0, %tile_7_4, DMA : 0) + # CHECK: aie.flow(%tile_6_0, DMA : 1, %tile_4_2, DMA : 0) + # CHECK: aie.flow(%tile_7_0, DMA : 0, %tile_0_3, DMA : 1) + # aie.flow(%tile_7_0, DMA : 0, %tile_7_4, DMA : 1) + # CHECK: aie.flow(%tile_7_0, DMA : 1, %tile_5_3, DMA : 0) + # CHECK: aie.flow(%tile_19_0, DMA : 0, %tile_7_4, DMA : 0) print(mlir_module) @@ -809,227 +809,227 @@ def test_routed_herd_3x1_mine_2(): src = dedent( """\ module { - AIE.device(xcvc1902) { - %tile_0_0 = AIE.tile(0, 0) - %tile_1_0 = AIE.tile(1, 0) - %tile_2_0 = AIE.tile(2, 0) - %tile_3_0 = AIE.tile(3, 0) - %tile_4_0 = AIE.tile(4, 0) - %tile_5_0 = AIE.tile(5, 0) - %tile_6_0 = AIE.tile(6, 0) - %tile_7_0 = AIE.tile(7, 0) - %tile_8_0 = AIE.tile(8, 0) - %tile_9_0 = AIE.tile(9, 0) - %tile_10_0 = AIE.tile(10, 0) - %tile_11_0 = AIE.tile(11, 0) - %tile_18_0 = AIE.tile(18, 0) - %tile_19_0 = AIE.tile(19, 0) - %tile_0_1 = AIE.tile(0, 1) - %tile_0_2 = AIE.tile(0, 2) - %tile_0_3 = AIE.tile(0, 3) - %tile_0_4 = AIE.tile(0, 4) - %tile_1_1 = AIE.tile(1, 1) - %tile_1_2 = AIE.tile(1, 2) - %tile_1_3 = AIE.tile(1, 3) - %tile_1_4 = AIE.tile(1, 4) - %tile_2_1 = AIE.tile(2, 1) - %tile_2_2 = AIE.tile(2, 2) - %tile_2_3 = AIE.tile(2, 3) - %tile_2_4 = AIE.tile(2, 4) - %tile_3_1 = AIE.tile(3, 1) - %tile_3_2 = AIE.tile(3, 2) - %tile_3_3 = AIE.tile(3, 3) - %tile_3_4 = AIE.tile(3, 4) - %tile_4_1 = AIE.tile(4, 1) - %tile_4_2 = AIE.tile(4, 2) - %tile_4_3 = AIE.tile(4, 3) - %tile_4_4 = AIE.tile(4, 4) - %tile_5_1 = AIE.tile(5, 1) - %tile_5_2 = AIE.tile(5, 2) - %tile_5_3 = AIE.tile(5, 3) - %tile_5_4 = AIE.tile(5, 4) - %tile_6_1 = AIE.tile(6, 1) - %tile_6_2 = AIE.tile(6, 2) - %tile_6_3 = AIE.tile(6, 3) - %tile_6_4 = AIE.tile(6, 4) - %tile_7_1 = AIE.tile(7, 1) - %tile_7_2 = AIE.tile(7, 2) - %tile_7_3 = AIE.tile(7, 3) - %tile_7_4 = AIE.tile(7, 4) - %tile_8_1 = AIE.tile(8, 1) - %tile_8_2 = AIE.tile(8, 2) - %tile_8_3 = AIE.tile(8, 3) - %tile_8_4 = AIE.tile(8, 4) - %tile_9_1 = AIE.tile(9, 1) - %tile_9_2 = AIE.tile(9, 2) - %tile_9_3 = AIE.tile(9, 3) - %tile_9_4 = AIE.tile(9, 4) - %tile_10_1 = AIE.tile(10, 1) - %tile_10_2 = AIE.tile(10, 2) - %tile_10_3 = AIE.tile(10, 3) - %tile_10_4 = AIE.tile(10, 4) - %tile_11_1 = AIE.tile(11, 1) - %tile_11_2 = AIE.tile(11, 2) - %tile_11_3 = AIE.tile(11, 3) - %tile_11_4 = AIE.tile(11, 4) - %tile_12_1 = AIE.tile(12, 1) - %tile_12_2 = AIE.tile(12, 2) - %tile_12_3 = AIE.tile(12, 3) - %tile_12_4 = AIE.tile(12, 4) - %switchbox_0_1 = AIE.switchbox(%tile_0_1) { - AIE.connect - } - %switchbox_0_2 = AIE.switchbox(%tile_0_2) { - AIE.connect - } - %switchbox_0_3 = AIE.switchbox(%tile_0_3) { - AIE.connect - AIE.connect - } - %switchbox_0_4 = AIE.switchbox(%tile_0_4) { - } - %switchbox_1_1 = AIE.switchbox(%tile_1_1) { - AIE.connect - } - %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - AIE.connect - } - %switchbox_1_3 = AIE.switchbox(%tile_1_3) { - AIE.connect - } - %switchbox_1_4 = AIE.switchbox(%tile_1_4) { - AIE.connect - } - %switchbox_2_1 = AIE.switchbox(%tile_2_1) { - AIE.connect - } - %switchbox_2_2 = AIE.switchbox(%tile_2_2) { - AIE.connect - } - %switchbox_2_3 = AIE.switchbox(%tile_2_3) { - AIE.connect - } - %switchbox_2_4 = AIE.switchbox(%tile_2_4) { - AIE.connect - } - %switchbox_3_1 = AIE.switchbox(%tile_3_1) { - AIE.connect - } - %switchbox_3_2 = AIE.switchbox(%tile_3_2) { - AIE.connect - } - %switchbox_3_3 = AIE.switchbox(%tile_3_3) { - AIE.connect - } - %switchbox_3_4 = AIE.switchbox(%tile_3_4) { - } - %switchbox_4_1 = AIE.switchbox(%tile_4_1) { - AIE.connect - } - %switchbox_4_2 = AIE.switchbox(%tile_4_2) { - AIE.connect - } - %switchbox_4_3 = AIE.switchbox(%tile_4_3) { - } - %switchbox_4_4 = AIE.switchbox(%tile_4_4) { - } - %switchbox_5_1 = AIE.switchbox(%tile_5_1) { - AIE.connect + aie.device(xcvc1902) { + %tile_0_0 = aie.tile(0, 0) + %tile_1_0 = aie.tile(1, 0) + %tile_2_0 = aie.tile(2, 0) + %tile_3_0 = aie.tile(3, 0) + %tile_4_0 = aie.tile(4, 0) + %tile_5_0 = aie.tile(5, 0) + %tile_6_0 = aie.tile(6, 0) + %tile_7_0 = aie.tile(7, 0) + %tile_8_0 = aie.tile(8, 0) + %tile_9_0 = aie.tile(9, 0) + %tile_10_0 = aie.tile(10, 0) + %tile_11_0 = aie.tile(11, 0) + %tile_18_0 = aie.tile(18, 0) + %tile_19_0 = aie.tile(19, 0) + %tile_0_1 = aie.tile(0, 1) + %tile_0_2 = aie.tile(0, 2) + %tile_0_3 = aie.tile(0, 3) + %tile_0_4 = aie.tile(0, 4) + %tile_1_1 = aie.tile(1, 1) + %tile_1_2 = aie.tile(1, 2) + %tile_1_3 = aie.tile(1, 3) + %tile_1_4 = aie.tile(1, 4) + %tile_2_1 = aie.tile(2, 1) + %tile_2_2 = aie.tile(2, 2) + %tile_2_3 = aie.tile(2, 3) + %tile_2_4 = aie.tile(2, 4) + %tile_3_1 = aie.tile(3, 1) + %tile_3_2 = aie.tile(3, 2) + %tile_3_3 = aie.tile(3, 3) + %tile_3_4 = aie.tile(3, 4) + %tile_4_1 = aie.tile(4, 1) + %tile_4_2 = aie.tile(4, 2) + %tile_4_3 = aie.tile(4, 3) + %tile_4_4 = aie.tile(4, 4) + %tile_5_1 = aie.tile(5, 1) + %tile_5_2 = aie.tile(5, 2) + %tile_5_3 = aie.tile(5, 3) + %tile_5_4 = aie.tile(5, 4) + %tile_6_1 = aie.tile(6, 1) + %tile_6_2 = aie.tile(6, 2) + %tile_6_3 = aie.tile(6, 3) + %tile_6_4 = aie.tile(6, 4) + %tile_7_1 = aie.tile(7, 1) + %tile_7_2 = aie.tile(7, 2) + %tile_7_3 = aie.tile(7, 3) + %tile_7_4 = aie.tile(7, 4) + %tile_8_1 = aie.tile(8, 1) + %tile_8_2 = aie.tile(8, 2) + %tile_8_3 = aie.tile(8, 3) + %tile_8_4 = aie.tile(8, 4) + %tile_9_1 = aie.tile(9, 1) + %tile_9_2 = aie.tile(9, 2) + %tile_9_3 = aie.tile(9, 3) + %tile_9_4 = aie.tile(9, 4) + %tile_10_1 = aie.tile(10, 1) + %tile_10_2 = aie.tile(10, 2) + %tile_10_3 = aie.tile(10, 3) + %tile_10_4 = aie.tile(10, 4) + %tile_11_1 = aie.tile(11, 1) + %tile_11_2 = aie.tile(11, 2) + %tile_11_3 = aie.tile(11, 3) + %tile_11_4 = aie.tile(11, 4) + %tile_12_1 = aie.tile(12, 1) + %tile_12_2 = aie.tile(12, 2) + %tile_12_3 = aie.tile(12, 3) + %tile_12_4 = aie.tile(12, 4) + %switchbox_0_1 = aie.switchbox(%tile_0_1) { + aie.connect + } + %switchbox_0_2 = aie.switchbox(%tile_0_2) { + aie.connect + } + %switchbox_0_3 = aie.switchbox(%tile_0_3) { + aie.connect + aie.connect + } + %switchbox_0_4 = aie.switchbox(%tile_0_4) { + } + %switchbox_1_1 = aie.switchbox(%tile_1_1) { + aie.connect + } + %switchbox_1_2 = aie.switchbox(%tile_1_2) { + aie.connect + } + %switchbox_1_3 = aie.switchbox(%tile_1_3) { + aie.connect + } + %switchbox_1_4 = aie.switchbox(%tile_1_4) { + aie.connect + } + %switchbox_2_1 = aie.switchbox(%tile_2_1) { + aie.connect + } + %switchbox_2_2 = aie.switchbox(%tile_2_2) { + aie.connect + } + %switchbox_2_3 = aie.switchbox(%tile_2_3) { + aie.connect + } + %switchbox_2_4 = aie.switchbox(%tile_2_4) { + aie.connect + } + %switchbox_3_1 = aie.switchbox(%tile_3_1) { + aie.connect + } + %switchbox_3_2 = aie.switchbox(%tile_3_2) { + aie.connect + } + %switchbox_3_3 = aie.switchbox(%tile_3_3) { + aie.connect + } + %switchbox_3_4 = aie.switchbox(%tile_3_4) { + } + %switchbox_4_1 = aie.switchbox(%tile_4_1) { + aie.connect + } + %switchbox_4_2 = aie.switchbox(%tile_4_2) { + aie.connect + } + %switchbox_4_3 = aie.switchbox(%tile_4_3) { + } + %switchbox_4_4 = aie.switchbox(%tile_4_4) { + } + %switchbox_5_1 = aie.switchbox(%tile_5_1) { + aie.connect } - %switchbox_5_2 = AIE.switchbox(%tile_5_2) { - AIE.connect + %switchbox_5_2 = aie.switchbox(%tile_5_2) { + aie.connect } - %switchbox_5_3 = AIE.switchbox(%tile_5_3) { - AIE.connect + %switchbox_5_3 = aie.switchbox(%tile_5_3) { + aie.connect } - %switchbox_5_4 = AIE.switchbox(%tile_5_4) { + %switchbox_5_4 = aie.switchbox(%tile_5_4) { } - %switchbox_6_1 = AIE.switchbox(%tile_6_1) { - AIE.connect - AIE.connect + %switchbox_6_1 = aie.switchbox(%tile_6_1) { + aie.connect + aie.connect } - %switchbox_6_2 = AIE.switchbox(%tile_6_2) { - AIE.connect - AIE.connect + %switchbox_6_2 = aie.switchbox(%tile_6_2) { + aie.connect + aie.connect } - %switchbox_6_3 = AIE.switchbox(%tile_6_3) { - AIE.connect - AIE.connect + %switchbox_6_3 = aie.switchbox(%tile_6_3) { + aie.connect + aie.connect } - %switchbox_6_4 = AIE.switchbox(%tile_6_4) { + %switchbox_6_4 = aie.switchbox(%tile_6_4) { } - %switchbox_7_1 = AIE.switchbox(%tile_7_1) { - AIE.connect - AIE.connect + %switchbox_7_1 = aie.switchbox(%tile_7_1) { + aie.connect + aie.connect } - %switchbox_7_2 = AIE.switchbox(%tile_7_2) { - AIE.connect - AIE.connect + %switchbox_7_2 = aie.switchbox(%tile_7_2) { + aie.connect + aie.connect } - %switchbox_7_3 = AIE.switchbox(%tile_7_3) { - AIE.connect - AIE.connect + %switchbox_7_3 = aie.switchbox(%tile_7_3) { + aie.connect + aie.connect } - %switchbox_7_4 = AIE.switchbox(%tile_7_4) { - AIE.connect - AIE.connect + %switchbox_7_4 = aie.switchbox(%tile_7_4) { + aie.connect + aie.connect } - %switchbox_8_1 = AIE.switchbox(%tile_8_1) { + %switchbox_8_1 = aie.switchbox(%tile_8_1) { } - %switchbox_8_2 = AIE.switchbox(%tile_8_2) { + %switchbox_8_2 = aie.switchbox(%tile_8_2) { } - %switchbox_8_3 = AIE.switchbox(%tile_8_3) { + %switchbox_8_3 = aie.switchbox(%tile_8_3) { } - %switchbox_8_4 = AIE.switchbox(%tile_8_4) { + %switchbox_8_4 = aie.switchbox(%tile_8_4) { } - %switchbox_9_1 = AIE.switchbox(%tile_9_1) { - AIE.connect + %switchbox_9_1 = aie.switchbox(%tile_9_1) { + aie.connect } - %switchbox_9_2 = AIE.switchbox(%tile_9_2) { - AIE.connect + %switchbox_9_2 = aie.switchbox(%tile_9_2) { + aie.connect } - %switchbox_9_3 = AIE.switchbox(%tile_9_3) { + %switchbox_9_3 = aie.switchbox(%tile_9_3) { } - %switchbox_9_4 = AIE.switchbox(%tile_9_4) { + %switchbox_9_4 = aie.switchbox(%tile_9_4) { } - %switchbox_10_1 = AIE.switchbox(%tile_10_1) { - AIE.connect + %switchbox_10_1 = aie.switchbox(%tile_10_1) { + aie.connect } - %switchbox_10_2 = AIE.switchbox(%tile_10_2) { - AIE.connect + %switchbox_10_2 = aie.switchbox(%tile_10_2) { + aie.connect } - %switchbox_10_3 = AIE.switchbox(%tile_10_3) { + %switchbox_10_3 = aie.switchbox(%tile_10_3) { } - %switchbox_10_4 = AIE.switchbox(%tile_10_4) { + %switchbox_10_4 = aie.switchbox(%tile_10_4) { } - %switchbox_11_1 = AIE.switchbox(%tile_11_1) { - AIE.connect - AIE.connect + %switchbox_11_1 = aie.switchbox(%tile_11_1) { + aie.connect + aie.connect } - %switchbox_11_2 = AIE.switchbox(%tile_11_2) { - AIE.connect - AIE.connect + %switchbox_11_2 = aie.switchbox(%tile_11_2) { + aie.connect + aie.connect } - %switchbox_11_3 = AIE.switchbox(%tile_11_3) { - AIE.connect - AIE.connect + %switchbox_11_3 = aie.switchbox(%tile_11_3) { + aie.connect + aie.connect } - %switchbox_11_4 = AIE.switchbox(%tile_11_4) { + %switchbox_11_4 = aie.switchbox(%tile_11_4) { } - // AIE.flow(%tile_2_0, DMA : 0, %tile_2_0, North : 0) - AIE.flow(%tile_2_0, DMA : 1, %tile_6_0, North : 1) - // AIE.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) - AIE.flow(%tile_3_0, DMA : 1, %tile_7_0, North : 1) - AIE.flow(%tile_6_0, DMA : 0, %tile_0_0, North : 0) - AIE.flow(%tile_6_0, DMA : 1, %tile_4_0, North : 0) - AIE.flow(%tile_7_0, DMA : 0, %tile_1_0, North : 0) - AIE.flow(%tile_7_0, DMA : 1, %tile_5_0, North : 0) - // AIE.flow(%tile_10_0, DMA : 0, %tile_10_0, North : 0) - // AIE.flow(%tile_11_0, DMA : 0, %tile_11_0, North : 0) - AIE.flow(%tile_18_0, DMA : 0, %tile_6_0, North : 0) - AIE.flow(%tile_18_0, DMA : 1, %tile_9_0, North : 0) - AIE.flow(%tile_19_0, DMA : 0, %tile_7_0, North : 0) - AIE.flow(%tile_19_0, DMA : 1, %tile_11_0, North : 1) + // aie.flow(%tile_2_0, DMA : 0, %tile_2_0, North : 0) + aie.flow(%tile_2_0, DMA : 1, %tile_6_0, North : 1) + // aie.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) + aie.flow(%tile_3_0, DMA : 1, %tile_7_0, North : 1) + aie.flow(%tile_6_0, DMA : 0, %tile_0_0, North : 0) + aie.flow(%tile_6_0, DMA : 1, %tile_4_0, North : 0) + aie.flow(%tile_7_0, DMA : 0, %tile_1_0, North : 0) + aie.flow(%tile_7_0, DMA : 1, %tile_5_0, North : 0) + // aie.flow(%tile_10_0, DMA : 0, %tile_10_0, North : 0) + // aie.flow(%tile_11_0, DMA : 0, %tile_11_0, North : 0) + aie.flow(%tile_18_0, DMA : 0, %tile_6_0, North : 0) + aie.flow(%tile_18_0, DMA : 1, %tile_9_0, North : 0) + aie.flow(%tile_19_0, DMA : 0, %tile_7_0, North : 0) + aie.flow(%tile_19_0, DMA : 1, %tile_11_0, North : 1) } } """ @@ -1044,17 +1044,17 @@ def test_routed_herd_3x1_mine_2(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: AIE.flow(%tile_2_0, DMA : 1, %tile_6_3, DMA : 1) - # CHECK: AIE.flow(%tile_3_0, DMA : 1, %tile_7_4, DMA : 1) - # AIE.flow(%tile_3_0, DMA : 1, %tile_3_3, DMA : 0) - # CHECK: AIE.flow(%tile_6_0, DMA : 0, %tile_0_3, DMA : 0) - # CHECK: AIE.flow(%tile_6_0, DMA : 1, %tile_4_2, DMA : 0) - # CHECK: AIE.flow(%tile_7_0, DMA : 0, %tile_0_3, DMA : 1) - # CHECK: AIE.flow(%tile_7_0, DMA : 1, %tile_5_3, DMA : 0) - # CHECK: AIE.flow(%tile_18_0, DMA : 0, %tile_6_3, DMA : 0) - # CHECK: AIE.flow(%tile_18_0, DMA : 1, %tile_9_2, DMA : 0) - # CHECK: AIE.flow(%tile_19_0, DMA : 0, %tile_7_4, DMA : 0) - # CHECK: AIE.flow(%tile_19_0, DMA : 1, %tile_11_3, DMA : 1) + # CHECK: aie.flow(%tile_2_0, DMA : 1, %tile_6_3, DMA : 1) + # CHECK: aie.flow(%tile_3_0, DMA : 1, %tile_7_4, DMA : 1) + # aie.flow(%tile_3_0, DMA : 1, %tile_3_3, DMA : 0) + # CHECK: aie.flow(%tile_6_0, DMA : 0, %tile_0_3, DMA : 0) + # CHECK: aie.flow(%tile_6_0, DMA : 1, %tile_4_2, DMA : 0) + # CHECK: aie.flow(%tile_7_0, DMA : 0, %tile_0_3, DMA : 1) + # CHECK: aie.flow(%tile_7_0, DMA : 1, %tile_5_3, DMA : 0) + # CHECK: aie.flow(%tile_18_0, DMA : 0, %tile_6_3, DMA : 0) + # CHECK: aie.flow(%tile_18_0, DMA : 1, %tile_9_2, DMA : 0) + # CHECK: aie.flow(%tile_19_0, DMA : 0, %tile_7_4, DMA : 0) + # CHECK: aie.flow(%tile_19_0, DMA : 1, %tile_11_3, DMA : 1) print(mlir_module) @@ -1064,307 +1064,307 @@ def test_routed_herd_3x2_mine_1(): src = dedent( """\ module { - AIE.device(xcvc1902) { - %tile_0_0 = AIE.tile(0, 0) - %tile_1_0 = AIE.tile(1, 0) - %tile_2_0 = AIE.tile(2, 0) - %tile_3_0 = AIE.tile(3, 0) - %tile_4_0 = AIE.tile(4, 0) - %tile_5_0 = AIE.tile(5, 0) - %tile_6_0 = AIE.tile(6, 0) - %tile_7_0 = AIE.tile(7, 0) - %tile_8_0 = AIE.tile(8, 0) - %tile_9_0 = AIE.tile(9, 0) - %tile_10_0 = AIE.tile(10, 0) - %tile_11_0 = AIE.tile(11, 0) - %tile_18_0 = AIE.tile(18, 0) - %tile_19_0 = AIE.tile(19, 0) - %tile_0_1 = AIE.tile(0, 1) - %tile_0_2 = AIE.tile(0, 2) - %tile_0_3 = AIE.tile(0, 3) - %tile_0_4 = AIE.tile(0, 4) - %tile_0_5 = AIE.tile(0, 5) - %tile_0_6 = AIE.tile(0, 6) - %tile_0_7 = AIE.tile(0, 7) - %tile_0_8 = AIE.tile(0, 8) - %tile_1_1 = AIE.tile(1, 1) - %tile_1_2 = AIE.tile(1, 2) - %tile_1_3 = AIE.tile(1, 3) - %tile_1_4 = AIE.tile(1, 4) - %tile_1_5 = AIE.tile(1, 5) - %tile_1_6 = AIE.tile(1, 6) - %tile_1_7 = AIE.tile(1, 7) - %tile_1_8 = AIE.tile(1, 8) - %tile_2_1 = AIE.tile(2, 1) - %tile_2_2 = AIE.tile(2, 2) - %tile_2_3 = AIE.tile(2, 3) - %tile_2_4 = AIE.tile(2, 4) - %tile_2_5 = AIE.tile(2, 5) - %tile_2_6 = AIE.tile(2, 6) - %tile_2_7 = AIE.tile(2, 7) - %tile_2_8 = AIE.tile(2, 8) - %tile_3_1 = AIE.tile(3, 1) - %tile_3_2 = AIE.tile(3, 2) - %tile_3_3 = AIE.tile(3, 3) - %tile_3_4 = AIE.tile(3, 4) - %tile_3_5 = AIE.tile(3, 5) - %tile_3_6 = AIE.tile(3, 6) - %tile_3_7 = AIE.tile(3, 7) - %tile_3_8 = AIE.tile(3, 8) - %tile_4_1 = AIE.tile(4, 1) - %tile_4_2 = AIE.tile(4, 2) - %tile_4_3 = AIE.tile(4, 3) - %tile_4_4 = AIE.tile(4, 4) - %tile_4_5 = AIE.tile(4, 5) - %tile_4_6 = AIE.tile(4, 6) - %tile_4_7 = AIE.tile(4, 7) - %tile_4_8 = AIE.tile(4, 8) - %tile_5_1 = AIE.tile(5, 1) - %tile_5_2 = AIE.tile(5, 2) - %tile_5_3 = AIE.tile(5, 3) - %tile_5_4 = AIE.tile(5, 4) - %tile_5_5 = AIE.tile(5, 5) - %tile_5_6 = AIE.tile(5, 6) - %tile_5_7 = AIE.tile(5, 7) - %tile_5_8 = AIE.tile(5, 8) - %tile_6_1 = AIE.tile(6, 1) - %tile_6_2 = AIE.tile(6, 2) - %tile_6_3 = AIE.tile(6, 3) - %tile_6_4 = AIE.tile(6, 4) - %tile_6_5 = AIE.tile(6, 5) - %tile_6_6 = AIE.tile(6, 6) - %tile_6_7 = AIE.tile(6, 7) - %tile_6_8 = AIE.tile(6, 8) - %tile_7_1 = AIE.tile(7, 1) - %tile_7_2 = AIE.tile(7, 2) - %tile_7_3 = AIE.tile(7, 3) - %tile_7_4 = AIE.tile(7, 4) - %tile_7_5 = AIE.tile(7, 5) - %tile_7_6 = AIE.tile(7, 6) - %tile_7_7 = AIE.tile(7, 7) - %tile_7_8 = AIE.tile(7, 8) - %tile_8_1 = AIE.tile(8, 1) - %tile_8_2 = AIE.tile(8, 2) - %tile_8_3 = AIE.tile(8, 3) - %tile_8_4 = AIE.tile(8, 4) - %tile_8_5 = AIE.tile(8, 5) - %tile_8_6 = AIE.tile(8, 6) - %tile_8_7 = AIE.tile(8, 7) - %tile_8_8 = AIE.tile(8, 8) - %tile_9_1 = AIE.tile(9, 1) - %tile_9_2 = AIE.tile(9, 2) - %tile_9_3 = AIE.tile(9, 3) - %tile_9_4 = AIE.tile(9, 4) - %tile_9_5 = AIE.tile(9, 5) - %tile_9_6 = AIE.tile(9, 6) - %tile_9_7 = AIE.tile(9, 7) - %tile_9_8 = AIE.tile(9, 8) - %tile_10_1 = AIE.tile(10, 1) - %tile_10_2 = AIE.tile(10, 2) - %tile_10_3 = AIE.tile(10, 3) - %tile_10_4 = AIE.tile(10, 4) - %tile_10_5 = AIE.tile(10, 5) - %tile_10_6 = AIE.tile(10, 6) - %tile_10_7 = AIE.tile(10, 7) - %tile_10_8 = AIE.tile(10, 8) - %tile_11_1 = AIE.tile(11, 1) - %tile_11_2 = AIE.tile(11, 2) - %tile_11_3 = AIE.tile(11, 3) - %tile_11_4 = AIE.tile(11, 4) - %tile_11_5 = AIE.tile(11, 5) - %tile_11_6 = AIE.tile(11, 6) - %tile_11_7 = AIE.tile(11, 7) - %tile_11_8 = AIE.tile(11, 8) - %tile_12_1 = AIE.tile(12, 1) - %tile_12_2 = AIE.tile(12, 2) - %tile_12_3 = AIE.tile(12, 3) - %tile_12_4 = AIE.tile(12, 4) - %tile_12_5 = AIE.tile(12, 5) - %tile_12_6 = AIE.tile(12, 6) - %tile_12_7 = AIE.tile(12, 7) - %tile_12_8 = AIE.tile(12, 8) - %tile_13_0 = AIE.tile(13, 0) - %tile_13_1 = AIE.tile(13, 1) - %tile_13_2 = AIE.tile(13, 2) - %tile_13_3 = AIE.tile(13, 3) - %tile_13_4 = AIE.tile(13, 4) - %tile_13_5 = AIE.tile(13, 5) - %tile_13_6 = AIE.tile(13, 6) - %tile_13_7 = AIE.tile(13, 7) - %tile_13_8 = AIE.tile(13, 8) - %tile_14_1 = AIE.tile(14, 1) - %tile_14_2 = AIE.tile(14, 2) - %tile_14_3 = AIE.tile(14, 3) - %tile_14_4 = AIE.tile(14, 4) - %tile_14_5 = AIE.tile(14, 5) - %tile_14_6 = AIE.tile(14, 6) - %tile_14_7 = AIE.tile(14, 7) - %tile_14_8 = AIE.tile(14, 8) - %switchbox_0_1 = AIE.switchbox(%tile_0_1) { - } - %switchbox_0_2 = AIE.switchbox(%tile_0_2) { - } - %switchbox_0_3 = AIE.switchbox(%tile_0_3) { - } - %switchbox_0_4 = AIE.switchbox(%tile_0_4) { - } - %switchbox_1_1 = AIE.switchbox(%tile_1_1) { - } - %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - } - %switchbox_1_3 = AIE.switchbox(%tile_1_3) { - } - %switchbox_1_4 = AIE.switchbox(%tile_1_4) { - } - %switchbox_2_1 = AIE.switchbox(%tile_2_1) { + aie.device(xcvc1902) { + %tile_0_0 = aie.tile(0, 0) + %tile_1_0 = aie.tile(1, 0) + %tile_2_0 = aie.tile(2, 0) + %tile_3_0 = aie.tile(3, 0) + %tile_4_0 = aie.tile(4, 0) + %tile_5_0 = aie.tile(5, 0) + %tile_6_0 = aie.tile(6, 0) + %tile_7_0 = aie.tile(7, 0) + %tile_8_0 = aie.tile(8, 0) + %tile_9_0 = aie.tile(9, 0) + %tile_10_0 = aie.tile(10, 0) + %tile_11_0 = aie.tile(11, 0) + %tile_18_0 = aie.tile(18, 0) + %tile_19_0 = aie.tile(19, 0) + %tile_0_1 = aie.tile(0, 1) + %tile_0_2 = aie.tile(0, 2) + %tile_0_3 = aie.tile(0, 3) + %tile_0_4 = aie.tile(0, 4) + %tile_0_5 = aie.tile(0, 5) + %tile_0_6 = aie.tile(0, 6) + %tile_0_7 = aie.tile(0, 7) + %tile_0_8 = aie.tile(0, 8) + %tile_1_1 = aie.tile(1, 1) + %tile_1_2 = aie.tile(1, 2) + %tile_1_3 = aie.tile(1, 3) + %tile_1_4 = aie.tile(1, 4) + %tile_1_5 = aie.tile(1, 5) + %tile_1_6 = aie.tile(1, 6) + %tile_1_7 = aie.tile(1, 7) + %tile_1_8 = aie.tile(1, 8) + %tile_2_1 = aie.tile(2, 1) + %tile_2_2 = aie.tile(2, 2) + %tile_2_3 = aie.tile(2, 3) + %tile_2_4 = aie.tile(2, 4) + %tile_2_5 = aie.tile(2, 5) + %tile_2_6 = aie.tile(2, 6) + %tile_2_7 = aie.tile(2, 7) + %tile_2_8 = aie.tile(2, 8) + %tile_3_1 = aie.tile(3, 1) + %tile_3_2 = aie.tile(3, 2) + %tile_3_3 = aie.tile(3, 3) + %tile_3_4 = aie.tile(3, 4) + %tile_3_5 = aie.tile(3, 5) + %tile_3_6 = aie.tile(3, 6) + %tile_3_7 = aie.tile(3, 7) + %tile_3_8 = aie.tile(3, 8) + %tile_4_1 = aie.tile(4, 1) + %tile_4_2 = aie.tile(4, 2) + %tile_4_3 = aie.tile(4, 3) + %tile_4_4 = aie.tile(4, 4) + %tile_4_5 = aie.tile(4, 5) + %tile_4_6 = aie.tile(4, 6) + %tile_4_7 = aie.tile(4, 7) + %tile_4_8 = aie.tile(4, 8) + %tile_5_1 = aie.tile(5, 1) + %tile_5_2 = aie.tile(5, 2) + %tile_5_3 = aie.tile(5, 3) + %tile_5_4 = aie.tile(5, 4) + %tile_5_5 = aie.tile(5, 5) + %tile_5_6 = aie.tile(5, 6) + %tile_5_7 = aie.tile(5, 7) + %tile_5_8 = aie.tile(5, 8) + %tile_6_1 = aie.tile(6, 1) + %tile_6_2 = aie.tile(6, 2) + %tile_6_3 = aie.tile(6, 3) + %tile_6_4 = aie.tile(6, 4) + %tile_6_5 = aie.tile(6, 5) + %tile_6_6 = aie.tile(6, 6) + %tile_6_7 = aie.tile(6, 7) + %tile_6_8 = aie.tile(6, 8) + %tile_7_1 = aie.tile(7, 1) + %tile_7_2 = aie.tile(7, 2) + %tile_7_3 = aie.tile(7, 3) + %tile_7_4 = aie.tile(7, 4) + %tile_7_5 = aie.tile(7, 5) + %tile_7_6 = aie.tile(7, 6) + %tile_7_7 = aie.tile(7, 7) + %tile_7_8 = aie.tile(7, 8) + %tile_8_1 = aie.tile(8, 1) + %tile_8_2 = aie.tile(8, 2) + %tile_8_3 = aie.tile(8, 3) + %tile_8_4 = aie.tile(8, 4) + %tile_8_5 = aie.tile(8, 5) + %tile_8_6 = aie.tile(8, 6) + %tile_8_7 = aie.tile(8, 7) + %tile_8_8 = aie.tile(8, 8) + %tile_9_1 = aie.tile(9, 1) + %tile_9_2 = aie.tile(9, 2) + %tile_9_3 = aie.tile(9, 3) + %tile_9_4 = aie.tile(9, 4) + %tile_9_5 = aie.tile(9, 5) + %tile_9_6 = aie.tile(9, 6) + %tile_9_7 = aie.tile(9, 7) + %tile_9_8 = aie.tile(9, 8) + %tile_10_1 = aie.tile(10, 1) + %tile_10_2 = aie.tile(10, 2) + %tile_10_3 = aie.tile(10, 3) + %tile_10_4 = aie.tile(10, 4) + %tile_10_5 = aie.tile(10, 5) + %tile_10_6 = aie.tile(10, 6) + %tile_10_7 = aie.tile(10, 7) + %tile_10_8 = aie.tile(10, 8) + %tile_11_1 = aie.tile(11, 1) + %tile_11_2 = aie.tile(11, 2) + %tile_11_3 = aie.tile(11, 3) + %tile_11_4 = aie.tile(11, 4) + %tile_11_5 = aie.tile(11, 5) + %tile_11_6 = aie.tile(11, 6) + %tile_11_7 = aie.tile(11, 7) + %tile_11_8 = aie.tile(11, 8) + %tile_12_1 = aie.tile(12, 1) + %tile_12_2 = aie.tile(12, 2) + %tile_12_3 = aie.tile(12, 3) + %tile_12_4 = aie.tile(12, 4) + %tile_12_5 = aie.tile(12, 5) + %tile_12_6 = aie.tile(12, 6) + %tile_12_7 = aie.tile(12, 7) + %tile_12_8 = aie.tile(12, 8) + %tile_13_0 = aie.tile(13, 0) + %tile_13_1 = aie.tile(13, 1) + %tile_13_2 = aie.tile(13, 2) + %tile_13_3 = aie.tile(13, 3) + %tile_13_4 = aie.tile(13, 4) + %tile_13_5 = aie.tile(13, 5) + %tile_13_6 = aie.tile(13, 6) + %tile_13_7 = aie.tile(13, 7) + %tile_13_8 = aie.tile(13, 8) + %tile_14_1 = aie.tile(14, 1) + %tile_14_2 = aie.tile(14, 2) + %tile_14_3 = aie.tile(14, 3) + %tile_14_4 = aie.tile(14, 4) + %tile_14_5 = aie.tile(14, 5) + %tile_14_6 = aie.tile(14, 6) + %tile_14_7 = aie.tile(14, 7) + %tile_14_8 = aie.tile(14, 8) + %switchbox_0_1 = aie.switchbox(%tile_0_1) { + } + %switchbox_0_2 = aie.switchbox(%tile_0_2) { + } + %switchbox_0_3 = aie.switchbox(%tile_0_3) { + } + %switchbox_0_4 = aie.switchbox(%tile_0_4) { + } + %switchbox_1_1 = aie.switchbox(%tile_1_1) { + } + %switchbox_1_2 = aie.switchbox(%tile_1_2) { + } + %switchbox_1_3 = aie.switchbox(%tile_1_3) { + } + %switchbox_1_4 = aie.switchbox(%tile_1_4) { + } + %switchbox_2_1 = aie.switchbox(%tile_2_1) { } - %switchbox_2_2 = AIE.switchbox(%tile_2_2) { + %switchbox_2_2 = aie.switchbox(%tile_2_2) { } - %switchbox_2_3 = AIE.switchbox(%tile_2_3) { + %switchbox_2_3 = aie.switchbox(%tile_2_3) { } - %switchbox_2_4 = AIE.switchbox(%tile_2_4) { - AIE.connect + %switchbox_2_4 = aie.switchbox(%tile_2_4) { + aie.connect } - %switchbox_2_5 = AIE.switchbox(%tile_2_5) { - AIE.connect - AIE.connect + %switchbox_2_5 = aie.switchbox(%tile_2_5) { + aie.connect + aie.connect } - %switchbox_3_1 = AIE.switchbox(%tile_3_1) { - AIE.connect - AIE.connect + %switchbox_3_1 = aie.switchbox(%tile_3_1) { + aie.connect + aie.connect } - %switchbox_3_2 = AIE.switchbox(%tile_3_2) { - AIE.connect + %switchbox_3_2 = aie.switchbox(%tile_3_2) { + aie.connect } - %switchbox_3_3 = AIE.switchbox(%tile_3_3) { - AIE.connect + %switchbox_3_3 = aie.switchbox(%tile_3_3) { + aie.connect } - %switchbox_3_4 = AIE.switchbox(%tile_3_4) { - AIE.connect + %switchbox_3_4 = aie.switchbox(%tile_3_4) { + aie.connect } - %switchbox_3_5 = AIE.switchbox(%tile_3_5) { - AIE.connect + %switchbox_3_5 = aie.switchbox(%tile_3_5) { + aie.connect } - %switchbox_4_1 = AIE.switchbox(%tile_4_1) { + %switchbox_4_1 = aie.switchbox(%tile_4_1) { } - %switchbox_4_2 = AIE.switchbox(%tile_4_2) { + %switchbox_4_2 = aie.switchbox(%tile_4_2) { } - %switchbox_4_3 = AIE.switchbox(%tile_4_3) { + %switchbox_4_3 = aie.switchbox(%tile_4_3) { } - %switchbox_4_4 = AIE.switchbox(%tile_4_4) { + %switchbox_4_4 = aie.switchbox(%tile_4_4) { } - %switchbox_5_1 = AIE.switchbox(%tile_5_1) { + %switchbox_5_1 = aie.switchbox(%tile_5_1) { } - %switchbox_5_2 = AIE.switchbox(%tile_5_2) { + %switchbox_5_2 = aie.switchbox(%tile_5_2) { } - %switchbox_5_3 = AIE.switchbox(%tile_5_3) { + %switchbox_5_3 = aie.switchbox(%tile_5_3) { } - %switchbox_5_4 = AIE.switchbox(%tile_5_4) { + %switchbox_5_4 = aie.switchbox(%tile_5_4) { } - %switchbox_5_5 = AIE.switchbox(%tile_5_5) { + %switchbox_5_5 = aie.switchbox(%tile_5_5) { } - %switchbox_5_6 = AIE.switchbox(%tile_5_6) { - AIE.connect + %switchbox_5_6 = aie.switchbox(%tile_5_6) { + aie.connect } - %switchbox_6_1 = AIE.switchbox(%tile_6_1) { + %switchbox_6_1 = aie.switchbox(%tile_6_1) { } - %switchbox_6_2 = AIE.switchbox(%tile_6_2) { + %switchbox_6_2 = aie.switchbox(%tile_6_2) { } - %switchbox_6_3 = AIE.switchbox(%tile_6_3) { + %switchbox_6_3 = aie.switchbox(%tile_6_3) { } - %switchbox_6_4 = AIE.switchbox(%tile_6_4) { + %switchbox_6_4 = aie.switchbox(%tile_6_4) { } - %switchbox_6_5 = AIE.switchbox(%tile_6_5) { + %switchbox_6_5 = aie.switchbox(%tile_6_5) { } - %switchbox_6_6 = AIE.switchbox(%tile_6_6) { - AIE.connect - AIE.connect + %switchbox_6_6 = aie.switchbox(%tile_6_6) { + aie.connect + aie.connect } - %switchbox_7_1 = AIE.switchbox(%tile_7_1) { + %switchbox_7_1 = aie.switchbox(%tile_7_1) { } - %switchbox_7_2 = AIE.switchbox(%tile_7_2) { + %switchbox_7_2 = aie.switchbox(%tile_7_2) { } - %switchbox_7_3 = AIE.switchbox(%tile_7_3) { - AIE.connect - AIE.connect + %switchbox_7_3 = aie.switchbox(%tile_7_3) { + aie.connect + aie.connect } - %switchbox_7_4 = AIE.switchbox(%tile_7_4) { - AIE.connect + %switchbox_7_4 = aie.switchbox(%tile_7_4) { + aie.connect } - %switchbox_7_5 = AIE.switchbox(%tile_7_5) { - AIE.connect + %switchbox_7_5 = aie.switchbox(%tile_7_5) { + aie.connect } - %switchbox_7_6 = AIE.switchbox(%tile_7_6) { - AIE.connect + %switchbox_7_6 = aie.switchbox(%tile_7_6) { + aie.connect } - %switchbox_8_1 = AIE.switchbox(%tile_8_1) { + %switchbox_8_1 = aie.switchbox(%tile_8_1) { } - %switchbox_8_2 = AIE.switchbox(%tile_8_2) { + %switchbox_8_2 = aie.switchbox(%tile_8_2) { } - %switchbox_8_3 = AIE.switchbox(%tile_8_3) { - AIE.connect + %switchbox_8_3 = aie.switchbox(%tile_8_3) { + aie.connect } - %switchbox_8_4 = AIE.switchbox(%tile_8_4) { + %switchbox_8_4 = aie.switchbox(%tile_8_4) { } - %switchbox_9_1 = AIE.switchbox(%tile_9_1) { + %switchbox_9_1 = aie.switchbox(%tile_9_1) { } - %switchbox_9_2 = AIE.switchbox(%tile_9_2) { + %switchbox_9_2 = aie.switchbox(%tile_9_2) { } - %switchbox_9_3 = AIE.switchbox(%tile_9_3) { + %switchbox_9_3 = aie.switchbox(%tile_9_3) { } - %switchbox_9_4 = AIE.switchbox(%tile_9_4) { + %switchbox_9_4 = aie.switchbox(%tile_9_4) { } - %switchbox_10_1 = AIE.switchbox(%tile_10_1) { + %switchbox_10_1 = aie.switchbox(%tile_10_1) { } - %switchbox_10_2 = AIE.switchbox(%tile_10_2) { + %switchbox_10_2 = aie.switchbox(%tile_10_2) { } - %switchbox_10_3 = AIE.switchbox(%tile_10_3) { + %switchbox_10_3 = aie.switchbox(%tile_10_3) { } - %switchbox_10_4 = AIE.switchbox(%tile_10_4) { + %switchbox_10_4 = aie.switchbox(%tile_10_4) { } - %switchbox_11_1 = AIE.switchbox(%tile_11_1) { + %switchbox_11_1 = aie.switchbox(%tile_11_1) { } - %switchbox_11_2 = AIE.switchbox(%tile_11_2) { + %switchbox_11_2 = aie.switchbox(%tile_11_2) { } - %switchbox_11_3 = AIE.switchbox(%tile_11_3) { + %switchbox_11_3 = aie.switchbox(%tile_11_3) { } - %switchbox_11_4 = AIE.switchbox(%tile_11_4) { + %switchbox_11_4 = aie.switchbox(%tile_11_4) { } - %switchbox_12_1 = AIE.switchbox(%tile_12_1) { + %switchbox_12_1 = aie.switchbox(%tile_12_1) { } - %switchbox_12_2 = AIE.switchbox(%tile_12_2) { + %switchbox_12_2 = aie.switchbox(%tile_12_2) { } - %switchbox_12_3 = AIE.switchbox(%tile_12_3) { + %switchbox_12_3 = aie.switchbox(%tile_12_3) { } - %switchbox_12_4 = AIE.switchbox(%tile_12_4) { + %switchbox_12_4 = aie.switchbox(%tile_12_4) { } - %switchbox_12_5 = AIE.switchbox(%tile_12_5) { - AIE.connect - AIE.connect + %switchbox_12_5 = aie.switchbox(%tile_12_5) { + aie.connect + aie.connect } - %switchbox_13_1 = AIE.switchbox(%tile_13_1) { - AIE.connect + %switchbox_13_1 = aie.switchbox(%tile_13_1) { + aie.connect } - %switchbox_13_2 = AIE.switchbox(%tile_13_2) { - AIE.connect + %switchbox_13_2 = aie.switchbox(%tile_13_2) { + aie.connect } - %switchbox_13_3 = AIE.switchbox(%tile_13_3) { - AIE.connect - AIE.connect + %switchbox_13_3 = aie.switchbox(%tile_13_3) { + aie.connect + aie.connect } - %switchbox_13_4 = AIE.switchbox(%tile_13_4) { - AIE.connect + %switchbox_13_4 = aie.switchbox(%tile_13_4) { + aie.connect } - %switchbox_13_5 = AIE.switchbox(%tile_13_5) { - AIE.connect - AIE.connect + %switchbox_13_5 = aie.switchbox(%tile_13_5) { + aie.connect + aie.connect } - // AIE.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) - AIE.flow(%tile_4_5, West : 0, %tile_6_0, DMA : 0) - AIE.flow(%tile_10_0, DMA : 0, %tile_9_3, West : 0) - AIE.flow(%tile_4_6, East : 0, %tile_2_0, DMA : 0) - AIE.flow(%tile_11_0, DMA : 0, %tile_13_0, North : 0) - AIE.flow(%tile_14_5, West : 0, %tile_18_0, DMA : 0) + // aie.flow(%tile_3_0, DMA : 0, %tile_3_0, North : 0) + aie.flow(%tile_4_5, West : 0, %tile_6_0, DMA : 0) + aie.flow(%tile_10_0, DMA : 0, %tile_9_3, West : 0) + aie.flow(%tile_4_6, East : 0, %tile_2_0, DMA : 0) + aie.flow(%tile_11_0, DMA : 0, %tile_13_0, North : 0) + aie.flow(%tile_14_5, West : 0, %tile_18_0, DMA : 0) } } @@ -1380,14 +1380,14 @@ def test_routed_herd_3x2_mine_1(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: AIE.flow(%tile_10_0, DMA : 0, %tile_7_3, DMA : 0) - # CHECK: AIE.flow(%tile_11_0, DMA : 0, %tile_13_3, DMA : 0) - # CHECK: AIE.flow(%tile_2_5, DMA : 0, %tile_6_0, DMA : 0) - # CHECK: AIE.flow(%tile_3_1, Core : 0, %tile_2_5, Core : 0) - # CHECK: AIE.flow(%tile_6_6, DMA : 0, %tile_2_0, DMA : 0) - # CHECK: AIE.flow(%tile_7_3, Core : 0, %tile_6_6, Core : 0) - # CHECK: AIE.flow(%tile_12_5, DMA : 0, %tile_18_0, DMA : 0) - # CHECK: AIE.flow(%tile_13_3, Core : 0, %tile_12_5, Core : 0) + # CHECK: aie.flow(%tile_10_0, DMA : 0, %tile_7_3, DMA : 0) + # CHECK: aie.flow(%tile_11_0, DMA : 0, %tile_13_3, DMA : 0) + # CHECK: aie.flow(%tile_2_5, DMA : 0, %tile_6_0, DMA : 0) + # CHECK: aie.flow(%tile_3_1, Core : 0, %tile_2_5, Core : 0) + # CHECK: aie.flow(%tile_6_6, DMA : 0, %tile_2_0, DMA : 0) + # CHECK: aie.flow(%tile_7_3, Core : 0, %tile_6_6, Core : 0) + # CHECK: aie.flow(%tile_12_5, DMA : 0, %tile_18_0, DMA : 0) + # CHECK: aie.flow(%tile_13_3, Core : 0, %tile_12_5, Core : 0) print(mlir_module) @@ -1405,9 +1405,9 @@ def test_simple(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T01:.*]] = AIE.tile(0, 1) - # CHECK: %[[T12:.*]] = AIE.tile(1, 2) - # CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) + # CHECK: %[[T01:.*]] = aie.tile(0, 1) + # CHECK: %[[T12:.*]] = aie.tile(1, 2) + # CHECK: aie.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) print(mlir_module) @@ -1425,9 +1425,9 @@ def test_simple2(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T23:.*]] = AIE.tile(2, 3) - # CHECK: %[[T32:.*]] = AIE.tile(3, 2) - # CHECK: AIE.flow(%[[T23]], Core : 1, %[[T32]], DMA : 0) + # CHECK: %[[T23:.*]] = aie.tile(2, 3) + # CHECK: %[[T32:.*]] = aie.tile(3, 2) + # CHECK: aie.flow(%[[T23]], Core : 1, %[[T32]], DMA : 0) print(mlir_module) @@ -1447,11 +1447,11 @@ def test_simple_flows2(): device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: %[[T23:.*]] = AIE.tile(2, 3) - # CHECK: %[[T22:.*]] = AIE.tile(2, 2) - # CHECK: %[[T11:.*]] = AIE.tile(1, 1) - # CHECK: AIE.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) - # CHECK: AIE.flow(%[[T22]], Core : 0, %[[T11]], Core : 0) + # CHECK: %[[T23:.*]] = aie.tile(2, 3) + # CHECK: %[[T22:.*]] = aie.tile(2, 2) + # CHECK: %[[T11:.*]] = aie.tile(1, 1) + # CHECK: aie.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) + # CHECK: aie.flow(%[[T22]], Core : 0, %[[T11]], Core : 0) print(mlir_module) @@ -1474,38 +1474,38 @@ def test_simple_flows_shim(): print(mlir_module) - # CHECK: %[[T21:.*]] = AIE.tile(2, 1) - # CHECK: %[[T20:.*]] = AIE.tile(2, 0) - # CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { - # CHECK: AIE.connect + # CHECK: %[[T21:.*]] = aie.tile(2, 1) + # CHECK: %[[T20:.*]] = aie.tile(2, 0) + # CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { - # CHECK: AIE.connect + # CHECK: %{{.*}} = aie.switchbox(%[[T21]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[T20:.*]] = AIE.tile(2, 0) - # CHECK: %[[T21:.*]] = AIE.tile(2, 1) - # CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { - # CHECK: AIE.connect + # CHECK: %[[T20:.*]] = aie.tile(2, 0) + # CHECK: %[[T21:.*]] = aie.tile(2, 1) + # CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %{{.*}} = AIE.shim_mux(%[[T20]]) { - # CHECK: AIE.connect + # CHECK: %{{.*}} = aie.shim_mux(%[[T20]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { - # CHECK: AIE.connect + # CHECK: %{{.*}} = aie.switchbox(%[[T21]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %[[T20:.*]] = AIE.tile(2, 0) - # CHECK: %[[T30:.*]] = AIE.tile(3, 0) - # CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { - # CHECK: AIE.connect + # CHECK: %[[T20:.*]] = aie.tile(2, 0) + # CHECK: %[[T30:.*]] = aie.tile(3, 0) + # CHECK: %{{.*}} = aie.switchbox(%[[T20]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %{{.*}} = AIE.shim_mux(%[[T20]]) { - # CHECK: AIE.connect + # CHECK: %{{.*}} = aie.shim_mux(%[[T20]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %{{.*}} = AIE.switchbox(%[[T30]]) { - # CHECK: AIE.connect + # CHECK: %{{.*}} = aie.switchbox(%[[T30]]) { + # CHECK: aie.connect # CHECK: } - # CHECK: %{{.*}} = AIE.shim_mux(%[[T30]]) { - # CHECK: AIE.connect + # CHECK: %{{.*}} = aie.shim_mux(%[[T30]]) { + # CHECK: aie.connect # CHECK: } diff --git a/test/python/simple_with_bindings.py b/test/python/simple_with_bindings.py index 47f4581f80..a32c83b74d 100644 --- a/test/python/simple_with_bindings.py +++ b/test/python/simple_with_bindings.py @@ -19,17 +19,17 @@ # CHECK: module { -# CHECK: AIE.device(xcve2802) { -# CHECK: %tile_1_4 = AIE.tile(1, 4) -# CHECK: %buffer_1_4 = AIE.buffer(%tile_1_4) : memref<256xi32> -# CHECK: %core_1_4 = AIE.core(%tile_1_4) { +# CHECK: aie.device(xcve2802) { +# CHECK: %tile_1_4 = aie.tile(1, 4) +# CHECK: %buffer_1_4 = aie.buffer(%tile_1_4) : memref<256xi32> +# CHECK: %core_1_4 = aie.core(%tile_1_4) { # CHECK: %c3 = arith.constant 3 : index # CHECK: %0 = memref.load %buffer_1_4[%c3] : memref<256xi32> # CHECK: %c4_i32 = arith.constant 4 : i32 # CHECK: %1 = arith.addi %0, %c4_i32 : i32 # CHECK: %c3_0 = arith.constant 3 : index # CHECK: memref.store %1, %buffer_1_4[%c3_0] : memref<256xi32> -# CHECK: AIE.end +# CHECK: aie.end # CHECK: } # CHECK: } # CHECK: } diff --git a/test/round-trip/packet_flow.mlir b/test/round-trip/packet_flow.mlir index a23b6e4d87..2ac4730c50 100644 --- a/test/round-trip/packet_flow.mlir +++ b/test/round-trip/packet_flow.mlir @@ -11,14 +11,14 @@ // RUN: aie-opt %s | FileCheck %s module @packet_flows { -// CHECK: %[[VAL_0:.*]] = AIE.tile(1, 1) -// CHECK: AIE.packet_flow(0) { -// CHECK: AIE.packet_source<%[[VAL_0]], West : 0> -// CHECK: AIE.packet_dest<%[[VAL_0]], Core : 0> +// CHECK: %[[VAL_0:.*]] = aie.tile(1, 1) +// CHECK: aie.packet_flow(0) { +// CHECK: aie.packet_source<%[[VAL_0]], West : 0> +// CHECK: aie.packet_dest<%[[VAL_0]], Core : 0> // CHECK: } - %t11 = AIE.tile(1, 1) - AIE.packet_flow(0x0) { - AIE.packet_source<%t11, West : 0> - AIE.packet_dest<%t11, Core : 0> + %t11 = aie.tile(1, 1) + aie.packet_flow(0x0) { + aie.packet_source<%t11, West : 0> + aie.packet_dest<%t11, Core : 0> } } diff --git a/test/simplepacket1.mlir b/test/simplepacket1.mlir index 35576cc1f1..f1e0c94025 100644 --- a/test/simplepacket1.mlir +++ b/test/simplepacket1.mlir @@ -13,48 +13,48 @@ // CHECK: } module { - %0 = AIE.tile(0, 1) - %1 = AIE.tile(1, 2) - %2 = AIE.tile(0, 2) - %3 = AIE.tile(1, 1) - %4 = AIE.switchbox(%0) { - AIE.connect + %0 = aie.tile(0, 1) + %1 = aie.tile(1, 2) + %2 = aie.tile(0, 2) + %3 = aie.tile(1, 1) + %4 = aie.switchbox(%0) { + aie.connect } - %5 = AIE.switchbox(%2) { - // AIE.connect - %a0_0 = AIE.amsel<0>(0) - %m1 = AIE.masterset(East : 0, %a0_0 ) - AIE.packet_rules(South : 0) { - AIE.rule(0x1F, 0x10, %a0_0) + %5 = aie.switchbox(%2) { + // aie.connect + %a0_0 = aie.amsel<0>(0) + %m1 = aie.masterset(East : 0, %a0_0 ) + aie.packet_rules(South : 0) { + aie.rule(0x1F, 0x10, %a0_0) } } - %6 = AIE.switchbox(%3) { + %6 = aie.switchbox(%3) { } - %7 = AIE.switchbox(%1) { - AIE.connect + %7 = aie.switchbox(%1) { + aie.connect } - %8 = AIE.shim_switchbox(0) { + %8 = aie.shim_switchbox(0) { } - %9 = AIE.shim_switchbox(1) { + %9 = aie.shim_switchbox(1) { } - %10 = AIE.plio(0) - %11 = AIE.plio(1) - AIE.wire(%0 : Core, %4 : Core) - AIE.wire(%0 : DMA, %4 : DMA) - AIE.wire(%8 : North, %4 : South) - AIE.wire(%10 : North, %8 : South) - AIE.wire(%2 : Core, %5 : Core) - AIE.wire(%2 : DMA, %5 : DMA) - AIE.wire(%4 : North, %5 : South) - AIE.wire(%3 : Core, %6 : Core) - AIE.wire(%3 : DMA, %6 : DMA) - AIE.wire(%4 : East, %6 : West) - AIE.wire(%9 : North, %6 : South) - AIE.wire(%8 : East, %9 : West) - AIE.wire(%11 : North, %9 : South) - AIE.wire(%1 : Core, %7 : Core) - AIE.wire(%1 : DMA, %7 : DMA) - AIE.wire(%5 : East, %7 : West) - AIE.wire(%6 : North, %7 : South) + %10 = aie.plio(0) + %11 = aie.plio(1) + aie.wire(%0 : Core, %4 : Core) + aie.wire(%0 : DMA, %4 : DMA) + aie.wire(%8 : North, %4 : South) + aie.wire(%10 : North, %8 : South) + aie.wire(%2 : Core, %5 : Core) + aie.wire(%2 : DMA, %5 : DMA) + aie.wire(%4 : North, %5 : South) + aie.wire(%3 : Core, %6 : Core) + aie.wire(%3 : DMA, %6 : DMA) + aie.wire(%4 : East, %6 : West) + aie.wire(%9 : North, %6 : South) + aie.wire(%8 : East, %9 : West) + aie.wire(%11 : North, %9 : South) + aie.wire(%1 : Core, %7 : Core) + aie.wire(%1 : DMA, %7 : DMA) + aie.wire(%5 : East, %7 : West) + aie.wire(%6 : North, %7 : South) } diff --git a/test/simplepacket2.mlir b/test/simplepacket2.mlir index 9daf1e6635..979598b54c 100644 --- a/test/simplepacket2.mlir +++ b/test/simplepacket2.mlir @@ -13,53 +13,53 @@ // CHECK: } module { - %0 = AIE.tile(0, 1) - %1 = AIE.tile(1, 2) - %2 = AIE.tile(0, 2) - %3 = AIE.tile(1, 1) - %4 = AIE.switchbox(%0) { - AIE.connect + %0 = aie.tile(0, 1) + %1 = aie.tile(1, 2) + %2 = aie.tile(0, 2) + %3 = aie.tile(1, 1) + %4 = aie.switchbox(%0) { + aie.connect } - %5 = AIE.switchbox(%2) { - // AIE.connect - %a1_0 = AIE.amsel<1>(0) - %m1 = AIE.masterset(East : 0, %a1_0 ) - AIE.packet_rules(South : 0) { - AIE.rule(0x1E, 0x10, %a1_0) + %5 = aie.switchbox(%2) { + // aie.connect + %a1_0 = aie.amsel<1>(0) + %m1 = aie.masterset(East : 0, %a1_0 ) + aie.packet_rules(South : 0) { + aie.rule(0x1E, 0x10, %a1_0) } } - %6 = AIE.switchbox(%3) { - AIE.connect + %6 = aie.switchbox(%3) { + aie.connect } - %7 = AIE.switchbox(%1) { - %a1_0 = AIE.amsel<1>(0) - %m1 = AIE.masterset(South : 0, %a1_0 ) - AIE.packet_rules(West : 0) { - AIE.rule(0x1, 0x1, %a1_0) + %7 = aie.switchbox(%1) { + %a1_0 = aie.amsel<1>(0) + %m1 = aie.masterset(South : 0, %a1_0 ) + aie.packet_rules(West : 0) { + aie.rule(0x1, 0x1, %a1_0) } } - %8 = AIE.shim_switchbox(0) { + %8 = aie.shim_switchbox(0) { } - %9 = AIE.shim_switchbox(1) { + %9 = aie.shim_switchbox(1) { } - %10 = AIE.plio(0) - %11 = AIE.plio(1) - AIE.wire(%0 : Core, %4 : Core) - AIE.wire(%0 : DMA, %4 : DMA) - AIE.wire(%8 : North, %4 : South) - AIE.wire(%10 : North, %8 : South) - AIE.wire(%2 : Core, %5 : Core) - AIE.wire(%2 : DMA, %5 : DMA) - AIE.wire(%4 : North, %5 : South) - AIE.wire(%3 : Core, %6 : Core) - AIE.wire(%3 : DMA, %6 : DMA) - AIE.wire(%4 : East, %6 : West) - AIE.wire(%9 : North, %6 : South) - AIE.wire(%8 : East, %9 : West) - AIE.wire(%11 : North, %9 : South) - AIE.wire(%1 : Core, %7 : Core) - AIE.wire(%1 : DMA, %7 : DMA) - AIE.wire(%5 : East, %7 : West) - AIE.wire(%6 : North, %7 : South) + %10 = aie.plio(0) + %11 = aie.plio(1) + aie.wire(%0 : Core, %4 : Core) + aie.wire(%0 : DMA, %4 : DMA) + aie.wire(%8 : North, %4 : South) + aie.wire(%10 : North, %8 : South) + aie.wire(%2 : Core, %5 : Core) + aie.wire(%2 : DMA, %5 : DMA) + aie.wire(%4 : North, %5 : South) + aie.wire(%3 : Core, %6 : Core) + aie.wire(%3 : DMA, %6 : DMA) + aie.wire(%4 : East, %6 : West) + aie.wire(%9 : North, %6 : South) + aie.wire(%8 : East, %9 : West) + aie.wire(%11 : North, %9 : South) + aie.wire(%1 : Core, %7 : Core) + aie.wire(%1 : DMA, %7 : DMA) + aie.wire(%5 : East, %7 : West) + aie.wire(%6 : North, %7 : South) } diff --git a/test/simplepacket3.mlir b/test/simplepacket3.mlir index 463255d848..3333b462f8 100644 --- a/test/simplepacket3.mlir +++ b/test/simplepacket3.mlir @@ -13,53 +13,53 @@ // CHECK: } module { - %0 = AIE.tile(0, 1) - %1 = AIE.tile(1, 2) - %2 = AIE.tile(0, 2) - %3 = AIE.tile(1, 1) - %4 = AIE.switchbox(%0) { - AIE.connect + %0 = aie.tile(0, 1) + %1 = aie.tile(1, 2) + %2 = aie.tile(0, 2) + %3 = aie.tile(1, 1) + %4 = aie.switchbox(%0) { + aie.connect } - %5 = AIE.switchbox(%2) { - // AIE.connect - %a1_0 = AIE.amsel<1>(0) - %m1 = AIE.masterset(East : 0, %a1_0 ) - AIE.packet_rules(South : 0) { - AIE.rule(0x1F, 0x10, %a1_0) + %5 = aie.switchbox(%2) { + // aie.connect + %a1_0 = aie.amsel<1>(0) + %m1 = aie.masterset(East : 0, %a1_0 ) + aie.packet_rules(South : 0) { + aie.rule(0x1F, 0x10, %a1_0) } } - %6 = AIE.switchbox(%3) { - AIE.connect + %6 = aie.switchbox(%3) { + aie.connect } - %7 = AIE.switchbox(%1) { - %a1_0 = AIE.amsel<1>(0) - %m1 = AIE.masterset(South : 0, %a1_0 ) - AIE.packet_rules(West : 0) { - AIE.rule(0x10, 0x0, %a1_0) + %7 = aie.switchbox(%1) { + %a1_0 = aie.amsel<1>(0) + %m1 = aie.masterset(South : 0, %a1_0 ) + aie.packet_rules(West : 0) { + aie.rule(0x10, 0x0, %a1_0) } } - %8 = AIE.shim_switchbox(0) { + %8 = aie.shim_switchbox(0) { } - %9 = AIE.shim_switchbox(1) { + %9 = aie.shim_switchbox(1) { } - %10 = AIE.plio(0) - %11 = AIE.plio(1) - AIE.wire(%0 : Core, %4 : Core) - AIE.wire(%0 : DMA, %4 : DMA) - AIE.wire(%8 : North, %4 : South) - AIE.wire(%10 : North, %8 : South) - AIE.wire(%2 : Core, %5 : Core) - AIE.wire(%2 : DMA, %5 : DMA) - AIE.wire(%4 : North, %5 : South) - AIE.wire(%3 : Core, %6 : Core) - AIE.wire(%3 : DMA, %6 : DMA) - AIE.wire(%4 : East, %6 : West) - AIE.wire(%9 : North, %6 : South) - AIE.wire(%8 : East, %9 : West) - AIE.wire(%11 : North, %9 : South) - AIE.wire(%1 : Core, %7 : Core) - AIE.wire(%1 : DMA, %7 : DMA) - AIE.wire(%5 : East, %7 : West) - AIE.wire(%6 : North, %7 : South) + %10 = aie.plio(0) + %11 = aie.plio(1) + aie.wire(%0 : Core, %4 : Core) + aie.wire(%0 : DMA, %4 : DMA) + aie.wire(%8 : North, %4 : South) + aie.wire(%10 : North, %8 : South) + aie.wire(%2 : Core, %5 : Core) + aie.wire(%2 : DMA, %5 : DMA) + aie.wire(%4 : North, %5 : South) + aie.wire(%3 : Core, %6 : Core) + aie.wire(%3 : DMA, %6 : DMA) + aie.wire(%4 : East, %6 : West) + aie.wire(%9 : North, %6 : South) + aie.wire(%8 : East, %9 : West) + aie.wire(%11 : North, %9 : South) + aie.wire(%1 : Core, %7 : Core) + aie.wire(%1 : DMA, %7 : DMA) + aie.wire(%5 : East, %7 : West) + aie.wire(%6 : North, %7 : South) } diff --git a/test/unit_tests/aie/00_itsalive/aie.mlir b/test/unit_tests/aie/00_itsalive/aie.mlir index 286d1fa721..f1327ae4df 100644 --- a/test/unit_tests/aie/00_itsalive/aie.mlir +++ b/test/unit_tests/aie/00_itsalive/aie.mlir @@ -12,14 +12,14 @@ // RUN: %PYTHON aiecc.py --no-unified %s module @test00_itsalive { - %tile12 = AIE.tile(1, 2) + %tile12 = aie.tile(1, 2) - %buf12_0 = AIE.buffer(%tile12) { sym_name = "a", address = 0 } : memref<256xi32> + %buf12_0 = aie.buffer(%tile12) { sym_name = "a", address = 0 } : memref<256xi32> - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %val1 = arith.constant 1 : i32 %idx1 = arith.constant 3 : index %2 = arith.addi %val1, %val1 : i32 - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/01_memory_read_write/aie.mlir b/test/unit_tests/aie/01_memory_read_write/aie.mlir index 74dd9c0de7..e3e7ec26fb 100644 --- a/test/unit_tests/aie/01_memory_read_write/aie.mlir +++ b/test/unit_tests/aie/01_memory_read_write/aie.mlir @@ -12,11 +12,11 @@ // RUN: %run_on_board ./test.elf module @test01_memory_read_write { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %val1 = arith.constant 7 : i32 %idx1 = arith.constant 3 : index %2 = arith.addi %val1, %val1 : i32 @@ -27,6 +27,6 @@ module @test01_memory_read_write { %val3 = memref.load %buf13_0[%idx1] : memref<256xi32> %idx3 = arith.constant 9 : index memref.store %val3,%buf13_0[%idx3] : memref<256xi32> - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/02_lock_acquire_release/aie.mlir b/test/unit_tests/aie/02_lock_acquire_release/aie.mlir index 71d58a62db..58be93d4b9 100644 --- a/test/unit_tests/aie/02_lock_acquire_release/aie.mlir +++ b/test/unit_tests/aie/02_lock_acquire_release/aie.mlir @@ -12,18 +12,18 @@ // RUN: %run_on_board ./test.elf module @test02_lock_acquire_release { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "lock1" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "lock2" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "lock1" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "lock2" } - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 0) // acquire for write (e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write (e.g. input ping) - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 0) // acquire for write (e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write (e.g. input ping) + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } } diff --git a/test/unit_tests/aie/03_sync_with_locks/aie.mlir b/test/unit_tests/aie/03_sync_with_locks/aie.mlir index 2ab1d2ed29..6297899da3 100644 --- a/test/unit_tests/aie/03_sync_with_locks/aie.mlir +++ b/test/unit_tests/aie/03_sync_with_locks/aie.mlir @@ -12,17 +12,17 @@ // RUN: %run_on_board ./test.elf module @test03_sync_with_locks { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "lock1" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "lock2" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "lock1" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "lock2" } - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -31,8 +31,8 @@ module @test03_sync_with_locks { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } } diff --git a/test/unit_tests/aie/04_shared_memory/aie.mlir b/test/unit_tests/aie/04_shared_memory/aie.mlir index 1d8670b6f9..6813ab78ec 100644 --- a/test/unit_tests/aie/04_shared_memory/aie.mlir +++ b/test/unit_tests/aie/04_shared_memory/aie.mlir @@ -12,20 +12,20 @@ // RUN: %run_on_board ./test.elf module @test04_shared_memory { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %buf14_0 = AIE.buffer(%tile14) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf14_0 = aie.buffer(%tile14) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "hidden_lock" } // interbuffer lock - %lock14_7 = AIE.lock(%tile14, 7) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "hidden_lock" } // interbuffer lock + %lock14_7 = aie.lock(%tile14, 7) { sym_name = "output_lock" } // output buffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -34,14 +34,14 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } - %core14 = AIE.core(%tile14) { - AIE.use_lock(%lock13_5, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock14_7, "Acquire", 0) // acquire for write + %core14 = aie.core(%tile14) { + aie.use_lock(%lock13_5, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock14_7, "Acquire", 0) // acquire for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf13_1[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -50,8 +50,8 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf14_0[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, "Release", 0) // release for write - AIE.use_lock(%lock14_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_5, "Release", 0) // release for write + aie.use_lock(%lock14_7, "Release", 1) // release for read + aie.end } } diff --git a/test/unit_tests/aie/05_tiledma/aie.mlir b/test/unit_tests/aie/05_tiledma/aie.mlir index 555e68a7cd..81af3e2818 100644 --- a/test/unit_tests/aie/05_tiledma/aie.mlir +++ b/test/unit_tests/aie/05_tiledma/aie.mlir @@ -12,27 +12,27 @@ // RUN: %run_on_board ./test.elf module @test05_tiledma { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) - %tile33 = AIE.tile(3, 3) + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) + %tile33 = aie.tile(3, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a13" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b13" } : memref<256xi32> - %buf33_0 = AIE.buffer(%tile33) { sym_name = "a33" } : memref<256xi32> - %buf33_1 = AIE.buffer(%tile33) { sym_name = "b33" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a13" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b13" } : memref<256xi32> + %buf33_0 = aie.buffer(%tile33) { sym_name = "a33" } : memref<256xi32> + %buf33_1 = aie.buffer(%tile33) { sym_name = "b33" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "interlock1" } // interbuffer lock - %lock33_6 = AIE.lock(%tile33, 6) { sym_name = "interlock2" } // interbuffer lock - %lock33_7 = AIE.lock(%tile33, 7) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "interlock1" } // interbuffer lock + %lock33_6 = aie.lock(%tile33, 6) { sym_name = "interlock2" } // interbuffer lock + %lock33_7 = aie.lock(%tile33, 7) { sym_name = "output_lock" } // output buffer lock - AIE.switchbox(%tile13) { AIE.connect<"DMA": 0, "East": 1> } - AIE.switchbox(%tile23) { AIE.connect<"West": 1, "East": 3> } - AIE.switchbox(%tile33) { AIE.connect<"West": 3, "DMA": 1> } + aie.switchbox(%tile13) { aie.connect<"DMA": 0, "East": 1> } + aie.switchbox(%tile23) { aie.connect<"West": 1, "East": 3> } + aie.switchbox(%tile33) { aie.connect<"West": 3, "DMA": 1> } - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -41,14 +41,14 @@ module @test05_tiledma { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } - %core33 = AIE.core(%tile33) { - AIE.use_lock(%lock33_6, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock33_7, "Acquire", 0) // acquire for write + %core33 = aie.core(%tile33) { + aie.use_lock(%lock33_6, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock33_7, "Acquire", 0) // acquire for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf33_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -57,31 +57,31 @@ module @test05_tiledma { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf33_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock33_6, "Release", 0) // release for write - AIE.use_lock(%lock33_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock33_6, "Release", 0) // release for write + aie.use_lock(%lock33_7, "Release", 1) // release for read + aie.end } - %mem13 = AIE.mem(%tile13) { - %dma0 = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem13 = aie.mem(%tile13) { + %dma0 = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock13_5, "Acquire", 1) - AIE.dma_bd(%buf13_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock13_5, "Release", 0) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock13_5, "Acquire", 1) + aie.dma_bd(%buf13_1 : memref<256xi32>, 0, 256) + aie.use_lock(%lock13_5, "Release", 0) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } - %mem33 = AIE.mem(%tile33) { - %dma0 = AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem33 = aie.mem(%tile33) { + %dma0 = aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock33_6, "Acquire", 0) - AIE.dma_bd(%buf33_0: memref<256xi32>, 0, 256) - AIE.use_lock(%lock33_6, "Release", 1) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock33_6, "Acquire", 0) + aie.dma_bd(%buf33_0: memref<256xi32>, 0, 256) + aie.use_lock(%lock33_6, "Release", 1) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } diff --git a/test/unit_tests/aie/08_stream_broadcast/aie.mlir b/test/unit_tests/aie/08_stream_broadcast/aie.mlir index 50ce58663e..13d8c5b8f6 100644 --- a/test/unit_tests/aie/08_stream_broadcast/aie.mlir +++ b/test/unit_tests/aie/08_stream_broadcast/aie.mlir @@ -12,37 +12,37 @@ // RUN: %run_on_board ./test.elf module @test08_stream_broadcast { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) - - %tile32 = AIE.tile(3, 2) - %tile33 = AIE.tile(3, 3) - %tile34 = AIE.tile(3, 4) - -// AIE.switchbox(%tile13) { AIE.connect<"DMA": 0, "East": 1> } -// AIE.switchbox(%tile23) { AIE.connect<"West": 1, "East": 2> } -// AIE.switchbox(%tile33) { -// AIE.connect<"West": 2, "North": 3> -// AIE.connect<"West": 2, "South": 3> -// AIE.connect<"West": 2, "DMA": 1> + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) + + %tile32 = aie.tile(3, 2) + %tile33 = aie.tile(3, 3) + %tile34 = aie.tile(3, 4) + +// aie.switchbox(%tile13) { aie.connect<"DMA": 0, "East": 1> } +// aie.switchbox(%tile23) { aie.connect<"West": 1, "East": 2> } +// aie.switchbox(%tile33) { +// aie.connect<"West": 2, "North": 3> +// aie.connect<"West": 2, "South": 3> +// aie.connect<"West": 2, "DMA": 1> // } -// AIE.switchbox(%tile32) { AIE.connect<"North": 3, "DMA": 1> } -// AIE.switchbox(%tile34) { AIE.connect<"South": 3, "DMA": 1> } +// aie.switchbox(%tile32) { aie.connect<"North": 3, "DMA": 1> } +// aie.switchbox(%tile34) { aie.connect<"South": 3, "DMA": 1> } - AIE.flow(%tile13, "DMA" : 0, %tile32, "DMA" : 1) - AIE.flow(%tile13, "DMA" : 0, %tile33, "DMA" : 1) - AIE.flow(%tile13, "DMA" : 0, %tile34, "DMA" : 1) + aie.flow(%tile13, "DMA" : 0, %tile32, "DMA" : 1) + aie.flow(%tile13, "DMA" : 0, %tile33, "DMA" : 1) + aie.flow(%tile13, "DMA" : 0, %tile34, "DMA" : 1) // Broadcast source tile (tile13) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a13" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b13" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a13" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b13" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "interlock_1" } // interbuffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "interlock_1" } // interbuffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -51,34 +51,34 @@ module @test08_stream_broadcast { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } - %mem13 = AIE.mem(%tile13) { - %dma0 = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem13 = aie.mem(%tile13) { + %dma0 = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock13_5, "Acquire", 1) - AIE.dma_bd(%buf13_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock13_5, "Release", 0) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock13_5, "Acquire", 1) + aie.dma_bd(%buf13_1 : memref<256xi32>, 0, 256) + aie.use_lock(%lock13_5, "Release", 0) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } - %core23 = AIE.core(%tile23) { AIE.end } + %core23 = aie.core(%tile23) { aie.end } // Broadcast target tile #1 (tile32) - %buf32_0 = AIE.buffer(%tile32) { sym_name = "a32" } : memref<256xi32> - %buf32_1 = AIE.buffer(%tile32) { sym_name = "b32" } : memref<256xi32> + %buf32_0 = aie.buffer(%tile32) { sym_name = "a32" } : memref<256xi32> + %buf32_1 = aie.buffer(%tile32) { sym_name = "b32" } : memref<256xi32> - %lock32_6 = AIE.lock(%tile32, 6) { sym_name = "interlock_2" } // interbuffer lock - %lock32_7 = AIE.lock(%tile32, 7) { sym_name = "output_lock1" } // output buffer lock + %lock32_6 = aie.lock(%tile32, 6) { sym_name = "interlock_2" } // interbuffer lock + %lock32_7 = aie.lock(%tile32, 7) { sym_name = "output_lock1" } // output buffer lock - %core32 = AIE.core(%tile32) { - AIE.use_lock(%lock32_6, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock32_7, "Acquire", 0) // acquire for write + %core32 = aie.core(%tile32) { + aie.use_lock(%lock32_6, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock32_7, "Acquire", 0) // acquire for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf32_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -87,33 +87,33 @@ module @test08_stream_broadcast { // %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %3, %buf32_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock32_6, "Release", 0) // release for write - AIE.use_lock(%lock32_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock32_6, "Release", 0) // release for write + aie.use_lock(%lock32_7, "Release", 1) // release for read + aie.end } - %mem32 = AIE.mem(%tile32) { - %dma0 = AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem32 = aie.mem(%tile32) { + %dma0 = aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock32_6, "Acquire", 0) - AIE.dma_bd(%buf32_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock32_6, "Release", 1) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock32_6, "Acquire", 0) + aie.dma_bd(%buf32_0 : memref<256xi32>, 0, 256) + aie.use_lock(%lock32_6, "Release", 1) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } // Broadcast target tile #2 (tile33) - %buf33_0 = AIE.buffer(%tile33) { sym_name = "a33" } : memref<256xi32> - %buf33_1 = AIE.buffer(%tile33) { sym_name = "b33" } : memref<256xi32> + %buf33_0 = aie.buffer(%tile33) { sym_name = "a33" } : memref<256xi32> + %buf33_1 = aie.buffer(%tile33) { sym_name = "b33" } : memref<256xi32> - %lock33_6 = AIE.lock(%tile33, 6) { sym_name = "interlock_3" } // interbuffer lock - %lock33_7 = AIE.lock(%tile33, 7) { sym_name = "output_lock2" } // output buffer lock + %lock33_6 = aie.lock(%tile33, 6) { sym_name = "interlock_3" } // interbuffer lock + %lock33_7 = aie.lock(%tile33, 7) { sym_name = "output_lock2" } // output buffer lock - %core33 = AIE.core(%tile33) { - AIE.use_lock(%lock33_6, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock33_7, "Acquire", 0) // acquire for write + %core33 = aie.core(%tile33) { + aie.use_lock(%lock33_6, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock33_7, "Acquire", 0) // acquire for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf33_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -122,33 +122,33 @@ module @test08_stream_broadcast { // %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %4, %buf33_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock33_6, "Release", 0) // release for write - AIE.use_lock(%lock33_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock33_6, "Release", 0) // release for write + aie.use_lock(%lock33_7, "Release", 1) // release for read + aie.end } - %mem33 = AIE.mem(%tile33) { - %dma0 = AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem33 = aie.mem(%tile33) { + %dma0 = aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock33_6, "Acquire", 0) - AIE.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock33_6, "Release", 1) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock33_6, "Acquire", 0) + aie.dma_bd(%buf33_0 : memref<256xi32>, 0, 256) + aie.use_lock(%lock33_6, "Release", 1) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } // Broadcast target tile #3 (tile34) - %buf34_0 = AIE.buffer(%tile34) { sym_name = "a34" }: memref<256xi32> - %buf34_1 = AIE.buffer(%tile34) { sym_name = "b34" } : memref<256xi32> + %buf34_0 = aie.buffer(%tile34) { sym_name = "a34" }: memref<256xi32> + %buf34_1 = aie.buffer(%tile34) { sym_name = "b34" } : memref<256xi32> - %lock34_6 = AIE.lock(%tile34, 6) { sym_name = "interlock_4" } // interbuffer lock - %lock34_7 = AIE.lock(%tile34, 7) { sym_name = "output_lock3" } // output buffer lock + %lock34_6 = aie.lock(%tile34, 6) { sym_name = "interlock_4" } // interbuffer lock + %lock34_7 = aie.lock(%tile34, 7) { sym_name = "output_lock3" } // output buffer lock - %core34 = AIE.core(%tile34) { - AIE.use_lock(%lock34_6, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock34_7, "Acquire", 0) // acquire for write + %core34 = aie.core(%tile34) { + aie.use_lock(%lock34_6, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock34_7, "Acquire", 0) // acquire for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf34_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -157,21 +157,21 @@ module @test08_stream_broadcast { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf34_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock34_6, "Release", 0) // release for write - AIE.use_lock(%lock34_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock34_6, "Release", 0) // release for write + aie.use_lock(%lock34_7, "Release", 1) // release for read + aie.end } - %mem34 = AIE.mem(%tile34) { - %dma0 = AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem34 = aie.mem(%tile34) { + %dma0 = aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock34_6, "Acquire", 0) - AIE.dma_bd(%buf34_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_6, "Release", 1) - AIE.next_bd ^end // point to the next BD, or termination + aie.use_lock(%lock34_6, "Acquire", 0) + aie.dma_bd(%buf34_0 : memref<256xi32>, 0, 256) + aie.use_lock(%lock34_6, "Release", 1) + aie.next_bd ^end // point to the next BD, or termination ^end: - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/09_simple_shim_dma/aie.mlir b/test/unit_tests/aie/09_simple_shim_dma/aie.mlir index 054f6e805f..ebbe74b845 100644 --- a/test/unit_tests/aie/09_simple_shim_dma/aie.mlir +++ b/test/unit_tests/aie/09_simple_shim_dma/aie.mlir @@ -12,55 +12,55 @@ // RUN: %run_on_board ./test.elf module @test09_simple_shim_dma { - %t70 = AIE.tile(7, 0) - %t71 = AIE.tile(7, 1) - %t72 = AIE.tile(7, 2) + %t70 = aie.tile(7, 0) + %t71 = aie.tile(7, 1) + %t72 = aie.tile(7, 2) - %buffer = AIE.external_buffer { sym_name = "buffer"} : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) { sym_name = "buffer_lock"} + %buffer = aie.external_buffer { sym_name = "buffer"} : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) { sym_name = "buffer_lock"} // Fixup - %sw = AIE.switchbox(%t70) { - AIE.connect<"South" : 3, "North" : 3> + %sw = aie.switchbox(%t70) { + aie.connect<"South" : 3, "North" : 3> } - %mux = AIE.shim_mux(%t70) { - AIE.connect<"DMA" : 0, "North": 3> + %mux = aie.shim_mux(%t70) { + aie.connect<"DMA" : 0, "North": 3> } - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - AIE.flow(%t71, "South" : 3, %t72, "DMA" : 0) + aie.flow(%t71, "South" : 3, %t72, "DMA" : 0) - %buf72_0 = AIE.buffer(%t72) {sym_name = "buf72_0" } : memref<256xi32> - %buf72_1 = AIE.buffer(%t72) {sym_name = "buf72_1" } : memref<256xi32> + %buf72_0 = aie.buffer(%t72) {sym_name = "buf72_0" } : memref<256xi32> + %buf72_1 = aie.buffer(%t72) {sym_name = "buf72_1" } : memref<256xi32> - %l72_0 = AIE.lock(%t72, 0) - %l72_1 = AIE.lock(%t72, 1) + %l72_0 = aie.lock(%t72, 0) + %l72_1 = aie.lock(%t72, 1) - %m72 = AIE.mem(%t72) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m72 = aie.mem(%t72) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l72_0, "Acquire", 0) - AIE.dma_bd(%buf72_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l72_0, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%l72_0, "Acquire", 0) + aie.dma_bd(%buf72_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l72_0, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%l72_1, "Acquire", 0) - AIE.dma_bd(%buf72_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%l72_1, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%l72_1, "Acquire", 0) + aie.dma_bd(%buf72_1 : memref<256xi32>, 0, 256) + aie.use_lock(%l72_1, "Release", 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } diff --git a/test/unit_tests/aie/10_scalar_fp/aie.mlir b/test/unit_tests/aie/10_scalar_fp/aie.mlir index 1197474b4a..780d4e986e 100644 --- a/test/unit_tests/aie/10_scalar_fp/aie.mlir +++ b/test/unit_tests/aie/10_scalar_fp/aie.mlir @@ -12,11 +12,11 @@ // RUN: %run_on_board ./test.elf module @test { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xf32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xf32> - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %val1 = arith.constant 7.0 : f32 %idx1 = arith.constant 3 : index %2 = arith.addf %val1, %val1 : f32 @@ -27,6 +27,6 @@ module @test { %val3 = memref.load %buf13_0[%idx1] : memref<256xf32> %idx3 = arith.constant 9 : index memref.store %val3,%buf13_0[%idx3] : memref<256xf32> - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/11_vector_fp/aie.mlir b/test/unit_tests/aie/11_vector_fp/aie.mlir index 7affd9c475..407ca8c3c4 100644 --- a/test/unit_tests/aie/11_vector_fp/aie.mlir +++ b/test/unit_tests/aie/11_vector_fp/aie.mlir @@ -12,11 +12,11 @@ // RUN: %run_on_board ./test.elf module @test { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xf32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xf32> - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %c0 = arith.constant 0 : index %c64 = arith.constant 64 : index %c8 = arith.constant 8 : index @@ -37,6 +37,6 @@ module @test { %61 = arith.mulf %59, %60 : vector<8xf32> vector.transfer_write %61, %buf13_0[%arg0] : vector<8xf32>, memref<256xf32> } - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/12_julia/aie.mlir b/test/unit_tests/aie/12_julia/aie.mlir index 8f8f094854..6ed716a35b 100644 --- a/test/unit_tests/aie/12_julia/aie.mlir +++ b/test/unit_tests/aie/12_julia/aie.mlir @@ -15,18 +15,18 @@ module @test { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<2xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<4096xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "output_lock" } + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<2xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<4096xi32> + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "output_lock" } func.func private @func(%A: memref<2xi32>, %B: memref<4096xi32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire func.call @func(%buf13_0, %buf13_1) : (memref<2xi32>, memref<4096xi32>) -> () - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.end } { link_with="kernel.o" } } diff --git a/test/unit_tests/aie/13_julia_fp/aie.mlir b/test/unit_tests/aie/13_julia_fp/aie.mlir index 2ba190e4ae..956a7e6634 100644 --- a/test/unit_tests/aie/13_julia_fp/aie.mlir +++ b/test/unit_tests/aie/13_julia_fp/aie.mlir @@ -14,19 +14,19 @@ // RUN: %run_on_board ./test.elf module @test { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xf32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xf32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xf32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xf32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "inout_lock" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "inout_lock" } func.func private @func(%A: memref<256xf32>, %B: memref<256xf32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire func.call @func(%buf13_0, %buf13_1) : (memref<256xf32>, memref<256xf32>) -> () - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.end } { link_with="kernel.o" } } diff --git a/test/unit_tests/aie/14_stream_packet/aie.mlir b/test/unit_tests/aie/14_stream_packet/aie.mlir index 828626b5c8..b460d14417 100644 --- a/test/unit_tests/aie/14_stream_packet/aie.mlir +++ b/test/unit_tests/aie/14_stream_packet/aie.mlir @@ -12,89 +12,89 @@ // RUN: %run_on_board ./test.elf module @test14_stream_packet { - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t62 = AIE.tile(6, 2) - %t71 = AIE.tile(7, 1) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t62 = aie.tile(6, 2) + %t71 = aie.tile(7, 1) - %sw73 = AIE.switchbox(%t73) { - AIE.connect<"DMA" : 0, "South" : 3> + %sw73 = aie.switchbox(%t73) { + aie.connect<"DMA" : 0, "South" : 3> } - %sw71 = AIE.switchbox(%t71) { - AIE.connect<"DMA" : 0, "North" : 1> + %sw71 = aie.switchbox(%t71) { + aie.connect<"DMA" : 0, "North" : 1> } - //%sw72 = AIE.switchbox(%t72) { - // AIE.connect<"North" : 3, "West" : 3> - // AIE.connect<"South" : 1, "West" : 1> + //%sw72 = aie.switchbox(%t72) { + // aie.connect<"North" : 3, "West" : 3> + // aie.connect<"South" : 1, "West" : 1> //} - %sw72 = AIE.switchbox(%t72) { - %tmsel = AIE.amsel<1> (0) // (mask). mask is msel_enable - %tmaster = AIE.masterset(West : 3, %tmsel) - AIE.packet_rules(North : 3) { - AIE.rule(0x1f, 0xd, %tmsel) // (mask, id) + %sw72 = aie.switchbox(%t72) { + %tmsel = aie.amsel<1> (0) // (mask). mask is msel_enable + %tmaster = aie.masterset(West : 3, %tmsel) + aie.packet_rules(North : 3) { + aie.rule(0x1f, 0xd, %tmsel) // (mask, id) } - AIE.packet_rules(South : 1) { - AIE.rule(0x1f, 0xc, %tmsel) + aie.packet_rules(South : 1) { + aie.rule(0x1f, 0xc, %tmsel) } } - %sw62 = AIE.switchbox(%t62) { - AIE.connect<"East" : 3, "DMA" : 0> - //AIE.connect<"East" : 1, "DMA" : 1> + %sw62 = aie.switchbox(%t62) { + aie.connect<"East" : 3, "DMA" : 0> + //aie.connect<"East" : 1, "DMA" : 1> } - %buf73 = AIE.buffer(%t73) {sym_name = "buf73" } : memref<256xi32> - %buf71 = AIE.buffer(%t71) {sym_name = "buf71" } : memref<256xi32> + %buf73 = aie.buffer(%t73) {sym_name = "buf73" } : memref<256xi32> + %buf71 = aie.buffer(%t71) {sym_name = "buf71" } : memref<256xi32> - %l73 = AIE.lock(%t73, 0) {sym_name = "lock73" } - %l71 = AIE.lock(%t71, 0) {sym_name = "lock71" } + %l73 = aie.lock(%t73, 0) {sym_name = "lock73" } + %l71 = aie.lock(%t71, 0) {sym_name = "lock71" } - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l73, "Acquire", 0) - AIE.dma_bd_packet(0x5, 0xD) - AIE.dma_bd(%buf73 : memref<256xi32>, 0, 256) - AIE.use_lock(%l73, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l73, "Acquire", 0) + aie.dma_bd_packet(0x5, 0xD) + aie.dma_bd(%buf73 : memref<256xi32>, 0, 256) + aie.use_lock(%l73, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %m71 = AIE.mem(%t71) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %m71 = aie.mem(%t71) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l71, "Acquire", 0) - AIE.dma_bd_packet(0x4, 0xC) - AIE.dma_bd(%buf71 : memref<256xi32>, 0, 256) - AIE.use_lock(%l71, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l71, "Acquire", 0) + aie.dma_bd_packet(0x4, 0xC) + aie.dma_bd(%buf71 : memref<256xi32>, 0, 256) + aie.use_lock(%l71, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - //%buf62_0 = AIE.buffer(%t62) {sym_name = "buf62_0" } : memref<256xi32> - //%buf62_1 = AIE.buffer(%t62) {sym_name = "buf62_1" } : memref<256xi32> - //%l62_0 = AIE.lock(%t62, 0) - //%l62_1 = AIE.lock(%t62, 1) - %buf62 = AIE.buffer(%t62) {sym_name = "buf62" } : memref<512xi32> - %l62 = AIE.lock(%t62, 0) + //%buf62_0 = aie.buffer(%t62) {sym_name = "buf62_0" } : memref<256xi32> + //%buf62_1 = aie.buffer(%t62) {sym_name = "buf62_1" } : memref<256xi32> + //%l62_0 = aie.lock(%t62, 0) + //%l62_1 = aie.lock(%t62, 1) + %buf62 = aie.buffer(%t62) {sym_name = "buf62" } : memref<512xi32> + %l62 = aie.lock(%t62, 0) - %m62 = AIE.mem(%t62) { - %srcDma0 = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m62 = aie.mem(%t62) { + %srcDma0 = aie.dma_start("S2MM", 0, ^bd0, ^end) //^dma: - // %srcDma1 = AIE.dma_start("S2MM", 1, ^bd1, ^end) + // %srcDma1 = aie.dma_start("S2MM", 1, ^bd1, ^end) ^bd0: - AIE.use_lock(%l62, "Acquire", 0) - AIE.dma_bd(%buf62 : memref<512xi32>, 0, 512) - AIE.use_lock(%l62, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%l62, "Acquire", 0) + aie.dma_bd(%buf62 : memref<512xi32>, 0, 512) + aie.use_lock(%l62, "Release", 1) + aie.next_bd ^end //^bd1: - // AIE.use_lock(%l62_1, "Acquire", 0) - // AIE.dma_bd(%buf62_1 : memref<256xi32>, 0, 256) - // AIE.use_lock(%l62_1, "Release", 1) - // AIE.next_bd ^bd0 + // aie.use_lock(%l62_1, "Acquire", 0) + // aie.dma_bd(%buf62_1 : memref<256xi32>, 0, 256) + // aie.use_lock(%l62_1, "Release", 1) + // aie.next_bd ^bd0 ^end: - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/15_prime_sieve/aie.mlir b/test/unit_tests/aie/15_prime_sieve/aie.mlir index 5be634f66b..65495dd25e 100644 --- a/test/unit_tests/aie/15_prime_sieve/aie.mlir +++ b/test/unit_tests/aie/15_prime_sieve/aie.mlir @@ -12,21 +12,21 @@ // RUN: %run_on_board ./test.elf module @test15_prime_sieve { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) - %tile15 = AIE.tile(1, 5) - %tile16 = AIE.tile(1, 6) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) + %tile15 = aie.tile(1, 5) + %tile16 = aie.tile(1, 6) - %lock13_0 = AIE.lock(%tile13, 0) { sym_name = "input_lock" } - %lock14_0 = AIE.lock(%tile14, 0) - %lock15_0 = AIE.lock(%tile15, 0) - %lock16_0 = AIE.lock(%tile16, 0) { sym_name = "output_lock" } - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf14_0 = AIE.buffer(%tile14) { sym_name = "prime2" } : memref<256xi32> - %buf15_0 = AIE.buffer(%tile15) { sym_name = "prime3" } : memref<256xi32> - %buf16_0 = AIE.buffer(%tile16) { sym_name = "prime5" } : memref<256xi32> + %lock13_0 = aie.lock(%tile13, 0) { sym_name = "input_lock" } + %lock14_0 = aie.lock(%tile14, 0) + %lock15_0 = aie.lock(%tile15, 0) + %lock16_0 = aie.lock(%tile16, 0) { sym_name = "output_lock" } + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf14_0 = aie.buffer(%tile14) { sym_name = "prime2" } : memref<256xi32> + %buf15_0 = aie.buffer(%tile15) { sym_name = "prime3" } : memref<256xi32> + %buf16_0 = aie.buffer(%tile16) { sym_name = "prime5" } : memref<256xi32> - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %c64 = arith.constant 64 : index @@ -40,8 +40,8 @@ module @test15_prime_sieve { memref.store %sum_iter, %buf13_0[%arg0] : memref<256xi32> scf.yield %sum_next : i32 } - AIE.use_lock(%lock13_0, "Release", 1) - AIE.end + aie.use_lock(%lock13_0, "Release", 1) + aie.end } func.func @do_sieve(%bufin: memref<256xi32>, %bufout:memref<256xi32>) -> () { %c0 = arith.constant 0 : index @@ -88,28 +88,28 @@ module @test15_prime_sieve { return } - %core14 = AIE.core(%tile14) { - AIE.use_lock(%lock13_0, "Acquire", 1) - AIE.use_lock(%lock14_0, "Acquire", 0) + %core14 = aie.core(%tile14) { + aie.use_lock(%lock13_0, "Acquire", 1) + aie.use_lock(%lock14_0, "Acquire", 0) func.call @do_sieve(%buf13_0, %buf14_0) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock13_0, "Release", 0) - AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + aie.use_lock(%lock13_0, "Release", 0) + aie.use_lock(%lock14_0, "Release", 1) + aie.end } - %core15 = AIE.core(%tile15) { - AIE.use_lock(%lock14_0, "Acquire", 1) - AIE.use_lock(%lock15_0, "Acquire", 0) + %core15 = aie.core(%tile15) { + aie.use_lock(%lock14_0, "Acquire", 1) + aie.use_lock(%lock15_0, "Acquire", 0) func.call @do_sieve(%buf14_0, %buf15_0) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock14_0, "Release", 0) - AIE.use_lock(%lock15_0, "Release", 1) - AIE.end + aie.use_lock(%lock14_0, "Release", 0) + aie.use_lock(%lock15_0, "Release", 1) + aie.end } - %core16 = AIE.core(%tile16) { - AIE.use_lock(%lock15_0, "Acquire", 1) - AIE.use_lock(%lock16_0, "Acquire", 0) + %core16 = aie.core(%tile16) { + aie.use_lock(%lock15_0, "Acquire", 1) + aie.use_lock(%lock16_0, "Acquire", 0) func.call @do_sieve(%buf15_0, %buf16_0) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock15_0, "Release", 0) - AIE.use_lock(%lock16_0, "Release", 1) - AIE.end + aie.use_lock(%lock15_0, "Release", 0) + aie.use_lock(%lock16_0, "Release", 1) + aie.end } } diff --git a/test/unit_tests/aie/16_libm_expf/aie.mlir b/test/unit_tests/aie/16_libm_expf/aie.mlir index 1b8a57da41..6429428e0b 100644 --- a/test/unit_tests/aie/16_libm_expf/aie.mlir +++ b/test/unit_tests/aie/16_libm_expf/aie.mlir @@ -12,23 +12,23 @@ // RUN: %run_on_board ./test.elf module @test { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf_a = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xf32> - %buf_b = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xf32> + %buf_a = aie.buffer(%tile13) { sym_name = "a" } : memref<256xf32> + %buf_b = aie.buffer(%tile13) { sym_name = "b" } : memref<256xf32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "inout_lock" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "inout_lock" } func.func private @func(%A: memref<256xf32>, %B: memref<256xf32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire affine.for %arg0 = 0 to 256 { %val1 = affine.load %buf_a[%arg0] : memref<256xf32> %val2 = math.exp %val1 : f32 affine.store %val2, %buf_b[%arg0] : memref<256xf32> } - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.end } } diff --git a/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir b/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir index 5babf2db7a..d3cdae2aa6 100644 --- a/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir +++ b/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir @@ -13,24 +13,24 @@ // RUN: %run_on_board ./test.elf module @test17_shim_dma_with_core{ - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> - %lock_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_b_pong = AIE.lock(%t73, 6) // b_pong + %lock_a_ping = aie.lock(%t73, 3) // a_ping + %lock_a_pong = aie.lock(%t73, 4) // a_pong + %lock_b_ping = aie.lock(%t73, 5) // b_ping + %lock_b_pong = aie.lock(%t73, 6) // b_pong // func.func private @func(%A: memref<256xi32>, %B: memref<256xi32>, %C: i32) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %buffer_size = arith.constant 256 : i32 %lb = arith.constant 0 : index @@ -44,8 +44,8 @@ module @test17_shim_dma_with_core{ %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write // copy loop scf.for %arg0 = %c0 to %c64 step %c1 iter_args(%sum_iter = %sum_0) -> (i32) { @@ -55,11 +55,11 @@ module @test17_shim_dma_with_core{ scf.yield %i : i32 } // func.call @func(%buf_a_ping, %buf_b_ping,%buffer_size) : (memref<256xi32>, memref<256xi32>,i32) -> () - AIE.use_lock(%lock_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write scf.for %arg0 = %c0 to %c64 step %c1 iter_args(%sum_iter = %sum_0) -> (i32) { %i = memref.load %buf_a_pong[%arg0] : memref<64xi32> @@ -67,77 +67,77 @@ module @test17_shim_dma_with_core{ memref.store %i2, %buf_b_pong[%arg0] : memref<64xi32> scf.yield %i : i32 } - AIE.use_lock(%lock_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_pong, "Acquire", 0) + aie.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_ping, "Acquire", 1) + aie.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_pong, "Acquire", 1) + aie.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock" } // Shim DMA connection to kernel - AIE.flow(%t71, "South" : 3, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t71, "South" : 2) - %sw1 = AIE.switchbox(%t70) { - AIE.connect<"South" : 3, "North" : 3> - AIE.connect<"North" : 2, "South" : 2> + aie.flow(%t71, "South" : 3, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t71, "South" : 2) + %sw1 = aie.switchbox(%t70) { + aie.connect<"South" : 3, "North" : 3> + aie.connect<"North" : 2, "South" : 2> } - %mux1 = AIE.shim_mux (%t70) { - AIE.connect<"DMA" : 0, "North" : 3> - AIE.connect<"North" : 2, "DMA" : 0> + %mux1 = aie.shim_mux (%t70) { + aie.connect<"DMA" : 0, "North" : 3> + aie.connect<"North" : 2, "DMA" : 0> } // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock2, Release, 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, Acquire, 1) + aie.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) + aie.use_lock(%lock2, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } diff --git a/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir b/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir index 1ebcd4a218..4275e7bb86 100644 --- a/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir +++ b/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir @@ -12,46 +12,46 @@ // RUN: %run_on_board ./test.elf module @test18_simple_shim_dma_routed { - %t70 = AIE.tile(7, 0) - %t72 = AIE.tile(7, 2) + %t70 = aie.tile(7, 0) + %t72 = aie.tile(7, 2) - %buffer = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } + %buffer = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } - %dma = AIE.shim_dma(%t70) { + %dma = aie.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - AIE.flow(%t70, "DMA" : 0, %t72, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t72, "DMA" : 0) - %buf72_0 = AIE.buffer(%t72) {sym_name = "buf72_0" } : memref<256xi32> - %buf72_1 = AIE.buffer(%t72) {sym_name = "buf72_1" } : memref<256xi32> + %buf72_0 = aie.buffer(%t72) {sym_name = "buf72_0" } : memref<256xi32> + %buf72_1 = aie.buffer(%t72) {sym_name = "buf72_1" } : memref<256xi32> - %l72_0 = AIE.lock(%t72, 0) - %l72_1 = AIE.lock(%t72, 1) + %l72_0 = aie.lock(%t72, 0) + %l72_1 = aie.lock(%t72, 1) - %m72 = AIE.mem(%t72) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m72 = aie.mem(%t72) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l72_0, "Acquire", 0) - AIE.dma_bd(%buf72_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l72_0, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%l72_0, "Acquire", 0) + aie.dma_bd(%buf72_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l72_0, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%l72_1, "Acquire", 0) - AIE.dma_bd(%buf72_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%l72_1, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%l72_1, "Acquire", 0) + aie.dma_bd(%buf72_1 : memref<256xi32>, 0, 256) + aie.use_lock(%l72_1, "Release", 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir b/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir index 4bbfa5659c..2ea68ade4f 100644 --- a/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir +++ b/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir @@ -13,22 +13,22 @@ // RUN: %run_on_board ./test.elf module @test19_shim_dma_with_core_routed{ - %t73 = AIE.tile(7, 3) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> - %lock_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_b_pong = AIE.lock(%t73, 6) // b_pong + %lock_a_ping = aie.lock(%t73, 3) // a_ping + %lock_a_pong = aie.lock(%t73, 4) // a_pong + %lock_b_ping = aie.lock(%t73, 5) // b_ping + %lock_b_pong = aie.lock(%t73, 6) // b_pong // func.func private @func(%A: memref<256xi32>, %B: memref<256xi32>, %C: i32) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %buffer_size = arith.constant 256 : i32 %lb = arith.constant 0 : index @@ -42,8 +42,8 @@ module @test19_shim_dma_with_core_routed{ %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write // copy loop scf.for %arg0 = %c0 to %c64 step %c1 iter_args(%sum_iter = %sum_0) -> (i32) { @@ -53,11 +53,11 @@ module @test19_shim_dma_with_core_routed{ scf.yield %i : i32 } // func.call @func(%buf_a_ping, %buf_b_ping,%buffer_size) : (memref<256xi32>, memref<256xi32>,i32) -> () - AIE.use_lock(%lock_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write scf.for %arg0 = %c0 to %c64 step %c1 iter_args(%sum_iter = %sum_0) -> (i32) { %i = memref.load %buf_a_pong[%arg0] : memref<64xi32> @@ -65,70 +65,70 @@ module @test19_shim_dma_with_core_routed{ memref.store %i2, %buf_b_pong[%arg0] : memref<64xi32> scf.yield %i : i32 } - AIE.use_lock(%lock_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_pong, "Acquire", 0) + aie.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_ping, "Acquire", 1) + aie.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_pong, "Acquire", 1) + aie.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock" } + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock" } // Shim DMA connection to kernel - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock2, Release, 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, Acquire, 1) + aie.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) + aie.use_lock(%lock2, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } diff --git a/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir b/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir index b5ece8fddd..60c3ee752a 100644 --- a/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir +++ b/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir @@ -12,70 +12,70 @@ // RUN: %run_on_board ./test.elf module @test20_shim_dma_broadcast { - %t70 = AIE.tile(7, 0) - %t72 = AIE.tile(7, 2) - %t73 = AIE.tile(7, 3) + %t70 = aie.tile(7, 0) + %t72 = aie.tile(7, 2) + %t73 = aie.tile(7, 3) - %buffer = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } + %buffer = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^end) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - AIE.flow(%t70, "DMA" : 0, %t72, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t72, "DMA" : 0) - %buf72_0 = AIE.buffer(%t72) {sym_name = "buf72_0" } : memref<256xi32> - %buf72_1 = AIE.buffer(%t72) {sym_name = "buf72_1" } : memref<256xi32> + %buf72_0 = aie.buffer(%t72) {sym_name = "buf72_0" } : memref<256xi32> + %buf72_1 = aie.buffer(%t72) {sym_name = "buf72_1" } : memref<256xi32> - %l72_0 = AIE.lock(%t72, 0) - %l72_1 = AIE.lock(%t72, 1) + %l72_0 = aie.lock(%t72, 0) + %l72_1 = aie.lock(%t72, 1) - %m72 = AIE.mem(%t72) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m72 = aie.mem(%t72) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l72_0, "Acquire", 0) - AIE.dma_bd(%buf72_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l72_0, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%l72_0, "Acquire", 0) + aie.dma_bd(%buf72_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l72_0, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%l72_1, "Acquire", 0) - AIE.dma_bd(%buf72_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%l72_1, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%l72_1, "Acquire", 0) + aie.dma_bd(%buf72_1 : memref<256xi32>, 0, 256) + aie.use_lock(%l72_1, "Release", 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - %buf73_0 = AIE.buffer(%t73) {sym_name = "buf73_0" } : memref<256xi32> - %buf73_1 = AIE.buffer(%t73) {sym_name = "buf73_1" } : memref<256xi32> + %buf73_0 = aie.buffer(%t73) {sym_name = "buf73_0" } : memref<256xi32> + %buf73_1 = aie.buffer(%t73) {sym_name = "buf73_1" } : memref<256xi32> - %l73_0 = AIE.lock(%t73, 0) - %l73_1 = AIE.lock(%t73, 1) + %l73_0 = aie.lock(%t73, 0) + %l73_1 = aie.lock(%t73, 1) - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%l73_0, "Acquire", 0) - AIE.dma_bd(%buf73_0 : memref<256xi32>, 0, 256) - AIE.use_lock(%l73_0, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%l73_0, "Acquire", 0) + aie.dma_bd(%buf73_0 : memref<256xi32>, 0, 256) + aie.use_lock(%l73_0, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%l73_1, "Acquire", 0) - AIE.dma_bd(%buf73_1 : memref<256xi32>, 0, 256) - AIE.use_lock(%l73_1, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%l73_1, "Acquire", 0) + aie.dma_bd(%buf73_1 : memref<256xi32>, 0, 256) + aie.use_lock(%l73_1, "Release", 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/21_shim_dma_packet/aie.mlir b/test/unit_tests/aie/21_shim_dma_packet/aie.mlir index 0819e41c84..eeb7be90eb 100644 --- a/test/unit_tests/aie/21_shim_dma_packet/aie.mlir +++ b/test/unit_tests/aie/21_shim_dma_packet/aie.mlir @@ -18,97 +18,97 @@ // on a single DMA. module @kernel_gemm { - %3 = AIE.tile(27, 0) - %4 = AIE.switchbox(%3) { - %43 = AIE.amsel<0> (0) - %44 = AIE.masterset(West : 0, %43) - AIE.packet_rules(DMA : 0) { - AIE.rule(31, 2, %43) + %3 = aie.tile(27, 0) + %4 = aie.switchbox(%3) { + %43 = aie.amsel<0> (0) + %44 = aie.masterset(West : 0, %43) + aie.packet_rules(DMA : 0) { + aie.rule(31, 2, %43) } } - %5 = AIE.lock(%3, 0) { sym_name = "input_lock_0" } - %6 = AIE.external_buffer {sym_name = "buf0"} : memref<32x32xi32> + %5 = aie.lock(%3, 0) { sym_name = "input_lock_0" } + %6 = aie.external_buffer {sym_name = "buf0"} : memref<32x32xi32> - %8 = AIE.shim_dma(%3) { - %43 = AIE.dma_start(MM2S, 0, ^bb1, ^bb2) + %8 = aie.shim_dma(%3) { + %43 = aie.dma_start(MM2S, 0, ^bb1, ^bb2) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%5, Acquire, 1) - AIE.dma_bd_packet(0, 2) - AIE.dma_bd(%6 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%5, Release, 0) - AIE.next_bd ^bb1 + aie.use_lock(%5, Acquire, 1) + aie.dma_bd_packet(0, 2) + aie.dma_bd(%6 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%5, Release, 0) + aie.next_bd ^bb1 ^bb2: // pred: ^bb0 - AIE.end + aie.end } - %9 = AIE.tile(26, 0) - %10 = AIE.switchbox(%9) { - %43 = AIE.amsel<0> (0) - %44 = AIE.masterset(West : 0, %43) - AIE.packet_rules(DMA : 1) { - AIE.rule(31, 3, %43) + %9 = aie.tile(26, 0) + %10 = aie.switchbox(%9) { + %43 = aie.amsel<0> (0) + %44 = aie.masterset(West : 0, %43) + aie.packet_rules(DMA : 1) { + aie.rule(31, 3, %43) } - AIE.packet_rules(East : 0) { - AIE.rule(31, 2, %43) + aie.packet_rules(East : 0) { + aie.rule(31, 2, %43) } - AIE.connect - AIE.connect + aie.connect + aie.connect } - %11 = AIE.lock(%9, 2) { sym_name = "input_lock_2" } - %12 = AIE.lock(%9, 1) { sym_name = "input_lock_1" } - %13 = AIE.lock(%9, 0) { sym_name = "output_lock" } - %14 = AIE.external_buffer {sym_name = "buf1"} : memref<32x32xi32> - %15 = AIE.external_buffer {sym_name = "buf2"} : memref<32x32xi32> - %16 = AIE.external_buffer {sym_name = "buf3"} : memref<32x32xi32> + %11 = aie.lock(%9, 2) { sym_name = "input_lock_2" } + %12 = aie.lock(%9, 1) { sym_name = "input_lock_1" } + %13 = aie.lock(%9, 0) { sym_name = "output_lock" } + %14 = aie.external_buffer {sym_name = "buf1"} : memref<32x32xi32> + %15 = aie.external_buffer {sym_name = "buf2"} : memref<32x32xi32> + %16 = aie.external_buffer {sym_name = "buf3"} : memref<32x32xi32> - %18 = AIE.shim_dma(%9) { - %43 = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) + %18 = aie.shim_dma(%9) { + %43 = aie.dma_start(S2MM, 0, ^bb1, ^bb2) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%13, Acquire, 0) - AIE.dma_bd(%16 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%13, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%13, Acquire, 0) + aie.dma_bd(%16 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%13, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb0 - %44 = AIE.dma_start(MM2S, 0, ^bb3, ^bb4) + %44 = aie.dma_start(MM2S, 0, ^bb3, ^bb4) ^bb3: // 2 preds: ^bb2, ^bb3 - AIE.use_lock(%11, Acquire, 1) - AIE.dma_bd(%15 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%11, Release, 0) - AIE.next_bd ^bb3 + aie.use_lock(%11, Acquire, 1) + aie.dma_bd(%15 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%11, Release, 0) + aie.next_bd ^bb3 ^bb4: // pred: ^bb2 - %45 = AIE.dma_start(MM2S, 1, ^bb5, ^bb6) + %45 = aie.dma_start(MM2S, 1, ^bb5, ^bb6) ^bb5: // 2 preds: ^bb4, ^bb5 - AIE.use_lock(%12, Acquire, 1) - AIE.dma_bd_packet(0, 3) - AIE.dma_bd(%14 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%12, Release, 0) - AIE.next_bd ^bb5 + aie.use_lock(%12, Acquire, 1) + aie.dma_bd_packet(0, 3) + aie.dma_bd(%14 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%12, Release, 0) + aie.next_bd ^bb5 ^bb6: // pred: ^bb4 - AIE.end + aie.end } - %19 = AIE.tile(25, 2) {polyaie.leaf} - %20 = AIE.lock(%19, 15) - %21 = AIE.switchbox(%19) { - %43 = AIE.amsel<0> (0) - %44 = AIE.masterset(DMA : 1, %43) - AIE.packet_rules(South : 0) { - AIE.rule(30, 2, %43) + %19 = aie.tile(25, 2) {polyaie.leaf} + %20 = aie.lock(%19, 15) + %21 = aie.switchbox(%19) { + %43 = aie.amsel<0> (0) + %44 = aie.masterset(DMA : 1, %43) + aie.packet_rules(South : 0) { + aie.rule(30, 2, %43) } - AIE.connect - AIE.connect + aie.connect + aie.connect } - %22 = AIE.lock(%19, 3) - %23 = AIE.lock(%19, 2) - %24 = AIE.lock(%19, 1) - %25 = AIE.lock(%19, 0) - %26 = AIE.buffer(%19) {sym_name = "C_out"} : memref<32x32xi32> - %29 = AIE.buffer(%19) {sym_name = "C"} : memref<32x32xi32> - %30 = AIE.buffer(%19) {sym_name = "A"} : memref<32x32xi32> - %31 = AIE.buffer(%19) {sym_name = "B"} : memref<32x32xi32> - %32 = AIE.core(%19) { - AIE.use_lock(%23, Acquire, 1) - AIE.use_lock(%24, Acquire, 1) - AIE.use_lock(%25, Acquire, 0) - AIE.use_lock(%22, Acquire, 1) + %22 = aie.lock(%19, 3) + %23 = aie.lock(%19, 2) + %24 = aie.lock(%19, 1) + %25 = aie.lock(%19, 0) + %26 = aie.buffer(%19) {sym_name = "C_out"} : memref<32x32xi32> + %29 = aie.buffer(%19) {sym_name = "C"} : memref<32x32xi32> + %30 = aie.buffer(%19) {sym_name = "A"} : memref<32x32xi32> + %31 = aie.buffer(%19) {sym_name = "B"} : memref<32x32xi32> + %32 = aie.core(%19) { + aie.use_lock(%23, Acquire, 1) + aie.use_lock(%24, Acquire, 1) + aie.use_lock(%25, Acquire, 0) + aie.use_lock(%22, Acquire, 1) affine.for %arg0 = 0 to 32 { affine.for %arg1 = 0 to 32 { %43 = affine.load %29[%arg0, %arg1] : memref<32x32xi32> @@ -123,72 +123,72 @@ module @kernel_gemm { } } } - AIE.use_lock(%22, Release, 0) - AIE.use_lock(%25, Release, 1) - AIE.use_lock(%24, Release, 0) - AIE.use_lock(%23, Release, 0) - AIE.use_lock(%20, Release, 1) - AIE.end + aie.use_lock(%22, Release, 0) + aie.use_lock(%25, Release, 1) + aie.use_lock(%24, Release, 0) + aie.use_lock(%23, Release, 0) + aie.use_lock(%20, Release, 1) + aie.end } - %33 = AIE.mem(%19) { - %43 = AIE.dma_start(S2MM, 0, ^bb1, ^bb2) + %33 = aie.mem(%19) { + %43 = aie.dma_start(S2MM, 0, ^bb1, ^bb2) ^bb1: // 2 preds: ^bb0, ^bb1 - AIE.use_lock(%22, Acquire, 0) - AIE.dma_bd(%31 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%22, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%22, Acquire, 0) + aie.dma_bd(%31 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%22, Release, 1) + aie.next_bd ^bb1 ^bb2: // pred: ^bb0 - %44 = AIE.dma_start(S2MM, 1, ^bb3, ^bb5) + %44 = aie.dma_start(S2MM, 1, ^bb3, ^bb5) ^bb3: // 2 preds: ^bb2, ^bb4 - AIE.use_lock(%24, Acquire, 0) - AIE.dma_bd_packet(0, 2) - AIE.dma_bd(%29 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%24, Release, 1) - AIE.next_bd ^bb4 + aie.use_lock(%24, Acquire, 0) + aie.dma_bd_packet(0, 2) + aie.dma_bd(%29 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%24, Release, 1) + aie.next_bd ^bb4 ^bb4: // pred: ^bb3 - AIE.use_lock(%23, Acquire, 0) - AIE.dma_bd_packet(0, 3) - AIE.dma_bd(%30 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%23, Release, 1) - AIE.next_bd ^bb3 + aie.use_lock(%23, Acquire, 0) + aie.dma_bd_packet(0, 3) + aie.dma_bd(%30 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%23, Release, 1) + aie.next_bd ^bb3 ^bb5: // pred: ^bb2 - %45 = AIE.dma_start(MM2S, 0, ^bb6, ^bb7) + %45 = aie.dma_start(MM2S, 0, ^bb6, ^bb7) ^bb6: // 2 preds: ^bb5, ^bb6 - AIE.use_lock(%25, Acquire, 1) - AIE.dma_bd(%26 : memref<32x32xi32>, 0, 1024) - AIE.use_lock(%25, Release, 0) - AIE.next_bd ^bb6 + aie.use_lock(%25, Acquire, 1) + aie.dma_bd(%26 : memref<32x32xi32>, 0, 1024) + aie.use_lock(%25, Release, 0) + aie.next_bd ^bb6 ^bb7: // pred: ^bb5 - AIE.end + aie.end } - %34 = AIE.tile(25, 0) - %35 = AIE.switchbox(%34) { - %43 = AIE.amsel<0> (0) - %44 = AIE.masterset(North : 0, %43) - AIE.packet_rules(East : 0) { - AIE.rule(30, 2, %43) + %34 = aie.tile(25, 0) + %35 = aie.switchbox(%34) { + %43 = aie.amsel<0> (0) + %44 = aie.masterset(North : 0, %43) + aie.packet_rules(East : 0) { + aie.rule(30, 2, %43) } - AIE.connect + aie.connect } - %36 = AIE.tile(25, 1) - %37 = AIE.switchbox(%36) { - %43 = AIE.amsel<0> (0) - %44 = AIE.masterset(North : 0, %43) - AIE.packet_rules(South : 0) { - AIE.rule(30, 2, %43) + %36 = aie.tile(25, 1) + %37 = aie.switchbox(%36) { + %43 = aie.amsel<0> (0) + %44 = aie.masterset(North : 0, %43) + aie.packet_rules(South : 0) { + aie.rule(30, 2, %43) } - AIE.connect + aie.connect } - %38 = AIE.tile(26, 1) - %39 = AIE.tile(26, 2) - %40 = AIE.switchbox(%38) { - AIE.connect + %38 = aie.tile(26, 1) + %39 = aie.tile(26, 2) + %40 = aie.switchbox(%38) { + aie.connect } - %41 = AIE.switchbox(%39) { - AIE.connect + %41 = aie.switchbox(%39) { + aie.connect } - %42 = AIE.shim_mux(%9) { - AIE.connect - AIE.connect + %42 = aie.shim_mux(%9) { + aie.connect + aie.connect } } diff --git a/test/unit_tests/aie/21_target_triple/aie.mlir b/test/unit_tests/aie/21_target_triple/aie.mlir index 4097539338..0a036944ea 100644 --- a/test/unit_tests/aie/21_target_triple/aie.mlir +++ b/test/unit_tests/aie/21_target_triple/aie.mlir @@ -23,18 +23,18 @@ // correctly. module attributes {llvm.target_triple = "x86_64-unknown-linux-gnu"} { - %tile32 = AIE.tile(1, 3) + %tile32 = aie.tile(1, 3) - %buf_a = AIE.buffer(%tile32) {sym_name = "a"} : memref<16xi32> - %buf_b = AIE.buffer(%tile32) {sym_name = "b"} : memref + %buf_a = aie.buffer(%tile32) {sym_name = "a"} : memref<16xi32> + %buf_b = aie.buffer(%tile32) {sym_name = "b"} : memref - %core32 = AIE.core(%tile32) { + %core32 = aie.core(%tile32) { %val0 = affine.load %buf_b[] : memref affine.for %arg0 = 0 to 16 { %val1 = affine.load %buf_a[%arg0] : memref<16xi32> %val2 = arith.addi %val0, %val1 : i32 affine.store %val2, %buf_a[%arg0] : memref<16xi32> } - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/22_init_locks/aie.mlir b/test/unit_tests/aie/22_init_locks/aie.mlir index 18c3d325bb..855afba919 100644 --- a/test/unit_tests/aie/22_init_locks/aie.mlir +++ b/test/unit_tests/aie/22_init_locks/aie.mlir @@ -12,17 +12,17 @@ // RUN: %run_on_board ./test.elf module @test22_init_locks { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { init = 1 : i32, sym_name = "lock_a" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "lock_b" } + %lock13_3 = aie.lock(%tile13, 3) { init = 1 : i32, sym_name = "lock_a" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "lock_b" } - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -31,8 +31,8 @@ module @test22_init_locks { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } } diff --git a/test/unit_tests/aie/23_broadcast_packet/aie.mlir b/test/unit_tests/aie/23_broadcast_packet/aie.mlir index cf3e9d0145..ef92511b22 100644 --- a/test/unit_tests/aie/23_broadcast_packet/aie.mlir +++ b/test/unit_tests/aie/23_broadcast_packet/aie.mlir @@ -13,102 +13,102 @@ module @test23_broadcast_packet { - %t72 = AIE.tile(7, 2) + %t72 = aie.tile(7, 2) - %t63 = AIE.tile(6, 3) - %t64 = AIE.tile(6, 4) - %t73 = AIE.tile(7, 3) - %t74 = AIE.tile(7, 4) + %t63 = aie.tile(6, 3) + %t64 = aie.tile(6, 4) + %t73 = aie.tile(7, 3) + %t74 = aie.tile(7, 4) - %buf72_0 = AIE.buffer(%t72) {sym_name = "buf72_0"} : memref<1024xi32> - %buf72_1 = AIE.buffer(%t72) {sym_name = "buf72_1"} : memref<1024xi32> + %buf72_0 = aie.buffer(%t72) {sym_name = "buf72_0"} : memref<1024xi32> + %buf72_1 = aie.buffer(%t72) {sym_name = "buf72_1"} : memref<1024xi32> - %buf63_0 = AIE.buffer(%t63) {sym_name = "buf63_0"} : memref<1024xi32> - %buf64_0 = AIE.buffer(%t64) {sym_name = "buf64_0"} : memref<1024xi32> + %buf63_0 = aie.buffer(%t63) {sym_name = "buf63_0"} : memref<1024xi32> + %buf64_0 = aie.buffer(%t64) {sym_name = "buf64_0"} : memref<1024xi32> - %buf73_0 = AIE.buffer(%t73) {sym_name = "buf73_0"} : memref<1024xi32> - %buf74_0 = AIE.buffer(%t74) {sym_name = "buf74_0"} : memref<1024xi32> + %buf73_0 = aie.buffer(%t73) {sym_name = "buf73_0"} : memref<1024xi32> + %buf74_0 = aie.buffer(%t74) {sym_name = "buf74_0"} : memref<1024xi32> - AIEX.broadcast_packet(%t72, "DMA" : 0){ - AIEX.bp_id(0x0){ - AIEX.bp_dest<%t73, "DMA" : 0> - AIEX.bp_dest<%t63, "DMA" : 0> + aiex.broadcast_packet(%t72, "DMA" : 0){ + aiex.bp_id(0x0){ + aiex.bp_dest<%t73, "DMA" : 0> + aiex.bp_dest<%t63, "DMA" : 0> } - AIEX.bp_id(0x1){ - AIEX.bp_dest<%t74, "DMA" : 0> - AIEX.bp_dest<%t64, "DMA" : 0> + aiex.bp_id(0x1){ + aiex.bp_dest<%t74, "DMA" : 0> + aiex.bp_dest<%t64, "DMA" : 0> } } - %m72 = AIE.mem(%t72) { - %lock72_4 = AIE.lock(%t72, 4) - %lock72_5 = AIE.lock(%t72, 5) - AIE.dma_start("MM2S", 0, ^bd4, ^end) + %m72 = aie.mem(%t72) { + %lock72_4 = aie.lock(%t72, 4) + %lock72_5 = aie.lock(%t72, 5) + aie.dma_start("MM2S", 0, ^bd4, ^end) ^bd4: - AIE.use_lock(%lock72_4, "Acquire", 1) - AIE.dma_bd_packet(0x0, 0x0) - AIE.dma_bd(%buf72_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock72_4, "Release", 0) - AIE.next_bd ^bd5 + aie.use_lock(%lock72_4, "Acquire", 1) + aie.dma_bd_packet(0x0, 0x0) + aie.dma_bd(%buf72_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock72_4, "Release", 0) + aie.next_bd ^bd5 ^bd5: - AIE.use_lock(%lock72_5, "Acquire", 1) - AIE.dma_bd_packet(0x1, 0x1) - AIE.dma_bd(%buf72_1 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock72_5, "Release", 0) - AIE.next_bd ^bd4 + aie.use_lock(%lock72_5, "Acquire", 1) + aie.dma_bd_packet(0x1, 0x1) + aie.dma_bd(%buf72_1 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock72_5, "Release", 0) + aie.next_bd ^bd4 ^end: - AIE.end + aie.end } - %lock63_0 = AIE.lock(%t63, 0) - %m63 = AIE.mem(%t63) { - AIE.dma_start("S2MM", 0, ^bd0, ^end) + %lock63_0 = aie.lock(%t63, 0) + %m63 = aie.mem(%t63) { + aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock63_0, Acquire, 0) - AIE.dma_bd(%buf63_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock63_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock63_0, Acquire, 0) + aie.dma_bd(%buf63_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock63_0, Release, 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %lock64_0 = AIE.lock(%t64, 0) - %m64 = AIE.mem(%t64) { - AIE.dma_start("S2MM", 0, ^bd0, ^end) + %lock64_0 = aie.lock(%t64, 0) + %m64 = aie.mem(%t64) { + aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock64_0, Acquire, 0) - AIE.dma_bd(%buf64_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock64_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock64_0, Acquire, 0) + aie.dma_bd(%buf64_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock64_0, Release, 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %lock73_0 = AIE.lock(%t73, 0) - %m73 = AIE.mem(%t73) { - AIE.dma_start("S2MM", 0, ^bd0, ^end) + %lock73_0 = aie.lock(%t73, 0) + %m73 = aie.mem(%t73) { + aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock73_0, Acquire, 0) - AIE.dma_bd(%buf73_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock73_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock73_0, Acquire, 0) + aie.dma_bd(%buf73_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock73_0, Release, 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } - %lock74_0 = AIE.lock(%t74, 0) - %m74 = AIE.mem(%t74) { + %lock74_0 = aie.lock(%t74, 0) + %m74 = aie.mem(%t74) { - AIE.dma_start("S2MM", 0, ^bd0, ^end) + aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock74_0, Acquire, 0) - AIE.dma_bd(%buf74_0 : memref<1024xi32>, 0, 1024) - AIE.use_lock(%lock74_0, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock74_0, Acquire, 0) + aie.dma_bd(%buf74_0 : memref<1024xi32>, 0, 1024) + aie.use_lock(%lock74_0, Release, 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } } \ No newline at end of file diff --git a/test/unit_tests/aie/23_packet_biShim/aie.mlir b/test/unit_tests/aie/23_packet_biShim/aie.mlir index 9a7dea0c39..da6ea5696f 100644 --- a/test/unit_tests/aie/23_packet_biShim/aie.mlir +++ b/test/unit_tests/aie/23_packet_biShim/aie.mlir @@ -11,61 +11,61 @@ // RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf module @aie_module { - %t70 = AIE.tile(7, 0) - %t72 = AIE.tile(7, 2) + %t70 = aie.tile(7, 0) + %t72 = aie.tile(7, 2) - %10 = AIE.lock(%t72, 1) {sym_name = "inter_lock"} - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock"} - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock"} + %10 = aie.lock(%t72, 1) {sym_name = "inter_lock"} + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock"} + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock"} - %11 = AIE.buffer(%t72) {sym_name = "buf1"} : memref<256xi32> - %buf_i = AIE.external_buffer {sym_name = "input"} : memref<256xi32> - %buf_o = AIE.external_buffer {sym_name = "output"} : memref<257xi32> + %11 = aie.buffer(%t72) {sym_name = "buf1"} : memref<256xi32> + %buf_i = aie.external_buffer {sym_name = "input"} : memref<256xi32> + %buf_o = aie.external_buffer {sym_name = "output"} : memref<257xi32> - %12 = AIE.mem(%t72) { - %srcDma = AIE.dma_start("S2MM", 0, ^bb2, ^dma0) + %12 = aie.mem(%t72) { + %srcDma = aie.dma_start("S2MM", 0, ^bb2, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 0, ^bb3, ^end) + %dstDma = aie.dma_start("MM2S", 0, ^bb3, ^end) ^bb2: - AIE.use_lock(%10, Acquire, 0) - AIE.dma_bd(%11 : memref<256xi32>, 0, 256) - AIE.use_lock(%10, Release, 1) - AIE.next_bd ^bb2 + aie.use_lock(%10, Acquire, 0) + aie.dma_bd(%11 : memref<256xi32>, 0, 256) + aie.use_lock(%10, Release, 1) + aie.next_bd ^bb2 ^bb3: - AIE.use_lock(%10, Acquire, 1) - AIE.dma_bd_packet(0x6, 10) - AIE.dma_bd(%11 : memref<256xi32>, 0, 256) - AIE.next_bd ^bb3 + aie.use_lock(%10, Acquire, 1) + aie.dma_bd_packet(0x6, 10) + aie.dma_bd(%11 : memref<256xi32>, 0, 256) + aie.next_bd ^bb3 ^end: - AIE.end + aie.end } - %dma = AIE.shim_dma(%t70) { - AIE.dma_start("MM2S", 0, ^bb0, ^dma0) + %dma = aie.shim_dma(%t70) { + aie.dma_start("MM2S", 0, ^bb0, ^dma0) ^dma0: - AIE.dma_start("S2MM", 0, ^bb1, ^end) + aie.dma_start("S2MM", 0, ^bb1, ^end) ^bb0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd_packet(0x2, 3) - AIE.dma_bd(%buf_i : memref<256xi32>, 0, 256) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bb0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd_packet(0x2, 3) + aie.dma_bd(%buf_i : memref<256xi32>, 0, 256) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bb0 ^bb1: - AIE.use_lock(%lock2, Acquire, 0) - AIE.dma_bd(%buf_o : memref<257xi32>, 0, 257) - AIE.use_lock(%lock2, Release, 1) - AIE.next_bd ^bb1 + aie.use_lock(%lock2, Acquire, 0) + aie.dma_bd(%buf_o : memref<257xi32>, 0, 257) + aie.use_lock(%lock2, Release, 1) + aie.next_bd ^bb1 ^end: - AIE.end + aie.end } - AIE.packet_flow(0x3) { - AIE.packet_source<%t70, DMA : 0> - AIE.packet_dest<%t72, DMA : 0> + aie.packet_flow(0x3) { + aie.packet_source<%t70, DMA : 0> + aie.packet_dest<%t72, DMA : 0> } - AIE.packet_flow(0xA) { - AIE.packet_source<%t72, DMA : 0> - AIE.packet_dest<%t70, DMA : 0> + aie.packet_flow(0xA) { + aie.packet_source<%t72, DMA : 0> + aie.packet_dest<%t70, DMA : 0> } } diff --git a/test/unit_tests/aie/24_host_loop/aie.mlir b/test/unit_tests/aie/24_host_loop/aie.mlir index 7787ab9693..a11edb31a9 100755 --- a/test/unit_tests/aie/24_host_loop/aie.mlir +++ b/test/unit_tests/aie/24_host_loop/aie.mlir @@ -11,9 +11,9 @@ // RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf -AIE.device(xcvc1902) { - %tile34 = AIE.tile(3, 4) - %tile70 = AIE.tile(7, 0) +aie.device(xcvc1902) { + %tile34 = aie.tile(3, 4) + %tile70 = aie.tile(7, 0) func.func @evaluate_condition(%argIn : i32) -> (i1) { %true = arith.constant 1 : i1 @@ -25,16 +25,16 @@ AIE.device(xcvc1902) { return %next : i32 } - %ext_buf70_in = AIE.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> - %ext_buf70_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<256xi32> + %ext_buf70_in = aie.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> + %ext_buf70_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<256xi32> - AIE.objectfifo @of_in (%tile70, {%tile34}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out (%tile34, {%tile70}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile70, {%tile34}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_out (%tile34, {%tile70}, 1 : i32) : !aie.objectfifo> - AIE.objectfifo.register_external_buffers @of_in (%tile70, {%ext_buf70_in}) : (memref<256xi32>) - AIE.objectfifo.register_external_buffers @of_out (%tile70, {%ext_buf70_out}) : (memref<256xi32>) + aie.objectfifo.register_external_buffers @of_in (%tile70, {%ext_buf70_in}) : (memref<256xi32>) + aie.objectfifo.register_external_buffers @of_out (%tile70, {%ext_buf70_out}) : (memref<256xi32>) - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 256 : index @@ -47,22 +47,22 @@ AIE.device(xcvc1902) { ^bb0(%arg2: i32): %next = func.call @payload(%arg2) : (i32) -> i32 - %inputSubview = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %outputSubview = AIE.objectfifo.acquire @of_out (Produce, 1) : !AIE.objectfifosubview> + %inputSubview = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %outputSubview = aie.objectfifo.acquire @of_out (Produce, 1) : !aie.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %output = AIE.objectfifo.subview.access %outputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> + %output = aie.objectfifo.subview.access %outputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> scf.for %indexInHeight = %c0 to %height step %c1 { %d1 = memref.load %input[%indexInHeight] : memref<256xi32> memref.store %d1, %output[%indexInHeight] : memref<256xi32> } - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_out (Produce, 1) + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_out (Produce, 1) scf.yield %next : i32 } - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/25_host_multirate/aie.mlir b/test/unit_tests/aie/25_host_multirate/aie.mlir index 7a608ea7cc..aba031c725 100755 --- a/test/unit_tests/aie/25_host_multirate/aie.mlir +++ b/test/unit_tests/aie/25_host_multirate/aie.mlir @@ -11,11 +11,11 @@ // RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf -AIE.device(xcvc1902) { - %tile34 = AIE.tile(3, 4) - %tile70 = AIE.tile(7, 0) +aie.device(xcvc1902) { + %tile34 = aie.tile(3, 4) + %tile70 = aie.tile(7, 0) - %hostLock = AIE.lock(%tile34, 0) {sym_name="hostLock"} + %hostLock = aie.lock(%tile34, 0) {sym_name="hostLock"} func.func @evaluate_condition(%argIn : i32) -> (i1) { %true = arith.constant 1 : i1 @@ -27,16 +27,16 @@ AIE.device(xcvc1902) { return %next : i32 } - %ext_buf70_in = AIE.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> - %ext_buf70_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<64xi32> + %ext_buf70_in = aie.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> + %ext_buf70_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<64xi32> - AIE.objectfifo @of_in (%tile70, {%tile34}, 1 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_out (%tile34, {%tile70}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile70, {%tile34}, 1 : i32) : !aie.objectfifo> + aie.objectfifo @of_out (%tile34, {%tile70}, 1 : i32) : !aie.objectfifo> - AIE.objectfifo.register_external_buffers @of_in (%tile70, {%ext_buf70_in}) : (memref<256xi32>) - AIE.objectfifo.register_external_buffers @of_out (%tile70, {%ext_buf70_out}) : (memref<64xi32>) + aie.objectfifo.register_external_buffers @of_in (%tile70, {%ext_buf70_in}) : (memref<256xi32>) + aie.objectfifo.register_external_buffers @of_out (%tile70, {%ext_buf70_out}) : (memref<64xi32>) - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 64 : index @@ -49,26 +49,26 @@ AIE.device(xcvc1902) { ^bb0(%arg2: i32): %next = func.call @payload(%arg2) : (i32) -> i32 - AIE.use_lock(%hostLock, Acquire, 1) + aie.use_lock(%hostLock, Acquire, 1) - %inputSubview = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %outputSubview = AIE.objectfifo.acquire @of_out (Produce, 1) : !AIE.objectfifosubview> + %inputSubview = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %outputSubview = aie.objectfifo.acquire @of_out (Produce, 1) : !aie.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<64xi32> - %output = AIE.objectfifo.subview.access %outputSubview[0] : !AIE.objectfifosubview> -> memref<64xi32> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<64xi32> + %output = aie.objectfifo.subview.access %outputSubview[0] : !aie.objectfifosubview> -> memref<64xi32> scf.for %indexInHeight = %c0 to %height step %c1 { %d1 = memref.load %input[%indexInHeight] : memref<64xi32> memref.store %d1, %output[%indexInHeight] : memref<64xi32> } - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_out (Produce, 1) + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_out (Produce, 1) - AIE.use_lock(%hostLock, Release, 0) + aie.use_lock(%hostLock, Release, 0) scf.yield %next : i32 } - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir b/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir index 235a098d4c..0ce32fa7d6 100644 --- a/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir +++ b/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir @@ -12,13 +12,13 @@ // RUN: %run_on_board ./test.elf module @test27_simple_shim_dma_single_lock { - AIE.device(xcvc1902) { - %tile72 = AIE.tile(7, 2) - %lockCore = AIE.lock(%tile72, 0) {init = 0 : i32 , sym_name = "coreLock"} //{ init = 0 : i32 , sym_name = "coreLock"} - %dummyLock = AIE.lock(%tile72, 1) { sym_name = "dummyLock"} - %buf72_0 = AIE.buffer(%tile72) {sym_name = "aieL1" } : memref<16xi32> + aie.device(xcvc1902) { + %tile72 = aie.tile(7, 2) + %lockCore = aie.lock(%tile72, 0) {init = 0 : i32 , sym_name = "coreLock"} //{ init = 0 : i32 , sym_name = "coreLock"} + %dummyLock = aie.lock(%tile72, 1) { sym_name = "dummyLock"} + %buf72_0 = aie.buffer(%tile72) {sym_name = "aieL1" } : memref<16xi32> - %core72 = AIE.core(%tile72) { + %core72 = aie.core(%tile72) { %c0 = arith.constant 0 : index %constant0 = arith.constant 0 : i32 @@ -27,23 +27,23 @@ module @test27_simple_shim_dma_single_lock { %constant43 = arith.constant 43 : i32 %constant47 = arith.constant 47 : i32 - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant7, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant13, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant43, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant47, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.end + aie.end } } } diff --git a/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir b/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir index 3cff342363..5ffae91ba7 100644 --- a/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir +++ b/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir @@ -12,13 +12,13 @@ // RUN: %run_on_board ./test.elf module @test27_simple_shim_dma_single_lock { - AIE.device(xcve2802) { - %tile72 = AIE.tile(7, 3) - %lockCore = AIE.lock(%tile72, 0) {init = 0 : i32 , sym_name = "coreLock"} - %dummyLock = AIE.lock(%tile72, 1) { sym_name = "dummyLock"} - %buf72_0 = AIE.buffer(%tile72) {sym_name = "aieL1" } : memref<16xi32> + aie.device(xcve2802) { + %tile72 = aie.tile(7, 3) + %lockCore = aie.lock(%tile72, 0) {init = 0 : i32 , sym_name = "coreLock"} + %dummyLock = aie.lock(%tile72, 1) { sym_name = "dummyLock"} + %buf72_0 = aie.buffer(%tile72) {sym_name = "aieL1" } : memref<16xi32> - %core72 = AIE.core(%tile72) { + %core72 = aie.core(%tile72) { %c0 = arith.constant 0 : index %constant0 = arith.constant 0 : i32 @@ -27,23 +27,23 @@ module @test27_simple_shim_dma_single_lock { %constant43 = arith.constant 43 : i32 %constant47 = arith.constant 47 : i32 - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant7, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant13, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant43, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant47, %buf72_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.end + aie.end } } } diff --git a/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir b/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir index ce0720f3ce..845a8016b5 100644 --- a/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir +++ b/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir @@ -12,12 +12,12 @@ // RUN: %run_on_board ./test.elf module @test27_simple_shim_dma_single_lock { - %tile73 = AIE.tile(7, 3) - %lockCore = AIE.lock(%tile73, 0) { sym_name = "coreLock"} - %dummyLock = AIE.lock(%tile73, 1) { sym_name = "dummyLock"} - %buf73_0 = AIE.buffer(%tile73) {sym_name = "aieL1" } : memref<16xi32> + %tile73 = aie.tile(7, 3) + %lockCore = aie.lock(%tile73, 0) { sym_name = "coreLock"} + %dummyLock = aie.lock(%tile73, 1) { sym_name = "dummyLock"} + %buf73_0 = aie.buffer(%tile73) {sym_name = "aieL1" } : memref<16xi32> - %core72 = AIE.core(%tile73) { + %core72 = aie.core(%tile73) { %c0 = arith.constant 0 : index %constant0 = arith.constant 0 : i32 @@ -26,42 +26,42 @@ module @test27_simple_shim_dma_single_lock { %constant43 = arith.constant 43 : i32 %constant47 = arith.constant 47 : i32 - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant7, %buf73_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) - AIE.use_lock(%lockCore, "Release", 1) - // AIE.use_lock(%dummyLock, "Acquire", 0) - // AIE.use_lock(%dummyLock, "Release", 0) + aie.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Release", 1) + // aie.use_lock(%dummyLock, "Acquire", 0) + // aie.use_lock(%dummyLock, "Release", 0) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant13, %buf73_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) - AIE.use_lock(%lockCore, "Release", 1) - // AIE.use_lock(%dummyLock, "Acquire", 0) - // AIE.use_lock(%dummyLock, "Release", 0) + aie.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Release", 1) + // aie.use_lock(%dummyLock, "Acquire", 0) + // aie.use_lock(%dummyLock, "Release", 0) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant43, %buf73_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) - AIE.use_lock(%lockCore, "Release", 1) - // AIE.use_lock(%dummyLock, "Acquire", 0) - // AIE.use_lock(%dummyLock, "Release", 0) + aie.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Release", 1) + // aie.use_lock(%dummyLock, "Acquire", 0) + // aie.use_lock(%dummyLock, "Release", 0) - AIE.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Acquire", 0) memref.store %constant47, %buf73_0[%c0] : memref<16xi32> - AIE.use_lock(%lockCore, "Release", 1) + aie.use_lock(%lockCore, "Release", 1) - AIE.use_lock(%lockCore, "Acquire", 0) - AIE.use_lock(%lockCore, "Release", 1) - // AIE.use_lock(%dummyLock, "Acquire", 0) - // AIE.use_lock(%dummyLock, "Release", 0) + aie.use_lock(%lockCore, "Acquire", 0) + aie.use_lock(%lockCore, "Release", 1) + // aie.use_lock(%dummyLock, "Acquire", 0) + // aie.use_lock(%dummyLock, "Release", 0) - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir b/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir index 446e876c77..0166e91458 100755 --- a/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir +++ b/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir @@ -12,22 +12,22 @@ // RUN: %run_on_board ./test.elf module @multi_depth { - AIE.device(xcvc1902) { - %tile20 = AIE.tile(2, 0) - %tile23 = AIE.tile(2, 3) - %tile25 = AIE.tile(2, 5) + aie.device(xcvc1902) { + %tile20 = aie.tile(2, 0) + %tile23 = aie.tile(2, 3) + %tile25 = aie.tile(2, 5) - %lock_pc = AIE.lock(%tile25, 0) {sym_name = "lock_pc"} + %lock_pc = aie.lock(%tile25, 0) {sym_name = "lock_pc"} - %lock_out = AIE.lock(%tile25, 1) {sym_name = "lock_out"} - %buff_out = AIE.buffer(%tile25) {sym_name = "buff_out"} : memref<4x32xi32> + %lock_out = aie.lock(%tile25, 1) {sym_name = "lock_out"} + %buff_out = aie.buffer(%tile25) {sym_name = "buff_out"} : memref<4x32xi32> - AIE.objectfifo @of_in (%tile20, {%tile23, %tile25}, [2, 2, 3]) : !AIE.objectfifo> - AIE.objectfifo @of_inter (%tile23, {%tile25}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile20, {%tile23, %tile25}, [2, 2, 3]) : !aie.objectfifo> + aie.objectfifo @of_inter (%tile23, {%tile25}, 2 : i32) : !aie.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ext_buffer_in_0"} : memref<32xi32> - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ext_buffer_in_1"} : memref<32xi32> - AIE.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in_0, %ext_buffer_in_1}) : (memref<32xi32>, memref<32xi32>) + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ext_buffer_in_0"} : memref<32xi32> + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ext_buffer_in_1"} : memref<32xi32> + aie.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in_0, %ext_buffer_in_1}) : (memref<32xi32>, memref<32xi32>) func.func @add_one(%elemIn : memref<32xi32>, %elemOut : memref<32xi32>) -> () { %c0 = arith.constant 0 : index @@ -57,55 +57,55 @@ module @multi_depth { return } - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %iter_max = arith.constant 4 : index scf.for %iter = %c0 to %iter_max step %c1 { - %subviewIn = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %elemIn = AIE.objectfifo.subview.access %subviewIn[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewIn = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %elemIn = aie.objectfifo.subview.access %subviewIn[0] : !aie.objectfifosubview> -> memref<32xi32> - %subviewOut = AIE.objectfifo.acquire @of_inter (Produce, 1) : !AIE.objectfifosubview> - %elemOut = AIE.objectfifo.subview.access %subviewOut[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewOut = aie.objectfifo.acquire @of_inter (Produce, 1) : !aie.objectfifosubview> + %elemOut = aie.objectfifo.subview.access %subviewOut[0] : !aie.objectfifosubview> -> memref<32xi32> func.call @add_one(%elemIn, %elemOut) : (memref<32xi32>, memref<32xi32>) -> () - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_inter (Produce, 1) + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_inter (Produce, 1) } - AIE.end + aie.end } - %core25 = AIE.core(%tile25) { + %core25 = aie.core(%tile25) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 32 : index %iter_max = arith.constant 4 : index - AIE.use_lock(%lock_pc, Acquire, 0) + aie.use_lock(%lock_pc, Acquire, 0) - AIE.use_lock(%lock_out, Acquire, 0) + aie.use_lock(%lock_out, Acquire, 0) scf.for %iter = %c0 to %iter_max step %c1 { - %subviewIn_21 = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %elemIn_21 = AIE.objectfifo.subview.access %subviewIn_21[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewIn_21 = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %elemIn_21 = aie.objectfifo.subview.access %subviewIn_21[0] : !aie.objectfifosubview> -> memref<32xi32> - %subviewIn_22 = AIE.objectfifo.acquire @of_inter (Consume, 1) : !AIE.objectfifosubview> - %elemIn_22 = AIE.objectfifo.subview.access %subviewIn_22[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewIn_22 = aie.objectfifo.acquire @of_inter (Consume, 1) : !aie.objectfifosubview> + %elemIn_22 = aie.objectfifo.subview.access %subviewIn_22[0] : !aie.objectfifosubview> -> memref<32xi32> func.call @add_store(%elemIn_21, %elemIn_22, %buff_out, %iter) : (memref<32xi32>, memref<32xi32>, memref<4x32xi32>, index) -> () - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_inter (Consume, 1) + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_inter (Consume, 1) } - AIE.use_lock(%lock_out, Release, 1) + aie.use_lock(%lock_out, Release, 1) - AIE.use_lock(%lock_pc, Release, 1) + aie.use_lock(%lock_pc, Release, 1) - AIE.end + aie.end } } } diff --git a/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir b/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir index 291654af12..d125506c9c 100755 --- a/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir +++ b/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir @@ -12,23 +12,23 @@ // RUN: %run_on_board ./test.elf module @single_depth { - AIE.device(xcvc1902) { - %tile20 = AIE.tile(2, 0) - %tile23 = AIE.tile(2, 3) - %tile25 = AIE.tile(2, 5) + aie.device(xcvc1902) { + %tile20 = aie.tile(2, 0) + %tile23 = aie.tile(2, 3) + %tile25 = aie.tile(2, 5) - %lock_pc = AIE.lock(%tile25, 0) {sym_name = "lock_pc"} + %lock_pc = aie.lock(%tile25, 0) {sym_name = "lock_pc"} - %lock_out = AIE.lock(%tile25, 1) {sym_name = "lock_out"} - %buff_out = AIE.buffer(%tile25) {sym_name = "buff_out"} : memref<4x32xi32> + %lock_out = aie.lock(%tile25, 1) {sym_name = "lock_out"} + %buff_out = aie.buffer(%tile25) {sym_name = "buff_out"} : memref<4x32xi32> - AIE.objectfifo @of_in (%tile20, {%tile23, %tile25}, 2 : i32) : !AIE.objectfifo> - AIE.objectfifo @of_inter (%tile23, {%tile25}, 2 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile20, {%tile23, %tile25}, 2 : i32) : !aie.objectfifo> + aie.objectfifo @of_inter (%tile23, {%tile25}, 2 : i32) : !aie.objectfifo> - %ext_buffer_in_0 = AIE.external_buffer {sym_name = "ext_buffer_in_0"} : memref<32xi32> - %ext_buffer_in_1 = AIE.external_buffer {sym_name = "ext_buffer_in_1"} : memref<32xi32> - AIE.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in_0, %ext_buffer_in_1}) : (memref<32xi32>, memref<32xi32>) + %ext_buffer_in_0 = aie.external_buffer {sym_name = "ext_buffer_in_0"} : memref<32xi32> + %ext_buffer_in_1 = aie.external_buffer {sym_name = "ext_buffer_in_1"} : memref<32xi32> + aie.objectfifo.register_external_buffers @of_in (%tile20, {%ext_buffer_in_0, %ext_buffer_in_1}) : (memref<32xi32>, memref<32xi32>) func.func @add_one(%elemIn : memref<32xi32>, %elemOut : memref<32xi32>) -> () { %c0 = arith.constant 0 : index @@ -58,55 +58,55 @@ module @single_depth { return } - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %iter_max = arith.constant 4 : index scf.for %iter = %c0 to %iter_max step %c1 { - %subviewIn = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %elemIn = AIE.objectfifo.subview.access %subviewIn[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewIn = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %elemIn = aie.objectfifo.subview.access %subviewIn[0] : !aie.objectfifosubview> -> memref<32xi32> - %subviewOut = AIE.objectfifo.acquire @of_inter (Produce, 1) : !AIE.objectfifosubview> - %elemOut = AIE.objectfifo.subview.access %subviewOut[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewOut = aie.objectfifo.acquire @of_inter (Produce, 1) : !aie.objectfifosubview> + %elemOut = aie.objectfifo.subview.access %subviewOut[0] : !aie.objectfifosubview> -> memref<32xi32> func.call @add_one(%elemIn, %elemOut) : (memref<32xi32>, memref<32xi32>) -> () - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_inter (Produce, 1) + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_inter (Produce, 1) } - AIE.end + aie.end } - %core25 = AIE.core(%tile25) { + %core25 = aie.core(%tile25) { %c0 = arith.constant 0 : index %c1 = arith.constant 1 : index %height = arith.constant 32 : index %iter_max = arith.constant 4 : index - AIE.use_lock(%lock_pc, Acquire, 0) + aie.use_lock(%lock_pc, Acquire, 0) - AIE.use_lock(%lock_out, Acquire, 0) + aie.use_lock(%lock_out, Acquire, 0) scf.for %iter = %c0 to %iter_max step %c1 { - %subviewIn_21 = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %elemIn_21 = AIE.objectfifo.subview.access %subviewIn_21[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewIn_21 = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %elemIn_21 = aie.objectfifo.subview.access %subviewIn_21[0] : !aie.objectfifosubview> -> memref<32xi32> - %subviewIn_22 = AIE.objectfifo.acquire @of_inter (Consume, 1) : !AIE.objectfifosubview> - %elemIn_22 = AIE.objectfifo.subview.access %subviewIn_22[0] : !AIE.objectfifosubview> -> memref<32xi32> + %subviewIn_22 = aie.objectfifo.acquire @of_inter (Consume, 1) : !aie.objectfifosubview> + %elemIn_22 = aie.objectfifo.subview.access %subviewIn_22[0] : !aie.objectfifosubview> -> memref<32xi32> func.call @add_store(%elemIn_21, %elemIn_22, %buff_out, %iter) : (memref<32xi32>, memref<32xi32>, memref<4x32xi32>, index) -> () - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_inter (Consume, 1) + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_inter (Consume, 1) } - AIE.use_lock(%lock_out, Release, 1) + aie.use_lock(%lock_out, Release, 1) - AIE.use_lock(%lock_pc, Release, 1) + aie.use_lock(%lock_pc, Release, 1) - AIE.end + aie.end } } } diff --git a/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir b/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir index d3ac70190e..3d56825888 100644 --- a/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir +++ b/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir @@ -33,24 +33,24 @@ module @tutorial_2b { - AIE.device(xcve2802) { - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) + aie.device(xcve2802) { + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) - AIE.flow(%tile14, DMA : 0, %tile34, DMA : 0) + aie.flow(%tile14, DMA : 0, %tile34, DMA : 0) - %buf14 = AIE.buffer(%tile14) { sym_name = "buf14" } : memref<128xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "buf34" } : memref<128xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "buf14" } : memref<128xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "buf34" } : memref<128xi32> - %lock14_done = AIE.lock(%tile14, 0) { init = 0 : i32, sym_name = "lock14_done" } - %lock14_sent = AIE.lock(%tile14, 1) { init = 0 : i32, sym_name = "lock14_sent" } - %lock34_wait = AIE.lock(%tile34, 0) { init = 1 : i32, sym_name = "lock34_wait" } - %lock34_recv = AIE.lock(%tile34, 1) { init = 0 : i32, sym_name = "lock34_recv" } + %lock14_done = aie.lock(%tile14, 0) { init = 0 : i32, sym_name = "lock14_done" } + %lock14_sent = aie.lock(%tile14, 1) { init = 0 : i32, sym_name = "lock14_sent" } + %lock34_wait = aie.lock(%tile34, 0) { init = 1 : i32, sym_name = "lock34_wait" } + %lock34_recv = aie.lock(%tile34, 1) { init = 0 : i32, sym_name = "lock34_recv" } // This core stores the sequence of numbers 0, 1, 2, 3, ... into // buffer buf14, s.t. buf14[i] == i. // After the array has been written, lock14 signifies core14 is done. - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index %i128 = arith.constant 128 : index @@ -63,44 +63,44 @@ module @tutorial_2b { scf.yield %cp : i32 } - AIE.use_lock(%lock14_done, "Release", 1) + aie.use_lock(%lock14_done, "Release", 1) - AIE.end + aie.end } // No code in this core; however, we do have a DMA that receives a // data from the stream and stores it in a buffer. - %core34 = AIE.core(%tile34) { - AIE.end + %core34 = aie.core(%tile34) { + aie.end } // When core (1, 4) is done (lock14 released), its DMA will push all // of buffer14 onto the stream. // The order in which the buffer is pushed onto the stream is defined // by the new attribute at the end of the dma_bd operation. - %mem14 = AIE.mem(%tile14) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_done, "AcquireGreaterEqual", 1) + aie.use_lock(%lock14_done, "AcquireGreaterEqual", 1) ////////// new ////////// - AIE.dma_bd(%buf14 : memref<128xi32>, 0, 128, [, , ]) + aie.dma_bd(%buf14 : memref<128xi32>, 0, 128, [, , ]) // w, s w, s w, s // dim 2, dim 1, dim 0 - AIE.use_lock(%lock14_sent, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%lock14_sent, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %mem34 = AIE.mem(%tile34) { - %dstDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %mem34 = aie.mem(%tile34) { + %dstDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock34_wait, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf34 : memref<128xi32>, 0, 128) - AIE.use_lock(%lock34_recv, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%lock34_wait, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf34 : memref<128xi32>, 0, 128) + aie.use_lock(%lock34_recv, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir b/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir index d92f95eb24..d0ab21657e 100644 --- a/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir +++ b/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir @@ -21,21 +21,21 @@ module @tutorial_2b { - AIE.device(xcve2802) { - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) + aie.device(xcve2802) { + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) - AIE.flow(%tile14, DMA : 0, %tile34, DMA : 0) + aie.flow(%tile14, DMA : 0, %tile34, DMA : 0) - %buf14 = AIE.buffer(%tile14) { sym_name = "buf14" } : memref<128xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "buf34" } : memref<128xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "buf14" } : memref<128xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "buf34" } : memref<128xi32> - %lock14_done = AIE.lock(%tile14, 0) { init = 0 : i32, sym_name = "lock14_done" } - %lock14_sent = AIE.lock(%tile14, 1) { init = 0 : i32, sym_name = "lock14_sent" } - %lock34_wait = AIE.lock(%tile34, 0) { init = 1 : i32, sym_name = "lock34_wait" } - %lock34_recv = AIE.lock(%tile34, 1) { init = 0 : i32, sym_name = "lock34_recv" } + %lock14_done = aie.lock(%tile14, 0) { init = 0 : i32, sym_name = "lock14_done" } + %lock14_sent = aie.lock(%tile14, 1) { init = 0 : i32, sym_name = "lock14_sent" } + %lock34_wait = aie.lock(%tile34, 0) { init = 1 : i32, sym_name = "lock34_wait" } + %lock34_recv = aie.lock(%tile34, 1) { init = 0 : i32, sym_name = "lock34_recv" } - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %i0 = arith.constant 0 : index %i1 = arith.constant 1 : index %i128 = arith.constant 128 : index @@ -48,38 +48,38 @@ module @tutorial_2b { scf.yield %cp : i32 } - AIE.use_lock(%lock14_done, "Release", 1) + aie.use_lock(%lock14_done, "Release", 1) - AIE.end + aie.end } - %core34 = AIE.core(%tile34) { - AIE.end + %core34 = aie.core(%tile34) { + aie.end } - %mem14 = AIE.mem(%tile14) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_done, "AcquireGreaterEqual", 1) + aie.use_lock(%lock14_done, "AcquireGreaterEqual", 1) ////////// new ////////// - AIE.dma_bd(%buf14 : memref<128xi32>, 0, 128, [, , ]) + aie.dma_bd(%buf14 : memref<128xi32>, 0, 128, [, , ]) // w, s w, s w, s // dim 2, dim 1, dim 0 - AIE.use_lock(%lock14_sent, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%lock14_sent, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } - %mem34 = AIE.mem(%tile34) { - %dstDma = AIE.dma_start("S2MM", 0, ^bd0, ^end) + %mem34 = aie.mem(%tile34) { + %dstDma = aie.dma_start("S2MM", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock34_wait, "AcquireGreaterEqual", 1) - AIE.dma_bd(%buf34 : memref<128xi32>, 0, 128) - AIE.use_lock(%lock34_recv, "Release", 1) - AIE.next_bd ^end + aie.use_lock(%lock34_wait, "AcquireGreaterEqual", 1) + aie.dma_bd(%buf34 : memref<128xi32>, 0, 128) + aie.use_lock(%lock34_recv, "Release", 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/unit_tests/aie/31_stream_core/aie.mlir b/test/unit_tests/aie/31_stream_core/aie.mlir index e5f6c294b8..7ed8a7676b 100644 --- a/test/unit_tests/aie/31_stream_core/aie.mlir +++ b/test/unit_tests/aie/31_stream_core/aie.mlir @@ -17,38 +17,38 @@ // XFAIL: * module { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) - %buf13 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf23 = AIE.buffer(%tile23) { sym_name = "c" } : memref<256xi32> + %buf13 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf23 = aie.buffer(%tile23) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock23_7 = AIE.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock23_7 = aie.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock func.func private @do_mul(%A: memref<256xi32>) -> () func.func private @do_mac(%A: memref<256xi32>) -> () - AIE.flow(%tile13, Core : 0, %tile23, Core : 0) + aie.flow(%tile13, Core : 0, %tile23, Core : 0) - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { %0 = arith.constant 0 : i32 %idx0 = arith.constant 3 : index - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) %val = memref.load %buf13[%idx0] : memref<256xi32> - AIE.put_stream(%0 : i32, %val : i32) - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.end + aie.put_stream(%0 : i32, %val : i32) + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.end } - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { %0 = arith.constant 0 : i32 %idx0 = arith.constant 3 : index - AIE.use_lock(%lock23_7, "Acquire", 0) // acquire for write - %val = AIE.get_stream(%0 : i32) : i32 + aie.use_lock(%lock23_7, "Acquire", 0) // acquire for write + %val = aie.get_stream(%0 : i32) : i32 memref.store %val, %buf23[%idx0] : memref<256xi32> - AIE.use_lock(%lock23_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock23_7, "Release", 1) // release for read + aie.end } } diff --git a/test/unit_tests/aie2/00_itsalive/aie.mlir b/test/unit_tests/aie2/00_itsalive/aie.mlir index 7315b98b84..21ad765ab6 100644 --- a/test/unit_tests/aie2/00_itsalive/aie.mlir +++ b/test/unit_tests/aie2/00_itsalive/aie.mlir @@ -12,16 +12,16 @@ // RUN: %PYTHON aiecc.py --unified %s module @test00_itsalive { - AIE.device(xcve2802) { - %tile12 = AIE.tile(1, 3) + aie.device(xcve2802) { + %tile12 = aie.tile(1, 3) - %buf12_0 = AIE.buffer(%tile12) { sym_name = "a", address = 0 } : memref<256xi32> + %buf12_0 = aie.buffer(%tile12) { sym_name = "a", address = 0 } : memref<256xi32> - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %val1 = arith.constant 1 : i32 %idx1 = arith.constant 3 : index %2 = arith.addi %val1, %val1 : i32 - AIE.end + aie.end } } } \ No newline at end of file diff --git a/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir b/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir index a7534fd9ce..e873e7dc43 100644 --- a/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir +++ b/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir @@ -16,24 +16,24 @@ // CHECK: PASS! module @test_chesss_01_precompiled_core_function { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "output_lock" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "output_lock" } func.func private @func(%A: memref<256xi32>, %B: memref<256xi32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write func.call @func(%buf13_0, %buf13_1) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } { link_with="kernel.o" } } } diff --git a/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir b/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir index 6a8defcd7b..91472d50c9 100644 --- a/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir +++ b/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir @@ -16,32 +16,32 @@ // CHECK: PASS! module { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf23_0 = AIE.buffer(%tile23) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf23_0 = aie.buffer(%tile23) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock23_7 = AIE.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock23_7 = aie.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock func.func private @do_mul(%A: memref<256xi32>) -> () func.func private @do_mac(%A: memref<256xi32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, AcquireGreaterEqual, 1) // acquire for read(e.g. input ping) + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, AcquireGreaterEqual, 1) // acquire for read(e.g. input ping) func.call @do_mul(%buf13_0) : (memref<256xi32>) -> () - AIE.end + aie.end } { link_with="kernel.o" } - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { // %val1 = arith.constant 7 : i32 // %idx1 = arith.constant 0 : index // memref.store %val1, %buf14_0[%idx1] : memref<256xi32> func.call @do_mac(%buf23_0) : (memref<256xi32>) -> () - AIE.use_lock(%lock23_7, Release, 1) // release for read - AIE.end + aie.use_lock(%lock23_7, Release, 1) // release for read + aie.end } { link_with="kernel.o" } } } diff --git a/test/unit_tests/aie2/03_simple/aie.mlir b/test/unit_tests/aie2/03_simple/aie.mlir index b339e648c7..3b97060c11 100644 --- a/test/unit_tests/aie2/03_simple/aie.mlir +++ b/test/unit_tests/aie2/03_simple/aie.mlir @@ -14,19 +14,19 @@ // CHECK: PASS! module @test04_shared_memory { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %buf14_0 = AIE.buffer(%tile14) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf14_0 = aie.buffer(%tile14) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "output_lock" } // output buffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, AcquireGreaterEqual, 1) + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, AcquireGreaterEqual, 1) %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -35,8 +35,8 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, Release, 1) - AIE.end + aie.use_lock(%lock13_5, Release, 1) + aie.end } } } diff --git a/test/unit_tests/aie2/04_shared_memory/aie.mlir b/test/unit_tests/aie2/04_shared_memory/aie.mlir index d0991ffbf0..8022c5763d 100644 --- a/test/unit_tests/aie2/04_shared_memory/aie.mlir +++ b/test/unit_tests/aie2/04_shared_memory/aie.mlir @@ -14,26 +14,26 @@ module @test04_shared_memory { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %buf14_0 = AIE.buffer(%tile14) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf14_0 = aie.buffer(%tile14) { sym_name = "c" } : memref<256xi32> - %lock13_2 = AIE.lock(%tile13, 2) { sym_name = "test_lock" } // test lock + %lock13_2 = aie.lock(%tile13, 2) { sym_name = "test_lock" } // test lock - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock - %lock13_4 = AIE.lock(%tile13, 4) { sym_name = "input_read_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock - %lock13_6 = AIE.lock(%tile13, 6) { sym_name = "hidden_read_lock" } // interbuffer lock - %lock14_7 = AIE.lock(%tile14, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock - %lock14_8 = AIE.lock(%tile14, 8) { sym_name = "output_read_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock + %lock13_4 = aie.lock(%tile13, 4) { sym_name = "input_read_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock + %lock13_6 = aie.lock(%tile13, 6) { sym_name = "hidden_read_lock" } // interbuffer lock + %lock14_7 = aie.lock(%tile14, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock + %lock14_8 = aie.lock(%tile14, 8) { sym_name = "output_read_lock" } // output buffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -42,14 +42,14 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, Release, 1) // release input for write - AIE.use_lock(%lock13_6, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_3, Release, 1) // release input for write + aie.use_lock(%lock13_6, Release, 1) // release output for read + aie.end } - %core14 = AIE.core(%tile14) { - AIE.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock14_7, AcquireGreaterEqual, 1) // acquire output for write + %core14 = aie.core(%tile14) { + aie.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock14_7, AcquireGreaterEqual, 1) // acquire output for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf13_1[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -58,9 +58,9 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf14_0[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, Release, 1) // release input for write - AIE.use_lock(%lock14_8, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_5, Release, 1) // release input for write + aie.use_lock(%lock14_8, Release, 1) // release output for read + aie.end } } } diff --git a/test/unit_tests/aie2/04_shared_memory/aie_row.mlir b/test/unit_tests/aie2/04_shared_memory/aie_row.mlir index 62650458b7..71e84712d2 100644 --- a/test/unit_tests/aie2/04_shared_memory/aie_row.mlir +++ b/test/unit_tests/aie2/04_shared_memory/aie_row.mlir @@ -17,26 +17,26 @@ // CHECK: PASS! module @test04_shared_memory { - AIE.device(xcve2802) { - %tile23 = AIE.tile(2, 3) - %tile33 = AIE.tile(3, 3) + aie.device(xcve2802) { + %tile23 = aie.tile(2, 3) + %tile33 = aie.tile(3, 3) - %buf13_0 = AIE.buffer(%tile23) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile23) { sym_name = "b" } : memref<256xi32> - %buf23_0 = AIE.buffer(%tile33) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile23) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile23) { sym_name = "b" } : memref<256xi32> + %buf23_0 = aie.buffer(%tile33) { sym_name = "c" } : memref<256xi32> - %lock13_2 = AIE.lock(%tile23, 2) { sym_name = "test_lock" } // test lock + %lock13_2 = aie.lock(%tile23, 2) { sym_name = "test_lock" } // test lock - %lock13_3 = AIE.lock(%tile23, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock - %lock13_4 = AIE.lock(%tile23, 4) { sym_name = "input_read_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile23, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock - %lock13_6 = AIE.lock(%tile23, 6) { sym_name = "hidden_read_lock" } // interbuffer lock - %lock23_7 = AIE.lock(%tile33, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock - %lock23_8 = AIE.lock(%tile33, 8) { sym_name = "output_read_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile23, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock + %lock13_4 = aie.lock(%tile23, 4) { sym_name = "input_read_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile23, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock + %lock13_6 = aie.lock(%tile23, 6) { sym_name = "hidden_read_lock" } // interbuffer lock + %lock23_7 = aie.lock(%tile33, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock + %lock23_8 = aie.lock(%tile33, 8) { sym_name = "output_read_lock" } // output buffer lock - %core13 = AIE.core(%tile23) { - AIE.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write + %core13 = aie.core(%tile23) { + aie.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -45,14 +45,14 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, Release, 1) // release input for write - AIE.use_lock(%lock13_6, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_3, Release, 1) // release input for write + aie.use_lock(%lock13_6, Release, 1) // release output for read + aie.end } - %core23 = AIE.core(%tile33) { - AIE.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock23_7, AcquireGreaterEqual, 1) // acquire output for write + %core23 = aie.core(%tile33) { + aie.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock23_7, AcquireGreaterEqual, 1) // acquire output for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf13_1[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -61,9 +61,9 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf23_0[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, Release, 1) // release input for write - AIE.use_lock(%lock23_8, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_5, Release, 1) // release input for write + aie.use_lock(%lock23_8, Release, 1) // release output for read + aie.end } } } diff --git a/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir b/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir index a329ad25f2..428d774e63 100644 --- a/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir +++ b/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir @@ -19,106 +19,106 @@ // CHECK: PASS! module @test_chess_05_shim_dma_core_function { - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<16xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<16xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<16xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<16xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<16xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<16xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<16xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<16xi32> - %lock_a_write = AIE.lock(%t73, 3) { init = 2 : i32 } - %lock_a_read = AIE.lock(%t73, 4) - %lock_b_write = AIE.lock(%t73, 5) { init = 2 : i32 } - %lock_b_read = AIE.lock(%t73, 6) - %lock_done = AIE.lock(%t73, 7) + %lock_a_write = aie.lock(%t73, 3) { init = 2 : i32 } + %lock_a_read = aie.lock(%t73, 4) + %lock_b_write = aie.lock(%t73, 5) { init = 2 : i32 } + %lock_b_read = aie.lock(%t73, 6) + %lock_done = aie.lock(%t73, 7) func.func private @func(%A: memref<16xi32>, %B: memref<16xi32>) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %lb = arith.constant 0 : index %ub = arith.constant 1 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read - AIE.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write + aie.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read + aie.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write func.call @func(%buf_a_ping, %buf_b_ping) : (memref<16xi32>, memref<16xi32>) -> () - AIE.use_lock(%lock_a_write, Release, 1) // release for write - AIE.use_lock(%lock_b_read, Release, 1) // release for read + aie.use_lock(%lock_a_write, Release, 1) // release for write + aie.use_lock(%lock_b_read, Release, 1) // release for read - AIE.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read - AIE.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write + aie.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read + aie.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write func.call @func(%buf_a_pong, %buf_b_pong) : (memref<16xi32>, memref<16xi32>) -> () - AIE.use_lock(%lock_a_write, Release, 1) // release for write - AIE.use_lock(%lock_b_read, Release, 1) // release for read + aie.use_lock(%lock_a_write, Release, 1) // release for write + aie.use_lock(%lock_b_read, Release, 1) // release for read } - AIE.end + aie.end } { link_with="kernel.o" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_ping : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_ping : memref<16xi32>, 0, 16) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_pong : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_pong : memref<16xi32>, 0, 16) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_b_ping : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_b_write, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_b_ping : memref<16xi32>, 0, 16) + aie.use_lock(%lock_b_write, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_b_pong : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_b_write, Release, 1) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_b_pong : memref<16xi32>, 0, 16) + aie.use_lock(%lock_b_write, Release, 1) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<32 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<32 x i32> - %lock1_write = AIE.lock(%t70, 1) {sym_name = "input_lock_write", init = 1 : i32 } - %lock1_read = AIE.lock(%t70, 2) {sym_name = "input_lock_read" } - %lock2_write = AIE.lock(%t70, 3) {sym_name = "output_lock_write", init = 1 : i32 } - %lock2_read = AIE.lock(%t70, 4) {sym_name = "output_lock_read" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<32 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<32 x i32> + %lock1_write = aie.lock(%t70, 1) {sym_name = "input_lock_write", init = 1 : i32 } + %lock1_read = aie.lock(%t70, 2) {sym_name = "input_lock_read" } + %lock2_write = aie.lock(%t70, 3) {sym_name = "output_lock_write", init = 1 : i32 } + %lock2_read = aie.lock(%t70, 4) {sym_name = "output_lock_read" } // Shim DMA connection to kernel - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buffer_in : memref<32 x i32>, 0, 32) - AIE.use_lock(%lock1_write, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock1_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buffer_in : memref<32 x i32>, 0, 32) + aie.use_lock(%lock1_write, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buffer_out : memref<32 x i32>, 0, 32) - AIE.use_lock(%lock2_read, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock2_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buffer_out : memref<32 x i32>, 0, 32) + aie.use_lock(%lock2_read, Release, 1) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir b/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir index be5ef7a13c..101546e931 100644 --- a/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir +++ b/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir @@ -14,25 +14,25 @@ // RUN: %run_on_board ./test.elf module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> - %lock_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_b_pong = AIE.lock(%t73, 6) // b_pong + %lock_a_ping = aie.lock(%t73, 3) // a_ping + %lock_a_pong = aie.lock(%t73, 4) // a_pong + %lock_b_ping = aie.lock(%t73, 5) // b_ping + %lock_b_pong = aie.lock(%t73, 6) // b_pong func.func private @func(%A: memref<64xi32>, %B: memref<64xi32>, %C: i32) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %buffer_size = arith.constant 64 : i32 %lb = arith.constant 0 : index @@ -46,86 +46,86 @@ module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write func.call @func(%buf_a_ping, %buf_b_ping,%buffer_size) : (memref<64xi32>, memref<64xi32>,i32) -> () - AIE.use_lock(%lock_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write func.call @func(%buf_a_pong, %buf_b_pong,%buffer_size) : (memref<64xi32>, memref<64xi32>,i32) -> () - AIE.use_lock(%lock_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } { link_with="kernel.o" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_pong, "Acquire", 0) + aie.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_ping, "Acquire", 1) + aie.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_pong, "Acquire", 1) + aie.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock" } // Shim DMA connection to kernel - AIE.flow(%t71, "South" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t71, "South" : 0) - %sw1 = AIE.switchbox(%t70) { - AIE.connect<"South" : 3, "North" : 0> - AIE.connect<"North" : 0, "South" : 2> + aie.flow(%t71, "South" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t71, "South" : 0) + %sw1 = aie.switchbox(%t70) { + aie.connect<"South" : 3, "North" : 0> + aie.connect<"North" : 0, "South" : 2> } - %mux1 = AIE.shim_mux (%t70) { - AIE.connect<"DMA" : 0, "North" : 3> - AIE.connect<"North" : 2, "DMA" : 0> + %mux1 = aie.shim_mux (%t70) { + aie.connect<"DMA" : 0, "North" : 3> + aie.connect<"North" : 2, "DMA" : 0> } // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock2, Release, 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, Acquire, 1) + aie.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) + aie.use_lock(%lock2, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/aie2/08_tile_locks/aie.mlir b/test/unit_tests/aie2/08_tile_locks/aie.mlir index 7422f2644f..42636ca265 100644 --- a/test/unit_tests/aie2/08_tile_locks/aie.mlir +++ b/test/unit_tests/aie2/08_tile_locks/aie.mlir @@ -42,51 +42,51 @@ module @test_chess_08_tile_locks { - AIE.device(xcve2802) { - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t74 = AIE.tile(7, 4) + aie.device(xcve2802) { + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t74 = aie.tile(7, 4) - %buf_e = AIE.buffer(%t73) { sym_name = "east" } : memref<256xi32> - %buf_n = AIE.buffer(%t73) { sym_name = "north" } : memref<256xi32> - %buf_s = AIE.buffer(%t73) { sym_name = "south" } : memref<256xi32> - %buf_l = AIE.buffer(%t73) { sym_name = "local" } : memref<256xi32> + %buf_e = aie.buffer(%t73) { sym_name = "east" } : memref<256xi32> + %buf_n = aie.buffer(%t73) { sym_name = "north" } : memref<256xi32> + %buf_s = aie.buffer(%t73) { sym_name = "south" } : memref<256xi32> + %buf_l = aie.buffer(%t73) { sym_name = "local" } : memref<256xi32> - %lock_s1 = AIE.lock(%t73, 0) { sym_name = "start_lock_1" } - %lock_d1 = AIE.lock(%t73, 1) { sym_name = "done_lock_1" } - %lock_s2 = AIE.lock(%t73, 2) { sym_name = "start_lock_2" } - %lock_d2 = AIE.lock(%t73, 3) { sym_name = "done_lock_2" } + %lock_s1 = aie.lock(%t73, 0) { sym_name = "start_lock_1" } + %lock_d1 = aie.lock(%t73, 1) { sym_name = "done_lock_1" } + %lock_s2 = aie.lock(%t73, 2) { sym_name = "start_lock_2" } + %lock_d2 = aie.lock(%t73, 3) { sym_name = "done_lock_2" } - AIE.flow(%t73, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 0, %t73, "DMA" : 0) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 0, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 4, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 4, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^end ^bd2: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 8, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 8, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 12, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 12, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/aie2/09_memtile_locks/aie.mlir b/test/unit_tests/aie2/09_memtile_locks/aie.mlir index 5b8ce51767..7b7afe27b8 100644 --- a/test/unit_tests/aie2/09_memtile_locks/aie.mlir +++ b/test/unit_tests/aie2/09_memtile_locks/aie.mlir @@ -37,58 +37,58 @@ // CHECK: PASS! module @test_chess_08_tile_locks { - AIE.device(xcve2802) { - %t61 = AIE.tile(6, 1) - %t71 = AIE.tile(7, 1) - %t81 = AIE.tile(8, 1) + aie.device(xcve2802) { + %t61 = aie.tile(6, 1) + %t71 = aie.tile(7, 1) + %t81 = aie.tile(8, 1) - %buf_w = AIE.buffer(%t61) { sym_name = "west" } : memref<256xi32> - %buf_l = AIE.buffer(%t71) { sym_name = "local" } : memref<256xi32> - %buf_e = AIE.buffer(%t81) { sym_name = "east" } : memref<256xi32> + %buf_w = aie.buffer(%t61) { sym_name = "west" } : memref<256xi32> + %buf_l = aie.buffer(%t71) { sym_name = "local" } : memref<256xi32> + %buf_e = aie.buffer(%t81) { sym_name = "east" } : memref<256xi32> - %lock_s1 = AIE.lock(%t71, 0) { sym_name = "start_lock_1" } - %lock_d1 = AIE.lock(%t71, 1) { sym_name = "done_lock_1" } - %lock_s2 = AIE.lock(%t71, 2) { sym_name = "start_lock_2" } - %lock_d2 = AIE.lock(%t71, 3) { sym_name = "done_lock_2" } + %lock_s1 = aie.lock(%t71, 0) { sym_name = "start_lock_1" } + %lock_d1 = aie.lock(%t71, 1) { sym_name = "done_lock_1" } + %lock_s2 = aie.lock(%t71, 2) { sym_name = "start_lock_2" } + %lock_d2 = aie.lock(%t71, 3) { sym_name = "done_lock_2" } - AIE.flow(%t71, "DMA" : 0, %t71, "DMA" : 0) - AIE.memtile_dma(%t81) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + aie.flow(%t71, "DMA" : 0, %t71, "DMA" : 0) + aie.memtile_dma(%t81) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock_d2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_e : memref<256xi32>, 0, 2) - AIE.use_lock(%lock_s2, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_d2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_e : memref<256xi32>, 0, 2) + aie.use_lock(%lock_s2, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Tile DMA - %m71 = AIE.memtile_dma(%t71) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m71 = aie.memtile_dma(%t71) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_w : memref<256xi32>, 0, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_w : memref<256xi32>, 0, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_w : memref<256xi32>, 4, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_w : memref<256xi32>, 4, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^end ^bd2: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_e : memref<256xi32>, 8, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_e : memref<256xi32>, 8, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_e : memref<256xi32>, 12, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_e : memref<256xi32>, 12, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests/00_itsalive/aie.mlir b/test/unit_tests/chess_compiler_tests/00_itsalive/aie.mlir index 91e4f5daa3..1b9476efff 100644 --- a/test/unit_tests/chess_compiler_tests/00_itsalive/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/00_itsalive/aie.mlir @@ -18,14 +18,14 @@ // RUN: %PYTHON aiecc.py --unified --xchesscc --no-xbridge %s module @test00_itsalive { - %tile12 = AIE.tile(1, 2) + %tile12 = aie.tile(1, 2) - %buf12_0 = AIE.buffer(%tile12) { sym_name = "a", address = 0 } : memref<256xi32> + %buf12_0 = aie.buffer(%tile12) { sym_name = "a", address = 0 } : memref<256xi32> - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %val1 = arith.constant 1 : i32 %idx1 = arith.constant 3 : index %2 = arith.addi %val1, %val1 : i32 - AIE.end + aie.end } } diff --git a/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir index aaec397cfe..67e9388a55 100644 --- a/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir @@ -18,23 +18,23 @@ // CHECK: PASS! module @test_chesss_01_precompiled_core_function { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "output_lock" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "output_lock" } func.func private @func(%A: memref<256xi32>, %B: memref<256xi32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write func.call @func(%buf13_0, %buf13_1) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } { link_with="kernel.o" } } diff --git a/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir index 688687ab04..92f8c7da59 100644 --- a/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir @@ -18,14 +18,14 @@ // CHECK: PASS! module @test_chess_02_deprecated_precompiled_kernel { - %tile13 = AIE.tile(1, 3) + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "output_lock" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "output_lock" } - %core13 = AIE.core(%tile13) { AIE.end } { elf_file = "custom_1_3.elf" } + %core13 = aie.core(%tile13) { aie.end } { elf_file = "custom_1_3.elf" } } diff --git a/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir b/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir index 4ee4277f22..b3e45c49e4 100644 --- a/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir @@ -18,33 +18,33 @@ // CHECK: PASS! module { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf23_0 = AIE.buffer(%tile23) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf23_0 = aie.buffer(%tile23) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock23_7 = AIE.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock23_7 = aie.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock func.func private @do_mul(%A: memref<256xi32>) -> () func.func private @do_mac(%A: memref<256xi32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) func.call @do_mul(%buf13_0) : (memref<256xi32>) -> () - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.end } { link_with="kernel.o" } - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { // %val1 = arith.constant 7 : i32 // %idx1 = arith.constant 0 : index // memref.store %val1, %buf14_0[%idx1] : memref<256xi32> - AIE.use_lock(%lock23_7, "Acquire", 0) // acquire for write + aie.use_lock(%lock23_7, "Acquire", 0) // acquire for write func.call @do_mac(%buf23_0) : (memref<256xi32>) -> () - AIE.use_lock(%lock23_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock23_7, "Release", 1) // release for read + aie.end } { link_with="kernel.o" } } diff --git a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir index 92c44ffc65..a52888b224 100644 --- a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir @@ -16,20 +16,20 @@ // CHECK: PASS! module @test04_shared_memory { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %buf14_0 = AIE.buffer(%tile14) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf14_0 = aie.buffer(%tile14) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "hidden_lock" } // interbuffer lock - %lock14_7 = AIE.lock(%tile14, 7) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "hidden_lock" } // interbuffer lock + %lock14_7 = aie.lock(%tile14, 7) { sym_name = "output_lock" } // output buffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -38,14 +38,14 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } - %core14 = AIE.core(%tile14) { - AIE.use_lock(%lock13_5, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock14_7, "Acquire", 0) // acquire for write + %core14 = aie.core(%tile14) { + aie.use_lock(%lock13_5, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock14_7, "Acquire", 0) // acquire for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf13_1[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -54,8 +54,8 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf14_0[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, "Release", 0) // release for write - AIE.use_lock(%lock14_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_5, "Release", 0) // release for write + aie.use_lock(%lock14_7, "Release", 1) // release for read + aie.end } } diff --git a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir index 92bf314b00..c8243fef25 100644 --- a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir +++ b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir @@ -18,20 +18,20 @@ // CHECK: PASS! module @test4_row_shared_memory { - %tile23 = AIE.tile(2, 3) - %tile33 = AIE.tile(3, 3) + %tile23 = aie.tile(2, 3) + %tile33 = aie.tile(3, 3) - %buf13_0 = AIE.buffer(%tile23) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile23) { sym_name = "b" } : memref<256xi32> - %buf33_0 = AIE.buffer(%tile33) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile23) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile23) { sym_name = "b" } : memref<256xi32> + %buf33_0 = aie.buffer(%tile33) { sym_name = "c" } : memref<256xi32> - %lock23_3 = AIE.lock(%tile23, 3) { sym_name = "input_lock" } // input buffer lock - %lock23_5 = AIE.lock(%tile23, 5) { sym_name = "inter_lock" } // interbuffer lock - %lock33_7 = AIE.lock(%tile33, 7) { sym_name = "output_lock" } // output buffer lock + %lock23_3 = aie.lock(%tile23, 3) { sym_name = "input_lock" } // input buffer lock + %lock23_5 = aie.lock(%tile23, 5) { sym_name = "inter_lock" } // interbuffer lock + %lock33_7 = aie.lock(%tile33, 7) { sym_name = "output_lock" } // output buffer lock - %core13 = AIE.core(%tile23) { - AIE.use_lock(%lock23_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock23_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile23) { + aie.use_lock(%lock23_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock23_5, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -40,15 +40,15 @@ module @test4_row_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock23_3, "Release", 0) // release for write - AIE.use_lock(%lock23_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock23_3, "Release", 0) // release for write + aie.use_lock(%lock23_5, "Release", 1) // release for read + aie.end } - %core33 = AIE.core(%tile33) { - AIE.use_lock(%lock23_5, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock33_7, "Acquire", 0) // acquire for write + %core33 = aie.core(%tile33) { + aie.use_lock(%lock23_5, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock33_7, "Acquire", 0) // acquire for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_1[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -57,9 +57,9 @@ module @test4_row_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf33_0[%idx2] : memref<256xi32> - AIE.use_lock(%lock23_5, "Release", 0) // release for write - AIE.use_lock(%lock33_7, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock23_5, "Release", 0) // release for write + aie.use_lock(%lock33_7, "Release", 1) // release for read + aie.end } } diff --git a/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir index e858a3ca13..eafff791d7 100644 --- a/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir @@ -18,79 +18,79 @@ // CHECK: PASS! module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<256xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<256xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<256xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<256xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<256xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<256xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<256xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<256xi32> - %lock_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_b_pong = AIE.lock(%t73, 6) // b_pong + %lock_a_ping = aie.lock(%t73, 3) // a_ping + %lock_a_pong = aie.lock(%t73, 4) // a_pong + %lock_b_ping = aie.lock(%t73, 5) // b_ping + %lock_b_pong = aie.lock(%t73, 6) // b_pong - %c13 = AIE.core(%t73) { AIE.end } { elf_file = "custom_7_3.elf" } + %c13 = aie.core(%t73) { aie.end } { elf_file = "custom_7_3.elf" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_a_pong : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_pong, "Acquire", 0) + aie.dma_bd(%buf_a_pong : memref<256xi32>, 0, 256) + aie.use_lock(%lock_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_b_ping : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_ping, "Acquire", 1) + aie.dma_bd(%buf_b_ping : memref<256xi32>, 0, 256) + aie.use_lock(%lock_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_b_pong : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_pong, "Acquire", 1) + aie.dma_bd(%buf_b_pong : memref<256xi32>, 0, 256) + aie.use_lock(%lock_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock" } // Shim DMA connection to kernel - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock2, Release, 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, Acquire, 1) + aie.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) + aie.use_lock(%lock2, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } diff --git a/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir index 09889c5d11..08d6a5c37a 100644 --- a/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir @@ -18,24 +18,24 @@ // CHECK: PASS! module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<256xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<256xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<256xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<256xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<256xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<256xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<256xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<256xi32> - %lock_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_b_pong = AIE.lock(%t73, 6) // b_pong + %lock_a_ping = aie.lock(%t73, 3) // a_ping + %lock_a_pong = aie.lock(%t73, 4) // a_pong + %lock_b_ping = aie.lock(%t73, 5) // b_ping + %lock_b_pong = aie.lock(%t73, 6) // b_pong func.func private @func(%A: memref<256xi32>, %B: memref<256xi32>) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %lb = arith.constant 0 : index %ub = arith.constant 1 : index @@ -43,79 +43,79 @@ module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write func.call @func(%buf_a_ping, %buf_b_ping) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write func.call @func(%buf_a_pong, %buf_b_pong) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } { link_with="kernel.o" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf_a_ping : memref<256xi32>, 0, 256) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_a_pong : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_pong, "Acquire", 0) + aie.dma_bd(%buf_a_pong : memref<256xi32>, 0, 256) + aie.use_lock(%lock_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_b_ping : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_ping, "Acquire", 1) + aie.dma_bd(%buf_b_ping : memref<256xi32>, 0, 256) + aie.use_lock(%lock_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_b_pong : memref<256xi32>, 0, 256) - AIE.use_lock(%lock_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_pong, "Acquire", 1) + aie.dma_bd(%buf_b_pong : memref<256xi32>, 0, 256) + aie.use_lock(%lock_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock" } // Shim DMA connection to kernel - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock2, Release, 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, Acquire, 1) + aie.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) + aie.use_lock(%lock2, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } diff --git a/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir b/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir index 599929491d..761e96fe80 100644 --- a/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir @@ -19,24 +19,24 @@ // CHECK: PASS! module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> - %lock_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_b_pong = AIE.lock(%t73, 6) // b_pong + %lock_a_ping = aie.lock(%t73, 3) // a_ping + %lock_a_pong = aie.lock(%t73, 4) // a_pong + %lock_b_ping = aie.lock(%t73, 5) // b_ping + %lock_b_pong = aie.lock(%t73, 6) // b_pong func.func private @func(%A: memref<64xi32>, %B: memref<64xi32>, %C: i32) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %buffer_size = arith.constant 64 : i32 %lb = arith.constant 0 : index @@ -50,78 +50,78 @@ module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write func.call @func(%buf_a_ping, %buf_b_ping,%buffer_size) : (memref<64xi32>, memref<64xi32>,i32) -> () - AIE.use_lock(%lock_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write func.call @func(%buf_a_pong, %buf_b_pong,%buffer_size) : (memref<64xi32>, memref<64xi32>,i32) -> () - AIE.use_lock(%lock_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } { link_with="kernel.o" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_pong, "Acquire", 0) + aie.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_ping, "Acquire", 1) + aie.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_pong, "Acquire", 1) + aie.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock" } // Shim DMA connection to kernel - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock2, Release, 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, Acquire, 1) + aie.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) + aie.use_lock(%lock2, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } diff --git a/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir b/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir index 7eab0ab6b4..22463d9070 100644 --- a/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir @@ -38,49 +38,49 @@ // CHECK: PASS! module @test_chess_08_tile_locks { - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t74 = AIE.tile(7, 4) + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t74 = aie.tile(7, 4) - %buf_e = AIE.buffer(%t73) { sym_name = "east" } : memref<256xi32> - %buf_n = AIE.buffer(%t73) { sym_name = "north" } : memref<256xi32> - %buf_s = AIE.buffer(%t73) { sym_name = "south" } : memref<256xi32> - %buf_l = AIE.buffer(%t73) { sym_name = "local" } : memref<256xi32> + %buf_e = aie.buffer(%t73) { sym_name = "east" } : memref<256xi32> + %buf_n = aie.buffer(%t73) { sym_name = "north" } : memref<256xi32> + %buf_s = aie.buffer(%t73) { sym_name = "south" } : memref<256xi32> + %buf_l = aie.buffer(%t73) { sym_name = "local" } : memref<256xi32> - %lock_e = AIE.lock(%t73, 0) { sym_name = "lock_1" } - %lock_l = AIE.lock(%t73, 1) { sym_name = "lock_2" } - %lock_n = AIE.lock(%t73, 2) { sym_name = "lock_3" } - %lock_s = AIE.lock(%t73, 3) { sym_name = "lock_4" } + %lock_e = aie.lock(%t73, 0) { sym_name = "lock_1" } + %lock_l = aie.lock(%t73, 1) { sym_name = "lock_2" } + %lock_n = aie.lock(%t73, 2) { sym_name = "lock_3" } + %lock_s = aie.lock(%t73, 3) { sym_name = "lock_4" } - AIE.flow(%t73, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 0, %t73, "DMA" : 0) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_e, Acquire, 0) - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 2) - AIE.use_lock(%lock_e, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_e, Acquire, 0) + aie.dma_bd(%buf_l : memref<256xi32>, 0, 2) + aie.use_lock(%lock_e, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_l, Acquire, 0) - AIE.dma_bd(%buf_l : memref<256xi32>, 4, 2) - AIE.use_lock(%lock_l, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_l, Acquire, 0) + aie.dma_bd(%buf_l : memref<256xi32>, 4, 2) + aie.use_lock(%lock_l, Release, 1) + aie.next_bd ^end ^bd2: - AIE.use_lock(%lock_n, Acquire, 0) - AIE.dma_bd(%buf_l : memref<256xi32>, 8, 2) - AIE.use_lock(%lock_n, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_n, Acquire, 0) + aie.dma_bd(%buf_l : memref<256xi32>, 8, 2) + aie.use_lock(%lock_n, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_s, Acquire, 0) - AIE.dma_bd(%buf_l : memref<256xi32>, 12, 2) - AIE.use_lock(%lock_s, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s, Acquire, 0) + aie.dma_bd(%buf_l : memref<256xi32>, 12, 2) + aie.use_lock(%lock_s, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/00_itsalive/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/00_itsalive/aie.mlir index fc5cac796b..c99ed0e815 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/00_itsalive/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/00_itsalive/aie.mlir @@ -18,16 +18,16 @@ // UN: aiecc.py --unified --xchesscc --no-xbridge %s module @test00_itsalive { - AIE.device(xcve2802) { - %tile12 = AIE.tile(1, 3) + aie.device(xcve2802) { + %tile12 = aie.tile(1, 3) - %buf12_0 = AIE.buffer(%tile12) { sym_name = "a" } : memref<256xi32> + %buf12_0 = aie.buffer(%tile12) { sym_name = "a" } : memref<256xi32> - %core12 = AIE.core(%tile12) { + %core12 = aie.core(%tile12) { %val1 = arith.constant 1 : i32 %idx1 = arith.constant 3 : index %2 = arith.addi %val1, %val1 : i32 - AIE.end + aie.end } } } \ No newline at end of file diff --git a/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir index e0a4ed4fac..dcd09e99b4 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir @@ -19,24 +19,24 @@ // CHECK: PASS! module @test_chesss_01_precompiled_core_function { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "output_lock" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "output_lock" } func.func private @func(%A: memref<256xi32>, %B: memref<256xi32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) - AIE.use_lock(%lock13_5, "Acquire", 0) // acquire for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, "Acquire", 1) // acquire for read(e.g. input ping) + aie.use_lock(%lock13_5, "Acquire", 0) // acquire for write func.call @func(%buf13_0, %buf13_1) : (memref<256xi32>, memref<256xi32>) -> () - AIE.use_lock(%lock13_3, "Release", 0) // release for write - AIE.use_lock(%lock13_5, "Release", 1) // release for read - AIE.end + aie.use_lock(%lock13_3, "Release", 0) // release for write + aie.use_lock(%lock13_5, "Release", 1) // release for read + aie.end } { link_with="kernel.o" } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir index 3c8bd4c064..48e74bbcd7 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir @@ -19,15 +19,15 @@ // CHECK: PASS! module @test_chess_02_deprecated_precompiled_kernel { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "output_lock" } + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "output_lock" } - %core13 = AIE.core(%tile13) { AIE.end } { elf_file = "custom_1_3.elf" } + %core13 = aie.core(%tile13) { aie.end } { elf_file = "custom_1_3.elf" } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir index e512de1a09..1110f2dd08 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir @@ -19,32 +19,32 @@ // CHECK: PASS! module { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf23_0 = AIE.buffer(%tile23) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf23_0 = aie.buffer(%tile23) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock23_7 = AIE.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock23_7 = aie.lock(%tile23, 7) { sym_name = "output_lock" } // output buffer lock func.func private @do_mul(%A: memref<256xi32>) -> () func.func private @do_mac(%A: memref<256xi32>) -> () - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, AcquireGreaterEqual, 1) // acquire for read(e.g. input ping) + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, AcquireGreaterEqual, 1) // acquire for read(e.g. input ping) func.call @do_mul(%buf13_0) : (memref<256xi32>) -> () - AIE.end + aie.end } { link_with="kernel.o" } - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { // %val1 = arith.constant 7 : i32 // %idx1 = arith.constant 0 : index // memref.store %val1, %buf14_0[%idx1] : memref<256xi32> func.call @do_mac(%buf23_0) : (memref<256xi32>) -> () - AIE.use_lock(%lock23_7, Release, 1) // release for read - AIE.end + aie.use_lock(%lock23_7, Release, 1) // release for read + aie.end } { link_with="kernel.o" } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir index c6d2615337..c6cfd8b2cb 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir @@ -17,19 +17,19 @@ // CHECK: PASS! module @test04_shared_memory { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %buf14_0 = AIE.buffer(%tile14) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf14_0 = aie.buffer(%tile14) { sym_name = "c" } : memref<256xi32> - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "output_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "output_lock" } // output buffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_3, AcquireGreaterEqual, 1) + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_3, AcquireGreaterEqual, 1) %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -38,8 +38,8 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, Release, 1) - AIE.end + aie.use_lock(%lock13_5, Release, 1) + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir index 9ebfd30ced..d4f1f55e9a 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir @@ -23,26 +23,26 @@ // XFAIL: * module @test04_shared_memory { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) - %tile14 = AIE.tile(1, 4) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) + %tile14 = aie.tile(1, 4) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %buf14_0 = AIE.buffer(%tile14) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf14_0 = aie.buffer(%tile14) { sym_name = "c" } : memref<256xi32> - %lock13_2 = AIE.lock(%tile13, 2) { sym_name = "test_lock" } // test lock + %lock13_2 = aie.lock(%tile13, 2) { sym_name = "test_lock" } // test lock - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock - %lock13_4 = AIE.lock(%tile13, 4) { sym_name = "input_read_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock - %lock13_6 = AIE.lock(%tile13, 6) { sym_name = "hidden_read_lock" } // interbuffer lock - %lock14_7 = AIE.lock(%tile14, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock - %lock14_8 = AIE.lock(%tile14, 8) { sym_name = "output_read_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock + %lock13_4 = aie.lock(%tile13, 4) { sym_name = "input_read_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock + %lock13_6 = aie.lock(%tile13, 6) { sym_name = "hidden_read_lock" } // interbuffer lock + %lock14_7 = aie.lock(%tile14, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock + %lock14_8 = aie.lock(%tile14, 8) { sym_name = "output_read_lock" } // output buffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -51,14 +51,14 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, Release, 1) // release input for write - AIE.use_lock(%lock13_6, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_3, Release, 1) // release input for write + aie.use_lock(%lock13_6, Release, 1) // release output for read + aie.end } - %core14 = AIE.core(%tile14) { - AIE.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock14_7, AcquireGreaterEqual, 1) // acquire output for write + %core14 = aie.core(%tile14) { + aie.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock14_7, AcquireGreaterEqual, 1) // acquire output for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf13_1[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -67,9 +67,9 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf14_0[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, Release, 1) // release input for write - AIE.use_lock(%lock14_8, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_5, Release, 1) // release input for write + aie.use_lock(%lock14_8, Release, 1) // release output for read + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir index 340e049531..cb8cf2881e 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir @@ -20,26 +20,26 @@ // XFAIL: * module @test04_shared_memory { - AIE.device(xcve2802) { - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) + aie.device(xcve2802) { + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) - %buf13_0 = AIE.buffer(%tile13) { sym_name = "a" } : memref<256xi32> - %buf13_1 = AIE.buffer(%tile13) { sym_name = "b" } : memref<256xi32> - %buf23_0 = AIE.buffer(%tile23) { sym_name = "c" } : memref<256xi32> + %buf13_0 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> + %buf13_1 = aie.buffer(%tile13) { sym_name = "b" } : memref<256xi32> + %buf23_0 = aie.buffer(%tile23) { sym_name = "c" } : memref<256xi32> - %lock13_2 = AIE.lock(%tile13, 2) { sym_name = "test_lock" } // test lock + %lock13_2 = aie.lock(%tile13, 2) { sym_name = "test_lock" } // test lock - %lock13_3 = AIE.lock(%tile13, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock - %lock13_4 = AIE.lock(%tile13, 4) { sym_name = "input_read_lock" } // input buffer lock - %lock13_5 = AIE.lock(%tile13, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock - %lock13_6 = AIE.lock(%tile13, 6) { sym_name = "hidden_read_lock" } // interbuffer lock - %lock23_7 = AIE.lock(%tile23, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock - %lock23_8 = AIE.lock(%tile23, 8) { sym_name = "output_read_lock" } // output buffer lock + %lock13_3 = aie.lock(%tile13, 3) { sym_name = "input_write_lock", init = 1 : i32 } // input buffer lock + %lock13_4 = aie.lock(%tile13, 4) { sym_name = "input_read_lock" } // input buffer lock + %lock13_5 = aie.lock(%tile13, 5) { sym_name = "hidden_write_lock", init = 1 : i32 } // interbuffer lock + %lock13_6 = aie.lock(%tile13, 6) { sym_name = "hidden_read_lock" } // interbuffer lock + %lock23_7 = aie.lock(%tile23, 7) { sym_name = "output_write_lock", init = 1 : i32 } // output buffer lock + %lock23_8 = aie.lock(%tile23, 8) { sym_name = "output_read_lock" } // output buffer lock - %core13 = AIE.core(%tile13) { - AIE.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write + %core13 = aie.core(%tile13) { + aie.use_lock(%lock13_4, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock13_5, AcquireGreaterEqual, 1) // acquire input for write %idx1 = arith.constant 3 : index %val1 = memref.load %buf13_0[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -48,14 +48,14 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf13_1[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_3, Release, 1) // release input for write - AIE.use_lock(%lock13_6, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_3, Release, 1) // release input for write + aie.use_lock(%lock13_6, Release, 1) // release output for read + aie.end } - %core23 = AIE.core(%tile23) { - AIE.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) - AIE.use_lock(%lock23_7, AcquireGreaterEqual, 1) // acquire output for write + %core23 = aie.core(%tile23) { + aie.use_lock(%lock13_6, AcquireGreaterEqual, 1) // acquire input for read(e.g. input ping) + aie.use_lock(%lock23_7, AcquireGreaterEqual, 1) // acquire output for write %idx1 = arith.constant 5 : index %val1 = memref.load %buf13_1[%idx1] : memref<256xi32> %2 = arith.addi %val1, %val1 : i32 @@ -64,9 +64,9 @@ module @test04_shared_memory { %5 = arith.addi %4, %val1 : i32 %idx2 = arith.constant 5 : index memref.store %5, %buf23_0[%idx2] : memref<256xi32> - AIE.use_lock(%lock13_5, Release, 1) // release input for write - AIE.use_lock(%lock23_8, Release, 1) // release output for read - AIE.end + aie.use_lock(%lock13_5, Release, 1) // release input for write + aie.use_lock(%lock23_8, Release, 1) // release output for read + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir index 794cc09c91..90abf7d33a 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir @@ -22,83 +22,83 @@ // CHECK: PASS! module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<16xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<16xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<16xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<16xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<16xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<16xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<16xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<16xi32> - %lock_a_write = AIE.lock(%t73, 3) { init = 2 : i32 } - %lock_a_read = AIE.lock(%t73, 4) - %lock_b_write = AIE.lock(%t73, 5) { init = 2 : i32 } - %lock_b_read = AIE.lock(%t73, 6) - %lock_done = AIE.lock(%t73, 7) + %lock_a_write = aie.lock(%t73, 3) { init = 2 : i32 } + %lock_a_read = aie.lock(%t73, 4) + %lock_b_write = aie.lock(%t73, 5) { init = 2 : i32 } + %lock_b_read = aie.lock(%t73, 6) + %lock_done = aie.lock(%t73, 7) - %c13 = AIE.core(%t73) { AIE.end } { elf_file = "custom_7_3.elf" } + %c13 = aie.core(%t73) { aie.end } { elf_file = "custom_7_3.elf" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_ping : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_ping : memref<16xi32>, 0, 16) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_pong : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_pong : memref<16xi32>, 0, 16) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_b_ping : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_b_write, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_b_ping : memref<16xi32>, 0, 16) + aie.use_lock(%lock_b_write, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_b_pong : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_b_write, Release, 1) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_b_pong : memref<16xi32>, 0, 16) + aie.use_lock(%lock_b_write, Release, 1) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<32 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<32 x i32> - %lock1_write = AIE.lock(%t70, 1) {sym_name = "input_lock_write", init = 1 : i32 } - %lock1_read = AIE.lock(%t70, 2) {sym_name = "input_lock_read" } - %lock2_write = AIE.lock(%t70, 3) {sym_name = "output_lock_write", init = 1 : i32 } - %lock2_read = AIE.lock(%t70, 4) {sym_name = "output_lock_read" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<32 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<32 x i32> + %lock1_write = aie.lock(%t70, 1) {sym_name = "input_lock_write", init = 1 : i32 } + %lock1_read = aie.lock(%t70, 2) {sym_name = "input_lock_read" } + %lock2_write = aie.lock(%t70, 3) {sym_name = "output_lock_write", init = 1 : i32 } + %lock2_read = aie.lock(%t70, 4) {sym_name = "output_lock_read" } // Shim DMA connection to kernel - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buffer_in : memref<32 x i32>, 0, 32) - AIE.use_lock(%lock1_write, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock1_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buffer_in : memref<32 x i32>, 0, 32) + aie.use_lock(%lock1_write, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buffer_out : memref<32 x i32>, 0, 32) - AIE.use_lock(%lock2_read, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock2_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buffer_out : memref<32 x i32>, 0, 32) + aie.use_lock(%lock2_read, Release, 1) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir index b866091362..fe1a25a3af 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir @@ -22,106 +22,106 @@ // CHECK: PASS! module @test_chess_05_shim_dma_core_function { - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) - - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<16xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<16xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<16xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<16xi32> - - %lock_a_write = AIE.lock(%t73, 3) { init = 2 : i32 } - %lock_a_read = AIE.lock(%t73, 4) - %lock_b_write = AIE.lock(%t73, 5) { init = 2 : i32 } - %lock_b_read = AIE.lock(%t73, 6) - %lock_done = AIE.lock(%t73, 7) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) + + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<16xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<16xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<16xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<16xi32> + + %lock_a_write = aie.lock(%t73, 3) { init = 2 : i32 } + %lock_a_read = aie.lock(%t73, 4) + %lock_b_write = aie.lock(%t73, 5) { init = 2 : i32 } + %lock_b_read = aie.lock(%t73, 6) + %lock_done = aie.lock(%t73, 7) func.func private @func(%A: memref<16xi32>, %B: memref<16xi32>) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %lb = arith.constant 0 : index %ub = arith.constant 1 : index %step = arith.constant 1 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read - AIE.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write + aie.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read + aie.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write func.call @func(%buf_a_ping, %buf_b_ping) : (memref<16xi32>, memref<16xi32>) -> () - AIE.use_lock(%lock_a_write, Release, 1) // release for write - AIE.use_lock(%lock_b_read, Release, 1) // release for read + aie.use_lock(%lock_a_write, Release, 1) // release for write + aie.use_lock(%lock_b_read, Release, 1) // release for read - AIE.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read - AIE.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write + aie.use_lock(%lock_a_read, AcquireGreaterEqual, 1) // acquire for read + aie.use_lock(%lock_b_write, AcquireGreaterEqual, 1) // acquire for write func.call @func(%buf_a_pong, %buf_b_pong) : (memref<16xi32>, memref<16xi32>) -> () - AIE.use_lock(%lock_a_write, Release, 1) // release for write - AIE.use_lock(%lock_b_read, Release, 1) // release for read + aie.use_lock(%lock_a_write, Release, 1) // release for write + aie.use_lock(%lock_b_read, Release, 1) // release for read } - AIE.end + aie.end } { link_with="kernel.o" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_ping : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_ping : memref<16xi32>, 0, 16) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_a_pong : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_a_read, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_a_pong : memref<16xi32>, 0, 16) + aie.use_lock(%lock_a_read, Release, 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_b_ping : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_b_write, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_b_ping : memref<16xi32>, 0, 16) + aie.use_lock(%lock_b_write, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_b_pong : memref<16xi32>, 0, 16) - AIE.use_lock(%lock_b_write, Release, 1) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_b_pong : memref<16xi32>, 0, 16) + aie.use_lock(%lock_b_write, Release, 1) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<32 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<32 x i32> - %lock1_write = AIE.lock(%t70, 1) {sym_name = "input_lock_write", init = 1 : i32 } - %lock1_read = AIE.lock(%t70, 2) {sym_name = "input_lock_read" } - %lock2_write = AIE.lock(%t70, 3) {sym_name = "output_lock_write", init = 1 : i32 } - %lock2_read = AIE.lock(%t70, 4) {sym_name = "output_lock_read" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<32 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<32 x i32> + %lock1_write = aie.lock(%t70, 1) {sym_name = "input_lock_write", init = 1 : i32 } + %lock1_read = aie.lock(%t70, 2) {sym_name = "input_lock_read" } + %lock2_write = aie.lock(%t70, 3) {sym_name = "output_lock_write", init = 1 : i32 } + %lock2_read = aie.lock(%t70, 4) {sym_name = "output_lock_read" } // Shim DMA connection to kernel - AIE.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) + aie.flow(%t70, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t70, "DMA" : 0) // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1_read, AcquireGreaterEqual, 1) - AIE.dma_bd(%buffer_in : memref<32 x i32>, 0, 32) - AIE.use_lock(%lock1_write, Release, 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock1_read, AcquireGreaterEqual, 1) + aie.dma_bd(%buffer_in : memref<32 x i32>, 0, 32) + aie.use_lock(%lock1_write, Release, 1) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2_write, AcquireGreaterEqual, 1) - AIE.dma_bd(%buffer_out : memref<32 x i32>, 0, 32) - AIE.use_lock(%lock2_read, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock2_write, AcquireGreaterEqual, 1) + aie.dma_bd(%buffer_out : memref<32 x i32>, 0, 32) + aie.use_lock(%lock2_read, Release, 1) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir index 198c969150..053a508881 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir @@ -17,25 +17,25 @@ // XFAIL: * module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ - AIE.device(xcve2802) { - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t71 = AIE.tile(7, 1) - %t70 = AIE.tile(7, 0) + aie.device(xcve2802) { + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t71 = aie.tile(7, 1) + %t70 = aie.tile(7, 0) - %buf_a_ping = AIE.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> - %buf_a_pong = AIE.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> - %buf_b_ping = AIE.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> - %buf_b_pong = AIE.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> + %buf_a_ping = aie.buffer(%t73) {sym_name = "a_ping" } : memref<64xi32> + %buf_a_pong = aie.buffer(%t73) {sym_name = "a_pong" } : memref<64xi32> + %buf_b_ping = aie.buffer(%t73) {sym_name = "b_ping" } : memref<64xi32> + %buf_b_pong = aie.buffer(%t73) {sym_name = "b_pong" } : memref<64xi32> - %lock_a_ping = AIE.lock(%t73, 3) // a_ping - %lock_a_pong = AIE.lock(%t73, 4) // a_pong - %lock_b_ping = AIE.lock(%t73, 5) // b_ping - %lock_b_pong = AIE.lock(%t73, 6) // b_pong + %lock_a_ping = aie.lock(%t73, 3) // a_ping + %lock_a_pong = aie.lock(%t73, 4) // a_pong + %lock_b_ping = aie.lock(%t73, 5) // b_ping + %lock_b_pong = aie.lock(%t73, 6) // b_pong func.func private @func(%A: memref<64xi32>, %B: memref<64xi32>, %C: i32) -> () - %c13 = AIE.core(%t73) { + %c13 = aie.core(%t73) { %buffer_size = arith.constant 64 : i32 %lb = arith.constant 0 : index @@ -49,86 +49,86 @@ module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ %c64 = arith.constant 64 : index scf.for %iv = %lb to %ub step %step { - AIE.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_ping, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_ping, "Acquire", 0) // acquire for write func.call @func(%buf_a_ping, %buf_b_ping,%buffer_size) : (memref<64xi32>, memref<64xi32>,i32) -> () - AIE.use_lock(%lock_a_ping, "Release", 0) // release for write - AIE.use_lock(%lock_b_ping, "Release", 1) // release for read + aie.use_lock(%lock_a_ping, "Release", 0) // release for write + aie.use_lock(%lock_b_ping, "Release", 1) // release for read - AIE.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read - AIE.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write + aie.use_lock(%lock_a_pong, "Acquire", 1) // acquire for read + aie.use_lock(%lock_b_pong, "Acquire", 0) // acquire for write func.call @func(%buf_a_pong, %buf_b_pong,%buffer_size) : (memref<64xi32>, memref<64xi32>,i32) -> () - AIE.use_lock(%lock_a_pong, "Release", 0) // release for write - AIE.use_lock(%lock_b_pong, "Release", 1) // release for read + aie.use_lock(%lock_a_pong, "Release", 0) // release for write + aie.use_lock(%lock_b_pong, "Release", 1) // release for read } - AIE.end + aie.end } { link_with="kernel.o" } // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("S2MM", 0, ^bd0, ^dma0) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("S2MM", 0, ^bd0, ^dma0) ^dma0: - %dstDma = AIE.dma_start("MM2S", 1, ^bd2, ^end) + %dstDma = aie.dma_start("MM2S", 1, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_a_ping, "Acquire", 0) - AIE.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_ping, "Release", 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_a_ping, "Acquire", 0) + aie.dma_bd(%buf_a_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_ping, "Release", 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_a_pong, "Acquire", 0) - AIE.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_a_pong, "Release", 1) - AIE.next_bd ^bd0 + aie.use_lock(%lock_a_pong, "Acquire", 0) + aie.dma_bd(%buf_a_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_a_pong, "Release", 1) + aie.next_bd ^bd0 ^bd2: - AIE.use_lock(%lock_b_ping, "Acquire", 1) - AIE.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_ping, "Release", 0) - AIE.next_bd ^bd3 + aie.use_lock(%lock_b_ping, "Acquire", 1) + aie.dma_bd(%buf_b_ping : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_ping, "Release", 0) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_b_pong, "Acquire", 1) - AIE.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) - AIE.use_lock(%lock_b_pong, "Release", 0) - AIE.next_bd ^bd2 + aie.use_lock(%lock_b_pong, "Acquire", 1) + aie.dma_bd(%buf_b_pong : memref<64xi32>, 0, 64) + aie.use_lock(%lock_b_pong, "Release", 0) + aie.next_bd ^bd2 ^end: - AIE.end + aie.end } // DDR buffer - %buffer_in = AIE.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> - %buffer_out = AIE.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> - %lock1 = AIE.lock(%t70, 1) {sym_name = "input_lock" } - %lock2 = AIE.lock(%t70, 2) {sym_name = "output_lock" } + %buffer_in = aie.external_buffer {sym_name = "input_buffer" } : memref<512 x i32> + %buffer_out = aie.external_buffer {sym_name = "output_buffer" } : memref<512 x i32> + %lock1 = aie.lock(%t70, 1) {sym_name = "input_lock" } + %lock2 = aie.lock(%t70, 2) {sym_name = "output_lock" } // Shim DMA connection to kernel - AIE.flow(%t71, "South" : 3, %t73, "DMA" : 0) - AIE.flow(%t73, "DMA" : 1, %t71, "South" : 2) - %sw1 = AIE.switchbox(%t70) { - AIE.connect<"South" : 3, "North" : 3> - AIE.connect<"North" : 2, "South" : 2> + aie.flow(%t71, "South" : 3, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 1, %t71, "South" : 2) + %sw1 = aie.switchbox(%t70) { + aie.connect<"South" : 3, "North" : 3> + aie.connect<"North" : 2, "South" : 2> } - %mux1 = AIE.shim_mux (%t70) { - AIE.connect<"DMA" : 0, "North" : 3> - AIE.connect<"North" : 2, "DMA" : 0> + %mux1 = aie.shim_mux (%t70) { + aie.connect<"DMA" : 0, "North" : 3> + aie.connect<"North" : 2, "DMA" : 0> } // Shim DMA loads large buffer to local memory - %dma = AIE.shim_dma(%t70) { - AIE.dma_start(MM2S, 0, ^bd0, ^dma) + %dma = aie.shim_dma(%t70) { + aie.dma_start(MM2S, 0, ^bd0, ^dma) ^dma: - AIE.dma_start(S2MM, 0, ^bd1, ^end) + aie.dma_start(S2MM, 0, ^bd1, ^end) ^bd0: - AIE.use_lock(%lock1, Acquire, 1) - AIE.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock1, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock1, Acquire, 1) + aie.dma_bd(%buffer_in : memref<512 x i32>, 0, 512) + aie.use_lock(%lock1, Release, 0) + aie.next_bd ^bd0 ^bd1: - AIE.use_lock(%lock2, Acquire, 1) - AIE.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) - AIE.use_lock(%lock2, Release, 0) - AIE.next_bd ^bd1 + aie.use_lock(%lock2, Acquire, 1) + aie.dma_bd(%buffer_out : memref<512 x i32>, 0, 512) + aie.use_lock(%lock2, Release, 0) + aie.next_bd ^bd1 ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir index c9d097c1af..24ce79bbaf 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir @@ -44,51 +44,51 @@ module @test_chess_08_tile_locks { - AIE.device(xcve2802) { - %t63 = AIE.tile(6, 3) - %t73 = AIE.tile(7, 3) - %t72 = AIE.tile(7, 2) - %t74 = AIE.tile(7, 4) + aie.device(xcve2802) { + %t63 = aie.tile(6, 3) + %t73 = aie.tile(7, 3) + %t72 = aie.tile(7, 2) + %t74 = aie.tile(7, 4) - %buf_e = AIE.buffer(%t73) { sym_name = "east" } : memref<256xi32> - %buf_n = AIE.buffer(%t73) { sym_name = "north" } : memref<256xi32> - %buf_s = AIE.buffer(%t73) { sym_name = "south" } : memref<256xi32> - %buf_l = AIE.buffer(%t73) { sym_name = "local" } : memref<256xi32> + %buf_e = aie.buffer(%t73) { sym_name = "east" } : memref<256xi32> + %buf_n = aie.buffer(%t73) { sym_name = "north" } : memref<256xi32> + %buf_s = aie.buffer(%t73) { sym_name = "south" } : memref<256xi32> + %buf_l = aie.buffer(%t73) { sym_name = "local" } : memref<256xi32> - %lock_s1 = AIE.lock(%t73, 0) { sym_name = "start_lock_1" } - %lock_d1 = AIE.lock(%t73, 1) { sym_name = "done_lock_1" } - %lock_s2 = AIE.lock(%t73, 2) { sym_name = "start_lock_2" } - %lock_d2 = AIE.lock(%t73, 3) { sym_name = "done_lock_2" } + %lock_s1 = aie.lock(%t73, 0) { sym_name = "start_lock_1" } + %lock_d1 = aie.lock(%t73, 1) { sym_name = "done_lock_1" } + %lock_s2 = aie.lock(%t73, 2) { sym_name = "start_lock_2" } + %lock_d2 = aie.lock(%t73, 3) { sym_name = "done_lock_2" } - AIE.flow(%t73, "DMA" : 0, %t73, "DMA" : 0) + aie.flow(%t73, "DMA" : 0, %t73, "DMA" : 0) // Tile DMA - %m73 = AIE.mem(%t73) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m73 = aie.mem(%t73) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 0, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 0, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 4, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 4, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^end ^bd2: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 8, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 8, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_l : memref<256xi32>, 12, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_l : memref<256xi32>, 12, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir index a936ff322d..b0c33ac22b 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir @@ -39,58 +39,58 @@ // CHECK: PASS! module @test_chess_08_tile_locks { - AIE.device(xcve2802) { - %t61 = AIE.tile(6, 1) - %t71 = AIE.tile(7, 1) - %t81 = AIE.tile(8, 1) + aie.device(xcve2802) { + %t61 = aie.tile(6, 1) + %t71 = aie.tile(7, 1) + %t81 = aie.tile(8, 1) - %buf_w = AIE.buffer(%t61) { sym_name = "west" } : memref<256xi32> - %buf_l = AIE.buffer(%t71) { sym_name = "local" } : memref<256xi32> - %buf_e = AIE.buffer(%t81) { sym_name = "east" } : memref<256xi32> + %buf_w = aie.buffer(%t61) { sym_name = "west" } : memref<256xi32> + %buf_l = aie.buffer(%t71) { sym_name = "local" } : memref<256xi32> + %buf_e = aie.buffer(%t81) { sym_name = "east" } : memref<256xi32> - %lock_s1 = AIE.lock(%t71, 0) { sym_name = "start_lock_1" } - %lock_d1 = AIE.lock(%t71, 1) { sym_name = "done_lock_1" } - %lock_s2 = AIE.lock(%t71, 2) { sym_name = "start_lock_2" } - %lock_d2 = AIE.lock(%t71, 3) { sym_name = "done_lock_2" } + %lock_s1 = aie.lock(%t71, 0) { sym_name = "start_lock_1" } + %lock_d1 = aie.lock(%t71, 1) { sym_name = "done_lock_1" } + %lock_s2 = aie.lock(%t71, 2) { sym_name = "start_lock_2" } + %lock_d2 = aie.lock(%t71, 3) { sym_name = "done_lock_2" } - AIE.flow(%t71, "DMA" : 0, %t71, "DMA" : 0) - AIE.memtile_dma(%t81) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^end) + aie.flow(%t71, "DMA" : 0, %t71, "DMA" : 0) + aie.memtile_dma(%t81) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock_d2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_e : memref<256xi32>, 0, 2) - AIE.use_lock(%lock_s2, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_d2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_e : memref<256xi32>, 0, 2) + aie.use_lock(%lock_s2, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Tile DMA - %m71 = AIE.memtile_dma(%t71) { - %srcDma = AIE.dma_start("MM2S", 0, ^bd0, ^dma1) + %m71 = aie.memtile_dma(%t71) { + %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^dma1) ^dma1: - %dstDma = AIE.dma_start("S2MM", 0, ^bd2, ^end) + %dstDma = aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd0: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_w : memref<256xi32>, 0, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^bd1 + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_w : memref<256xi32>, 0, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^bd1 ^bd1: - AIE.use_lock(%lock_s1, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_w : memref<256xi32>, 4, 2) - AIE.use_lock(%lock_d1, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s1, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_w : memref<256xi32>, 4, 2) + aie.use_lock(%lock_d1, Release, 1) + aie.next_bd ^end ^bd2: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_e : memref<256xi32>, 8, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^bd3 + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_e : memref<256xi32>, 8, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^bd3 ^bd3: - AIE.use_lock(%lock_s2, AcquireGreaterEqual, 1) - AIE.dma_bd(%buf_e : memref<256xi32>, 12, 2) - AIE.use_lock(%lock_d2, Release, 1) - AIE.next_bd ^end + aie.use_lock(%lock_s2, AcquireGreaterEqual, 1) + aie.dma_bd(%buf_e : memref<256xi32>, 12, 2) + aie.use_lock(%lock_d2, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/tutorials/tutorial-1/aie.mlir b/tutorials/tutorial-1/aie.mlir index fdd1b41976..c71103bdd5 100644 --- a/tutorials/tutorial-1/aie.mlir +++ b/tutorials/tutorial-1/aie.mlir @@ -20,21 +20,21 @@ module @tutorial_1 { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %val = arith.constant 14 : i32 // declare a constant (int32) %idx = arith.constant 3 : index // declare a constant (index) memref.store %val, %buf[%idx] : memref<256xi32> // store val in buf[3] - AIE.end + aie.end } } diff --git a/tutorials/tutorial-1/answers/aie_q5.mlir b/tutorials/tutorial-1/answers/aie_q5.mlir index 355113e09d..eed663465f 100644 --- a/tutorials/tutorial-1/answers/aie_q5.mlir +++ b/tutorials/tutorial-1/answers/aie_q5.mlir @@ -19,21 +19,21 @@ module @tutorial_1 { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<8192xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<8192xi32> // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %val = arith.constant 14 : i32 // declare a constant (int32) %idx = arith.constant 3 : index // declare a constant (index) memref.store %val, %buf[%idx] : memref<8192xi32> // store val in buf[3] - AIE.end + aie.end } } diff --git a/tutorials/tutorial-1/answers/aie_q6.mlir b/tutorials/tutorial-1/answers/aie_q6.mlir index af7cae83aa..180390d03a 100644 --- a/tutorials/tutorial-1/answers/aie_q6.mlir +++ b/tutorials/tutorial-1/answers/aie_q6.mlir @@ -19,23 +19,23 @@ module @tutorial_1 { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) - %tile24 = AIE.tile(2, 4) + %tile14 = aie.tile(1, 4) + %tile24 = aie.tile(2, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> - %buf2 = AIE.buffer(%tile24) { sym_name = "a24" } : memref<8192xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf2 = aie.buffer(%tile24) { sym_name = "a24" } : memref<8192xi32> // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { %val = arith.constant 14 : i32 // declare a constant (int32) %idx = arith.constant 3 : index // declare a constant (index) memref.store %val, %buf2[%idx] : memref<8192xi32> // store val in buf[3] - AIE.end + aie.end } } diff --git a/tutorials/tutorial-2/tutorial-2a/aie.mlir b/tutorials/tutorial-2/tutorial-2a/aie.mlir index 2edb03a49e..09dc3c8893 100644 --- a/tutorials/tutorial-2/tutorial-2a/aie.mlir +++ b/tutorials/tutorial-2/tutorial-2a/aie.mlir @@ -21,24 +21,24 @@ module @tutorial_2a { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> // Declare a lock 0 associated with tile(1,4) with a // symbolic name "lock14_0" which can be used by access functions // in the generated host API (aie.mlir.prj/aie_inc.cpp) - %lock14_0 = AIE.lock(%tile14, 0) { sym_name = "lock14_0" } + %lock14_0 = aie.lock(%tile14, 0) { sym_name = "lock14_0" } // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire lock right when core starts - AIE.use_lock(%lock14_0, "Acquire", 0) + aie.use_lock(%lock14_0, "Acquire", 0) %val = arith.constant 14 : i32 // declare a constant (int32) %idx = arith.constant 3 : index // declare a constant (index) @@ -48,8 +48,8 @@ module @tutorial_2a { // This can be used by host to mark beginning/end of a program or // when the host is trying to determine when the program is done // by acquiring this lock (with value 1). - AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + aie.use_lock(%lock14_0, "Release", 1) + aie.end } } diff --git a/tutorials/tutorial-2/tutorial-2b/aie.mlir b/tutorials/tutorial-2/tutorial-2b/aie.mlir index 0c44949bf6..6026324523 100644 --- a/tutorials/tutorial-2/tutorial-2b/aie.mlir +++ b/tutorials/tutorial-2/tutorial-2b/aie.mlir @@ -21,26 +21,26 @@ module @tutorial_2b { // Declare the target device - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> // Declare a lock 0 associated with tile(1,4) with a // symbolic name "lock14_0" which can be used by access functions // in the generated API (aie.mlir.prj/aie_inc.cpp) - %lock14_0 = AIE.lock(%tile14, 0) { sym_name = "lock14_0" } + %lock14_0 = aie.lock(%tile14, 0) { sym_name = "lock14_0" } // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire lock right when core starts - AIE.use_lock(%lock14_0, "Acquire", 0) + aie.use_lock(%lock14_0, "Acquire", 0) %val = arith.constant 14 : i32 // declare a constant (int32) %idx = arith.constant 3 : index // declare a constant (index) @@ -50,8 +50,8 @@ module @tutorial_2b { // This can be used by host to mark beginning/end of a program or // when the host is trying to determine when the program is done // by acquiring this lock (with value 1). - AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + aie.use_lock(%lock14_0, "Release", 1) + aie.end } } } diff --git a/tutorials/tutorial-2/tutorial-2c/aie.mlir b/tutorials/tutorial-2/tutorial-2c/aie.mlir index 5141149b4c..66fcc686e8 100644 --- a/tutorials/tutorial-2/tutorial-2c/aie.mlir +++ b/tutorials/tutorial-2/tutorial-2c/aie.mlir @@ -20,24 +20,24 @@ module @tutorial_2c { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> // Declare a lock 0 associated with tile(1,4) with a // symbolic name "lock14_0" which can be used by access functions // in the generated API (aie.mlir.prj/aie_inc.cpp) - %lock14_0 = AIE.lock(%tile14, 0) { sym_name = "lock14_0" } + %lock14_0 = aie.lock(%tile14, 0) { sym_name = "lock14_0" } // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire lock right when core starts - AIE.use_lock(%lock14_0, "Acquire", 0) + aie.use_lock(%lock14_0, "Acquire", 0) %val = arith.constant 14 : i32 // declare a constant (int32) %idx = arith.constant 3 : index // declare a constant (index) @@ -47,8 +47,8 @@ module @tutorial_2c { // This can be used by host to mark beginning/end of a program or // when the host is trying to determine when the program is done // by acquiring this lock (with value 1). - AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + aie.use_lock(%lock14_0, "Release", 1) + aie.end } } diff --git a/tutorials/tutorial-2/tutorial-2c/answers/aie_empty.mlir b/tutorials/tutorial-2/tutorial-2c/answers/aie_empty.mlir index 4e802f2eb9..deea0c98f1 100644 --- a/tutorials/tutorial-2/tutorial-2c/answers/aie_empty.mlir +++ b/tutorials/tutorial-2/tutorial-2c/answers/aie_empty.mlir @@ -18,24 +18,24 @@ module @tutorial_2c { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> // Declare a lock 0 associated with tile(1,4) with a // symbolic name "lock14_0" which can be used by access functions // in the generated API (aie.mlir.prj/aie_inc.cpp) - %lock14_0 = AIE.lock(%tile14, 0) { sym_name = "lock14_0" } + %lock14_0 = aie.lock(%tile14, 0) { sym_name = "lock14_0" } // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire lock right when core starts - AIE.use_lock(%lock14_0, "Acquire", 0) + aie.use_lock(%lock14_0, "Acquire", 0) // %val = arith.constant 14 : i32 // declare a constant (int32) // %idx = arith.constant 3 : index // declare a constant (index) @@ -45,8 +45,8 @@ module @tutorial_2c { // This can be used by host to mark beginning/end of a program or // when the host is trying to determine when the program is done // by acquiring this lock (with value 1). - AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + aie.use_lock(%lock14_0, "Release", 1) + aie.end } } diff --git a/tutorials/tutorial-2/tutorial-2c/answers/aie_real_empty.mlir b/tutorials/tutorial-2/tutorial-2c/answers/aie_real_empty.mlir index f9c8a96988..30f3c89958 100644 --- a/tutorials/tutorial-2/tutorial-2c/answers/aie_real_empty.mlir +++ b/tutorials/tutorial-2/tutorial-2c/answers/aie_real_empty.mlir @@ -18,24 +18,24 @@ module @tutorial_2c { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> // Declare a lock 0 associated with tile(1,4) with a // symbolic name "lock14_0" which can be used by access functions // in the generated API (aie.mlir.prj/aie_inc.cpp) - %lock14_0 = AIE.lock(%tile14, 0) { sym_name = "lock14_0" } + %lock14_0 = aie.lock(%tile14, 0) { sym_name = "lock14_0" } // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire lock right when core starts - //AIE.use_lock(%lock14_0, "Acquire", 0) + //aie.use_lock(%lock14_0, "Acquire", 0) // %val = arith.constant 14 : i32 // declare a constant (int32) // %idx = arith.constant 3 : index // declare a constant (index) @@ -45,8 +45,8 @@ module @tutorial_2c { // This can be used by host to mark beginning/end of a program or // when the host is trying to determine when the program is done // by acquiring this lock (with value 1). - //AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + //aie.use_lock(%lock14_0, "Release", 1) + aie.end } } diff --git a/tutorials/tutorial-3/aie.mlir b/tutorials/tutorial-3/aie.mlir index 197ddec103..5732f33513 100644 --- a/tutorials/tutorial-3/aie.mlir +++ b/tutorials/tutorial-3/aie.mlir @@ -21,39 +21,39 @@ module @tutorial_3 { // 2 tiles in row 4 (col 1 and col 2) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile24 = AIE.tile(2, 4) + %tile14 = aie.tile(1, 4) + %tile24 = aie.tile(2, 4) // Declare local memory of tile(2,4) which is shared with tile(1,4) - %buf = AIE.buffer(%tile24) { sym_name = "a24" } : memref<256xi32> + %buf = aie.buffer(%tile24) { sym_name = "a24" } : memref<256xi32> // Declare shared lock (belonging to tile(2,4), lock ID=1) - %lock24_1 = AIE.lock(%tile24, 1) { sym_name = "lock_a24_1" } + %lock24_1 = aie.lock(%tile24, 1) { sym_name = "lock_a24_1" } // This lock will be used to gate when our 2nd core is done - %lock24_2 = AIE.lock(%tile24, 2) { sym_name = "lock_a24_2" } + %lock24_2 = aie.lock(%tile24, 2) { sym_name = "lock_a24_2" } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock24_1, "Acquire", 0) + aie.use_lock(%lock24_1, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf[%idx] : memref<256xi32> - AIE.use_lock(%lock24_1, "Release", 1) - AIE.end + aie.use_lock(%lock24_1, "Release", 1) + aie.end } // Define core algorithm for tile(2,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core24 = AIE.core(%tile24) { + %core24 = aie.core(%tile24) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock24_2, "Acquire", 0) + aie.use_lock(%lock24_2, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock24_1, "Acquire", 1) + aie.use_lock(%lock24_1, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf[%idx1] : memref<256xi32> @@ -63,8 +63,8 @@ module @tutorial_3 { memref.store %d2, %buf[%idx2] : memref<256xi32> // This release means our 2nd core is done - AIE.use_lock(%lock24_2, "Release", 1) - AIE.end + aie.use_lock(%lock24_2, "Release", 1) + aie.end } } diff --git a/tutorials/tutorial-3/answers/aie_perf.mlir b/tutorials/tutorial-3/answers/aie_perf.mlir index 5b5008bc77..d49997a030 100644 --- a/tutorials/tutorial-3/answers/aie_perf.mlir +++ b/tutorials/tutorial-3/answers/aie_perf.mlir @@ -19,39 +19,39 @@ module @tutorial_3 { // 2 tiles in row 4 (col 1 and col 2) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile24 = AIE.tile(2, 4) + %tile14 = aie.tile(1, 4) + %tile24 = aie.tile(2, 4) // Declare local memory of tile(2,4) which is shared with tile(1,4) - %buf = AIE.buffer(%tile24) { sym_name = "a24" } : memref<256xi32> + %buf = aie.buffer(%tile24) { sym_name = "a24" } : memref<256xi32> // Declare shared lock (belonging to tile(2,4), lock ID=1) - %lock24_1 = AIE.lock(%tile24, 1) { sym_name = "lock_a24_1" } + %lock24_1 = aie.lock(%tile24, 1) { sym_name = "lock_a24_1" } // This lock will be used to gate when our 2nd core is done - %lock24_2 = AIE.lock(%tile24, 2) { sym_name = "lock_a24_2" } + %lock24_2 = aie.lock(%tile24, 2) { sym_name = "lock_a24_2" } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core24 = AIE.core(%tile24) { + %core24 = aie.core(%tile24) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock24_1, "Acquire", 0) + aie.use_lock(%lock24_1, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf[%idx] : memref<256xi32> - AIE.use_lock(%lock24_1, "Release", 1) - AIE.end + aie.use_lock(%lock24_1, "Release", 1) + aie.end } // Define core algorithm for tile(2,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock24_2, "Acquire", 0) + aie.use_lock(%lock24_2, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock24_1, "Acquire", 1) + aie.use_lock(%lock24_1, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf[%idx1] : memref<256xi32> @@ -61,8 +61,8 @@ module @tutorial_3 { memref.store %d2, %buf[%idx2] : memref<256xi32> // This release means our 2nd core is done - AIE.use_lock(%lock24_2, "Release", 1) - AIE.end + aie.use_lock(%lock24_2, "Release", 1) + aie.end } } diff --git a/tutorials/tutorial-3/objectFifo_ver/aie.mlir b/tutorials/tutorial-3/objectFifo_ver/aie.mlir index e973f38715..56cfb91888 100755 --- a/tutorials/tutorial-3/objectFifo_ver/aie.mlir +++ b/tutorials/tutorial-3/objectFifo_ver/aie.mlir @@ -16,32 +16,32 @@ // Declare this MLIR module. A wrapper that can contain all // AIE tiles, buffers, and data movement module @tutorial_3 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // 2 tiles in row 4 (col 1 and col 2) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile24 = AIE.tile(2, 4) + %tile14 = aie.tile(1, 4) + %tile24 = aie.tile(2, 4) // Declare an object FIFO between the producer tile (1,4) and consumer tile (2,4). // The size of the object FIFO, i.e. its number of elements, is 1. // Objects, i.e. allocated memory elements, have type memref<256xi32> // These tiles share memory between them. - AIE.objectfifo @of (%tile14, {%tile24}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile14, {%tile24}, 1 : i32) : !aie.objectfifo> // This lock will be used to gate when our 2nd core is done - %lock24_2 = AIE.lock(%tile24, 2) { sym_name = "lock_a24_2" } + %lock24_2 = aie.lock(%tile24, 2) { sym_name = "lock_a24_2" } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire a subview with one object from the object FIFO. // This is equivalent to acquiring an AIE lock before accessing an AIE buffer. // This core acquires objects as a Producer: this impacts the acquire value of the lock // that is generated through the object FIFO lowering. - %inputSubview = AIE.objectfifo.acquire @of (Produce, 1) : !AIE.objectfifosubview> + %inputSubview = aie.objectfifo.acquire @of (Produce, 1) : !aie.objectfifosubview> // Access the first, and only, element of the subview. - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %val = arith.constant 14 : i32 %idx = arith.constant 3 : index @@ -51,18 +51,18 @@ module @tutorial_3 { // This is equivalent to releasing an AIE lock after accessing an AIE buffer. // This core releases objects as a Producer: this impacts the release value of the lock // that is generated through the object FIFO lowering. - AIE.objectfifo.release @of (Produce, 1) - AIE.end + aie.objectfifo.release @of (Produce, 1) + aie.end } // Define core algorithm for tile(2,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core24 = AIE.core(%tile24) { + %core24 = aie.core(%tile24) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock24_2, "Acquire", 0) + aie.use_lock(%lock24_2, "Acquire", 0) - %inputSubview = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %inputSubview = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %idx1 = arith.constant 3 : index %d1 = memref.load %input[%idx1] : memref<256xi32> @@ -71,11 +71,11 @@ module @tutorial_3 { %idx2 = arith.constant 5 : index memref.store %d2, %input[%idx2] : memref<256xi32> - AIE.objectfifo.release @of (Consume, 1) + aie.objectfifo.release @of (Consume, 1) // This release means our 2nd core is done - AIE.use_lock(%lock24_2, "Release", 1) - AIE.end + aie.use_lock(%lock24_2, "Release", 1) + aie.end } } } diff --git a/tutorials/tutorial-4/aie.mlir b/tutorials/tutorial-4/aie.mlir index df375f4869..5ce5b92649 100644 --- a/tutorials/tutorial-4/aie.mlir +++ b/tutorials/tutorial-4/aie.mlir @@ -18,32 +18,32 @@ // Declare this MLIR module. A wrapper that can contain all // AIE tiles, buffers, and data movement module @tutorial_4 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // 2 tiles in row 4 (col 1 and col 3) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) // Declare an object FIFO between the producer shim tile (7,0) and consumer tile (3,4). // The size of the object FIFO, i.e. its number of elements, is 1. // Objects, i.e. allocated memory elements, have type memref<256xi32>. // These tiles do not share memory between them. - AIE.objectfifo @of (%tile14, {%tile34}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile14, {%tile34}, 1 : i32) : !aie.objectfifo> // This lock will be used to gate when our 2nd core is done - %lock34_8 = AIE.lock(%tile34, 8) { sym_name = "lock_a34_8" } + %lock34_8 = aie.lock(%tile34, 8) { sym_name = "lock_a34_8" } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire a subview with one object from the object FIFO. // This is equivalent to acquiring an AIE lock before accessing an AIE buffer. // This core acquires objects as a Producer: this impacts the acquire value of the lock // that is generated through the object FIFO lowering. - %inputSubview = AIE.objectfifo.acquire @of (Produce, 1) : !AIE.objectfifosubview> + %inputSubview = aie.objectfifo.acquire @of (Produce, 1) : !aie.objectfifosubview> // Access the first, and only, element of the subview. - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %val = arith.constant 14 : i32 %idx = arith.constant 3 : index @@ -53,18 +53,18 @@ module @tutorial_4 { // This is equivalent to releasing an AIE lock after accessing an AIE buffer. // This core releases objects as a Producer: this impacts the release value of the lock // that is generated through the object FIFO lowering. - AIE.objectfifo.release @of (Produce, 1) - AIE.end + aie.objectfifo.release @of (Produce, 1) + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock34_8, "Acquire", 0) + aie.use_lock(%lock34_8, "Acquire", 0) - %inputSubview = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %inputSubview = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %idx1 = arith.constant 3 : index %d1 = memref.load %input[%idx1] : memref<256xi32> @@ -73,11 +73,11 @@ module @tutorial_4 { %idx2 = arith.constant 5 : index memref.store %d2, %input[%idx2] : memref<256xi32> - AIE.objectfifo.release @of (Consume, 1) + aie.objectfifo.release @of (Consume, 1) // This release means our 2nd core is done - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_8, "Release", 1) + aie.end } } } diff --git a/tutorials/tutorial-4/flow/aie.mlir b/tutorials/tutorial-4/flow/aie.mlir index 7410673e81..e18769c361 100755 --- a/tutorials/tutorial-4/flow/aie.mlir +++ b/tutorials/tutorial-4/flow/aie.mlir @@ -19,59 +19,59 @@ module @tutorial_4 { // 2 tiles in row 4 (col 1 and col 3) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) // Declare local memory of tile(1,4) and tile (3,4) which are not shared - %buf14 = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> // Declare local locks for tile(1,4) and tile(3,4) giving new // unique lock ID values 6 and 7 - %lock14_6 = AIE.lock(%tile14, 6) { sym_name = "lock_a14_6" } - %lock34_7 = AIE.lock(%tile34, 7) { sym_name = "lock_a34_7" } + %lock14_6 = aie.lock(%tile14, 6) { sym_name = "lock_a14_6" } + %lock34_7 = aie.lock(%tile34, 7) { sym_name = "lock_a34_7" } // This lock will be used to gate when our 2nd core is done - %lock34_8 = AIE.lock(%tile34, 8) { sym_name = "lock_a34_8" } + %lock34_8 = aie.lock(%tile34, 8) { sym_name = "lock_a34_8" } // Connect DMA channel 0 on tile(1,4) to DMA channel 1 in tile(3,4) // with automatic shortest distance routing - AIE.flow(%tile14, DMA: 0, %tile34, DMA:1) + aie.flow(%tile14, DMA: 0, %tile34, DMA:1) // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock14_6, "Acquire", 0) + aie.use_lock(%lock14_6, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf14[%idx] : memref<256xi32> // Release lock to 1 so tile(2,4) can acquire and begin processing - AIE.use_lock(%lock14_6, "Release", 1) - AIE.end + aie.use_lock(%lock14_6, "Release", 1) + aie.end } - %mem14 = AIE.mem(%tile14) { - AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_6, Acquire, 1) - AIE.dma_bd(%buf14 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock14_6, Release, 0) - AIE.next_bd ^end + aie.use_lock(%lock14_6, Acquire, 1) + aie.dma_bd(%buf14 : memref<256xi32>, 0, 256) + aie.use_lock(%lock14_6, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock34_8, "Acquire", 0) + aie.use_lock(%lock34_8, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock34_7, "Acquire", 1) + aie.use_lock(%lock34_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf34[%idx1] : memref<256xi32> @@ -81,32 +81,32 @@ module @tutorial_4 { memref.store %d2, %buf34[%idx2] : memref<256xi32> // This release doesn't do much in our example but mimics ping-pong - AIE.use_lock(%lock34_7, "Release", 0) + aie.use_lock(%lock34_7, "Release", 0) // This release means our 2nd core is done - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_8, "Release", 1) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem34 = AIE.mem(%tile34) { + %mem34 = aie.mem(%tile34) { // sequence of DMAs declaration and buffer descriptors (bd) // ^bd0 - first label/ bd definition to set // ^end - next label/ bd definition to set - // (here, that is AIE.end to indicate no more) - AIE.dma_start("S2MM", 1, ^bd0, ^end) + // (here, that is aie.end to indicate no more) + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: // Add locks behvaior around bd definition - AIE.use_lock(%lock34_7, Acquire, 0) + aie.use_lock(%lock34_7, Acquire, 0) // bd definition // %buf34 - local buffer // 0 - offset of transfer // 256 - length of transfer // 0 - A/B mode enable (default is disabled) - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_7, Release, 1) - AIE.next_bd ^end + aie.dma_bd(%buf34 : memref<256xi32>, 0, 256) + aie.use_lock(%lock34_7, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/tutorials/tutorial-4/flow/answers/aie_q5.mlir b/tutorials/tutorial-4/flow/answers/aie_q5.mlir index d5d8502098..95ee3896a1 100644 --- a/tutorials/tutorial-4/flow/answers/aie_q5.mlir +++ b/tutorials/tutorial-4/flow/answers/aie_q5.mlir @@ -20,55 +20,55 @@ module @tutorial_4 { // 2 tiles in row 4 (col 1 and col 3) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile24 = AIE.tile(2, 4) // TODO Declare dummy tile for manual routing - %tile34 = AIE.tile(3, 4) + %tile14 = aie.tile(1, 4) + %tile24 = aie.tile(2, 4) // TODO Declare dummy tile for manual routing + %tile34 = aie.tile(3, 4) // Declare local memory of tile(1,4) and tile (3,4) which are not shared - %buf14 = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> // Declare local locks for tile(1,4) and tile(3,4) giving new // unique lock ID values 6 and 7 - %lock14_6 = AIE.lock(%tile14, 6) { sym_name = "lock_a14_6" } - %lock34_7 = AIE.lock(%tile34, 7) { sym_name = "lock_a34_7" } + %lock14_6 = aie.lock(%tile14, 6) { sym_name = "lock_a14_6" } + %lock34_7 = aie.lock(%tile34, 7) { sym_name = "lock_a34_7" } // Connect DMA channel 0 on tile(1,4) to DMA channel 1 in tile(3,4) // with automatic shortest distance routing - AIE.flow(%tile14, DMA: 0, %tile34, DMA:1) + aie.flow(%tile14, DMA: 0, %tile34, DMA:1) // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock14_6, "Acquire", 0) + aie.use_lock(%lock14_6, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf14[%idx] : memref<256xi32> // Release lock to 1 so tile(2,4) can acquire and begin processing - AIE.use_lock(%lock14_6, "Release", 1) - AIE.end + aie.use_lock(%lock14_6, "Release", 1) + aie.end } - %mem14 = AIE.mem(%tile14) { - AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_6, Acquire, 1) - AIE.dma_bd(%buf14 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock14_6, Release, 0) - AIE.next_bd ^bd0 + aie.use_lock(%lock14_6, Acquire, 1) + aie.dma_bd(%buf14 : memref<256xi32>, 0, 256) + aie.use_lock(%lock14_6, Release, 0) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock34_7, "Acquire", 1) + aie.use_lock(%lock34_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf34[%idx1] : memref<256xi32> @@ -78,30 +78,30 @@ module @tutorial_4 { memref.store %d2, %buf34[%idx2] : memref<256xi32> // This release doesn't do much in our example but mimics ping-pong - AIE.use_lock(%lock34_7, "Release", 0) - AIE.end + aie.use_lock(%lock34_7, "Release", 0) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem34 = AIE.mem(%tile34) { + %mem34 = aie.mem(%tile34) { // sequence of DMAs declaration and buffer descriptors (bd) // ^bd0 - first label/ bd definition to set // ^end - next label/ bd definition to set - // (here, that is AIE.end to indicate no more) - AIE.dma_start("S2MM", 1, ^bd0, ^end) + // (here, that is aie.end to indicate no more) + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: // Add locks behvaior around bd definition - AIE.use_lock(%lock34_7, Acquire, 0) + aie.use_lock(%lock34_7, Acquire, 0) // bd definition // %buf34 - local buffer // 0 - offset of transfer // 256 - length of transfer // 0 - A/B mode enable (default is disabled) - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_7, Release, 1) - AIE.next_bd ^bd0 + aie.dma_bd(<%buf34 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock34_7, Release, 1) + aie.next_bd ^bd0 ^end: - AIE.end + aie.end } } diff --git a/tutorials/tutorial-4/switchbox/aie.mlir b/tutorials/tutorial-4/switchbox/aie.mlir index cb76f18c1e..b9c042afa1 100644 --- a/tutorials/tutorial-4/switchbox/aie.mlir +++ b/tutorials/tutorial-4/switchbox/aie.mlir @@ -19,62 +19,62 @@ module @tutorial_4 { // 2 tiles in row 4 (col 1 and col 3) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile24 = AIE.tile(2, 4) // TODO Declare dummy tile for manual routing - %tile34 = AIE.tile(3, 4) + %tile14 = aie.tile(1, 4) + %tile24 = aie.tile(2, 4) // TODO Declare dummy tile for manual routing + %tile34 = aie.tile(3, 4) // Declare local memory of tile(1,4) and tile (3,4) which are not shared - %buf14 = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> // Declare local locks for tile(1,4) and tile(3,4) giving new // unique lock ID values 6 and 7 - %lock14_6 = AIE.lock(%tile14, 6) { sym_name = "lock_a14_6" } - %lock34_7 = AIE.lock(%tile34, 7) { sym_name = "lock_a34_7" } - %lock34_8 = AIE.lock(%tile34, 8) { sym_name = "lock_a34_8" } + %lock14_6 = aie.lock(%tile14, 6) { sym_name = "lock_a14_6" } + %lock34_7 = aie.lock(%tile34, 7) { sym_name = "lock_a34_7" } + %lock34_8 = aie.lock(%tile34, 8) { sym_name = "lock_a34_8" } // Connect DMA channel 0 on tile(1,4) to DMA channel 1 in tile(3,4) // with automatic shortest distance routing //This flow op is replaced by switchbox ops - //AIE.flow(%tile14, DMA: 0, %tile34, DMA:1) - %sb14 = AIE.switchbox(%tile14) { AIE.connect<"DMA": 0, "East": 1> } - %sb24 = AIE.switchbox(%tile24) { AIE.connect<"West": 1, "East": 3> } - %sb34 = AIE.switchbox(%tile34) { AIE.connect<"West": 3, "DMA": 1> } + //aie.flow(%tile14, DMA: 0, %tile34, DMA:1) + %sb14 = aie.switchbox(%tile14) { aie.connect<"DMA": 0, "East": 1> } + %sb24 = aie.switchbox(%tile24) { aie.connect<"West": 1, "East": 3> } + %sb34 = aie.switchbox(%tile34) { aie.connect<"West": 3, "DMA": 1> } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock14_6, "Acquire", 0) + aie.use_lock(%lock14_6, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf14[%idx] : memref<256xi32> // Release lock to 1 so tile(2,4) can acquire and begin processing - AIE.use_lock(%lock14_6, "Release", 1) - AIE.end + aie.use_lock(%lock14_6, "Release", 1) + aie.end } - %mem14 = AIE.mem(%tile14) { - AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_6, Acquire, 1) - AIE.dma_bd(%buf14 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock14_6, Release, 0) - AIE.next_bd ^end + aie.use_lock(%lock14_6, Acquire, 1) + aie.dma_bd(<%buf14 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock14_6, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { - AIE.use_lock(%lock34_8, "Acquire", 0) + %core34 = aie.core(%tile34) { + aie.use_lock(%lock34_8, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock34_7, "Acquire", 1) + aie.use_lock(%lock34_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf34[%idx1] : memref<256xi32> @@ -84,30 +84,30 @@ module @tutorial_4 { memref.store %d2, %buf34[%idx2] : memref<256xi32> // This release doesn't do much in our example but mimics ping-pong - AIE.use_lock(%lock34_7, "Release", 0) - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_7, "Release", 0) + aie.use_lock(%lock34_8, "Release", 1) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem34 = AIE.mem(%tile34) { + %mem34 = aie.mem(%tile34) { // sequence of DMAs declaration and buffer descriptors (bd) // ^bd0 - first label/ bd definition to set // ^end - next label/ bd definition to set - // (here, that is AIE.end to indicate no more) - AIE.dma_start("S2MM", 1, ^bd0, ^end) + // (here, that is aie.end to indicate no more) + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: // Add locks behvaior around bd definition - AIE.use_lock(%lock34_7, Acquire, 0) + aie.use_lock(%lock34_7, Acquire, 0) // bd definition // %buf34 - local buffer // 0 - offset of transfer // 256 - length of transfer // 0 - A/B mode enable (default is disabled) - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_7, Release, 1) - AIE.next_bd ^end + aie.dma_bd(<%buf34 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock34_7, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/tutorials/tutorial-4/switchbox/path/pathfinder_input.mlir b/tutorials/tutorial-4/switchbox/path/pathfinder_input.mlir index 2ecbfef519..42948aaa8a 100644 --- a/tutorials/tutorial-4/switchbox/path/pathfinder_input.mlir +++ b/tutorials/tutorial-4/switchbox/path/pathfinder_input.mlir @@ -9,63 +9,63 @@ //===----------------------------------------------------------------------===// // RUN: aie-opt --aie-canonicalize-device %s | aie-opt --aie-create-pathfinder-flows | FileCheck %s -// CHECK: %15 = AIE.switchbox(%3) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %15 = aie.switchbox(%3) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %16 = AIE.switchbox(%4) { -// CHECK: AIE.connect +// CHECK: %16 = aie.switchbox(%4) { +// CHECK: aie.connect // CHECK: } -// CHECK: %17 = AIE.switchbox(%7) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %17 = aie.switchbox(%7) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %18 = AIE.switchbox(%10) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %18 = aie.switchbox(%10) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %19 = AIE.switchbox(%13) { -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %19 = aie.switchbox(%13) { +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %20 = AIE.switchbox(%6) { -// CHECK: AIE.connect +// CHECK: %20 = aie.switchbox(%6) { +// CHECK: aie.connect // CHECK: } -// CHECK: %21 = AIE.switchbox(%9) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %21 = aie.switchbox(%9) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } -// CHECK: %22 = AIE.switchbox(%14) { -// CHECK: AIE.connect -// CHECK: AIE.connect +// CHECK: %22 = aie.switchbox(%14) { +// CHECK: aie.connect +// CHECK: aie.connect // CHECK: } module @pathfinder{ -%t01 = AIE.tile(0, 1) -%t02 = AIE.tile(0, 2) -%t03 = AIE.tile(0, 3) -%t11 = AIE.tile(1, 1) -%t12 = AIE.tile(1, 2) -%t13 = AIE.tile(1, 3) -%t21 = AIE.tile(2, 1) -%t22 = AIE.tile(2, 2) -%t23 = AIE.tile(2, 3) -%t31 = AIE.tile(3, 1) -%t32 = AIE.tile(3, 2) -%t33 = AIE.tile(3, 3) -%t41 = AIE.tile(4, 1) -%t42 = AIE.tile(4, 2) -%t43 = AIE.tile(4, 3) +%t01 = aie.tile(0, 1) +%t02 = aie.tile(0, 2) +%t03 = aie.tile(0, 3) +%t11 = aie.tile(1, 1) +%t12 = aie.tile(1, 2) +%t13 = aie.tile(1, 3) +%t21 = aie.tile(2, 1) +%t22 = aie.tile(2, 2) +%t23 = aie.tile(2, 3) +%t31 = aie.tile(3, 1) +%t32 = aie.tile(3, 2) +%t33 = aie.tile(3, 3) +%t41 = aie.tile(4, 1) +%t42 = aie.tile(4, 2) +%t43 = aie.tile(4, 3) -AIE.flow(%t11, DMA : 0, %t42, DMA : 0) -AIE.flow(%t42, DMA : 0, %t11, DMA : 0) -AIE.flow(%t31, DMA : 0, %t43, DMA : 0) -AIE.flow(%t43, DMA : 0, %t31, DMA : 0) +aie.flow(%t11, DMA : 0, %t42, DMA : 0) +aie.flow(%t42, DMA : 0, %t11, DMA : 0) +aie.flow(%t31, DMA : 0, %t43, DMA : 0) +aie.flow(%t43, DMA : 0, %t31, DMA : 0) -//AIE.flow(%t03, DMA : 0, %t41, DMA : 0) +//aie.flow(%t03, DMA : 0, %t41, DMA : 0) } diff --git a/tutorials/tutorial-5/aie.mlir b/tutorials/tutorial-5/aie.mlir index b2e9a90f88..94fa4b0035 100644 --- a/tutorials/tutorial-5/aie.mlir +++ b/tutorials/tutorial-5/aie.mlir @@ -18,45 +18,45 @@ // Declare this MLIR module. A wrapper that can contain all // AIE tiles, buffers, and data movement module @tutorial_5 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // 1 tile in row 4 (col 3) // even rows have local memory to its left - %tile34 = AIE.tile(3, 4) + %tile34 = aie.tile(3, 4) // 1 tile in row 0 (col 7) // col 7, row 0 has access to a shim_dma - %tile70 = AIE.tile(7, 0) + %tile70 = aie.tile(7, 0) // Declare external buffers, which represent pointers to external memory locations. - %ext_buf70_in = AIE.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> - %ext_buf70_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<256xi32> + %ext_buf70_in = aie.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> + %ext_buf70_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<256xi32> // Declare an object FIFO between the producer shim tile (7,0) and consumer tile (3,4). // The size of the object FIFO, i.e. its number of elements, is 1. // Objects, i.e. allocated memory elements, have type memref<256xi32>. // These tiles do not share memory between them. - AIE.objectfifo @of_in (%tile70, {%tile34}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_in (%tile70, {%tile34}, 1 : i32) : !aie.objectfifo> // Declare an object FIFO between the producer tile (3,4) and consumer shim tile (7,0). - AIE.objectfifo @of_out (%tile34, {%tile70}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of_out (%tile34, {%tile70}, 1 : i32) : !aie.objectfifo> // Register the external memory pointers to the object FIFOs. - AIE.objectfifo.register_external_buffers @of_in (%tile70, {%ext_buf70_in}) : (memref<256xi32>) - AIE.objectfifo.register_external_buffers @of_out (%tile70, {%ext_buf70_out}) : (memref<256xi32>) + aie.objectfifo.register_external_buffers @of_in (%tile70, {%ext_buf70_in}) : (memref<256xi32>) + aie.objectfifo.register_external_buffers @of_out (%tile70, {%ext_buf70_out}) : (memref<256xi32>) // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // Acquire a subview with one object from each object FIFO. // This is equivalent to acquiring an AIE lock before accessing an AIE buffer. // This core acquires objects both as a Consumer of one object FIFO and as a Producer of another: // this impacts the acquire values of the locks that are generated through the object FIFO lowering - %inputSubview = AIE.objectfifo.acquire @of_in (Consume, 1) : !AIE.objectfifosubview> - %outputSubview = AIE.objectfifo.acquire @of_out (Produce, 1) : !AIE.objectfifosubview> + %inputSubview = aie.objectfifo.acquire @of_in (Consume, 1) : !aie.objectfifosubview> + %outputSubview = aie.objectfifo.acquire @of_out (Produce, 1) : !aie.objectfifosubview> // Access the first, and only, element of each subview. - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> - %output = AIE.objectfifo.subview.access %outputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> + %output = aie.objectfifo.subview.access %outputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %idx1 = arith.constant 3 : index %d1 = memref.load %input[%idx1] : memref<256xi32> @@ -72,9 +72,9 @@ module @tutorial_5 { // This is equivalent to releasing an AIE lock after accessing an AIE buffer. // This core releases objects both as a Consumer of one object FIFO and as a Producer of another: // this impacts the release values of the locks that are generated through the object FIFO lowering. - AIE.objectfifo.release @of_in (Consume, 1) - AIE.objectfifo.release @of_out (Produce, 1) - AIE.end + aie.objectfifo.release @of_in (Consume, 1) + aie.objectfifo.release @of_out (Produce, 1) + aie.end } } } diff --git a/tutorials/tutorial-5/flow/aie.mlir b/tutorials/tutorial-5/flow/aie.mlir index 78342d51ab..6b0773cef3 100644 --- a/tutorials/tutorial-5/flow/aie.mlir +++ b/tutorials/tutorial-5/flow/aie.mlir @@ -19,58 +19,58 @@ module @tutorial_5 { // 1 tile in row 4 (col 3) // even rows have local memory to its left - %tile34 = AIE.tile(3, 4) + %tile34 = aie.tile(3, 4) // 1 tile in row 0 (col 7) // col 7, row 0 has access to a shim_dma - %tile70 = AIE.tile(7, 0) + %tile70 = aie.tile(7, 0) // Declare local memory of tile(1,4) and tile (3,4) which are not shared - %buf34 = AIE.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> // Declare external buffers, which represent pointers to external memory locations. - %ext_buf70_in = AIE.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> - %ext_buf70_out = AIE.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<256xi32> + %ext_buf70_in = aie.external_buffer {sym_name = "ddr_test_buffer_in"}: memref<256xi32> + %ext_buf70_out = aie.external_buffer {sym_name = "ddr_test_buffer_out"}: memref<256xi32> // Declare local locks for tile(3,4) and shim tile (7,0) giving new // unique lock ID values 7 and 8 - %lock34_in = AIE.lock(%tile34, 7) { sym_name = "tile34_in_lock" } - %lock34_out = AIE.lock(%tile34, 8) { sym_name = "tile34_out_lock" } - %lock70_in = AIE.lock(%tile70, 3) { sym_name = "ddr_test_buffer_in_lock" } - %lock70_out = AIE.lock(%tile70, 4) { sym_name = "ddr_test_buffer_out_lock" } + %lock34_in = aie.lock(%tile34, 7) { sym_name = "tile34_in_lock" } + %lock34_out = aie.lock(%tile34, 8) { sym_name = "tile34_out_lock" } + %lock70_in = aie.lock(%tile70, 3) { sym_name = "ddr_test_buffer_in_lock" } + %lock70_out = aie.lock(%tile70, 4) { sym_name = "ddr_test_buffer_out_lock" } // Connect DMA channel 0 on tile(7,0) to DMA channel 1 in tile(3,4) // with automatic shortest distance routing - AIE.flow(%tile70, DMA: 0, %tile34, DMA: 1) - AIE.flow(%tile34, DMA: 0, %tile70, DMA: 0) + aie.flow(%tile70, DMA: 0, %tile34, DMA: 1) + aie.flow(%tile34, DMA: 0, %tile70, DMA: 0) // shim DMA programming is nearly identical to tile DMA programming // shim_dma are blocking on release 1 (user intervention) - %shimdma70 = AIE.shim_dma(%tile70) { - AIE.dma_start("MM2S", 0, ^bd1, ^ch2) + %shimdma70 = aie.shim_dma(%tile70) { + aie.dma_start("MM2S", 0, ^bd1, ^ch2) ^ch2: - AIE.dma_start("S2MM", 0, ^bd2, ^end) + aie.dma_start("S2MM", 0, ^bd2, ^end) ^bd1: // Lock used to allow host to start transfer - AIE.use_lock(%lock70_in, "Acquire", 1) - AIE.dma_bd(%ext_buf70_in : memref<256xi32>, 0, 256) - AIE.use_lock(%lock70_in, "Release", 0) - AIE.next_bd ^end + aie.use_lock(%lock70_in, "Acquire", 1) + aie.dma_bd(<%ext_buf70_in : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock70_in, "Release", 0) + aie.next_bd ^end ^bd2: - AIE.use_lock(%lock70_out, "Acquire", 1) - AIE.dma_bd(%ext_buf70_out : memref<256xi32>, 0, 256) - AIE.use_lock(%lock70_out, "Release", 0) - AIE.next_bd ^end + aie.use_lock(%lock70_out, "Acquire", 1) + aie.dma_bd(<%ext_buf70_out : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock70_out, "Release", 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock34_out, "Acquire", 0) // Acquire out lock - AIE.use_lock(%lock34_in, "Acquire", 1) // Acquire in lock + aie.use_lock(%lock34_out, "Acquire", 0) // Acquire out lock + aie.use_lock(%lock34_in, "Acquire", 1) // Acquire in lock // This will block while tileDMA moves data so we want to acquire this 2nd %idx1 = arith.constant 3 : index %d1 = memref.load %buf34[%idx1] : memref<256xi32> @@ -80,39 +80,39 @@ module @tutorial_5 { memref.store %d2, %buf34[%idx2] : memref<256xi32> // This release doesn't do much in our example but mimics ping-pong - AIE.use_lock(%lock34_in, "Release", 0) // Release in lock - AIE.use_lock(%lock34_out, "Release", 1) // Release out lock - AIE.end + aie.use_lock(%lock34_in, "Release", 0) // Release in lock + aie.use_lock(%lock34_out, "Release", 1) // Release out lock + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem34 = AIE.mem(%tile34) { + %mem34 = aie.mem(%tile34) { // sequence of DMAs declaration and buffer descriptors (bd) // ^bd0 - first label/ bd definition to set // ^end - next label/ bd definition to set - // (here, that is AIE.end to indicate no more) - AIE.dma_start("S2MM", 1, ^bd0, ^ch2) + // (here, that is aie.end to indicate no more) + aie.dma_start("S2MM", 1, ^bd0, ^ch2) ^ch2: - AIE.dma_start("MM2S", 0, ^bd1, ^end) + aie.dma_start("MM2S", 0, ^bd1, ^end) ^bd0: // Add locks behvaior around bd definition - AIE.use_lock(%lock34_in, "Acquire", 0) + aie.use_lock(%lock34_in, "Acquire", 0) // bd definition // %buf34 - local buffer // 0 - offset of transfer // 256 - length of transfer // 0 - A/B mode enable (default is disabled) - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_in, "Release", 1) - AIE.next_bd ^end + aie.dma_bd(<%buf34 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock34_in, "Release", 1) + aie.next_bd ^end ^bd1: - AIE.use_lock(%lock34_out, "Acquire", 1) - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_out, "Release", 0) - AIE.next_bd ^end + aie.use_lock(%lock34_out, "Acquire", 1) + aie.dma_bd(<%buf34 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock34_out, "Release", 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/tutorials/tutorial-6/aie.mlir b/tutorials/tutorial-6/aie.mlir index ad46e6fb4b..4bb2468ebd 100644 --- a/tutorials/tutorial-6/aie.mlir +++ b/tutorials/tutorial-6/aie.mlir @@ -19,68 +19,68 @@ // AIE tiles, buffers, and data movement module @tutorial_6 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // 2 tiles in row 4 (col 1 and col 2) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) // Declare local memory of tile(1,4) and tile (3,4) which are not shared - %buf14 = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> // Declare local locks for tile(1,4) and tile(3,4) giving new // unique lock ID values 6 and 7 - %lock14_6 = AIE.lock(%tile14, 6) { sym_name = "lock_a14_6" } - %lock34_7 = AIE.lock(%tile34, 7) { sym_name = "lock_a34_7" } - %lock34_8 = AIE.lock(%tile34, 8) { sym_name = "lock_a34_8" } + %lock14_6 = aie.lock(%tile14, 6) { sym_name = "lock_a14_6" } + %lock34_7 = aie.lock(%tile34, 7) { sym_name = "lock_a34_7" } + %lock34_8 = aie.lock(%tile34, 8) { sym_name = "lock_a34_8" } // Connect DMA channel 0 on tile(1,4) to DMA channel 1 in tile(3,4) // with automatic shortest distance routing for packets (ID=0xD). // Packet IDs are a 5-bit value. // NOTE: By default, packet header are dropped at destination - AIE.packet_flow(0xD) { - AIE.packet_source<%tile14, DMA: 0> - AIE.packet_dest<%tile34, DMA : 1> + aie.packet_flow(0xD) { + aie.packet_source<%tile14, DMA: 0> + aie.packet_dest<%tile34, DMA : 1> } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock14_6, "Acquire", 0) + aie.use_lock(%lock14_6, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf14[%idx] : memref<256xi32> // Release lock to 1 so tile(2,4) can acquire and begin processing - AIE.use_lock(%lock14_6, "Release", 1) - AIE.end + aie.use_lock(%lock14_6, "Release", 1) + aie.end } - %mem14 = AIE.mem(%tile14) { - AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_6, Acquire, 1) + aie.use_lock(%lock14_6, Acquire, 1) // Insert header for packet routing // 0x4 - packet type, arbitary value // 0xD - packet ID, arbitary value but used for routing - AIE.dma_bd_packet(0x4, 0xD) - AIE.dma_bd(%buf14 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock14_6, Release, 0) - AIE.next_bd ^end + aie.dma_bd_packet(0x4, 0xD) + aie.dma_bd(<%buf14 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock14_6, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { - AIE.use_lock(%lock34_8, "Acquire", 0) + %core34 = aie.core(%tile34) { + aie.use_lock(%lock34_8, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock34_7, "Acquire", 1) + aie.use_lock(%lock34_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf34[%idx1] : memref<256xi32> @@ -89,22 +89,22 @@ module @tutorial_6 { %idx2 = arith.constant 5 : index memref.store %d2, %buf34[%idx2] : memref<256xi32> - AIE.use_lock(%lock34_7, "Release", 0) - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_7, "Release", 0) + aie.use_lock(%lock34_8, "Release", 1) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem34 = AIE.mem(%tile34) { - AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem34 = aie.mem(%tile34) { + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock34_7, Acquire, 0) + aie.use_lock(%lock34_7, Acquire, 0) // Packets headers are dropped so no need to define packet behavior here - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_7, Release, 1) - AIE.next_bd ^end + aie.dma_bd(<%buf34 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock34_7, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } } diff --git a/tutorials/tutorial-7/aie.mlir b/tutorials/tutorial-7/aie.mlir index aad8df3460..9bf6296304 100644 --- a/tutorials/tutorial-7/aie.mlir +++ b/tutorials/tutorial-7/aie.mlir @@ -19,36 +19,36 @@ // AIE tiles, buffers, and data movement module @tutorial_7 { - AIE.device(xcvc1902) { + aie.device(xcvc1902) { // 2 tiles in row 4 (col 1 and col 3) and 1 in row 5 (col 3) // even rows have local memory to its left // odd rows have local memory to its right - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) - %tile35 = AIE.tile(3, 5) + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) + %tile35 = aie.tile(3, 5) // Declare an object FIFO between the producer shim tile (7,0) and consumer tiles (3,4) and (3,5). // As there are multiple consumers, this objectFifo represents a one-to-many broadcast. // The size of the object FIFO, i.e. its number of elements, is 1. // Objects, i.e. allocated memory elements, have type memref<256xi32>. // Each (producer tile / consumer tile) pair does not share memory. - AIE.objectfifo @of (%tile14, {%tile34,%tile35}, 1 : i32) : !AIE.objectfifo> + aie.objectfifo @of (%tile14, {%tile34,%tile35}, 1 : i32) : !aie.objectfifo> // These locks will be used to gate when our end cores are done - %lock34_8 = AIE.lock(%tile34, 8) { sym_name = "lock_a34_8" } - %lock35_8 = AIE.lock(%tile35, 8) { sym_name = "lock_a35_8" } + %lock34_8 = aie.lock(%tile34, 8) { sym_name = "lock_a34_8" } + %lock35_8 = aie.lock(%tile35, 8) { sym_name = "lock_a35_8" } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire a subview with one object from the object FIFO. // This is equivalent to acquiring an AIE lock before accessing an AIE buffer. // This core acquires objects as a Producer: this impacts the acquire value of the lock // that is generated through the object FIFO lowering. - %inputSubview = AIE.objectfifo.acquire @of (Produce, 1) : !AIE.objectfifosubview> + %inputSubview = aie.objectfifo.acquire @of (Produce, 1) : !aie.objectfifosubview> // Access the first, and only, element of the subview. - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %val = arith.constant 14 : i32 %idx = arith.constant 3 : index @@ -58,18 +58,18 @@ module @tutorial_7 { // This is equivalent to releasing an AIE lock after accessing an AIE buffer. // This core releases objects as a Producer: this impacts the release value of the lock // that is generated through the object FIFO lowering. - AIE.objectfifo.release @of (Produce, 1) - AIE.end + aie.objectfifo.release @of (Produce, 1) + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock34_8, "Acquire", 0) + aie.use_lock(%lock34_8, "Acquire", 0) - %inputSubview = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %inputSubview = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %idx1 = arith.constant 3 : index %d1 = memref.load %input[%idx1] : memref<256xi32> @@ -78,21 +78,21 @@ module @tutorial_7 { %idx2 = arith.constant 5 : index memref.store %d2, %input[%idx2] : memref<256xi32> - AIE.objectfifo.release @of (Consume, 1) + aie.objectfifo.release @of (Consume, 1) // This release means our 2nd core is done - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_8, "Release", 1) + aie.end } // Define core algorithm for tile(3,5) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core35 = AIE.core(%tile35) { + %core35 = aie.core(%tile35) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock35_8, "Acquire", 0) + aie.use_lock(%lock35_8, "Acquire", 0) - %inputSubview = AIE.objectfifo.acquire @of (Consume, 1) : !AIE.objectfifosubview> - %input = AIE.objectfifo.subview.access %inputSubview[0] : !AIE.objectfifosubview> -> memref<256xi32> + %inputSubview = aie.objectfifo.acquire @of (Consume, 1) : !aie.objectfifosubview> + %input = aie.objectfifo.subview.access %inputSubview[0] : !aie.objectfifosubview> -> memref<256xi32> %idx1 = arith.constant 3 : index %d1 = memref.load %input[%idx1] : memref<256xi32> @@ -101,11 +101,11 @@ module @tutorial_7 { %idx2 = arith.constant 5 : index memref.store %d2, %input[%idx2] : memref<256xi32> - AIE.objectfifo.release @of (Consume, 1) + aie.objectfifo.release @of (Consume, 1) // This release means our 2nd core is done - AIE.use_lock(%lock35_8, "Release", 1) - AIE.end + aie.use_lock(%lock35_8, "Release", 1) + aie.end } } } diff --git a/tutorials/tutorial-7/flow/aie.mlir b/tutorials/tutorial-7/flow/aie.mlir index 4b620b62ef..55edf6f180 100644 --- a/tutorials/tutorial-7/flow/aie.mlir +++ b/tutorials/tutorial-7/flow/aie.mlir @@ -20,77 +20,77 @@ module @tutorial_7 { // 2 tiles in row 4 (col 1 and col 3) and 1 in row 5 (col 3) // even rows have local memory to its left // odd rows have local memory to its right - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) - %tile35 = AIE.tile(3, 5) + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) + %tile35 = aie.tile(3, 5) // Declare local memory of tile(1,4), tile(3,4) and tile(3,5) which are not shared - %buf14 = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> - %buf35 = AIE.buffer(%tile35) { sym_name = "a35" } : memref<256xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> + %buf35 = aie.buffer(%tile35) { sym_name = "a35" } : memref<256xi32> // Declare local locks for tile(1,4), tile(3,4) and tile(3,5) giving new // unique lock ID values 6 and 7 - %lock14_6 = AIE.lock(%tile14, 6) { sym_name = "lock_a14_6" } - %lock34_7 = AIE.lock(%tile34, 7) { sym_name = "lock_a34_7" } - %lock35_7 = AIE.lock(%tile35, 7) { sym_name = "lock_a35_7" } + %lock14_6 = aie.lock(%tile14, 6) { sym_name = "lock_a14_6" } + %lock34_7 = aie.lock(%tile34, 7) { sym_name = "lock_a34_7" } + %lock35_7 = aie.lock(%tile35, 7) { sym_name = "lock_a35_7" } // These locks will be used to gate when our end cores are done - %lock34_8 = AIE.lock(%tile34, 8) { sym_name = "lock_a34_8" } - %lock35_8 = AIE.lock(%tile35, 8) { sym_name = "lock_a35_8" } + %lock34_8 = aie.lock(%tile34, 8) { sym_name = "lock_a34_8" } + %lock35_8 = aie.lock(%tile35, 8) { sym_name = "lock_a35_8" } // Broadcast DMA channel 0 on tile(1,4) to both DMA channel 1 in // tile(3,4) and tile(3,5) with automatic shortest distance routing for // packets (ID=0xD). Additional routes can be defined for each - // unique AIE.bp_id ID value by sepcifying their definitions in a new - // AIE.bp_id(newID) { AIE.bp_dest routes ... } within the - // AIE.broadcast_packet block. + // unique aie.bp_id ID value by sepcifying their definitions in a new + // aie.bp_id(newID) { aie.bp_dest routes ... } within the + // aie.broadcast_packet block. // NOTE: By default, packet header are dropped at destination - AIEX.broadcast_packet(%tile14, DMA: 0) { - AIEX.bp_id(0xD) { - AIEX.bp_dest<%tile34, DMA: 1> - AIEX.bp_dest<%tile35, DMA: 1> + aiex.broadcast_packet(%tile14, DMA: 0) { + aiex.bp_id(0xD) { + aiex.bp_dest<%tile34, DMA: 1> + aiex.bp_dest<%tile35, DMA: 1> } } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock14_6, "Acquire", 0) + aie.use_lock(%lock14_6, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf14[%idx] : memref<256xi32> // Release lock to 1 so tile(2,4) can acquire and begin processing - AIE.use_lock(%lock14_6, "Release", 1) - AIE.end + aie.use_lock(%lock14_6, "Release", 1) + aie.end } - %mem14 = AIE.mem(%tile14) { - AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_6, Acquire, 1) + aie.use_lock(%lock14_6, Acquire, 1) // Insert header for packet routing // 0x4 - packet type, arbitary value // 0xD - packet ID, arbitary value but used for routing - AIE.dma_bd_packet(0x4, 0xD) - AIE.dma_bd(%buf14 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock14_6, Release, 0) - AIE.next_bd ^end + aie.dma_bd_packet(0x4, 0xD) + aie.dma_bd(<%buf14 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock14_6, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock34_8, "Acquire", 0) + aie.use_lock(%lock34_8, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock34_7, "Acquire", 1) + aie.use_lock(%lock34_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf34[%idx1] : memref<256xi32> @@ -99,33 +99,33 @@ module @tutorial_7 { %idx2 = arith.constant 5 : index memref.store %d2, %buf34[%idx2] : memref<256xi32> - AIE.use_lock(%lock34_7, "Release", 0) + aie.use_lock(%lock34_7, "Release", 0) // This release means our 2nd core is done - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_8, "Release", 1) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem34 = AIE.mem(%tile34) { - AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem34 = aie.mem(%tile34) { + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock34_7, Acquire, 0) + aie.use_lock(%lock34_7, Acquire, 0) // Packets headers are dropped so no need to define packet behavior here - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_7, Release, 1) - AIE.next_bd ^end + aie.dma_bd(<%buf34 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock34_7, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,5) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core35 = AIE.core(%tile35) { + %core35 = aie.core(%tile35) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock35_8, "Acquire", 0) + aie.use_lock(%lock35_8, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock35_7, "Acquire", 1) + aie.use_lock(%lock35_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf35[%idx1] : memref<256xi32> @@ -134,23 +134,23 @@ module @tutorial_7 { %idx2 = arith.constant 5 : index memref.store %d2, %buf35[%idx2] : memref<256xi32> - AIE.use_lock(%lock35_7, "Release", 0) + aie.use_lock(%lock35_7, "Release", 0) // This release means our 2nd core is done - AIE.use_lock(%lock35_8, "Release", 1) - AIE.end + aie.use_lock(%lock35_8, "Release", 1) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem35 = AIE.mem(%tile35) { - AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem35 = aie.mem(%tile35) { + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock35_7, Acquire, 0) + aie.use_lock(%lock35_7, Acquire, 0) // Packets headers are dropped so no need to define packet behavior here - AIE.dma_bd(%buf35 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock35_7, Release, 1) - AIE.next_bd ^end + aie.dma_bd(<%buf35 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock35_7, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/tutorials/tutorial-7/switchbox/aie.mlir b/tutorials/tutorial-7/switchbox/aie.mlir index 4b620b62ef..55edf6f180 100644 --- a/tutorials/tutorial-7/switchbox/aie.mlir +++ b/tutorials/tutorial-7/switchbox/aie.mlir @@ -20,77 +20,77 @@ module @tutorial_7 { // 2 tiles in row 4 (col 1 and col 3) and 1 in row 5 (col 3) // even rows have local memory to its left // odd rows have local memory to its right - %tile14 = AIE.tile(1, 4) - %tile34 = AIE.tile(3, 4) - %tile35 = AIE.tile(3, 5) + %tile14 = aie.tile(1, 4) + %tile34 = aie.tile(3, 4) + %tile35 = aie.tile(3, 5) // Declare local memory of tile(1,4), tile(3,4) and tile(3,5) which are not shared - %buf14 = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> - %buf34 = AIE.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> - %buf35 = AIE.buffer(%tile35) { sym_name = "a35" } : memref<256xi32> + %buf14 = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf34 = aie.buffer(%tile34) { sym_name = "a34" } : memref<256xi32> + %buf35 = aie.buffer(%tile35) { sym_name = "a35" } : memref<256xi32> // Declare local locks for tile(1,4), tile(3,4) and tile(3,5) giving new // unique lock ID values 6 and 7 - %lock14_6 = AIE.lock(%tile14, 6) { sym_name = "lock_a14_6" } - %lock34_7 = AIE.lock(%tile34, 7) { sym_name = "lock_a34_7" } - %lock35_7 = AIE.lock(%tile35, 7) { sym_name = "lock_a35_7" } + %lock14_6 = aie.lock(%tile14, 6) { sym_name = "lock_a14_6" } + %lock34_7 = aie.lock(%tile34, 7) { sym_name = "lock_a34_7" } + %lock35_7 = aie.lock(%tile35, 7) { sym_name = "lock_a35_7" } // These locks will be used to gate when our end cores are done - %lock34_8 = AIE.lock(%tile34, 8) { sym_name = "lock_a34_8" } - %lock35_8 = AIE.lock(%tile35, 8) { sym_name = "lock_a35_8" } + %lock34_8 = aie.lock(%tile34, 8) { sym_name = "lock_a34_8" } + %lock35_8 = aie.lock(%tile35, 8) { sym_name = "lock_a35_8" } // Broadcast DMA channel 0 on tile(1,4) to both DMA channel 1 in // tile(3,4) and tile(3,5) with automatic shortest distance routing for // packets (ID=0xD). Additional routes can be defined for each - // unique AIE.bp_id ID value by sepcifying their definitions in a new - // AIE.bp_id(newID) { AIE.bp_dest routes ... } within the - // AIE.broadcast_packet block. + // unique aie.bp_id ID value by sepcifying their definitions in a new + // aie.bp_id(newID) { aie.bp_dest routes ... } within the + // aie.broadcast_packet block. // NOTE: By default, packet header are dropped at destination - AIEX.broadcast_packet(%tile14, DMA: 0) { - AIEX.bp_id(0xD) { - AIEX.bp_dest<%tile34, DMA: 1> - AIEX.bp_dest<%tile35, DMA: 1> + aiex.broadcast_packet(%tile14, DMA: 0) { + aiex.bp_id(0xD) { + aiex.bp_dest<%tile34, DMA: 1> + aiex.bp_dest<%tile35, DMA: 1> } } // Define core algorithm for tile(1,4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock14_6, "Acquire", 0) + aie.use_lock(%lock14_6, "Acquire", 0) %val = arith.constant 14 : i32 %idx = arith.constant 3 : index memref.store %val, %buf14[%idx] : memref<256xi32> // Release lock to 1 so tile(2,4) can acquire and begin processing - AIE.use_lock(%lock14_6, "Release", 1) - AIE.end + aie.use_lock(%lock14_6, "Release", 1) + aie.end } - %mem14 = AIE.mem(%tile14) { - AIE.dma_start("MM2S", 0, ^bd0, ^end) + %mem14 = aie.mem(%tile14) { + aie.dma_start("MM2S", 0, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock14_6, Acquire, 1) + aie.use_lock(%lock14_6, Acquire, 1) // Insert header for packet routing // 0x4 - packet type, arbitary value // 0xD - packet ID, arbitary value but used for routing - AIE.dma_bd_packet(0x4, 0xD) - AIE.dma_bd(%buf14 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock14_6, Release, 0) - AIE.next_bd ^end + aie.dma_bd_packet(0x4, 0xD) + aie.dma_bd(<%buf14 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock14_6, Release, 0) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core34 = AIE.core(%tile34) { + %core34 = aie.core(%tile34) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock34_8, "Acquire", 0) + aie.use_lock(%lock34_8, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock34_7, "Acquire", 1) + aie.use_lock(%lock34_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf34[%idx1] : memref<256xi32> @@ -99,33 +99,33 @@ module @tutorial_7 { %idx2 = arith.constant 5 : index memref.store %d2, %buf34[%idx2] : memref<256xi32> - AIE.use_lock(%lock34_7, "Release", 0) + aie.use_lock(%lock34_7, "Release", 0) // This release means our 2nd core is done - AIE.use_lock(%lock34_8, "Release", 1) - AIE.end + aie.use_lock(%lock34_8, "Release", 1) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem34 = AIE.mem(%tile34) { - AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem34 = aie.mem(%tile34) { + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock34_7, Acquire, 0) + aie.use_lock(%lock34_7, Acquire, 0) // Packets headers are dropped so no need to define packet behavior here - AIE.dma_bd(%buf34 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock34_7, Release, 1) - AIE.next_bd ^end + aie.dma_bd(<%buf34 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock34_7, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } // Define core algorithm for tile(3,5) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core35 = AIE.core(%tile35) { + %core35 = aie.core(%tile35) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock35_8, "Acquire", 0) + aie.use_lock(%lock35_8, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - AIE.use_lock(%lock35_7, "Acquire", 1) + aie.use_lock(%lock35_7, "Acquire", 1) %idx1 = arith.constant 3 : index %d1 = memref.load %buf35[%idx1] : memref<256xi32> @@ -134,23 +134,23 @@ module @tutorial_7 { %idx2 = arith.constant 5 : index memref.store %d2, %buf35[%idx2] : memref<256xi32> - AIE.use_lock(%lock35_7, "Release", 0) + aie.use_lock(%lock35_7, "Release", 0) // This release means our 2nd core is done - AIE.use_lock(%lock35_8, "Release", 1) - AIE.end + aie.use_lock(%lock35_8, "Release", 1) + aie.end } // Define local tile memory behavior (i.e. tileDMA) - %mem35 = AIE.mem(%tile35) { - AIE.dma_start("S2MM", 1, ^bd0, ^end) + %mem35 = aie.mem(%tile35) { + aie.dma_start("S2MM", 1, ^bd0, ^end) ^bd0: - AIE.use_lock(%lock35_7, Acquire, 0) + aie.use_lock(%lock35_7, Acquire, 0) // Packets headers are dropped so no need to define packet behavior here - AIE.dma_bd(%buf35 : memref<256xi32>, 0, 256) - AIE.use_lock(%lock35_7, Release, 1) - AIE.next_bd ^end + aie.dma_bd(<%buf35 : memref<256xi32>, 0, 256>, A) + aie.use_lock(%lock35_7, Release, 1) + aie.next_bd ^end ^end: - AIE.end + aie.end } } diff --git a/tutorials/tutorial-8/aie.mlir b/tutorials/tutorial-8/aie.mlir index ee7bbcb2c4..48a2178aaf 100644 --- a/tutorials/tutorial-8/aie.mlir +++ b/tutorials/tutorial-8/aie.mlir @@ -21,11 +21,11 @@ module @tutorial_8 { // 2 tiles in row 3 (col 1 and col 2) // odd rows have local memory to its right - %tile13 = AIE.tile(1, 3) - %tile23 = AIE.tile(2, 3) + %tile13 = aie.tile(1, 3) + %tile23 = aie.tile(2, 3) // Declare local memory of tile(2,4) which is shared with tile(1,4) - %buf = AIE.buffer(%tile23) { sym_name = "a23" } : memref<256xi32> + %buf = aie.buffer(%tile23) { sym_name = "a23" } : memref<256xi32> // declare 2 kernel functions name "extern_kernel1" and "extern_kernel2" // with one positional function argument, in this case mapped to a memref @@ -33,34 +33,34 @@ module @tutorial_8 { func.func private @extern_kernel2(%b: memref<256xi32>) -> () // Declare shared lock (belonging to tile(2,4), lock ID=1) - // %lock13_1 = AIE.lock(%tile13, 1) { sym_name = "lock_13_1" } - %lock13_2 = AIE.lock(%tile13, 2) { sym_name = "lock_13_2" } + // %lock13_1 = aie.lock(%tile13, 1) { sym_name = "lock_13_1" } + %lock13_2 = aie.lock(%tile13, 2) { sym_name = "lock_13_2" } // Define core algorithm for tile(1,4) // buf[3] = 13 - %core13 = AIE.core(%tile13) { + %core13 = aie.core(%tile13) { // Locks init value is Release 0, so this will always succeed first - // AIE.use_lock(%lock13_1, "Acquire", 0) + // aie.use_lock(%lock13_1, "Acquire", 0) // %val = arith.constant 14 : i384 - // AIE.putCascade(%val : i384) + // aie.putCascade(%val : i384) func.call @extern_kernel1() : () -> () - // AIE.use_lock(%lock13_1, "Release", 1) - AIE.end + // aie.use_lock(%lock13_1, "Release", 1) + aie.end } { link_with="kernel1.o" } // Define core algorithm for tile(2,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core23 = AIE.core(%tile23) { + %core23 = aie.core(%tile23) { // This acquire succeeds when the core is enabled - AIE.use_lock(%lock13_2, "Acquire", 0) + aie.use_lock(%lock13_2, "Acquire", 0) // This acquire will stall since locks are initialized to Release, 0 - // AIE.use_lock(%lock13_1, "Acquire", 1) + // aie.use_lock(%lock13_1, "Acquire", 1) - // %cas1 = AIE.get_cascade() : i384 + // %cas1 = aie.get_cascade() : i384 // %d1 = arith.trunci %cas1 : i384 to i32 // %c1 = arith.constant 100 : i32 // %d2 = arith.addi %d1, %c1 : i32 @@ -69,11 +69,11 @@ module @tutorial_8 { func.call @extern_kernel2(%buf) : (memref<256xi32>) -> () - // AIE.use_lock(%lock13_1, "Release", 0) + // aie.use_lock(%lock13_1, "Release", 0) // This release means our 2nd core is done - AIE.use_lock(%lock13_2, "Release", 1) - AIE.end + aie.use_lock(%lock13_2, "Release", 1) + aie.end } { link_with="kernel2.o" } } \ No newline at end of file diff --git a/tutorials/tutorial-8/answers/aie.mlir b/tutorials/tutorial-8/answers/aie.mlir index 7ce1888af5..420720ebb7 100755 --- a/tutorials/tutorial-8/answers/aie.mlir +++ b/tutorials/tutorial-8/answers/aie.mlir @@ -22,11 +22,11 @@ module @tutorial_8 { // 2 tiles in row 4 (col 1 and col 2) // even rows have local memory to its left - %tile14 = AIE.tile(1, 4) - %tile24 = AIE.tile(2, 4) + %tile14 = aie.tile(1, 4) + %tile24 = aie.tile(2, 4) // Declare local memory of tile(2,4) which is shared with tile(1,4), do not change symbolic name to allow reusing original test.cpp - %buf = AIE.buffer(%tile14) { sym_name = "a23" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a23" } : memref<256xi32> // declare 2 kernel functions name "extern_kernel1" and "extern_kernel2" // with one positional function argument, in this case mapped to a memref @@ -35,34 +35,34 @@ module @tutorial_8 { // Declare shared lock (belonging to tile(2,4), lock ID=1), do not change symbolic name to allow reuse of test.cpp - %lock14_1 = AIE.lock(%tile14, 1) { sym_name = "lock_13_2" } + %lock14_1 = aie.lock(%tile14, 1) { sym_name = "lock_13_2" } // Define core algorithm for tile(1,4) // buf[3] = 13 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Locks init value is Release 0, so this will always succeed first - AIE.use_lock(%lock14_1, "Acquire", 0) + aie.use_lock(%lock14_1, "Acquire", 0) // %val = arith.constant 13 : i384 // //%idx = arith.constant 3 : index // //memref.store %val, %buf[%idx] : memref<256xi32> - // AIE.putCascade(%val : i384) + // aie.putCascade(%val : i384) func.call @extern_kernel2(%buf) : (memref<256xi32>) -> () - // AIE.use_lock(%lock23_1, "Release", 1) - AIE.end + // aie.use_lock(%lock23_1, "Release", 1) + aie.end } { link_with="kernel2.o" } // Define core algorithm for tile(2,4) which reads value set by tile(1,4) // buf[5] = buf[3] + 100 - %core24 = AIE.core(%tile24) { + %core24 = aie.core(%tile24) { // This acquire will stall since locks are initialized to Release, 0 - // AIE.use_lock(%lock23_1, "Acquire", 1) + // aie.use_lock(%lock23_1, "Acquire", 1) //%idx1 = arith.constant 3 : index //%d1 = memref.load %buf[%idx1] : memref<256xi32> - // %cas1 = AIE.get_cascade() : i384 + // %cas1 = aie.get_cascade() : i384 // %d1 = arith.trunci %cas1 : i384 to i32 // %c1 = arith.constant 100 : i32 // %d2 = arith.addi %d1, %c1 : i32 @@ -71,8 +71,8 @@ module @tutorial_8 { func.call @extern_kernel1() : () -> () - // AIE.use_lock(%lock24_1, "Release", 0) - AIE.end + // aie.use_lock(%lock24_1, "Release", 0) + aie.end } { link_with="kernel1.o" } } \ No newline at end of file diff --git a/tutorials/tutorial-9/aie.mlir b/tutorials/tutorial-9/aie.mlir index 360d036ff3..3fc6ab9d41 100644 --- a/tutorials/tutorial-9/aie.mlir +++ b/tutorials/tutorial-9/aie.mlir @@ -20,18 +20,18 @@ module @tutorial_9 { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %buf = AIE.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> + %buf = aie.buffer(%tile14) { sym_name = "a14" } : memref<256xi32> // Declare a lock 0 associated with tile(1,4) with a // symbolic name "lock14_0" which can be used by access functions // in the generated API (aie.mlir.prj/aie_inc.cpp) - %lock14_0 = AIE.lock(%tile14, 0) { sym_name = "lock14_0" } + %lock14_0 = aie.lock(%tile14, 0) { sym_name = "lock14_0" } // declare kernel function name "extern_kernel" with one positional // function argument, in this case mapped to a memref @@ -39,9 +39,9 @@ module @tutorial_9 { // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire lock right when core starts - AIE.use_lock(%lock14_0, "Acquire", 0) + aie.use_lock(%lock14_0, "Acquire", 0) // Call function and map local buffer %buf to function argument func.call @extern_kernel(%buf) : (memref<256xi32>) -> () @@ -50,8 +50,8 @@ module @tutorial_9 { // This can be used by host to mark beginning/end of a program or // when the host is trying to determine when the program is done // by acquiring this lock (with value 1). - AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + aie.use_lock(%lock14_0, "Release", 1) + aie.end } { link_with="kernel.o" } // indicate kernel object name used by this core } diff --git a/tutorials/tutorial-9/answers/aie_matmul.mlir b/tutorials/tutorial-9/answers/aie_matmul.mlir index f6bd06f1d9..d2b58d2cdd 100644 --- a/tutorials/tutorial-9/answers/aie_matmul.mlir +++ b/tutorials/tutorial-9/answers/aie_matmul.mlir @@ -20,21 +20,21 @@ module @tutorial_9 { // Declare tile object of the AIE class located at position col 1, row 4 - %tile14 = AIE.tile(1, 4) + %tile14 = aie.tile(1, 4) // Declare buffer for tile(1, 4) with symbolic name "a14" and // size 256 deep x int32 wide. By default, the address of // this buffer begins after the stack (1024 Bytes offset) and // all subsequent buffers are allocated one after another in memory. - %bufa = AIE.buffer(%tile14) { sym_name = "a14" } : memref<32xi32> - %bufb = AIE.buffer(%tile14) { sym_name = "b14" } : memref<32xi32> - %bufacc = AIE.buffer(%tile14) { sym_name = "acc14" } : memref<32xi32> - %bufc = AIE.buffer(%tile14) { sym_name = "c14" } : memref<32xi32> + %bufa = aie.buffer(%tile14) { sym_name = "a14" } : memref<32xi32> + %bufb = aie.buffer(%tile14) { sym_name = "b14" } : memref<32xi32> + %bufacc = aie.buffer(%tile14) { sym_name = "acc14" } : memref<32xi32> + %bufc = aie.buffer(%tile14) { sym_name = "c14" } : memref<32xi32> // Declare a lock 0 associated with tile(1,4) with a // symbolic name "lock14_0" which can be used by access functions // in the generated API (aie.mlir.prj/aie_inc.cpp) - %lock14_0 = AIE.lock(%tile14, 0) { sym_name = "lock14_0" } + %lock14_0 = aie.lock(%tile14, 0) { sym_name = "lock14_0" } // declare kernel function name "extern_kernel" with one positional // function argument, in this case mapped to a memref @@ -42,9 +42,9 @@ module @tutorial_9 { // Define the algorithm for the core of tile(1, 4) // buf[3] = 14 - %core14 = AIE.core(%tile14) { + %core14 = aie.core(%tile14) { // Acquire lock right when core starts - AIE.use_lock(%lock14_0, "Acquire", 0) + aie.use_lock(%lock14_0, "Acquire", 0) // Call function and map local buffer %buf to function argument func.call @extern_kernel(%bufa, %bufb, %bufacc, %bufc) : (memref<32xi32>, memref<32xi32>, memref<32xi32>, memref<32xi32>) -> () @@ -53,8 +53,8 @@ module @tutorial_9 { // This can be used by host to mark beginning/end of a program or // when the host is trying to determine when the program is done // by acquiring this lock (with value 1). - AIE.use_lock(%lock14_0, "Release", 1) - AIE.end + aie.use_lock(%lock14_0, "Release", 1) + aie.end } { link_with="kernel_matmul.o" } // indicate kernel object name used by this core }