diff --git a/lib/Dialect/AIE/IR/AIEDialect.cpp b/lib/Dialect/AIE/IR/AIEDialect.cpp index e4b9eefcbf..97326655f9 100644 --- a/lib/Dialect/AIE/IR/AIEDialect.cpp +++ b/lib/Dialect/AIE/IR/AIEDialect.cpp @@ -341,7 +341,8 @@ void AIEDialect::initialize() { // Check that the operation only contains terminators in // TerminatorOpTypes. -template struct HasSomeTerminator { +template +struct HasSomeTerminator { static LogicalResult verifyTrait(Operation *op) { for (auto ®ion : op->getRegions()) { for (auto &block : region) { @@ -835,7 +836,7 @@ LogicalResult TileOp::verify() { auto users = getResult().getUsers(); bool found = false; - for (auto user : users) { + for (auto *user : users) { if (llvm::isa(*user)) { if (found) return emitOpError("can only have one switchbox"); @@ -896,10 +897,12 @@ LogicalResult SwitchboxOp::verify() { sourceset.insert(source); Port dest = {connectOp.getDestBundle(), connectOp.destIndex()}; - if (destset.count(dest)) + if (destset.count(dest)) { return connectOp.emitOpError("targets same destination ") - << stringifyWireBundle(dest.bundle) << ": " << dest.channel - << " as another connect operation"; + << to_string(dest) << " as another connect operation (from " + << to_string(source) + << ", tile: " << to_string(this->getTileOp().getTileID()) << ")"; + } destset.insert(dest); if (connectOp.sourceIndex() < 0) @@ -1386,7 +1389,8 @@ int SwitchboxOp::colIndex() { return getTileOp().colIndex(); } int SwitchboxOp::rowIndex() { return getTileOp().rowIndex(); } -template struct HasSomeParent { +template +struct HasSomeParent { static LogicalResult verifyTrait(Operation *op) { Operation *operation = op->getParentOp(); while (operation) { diff --git a/python/util.py b/python/util.py index 6ebbd9ed95..07b919afb1 100644 --- a/python/util.py +++ b/python/util.py @@ -192,7 +192,7 @@ def route_using_cp( min_edges=False, seed=10, num_workers=multiprocessing.cpu_count() // 2, - max_time_in_seconds=600, + timeout=600, ): from ortools.sat.python import cp_model @@ -202,7 +202,7 @@ def route_using_cp( # For determinism solver.parameters.random_seed = seed solver.parameters.num_workers = num_workers - solver.parameters.max_time_in_seconds = max_time_in_seconds + solver.parameters.max_time_in_seconds = timeout # Create variable for each edge, for each path flow_vars = {} @@ -287,7 +287,7 @@ def route_using_cp( return flow_paths - warnings.warn("Couldn't route.") + raise RuntimeError("Couldn't route.") def route_using_ilp(DG, flows): @@ -467,6 +467,7 @@ def pythonize_bool(value): class Router: max_col: int max_row: int + timeout: int use_gurobi: bool = False # Don't use actual binding here to prevent a blow up since class bodies are executed # at module load time. @@ -475,13 +476,14 @@ class Router: fixed_connections: List[Tuple["TileID", "Port"]] routing_solution: Dict["PathEndPoint", "SwitchSettings"] - def __init__(self, use_gurobi=False): + def __init__(self, use_gurobi=False, timeout=600): self.flows = [] self.fixed_connections = [] self.routing_solution = None self.use_gurobi = use_gurobi or pythonize_bool( os.getenv("ROUTER_USE_GUROBI", "False") ) + self.timeout = timeout def initialize(self, max_col, max_row, target_model): self.max_col = max_col @@ -500,7 +502,9 @@ def find_paths(self): if self.use_gurobi: flow_paths = route_using_ilp(DG, self.flows) else: - flow_paths = route_using_cp(DG, self.flows, num_workers=10) + flow_paths = route_using_cp( + DG, self.flows, num_workers=10, timeout=self.timeout + ) self.routing_solution = get_routing_solution(DG, flow_paths) return self.routing_solution diff --git a/test/python/python_passes.py b/test/python/python_passes.py index 9dcaaaf46b..b9a0f50995 100644 --- a/test/python/python_passes.py +++ b/test/python/python_passes.py @@ -5,7 +5,6 @@ # REQUIRES: python_passes from pathlib import Path -from pprint import pprint # noinspection PyUnresolvedReferences import aie.dialects.aie @@ -18,6 +17,8 @@ from aie.passmanager import PassManager from aie.util import Router +TIMEOUT = 10 + def run(f): with Context(), Location.unknown(): @@ -28,307 +29,304 @@ def run(f): THIS_FILE = __file__ -# CHECK-LABEL: TEST: test_broadcast -@run -def test_broadcast(): - with open(Path(THIS_FILE).parent.parent / "create-flows" / "broadcast.mlir") as f: - mlir_module = Module.parse(f.read()) - r = Router() - pass_ = create_python_router_pass(r) - pm = PassManager() - pass_manager_add_owned_pass(pm, pass_) - device = mlir_module.body.operations[0] - pm.run(device.operation) - - # CHECK: PathEndPoint(Switchbox(2, 0): (DMA: 0)) - # OrderedDict([(Switchbox(2, 0), (DMA: 0) -> {(W: 0), (N: 0), (N: 1), (E: 0)}), - # (Switchbox(1, 0), (E: 0) -> {(N: 0)}), - # (Switchbox(1, 1), (S: 0) -> {(N: 0)}), - # (Switchbox(1, 2), (S: 0) -> {(N: 0)}), - # (Switchbox(1, 3), (S: 0) -> {(DMA: 0)}), - # (Switchbox(2, 1), (S: 0) -> {(N: 0), (E: 0)}), - # (Switchbox(3, 1), (W: 0) -> {(DMA: 0)}), - # (Switchbox(3, 0), (W: 0) -> {(E: 0)}), - # (Switchbox(4, 0), (W: 0) -> {(N: 0)}), - # (Switchbox(4, 1), (S: 0) -> {(E: 0)}), - # (Switchbox(5, 1), (W: 0) -> {(E: 0)}), - # (Switchbox(6, 1), (W: 0) -> {(E: 0)}), - # (Switchbox(7, 1), (W: 0) -> {(DMA: 0)}), - # (Switchbox(2, 2), (S: 0) -> {(E: 0)}), - # (Switchbox(3, 2), (W: 0) -> {(E: 0)}), - # (Switchbox(4, 2), (W: 0) -> {(E: 0)}), - # (Switchbox(5, 2), (W: 0) -> {(E: 0)}), - # (Switchbox(6, 2), (W: 0) -> {(E: 0)}), - # (Switchbox(7, 2), (W: 0) -> {(E: 0)}), - # (Switchbox(8, 2), (W: 0) -> {(DMA: 0)})]) - # PathEndPoint(Switchbox(6, 0): (DMA: 0)) - # OrderedDict([(Switchbox(6, 0), (DMA: 0) -> {(W: 0), (W: 1), (N: 0), (E: 0)}), - # (Switchbox(5, 0), (E: 0) -> {(W: 0), (N: 0)}), - # (Switchbox(4, 0), (E: 0) -> {(W: 0)}), - # (Switchbox(3, 0), (E: 0) -> {(N: 0)}), - # (Switchbox(3, 1), (S: 0) -> {(DMA: 1), (W: 0)}), - # (Switchbox(2, 1), (E: 0) -> {(W: 0)}), - # (Switchbox(1, 1), (E: 0) -> {(W: 0)}), - # (Switchbox(0, 1), (E: 0) -> {(N: 0)}), - # (Switchbox(0, 2), (S: 0) -> {(DMA: 1)}), - # (Switchbox(7, 0), (W: 0) -> {(N: 0)}), - # (Switchbox(7, 1), (S: 0) -> {(N: 0)}), - # (Switchbox(7, 2), (S: 0) -> {(N: 0)}), - # (Switchbox(7, 3), (S: 0) -> {(E: 0)}), - # (Switchbox(8, 3), (W: 0) -> {(DMA: 1)}), - # (Switchbox(5, 1), (S: 0) -> {(W: 0), (N: 0)}), - # (Switchbox(5, 2), (S: 0) -> {(W: 0)}), - # (Switchbox(4, 2), (E: 0) -> {(W: 0)}), - # (Switchbox(3, 2), (E: 0) -> {(W: 0)}), - # (Switchbox(2, 2), (E: 0) -> {(DMA: 1)}), - # (Switchbox(6, 1), (S: 0) -> {(W: 0)}), - # (Switchbox(4, 1), (E: 0) -> {(W: 0)})]) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - # CHECK: %switchbox_1_0 = AIE.switchbox(%tile_1_0) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_1_1 = AIE.switchbox(%tile_1_1) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_1_2 = AIE.tile(1, 2) - # CHECK: %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_1_3 = AIE.switchbox(%tile_1_3) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_2_0 = AIE.switchbox(%tile_2_0) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %shimmux_2_0 = AIE.shimmux(%tile_2_0) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_2_1 = AIE.tile(2, 1) - # CHECK: %switchbox_2_1 = AIE.switchbox(%tile_2_1) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_2_2 = AIE.switchbox(%tile_2_2) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_3_0 = AIE.switchbox(%tile_3_0) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_3_1 = AIE.switchbox(%tile_3_1) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_3_2 = AIE.tile(3, 2) - # CHECK: %switchbox_3_2 = AIE.switchbox(%tile_3_2) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_4_0 = AIE.tile(4, 0) - # CHECK: %switchbox_4_0 = AIE.switchbox(%tile_4_0) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_4_1 = AIE.tile(4, 1) - # CHECK: %switchbox_4_1 = AIE.switchbox(%tile_4_1) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_4_2 = AIE.tile(4, 2) - # CHECK: %switchbox_4_2 = AIE.switchbox(%tile_4_2) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_5_1 = AIE.tile(5, 1) - # CHECK: %switchbox_5_1 = AIE.switchbox(%tile_5_1) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_5_2 = AIE.tile(5, 2) - # CHECK: %switchbox_5_2 = AIE.switchbox(%tile_5_2) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_6_1 = AIE.tile(6, 1) - # CHECK: %switchbox_6_1 = AIE.switchbox(%tile_6_1) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_6_2 = AIE.tile(6, 2) - # CHECK: %switchbox_6_2 = AIE.switchbox(%tile_6_2) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_7_1 = AIE.switchbox(%tile_7_1) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_7_2 = AIE.switchbox(%tile_7_2) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_8_2 = AIE.switchbox(%tile_8_2) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_0_1 = AIE.tile(0, 1) - # CHECK: %switchbox_0_1 = AIE.switchbox(%tile_0_1) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_0_2 = AIE.switchbox(%tile_0_2) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_5_0 = AIE.tile(5, 0) - # CHECK: %switchbox_5_0 = AIE.switchbox(%tile_5_0) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_6_0 = AIE.switchbox(%tile_6_0) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %shimmux_6_0 = AIE.shimmux(%tile_6_0) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_7_0 = AIE.switchbox(%tile_7_0) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_7_3 = AIE.switchbox(%tile_7_3) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_8_3 = AIE.switchbox(%tile_8_3) { - # CHECK: AIE.connect - # CHECK: } - print(mlir_module) - - # CHECK-LABEL: TEST: test_flow_test_1 -# @run +@run def test_flow_test_1(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "flow_test_1.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - print(paths) - + # CHECK: %[[t20:.*]] = AIE.tile(2, 0) + # CHECK: %[[t30:.*]] = AIE.tile(3, 0) + # CHECK: %[[t34:.*]] = AIE.tile(3, 4) + # CHECK: %[[t43:.*]] = AIE.tile(4, 3) + # CHECK: %[[t44:.*]] = AIE.tile(4, 4) + # CHECK: %[[t54:.*]] = AIE.tile(5, 4) + # CHECK: %[[t60:.*]] = AIE.tile(6, 0) + # CHECK: %[[t63:.*]] = AIE.tile(6, 3) + # CHECK: %[[t70:.*]] = AIE.tile(7, 0) + # CHECK: %[[t72:.*]] = AIE.tile(7, 2) + # CHECK: %[[t83:.*]] = AIE.tile(8, 3) + # CHECK: %[[t84:.*]] = AIE.tile(8, 4) + # + # CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t63]], DMA : 0) + # CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 0) + # CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t72]], DMA : 0) + # CHECK: AIE.flow(%[[t30]], DMA : 1, %[[t54]], DMA : 0) + # + # CHECK: AIE.flow(%[[t34]], Core : 0, %[[t63]], Core : 1) + # CHECK: AIE.flow(%[[t34]], DMA : 1, %[[t70]], DMA : 0) + # CHECK: AIE.flow(%[[t43]], Core : 0, %[[t84]], Core : 1) + # CHECK: AIE.flow(%[[t43]], DMA : 1, %[[t60]], DMA : 1) + # + # CHECK: AIE.flow(%[[t44]], Core : 0, %[[t54]], Core : 1) + # CHECK: AIE.flow(%[[t44]], DMA : 1, %[[t60]], DMA : 0) + # CHECK: AIE.flow(%[[t54]], Core : 0, %[[t43]], Core : 1) + # CHECK: AIE.flow(%[[t54]], DMA : 1, %[[t30]], DMA : 1) + # + # CHECK: AIE.flow(%[[t60]], DMA : 0, %[[t44]], DMA : 0) + # CHECK: AIE.flow(%[[t60]], DMA : 1, %[[t43]], DMA : 0) + # CHECK: AIE.flow(%[[t63]], Core : 0, %[[t34]], Core : 1) + # CHECK: AIE.flow(%[[t63]], DMA : 1, %[[t20]], DMA : 1) + # + # CHECK: AIE.flow(%[[t70]], DMA : 0, %[[t34]], DMA : 0) + # CHECK: AIE.flow(%[[t70]], DMA : 1, %[[t84]], DMA : 0) + # CHECK: AIE.flow(%[[t72]], Core : 0, %[[t83]], Core : 1) + # CHECK: AIE.flow(%[[t72]], DMA : 1, %[[t30]], DMA : 0) + # + # CHECK: AIE.flow(%[[t83]], Core : 0, %[[t44]], Core : 1) + # CHECK: AIE.flow(%[[t83]], DMA : 1, %[[t20]], DMA : 0) + # CHECK: AIE.flow(%[[t84]], Core : 0, %[[t72]], Core : 1) + # CHECK: AIE.flow(%[[t84]], DMA : 1, %[[t70]], DMA : 1) print(mlir_module) # CHECK-LABEL: TEST: test_flow_test_2 -# @run +@run def test_flow_test_2(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "flow_test_2.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=TIMEOUT) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[t01:.*]] = AIE.tile(0, 1) + # CHECK: %[[t02:.*]] = AIE.tile(0, 2) + # CHECK: %[[t03:.*]] = AIE.tile(0, 3) + # CHECK: %[[t04:.*]] = AIE.tile(0, 4) + # CHECK: %[[t11:.*]] = AIE.tile(1, 1) + # CHECK: %[[t12:.*]] = AIE.tile(1, 2) + # CHECK: %[[t13:.*]] = AIE.tile(1, 3) + # CHECK: %[[t14:.*]] = AIE.tile(1, 4) + # CHECK: %[[t20:.*]] = AIE.tile(2, 0) + # CHECK: %[[t21:.*]] = AIE.tile(2, 1) + # CHECK: %[[t22:.*]] = AIE.tile(2, 2) + # CHECK: %[[t23:.*]] = AIE.tile(2, 3) + # CHECK: %[[t24:.*]] = AIE.tile(2, 4) + # CHECK: %[[t30:.*]] = AIE.tile(3, 0) + # CHECK: %[[t31:.*]] = AIE.tile(3, 1) + # CHECK: %[[t32:.*]] = AIE.tile(3, 2) + # CHECK: %[[t33:.*]] = AIE.tile(3, 3) + # CHECK: %[[t34:.*]] = AIE.tile(3, 4) + + # CHECK: AIE.flow(%[[t01]], Core : 0, %[[t12]], Core : 0) + # CHECK: AIE.flow(%[[t02]], DMA : 0, %[[t20]], DMA : 0) + # CHECK: AIE.flow(%[[t04]], Core : 0, %[[t13]], Core : 0) + # CHECK: AIE.flow(%[[t11]], Core : 0, %[[t01]], Core : 0) + # CHECK: AIE.flow(%[[t12]], Core : 0, %[[t02]], Core : 0) + # CHECK: AIE.flow(%[[t13]], DMA : 0, %[[t20]], DMA : 1) + # CHECK: AIE.flow(%[[t14]], Core : 0, %[[t04]], Core : 0) + # CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t11]], DMA : 0) + # CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t14]], DMA : 0) + # CHECK: AIE.flow(%[[t21]], Core : 0, %[[t33]], Core : 0) + # CHECK: AIE.flow(%[[t22]], Core : 0, %[[t34]], Core : 0) + # CHECK: AIE.flow(%[[t23]], Core : 1, %[[t34]], Core : 1) + # CHECK: AIE.flow(%[[t23]], DMA : 0, %[[t30]], DMA : 0) + # CHECK: AIE.flow(%[[t24]], Core : 0, %[[t23]], Core : 0) + # CHECK: AIE.flow(%[[t24]], Core : 1, %[[t33]], Core : 1) + # CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t21]], DMA : 0) + # CHECK: AIE.flow(%[[t30]], DMA : 1, %[[t31]], DMA : 1) + # CHECK: AIE.flow(%[[t31]], Core : 1, %[[t23]], Core : 1) + # CHECK: AIE.flow(%[[t32]], DMA : 1, %[[t30]], DMA : 1) + # CHECK: AIE.flow(%[[t33]], Core : 0, %[[t22]], Core : 0) + # CHECK: AIE.flow(%[[t33]], Core : 1, %[[t32]], Core : 1) + # CHECK: AIE.flow(%[[t34]], Core : 0, %[[t24]], Core : 0) + # CHECK: AIE.flow(%[[t34]], Core : 1, %[[t24]], Core : 1) print(mlir_module) # CHECK-LABEL: TEST: test_flow_test_3 -# @run +@run def test_flow_test_3(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "flow_test_3.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=TIMEOUT) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[t01:.*]] = AIE.tile(0, 1) + # CHECK: %[[t02:.*]] = AIE.tile(0, 2) + # CHECK: %[[t03:.*]] = AIE.tile(0, 3) + # CHECK: %[[t04:.*]] = AIE.tile(0, 4) + # CHECK: %[[t11:.*]] = AIE.tile(1, 1) + # CHECK: %[[t12:.*]] = AIE.tile(1, 2) + # CHECK: %[[t13:.*]] = AIE.tile(1, 3) + # CHECK: %[[t14:.*]] = AIE.tile(1, 4) + # CHECK: %[[t20:.*]] = AIE.tile(2, 0) + # CHECK: %[[t21:.*]] = AIE.tile(2, 1) + # CHECK: %[[t22:.*]] = AIE.tile(2, 2) + # CHECK: %[[t23:.*]] = AIE.tile(2, 3) + # CHECK: %[[t24:.*]] = AIE.tile(2, 4) + # CHECK: %[[t30:.*]] = AIE.tile(3, 0) + # CHECK: %[[t71:.*]] = AIE.tile(7, 1) + # CHECK: %[[t72:.*]] = AIE.tile(7, 2) + # CHECK: %[[t73:.*]] = AIE.tile(7, 3) + # CHECK: %[[t74:.*]] = AIE.tile(7, 4) + # CHECK: %[[t81:.*]] = AIE.tile(8, 1) + # CHECK: %[[t82:.*]] = AIE.tile(8, 2) + # CHECK: %[[t83:.*]] = AIE.tile(8, 3) + # CHECK: %[[t84:.*]] = AIE.tile(8, 4) + # + # CHECK: AIE.flow(%[[t01]], Core : 0, %[[t83]], Core : 0) + # CHECK: AIE.flow(%[[t01]], Core : 1, %[[t72]], Core : 1) + # CHECK: AIE.flow(%[[t02]], Core : 1, %[[t24]], Core : 1) + # CHECK: AIE.flow(%[[t03]], Core : 0, %[[t71]], Core : 0) + # CHECK: AIE.flow(%[[t11]], Core : 0, %[[t24]], Core : 0) + # CHECK: AIE.flow(%[[t14]], Core : 0, %[[t01]], Core : 0) + # CHECK: AIE.flow(%[[t20]], DMA : 0, %[[t03]], DMA : 0) + # CHECK: AIE.flow(%[[t20]], DMA : 1, %[[t83]], DMA : 1) + # CHECK: AIE.flow(%[[t21]], Core : 0, %[[t73]], Core : 0) + # CHECK: AIE.flow(%[[t24]], Core : 1, %[[t71]], Core : 1) + # CHECK: AIE.flow(%[[t24]], DMA : 0, %[[t20]], DMA : 0) + # CHECK: AIE.flow(%[[t30]], DMA : 0, %[[t14]], DMA : 0) + # CHECK: AIE.flow(%[[t71]], Core : 0, %[[t84]], Core : 0) + # CHECK: AIE.flow(%[[t71]], Core : 1, %[[t84]], Core : 1) + # CHECK: AIE.flow(%[[t72]], Core : 1, %[[t02]], Core : 1) + # CHECK: AIE.flow(%[[t73]], Core : 0, %[[t82]], Core : 0) + # CHECK: AIE.flow(%[[t82]], DMA : 0, %[[t30]], DMA : 0) + # CHECK: AIE.flow(%[[t83]], Core : 0, %[[t21]], Core : 0) + # CHECK: AIE.flow(%[[t83]], Core : 1, %[[t01]], Core : 1) + # CHECK: AIE.flow(%[[t84]], Core : 0, %[[t11]], Core : 0) + # CHECK: AIE.flow(%[[t84]], DMA : 1, %[[t20]], DMA : 1) print(mlir_module) # CHECK-LABEL: TEST: test_many_flows -# @run +@run def test_many_flows(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "many_flows.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=TIMEOUT) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[T02:.*]] = AIE.tile(0, 2) + # CHECK: %[[T03:.*]] = AIE.tile(0, 3) + # CHECK: %[[T11:.*]] = AIE.tile(1, 1) + # CHECK: %[[T13:.*]] = AIE.tile(1, 3) + # CHECK: %[[T20:.*]] = AIE.tile(2, 0) + # CHECK: %[[T22:.*]] = AIE.tile(2, 2) + # CHECK: %[[T30:.*]] = AIE.tile(3, 0) + # CHECK: %[[T31:.*]] = AIE.tile(3, 1) + # CHECK: %[[T60:.*]] = AIE.tile(6, 0) + # CHECK: %[[T70:.*]] = AIE.tile(7, 0) + # CHECK: %[[T73:.*]] = AIE.tile(7, 3) + # CHECK: AIE.flow(%[[T02]], Core : 1, %[[T22]], Core : 1) + # CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) + # CHECK: AIE.flow(%[[T03]], Core : 0, %[[T13]], Core : 0) + # CHECK: AIE.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) + # CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T70]], DMA : 0) + # CHECK: AIE.flow(%[[T13]], Core : 1, %[[T22]], Core : 0) + # CHECK: AIE.flow(%[[T13]], DMA : 0, %[[T70]], DMA : 1) + # CHECK: AIE.flow(%[[T22]], DMA : 0, %[[T60]], DMA : 1) + # CHECK: AIE.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) + # CHECK: AIE.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) + # CHECK: AIE.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) + # CHECK: AIE.flow(%[[T73]], Core : 1, %[[T31]], Core : 1) + # CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T20]], DMA : 0) + # CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T30]], DMA : 0) print(mlir_module) # CHECK-LABEL: TEST: test_many_flows2 -# @run +@run def test_many_flows2(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "many_flows2.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=TIMEOUT) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[T02:.*]] = AIE.tile(0, 2) + # CHECK: %[[T03:.*]] = AIE.tile(0, 3) + # CHECK: %[[T11:.*]] = AIE.tile(1, 1) + # CHECK: %[[T13:.*]] = AIE.tile(1, 3) + # CHECK: %[[T20:.*]] = AIE.tile(2, 0) + # CHECK: %[[T22:.*]] = AIE.tile(2, 2) + # CHECK: %[[T30:.*]] = AIE.tile(3, 0) + # CHECK: %[[T31:.*]] = AIE.tile(3, 1) + # CHECK: %[[T60:.*]] = AIE.tile(6, 0) + # CHECK: %[[T70:.*]] = AIE.tile(7, 0) + # CHECK: %[[T73:.*]] = AIE.tile(7, 3) + # + # CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T60]], DMA : 0) + # CHECK: AIE.flow(%[[T03]], Core : 0, %[[T02]], Core : 1) + # CHECK: AIE.flow(%[[T03]], Core : 1, %[[T02]], Core : 0) + # CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T30]], DMA : 0) + # CHECK: AIE.flow(%[[T03]], DMA : 1, %[[T70]], DMA : 1) + # CHECK: AIE.flow(%[[T13]], Core : 1, %[[T31]], Core : 1) + # CHECK: AIE.flow(%[[T22]], Core : 0, %[[T13]], Core : 0) + # CHECK: AIE.flow(%[[T22]], DMA : 0, %[[T20]], DMA : 0) + # CHECK: AIE.flow(%[[T31]], DMA : 0, %[[T20]], DMA : 1) + # CHECK: AIE.flow(%[[T31]], DMA : 1, %[[T30]], DMA : 1) + # CHECK: AIE.flow(%[[T73]], Core : 0, %[[T31]], Core : 0) + # CHECK: AIE.flow(%[[T73]], Core : 1, %[[T22]], Core : 1) + # CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T60]], DMA : 1) + # CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 0) print(mlir_module) # CHECK-LABEL: TEST: test_memtile -# @run +@run def test_memtile(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "memtile.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=TIMEOUT) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[T04:.*]] = AIE.tile(0, 4) + # CHECK: %[[T03:.*]] = AIE.tile(0, 3) + # CHECK: %[[T02:.*]] = AIE.tile(0, 2) + # CHECK: %[[T01:.*]] = AIE.tile(0, 1) + # CHECK: AIE.flow(%[[T04]], DMA : 0, %[[T02]], DMA : 4) + # CHECK: AIE.flow(%[[T04]], DMA : 1, %[[T02]], DMA : 5) + # CHECK: AIE.flow(%[[T03]], DMA : 0, %[[T02]], DMA : 2) + # CHECK: AIE.flow(%[[T03]], DMA : 1, %[[T02]], DMA : 3) + # CHECK: AIE.flow(%[[T02]], DMA : 0, %[[T01]], DMA : 0) + # CHECK: AIE.flow(%[[T02]], DMA : 1, %[[T01]], DMA : 1) + # CHECK: AIE.flow(%[[T02]], DMA : 2, %[[T03]], DMA : 0) + # CHECK: AIE.flow(%[[T02]], DMA : 3, %[[T03]], DMA : 1) + # CHECK: AIE.flow(%[[T02]], DMA : 4, %[[T04]], DMA : 0) + # CHECK: AIE.flow(%[[T02]], DMA : 5, %[[T04]], DMA : 1) + # CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T02]], DMA : 0) + # CHECK: AIE.flow(%[[T01]], DMA : 1, %[[T02]], DMA : 1) print(mlir_module) # CHECK-LABEL: TEST: test_memtile_routing_constraints -# @run +@run def test_memtile_routing_constraints(): with open( Path(THIS_FILE).parent.parent @@ -336,310 +334,298 @@ def test_memtile_routing_constraints(): / "memtile_routing_constraints.mlir" ) as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=TIMEOUT) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) - device = mlir_module.body.operations[0] - pm.run(device.operation) - - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - print(mlir_module) + pm.add("aie-find-flows") - -# CHECK-LABEL: TEST: test_mmult -@run -def test_mmult(): - with open(Path(THIS_FILE).parent.parent / "create-flows" / "mmult.mlir") as f: - mlir_module = Module.parse(f.read()) - r = Router() - pass_ = create_python_router_pass(r) - pm = PassManager() - pass_manager_add_owned_pass(pm, pass_) device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # %[[T24:.*]] = AIE.tile(2, 4) + # %[[T23:.*]] = AIE.tile(2, 3) + # %[[T22:.*]] = AIE.tile(2, 2) + # %[[T21:.*]] = AIE.tile(2, 1) + # %[[T20:.*]] = AIE.tile(2, 0) + # AIE.flow(%[[T22]], DMA : 0, %[[T21]], DMA : 0) + # AIE.flow(%[[T23]], DMA : 0, %[[T20]], DMA : 0) print(mlir_module) # CHECK-LABEL: TEST: test_more_flows_shim -# @run +@run def test_more_flows_shim(): with open( Path(THIS_FILE).parent.parent / "create-flows" / "more_flows_shim.mlir" ) as f: for mlir_module in f.read().split("// -----"): mlir_module = Module.parse(mlir_module) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - print(mlir_module) + # CHECK-LABEL: test70 + # CHECK: %[[T70:.*]] = AIE.tile(7, 0) + # CHECK: %[[T71:.*]] = AIE.tile(7, 1) + # CHECK: %[[SB70:.*]] = AIE.switchbox(%[[T70]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %[[SH70:.*]] = AIE.shimmux(%[[T70]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %[[SB71:.*]] = AIE.switchbox(%[[T71]]) { + # CHECK: AIE.connect + # CHECK: } + + # CHECK-LABEL: test60 + # CHECK: %[[T60:.*]] = AIE.tile(6, 0) + # CHECK: %[[T61:.*]] = AIE.tile(6, 1) + # CHECK: %[[SB60:.*]] = AIE.switchbox(%[[T60]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %[[SH60:.*]] = AIE.shimmux(%[[T60]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %[[SB61:.*]] = AIE.switchbox(%[[T61]]) { + # CHECK: AIE.connect + # CHECK: } + + # CHECK-LABEL: test40 + # CHECK: %[[T40:.*]] = AIE.tile(4, 0) + # CHECK: %[[T41:.*]] = AIE.tile(4, 1) + # CHECK: %[[SB40:.*]] = AIE.switchbox(%[[T40]]) { + # CHECK: AIE.connect + # CHECK: AIE.connect + # CHECK: } + # CHECK: %[[SB41:.*]] = AIE.switchbox(%[[T41]]) { + # CHECK: AIE.connect + # CHECK: AIE.connect + # CHECK: } + + # CHECK-LABEL: test100 + # CHECK: %[[T100:.*]] = AIE.tile(10, 0) + # CHECK: %[[T101:.*]] = AIE.tile(10, 1) + # CHECK: %[[SB100:.*]] = AIE.switchbox(%[[T100]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %[[SH100:.*]] = AIE.shimmux(%[[T100]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %[[SB101:.*]] = AIE.switchbox(%[[T101]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK-LABEL: TEST: test_over_flows -# @run +@run def test_over_flows(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "over_flows.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() - pass_ = create_python_router_pass(r) - pm = PassManager() - pass_manager_add_owned_pass(pm, pass_) - device = mlir_module.body.operations[0] - pm.run(device.operation) - - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - print(mlir_module) - - -# CHECK-LABEL: TEST: test_routed_herd_3x1 -# @run -def test_routed_herd_3x1(): - with open( - Path(THIS_FILE).parent.parent / "create-flows" / "routed_herd_3x1.mlir" - ) as f: - mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) - device = mlir_module.body.operations[0] - pm.run(device.operation) + pm.add("aie-find-flows") - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - print(mlir_module) - - -# CHECK-LABEL: TEST: test_routed_herd_3x2 -# @run -def test_routed_herd_3x2(): - with open( - Path(THIS_FILE).parent.parent / "create-flows" / "routed_herd_3x2.mlir" - ) as f: - mlir_module = Module.parse(f.read()) - r = Router() - pass_ = create_python_router_pass(r) - pm = PassManager() - pass_manager_add_owned_pass(pm, pass_) device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[T03:.*]] = AIE.tile(0, 3) + # CHECK: %[[T02:.*]] = AIE.tile(0, 2) + # CHECK: %[[T00:.*]] = AIE.tile(0, 0) + # CHECK: %[[T13:.*]] = AIE.tile(1, 3) + # CHECK: %[[T11:.*]] = AIE.tile(1, 1) + # CHECK: %[[T10:.*]] = AIE.tile(1, 0) + # CHECK: %[[T20:.*]] = AIE.tile(2, 0) + # CHECK: %[[T30:.*]] = AIE.tile(3, 0) + # CHECK: %[[T22:.*]] = AIE.tile(2, 2) + # CHECK: %[[T31:.*]] = AIE.tile(3, 1) + # CHECK: %[[T60:.*]] = AIE.tile(6, 0) + # CHECK: %[[T70:.*]] = AIE.tile(7, 0) + # CHECK: %[[T71:.*]] = AIE.tile(7, 1) + # CHECK: %[[T72:.*]] = AIE.tile(7, 2) + # CHECK: %[[T73:.*]] = AIE.tile(7, 3) + # CHECK: %[[T80:.*]] = AIE.tile(8, 0) + # CHECK: %[[T82:.*]] = AIE.tile(8, 2) + # CHECK: %[[T83:.*]] = AIE.tile(8, 3) + # CHECK: AIE.flow(%[[T71]], DMA : 0, %[[T20]], DMA : 0) + # CHECK: AIE.flow(%[[T71]], DMA : 1, %[[T20]], DMA : 1) + # CHECK: AIE.flow(%[[T72]], DMA : 0, %[[T60]], DMA : 0) + # CHECK: AIE.flow(%[[T72]], DMA : 1, %[[T60]], DMA : 1) + # CHECK: AIE.flow(%[[T73]], DMA : 0, %[[T70]], DMA : 0) + # CHECK: AIE.flow(%[[T73]], DMA : 1, %[[T70]], DMA : 1) + # CHECK: AIE.flow(%[[T83]], DMA : 0, %[[T30]], DMA : 0) + # CHECK: AIE.flow(%[[T83]], DMA : 1, %[[T30]], DMA : 1) print(mlir_module) # CHECK-LABEL: TEST: test_simple -# @run +@run def test_simple(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "simple.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: PathEndPoint(Switchbox(0, 1): (DMA: 0)) - # CHECK: OrderedDict([(Switchbox(0, 1), (DMA: 0) -> {(N: 0)}), - # CHECK: (Switchbox(0, 2), (S: 0) -> {(E: 0)}), - # CHECK: (Switchbox(1, 2), (W: 0) -> {(Core: 1)})]) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - # CHECK: %switchbox_0_1 = AIE.switchbox(%tile_0_1) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_0_2 = AIE.switchbox(%tile_0_2) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: AIE.packet_flow(16) { - # CHECK: AIE.packet_source<%tile_0_1, Core : 0> - # CHECK: AIE.packet_dest<%tile_1_2, Core : 0> - # CHECK: AIE.packet_dest<%tile_0_2, DMA : 1> - # CHECK: } + # CHECK: %[[T01:.*]] = AIE.tile(0, 1) + # CHECK: %[[T12:.*]] = AIE.tile(1, 2) + # CHECK: AIE.flow(%[[T01]], DMA : 0, %[[T12]], Core : 1) print(mlir_module) # CHECK-LABEL: TEST: test_simple2 -# @run +@run def test_simple2(): with open(Path(THIS_FILE).parent.parent / "create-flows" / "simple2.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) - device = mlir_module.body.operations[0] - pm.run(device.operation) + pm.add("aie-find-flows") - # CHECK: PathEndPoint(Switchbox(2, 3): (Core: 1)) - # CHECK: OrderedDict([(Switchbox(2, 3), (Core: 1) -> {(S: 0)}), - # CHECK: (Switchbox(2, 2), (N: 0) -> {(E: 0)}), - # CHECK: (Switchbox(3, 2), (W: 0) -> {(DMA: 0)})]) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - # CHECK: %switchbox_2_2 = AIE.switchbox(%tile_2_2) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_2_3 = AIE.switchbox(%tile_2_3) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_3_2 = AIE.switchbox(%tile_3_2) { - # CHECK: AIE.connect - # CHECK: } - print(mlir_module) - - -# CHECK-LABEL: TEST: test_simple_flows -# @run -def test_simple_flows(): - with open( - Path(THIS_FILE).parent.parent / "create-flows" / "simple_flows.mlir" - ) as f: - mlir_module = Module.parse(f.read()) - r = Router() - pass_ = create_python_router_pass(r) - pm = PassManager() - pass_manager_add_owned_pass(pm, pass_) device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[T23:.*]] = AIE.tile(2, 3) + # CHECK: %[[T32:.*]] = AIE.tile(3, 2) + # CHECK: AIE.flow(%[[T23]], Core : 1, %[[T32]], DMA : 0) print(mlir_module) # CHECK-LABEL: TEST: test_simple_flows2 -# @run +@run def test_simple_flows2(): with open( Path(THIS_FILE).parent.parent / "create-flows" / "simple_flows2.mlir" ) as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - # CHECK: PathEndPoint(Switchbox(2, 3): (Core: 0)) - # CHECK: OrderedDict([(Switchbox(2, 3), (Core: 0) -> {(S: 0)}), - # CHECK: (Switchbox(2, 2), (N: 0) -> {(Core: 1)})]) - # CHECK: PathEndPoint(Switchbox(2, 2): (Core: 0)) - # CHECK: OrderedDict([(Switchbox(2, 2), (Core: 0) -> {(W: 0)}), - # CHECK: (Switchbox(1, 2), (E: 0) -> {(S: 0)}), - # CHECK: (Switchbox(1, 1), (N: 0) -> {(Core: 0)})]) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - # CHECK: %switchbox_2_2 = AIE.switchbox(%tile_2_2) { - # CHECK: AIE.connect - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_2_3 = AIE.switchbox(%tile_2_3) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %switchbox_1_1 = AIE.switchbox(%tile_1_1) { - # CHECK: AIE.connect - # CHECK: } - # CHECK: %tile_1_2 = AIE.tile(1, 2) - # CHECK: %switchbox_1_2 = AIE.switchbox(%tile_1_2) { - # CHECK: AIE.connect - # CHECK: } + # CHECK: %[[T23:.*]] = AIE.tile(2, 3) + # CHECK: %[[T22:.*]] = AIE.tile(2, 2) + # CHECK: %[[T11:.*]] = AIE.tile(1, 1) + # CHECK: AIE.flow(%[[T23]], Core : 0, %[[T22]], Core : 1) + # CHECK: AIE.flow(%[[T22]], Core : 0, %[[T11]], Core : 0) print(mlir_module) # CHECK-LABEL: TEST: test_simple_flows_shim -# @run +@run def test_simple_flows_shim(): with open( Path(THIS_FILE).parent.parent / "create-flows" / "simple_flows_shim.mlir" - ): + ) as f: for mlir_module in f.read().split("// -----"): mlir_module = Module.parse(mlir_module) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - print(mlir_module) + # CHECK: %[[T21:.*]] = AIE.tile(2, 1) + # CHECK: %[[T20:.*]] = AIE.tile(2, 0) + # CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { + # CHECK: AIE.connect + # CHECK: } + + # CHECK: %[[T20:.*]] = AIE.tile(2, 0) + # CHECK: %[[T21:.*]] = AIE.tile(2, 1) + # CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %{{.*}} = AIE.shimmux(%[[T20]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %{{.*}} = AIE.switchbox(%[[T21]]) { + # CHECK: AIE.connect + # CHECK: } + + # CHECK: %[[T20:.*]] = AIE.tile(2, 0) + # CHECK: %[[T30:.*]] = AIE.tile(3, 0) + # CHECK: %{{.*}} = AIE.switchbox(%[[T20]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %{{.*}} = AIE.shimmux(%[[T20]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %{{.*}} = AIE.switchbox(%[[T30]]) { + # CHECK: AIE.connect + # CHECK: } + # CHECK: %{{.*}} = AIE.shimmux(%[[T30]]) { + # CHECK: AIE.connect + # CHECK: } -# @run -def test_vecmul_4x4(): - with open(Path(THIS_FILE).parent.parent / "create-flows" / "vecmul_4x4.mlir") as f: + +# CHECK-LABEL: TEST: test_broadcast +@run +def test_broadcast(): + with open(Path(THIS_FILE).parent.parent / "create-flows" / "broadcast.mlir") as f: mlir_module = Module.parse(f.read()) - r = Router() + r = Router(timeout=10) pass_ = create_python_router_pass(r) pm = PassManager() pass_manager_add_owned_pass(pm, pass_) + pm.add("aie-find-flows") + device = mlir_module.body.operations[0] pm.run(device.operation) - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - + # CHECK: %[[T03:.*]] = AIE.tile(0, 3) + # CHECK: %[[T02:.*]] = AIE.tile(0, 2) + # CHECK: %[[T00:.*]] = AIE.tile(0, 0) + # CHECK: %[[T13:.*]] = AIE.tile(1, 3) + # CHECK: %[[T11:.*]] = AIE.tile(1, 1) + # CHECK: %[[T10:.*]] = AIE.tile(1, 0) + # CHECK: %[[T20:.*]] = AIE.tile(2, 0) + # CHECK: %[[T30:.*]] = AIE.tile(3, 0) + # CHECK: %[[T22:.*]] = AIE.tile(2, 2) + # CHECK: %[[T31:.*]] = AIE.tile(3, 1) + # CHECK: %[[T60:.*]] = AIE.tile(6, 0) + # CHECK: %[[T70:.*]] = AIE.tile(7, 0) + # CHECK: %[[T71:.*]] = AIE.tile(7, 1) + # CHECK: %[[T72:.*]] = AIE.tile(7, 2) + # CHECK: %[[T73:.*]] = AIE.tile(7, 3) + # CHECK: %[[T80:.*]] = AIE.tile(8, 0) + # CHECK: %[[T82:.*]] = AIE.tile(8, 2) + # CHECK: %[[T83:.*]] = AIE.tile(8, 3) + # + # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T71]], DMA : 0) + # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T31]], DMA : 0) + # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T82]], DMA : 0) + # CHECK: AIE.flow(%[[T20]], DMA : 0, %[[T13]], DMA : 0) + # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T83]], DMA : 1) + # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T22]], DMA : 1) + # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T02]], DMA : 1) + # CHECK: AIE.flow(%[[T60]], DMA : 0, %[[T31]], DMA : 1) print(mlir_module) - - -# @run -def test_unit_fixed_connections(): - with open( - Path(THIS_FILE).parent.parent / "create-flows" / "unit_fixed_connections.mlir" - ) as f: - for mlir_module in f.read().split("// -----"): - mlir_module = Module.parse(mlir_module) - r = Router() - pass_ = create_python_router_pass(r) - pm = PassManager() - pass_manager_add_owned_pass(pm, pass_) - device = mlir_module.body.operations[0] - pm.run(device.operation) - - for src, paths in r.routing_solution.items(): - print(src) - pprint(paths) - - print(mlir_module)