From 7b79747645db4742e441188b7d43faee8344f739 Mon Sep 17 00:00:00 2001 From: Andra Bisca Date: Tue, 19 Nov 2024 21:41:49 +0100 Subject: [PATCH] Update test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com> --- test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py b/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py index 73f8cfb687..cbba566891 100644 --- a/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py +++ b/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py @@ -168,8 +168,7 @@ def sequence(A, B, C): npu_dma_memcpy_nd(metadata="in1", bd_id=1, mem=A, sizes=[1, 1, 1, N]) npu_dma_memcpy_nd(metadata="out", bd_id=0, mem=C, sizes=[1, 1, 1, N]) npu_dma_wait("out") - #npu_sync(column=0, row=0, direction=0, channel=0) - + # npu_sync(column=0, row=0, direction=0, channel=0) with mlir_mod_ctx() as ctx: