Skip to content

Commit

Permalink
[rtlsim] Delete obsolete rtlsim fct
Browse files Browse the repository at this point in the history
  • Loading branch information
auphelia committed Oct 22, 2024
1 parent afbf1fe commit de5cf61
Showing 1 changed file with 0 additions and 87 deletions.
87 changes: 0 additions & 87 deletions src/finn/custom_op/fpgadataflow/hwcustomop.py
Original file line number Diff line number Diff line change
Expand Up @@ -246,93 +246,6 @@ def toggle_clk(self, sim):
else:
assert False, f"Unknown rtlsim_backend {rtlsim_backend}"

def rtlsim(self, sim, inp, inp2=None):
"""Runs the pyverilator simulation by passing the input values to the simulation,
toggle the clock and observing the execution time. Function contains also an
observation loop that can abort the simulation if no output value is produced
after 100 cycles."""

rtlsim_backend = self.get_nodeattr("rtlsim_backend")
if rtlsim_backend == "pyverilator":
trace_file = self.get_nodeattr("rtlsim_trace")
if trace_file != "":
if trace_file == "default":
trace_file = self.onnx_node.name + ".vcd"
sim.start_vcd_trace(trace_file)
inputs = inp
outputs = []
sname = self.hls_sname()
o_ready = "out_" + sname + "_TREADY"
o_valid = "out_" + sname + "_TVALID"
o_data = "out_" + sname + "_TDATA"
in0_ready = "in0_" + sname + "_TREADY"
in0_valid = "in0_" + sname + "_TVALID"
in0_data = "in0_" + sname + "_TDATA"
in1_ready = "in1_" + sname + "_TREADY"
in1_valid = "in1_" + sname + "_TVALID"
in1_data = "in1_" + sname + "_TDATA"

sim.io[o_ready] = 1

# observe if output is completely calculated
# observation_count will contain the number of cycles the calculation ran
num_out_values = self.get_number_output_values()
output_observed = False
observation_count = 0

# avoid infinite looping of simulation by aborting when there is no change in
# output values after 100 cycles
no_change_count = 0
old_outputs = outputs
liveness_threshold = pyverilate_get_liveness_threshold_cycles()

while not (output_observed):
sim.io[in0_valid] = 1 if len(inputs) > 0 else 0
sim.io[in0_data] = inputs[0] if len(inputs) > 0 else 0
if sim.io[in0_ready] == 1 and sim.io[in0_valid] == 1:
inputs = inputs[1:]

if inp2 is not None:
sim.io[in1_valid] = 1 if len(inp2) > 0 else 0
sim.io[in1_data] = inp2[0] if len(inp2) > 0 else 0
if sim.io[in1_ready] == 1 and sim.io[in1_valid] == 1:
inp2 = inp2[1:]

if sim.io[o_valid] == 1 and sim.io[o_ready] == 1:
outputs = outputs + [sim.io[o_data]]
sim.io.ap_clk = 1
sim.io.ap_clk = 0

observation_count = observation_count + 1
no_change_count = no_change_count + 1

if len(outputs) == num_out_values:
self.set_nodeattr("cycles_rtlsim", observation_count)
output_observed = True

if no_change_count == liveness_threshold:
if old_outputs == outputs:
if trace_file != "":
sim.flush_vcd_trace()
sim.stop_vcd_trace()
raise Exception(
"Error in simulation! Takes too long to produce output. "
"Consider setting the LIVENESS_THRESHOLD env.var. to a "
"larger value."
)
else:
no_change_count = 0
old_outputs = outputs
if trace_file != "":
sim.flush_vcd_trace()
sim.stop_vcd_trace()
elif rtlsim_backend == "pyxsi":
assert False, "pyxsi only supports rtlsim_multi_io for now"
else:
assert False, f"Unknown rtlsim_backend {rtlsim_backend}"

return outputs

def rtlsim_multi_io(self, sim, io_dict):
"Run rtlsim for this node, supports multiple i/o streams."
# signal name suffix
Expand Down

0 comments on commit de5cf61

Please sign in to comment.