From b48147e0a6637659a8a7127dd0016edded998ed5 Mon Sep 17 00:00:00 2001 From: auphelia Date: Fri, 11 Oct 2024 10:36:20 +0100 Subject: [PATCH] [tutorial] Format tutorial README --- tutorials/fpga_flow/README.md | 44 ++++++++++++++++++++++------------- 1 file changed, 28 insertions(+), 16 deletions(-) diff --git a/tutorials/fpga_flow/README.md b/tutorials/fpga_flow/README.md index 2aaad0423b..71f2a2a625 100644 --- a/tutorials/fpga_flow/README.md +++ b/tutorials/fpga_flow/README.md @@ -25,20 +25,29 @@ This demo was created using Vivado 2022.1. Prior to running, insure the following prerequisites have been met: - Install FINN and prerequisites. The [Getting Started](https://finn.readthedocs.io/en/latest/getting_started.html#quickstart) section of the FINN documentation might be helpful for this. - Ensure you have the `FINN_XILINX_PATH` and `FINN_XILINX_VERSION` env variables set appropriately for your install. For example: -> export FINN_XILINX_PATH=/opt/Xilinx -> export FINN_XILINX_VERSION=2022.1 +```shell +export FINN_XILINX_PATH=/opt/Xilinx +export FINN_XILINX_VERSION=2022.1 +``` + - Set the env variable for your `finn` install top directory (where you cloned the FINN compiler repo): -> export FINN_ROOT=/home/foo/finn +```shell +export FINN_ROOT=/home/foo/finn +``` Then, change to `finn` install directory and invoke the build as follows: -> cd ${FINN_ROOT} -> ./run-docker.sh build_custom ${FINN_ROOT}/tutorials/fpga_flow/ +```shell +cd ${FINN_ROOT} +./run-docker.sh build_custom ${FINN_ROOT}/tutorials/fpga_flow/ +``` Alternatively, since the tutorials folder is already part of the FINN compiler installation, you can invoke it from within the Docker container: -> cd ${FINN_ROOT} -> ./run-docker.sh -> cd tutorials/fpga_flow -> python build.py +```shell +cd ${FINN_ROOT} +./run-docker.sh +cd tutorials/fpga_flow +python build.py +``` The build should finish in about 10 minutes, and the FINN docker will close on success. @@ -59,12 +68,14 @@ The build should finish in about 10 minutes, and the FINN docker will close on s ### Examine the Stitched IP Navigate to the stitched IP project directory: - -> cd ${FINN_ROOT}/tutorials/fpga_flow/output_tfc_w0a1_fpga/stitched_ip +```shell +cd ${FINN_ROOT}/tutorials/fpga_flow/output_tfc_w0a1_fpga/stitched_ip +``` And, open the project: - -> vivado finn_vivado_stitch_proj.xpr +```shell +vivado finn_vivado_stitch_proj.xpr +``` Explore the IPI board design and note the interfaces. @@ -89,9 +100,10 @@ them under `${FINN_ROOT}/tutorials/fpga_flow/output_tfc_w0a1_fpga/sim`. Let's ex the FINN compiler. Used for launching the testbench simulation. You can now launch the simulation as follows: - -> cd ${FINN_ROOT}/tutorials/fpga_flow/output_tfc_w0a1_fpga/sim -> vivado -mode gui -source make_sim_proj.tcl +```shell +cd ${FINN_ROOT}/tutorials/fpga_flow/output_tfc_w0a1_fpga/sim +vivado -mode gui -source make_sim_proj.tcl +``` The simulation should complete with: