index.json

[{"authors":["admin"],"categories":null,"content":"Hi, I\u0026rsquo;m Victor. I build computer architecture simulators and compilers to explore how to make computation fast. I write a lot of C++, and frequently look at profiling and (dis)assembly. In July 2023, I\u0026rsquo;m moving to Tenstorrent to work on high-performance RISC-V processors.\nI spent the last several years doing a PhD with Daniel Sanchez at MIT CSAIL. My PhD work is in the Swarm project, which seeks to build new abstractions between hardware and software that make it as easy to exploit multicore parallelism as it is to write ordinary sequential programs.\nBefore I was at MIT, I received my BSE in electrical engineering from Princeton, where I worked with Sharad Malik on Boolean satisfiability solvers. I have also done internships working on optimizing the performance of hardware and software systems at Microsoft Research, NVIDIA Research, Pure Storage, and NIST.\nYou can access my curriculum vitae here.\n","date":-62135596800,"expirydate":-62135596800,"kind":"taxonomy","lang":"en","lastmod":-62135596800,"objectID":"2525497d367e79493fd32b198b28f040","permalink":"https://www.victorying.com/authors/admin/","publishdate":"0001-01-01T00:00:00Z","relpermalink":"/authors/admin/","section":"authors","summary":"Hi, I\u0026rsquo;m Victor. I build computer architecture simulators and compilers to explore how to make computation fast. I write a lot of C++, and frequently look at profiling and (dis)assembly. In July 2023, I\u0026rsquo;m moving to Tenstorrent to work on high-performance RISC-V processors.\nI spent the last several years doing a PhD with Daniel Sanchez at MIT CSAIL. My PhD work is in the Swarm project, which seeks to build new abstractions between hardware and software that make it as easy to exploit multicore parallelism as it is to write ordinary sequential programs.","tags":null,"title":"Victor A. Ying","type":"authors"},{"authors":["[Ajay Brahmakshatriya](https://intimeand.space/)","[Emily Furst](https://emilyfurst.com/)","[Victor A. Ying](/)","[Claire Hsu](https://chsu1r.github.io/)","[Changwan Hong](https://changwanhong.com/)","Max Ruttenberg","[Yunming Zhang](https://yunmingzhang17.github.io/)","Dai Cheol Jung","[Dustin Richmond](http://www.dustinrichmond.com/)","[Michael B. Taylor](https://michaeltaylor.org/)","[Julian Shun](https://people.csail.mit.edu/jshun/)","[Mark Oskin](https://homes.cs.washington.edu/~oskin/)","[Daniel Sanchez](https://people.csail.mit.edu/sanchez/)","[Saman Amarasinghe](https://people.csail.mit.edu/saman/)"],"categories":null,"content":"","date":1623643200,"expirydate":-62135596800,"kind":"page","lang":"en","lastmod":1623643200,"objectID":"4de6681ccc7b1f863709aa40d765cc59","permalink":"https://www.victorying.com/publication/ugc/","publishdate":"2021-06-14T00:00:00-04:00","relpermalink":"/publication/ugc/","section":"publication","summary":"The Unified GraphIt Compiler framework (UGC) compiles a domain-specific language for graph processing to novel architecturs such as Swarm.  The compiler is able to reuse code across architectures and can automatically unlock more parallelism than prior approaches by using Swarm's speculative execution to avoid synchronization overheads.","tags":null,"title":"Taming the Zoo: The Unified GraphIt Compiler Framework for Novel Architectures","type":"publication"},{"authors":["[Victor A. Ying](/)","[Mark C. Jeffrey](https://www.eecg.utoronto.ca/~mcj/)","[Daniel Sanchez](https://people.csail.mit.edu/sanchez/)"],"categories":null,"content":"","date":1590984000,"expirydate":-62135596800,"kind":"page","lang":"en","lastmod":1590984000,"objectID":"a49337899974eba6142bcd9f2541b290","permalink":"https://www.victorying.com/publication/t4/","publishdate":"2020-06-01T00:00:00-04:00","relpermalink":"/publication/t4/","section":"publication","summary":"Compiling ordinary sequential C and C++ programs to run in parallel on Swarm.  Challenging applications are scaled to tens of cores, without requiring the programmer to indicate what code is safe to parallelize.","tags":null,"title":"T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware","type":"publication"},{"authors":["[Angshuman Parashar](https://www.parashar.org/)","[Priyanka Raina](https://stanfordaccelerate.github.io/)","[Yakun Sophia Shao](https://ysshao.github.io/)","[Yu-Hsin Chen](https://research.nvidia.com/person/yuhsin-chen)","[Victor A. Ying](/)","[Anurag Mukkara](https://people.csail.mit.edu/anurag_m/)","[Rangharajan Venkatesan](https://research.nvidia.com/person/rangharajan-venkatesan)","[Brucek Khailany](https://research.nvidia.com/person/brucek-khailany)","[Stephen W. Keckler](https://www.cs.utexas.edu/users/skeckler/)","[Joel Emer](https://people.csail.mit.edu/emer/)"],"categories":null,"content":"","date":1553572800,"expirydate":-62135596800,"kind":"page","lang":"en","lastmod":1553572800,"objectID":"667b4ec3b9559e938940d63e44a2836e","permalink":"https://www.victorying.com/publication/timeloop/","publishdate":"2019-03-26T00:00:00-04:00","relpermalink":"/publication/timeloop/","section":"publication","summary":"An infrastructure for exploring the design space of deep neural network (DNN) accelerators, including an expressive and concise representation of hardware topologies and choices about dataflow orchestration, as well as efficient modeling of performance and energy that enables exploring trade-offs by searching through large spaces of potential accelerator designs.","tags":null,"title":"Timeloop: A Systematic Approach to DNN Accelerator Evaluation","type":"publication"},{"authors":["[Mark C. Jeffrey](https://www.eecg.utoronto.ca/~mcj/)","[Victor A. Ying](/)","[Suvinay Subramanian](https://people.csail.mit.edu/suvinay/)","Hyun Ryong Lee","[Joel Emer](https://people.csail.mit.edu/emer/)","[Daniel Sanchez](https://people.csail.mit.edu/sanchez/)"],"categories":null,"content":"","date":1540180800,"expirydate":-62135596800,"kind":"page","lang":"en","lastmod":1540180800,"objectID":"8651886bd89a057c3369836abfe02405","permalink":"https://www.victorying.com/publication/espresso/","publishdate":"2018-10-22T00:00:00-04:00","relpermalink":"/publication/espresso/","section":"publication","summary":"Extending Swarm's hardware and software mechanisms to enable speculative and non-speculative tasks to coordinate on shared data structures, to enable unrestricted tasks, and to allow expert programmers to safely implement efficient and scalable system services, such as memory allocation, within speculative tasks, improving performance by up to 69×.","tags":null,"title":"Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism","type":"publication"},{"authors":["[Suvinay Subramanian](https://people.csail.mit.edu/suvinay/)","[Mark C. Jeffrey](https://www.eecg.utoronto.ca/~mcj/)","[Maleen Abeydeera](https://sites.google.com/site/maleen89/)","Hyun Ryong Lee","[Victor A. Ying](/)","[Joel Emer](https://people.csail.mit.edu/emer/)","[Daniel Sanchez](https://people.csail.mit.edu/sanchez/)"],"categories":null,"content":"","date":1498622400,"expirydate":-62135596800,"kind":"page","lang":"en","lastmod":1498622400,"objectID":"6fe2bf3a2556df24371c1a9a7b6776b3","permalink":"https://www.victorying.com/publication/fractal/","publishdate":"2017-06-28T00:00:00-04:00","relpermalink":"/publication/fractal/","section":"publication","summary":"A new execution model that enhances the Swarm hardware architecture, a general-purpose multicore architecture that makes it easy to exploit more parallelism in many applications. Outperforms prior systems by up to 88×.","tags":null,"title":"Fractal: An Execution Model for Fine-Grain Nested Speculative Parallelism","type":"publication"}]