Add support for feature complete external VHDL parser

[LarsAsplund]

The VHDL parsing conducted by VUnit to detect dependencies between files such that a correct file order can be determined is limited in functionality due to the complexity of fully parsing all legal VHDL code. While we could put more efforts into the parser we're at the point of diminishing returns, especially when there are two existing solutions to the problem:

• Express code dependencies more clearly
• Use the add_dependency_on method to enforce a dependency

Another long-term solution is to support an external open source parser (that is fast enough). This issue is a place-holder for that such a solution and also collects closed issues related to parsing that are unlikely to be solved with our built-in parser.

Here are the closed issues:

• Dependency scanning missing package dependencies #884
• failed to find a primary design unit 'all'  #857
• Parsing problem in 4.4.0? #725
• VUnit fails to parse file with commented code #670
• [Bug] Package parsing misses dependencies when use clause is not used #1068
• [Bug] Multiline comment containing semicolon : over port declaration breaks vhdl_parser.parse() #1069