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Identifier 'mem' has not been declared yet. #3

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wspitts2 opened this issue Oct 25, 2024 · 2 comments
Open

Identifier 'mem' has not been declared yet. #3

wspitts2 opened this issue Oct 25, 2024 · 2 comments

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@wspitts2
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When I compile the code for an SRAM unit using the macros, I get the following error:

Error-[IND] Identifier not declared
inputs/sky130_sram_1kbyte_1rw1r_32x256_8.v, 59
Identifier 'mem' has not been declared yet. If this error is not expected,
please check if you have set `default_nettype to none.

reg [DATA_WIDTH-1:0] mem [0:RAM_DEPTH-1]; was on line 80 and needed to be before line 59.

This seems to be in more than one of the SRAM macros on the site.
Here is the one I fixed so my design compiled and worked correctly:

https://github.com/VLSIDA/sky130_sram_macros/blob/main/sky130_sram_2kbyte_1rw1r_32x512_8/sky130_sram_2kbyte_1rw1r_32x512_8.v

You should move line 80 to line 48 like this so it is properly defined earlier.
reg csb0_reg;
reg web0_reg;
reg [NUM_WMASKS-1:0] wmask0_reg;
reg [ADDR_WIDTH-1:0] addr0_reg;
reg [DATA_WIDTH-1:0] din0_reg;
reg [DATA_WIDTH-1:0] dout0;
reg [DATA_WIDTH-1:0] mem [0:RAM_DEPTH-1];

Again, more than one macro looks to be affected by this. Thanks for making this library though!

@mguthaus
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What tool are you compiling this in?

The verilog models are only intended for behavioral simulation.

@wspitts2
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Yes, I know this. I have followed some examples to build an SRAM using mflowgen and Sky130 as an exercise for teaching a class soon. The simulator was Synopsys VCS and it didn't like that the mem was referenced before it was declared.

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