diff --git a/fpga/include/villas/fpga/ips/axis_cache.hpp b/fpga/include/villas/fpga/ips/axis_cache.hpp
index de5551d1b..53153164d 100644
--- a/fpga/include/villas/fpga/ips/axis_cache.hpp
+++ b/fpga/include/villas/fpga/ips/axis_cache.hpp
@@ -30,10 +30,10 @@ class AxisCache : public Node {
   std::list<MemoryBlockName> getMemoryBlocks() const override {
     return {registerMemory};
   }
-  void setRegister(size_t reg, uint32_t value);
-  uint32_t getRegister(size_t reg);
-  void resetRegister(size_t reg);
-  void resetAllRegisters();
+  bool setRegister(size_t reg, uint32_t value);
+  bool getRegister(size_t reg, uint32_t &value);
+  bool resetRegister(size_t reg);
+  bool resetAllRegisters();
 };
 
 } // namespace ip
diff --git a/fpga/lib/ips/axis_cache.cpp b/fpga/lib/ips/axis_cache.cpp
index fbd88ce99..c773befc9 100644
--- a/fpga/lib/ips/axis_cache.cpp
+++ b/fpga/lib/ips/axis_cache.cpp
@@ -36,7 +36,10 @@ bool AxisCache::check() {
   }
 
   for (size_t i = 1; i < registerNum; i++) {
-    buf = getRegister(i);
+    if (!getRegister(i, buf)) {
+      logger->error("Failed to read register {}", i);
+      return false;
+    }
     if (buf != 0x00FF00FF) {
       logger->error("Register {}: 0x{:08x} != 0x{:08x}", i, buf, i);
       return false;
@@ -46,7 +49,11 @@ bool AxisCache::check() {
   resetAllRegisters();
 
   for (size_t i = 0; i < registerNum; i++) {
-    logger->debug("Register {}: 0x{:08x}", i, getRegister(i));
+    if (!getRegister(i, buf)) {
+      logger->error("Failed to read register {}", i);
+      return false;
+    }
+    logger->debug("Register {}: 0x{:08x}", i, buf);
   }
 
   return true;
@@ -57,28 +64,32 @@ void AxisCache::invalidate() {
   logger->info("invalidated AXIS cache.");
 }
 
-void AxisCache::setRegister(size_t reg, uint32_t value) {
+bool AxisCache::setRegister(size_t reg, uint32_t value) {
   if (reg >= registerNum) {
     logger->error("Register index out of range: {}/{}", reg, registerNum);
-    throw std::out_of_range("Register index out of range");
+    return false;
   }
   Xil_Out32(getBaseAddr(registerMemory) + REGISTER_OUT(reg), value);
+  return true;
 }
 
-uint32_t AxisCache::getRegister(size_t reg) {
+bool AxisCache::getRegister(size_t reg, uint32_t &value) {
   if (reg >= registerNum) {
     logger->error("Register index out of range: {}/{}", reg, registerNum);
-    throw std::out_of_range("Register index out of range");
+    return false;
   }
-  return Xil_In32(getBaseAddr(registerMemory) + REGISTER_OUT(reg));
+  value = Xil_In32(getBaseAddr(registerMemory) + REGISTER_OUT(reg));
+  return true;
 }
 
-void AxisCache::resetRegister(size_t reg) { setRegister(reg, 0); }
+bool AxisCache::resetRegister(size_t reg) { return setRegister(reg, 0); }
 
-void AxisCache::resetAllRegisters() {
+bool AxisCache::resetAllRegisters() {
+  bool result = true;
   for (size_t i = 1; i < registerNum; i++) {
-    resetRegister(i);
+    result &= resetRegister(i);
   }
+  return result;
 }
 
 AxisCache::~AxisCache() {}