draft1_wrapper

module ALU_ROM_Wrapper(
    input [1:0] Opcode,
    input [15:0] Input_A,
    input [15:0] Input_B,
    output reg [15:0] Result
);

parameter IDLE = 2'b00;
parameter LOAD = 2'b01;
parameter STORE = 2'b10;

reg [1:0] state;
reg [15:0] Data_from_memory;

memory_module memory_instance (
    .Address(Input_A),
    .Data(Data_from_memory)
);

ALU_module ALU_instance (
    .Input_A(Data_from_memory),
    .Input_B(Input_B),
    .Result(Result)
);

always @(*) begin
    case (state)
        IDLE: begin
            if (Opcode == 2'b01) 
                state = LOAD;
            else if (Opcode == 2'b10) 
                state = STORE;
            else
                state = IDLE; 
        end
        LOAD: begin
            Data_from_memory = Fetch_from_memory(Input_A);
            state = IDLE; 
        end
        STORE: begin
            Store_in_memory(Input_A, Input_B);
            state = IDLE; 
        end
        default: state = IDLE; 
    endcase
end

function [15:0] Fetch_from_memory;
    input [15:0] Address;
    
    Fetch_from_memory = ...; 
endfunction

function Store_in_memory;
    input [15:0] Address, Data;
    
    ...; 
endfunction

endmodule