From c3e6f0d8e88353c265315b0583c0c893d6ebe269 Mon Sep 17 00:00:00 2001 From: Paul Scheffler Date: Wed, 17 Jul 2024 00:49:01 +0200 Subject: [PATCH 1/2] target/xilinx: Remove quotes on `tclargs` (#135) --- target/xilinx/xilinx.mk | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/xilinx/xilinx.mk b/target/xilinx/xilinx.mk index be35b5a9c..e3f862e20 100644 --- a/target/xilinx/xilinx.mk +++ b/target/xilinx/xilinx.mk @@ -29,7 +29,7 @@ $(CHS_XILINX_DIR)/build/%/out.xci: \ $$(wildcard $(CHS_XILINX_DIR)/src/ips/$$*.prj) \ | $(CHS_XILINX_DIR)/build/%/ @rm -f $(CHS_XILINX_DIR)/build/$(*)*.log $(CHS_XILINX_DIR)/build/$(*)*.jou - cd $| && $(VIVADO) -mode batch -log ../$*.log -jou ../$*.jou -source $< -tclargs "$(subst ., ,$*)" + cd $| && $(VIVADO) -mode batch -log ../$*.log -jou ../$*.jou -source $< -tclargs $(subst ., ,$*) ############## # Bitstreams # @@ -52,7 +52,7 @@ $$(CHS_XILINX_DIR)/out/%.$(1).bit: \ | $$(CHS_XILINX_DIR)/build/$(1).%/ @rm -f $$(CHS_XILINX_DIR)/build/$$*.$(1)*.log $$(CHS_XILINX_DIR)/build/$$*.$(1)*.jou cd $$| && $$(VIVADO) -mode batch -log ../$$*.$(1).log -jou ../$$*.$(1).jou -source $$< \ - -tclargs "$(1) $$* $$(CHS_XILINX_IPS_$(1):%=$$(CHS_XILINX_DIR)/build/$(1).%/out.xci)" + -tclargs $(1) $$* $$(CHS_XILINX_IPS_$(1):%=$$(CHS_XILINX_DIR)/build/$(1).%/out.xci) .PHONY: chs-xilinx-$(1) chs-xilinx-$(1): $$(CHS_XILINX_DIR)/out/cheshire.$(1).bit @@ -77,7 +77,7 @@ chs-xilinx-$(1)-%: $$(CHS_XILINX_DIR)/scripts/util/$(1).tcl | $$(CHS_XILINX_DIR) [ -e $(subst %,$$*,$(2)) ] || $$(MAKE) $(subst %,$$*,$(2)) @rm -f $$(CHS_XILINX_DIR)/build/$$(*)*.$(1).log $$(CHS_XILINX_DIR)/build/$$(*)*.$(1).jou cd $$| && $$(VIVADO) -mode batch -log ../$$(*).$(1).log -jou ../$$(*).$(1).jou -source $$< \ - -tclargs "$$(CHS_XILINX_HWS_URL) $$(or $$(CHS_XILINX_HWS_PATH_$$*),*) $$* $(subst %,$$*,$(2)) 0" + -tclargs $$(CHS_XILINX_HWS_URL) $$(or $$(CHS_XILINX_HWS_PATH_$$*),*) $$* $(subst %,$$*,$(2)) 0 endef # Program bitstream onto board From 99dd957cfcbcb9b750b9cf00f20b0444c5a05101 Mon Sep 17 00:00:00 2001 From: Nils Wistoff Date: Thu, 29 Aug 2024 20:59:15 +0200 Subject: [PATCH 2/2] target/sim: Correctly handle empty UART lines (#141) Currently, printing empty lines (back-to-back `\n`s) causes Questasim to crash while attempting to stream the empty `uart_read_buf`. Fix this by checking if `uart_read_buf` is empty. Signed-off-by: Nils Wistoff --- target/sim/src/vip_cheshire_soc.sv | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/target/sim/src/vip_cheshire_soc.sv b/target/sim/src/vip_cheshire_soc.sv index cfdc05f49..16bac7a72 100644 --- a/target/sim/src/vip_cheshire_soc.sv +++ b/target/sim/src/vip_cheshire_soc.sv @@ -445,8 +445,12 @@ module vip_cheshire_soc import cheshire_pkg::*; #( uart_boot_byte = bite; uart_boot_ena = 0; end else if (bite == "\n") begin - $display("[UART] %s", {>>8{uart_read_buf}}); - uart_read_buf.delete(); + if (uart_read_buf.size() > 0) begin + $display("[UART] %s", {>>8{uart_read_buf}}); + uart_read_buf.delete(); + end else begin + $display("[UART]"); + end end else if (bite == UartDebugEoc) begin uart_boot_eoc = 1; end else begin