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"WARNING: Could not resize memory" leads to FATAL ERROR in stoke testcase #1010

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zawtom725 opened this issue Nov 20, 2019 · 0 comments
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@zawtom725
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zawtom725 commented Nov 20, 2019

This is a continuation of the issue #1009. The function I am trying to optimize is:

typedef double __complex__ complex_t;
typedef double real_t;

...

complex_t make_multiple_t_2nd_loop_element(complex_t *h, complex_t *g,
                                          int i, int n, int b, int offset,
                                          complex_t s) {
  h[(i + n + offset) % n] = s;
  s = s + (g[(i + b) % n] - g[i]);
  return s;
}

The function is compiled using -O0 and is extracted into a .s file:

  .text
  .globl _Z32make_multiple_t_2nd_loop_elementPCdS0_iiiiS_
  .type _Z32make_multiple_t_2nd_loop_elementPCdS0_iiiiS_, @function

#! file-offset 0x18c2
#! rip-offset  0x18c2
#! capacity    275 bytes

# Text                                              #  Line  RIP     Bytes  Opcode                  
._Z32make_multiple_t_2nd_loop_elementPCdS0_iiiiS_:  #        0x18c2  0      OPC=<label>             
  pushq %rbp                                        #  1     0x18c2  1      OPC=pushq_r64_1         
  movq %rsp, %rbp                                   #  2     0x18c3  3      OPC=movq_r64_r64        
  movq %rdi, -0x18(%rbp)                            #  3     0x18c6  4      OPC=movq_m64_r64        
  movq %rsi, -0x20(%rbp)                            #  4     0x18ca  4      OPC=movq_m64_r64        
  movl %edx, -0x24(%rbp)                            #  5     0x18ce  3      OPC=movl_m32_r32        
  movl %ecx, -0x28(%rbp)                            #  6     0x18d1  3      OPC=movl_m32_r32        
  movl %r8d, -0x2c(%rbp)                            #  7     0x18d4  4      OPC=movl_m32_r32        
  movl %r9d, -0x30(%rbp)                            #  8     0x18d8  4      OPC=movl_m32_r32        
  vmovq %xmm0, %rax                                 #  9     0x18dc  5      OPC=vmovq_r64_xmm       
  vmovapd %xmm1, %xmm0                              #  10    0x18e1  4      OPC=vmovapd_xmm_xmm     
  movq %rax, -0x48(%rbp)                            #  11    0x18e5  4      OPC=movq_m64_r64        
  vmovsd -0x48(%rbp), %xmm1                         #  12    0x18e9  5      OPC=vmovsd_xmm_m64      
  vmovsd %xmm1, -0x40(%rbp)                         #  13    0x18ee  5      OPC=vmovsd_m64_xmm      
  vmovsd %xmm0, -0x38(%rbp)                         #  14    0x18f3  5      OPC=vmovsd_m64_xmm      
  vmovsd -0x40(%rbp), %xmm0                         #  15    0x18f8  5      OPC=vmovsd_xmm_m64      
  vmovsd %xmm0, -0x10(%rbp)                         #  16    0x18fd  5      OPC=vmovsd_m64_xmm      
  vmovsd -0x38(%rbp), %xmm0                         #  17    0x1902  5      OPC=vmovsd_xmm_m64      
  vmovsd %xmm0, -0x8(%rbp)                          #  18    0x1907  5      OPC=vmovsd_m64_xmm      
  movl -0x24(%rbp), %edx                            #  19    0x190c  3      OPC=movl_r32_m32        
  movl -0x28(%rbp), %eax                            #  20    0x190f  3      OPC=movl_r32_m32        
  addl %eax, %edx                                   #  21    0x1912  2      OPC=addl_r32_r32        
  movl -0x30(%rbp), %eax                            #  22    0x1914  3      OPC=movl_r32_m32        
  addl %edx, %eax                                   #  23    0x1917  2      OPC=addl_r32_r32        
  cltd                                              #  24    0x1919  1      OPC=cltd                
  idivl -0x28(%rbp)                                 #  25    0x191a  3      OPC=idivl_m32           
  movl %edx, %eax                                   #  26    0x191d  2      OPC=movl_r32_r32        
  cltq                                              #  27    0x191f  2      OPC=cltq                
  shlq $0x4, %rax                                   #  28    0x1921  4      OPC=shlq_r64_imm8       
  movq %rax, %rdx                                   #  29    0x1925  3      OPC=movq_r64_r64        
  movq -0x18(%rbp), %rax                            #  30    0x1928  4      OPC=movq_r64_m64        
  addq %rdx, %rax                                   #  31    0x192c  3      OPC=addq_r64_r64        
  vmovsd -0x10(%rbp), %xmm0                         #  32    0x192f  5      OPC=vmovsd_xmm_m64      
  vmovsd %xmm0, (%rax)                              #  33    0x1934  4      OPC=vmovsd_m64_xmm      
  vmovsd -0x8(%rbp), %xmm0                          #  34    0x1938  5      OPC=vmovsd_xmm_m64      
  vmovsd %xmm0, 0x8(%rax)                           #  35    0x193d  5      OPC=vmovsd_m64_xmm      
  movl -0x24(%rbp), %edx                            #  36    0x1942  3      OPC=movl_r32_m32        
  movl -0x2c(%rbp), %eax                            #  37    0x1945  3      OPC=movl_r32_m32        
  addl %edx, %eax                                   #  38    0x1948  2      OPC=addl_r32_r32        
  cltd                                              #  39    0x194a  1      OPC=cltd                
  idivl -0x28(%rbp)                                 #  40    0x194b  3      OPC=idivl_m32           
  movl %edx, %eax                                   #  41    0x194e  2      OPC=movl_r32_r32        
  cltq                                              #  42    0x1950  2      OPC=cltq                
  shlq $0x4, %rax                                   #  43    0x1952  4      OPC=shlq_r64_imm8       
  movq %rax, %rdx                                   #  44    0x1956  3      OPC=movq_r64_r64        
  movq -0x20(%rbp), %rax                            #  45    0x1959  4      OPC=movq_r64_m64        
  addq %rdx, %rax                                   #  46    0x195d  3      OPC=addq_r64_r64        
  vmovsd (%rax), %xmm1                              #  47    0x1960  4      OPC=vmovsd_xmm_m64      
  vmovsd 0x8(%rax), %xmm0                           #  48    0x1964  5      OPC=vmovsd_xmm_m64      
  movl -0x24(%rbp), %eax                            #  49    0x1969  3      OPC=movl_r32_m32        
  cltq                                              #  50    0x196c  2      OPC=cltq                
  shlq $0x4, %rax                                   #  51    0x196e  4      OPC=shlq_r64_imm8       
  movq %rax, %rdx                                   #  52    0x1972  3      OPC=movq_r64_r64        
  movq -0x20(%rbp), %rax                            #  53    0x1975  4      OPC=movq_r64_m64        
  addq %rdx, %rax                                   #  54    0x1979  3      OPC=addq_r64_r64        
  vmovsd (%rax), %xmm3                              #  55    0x197c  4      OPC=vmovsd_xmm_m64      
  vmovsd 0x8(%rax), %xmm2                           #  56    0x1980  5      OPC=vmovsd_xmm_m64      
  vsubsd %xmm3, %xmm1, %xmm1                        #  57    0x1985  4      OPC=vsubsd_xmm_xmm_xmm  
  vsubsd %xmm2, %xmm0, %xmm0                        #  58    0x1989  4      OPC=vsubsd_xmm_xmm_xmm  
  vmovsd -0x10(%rbp), %xmm2                         #  59    0x198d  5      OPC=vmovsd_xmm_m64      
  vaddsd %xmm1, %xmm2, %xmm1                        #  60    0x1992  4      OPC=vaddsd_xmm_xmm_xmm  
  vmovsd %xmm1, -0x10(%rbp)                         #  61    0x1996  5      OPC=vmovsd_m64_xmm      
  vmovsd -0x8(%rbp), %xmm1                          #  62    0x199b  5      OPC=vmovsd_xmm_m64      
  vaddsd %xmm0, %xmm1, %xmm0                        #  63    0x19a0  4      OPC=vaddsd_xmm_xmm_xmm  
  vmovsd %xmm0, -0x8(%rbp)                          #  64    0x19a4  5      OPC=vmovsd_m64_xmm      
  vmovsd -0x8(%rbp), %xmm0                          #  65    0x19a9  5      OPC=vmovsd_xmm_m64      
  vmovsd -0x10(%rbp), %xmm1                         #  66    0x19ae  5      OPC=vmovsd_xmm_m64      
  vmovsd %xmm1, -0x40(%rbp)                         #  67    0x19b3  5      OPC=vmovsd_m64_xmm      
  vmovsd %xmm0, -0x38(%rbp)                         #  68    0x19b8  5      OPC=vmovsd_m64_xmm      
  vmovsd -0x10(%rbp), %xmm1                         #  69    0x19bd  5      OPC=vmovsd_xmm_m64      
  vmovsd -0x8(%rbp), %xmm0                          #  70    0x19c2  5      OPC=vmovsd_xmm_m64      
  vmovapd %xmm1, %xmm2                              #  71    0x19c7  4      OPC=vmovapd_xmm_xmm     
  vmovapd %xmm0, %xmm1                              #  72    0x19cb  4      OPC=vmovapd_xmm_xmm     
  vmovapd %xmm2, %xmm0                              #  73    0x19cf  4      OPC=vmovapd_xmm_xmm     
  popq %rbp                                         #  74    0x19d3  1      OPC=popq_r64_1          
  retq                                              #  75    0x19d4  1      OPC=retq                
                                                                                                    
.size _Z32make_multiple_t_2nd_loop_elementPCdS0_iiiiS_, .-_Z32make_multiple_t_2nd_loop_elementPCdS0_iiiiS_

I tried to generate some test cases for it:

stoke testcase
--target bin/_Z32make_multiple_t_2nd_loop_elementPCdS0_iiiiS_.s
-o test.tc
--max_testcases 1024
--def_in "{ %rbp %rsp %rdi %rsi %edx %ecx %r8d %r9d %xmm0 %xmm1 }"
--live_out "{ %rbp %rsp %xmm0 %xmm1 }"

And the test case generation failed with:

WARNING: Last reported error from StateGen: 
WARNING: Could not resize memory.
FATAL ERROR: Unable to generate testcases!

I have tried to set --max_memory to a large number, but it is not working. This issue has occurred multiple times for me so far. What happened? Is there a quick fix for that warning?

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