From af27734ed982b52a9f1be0f035ac91726fc697e4 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Mon, 7 Nov 2022 16:08:15 +0100 Subject: [PATCH] Reapply "[X86] Use default attributes for even more intrinsics" Also un-XFAIL a test that now passes. Fixes SWDEV-422608 ---- Another followup to D136939: This switches readonly X86 intrinsics to use default attributes (nosync, nofree, nocallback and willreturn). With this, all readnone/readonly intrinsics should be covered, only memory writing intrinsics are left. Differential Revision: https://reviews.llvm.org/D137552 Change-Id: Ib1e0124ccbbb26b666363be0d9ed77105a5ac1ea --- llvm/include/llvm/IR/IntrinsicsX86.td | 230 +++++++++--------- .../InstCombine/X86/x86-masked-memops.ll | 3 - 2 files changed, 115 insertions(+), 118 deletions(-) diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td index 51406066f9cd2b..afa25d142b6305 100644 --- a/llvm/include/llvm/IR/IntrinsicsX86.td +++ b/llvm/include/llvm/IR/IntrinsicsX86.td @@ -571,7 +571,7 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // Specialized unaligned load. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse3_ldu_dq : ClangBuiltin<"__builtin_ia32_lddqu">, - Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty], [IntrReadMem]>; + DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_ptr_ty], [IntrReadMem]>; } // Thread synchronization ops. @@ -1356,23 +1356,23 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // SIMD load ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_avx_ldu_dq_256 : ClangBuiltin<"__builtin_ia32_lddqu256">, - Intrinsic<[llvm_v32i8_ty], [llvm_ptr_ty], [IntrReadMem]>; + DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_ptr_ty], [IntrReadMem]>; } // Conditional load ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_avx_maskload_pd : ClangBuiltin<"__builtin_ia32_maskloadpd">, - Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty, llvm_v2i64_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_ptr_ty, llvm_v2i64_ty], + [IntrReadMem, IntrArgMemOnly]>; def int_x86_avx_maskload_ps : ClangBuiltin<"__builtin_ia32_maskloadps">, - Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty, llvm_v4i32_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_ptr_ty, llvm_v4i32_ty], + [IntrReadMem, IntrArgMemOnly]>; def int_x86_avx_maskload_pd_256 : ClangBuiltin<"__builtin_ia32_maskloadpd256">, - Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty, llvm_v4i64_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_ptr_ty, llvm_v4i64_ty], + [IntrReadMem, IntrArgMemOnly]>; def int_x86_avx_maskload_ps_256 : ClangBuiltin<"__builtin_ia32_maskloadps256">, - Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty, llvm_v8i32_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_ptr_ty, llvm_v8i32_ty], + [IntrReadMem, IntrArgMemOnly]>; } // Conditional store ops @@ -1655,17 +1655,17 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // Conditional load ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_avx2_maskload_d : ClangBuiltin<"__builtin_ia32_maskloadd">, - Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_v4i32_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_v4i32_ty], + [IntrReadMem, IntrArgMemOnly]>; def int_x86_avx2_maskload_q : ClangBuiltin<"__builtin_ia32_maskloadq">, - Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_v2i64_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_v2i64_ty], + [IntrReadMem, IntrArgMemOnly]>; def int_x86_avx2_maskload_d_256 : ClangBuiltin<"__builtin_ia32_maskloadd256">, - Intrinsic<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_v8i32_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_v8i32_ty], + [IntrReadMem, IntrArgMemOnly]>; def int_x86_avx2_maskload_q_256 : ClangBuiltin<"__builtin_ia32_maskloadq256">, - Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty], - [IntrReadMem, IntrArgMemOnly]>; + DefaultAttrsIntrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty], + [IntrReadMem, IntrArgMemOnly]>; } // Conditional store ops @@ -1784,68 +1784,68 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // NOTE: These can't be ArgMemOnly because you can put the address completely // in the index register. def int_x86_avx2_gather_d_pd : ClangBuiltin<"__builtin_ia32_gatherd_pd">, - Intrinsic<[llvm_v2f64_ty], + DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_d_pd_256 : ClangBuiltin<"__builtin_ia32_gatherd_pd256">, - Intrinsic<[llvm_v4f64_ty], + DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_pd : ClangBuiltin<"__builtin_ia32_gatherq_pd">, - Intrinsic<[llvm_v2f64_ty], + DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_pd_256 : ClangBuiltin<"__builtin_ia32_gatherq_pd256">, - Intrinsic<[llvm_v4f64_ty], + DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_d_ps : ClangBuiltin<"__builtin_ia32_gatherd_ps">, - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_d_ps_256 : ClangBuiltin<"__builtin_ia32_gatherd_ps256">, - Intrinsic<[llvm_v8f32_ty], + DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_ps : ClangBuiltin<"__builtin_ia32_gatherq_ps">, - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_ps_256 : ClangBuiltin<"__builtin_ia32_gatherq_ps256">, - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_d_q : ClangBuiltin<"__builtin_ia32_gatherd_q">, - Intrinsic<[llvm_v2i64_ty], + DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_d_q_256 : ClangBuiltin<"__builtin_ia32_gatherd_q256">, - Intrinsic<[llvm_v4i64_ty], + DefaultAttrsIntrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_q : ClangBuiltin<"__builtin_ia32_gatherq_q">, - Intrinsic<[llvm_v2i64_ty], + DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_q_256 : ClangBuiltin<"__builtin_ia32_gatherq_q256">, - Intrinsic<[llvm_v4i64_ty], + DefaultAttrsIntrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_d_d : ClangBuiltin<"__builtin_ia32_gatherd_d">, - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_d_d_256 : ClangBuiltin<"__builtin_ia32_gatherd_d256">, - Intrinsic<[llvm_v8i32_ty], + DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_d : ClangBuiltin<"__builtin_ia32_gatherq_d">, - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx2_gather_q_d_256 : ClangBuiltin<"__builtin_ia32_gatherq_d256">, - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadMem, ImmArg>]>; } @@ -3884,117 +3884,117 @@ let TargetPrefix = "x86" in { // NOTE: These can't be ArgMemOnly because you can put the address completely // in the index register. def int_x86_avx512_gather_dpd_512 : - Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, - llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, + llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather_dps_512 : - Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_ptr_ty, - llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_ptr_ty, + llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather_qpd_512 : - Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather_qps_512 : - Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather_dpq_512 : - Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, - llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, + llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather_dpi_512 : - Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty, llvm_ptr_ty, - llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty, llvm_ptr_ty, + llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather_qpq_512 : - Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather_qpi_512 : - Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div2_df : - Intrinsic<[llvm_v2f64_ty], + DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div2_di : - Intrinsic<[llvm_v2i64_ty], + DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div4_df : - Intrinsic<[llvm_v4f64_ty], + DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div4_di : - Intrinsic<[llvm_v4i64_ty], + DefaultAttrsIntrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div4_sf : - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div4_si : - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div8_sf : - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3div8_si : - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3siv2_df : - Intrinsic<[llvm_v2f64_ty], + DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; - def int_x86_avx512_gather3siv2_di : - Intrinsic<[llvm_v2i64_ty], + def int_x86_avx512_gather3siv2_di: + DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3siv4_df : - Intrinsic<[llvm_v4f64_ty], + DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3siv4_di : - Intrinsic<[llvm_v4i64_ty], + DefaultAttrsIntrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3siv4_sf : - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3siv4_si : - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3siv8_sf : - Intrinsic<[llvm_v8f32_ty], + DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_gather3siv8_si : - Intrinsic<[llvm_v8i32_ty], + DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; @@ -4155,117 +4155,117 @@ let TargetPrefix = "x86" in { // NOTE: These can't be ArgMemOnly because you can put the address completely // in the index register. def int_x86_avx512_mask_gather_dpd_512 : - Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, - llvm_v8i32_ty, llvm_v8i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, + llvm_v8i32_ty, llvm_v8i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather_dps_512 : - Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_ptr_ty, - llvm_v16i32_ty, llvm_v16i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_ptr_ty, + llvm_v16i32_ty, llvm_v16i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather_qpd_512 : - Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather_qps_512 : - Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather_dpq_512 : - Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, - llvm_v8i32_ty, llvm_v8i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, + llvm_v8i32_ty, llvm_v8i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather_dpi_512 : - Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty, llvm_ptr_ty, - llvm_v16i32_ty, llvm_v16i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty, llvm_ptr_ty, + llvm_v16i32_ty, llvm_v16i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather_qpq_512 : - Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather_qpi_512 : - Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty, - llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], - [IntrReadMem, ImmArg>]>; + DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty, + llvm_v8i64_ty, llvm_v8i1_ty, llvm_i32_ty], + [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div2_df : - Intrinsic<[llvm_v2f64_ty], + DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div2_di : - Intrinsic<[llvm_v2i64_ty], + DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div4_df : - Intrinsic<[llvm_v4f64_ty], + DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div4_di : - Intrinsic<[llvm_v4i64_ty], + DefaultAttrsIntrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div4_sf : - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div4_si : - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div8_sf : - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3div8_si : - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv2_df : - Intrinsic<[llvm_v2f64_ty], + DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v2i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv2_di : - Intrinsic<[llvm_v2i64_ty], + DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v2i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv4_df : - Intrinsic<[llvm_v4f64_ty], + DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv4_di : - Intrinsic<[llvm_v4i64_ty], + DefaultAttrsIntrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv4_sf : - Intrinsic<[llvm_v4f32_ty], + DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv4_si : - Intrinsic<[llvm_v4i32_ty], + DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv8_sf : - Intrinsic<[llvm_v8f32_ty], + DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; def int_x86_avx512_mask_gather3siv8_si : - Intrinsic<[llvm_v8i32_ty], + DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i1_ty, llvm_i32_ty], [IntrReadMem, ImmArg>]>; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll index 8e3387b5e50aee..49f4729e746e86 100644 --- a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll @@ -1,9 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s -; compiler crash -; XFAIL: * - ;; MASKED LOADS ; If the mask isn't constant, do nothing.