diff --git a/common/daq/per_dbc.dbc b/common/daq/per_dbc.dbc index af74b16f..41c2e1a5 100644 --- a/common/daq/per_dbc.dbc +++ b/common/daq/per_dbc.dbc @@ -1,7 +1,7 @@ VERSION "" -NS_ : +NS_ : NS_DESC_ CM_ BA_DEF_ @@ -33,7 +33,7 @@ NS_ : BS_: -BU_: Main_Module Torque_Vector_fpga Driveline Precharge OrionBMS torque_vector Dashboard Steering Acceleration bootloader BMS_LV BITSTREAM Charger DAQ Precharge ARDUINO TEST_NODE TEST_NODE_2 DAQ +BU_: Main_Module Torque_Vector_fpga Driveline Precharge OrionBMS torque_vector Dashboard Steering PDU Acceleration bootloader BMS_LV BITSTREAM Charger DAQ Precharge ARDUINO TEST_NODE TEST_NODE_2 DAQ BO_ 2214598913 main_hb: 2 Main_Module @@ -909,11 +909,11 @@ CM_ SG_ 2415925569 LV5_I ""; CM_ SG_ 2415925569 LV24_I ""; CM_ BO_ 2415925633 "performance metrics of MCU"; CM_ SG_ 2415925633 can_tx_fails "Number of CAN transmit failures"; -CM_ SG_ 2415925633 sched_error "PSCHED Error Flags (bit #) - 0 - N/A -1 - no free task -2 - FG Miss -3 - BG Miss +CM_ SG_ 2415925633 sched_error "PSCHED Error Flags (bit #) + 0 - N/A +1 - no free task +2 - FG Miss +3 - BG Miss 4 - Individual FG Miss"; CM_ SG_ 2415925633 background_use "Percent of the 1ms loop time used by background tasks"; CM_ SG_ 2415925633 foreground_use "Percent of the 1ms loop time used by foreground tasks"; @@ -1537,3 +1537,5 @@ SIG_VALTYPE_ 2214593731 P_c : 1; SIG_VALTYPE_ 2348810751 left_speed : 1; SIG_VALTYPE_ 2348810751 right_speed : 1; SIG_VALTYPE_ 2483028349 test_sig5_3 : 1; + + diff --git a/common/faults/fault_nodes.h b/common/faults/fault_nodes.h index 09878fc9..086e3e06 100644 --- a/common/faults/fault_nodes.h +++ b/common/faults/fault_nodes.h @@ -4,12 +4,13 @@ //BEGIN AUTO NODE DEFS -#define NODE_MAIN_MODULE 0 -#define NODE_DRIVELINE_FRONT 1 -#define NODE_DASHBOARD 2 -#define NODE_PRECHARGE 3 -#define NODE_TV_OLD 4 -#define NODE_TEST 5 +#define NODE_PDU 0 +#define NODE_MAIN_MODULE 1 +#define NODE_DRIVELINE_FRONT 2 +#define NODE_DASHBOARD 3 +#define NODE_PRECHARGE 4 +#define NODE_TV_OLD 5 +#define NODE_TEST 6 //END AUTO NODE DEFS diff --git a/common/queue/queue.c b/common/queue/queue.c index 028147d6..9be32d44 100644 --- a/common/queue/queue.c +++ b/common/queue/queue.c @@ -1,82 +1,72 @@ #include "queue.h" -// @funcname: qConstruct -// -// @brief: Initializes queue for specific item type -// -// @param: q: Handle for queue -// @param: size: Size of each item in queue in bytes +/** + * @brief Initializes queue for specific item type + * + * @param q Handle for queue + * @param size Size of each item in queue in bytes + */ void qConstruct(q_handle_t* q, uint8_t size) { - q->item_count = 0; // Initialize number of items to 0 q->size = size; // Initialize size to sizeof(struct) - q->start = q->buffer; // Set start pointer to beginning of buffer - q->current = q->buffer; // Set current pointer to beginning of buffer - q->max_items = (uint8_t) (MEM_SIZE / (float) size); // Calculate maximum number of items + q->max_items = (MEM_SIZE / (float) size); // Calculate maximum number of items + q->head = q->tail = 0; } -// @funcname: qIsFull -// -// @brief: Returns 1 if the queue is full, 0 else -// -// @param: q: Handle for queue -// -// @return: 1 if queue is full, 0 else +/** + * @brief Returns 1 if the queue is full, 0 else + * + * @param q Handle for queue + * @return 1 if queue is full, 0 else + */ uint8_t qIsFull(q_handle_t* q) { - return q->item_count == q->max_items ? 1 : 0; // Return 1 if full, 0 else + uint32_t next_head = (q->head + 1) % q->max_items; + return next_head == q->tail; } -// @funcname: qSendToBack -// -// @brief: Adds an item to the queue (enqueue) -// -// @param: q: Handle for queue -// @param: item: Item to be added to queue -// -// @return: SUCCESS if value is added, FAILURE if queue is full -success_t qSendToBack(q_handle_t* q, const void* item) +/** + * @brief Returns 1 if the queue is empty, 0 else + * + * @param q Handle for queue + * @return 1 if queue is empty, 0 else + */ +uint8_t qIsEmpty(q_handle_t* q) { - if (q->item_count == q->max_items) // Ensure that we have a location for the item - { - return FAILURE_G; // We don't, so let the user know it failed - } - - if ((q->current - q->buffer) == q->size * q->max_items) // Check if the current pointer location is at the end of the buffer - { - q->current = q->buffer; // Reset the buffer location - } - - memcpy(q->current, item, q->size); // Copy item into queue at current location - q->current = q->current + q->size; // Increment pointer by number of bytes corresponding to item size - ++q->item_count; // Increment number of items in queue + return q->head == q->tail; +} +/** + * @brief Adds an item to the queue (enqueue) + * @note Interrupt safe ONLY if ONE producer and consumer + * + * @param q Handle for queue + * @param item Item to be added to queue + * @return success_t SUCCESS if value is added, FAILURE if queue is full + */ +success_t qSendToBack(q_handle_t* q, const void* item) +{ + uint32_t next_head = (q->head + 1) % q->max_items; // Calculate next head + if (next_head == q->tail) return FAILURE_G; // No room + volatile uint8_t* dst = q->buffer + (q->head * q->size); + for (uint32_t i = 0; i < q->size; ++i) dst[i] = ((uint8_t *)item)[i]; + q->head = next_head; // Update head return SUCCESS_G; } -// @funcname: qReceive -// -// @brief: Removes an item to the queue (dequeue) -// -// @param: q: Handle for queue -// @param: rx_buf: Location for the item to be "moved" to -// -// @return: SUCCESS if value is removed, FAILURE if queue is empty +/** + * @brief Removes an item to the queue (dequeue) + * @note Interrupt safe ONLY if ONE producer and consumer + * + * @param q Handle for queue + * @param rx_buf Location for the item to be "moved" to + * @return success_t SUCCESS if value is removed, FAILURE if queue is empty + */ success_t qReceive(q_handle_t* q, void* rx_buf) { - if (q->item_count == 0) // Ensure that we actually have an item in the queue - { - return FAILURE_G; // We don't, so let the user know it failed - } - - if ((q->start - q->buffer) == q->size * q->max_items) // Check if the start pointer location is at the end of the buffer - { - q->start = q->buffer; // Reset the buffer location - } - - memcpy(rx_buf, q->start, q->size); // Copy item from queue into buffer - q->start = q->start + q->size; // Increment pointer by number of bytes corresponding to item size - --q->item_count; // Decrement number of items in queue - + if (q->tail == q->head) return FAILURE_G; // Empty + volatile uint8_t* src = q->buffer + (q->tail * q->size); + for (uint32_t i = 0; i < q->size; ++i) ((uint8_t *)rx_buf)[i] = src[i]; + q->tail = (q->tail + 1) % q->max_items; // Update tail return SUCCESS_G; -} \ No newline at end of file +} diff --git a/common/queue/queue.h b/common/queue/queue.h index 792b4b6f..4a3b0a4f 100644 --- a/common/queue/queue.h +++ b/common/queue/queue.h @@ -3,7 +3,7 @@ // Includes #include "stdint.h" -#include "string.h" +#include "stdbool.h" // Generic defines #ifdef MEM_SMALL @@ -23,17 +23,17 @@ typedef enum { // Structs typedef struct { - uint8_t buffer[MEM_SIZE]; // Ring buffer for queue storage - uint8_t item_count; // Number of items in queue - uint8_t max_items; // Maximum number of items in queue based on size - uint8_t* start; // Pointer to first item in queue - uint8_t* current; // Pointer to next location for addition - uint16_t size; // Size of each item + volatile uint8_t buffer[MEM_SIZE]; //!< Ring buffer for queue storage + volatile uint32_t head; //!< Element number of first item + volatile uint32_t tail; //!< Element number of last item + uint32_t size; //!< Size of each item + uint32_t max_items; //!< Maximum number of items in queue based on size (can only ever hold max_items - 1) } q_handle_t; // Prototypes void qConstruct(q_handle_t* q, uint8_t size); uint8_t qIsFull(q_handle_t* q); +uint8_t qIsEmpty(q_handle_t* q); success_t qSendToBack(q_handle_t* q, const void* item); success_t qReceive(q_handle_t* q, void* rx_buf); diff --git a/source/bootloader/main.c b/source/bootloader/main.c index 6bb11ff3..1cda13a9 100644 --- a/source/bootloader/main.c +++ b/source/bootloader/main.c @@ -117,7 +117,7 @@ int main (void) */ while(!bootloader_timeout || !allow_application_launch) { - while (q_rx_can.item_count > 0) + while (!qIsEmpty(&q_rx_can)) canRxUpdate(); if (send_status_flag) diff --git a/source/dashboard/can/can_parse.c b/source/dashboard/can/can_parse.c index 3fd76c45..825663f3 100644 --- a/source/dashboard/can/can_parse.c +++ b/source/dashboard/can/can_parse.c @@ -326,8 +326,8 @@ bool initCANFilter() CAN1->sFilterRegister[8].FR1 = (ID_FAULT_SYNC_MAIN_MODULE << 3) | 4; CAN1->sFilterRegister[8].FR2 = (ID_FAULT_SYNC_DRIVELINE << 3) | 4; CAN1->FA1R |= (1 << 9); // configure bank 9 - CAN1->sFilterRegister[9].FR1 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; - CAN1->sFilterRegister[9].FR2 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; + CAN1->sFilterRegister[9].FR1 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; + CAN1->sFilterRegister[9].FR2 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; CAN1->FA1R |= (1 << 10); // configure bank 10 CAN1->sFilterRegister[10].FR1 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; CAN1->sFilterRegister[10].FR2 = (ID_SET_FAULT << 3) | 4; diff --git a/source/dashboard/can/can_parse.h b/source/dashboard/can/can_parse.h index 6a95b948..cd4451df 100644 --- a/source/dashboard/can/can_parse.h +++ b/source/dashboard/can/can_parse.h @@ -48,7 +48,7 @@ #define ID_FAULT_SYNC_DRIVELINE 0x8ca83 #define ID_FAULT_SYNC_PRECHARGE 0x8cac4 #define ID_FAULT_SYNC_TORQUE_VECTOR_FPGA 0x8ca42 -#define ID_FAULT_SYNC_TEST_NODE 0x8cb7f +#define ID_FAULT_SYNC_TEST_NODE 0x8cbbf #define ID_SET_FAULT 0x809c83e #define ID_RETURN_FAULT_CONTROL 0x809c87e #define ID_DAQ_COMMAND_DASHBOARD 0x14000172 @@ -194,7 +194,7 @@ typedef enum { // Message Raw Structures /* BEGIN AUTO MESSAGE STRUCTURE */ -typedef union { +typedef union { struct { uint64_t throttle: 12; uint64_t throttle_right: 12; diff --git a/source/driveline/can/can_parse.c b/source/driveline/can/can_parse.c index 76def9c6..6256a0a8 100644 --- a/source/driveline/can/can_parse.c +++ b/source/driveline/can/can_parse.c @@ -205,8 +205,8 @@ bool initCANFilter() CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_PDU << 3) | 4; CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_MAIN_MODULE << 3) | 4; CAN1->FA1R |= (1 << 5); // configure bank 5 - CAN1->sFilterRegister[5].FR1 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; - CAN1->sFilterRegister[5].FR2 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; + CAN1->sFilterRegister[5].FR1 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4; + CAN1->sFilterRegister[5].FR2 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; CAN1->FA1R |= (1 << 6); // configure bank 6 CAN1->sFilterRegister[6].FR1 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; CAN1->sFilterRegister[6].FR2 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; diff --git a/source/driveline/can/can_parse.h b/source/driveline/can/can_parse.h index e45237b0..78b2c723 100644 --- a/source/driveline/can/can_parse.h +++ b/source/driveline/can/can_parse.h @@ -49,7 +49,7 @@ typedef union { #define ID_FAULT_SYNC_DASHBOARD 0x8cb05 #define ID_FAULT_SYNC_PRECHARGE 0x8cac4 #define ID_FAULT_SYNC_TORQUE_VECTOR_FPGA 0x8ca42 -#define ID_FAULT_SYNC_TEST_NODE 0x8cb7f +#define ID_FAULT_SYNC_TEST_NODE 0x8cbbf #define ID_SET_FAULT 0x809c83e #define ID_RETURN_FAULT_CONTROL 0x809c87e #define ID_DAQ_COMMAND_DRIVELINE 0x140000f2 @@ -228,7 +228,7 @@ typedef enum { // Message Raw Structures /* BEGIN AUTO MESSAGE STRUCTURE */ -typedef union { +typedef union { struct { uint64_t front_left_motor: 8; uint64_t front_left_motor_link: 8; diff --git a/source/l4_testing/can/can_parse.c b/source/l4_testing/can/can_parse.c index a22789db..d8a3bfe6 100644 --- a/source/l4_testing/can/can_parse.c +++ b/source/l4_testing/can/can_parse.c @@ -152,8 +152,8 @@ bool initCANFilter() CAN1->sFilterRegister[3].FR1 = (ID_FAULT_SYNC_MAIN_MODULE << 3) | 4; CAN1->sFilterRegister[3].FR2 = (ID_FAULT_SYNC_DRIVELINE << 3) | 4; CAN1->FA1R |= (1 << 4); // configure bank 4 - CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; - CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; + CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4; + CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; CAN1->FA1R |= (1 << 5); // configure bank 5 CAN1->sFilterRegister[5].FR1 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; CAN1->sFilterRegister[5].FR2 = (ID_SET_FAULT << 3) | 4; diff --git a/source/main_module/can/can_parse.c b/source/main_module/can/can_parse.c index fd767dec..e9d27f65 100644 --- a/source/main_module/can/can_parse.c +++ b/source/main_module/can/can_parse.c @@ -221,8 +221,8 @@ bool initCANFilter() CAN1->sFilterRegister[5].FR1 = (ID_FAULT_SYNC_DRIVELINE << 3) | 4; CAN1->sFilterRegister[5].FR2 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4; CAN1->FA1R |= (1 << 6); // configure bank 6 - CAN1->sFilterRegister[6].FR1 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; - CAN1->sFilterRegister[6].FR2 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; + CAN1->sFilterRegister[6].FR1 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; + CAN1->sFilterRegister[6].FR2 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; CAN1->FA1R |= (1 << 7); // configure bank 7 CAN1->sFilterRegister[7].FR1 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; CAN1->sFilterRegister[7].FR2 = (ID_SET_FAULT << 3) | 4; diff --git a/source/main_module/can/can_parse.h b/source/main_module/can/can_parse.h index 3d1271c3..65e0302d 100644 --- a/source/main_module/can/can_parse.h +++ b/source/main_module/can/can_parse.h @@ -50,7 +50,7 @@ #define ID_FAULT_SYNC_DASHBOARD 0x8cb05 #define ID_FAULT_SYNC_PRECHARGE 0x8cac4 #define ID_FAULT_SYNC_TORQUE_VECTOR_FPGA 0x8ca42 -#define ID_FAULT_SYNC_TEST_NODE 0x8cb7f +#define ID_FAULT_SYNC_TEST_NODE 0x8cbbf #define ID_SET_FAULT 0x809c83e #define ID_RETURN_FAULT_CONTROL 0x809c87e #define ID_DAQ_COMMAND_MAIN_MODULE 0x14000072 @@ -316,7 +316,7 @@ typedef enum { // Message Raw Structures /* BEGIN AUTO MESSAGE STRUCTURE */ -typedef union { +typedef union { struct { uint64_t car_state: 8; uint64_t precharge_state: 1; diff --git a/source/precharge/can/can_parse.c b/source/precharge/can/can_parse.c index c970bb32..a30ad8ac 100644 --- a/source/precharge/can/can_parse.c +++ b/source/precharge/can/can_parse.c @@ -351,8 +351,8 @@ bool initCANFilter() CAN1->sFilterRegister[3].FR1 = (ID_FAULT_SYNC_MAIN_MODULE << 3) | 4; CAN1->sFilterRegister[3].FR2 = (ID_FAULT_SYNC_DRIVELINE << 3) | 4; CAN1->FA1R |= (1 << 4); // configure bank 4 - CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; - CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; + CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4; + CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_TORQUE_VECTOR_FPGA << 3) | 4; CAN1->FA1R |= (1 << 5); // configure bank 5 CAN1->sFilterRegister[5].FR1 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; CAN1->sFilterRegister[5].FR2 = (ID_SET_FAULT << 3) | 4; diff --git a/source/precharge/can/can_parse.h b/source/precharge/can/can_parse.h index 51a9e2fb..811e4bdd 100644 --- a/source/precharge/can/can_parse.h +++ b/source/precharge/can/can_parse.h @@ -63,7 +63,7 @@ #define ID_FAULT_SYNC_DRIVELINE 0x8ca83 #define ID_FAULT_SYNC_DASHBOARD 0x8cb05 #define ID_FAULT_SYNC_TORQUE_VECTOR_FPGA 0x8ca42 -#define ID_FAULT_SYNC_TEST_NODE 0x8cb7f +#define ID_FAULT_SYNC_TEST_NODE 0x8cbbf #define ID_SET_FAULT 0x809c83e #define ID_RETURN_FAULT_CONTROL 0x809c87e #define ID_DAQ_COMMAND_PRECHARGE 0x14000132 @@ -273,7 +273,7 @@ // Message Raw Structures /* BEGIN AUTO MESSAGE STRUCTURE */ -typedef union { +typedef union { struct { uint64_t toggle: 1; uint64_t time: 16; diff --git a/source/torque_vector_fpga/can/can_parse.c b/source/torque_vector_fpga/can/can_parse.c index c481ee22..446241aa 100644 --- a/source/torque_vector_fpga/can/can_parse.c +++ b/source/torque_vector_fpga/can/can_parse.c @@ -64,6 +64,11 @@ void canRxUpdate() can_data.bitstream_request.download_size = msg_data_a->bitstream_request.download_size; bitstream_request_CALLBACK(msg_data_a); break; + case ID_FAULT_SYNC_PDU: + can_data.fault_sync_pdu.idx = msg_data_a->fault_sync_pdu.idx; + can_data.fault_sync_pdu.latched = msg_data_a->fault_sync_pdu.latched; + handleCallbacks(msg_data_a->fault_sync_main_module.idx, msg_data_a->fault_sync_main_module.latched); + break; case ID_FAULT_SYNC_MAIN_MODULE: can_data.fault_sync_main_module.idx = msg_data_a->fault_sync_main_module.idx; can_data.fault_sync_main_module.latched = msg_data_a->fault_sync_main_module.latched; @@ -135,16 +140,17 @@ bool initCANFilter() CAN1->sFilterRegister[1].FR1 = (ID_BITSTREAM_DATA << 3) | 4; CAN1->sFilterRegister[1].FR2 = (ID_BITSTREAM_REQUEST << 3) | 4; CAN1->FA1R |= (1 << 2); // configure bank 2 - CAN1->sFilterRegister[2].FR1 = (ID_FAULT_SYNC_MAIN_MODULE << 3) | 4; - CAN1->sFilterRegister[2].FR2 = (ID_FAULT_SYNC_DRIVELINE << 3) | 4; + CAN1->sFilterRegister[2].FR1 = (ID_FAULT_SYNC_PDU << 3) | 4; + CAN1->sFilterRegister[2].FR2 = (ID_FAULT_SYNC_MAIN_MODULE << 3) | 4; CAN1->FA1R |= (1 << 3); // configure bank 3 - CAN1->sFilterRegister[3].FR1 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4; - CAN1->sFilterRegister[3].FR2 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; + CAN1->sFilterRegister[3].FR1 = (ID_FAULT_SYNC_DRIVELINE << 3) | 4; + CAN1->sFilterRegister[3].FR2 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4; CAN1->FA1R |= (1 << 4); // configure bank 4 - CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; - CAN1->sFilterRegister[4].FR2 = (ID_SET_FAULT << 3) | 4; + CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_PRECHARGE << 3) | 4; + CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4; CAN1->FA1R |= (1 << 5); // configure bank 5 - CAN1->sFilterRegister[5].FR1 = (ID_RETURN_FAULT_CONTROL << 3) | 4; + CAN1->sFilterRegister[5].FR1 = (ID_SET_FAULT << 3) | 4; + CAN1->sFilterRegister[5].FR2 = (ID_RETURN_FAULT_CONTROL << 3) | 4; /* END AUTO FILTER */ CAN1->FMR &= ~CAN_FMR_FINIT; // Enable Filters (exit filter init mode) diff --git a/source/torque_vector_fpga/can/can_parse.h b/source/torque_vector_fpga/can/can_parse.h index 9518cc01..35139ae8 100644 --- a/source/torque_vector_fpga/can/can_parse.h +++ b/source/torque_vector_fpga/can/can_parse.h @@ -27,11 +27,12 @@ #define ID_REAR_WHEEL_DATA 0x4000043 #define ID_BITSTREAM_DATA 0x400193e #define ID_BITSTREAM_REQUEST 0x1000197e +#define ID_FAULT_SYNC_PDU 0x8cb5f #define ID_FAULT_SYNC_MAIN_MODULE 0x8ca01 #define ID_FAULT_SYNC_DRIVELINE 0x8ca83 #define ID_FAULT_SYNC_DASHBOARD 0x8cb05 #define ID_FAULT_SYNC_PRECHARGE 0x8cac4 -#define ID_FAULT_SYNC_TEST_NODE 0x8cb7f +#define ID_FAULT_SYNC_TEST_NODE 0x8cbbf #define ID_SET_FAULT 0x809c83e #define ID_RETURN_FAULT_CONTROL 0x809c87e /* END AUTO ID DEFS */ @@ -45,6 +46,7 @@ #define DLC_REAR_WHEEL_DATA 8 #define DLC_BITSTREAM_DATA 8 #define DLC_BITSTREAM_REQUEST 5 +#define DLC_FAULT_SYNC_PDU 3 #define DLC_FAULT_SYNC_MAIN_MODULE 3 #define DLC_FAULT_SYNC_DRIVELINE 3 #define DLC_FAULT_SYNC_DASHBOARD 3 @@ -137,6 +139,10 @@ typedef union { uint64_t download_request: 1; uint64_t download_size: 32; } bitstream_request; + struct { + uint64_t idx: 16; + uint64_t latched: 1; + } fault_sync_pdu; struct { uint64_t idx: 16; uint64_t latched: 1; @@ -202,6 +208,10 @@ typedef struct { uint8_t download_request; uint32_t download_size; } bitstream_request; + struct { + uint16_t idx; + uint8_t latched; + } fault_sync_pdu; struct { uint16_t idx; uint8_t latched;