file.patch

diff --git a/soc/riscv32/riscv-privilege/miv/dts_fixup.h b/soc/riscv32/riscv-privilege/miv/dts_fixup.h
index 6bd4d95..f510b78 100644
--- a/soc/riscv32/riscv-privilege/miv/dts_fixup.h
+++ b/soc/riscv32/riscv-privilege/miv/dts_fixup.h
@@ -12,8 +12,8 @@
 	DT_RISCV_PLIC0_40000000_REG_BASE_ADDRESS
 
 /* UART 0 */
-#define DT_MIV_UART_0_BASE_ADDR		DT_MICROSEMI_COREUART_70001000_BASE_ADDRESS
-#define DT_MIV_UART_0_CLOCK_FREQUENCY	DT_MICROSEMI_COREUART_70001000_CLOCK_FREQUENCY
-#define DT_MIV_UART_0_BAUD_RATE		DT_MICROSEMI_COREUART_70001000_CURRENT_SPEED
-#define DT_MIV_UART_0_NAME			DT_MICROSEMI_COREUART_70001000_LABEL
+#define DT_MIV_UART_0_BASE_ADDR		DT_MICROSEMI_COREUART_0_BASE_ADDRESS
+#define DT_MIV_UART_0_CLOCK_FREQUENCY	DT_MICROSEMI_COREUART_0_CLOCK_FREQUENCY
+#define DT_MIV_UART_0_BAUD_RATE		DT_MICROSEMI_COREUART_0_CURRENT_SPEED
+#define DT_MIV_UART_0_NAME		DT_MICROSEMI_COREUART_0_LABEL