diff --git a/src/cpu/o3/lsq.cc b/src/cpu/o3/lsq.cc
index 17749d8fb6..20af6804f9 100644
--- a/src/cpu/o3/lsq.cc
+++ b/src/cpu/o3/lsq.cc
@@ -633,7 +633,6 @@ LSQ::recvFunctionalCustomSignal(PacketPtr pkt, int sig)
                 it++;
             }
         }
-        delete pkt;
         panic_if(bus.size() > getLQEntries(), "elements on bus should never be greater than LQ size");
     } else {
         panic("unsupported sig %d in recvFunctionalCustomSignal\n", sig);
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 480ba215dd..5e0e5efa11 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -93,16 +93,19 @@ BaseCache::SendTimingRespEvent::description() const
     return "BaseCache response event";
 }
 
-BaseCache::SendCustomEvent::SendCustomEvent(BaseCache* cache, PacketPtr pkt, int sig)
+BaseCache::SendCustomEvent::SendCustomEvent(BaseCache* cache, PacketPtr pkt, int sig, bool deletePkt)
     : Event(Stat_Event_Pri, AutoDelete),
       cache(cache),
       pkt(pkt),
-      sig(sig) {}
+      sig(sig),
+      deletePkt(deletePkt) {}
 
 void
 BaseCache::SendCustomEvent::process()
 {
     cache->cpuSidePort.sendCustomSignal(pkt, sig);
+    if (deletePkt)
+        delete pkt;
 }
 
 const char*
@@ -2051,14 +2054,17 @@ BaseCache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
     blk->setWhenReady(clockEdge(fillLatency) + pkt->headerDelay +
                       pkt->payloadDelay);
 
-    // NOTE: just send the block address back to lsu
+    // NOTE: Dcache sends the block address back to lsu
     // notify lsu to clear data on data bus
     // when the block is ready in dcache (load can get data from cache directly)
-    PacketPtr customPkt = new Packet(pkt->req, MemCmd::CustomBusClear);
-    customPkt->setAddr(addr);
-    SendCustomEvent* clearEvent = new SendCustomEvent(this, customPkt, DcacheRespType::Bus_Clear);
-    schedule(clearEvent, clockEdge(fillLatency) + pkt->headerDelay +
-                      pkt->payloadDelay);
+    if (cacheLevel == 1 && !isReadOnly) {
+        PacketPtr customPkt = new Packet(pkt->req, MemCmd::CustomBusClear);
+        customPkt->setAddr(addr);
+        // set `deletePkt` as true to ensure that the customPkt will be deleted finally.
+        SendCustomEvent* clearEvent = new SendCustomEvent(this, customPkt, DcacheRespType::Bus_Clear, true);
+        schedule(clearEvent, clockEdge(fillLatency) + pkt->headerDelay +
+                        pkt->payloadDelay);
+    }
 
     Request::XsMetadata blk_meta = blk->getXsMetadata();
     blk_meta.prefetchSource = pkt->req->getPFSource();
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index ce9591d609..1e2ace715d 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -365,8 +365,9 @@ class BaseCache : public ClockedObject, CacheAccessor
         BaseCache* cache;
         PacketPtr pkt;
         int sig;
+        bool deletePkt;
       public:
-        SendCustomEvent(BaseCache* cache, PacketPtr pkt, int sig);
+        SendCustomEvent(BaseCache* cache, PacketPtr pkt, int sig, bool deletePkt);
         void process() override;
         const char* description() const override;
     };
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 14a9c2ae60..2735864e48 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -990,7 +990,8 @@ Cache::sendHintViaMSHRTargets(MSHR *mshr, const PacketPtr pkt)
             if (sendHintTime == curTick()) {
                 BaseCache::cpuSidePort.sendCustomSignal(tgt_pkt, DcacheRespType::Hint);
             } else {
-                SendCustomEvent* hintEvent = new SendCustomEvent(this, tgt_pkt, DcacheRespType::Hint);
+                // set `deletePkt` as false because tgt_pkt should not be deleted by Hint event.
+                SendCustomEvent* hintEvent = new SendCustomEvent(this, tgt_pkt, DcacheRespType::Hint, false);
                 schedule(hintEvent, sendHintTime);
             }
             firstTgt = false;