diff --git a/scripts/patches/openhd_drm.patch b/scripts/patches/openhd_drm.patch
index 6753adb22d6e6..3879a12a23563 100644
--- a/scripts/patches/openhd_drm.patch
+++ b/scripts/patches/openhd_drm.patch
@@ -3,20 +3,8 @@ Author: Raphael Scholle <raphael@openhdfpv.org>
 Date:   Fri Mar 15 19:20:58 2024 +0100
 
     add openhd DRM patches
+	Co-authored-by: Consti10 <geierconstantinabc@gmail.com>
 
-diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
-index 4108c7265..fd99aac79 100644
---- a/drivers/gpu/drm/drm_atomic_helper.c
-+++ b/drivers/gpu/drm/drm_atomic_helper.c
-@@ -2937,7 +2937,7 @@ int drm_atomic_helper_update_plane(struct drm_plane *plane,
- 	if (plane == crtc->cursor)
- 		state->legacy_cursor_update = true;
- 
--	ret = drm_atomic_commit(state);
-+	ret = drm_atomic_nonblocking_commit(state);
- fail:
- 	drm_atomic_state_put(state);
- 	return ret;
 diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
 index 31069d9ae..b888d41bd 100644
 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -79,3 +67,53 @@ index 31069d9ae..b888d41bd 100644
  	  .max_upscale_factor = 8,
  	  .max_downscale_factor = 8,
  	  .dly = { 20, 47, 41 },
+diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+index d5b93d57fd89..3f7069a2d3de 100644
+--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
++++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+@@ -371,6 +371,11 @@ static const struct drm_display_mode rockchip_drm_default_modes[] = {
+ 		   798, 858, 0, 480, 489, 495, 525, 0,
+ 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+ 	  .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
++	/* Consti10 Added - paste from 16 - 1920x1080@60Hz 16:9 */
++	{ DRM_MODE("2560x1440", DRM_MODE_TYPE_DRIVER, 148500, 2560, 2008,
++			 2052, 2200, 0, 1440, 1084, 1089, 1125, 0,
++			 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
++		.picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ };
+ 
+ int rockchip_drm_add_modes_noedid(struct drm_connector *connector)
+@@ -416,6 +421,9 @@ u32 rockchip_drm_get_dclk_by_width(int width)
+ 	int i = 0;
+ 	u32 dclk_khz;
+ 
++	// Consti10
++	if(true)return 594000;
++
+ 	for (i = 0; i < ARRAY_SIZE(rockchip_drm_dclk); i++) {
+ 		if (width == rockchip_drm_dclk[i].width) {
+ 			dclk_khz = rockchip_drm_dclk[i].dclk_khz;
+diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+index f86109b5420a..950ffd54aa8e 100644
+--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+@@ -5375,7 +5375,11 @@ rockchip_atomic_helper_update_plane(struct drm_plane *plane,
+ 	if (plane == crtc->cursor || vpstate->async_commit)
+ 		state->legacy_cursor_update = true;
+ 
++	// Consti10
++	state->legacy_cursor_update = true;
++	//ret = drm_atomic_nonblocking_commit(state);
+ 	ret = drm_atomic_commit(state);
++	ret=0;
+ fail:
+ 	drm_atomic_state_put(state);
+ 	return ret;
+@@ -9726,6 +9730,7 @@ static void vop2_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state
+ 	 */
+ 	vop2_wait_for_irq_handler(crtc);
+ 
++
+ 	/**
+ 	 * move here is to make sure current fs call function is complete,
+ 	 * so when layer_sel_update is true, we can skip current vblank correctly.