full_adder.v

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// PROGRAM		"Quartus Prime"
// VERSION		"Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition"
// CREATED		"Thu Dec 31 23:19:54 2020"

module full_adder(
	A,
	B,
	Cin,
	Cout,
	Sum
);


input wire	A;
input wire	B;
input wire	Cin;
output wire	Cout;
output wire	Sum;

wire	SYNTHESIZED_WIRE_0;
wire	SYNTHESIZED_WIRE_1;
wire	SYNTHESIZED_WIRE_2;





half_adder	b2v_inst(
	.A(A),
	.B(B),
	.Cout(SYNTHESIZED_WIRE_2),
	.Sum(SYNTHESIZED_WIRE_0));


half_adder	b2v_inst1(
	.A(SYNTHESIZED_WIRE_0),
	.B(Cin),
	.Cout(SYNTHESIZED_WIRE_1),
	.Sum(Sum));

assign	Cout = SYNTHESIZED_WIRE_1 | SYNTHESIZED_WIRE_2;


endmodule