Refactor simd test #5
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xiaoling-yi
requested review from
JosseVanDelm,
rgantonio,
jorendumoulin and
guilherme-paim
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@xiaoling-yi sugoi desu! Can you please check also my comments first? But overall I think it's good enough!
At least we cover many cases and most likely after many runs maybe the test is already rigorous enough.
| // generate random input data sequence | ||
| def InputSeqGen(): Seq[Int] = { | ||
| // Initialize random seed | ||
| val random = new Random(System.currentTimeMillis()) |
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LOL, randomization is based on time. Interesting haha
src/test/scala/simd/SIMDTest.scala
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| // give input data big bus to dut | ||
| def giveInputData[T <: SIMD](dut: T, input: BigInt) = { | ||
| // giving input data | ||
| dut.clock.step() |
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Is there a difference between dut.clock.step() and dut.clock.step(1)?
I think to make it "explicit" and "idiomatic" if dut.clock.step() is just the same as dut.clock.step(1) maybe we put dut.clock.step(1) as the default for a single clock pulse. Just to make it clear for everyone.
BTW "idiomatic" means it's implicit in the code what we want to happen.
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Is there a difference between
dut.clock.step()anddut.clock.step(1)?
No!
I think to make it "explicit" and "idiomatic" if
dut.clock.step()is just the same asdut.clock.step(1)maybe we putdut.clock.step(1)as the default for a single clock pulse. Just to make it clear for everyone.BTW "idiomatic" means it's implicit in the code what we want to happen.
Ok!
src/test/scala/simd/SIMDTest.scala
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| dut.clock.step() | ||
| } | ||
| // set test number | ||
| val testNum = 1 |
In this PR, we provide more comprehensive unit test for the post-processing simd, addressing this issue #4
More specifically, we add:
HasSIMDTestUtilstrait to contain the utils functions, including test data gen and result check etc.SIMDAutoTesttest class to do the test and checkCatinput becauseCatput the lowest index to highest bits