diff --git a/ARM/Freescale/KL26xx/EHAL/.cproject b/ARM/Freescale/KL26xx/EHAL/.cproject
index ef29dcdd..babc7619 100755
--- a/ARM/Freescale/KL26xx/EHAL/.cproject
+++ b/ARM/Freescale/KL26xx/EHAL/.cproject
@@ -54,24 +54,43 @@
+
+
@@ -97,7 +116,7 @@
-
+
@@ -156,24 +175,43 @@
+
+
@@ -199,7 +237,7 @@
-
+
diff --git a/ARM/Freescale/KL26xx/EHAL/.project b/ARM/Freescale/KL26xx/EHAL/.project
index da54caab..0cb3af12 100755
--- a/ARM/Freescale/KL26xx/EHAL/.project
+++ b/ARM/Freescale/KL26xx/EHAL/.project
@@ -25,6 +25,166 @@
org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+ include/atomic.h
+ 1
+ PARENT-4-PROJECT_LOC/include/atomic.h
+
+
+ include/base64.h
+ 1
+ PARENT-4-PROJECT_LOC/include/base64.h
+
+
+ include/cfifo.h
+ 1
+ PARENT-4-PROJECT_LOC/include/cfifo.h
+
+
+ include/convutil.h
+ 1
+ PARENT-4-PROJECT_LOC/include/convutil.h
+
+
+ include/crc.h
+ 1
+ PARENT-4-PROJECT_LOC/include/crc.h
+
+
+ include/diskio.h
+ 1
+ PARENT-4-PROJECT_LOC/include/diskio.h
+
+
+ include/diskio_flash.h
+ 1
+ PARENT-4-PROJECT_LOC/include/diskio_flash.h
+
+
+ include/i2c.h
+ 1
+ PARENT-4-PROJECT_LOC/include/i2c.h
+
+
+ include/intelhex.h
+ 1
+ PARENT-4-PROJECT_LOC/include/intelhex.h
+
+
+ include/iopincfg.h
+ 1
+ PARENT-4-PROJECT_LOC/include/iopincfg.h
+
+
+ include/iopinctrl.h
+ 1
+ PARENT-2-PROJECT_LOC/include/iopinctrl.h
+
+
+ include/istddef.h
+ 1
+ PARENT-4-PROJECT_LOC/include/istddef.h
+
+
+ include/ledmx.h
+ 1
+ PARENT-4-PROJECT_LOC/include/ledmx.h
+
+
+ include/ledmxfont.h
+ 1
+ PARENT-4-PROJECT_LOC/include/ledmxfont.h
+
+
+ include/prbs.h
+ 1
+ PARENT-4-PROJECT_LOC/include/prbs.h
+
+
+ include/sdcard.h
+ 1
+ PARENT-4-PROJECT_LOC/include/sdcard.h
+
+
+ include/seep.h
+ 1
+ PARENT-4-PROJECT_LOC/include/seep.h
+
+
+ include/serialintrf.h
+ 1
+ PARENT-4-PROJECT_LOC/include/serialintrf.h
+
+
+ include/sha1.h
+ 1
+ PARENT-4-PROJECT_LOC/include/sha1.h
+
+
+ include/sha256.h
+ 1
+ PARENT-4-PROJECT_LOC/include/sha256.h
+
+
+ include/spi.h
+ 1
+ PARENT-4-PROJECT_LOC/include/spi.h
+
+
+ include/stddev.h
+ 1
+ PARENT-4-PROJECT_LOC/include/stddev.h
+
+
+ include/sysstatus.h
+ 1
+ PARENT-4-PROJECT_LOC/include/sysstatus.h
+
+
+ include/sysstatusdef.h
+ 1
+ PARENT-4-PROJECT_LOC/include/sysstatusdef.h
+
+
+ include/uart.h
+ 1
+ PARENT-4-PROJECT_LOC/include/uart.h
+
+
+ include/usb_cdcdef.h
+ 1
+ PARENT-4-PROJECT_LOC/include/usb_cdcdef.h
+
+
+ include/usb_def.h
+ 1
+ PARENT-4-PROJECT_LOC/include/usb_def.h
+
+
+ include/usb_hiddef.h
+ 1
+ PARENT-4-PROJECT_LOC/include/usb_hiddef.h
+
+
+ include/usb_hidhost.h
+ 1
+ PARENT-4-PROJECT_LOC/include/usb_hidhost.h
+
+
+ include/usb_mscdef.h
+ 1
+ PARENT-4-PROJECT_LOC/include/usb_mscdef.h
+
+
+ include/utf8.h
+ 1
+ PARENT-4-PROJECT_LOC/include/utf8.h
+
+
+ include/utf8cvt.h
+ 1
+ PARENT-4-PROJECT_LOC/include/utf8cvt.h
+
src/CppRuntimeOverload.cpp
1
@@ -45,6 +205,11 @@
1
PARENT-4-PROJECT_LOC/src/crc.c
+
+ src/diskio_flash.cpp
+ 1
+ PARENT-4-PROJECT_LOC/src/diskio_flash.cpp
+
src/diskio_impl.cpp
1
@@ -60,6 +225,11 @@
1
PARENT-4-PROJECT_LOC/src/intelhex.c
+
+ src/iopincfg.cpp
+ 1
+ PARENT-2-PROJECT_LOC/src/iopincfg.cpp
+
src/ledmx.c
1
@@ -70,6 +240,11 @@
1
PARENT-4-PROJECT_LOC/src/ledmxfont.c
+
+ src/prbs.c
+ 1
+ PARENT-4-PROJECT_LOC/src/prbs.c
+
src/sdcard_impl.cpp
1
diff --git a/ARM/Freescale/include/iopinctrl.h b/ARM/Freescale/include/iopinctrl.h
new file mode 100755
index 00000000..40c7efc9
--- /dev/null
+++ b/ARM/Freescale/include/iopinctrl.h
@@ -0,0 +1,87 @@
+/*--------------------------------------------------------------------------
+File : iopinctrl.h
+
+Author : Hoang Nguyen Hoan Nov.20, 2011
+
+Desc : General I/O pin control implementation specific
+ This file must be named iopinctrl.h no matter which target
+
+ This is Freescale implementation
+
+Copyright (c) 2011, I-SYST inc., all rights reserved
+Copyright (c) 2015, Motsai, all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+For info or contributing contact : hnhoan at i-syst dot com
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+
+----------------------------------------------------------------------------*/
+#ifndef __IOPINCTRL_H__
+#define __IOPINCTRL_H__
+
+#include
+
+#include "iopincfg.h"
+#include "fsl_gpio_hal.h"
+
+extern GPIO_Type *g_GpioBase[];
+
+static inline void IOPinSetDir(int PortNo, int PinNo, IOPINDIR Dir)
+{
+ if (Dir == IOPINDIR_OUTPUT)
+ GPIO_HAL_SetPinDir(g_GpioBase[PortNo], PinNo, kGpioDigitalOutput);
+ else if (Dir == IOPINDIR_INPUT)
+ GPIO_HAL_SetPinDir(g_GpioBase[PortNo], PinNo, kGpioDigitalInput);
+}
+
+static inline int IOPinGetPin(int PortNo, int PinNo)
+{
+ return GPIO_HAL_ReadPinOutput(g_GpioBase[PortNo], PinNo);
+}
+
+static inline void IOPinSet(int PortNo, int PinNo)
+{
+ GPIO_HAL_SetPinOutput(g_GpioBase[PortNo], PinNo);
+}
+
+static inline void IOPinClear(int PortNo, int PinNo)
+{
+ GPIO_HAL_ClearPinOutput(g_GpioBase[PortNo], PinNo);
+}
+
+static inline void IOPinToggle(int PortNo, int PinNo)
+{
+ GPIO_HAL_TogglePinOutput(g_GpioBase[PortNo], PinNo);
+}
+
+static inline int IOPinReadPort(int PortNo)
+{
+ return GPIO_HAL_ReadPortOutput(g_GpioBase[PortNo]);
+}
+
+static inline void IOPinWritePort(int PortNo, int Data)
+{
+ GPIO_HAL_WritePortOutput(g_GpioBase[PortNo], Data);
+}
+
+
+#endif // __IOPINCTRL_H__
diff --git a/ARM/Freescale/src/iopincfg.cpp b/ARM/Freescale/src/iopincfg.cpp
new file mode 100644
index 00000000..ca1ed525
--- /dev/null
+++ b/ARM/Freescale/src/iopincfg.cpp
@@ -0,0 +1,89 @@
+/*--------------------------------------------------------------------------
+File : iopincfg.c
+
+Author : Hoang Nguyen Hoan Nov. 20, 2011
+
+Desc : Generic I/O pin config
+ Freescale KL26Z implementation
+
+Copyright (c) 2011, I-SYST inc., all rights reserved
+Copyright (c) 2015, Motsai, all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+For info or contributing contact : hnhoan at i-syst dot com
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+
+----------------------------------------------------------------------------*/
+#include "fsl_port_hal.h"
+#include "fsl_gpio_hal.h"
+
+#include "iopincfg.h"
+
+PORT_Type *g_PortBase[] = PORT_BASE_PTRS;
+int g_NbIOPort = sizeof(g_PortBase)/sizeof(PORT_Type *);
+
+GPIO_Type *g_GpioBase[] = GPIO_BASE_PTRS;
+int g_NbGpioPort = sizeof(g_GpioBase)/sizeof(GPIO_Type *);
+
+void IOPinConfig(int PortNo, int PinNo, int PinOp, IOPINDIR Dir, IOPINRES Resistor, IOPINTYPE Type)
+{
+ PORT_Type *base;
+
+ if (PortNo >= g_NbIOPort || PortNo < 0 || PinNo <0)
+ return;
+
+ base = g_PortBase[PortNo];
+
+ PORT_HAL_SetMuxMode(base, PinNo, (port_mux_t)PinOp);
+
+ switch(Resistor)
+ {
+ case IOPINRES_NONE:
+ PORT_HAL_SetPullCmd(base, PinNo, false);
+ break;
+ case IOPINRES_PULLUP:
+ PORT_HAL_SetPullCmd(base, PinNo, true);
+ PORT_HAL_SetPullMode(base, PinNo, kPortPullUp);
+ break;
+ case IOPINRES_PULLDOWN:
+ PORT_HAL_SetPullCmd(base, PinNo, true);
+ PORT_HAL_SetPullMode(base, PinNo, kPortPullDown);
+ break;
+ case IOPINRES_FOLLOW:
+ break;
+ }
+
+ GPIO_Type *gpiobase = g_GpioBase[PortNo];
+
+ if (Dir == IOPINDIR_OUTPUT)
+ {
+ GPIO_HAL_SetPinDir(gpiobase, PinNo, kGpioDigitalOutput);
+ }
+ else
+ {
+ GPIO_HAL_SetPinDir(gpiobase, PinNo, kGpioDigitalInput);
+ }
+}
+
+
+
+
diff --git a/ARM/NXP/LPC11xx/CMSIS/Debug/libCMSIS.a b/ARM/NXP/LPC11xx/CMSIS/Debug/libCMSIS.a
deleted file mode 100644
index e17abdd8..00000000
Binary files a/ARM/NXP/LPC11xx/CMSIS/Debug/libCMSIS.a and /dev/null differ
diff --git a/ARM/NXP/LPC11xx/EHAL/.project b/ARM/NXP/LPC11xx/EHAL/.project
index 200298f9..5d82f83e 100755
--- a/ARM/NXP/LPC11xx/EHAL/.project
+++ b/ARM/NXP/LPC11xx/EHAL/.project
@@ -295,6 +295,11 @@
1
PARENT-3-WORKSPACE_LOC/src/diskio.c
+
+ src/diskio_flash.cpp
+ 1
+ PARENT-4-PROJECT_LOC/src/diskio_flash.cpp
+
src/diskio_impl.cpp
1
@@ -405,6 +410,11 @@
1
PARENT-2-PROJECT_LOC/src/uart_lpcxx.c
+
+ src/uart_retarget.c
+ 1
+ PARENT-4-PROJECT_LOC/src/uart_retarget.c
+
src/utf8.c
1
diff --git a/ARM/NXP/LPC11xx/EHAL/.settings/language.settings.xml b/ARM/NXP/LPC11xx/EHAL/.settings/language.settings.xml
index b1ab36d6..0b17c935 100755
--- a/ARM/NXP/LPC11xx/EHAL/.settings/language.settings.xml
+++ b/ARM/NXP/LPC11xx/EHAL/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
@@ -16,7 +16,7 @@
-
+
diff --git a/ARM/NXP/LPC11xx/EHAL/src/uart_lpc11uxx.c b/ARM/NXP/LPC11xx/EHAL/src/uart_lpc11uxx.c
index 57155a52..64854708 100755
--- a/ARM/NXP/LPC11xx/EHAL/src/uart_lpc11uxx.c
+++ b/ARM/NXP/LPC11xx/EHAL/src/uart_lpc11uxx.c
@@ -290,20 +290,20 @@ bool UARTInit(UARTDEV *pDev, const UARTCFG *pCfg)
if (pCfg->pRxMem && pCfg->RxMemSize > 0)
{
- pDev->hRxFifo = CFifoInit(pCfg->pRxMem, pCfg->RxMemSize, 1);
+ pDev->hRxFifo = CFifoInit(pCfg->pRxMem, pCfg->RxMemSize, 1, pCfg->bAutoDrop);
}
else
{
- pDev->hRxFifo = CFifoInit(s_UARTRxFifoMem, UART_RX_CFIFO_MEM_SIZE, 1);
+ pDev->hRxFifo = CFifoInit(s_UARTRxFifoMem, UART_RX_CFIFO_MEM_SIZE, 1, pCfg->bAutoDrop);
}
if (pCfg->pTxMem && pCfg->TxMemSize > 0)
{
- pDev->hTxFifo = CFifoInit(pCfg->pTxMem, pCfg->TxMemSize, 1);
+ pDev->hTxFifo = CFifoInit(pCfg->pTxMem, pCfg->TxMemSize, 1, pCfg->bAutoDrop);
}
else
{
- pDev->hTxFifo = CFifoInit(s_UARTTxFifoMem, UART_TX_CFIFO_MEM_SIZE, 1);
+ pDev->hTxFifo = CFifoInit(s_UARTTxFifoMem, UART_TX_CFIFO_MEM_SIZE, 1, pCfg->bAutoDrop);
}
// Start tx
diff --git a/ARM/NXP/LPC11xx/EHAL/src/usb_lpc11uxx.c b/ARM/NXP/LPC11xx/EHAL/src/usb_lpc11uxx.c
index d1145c7c..ce09148a 100755
--- a/ARM/NXP/LPC11xx/EHAL/src/usb_lpc11uxx.c
+++ b/ARM/NXP/LPC11xx/EHAL/src/usb_lpc11uxx.c
@@ -5,8 +5,6 @@
* Author: hoan
*/
-#include "power_api.h"
-
#include "usbrom_lpc11uxx.h"
//static const USBD_API_T * g_pUsbApi = (const USBD_API_T*)(*(ROM **)0x1FFF1FF8)->p_usbd;
diff --git a/ARM/NXP/LPC11xx/exemples/UartPrbsTest/.cproject b/ARM/NXP/LPC11xx/exemples/UartPrbsTest/.cproject
index 6db6241f..d4d7ec4b 100644
--- a/ARM/NXP/LPC11xx/exemples/UartPrbsTest/.cproject
+++ b/ARM/NXP/LPC11xx/exemples/UartPrbsTest/.cproject
@@ -46,8 +46,9 @@
-
+
-
+
-
+
-
+
@@ -381,9 +379,9 @@
-
-
-
+
+
+
@@ -438,4 +436,5 @@
+
diff --git a/ARM/Nordic/nRF51/EHAL/.cproject b/ARM/Nordic/nRF51/EHAL/.cproject
index 374a9079..9a539192 100755
--- a/ARM/Nordic/nRF51/EHAL/.cproject
+++ b/ARM/Nordic/nRF51/EHAL/.cproject
@@ -65,25 +65,43 @@
+
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
@@ -92,24 +110,42 @@
+
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
@@ -206,25 +242,43 @@
+
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
@@ -233,24 +287,42 @@
+
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
@@ -303,4 +375,5 @@
+
diff --git a/ARM/Nordic/nRF51/EHAL/.project b/ARM/Nordic/nRF51/EHAL/.project
index 9e507a00..bbddeffa 100755
--- a/ARM/Nordic/nRF51/EHAL/.project
+++ b/ARM/Nordic/nRF51/EHAL/.project
@@ -36,14 +36,19 @@
PARENT-3-WORKSPACE_LOC/include/base64.h
- include/blueio_board.h
+ include/ble_periph_app.h
1
- PARENT-2-PROJECT_LOC/include/blueio_board.h
+ PARENT-2-PROJECT_LOC/include/ble_periph_app.h
- include/blueio_svc.h
+ include/blueio_blesrvc.h
1
- PARENT-2-PROJECT_LOC/include/blueio_svc.h
+ PARENT-2-PROJECT_LOC/include/blueio_blesrvc.h
+
+
+ include/blueio_board.h
+ 1
+ PARENT-2-PROJECT_LOC/include/blueio_board.h
include/cfifo.h
@@ -60,6 +65,11 @@
1
PARENT-3-WORKSPACE_LOC/include/crc.h
+
+ include/custom_board.h
+ 1
+ PARENT-2-PROJECT_LOC/include/custom_board.h
+
include/dirent.h
1
@@ -70,6 +80,11 @@
1
PARENT-3-WORKSPACE_LOC/include/diskio.h
+
+ include/diskio_flash.h
+ 1
+ PARENT-4-PROJECT_LOC/include/diskio_flash.h
+
include/fatfs.h
1
@@ -95,11 +110,6 @@
1
PARENT-3-WORKSPACE_LOC/include/iopincfg.h
-
- include/iopinctrl.h
- 1
- PARENT-2-PROJECT_LOC/include/iopinctrl.h
-
include/istddef.h
1
@@ -145,6 +155,11 @@
1
PARENT-3-WORKSPACE_LOC/include/sha256.h
+
+ include/spi.h
+ 1
+ PARENT-4-PROJECT_LOC/include/spi.h
+
include/stddev.h
1
@@ -191,9 +206,14 @@
PARENT-4-PROJECT_LOC/src/base64.c
- src/blueio_svc.c
+ src/ble_periph_app.cpp
+ 1
+ PARENT-2-PROJECT_LOC/src/ble_periph_app.cpp
+
+
+ src/blueio_blesrvc.c
1
- PARENT-2-PROJECT_LOC/src/blueio_svc.c
+ PARENT-2-PROJECT_LOC/src/blueio_blesrvc.c
src/cfifo.c
@@ -205,6 +225,11 @@
1
PARENT-4-PROJECT_LOC/src/crc.c
+
+ src/diskio_flash.cpp
+ 1
+ PARENT-4-PROJECT_LOC/src/diskio_flash.cpp
+
src/diskio_impl.cpp
1
@@ -230,6 +255,11 @@
1
PARENT-4-PROJECT_LOC/src/ledmxfont.c
+
+ src/ledmxio_nrf5x.c
+ 1
+ PARENT-2-PROJECT_LOC/src/ledmxio_nrf5x.c
+
src/nrf_uart_impl.cpp
1
@@ -250,11 +280,6 @@
1
PARENT-4-PROJECT_LOC/src/sdcard_impl.cpp
-
- src/seep.c
- 1
- PARENT-4-PROJECT_LOC/src/seep.c
-
src/seep_impl.cpp
1
@@ -295,6 +320,11 @@
1
PARENT-2-PROJECT_LOC/src/uart_nrf5x.c
+
+ src/uart_retarget.c
+ 1
+ PARENT-4-PROJECT_LOC/src/uart_retarget.c
+
src/utf8.c
1
diff --git a/ARM/Nordic/nRF51/EHAL/Debug/libEHAL.a b/ARM/Nordic/nRF51/EHAL/Debug/libEHAL.a
deleted file mode 100644
index 2fe5247a..00000000
Binary files a/ARM/Nordic/nRF51/EHAL/Debug/libEHAL.a and /dev/null differ
diff --git a/ARM/Nordic/nRF51/EHAL/Release/libEHAL.a b/ARM/Nordic/nRF51/EHAL/Release/libEHAL.a
deleted file mode 100644
index 942eb3e0..00000000
Binary files a/ARM/Nordic/nRF51/EHAL/Release/libEHAL.a and /dev/null differ
diff --git a/ARM/Nordic/include/iopinctrl.h b/ARM/Nordic/nRF51/EHAL/include/iopinctrl.h
similarity index 62%
rename from ARM/Nordic/include/iopinctrl.h
rename to ARM/Nordic/nRF51/EHAL/include/iopinctrl.h
index 629d2a94..e3a41e64 100755
--- a/ARM/Nordic/include/iopinctrl.h
+++ b/ARM/Nordic/nRF51/EHAL/include/iopinctrl.h
@@ -6,7 +6,7 @@ Author : Hoang Nguyen Hoan June. 2, 2014
Desc : General I/O pin control implementation specific
This file must be named iopinctrl.h no matter which target
- This is nRF5x implementation
+ This is nRF51 implementation
Copyright (c) 2014, I-SYST inc., all rights reserved
@@ -38,60 +38,45 @@ Modified by Date Description
#define __IOPINCTRL_H__
#include
-#include "nrf_gpio.h"
-
+#include "nrf51.h"
#include "iopincfg.h"
static inline void IOPinSetDir(int PortNo, int PinNo, IOPINDIR Dir)
{
if (Dir == IOPINDIR_OUTPUT)
- nrf_gpio_pin_dir_set(PinNo, NRF_GPIO_PIN_DIR_OUTPUT);
+ NRF_GPIO->DIRSET = (1 << PinNo);
else if (Dir == IOPINDIR_INPUT)
- nrf_gpio_pin_dir_set(PinNo, NRF_GPIO_PIN_DIR_INPUT);
+ NRF_GPIO->DIRCLR = (1 << PinNo);
}
static inline int IOPinRead(int PortNo, int PinNo)
{
- return nrf_gpio_pin_read(PinNo);
+ return (NRF_GPIO->IN >> PinNo) & 1;
}
static inline void IOPinSet(int PortNo, int PinNo)
{
- nrf_gpio_pin_set(PinNo);
+ NRF_GPIO->OUTSET = (1 << PinNo);
}
static inline void IOPinClear(int PortNo, int PinNo)
{
- nrf_gpio_pin_clear(PinNo);
+ NRF_GPIO->OUTCLR = (1 << PinNo);
}
static inline void IOPinToggle(int PortNo, int PinNo)
{
- nrf_gpio_pin_toggle(PinNo);
+ NRF_GPIO->OUT = NRF_GPIO->OUT ^ (1 << PinNo);
}
static inline uint32_t IOPinReadPort(int PortNo)
{
- return nrf_gpio_pins_read();
-}
-
-static inline void IOPinWrite8Port(int PortNo, uint8_t Data)
-{
- nrf_gpio_port_write((nrf_gpio_port_select_t)(NRF_GPIO_PORT_SELECT_PORT0 + PortNo), Data);
-}
-
-static inline void IOPinWrite16Port(int PortNo, uint16_t Data)
-{
- nrf_gpio_port_write((nrf_gpio_port_select_t)(NRF_GPIO_PORT_SELECT_PORT0 + PortNo), Data & 0xFF);
- nrf_gpio_port_write((nrf_gpio_port_select_t)(NRF_GPIO_PORT_SELECT_PORT0 + PortNo + 1), Data >> 8);
+ return NRF_GPIO->IN;
}
-static inline void IOPinWrite32Port(int PortNo, uint32_t Data)
+static inline void IOPinWritePort(int PortNo, uint32_t Data)
{
- nrf_gpio_port_write((nrf_gpio_port_select_t)(NRF_GPIO_PORT_SELECT_PORT0 + PortNo), Data & 0xFF);
- nrf_gpio_port_write((nrf_gpio_port_select_t)(NRF_GPIO_PORT_SELECT_PORT0 + PortNo + 1), (Data >> 8) & 0xFF);
- nrf_gpio_port_write((nrf_gpio_port_select_t)(NRF_GPIO_PORT_SELECT_PORT0 + PortNo + 2), (Data >> 16) & 0xFF);
- nrf_gpio_port_write((nrf_gpio_port_select_t)(NRF_GPIO_PORT_SELECT_PORT0 + PortNo + 3), (Data >> 24) & 0xFF);
+ NRF_GPIO->OUT = Data;
}
#endif // __IOPINCTRL_H__
diff --git a/ARM/Nordic/nRF51/EHAL/src/ledmxio_nrf51.c b/ARM/Nordic/nRF51/EHAL/src/ledmxio_nrf51.c
deleted file mode 100755
index 77b53ee3..00000000
--- a/ARM/Nordic/nRF51/EHAL/src/ledmxio_nrf51.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*--------------------------------------------------------------------------
-File : ledmxio_nrf51.c
-
-Author : Hoang Nguyen Hoan Aug. 21, 2014
-
-Desc : This is platform specific I/O control interface for LED Matrix Control
- IDM-LMX3208 series LED matrix display
-
-Copyright (c) 2014, I-SYST inc., all rights reserved
-
-Permission to use, copy, modify, and distribute this software for any purpose
-with or without fee is hereby granted, provided that the above copyright
-notice and this permission notice appear in all copies, and none of the
-names : I-SYST or its contributors may be used to endorse or
-promote products derived from this software without specific prior written
-permission.
-
-For info or contributing contact : hnhoan at i-syst dot com
-
-THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-----------------------------------------------------------------------------
-Modified by Date Description
-
-----------------------------------------------------------------------------*/
-
-#include "nrf_gpio.h"
-#include "ledmxio.h"
-
-typedef struct {
- int WrPin;
- int RdPin;
- int DataPin;
- int EnPin;
- int CsPins[LEDMX_MAX_ADDRPIN];
- int NbCsPins; // Total number of CS pins used
- LEDMX_CSTYPE CsType;
-} IODEV;
-
-static IODEV g_LmxIODev;
-
-void LedMxIOInit(LEDMXDEV *pLedMxDev, LEDMXCFG *pCfg)
-{
- IODEV *pdev = &g_LmxIODev;
- LEDMXIOCFG *pcfg = (LEDMXIOCFG *)pCfg->pIOCfg;
-
- pLedMxDev->pIODev = (void *)&g_LmxIODev;
-
- pdev->WrPin = pcfg->WrPin;
- nrf_gpio_cfg_output(pcfg->WrPin);
- nrf_gpio_pin_set(pcfg->WrPin);
-
- pdev->RdPin = pcfg->RdPin;
- nrf_gpio_cfg_output(pcfg->RdPin);
- nrf_gpio_pin_set(pcfg->RdPin);
-
- pdev->DataPin = pcfg->DataPin;
- nrf_gpio_cfg_output(pcfg->DataPin);
-
- pdev->EnPin = pcfg->EnPin;
- nrf_gpio_cfg_output(pcfg->EnPin);
- nrf_gpio_pin_set(pcfg->EnPin);
-
- for (int i = 0; i < LEDMX_MAX_ADDRPIN; i++)
- {
- pdev->CsPins[i] = pcfg->CsPins[i];
- if (pdev->CsPins[i] >= 0)
- {
- nrf_gpio_cfg_output(pdev->CsPins[i]);
- nrf_gpio_pin_clear(pdev->CsPins[i]);
- }
- }
- pdev->NbCsPins = pcfg->NbCsPins;
- pdev->CsType = pcfg->CsType;
-}
-
-void LedMxStartTx(LEDMXDEV *pLedMxDev, int PanelAddr)
-{
- IODEV *pdev = (IODEV *)pLedMxDev->pIODev;
-
- nrf_gpio_pin_set(pdev->RdPin);
- nrf_gpio_pin_set(pdev->WrPin);
-
- if (pdev->CsType == LEDMX_CSTYPE_BIN)
- {
- nrf_gpio_pin_set(pdev->EnPin);
- for (int i = 0; i < pdev->NbCsPins; i++)
- {
- if (pdev->CsPins[i] >= 0)
- {
- if (PanelAddr & 1)
- nrf_gpio_pin_set(pdev->CsPins[i]);
- else
- nrf_gpio_pin_clear(pdev->CsPins[i]);
- }
- PanelAddr >>= 1;
- }
- nrf_gpio_pin_clear(pdev->EnPin);
- }
- else
- {
- nrf_gpio_pin_clear(pdev->CsPins[PanelAddr]);
- }
-}
-
-void LedMxTxData(LEDMXDEV *pLedMxDev, uint32_t Data, int NbBits)
-{
- IODEV *pdev = (IODEV *)pLedMxDev->pIODev;
- uint32_t mask = 1 << (NbBits - 1);
-
- while (mask)
- {
- nrf_gpio_pin_clear(pdev->WrPin);
- if (Data & mask)
- nrf_gpio_pin_set(pdev->DataPin);
- else
- nrf_gpio_pin_clear(pdev->DataPin);
-
- __NOP();
- nrf_gpio_pin_set(pdev->WrPin);
-
- mask >>= 1;
- }
-
-}
-
-void LedMxStopTx(LEDMXDEV *pLedMxDev, int PanelAddr)
-{
- IODEV *pdev = (IODEV *)pLedMxDev->pIODev;
-
- nrf_gpio_pin_set(pdev->WrPin);
-
- if (pdev->CsType == LEDMX_CSTYPE_BIN)
- {
- for (int i = 0; i < pdev->NbCsPins; i++)
- {
- if (pdev->CsPins[i] >= 0)
- nrf_gpio_pin_set(pdev->CsPins[i]);
- }
- nrf_gpio_pin_set(pdev->EnPin);
- }
- else
- nrf_gpio_pin_set(pdev->CsPins[PanelAddr]);
-}
diff --git a/ARM/Nordic/nRF51/EHAL/src/sdk_config.h b/ARM/Nordic/nRF51/EHAL/src/sdk_config.h
new file mode 100644
index 00000000..e15b22db
--- /dev/null
+++ b/ARM/Nordic/nRF51/EHAL/src/sdk_config.h
@@ -0,0 +1,2388 @@
+
+
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#ifdef USE_APP_CONFIG
+#include "app_config.h"
+#endif
+// nRF_BLE
+
+//==========================================================
+// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module
+
+
+#ifndef BLE_ADVERTISING_ENABLED
+#define BLE_ADVERTISING_ENABLED 1
+#endif
+
+// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands
+
+
+#ifndef BLE_DTM_ENABLED
+#define BLE_DTM_ENABLED 0
+#endif
+
+// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library
+
+
+#ifndef BLE_RACP_ENABLED
+#define BLE_RACP_ENABLED 1
+#endif
+
+// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write)
+
+
+#ifndef NRF_BLE_QWR_ENABLED
+#define NRF_BLE_QWR_ENABLED 0
+#endif
+
+// PEER_MANAGER_ENABLED - peer_manager - Peer Manager
+
+
+#ifndef PEER_MANAGER_ENABLED
+#define PEER_MANAGER_ENABLED 1
+#endif
+
+//
+//==========================================================
+
+// nRF_BLE_Services
+
+//==========================================================
+// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client
+
+
+#ifndef BLE_ANCS_C_ENABLED
+#define BLE_ANCS_C_ENABLED 0
+#endif
+
+// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client
+
+
+#ifndef BLE_ANS_C_ENABLED
+#define BLE_ANS_C_ENABLED 0
+#endif
+
+// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client
+
+
+#ifndef BLE_BAS_C_ENABLED
+#define BLE_BAS_C_ENABLED 0
+#endif
+
+// BLE_BAS_ENABLED - ble_bas - Battery Service
+
+
+#ifndef BLE_BAS_ENABLED
+#define BLE_BAS_ENABLED 1
+#endif
+
+// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service
+
+
+#ifndef BLE_CSCS_ENABLED
+#define BLE_CSCS_ENABLED 0
+#endif
+
+// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client
+
+
+#ifndef BLE_CTS_C_ENABLED
+#define BLE_CTS_C_ENABLED 0
+#endif
+
+// BLE_DIS_ENABLED - ble_dis - Device Information Service
+
+
+#ifndef BLE_DIS_ENABLED
+#define BLE_DIS_ENABLED 1
+#endif
+
+// BLE_GLS_ENABLED - ble_gls - Glucose Service
+
+
+#ifndef BLE_GLS_ENABLED
+#define BLE_GLS_ENABLED 1
+#endif
+
+// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service
+
+
+#ifndef BLE_HIDS_ENABLED
+#define BLE_HIDS_ENABLED 0
+#endif
+
+// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client
+
+
+#ifndef BLE_HRS_C_ENABLED
+#define BLE_HRS_C_ENABLED 0
+#endif
+
+// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service
+
+
+#ifndef BLE_HRS_ENABLED
+#define BLE_HRS_ENABLED 0
+#endif
+
+// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service
+
+
+#ifndef BLE_HTS_ENABLED
+#define BLE_HTS_ENABLED 0
+#endif
+
+// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client
+
+
+#ifndef BLE_IAS_C_ENABLED
+#define BLE_IAS_C_ENABLED 0
+#endif
+
+// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service
+
+
+#ifndef BLE_IAS_ENABLED
+#define BLE_IAS_ENABLED 0
+#endif
+
+// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client
+
+
+#ifndef BLE_LBS_C_ENABLED
+#define BLE_LBS_C_ENABLED 0
+#endif
+
+// BLE_LBS_ENABLED - ble_lbs - LED Button Service
+
+
+#ifndef BLE_LBS_ENABLED
+#define BLE_LBS_ENABLED 0
+#endif
+
+// BLE_LLS_ENABLED - ble_lls - Link Loss Service
+
+
+#ifndef BLE_LLS_ENABLED
+#define BLE_LLS_ENABLED 0
+#endif
+
+// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service
+
+
+#ifndef BLE_NUS_C_ENABLED
+#define BLE_NUS_C_ENABLED 0
+#endif
+
+// BLE_NUS_ENABLED - ble_nus - Nordic UART Service
+
+
+#ifndef BLE_NUS_ENABLED
+#define BLE_NUS_ENABLED 0
+#endif
+
+// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client
+
+
+#ifndef BLE_RSCS_C_ENABLED
+#define BLE_RSCS_C_ENABLED 0
+#endif
+
+// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service
+
+
+#ifndef BLE_RSCS_ENABLED
+#define BLE_RSCS_ENABLED 0
+#endif
+
+// BLE_TPS_ENABLED - ble_tps - TX Power Service
+
+
+#ifndef BLE_TPS_ENABLED
+#define BLE_TPS_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_Drivers
+
+//==========================================================
+// ADC_ENABLED - nrf_drv_adc - Driver for ADC peripheral (nRF51)
+//==========================================================
+#ifndef ADC_ENABLED
+#define ADC_ENABLED 0
+#endif
+#if ADC_ENABLED
+// ADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef ADC_CONFIG_IRQ_PRIORITY
+#define ADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //ADC_ENABLED
+//
+
+// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef CLOCK_ENABLED
+#define CLOCK_ENABLED 1
+#endif
+#if CLOCK_ENABLED
+// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
+
+// <0=> Default (64 MHz)
+
+#ifndef CLOCK_CONFIG_XTAL_FREQ
+#define CLOCK_CONFIG_XTAL_FREQ 0
+#endif
+
+// CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //CLOCK_ENABLED
+//
+
+// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver
+//==========================================================
+#ifndef COMP_ENABLED
+#define COMP_ENABLED 0
+#endif
+#if COMP_ENABLED
+// COMP_CONFIG_REF - Reference voltage
+
+// <0=> Internal 1.2V
+// <1=> Internal 1.8V
+// <2=> Internal 2.4V
+// <4=> VDD
+// <7=> ARef
+
+#ifndef COMP_CONFIG_REF
+#define COMP_CONFIG_REF 1
+#endif
+
+// COMP_CONFIG_MAIN_MODE - Main mode
+
+// <0=> Single ended
+// <1=> Differential
+
+#ifndef COMP_CONFIG_MAIN_MODE
+#define COMP_CONFIG_MAIN_MODE 0
+#endif
+
+// COMP_CONFIG_SPEED_MODE - Speed mode
+
+// <0=> Low power
+// <1=> Normal
+// <2=> High speed
+
+#ifndef COMP_CONFIG_SPEED_MODE
+#define COMP_CONFIG_SPEED_MODE 2
+#endif
+
+// COMP_CONFIG_HYST - Hystheresis
+
+// <0=> No
+// <1=> 50mV
+
+#ifndef COMP_CONFIG_HYST
+#define COMP_CONFIG_HYST 0
+#endif
+
+// COMP_CONFIG_ISOURCE - Current Source
+
+// <0=> Off
+// <1=> 2.5 uA
+// <2=> 5 uA
+// <3=> 10 uA
+
+#ifndef COMP_CONFIG_ISOURCE
+#define COMP_CONFIG_ISOURCE 0
+#endif
+
+// COMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_INPUT
+#define COMP_CONFIG_INPUT 0
+#endif
+
+// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_IRQ_PRIORITY
+#define COMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //COMP_ENABLED
+//
+
+// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver
+
+
+#ifndef EGU_ENABLED
+#define EGU_ENABLED 0
+#endif
+
+// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver
+//==========================================================
+#ifndef GPIOTE_ENABLED
+#define GPIOTE_ENABLED 1
+#endif
+#if GPIOTE_ENABLED
+// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
+#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4
+#endif
+
+// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef GPIOTE_CONFIG_IRQ_PRIORITY
+#define GPIOTE_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //GPIOTE_ENABLED
+//
+
+// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver
+//==========================================================
+#ifndef I2S_ENABLED
+#define I2S_ENABLED 0
+#endif
+#if I2S_ENABLED
+// I2S_CONFIG_SCK_PIN - SCK pin <0-31>
+
+
+#ifndef I2S_CONFIG_SCK_PIN
+#define I2S_CONFIG_SCK_PIN 31
+#endif
+
+// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31>
+
+
+#ifndef I2S_CONFIG_LRCK_PIN
+#define I2S_CONFIG_LRCK_PIN 30
+#endif
+
+// I2S_CONFIG_MCK_PIN - MCK pin
+#ifndef I2S_CONFIG_MCK_PIN
+#define I2S_CONFIG_MCK_PIN 255
+#endif
+
+// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDOUT_PIN
+#define I2S_CONFIG_SDOUT_PIN 29
+#endif
+
+// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDIN_PIN
+#define I2S_CONFIG_SDIN_PIN 28
+#endif
+
+// I2S_CONFIG_MASTER - Mode
+
+// <0=> Master
+// <1=> Slave
+
+#ifndef I2S_CONFIG_MASTER
+#define I2S_CONFIG_MASTER 0
+#endif
+
+// I2S_CONFIG_FORMAT - Format
+
+// <0=> I2S
+// <1=> Aligned
+
+#ifndef I2S_CONFIG_FORMAT
+#define I2S_CONFIG_FORMAT 0
+#endif
+
+// I2S_CONFIG_ALIGN - Alignment
+
+// <0=> Left
+// <1=> Right
+
+#ifndef I2S_CONFIG_ALIGN
+#define I2S_CONFIG_ALIGN 0
+#endif
+
+// I2S_CONFIG_SWIDTH - Sample width (bits)
+
+// <0=> 8
+// <1=> 16
+// <2=> 24
+
+#ifndef I2S_CONFIG_SWIDTH
+#define I2S_CONFIG_SWIDTH 1
+#endif
+
+// I2S_CONFIG_CHANNELS - Channels
+
+// <0=> Stereo
+// <1=> Left
+// <2=> Right
+
+#ifndef I2S_CONFIG_CHANNELS
+#define I2S_CONFIG_CHANNELS 1
+#endif
+
+// I2S_CONFIG_MCK_SETUP - MCK behavior
+
+// <0=> Disabled
+// <2147483648=> 32MHz/2
+// <1342177280=> 32MHz/3
+// <1073741824=> 32MHz/4
+// <805306368=> 32MHz/5
+// <671088640=> 32MHz/6
+// <536870912=> 32MHz/8
+// <402653184=> 32MHz/10
+// <369098752=> 32MHz/11
+// <285212672=> 32MHz/15
+// <268435456=> 32MHz/16
+// <201326592=> 32MHz/21
+// <184549376=> 32MHz/23
+// <142606336=> 32MHz/30
+// <138412032=> 32MHz/31
+// <134217728=> 32MHz/32
+// <100663296=> 32MHz/42
+// <68157440=> 32MHz/63
+// <34340864=> 32MHz/125
+
+#ifndef I2S_CONFIG_MCK_SETUP
+#define I2S_CONFIG_MCK_SETUP 536870912
+#endif
+
+// I2S_CONFIG_RATIO - MCK/LRCK ratio
+
+// <0=> 32x
+// <1=> 48x
+// <2=> 64x
+// <3=> 96x
+// <4=> 128x
+// <5=> 192x
+// <6=> 256x
+// <7=> 384x
+// <8=> 512x
+
+#ifndef I2S_CONFIG_RATIO
+#define I2S_CONFIG_RATIO 2000
+#endif
+
+// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef I2S_CONFIG_IRQ_PRIORITY
+#define I2S_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //I2S_ENABLED
+//
+
+// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver
+//==========================================================
+#ifndef LPCOMP_ENABLED
+#define LPCOMP_ENABLED 0
+#endif
+#if LPCOMP_ENABLED
+// LPCOMP_CONFIG_REFERENCE - Reference voltage
+
+// <0=> Supply 1/8
+// <1=> Supply 2/8
+// <2=> Supply 3/8
+// <3=> Supply 4/8
+// <4=> Supply 5/8
+// <5=> Supply 6/8
+// <6=> Supply 7/8
+// <8=> Supply 1/16 (nRF52)
+// <9=> Supply 3/16 (nRF52)
+// <10=> Supply 5/16 (nRF52)
+// <11=> Supply 7/16 (nRF52)
+// <12=> Supply 9/16 (nRF52)
+// <13=> Supply 11/16 (nRF52)
+// <14=> Supply 13/16 (nRF52)
+// <15=> Supply 15/16 (nRF52)
+// <7=> External Ref 0
+// <65543=> External Ref 1
+
+#ifndef LPCOMP_CONFIG_REFERENCE
+#define LPCOMP_CONFIG_REFERENCE 3
+#endif
+
+// LPCOMP_CONFIG_DETECTION - Detection
+
+// <0=> Crossing
+// <1=> Up
+// <2=> Down
+
+#ifndef LPCOMP_CONFIG_DETECTION
+#define LPCOMP_CONFIG_DETECTION 2
+#endif
+
+// LPCOMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_INPUT
+#define LPCOMP_CONFIG_INPUT 0
+#endif
+
+// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_IRQ_PRIORITY
+#define LPCOMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //LPCOMP_ENABLED
+//
+
+// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver
+//==========================================================
+#ifndef PDM_ENABLED
+#define PDM_ENABLED 0
+#endif
+#if PDM_ENABLED
+// PDM_CONFIG_MODE - Mode
+
+// <0=> Stereo
+// <1=> Mono
+
+#ifndef PDM_CONFIG_MODE
+#define PDM_CONFIG_MODE 1
+#endif
+
+// PDM_CONFIG_EDGE - Edge
+
+// <0=> Left falling
+// <1=> Left rising
+
+#ifndef PDM_CONFIG_EDGE
+#define PDM_CONFIG_EDGE 0
+#endif
+
+// PDM_CONFIG_CLOCK_FREQ - Clock frequency
+
+// <134217728=> 1000k
+// <138412032=> 1032k (default)
+// <142606336=> 1067k
+
+#ifndef PDM_CONFIG_CLOCK_FREQ
+#define PDM_CONFIG_CLOCK_FREQ 138412032
+#endif
+
+// PDM_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PDM_CONFIG_IRQ_PRIORITY
+#define PDM_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //PDM_ENABLED
+//
+
+// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module
+
+
+#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
+#endif
+
+// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver
+
+
+#ifndef PPI_ENABLED
+#define PPI_ENABLED 0
+#endif
+
+// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver
+//==========================================================
+#ifndef PWM_ENABLED
+#define PWM_ENABLED 0
+#endif
+#if PWM_ENABLED
+// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN
+#define PWM_DEFAULT_CONFIG_OUT0_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN
+#define PWM_DEFAULT_CONFIG_OUT1_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN
+#define PWM_DEFAULT_CONFIG_OUT2_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN
+#define PWM_DEFAULT_CONFIG_OUT3_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 MHz
+
+#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define PWM_DEFAULT_CONFIG_BASE_CLOCK 4
+#endif
+
+// PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode
+
+// <0=> Up
+// <1=> Up and Down
+
+#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE
+#define PWM_DEFAULT_CONFIG_COUNT_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value
+#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE
+#define PWM_DEFAULT_CONFIG_TOP_VALUE 1000
+#endif
+
+// PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode
+
+// <0=> Common
+// <1=> Grouped
+// <2=> Individual
+// <3=> Waveform
+
+#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE
+#define PWM_DEFAULT_CONFIG_LOAD_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_STEP_MODE - Step mode
+
+// <0=> Auto
+// <1=> Triggered
+
+#ifndef PWM_DEFAULT_CONFIG_STEP_MODE
+#define PWM_DEFAULT_CONFIG_STEP_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// PWM0_ENABLED - Enable PWM0 instance
+
+
+#ifndef PWM0_ENABLED
+#define PWM0_ENABLED 0
+#endif
+
+// PWM1_ENABLED - Enable PWM1 instance
+
+
+#ifndef PWM1_ENABLED
+#define PWM1_ENABLED 0
+#endif
+
+// PWM2_ENABLED - Enable PWM2 instance
+
+
+#ifndef PWM2_ENABLED
+#define PWM2_ENABLED 0
+#endif
+
+#endif //PWM_ENABLED
+//
+
+// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver
+//==========================================================
+#ifndef QDEC_ENABLED
+#define QDEC_ENABLED 0
+#endif
+#if QDEC_ENABLED
+// QDEC_CONFIG_REPORTPER - Report period
+
+// <0=> 10 Samples
+// <1=> 40 Samples
+// <2=> 80 Samples
+// <3=> 120 Samples
+// <4=> 160 Samples
+// <5=> 200 Samples
+// <6=> 240 Samples
+// <7=> 280 Samples
+
+#ifndef QDEC_CONFIG_REPORTPER
+#define QDEC_CONFIG_REPORTPER 0
+#endif
+
+// QDEC_CONFIG_SAMPLEPER - Sample period
+
+// <0=> 128 us
+// <1=> 256 us
+// <2=> 512 us
+// <3=> 1024 us
+// <4=> 2048 us
+// <5=> 4096 us
+// <6=> 8192 us
+// <7=> 16384 us
+
+#ifndef QDEC_CONFIG_SAMPLEPER
+#define QDEC_CONFIG_SAMPLEPER 7
+#endif
+
+// QDEC_CONFIG_PIO_A - A pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_A
+#define QDEC_CONFIG_PIO_A 31
+#endif
+
+// QDEC_CONFIG_PIO_B - B pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_B
+#define QDEC_CONFIG_PIO_B 31
+#endif
+
+// QDEC_CONFIG_PIO_LED - LED pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_LED
+#define QDEC_CONFIG_PIO_LED 31
+#endif
+
+// QDEC_CONFIG_LEDPRE - LED pre
+#ifndef QDEC_CONFIG_LEDPRE
+#define QDEC_CONFIG_LEDPRE 511
+#endif
+
+// QDEC_CONFIG_LEDPOL - LED polarity
+
+// <0=> Active low
+// <1=> Active high
+
+#ifndef QDEC_CONFIG_LEDPOL
+#define QDEC_CONFIG_LEDPOL 1
+#endif
+
+// QDEC_CONFIG_DBFEN - Debouncing enable
+
+
+#ifndef QDEC_CONFIG_DBFEN
+#define QDEC_CONFIG_DBFEN 0
+#endif
+
+// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable
+
+
+#ifndef QDEC_CONFIG_SAMPLE_INTEN
+#define QDEC_CONFIG_SAMPLE_INTEN 0
+#endif
+
+// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef QDEC_CONFIG_IRQ_PRIORITY
+#define QDEC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //QDEC_ENABLED
+//
+
+// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver
+//==========================================================
+#ifndef RNG_ENABLED
+#define RNG_ENABLED 0
+#endif
+#if RNG_ENABLED
+// RNG_CONFIG_ERROR_CORRECTION - Error correction
+
+
+#ifndef RNG_CONFIG_ERROR_CORRECTION
+#define RNG_CONFIG_ERROR_CORRECTION 0
+#endif
+
+// RNG_CONFIG_POOL_SIZE - Pool size
+#ifndef RNG_CONFIG_POOL_SIZE
+#define RNG_CONFIG_POOL_SIZE 8
+#endif
+
+// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RNG_CONFIG_IRQ_PRIORITY
+#define RNG_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //RNG_ENABLED
+//
+
+// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver
+//==========================================================
+#ifndef RTC_ENABLED
+#define RTC_ENABLED 1
+#endif
+#if RTC_ENABLED
+// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
+
+
+#ifndef RTC_DEFAULT_CONFIG_FREQUENCY
+#define RTC_DEFAULT_CONFIG_FREQUENCY 32768
+#endif
+
+// RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering
+
+
+#ifndef RTC_DEFAULT_CONFIG_RELIABLE
+#define RTC_DEFAULT_CONFIG_RELIABLE 0
+#endif
+
+// RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// RTC0_ENABLED - Enable RTC0 instance
+
+
+#ifndef RTC0_ENABLED
+#define RTC0_ENABLED 1
+#endif
+
+// RTC1_ENABLED - Enable RTC1 instance
+
+
+#ifndef RTC1_ENABLED
+#define RTC1_ENABLED 0
+#endif
+
+// RTC2_ENABLED - Enable RTC2 instance
+
+
+#ifndef RTC2_ENABLED
+#define RTC2_ENABLED 0
+#endif
+
+// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt
+#ifndef NRF_MAXIMUM_LATENCY_US
+#define NRF_MAXIMUM_LATENCY_US 2000
+#endif
+
+#endif //RTC_ENABLED
+//
+
+// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver
+//==========================================================
+#ifndef SAADC_ENABLED
+#define SAADC_ENABLED 1
+#endif
+#if SAADC_ENABLED
+// SAADC_CONFIG_RESOLUTION - Resolution
+
+// <0=> 8 bit
+// <1=> 10 bit
+// <2=> 12 bit
+// <3=> 14 bit
+
+#ifndef SAADC_CONFIG_RESOLUTION
+#define SAADC_CONFIG_RESOLUTION 1
+#endif
+
+// SAADC_CONFIG_OVERSAMPLE - Sample period
+
+// <0=> Disabled
+// <1=> 2x
+// <2=> 4x
+// <3=> 8x
+// <4=> 16x
+// <5=> 32x
+// <6=> 64x
+// <7=> 128x
+// <8=> 256x
+
+#ifndef SAADC_CONFIG_OVERSAMPLE
+#define SAADC_CONFIG_OVERSAMPLE 0
+#endif
+
+// SAADC_CONFIG_LP_MODE - Enabling low power mode
+
+
+#ifndef SAADC_CONFIG_LP_MODE
+#define SAADC_CONFIG_LP_MODE 0
+#endif
+
+// SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SAADC_CONFIG_IRQ_PRIORITY
+#define SAADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //SAADC_ENABLED
+//
+
+// SPIS_ENABLED - nrf_drv_spis - SPI Slave driver
+//==========================================================
+#ifndef SPIS_ENABLED
+#define SPIS_ENABLED 0
+#endif
+#if SPIS_ENABLED
+// SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// SPIS_DEFAULT_MODE - Mode
+
+// <0=> MODE_0
+// <1=> MODE_1
+// <2=> MODE_2
+// <3=> MODE_3
+
+#ifndef SPIS_DEFAULT_MODE
+#define SPIS_DEFAULT_MODE 0
+#endif
+
+// SPIS_DEFAULT_BIT_ORDER - SPIS default bit order
+
+// <0=> MSB first
+// <1=> LSB first
+
+#ifndef SPIS_DEFAULT_BIT_ORDER
+#define SPIS_DEFAULT_BIT_ORDER 0
+#endif
+
+// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
+
+
+#ifndef SPIS_DEFAULT_DEF
+#define SPIS_DEFAULT_DEF 255
+#endif
+
+// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
+
+
+#ifndef SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_ORC 255
+#endif
+
+// SPIS0_ENABLED - Enable SPIS0 instance
+
+
+#ifndef SPIS0_ENABLED
+#define SPIS0_ENABLED 0
+#endif
+
+// SPIS1_ENABLED - Enable SPIS1 instance
+
+
+#ifndef SPIS1_ENABLED
+#define SPIS1_ENABLED 0
+#endif
+
+// SPIS2_ENABLED - Enable SPIS2 instance
+
+
+#ifndef SPIS2_ENABLED
+#define SPIS2_ENABLED 0
+#endif
+
+#endif //SPIS_ENABLED
+//
+
+// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver
+//==========================================================
+#ifndef SPI_ENABLED
+#define SPI_ENABLED 0
+#endif
+#if SPI_ENABLED
+// SPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SPI_CONFIG_LOG_ENABLED
+#define SPI_CONFIG_LOG_ENABLED 0
+#endif
+#if SPI_CONFIG_LOG_ENABLED
+// SPI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef SPI_CONFIG_LOG_LEVEL
+#define SPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_INFO_COLOR
+#define SPI_CONFIG_INFO_COLOR 0
+#endif
+
+// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_DEBUG_COLOR
+#define SPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //SPI_CONFIG_LOG_ENABLED
+//
+
+// SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// SPI0_ENABLED - Enable SPI0 instance
+//==========================================================
+#ifndef SPI0_ENABLED
+#define SPI0_ENABLED 0
+#endif
+#if SPI0_ENABLED
+// SPI0_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI0_USE_EASY_DMA
+#define SPI0_USE_EASY_DMA 1
+#endif
+
+#endif //SPI0_ENABLED
+//
+
+// SPI1_ENABLED - Enable SPI1 instance
+//==========================================================
+#ifndef SPI1_ENABLED
+#define SPI1_ENABLED 0
+#endif
+#if SPI1_ENABLED
+// SPI1_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI1_USE_EASY_DMA
+#define SPI1_USE_EASY_DMA 1
+#endif
+
+#endif //SPI1_ENABLED
+//
+
+// SPI2_ENABLED - Enable SPI2 instance
+//==========================================================
+#ifndef SPI2_ENABLED
+#define SPI2_ENABLED 0
+#endif
+#if SPI2_ENABLED
+// SPI2_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI2_USE_EASY_DMA
+#define SPI2_USE_EASY_DMA 1
+#endif
+
+#endif //SPI2_ENABLED
+//
+
+#endif //SPI_ENABLED
+//
+
+// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver
+//==========================================================
+#ifndef TIMER_ENABLED
+#define TIMER_ENABLED 0
+#endif
+#if TIMER_ENABLED
+// TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 kHz
+// <8=> 62.5 kHz
+// <9=> 31.25 kHz
+
+#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY
+#define TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
+
+// <0=> Timer
+// <1=> Counter
+
+#ifndef TIMER_DEFAULT_CONFIG_MODE
+#define TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
+
+// <0=> 16 bit
+// <1=> 8 bit
+// <2=> 24 bit
+// <3=> 32 bit
+
+#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TIMER0_ENABLED - Enable TIMER0 instance
+
+
+#ifndef TIMER0_ENABLED
+#define TIMER0_ENABLED 0
+#endif
+
+// TIMER1_ENABLED - Enable TIMER1 instance
+
+
+#ifndef TIMER1_ENABLED
+#define TIMER1_ENABLED 0
+#endif
+
+// TIMER2_ENABLED - Enable TIMER2 instance
+
+
+#ifndef TIMER2_ENABLED
+#define TIMER2_ENABLED 0
+#endif
+
+// TIMER3_ENABLED - Enable TIMER3 instance
+
+
+#ifndef TIMER3_ENABLED
+#define TIMER3_ENABLED 0
+#endif
+
+// TIMER4_ENABLED - Enable TIMER4 instance
+
+
+#ifndef TIMER4_ENABLED
+#define TIMER4_ENABLED 0
+#endif
+
+#endif //TIMER_ENABLED
+//
+
+// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver
+//==========================================================
+#ifndef TWIS_ENABLED
+#define TWIS_ENABLED 0
+#endif
+#if TWIS_ENABLED
+// TWIS_DEFAULT_CONFIG_ADDR0 - Address0
+#ifndef TWIS_DEFAULT_CONFIG_ADDR0
+#define TWIS_DEFAULT_CONFIG_ADDR0 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_ADDR1 - Address1
+#ifndef TWIS_DEFAULT_CONFIG_ADDR1
+#define TWIS_DEFAULT_CONFIG_ADDR1 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL
+#define TWIS_DEFAULT_CONFIG_SCL_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL
+#define TWIS_DEFAULT_CONFIG_SDA_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TWIS0_ENABLED - Enable TWIS0 instance
+
+
+#ifndef TWIS0_ENABLED
+#define TWIS0_ENABLED 0
+#endif
+
+// TWIS1_ENABLED - Enable TWIS1 instance
+
+
+#ifndef TWIS1_ENABLED
+#define TWIS1_ENABLED 0
+#endif
+
+// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once
+
+
+// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
+
+#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+#endif
+
+// TWIS_NO_SYNC_MODE - Remove support for synchronous mode
+
+
+// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
+
+#ifndef TWIS_NO_SYNC_MODE
+#define TWIS_NO_SYNC_MODE 0
+#endif
+
+#endif //TWIS_ENABLED
+//
+
+// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver
+//==========================================================
+#ifndef TWI_ENABLED
+#define TWI_ENABLED 0
+#endif
+#if TWI_ENABLED
+// TWI_DEFAULT_CONFIG_FREQUENCY - Frequency
+
+// <26738688=> 100k
+// <67108864=> 250k
+// <104857600=> 400k
+
+#ifndef TWI_DEFAULT_CONFIG_FREQUENCY
+#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init
+
+
+#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT
+#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit
+
+
+#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TWI0_ENABLED - Enable TWI0 instance
+//==========================================================
+#ifndef TWI0_ENABLED
+#define TWI0_ENABLED 0
+#endif
+#if TWI0_ENABLED
+// TWI0_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI0_USE_EASY_DMA
+#define TWI0_USE_EASY_DMA 0
+#endif
+
+#endif //TWI0_ENABLED
+//
+
+// TWI1_ENABLED - Enable TWI1 instance
+//==========================================================
+#ifndef TWI1_ENABLED
+#define TWI1_ENABLED 0
+#endif
+#if TWI1_ENABLED
+// TWI1_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI1_USE_EASY_DMA
+#define TWI1_USE_EASY_DMA 0
+#endif
+
+#endif //TWI1_ENABLED
+//
+
+#endif //TWI_ENABLED
+//
+
+// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver
+//==========================================================
+#ifndef UART_ENABLED
+#define UART_ENABLED 1
+#endif
+#if UART_ENABLED
+// UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef UART_DEFAULT_CONFIG_HWFC
+#define UART_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// UART_DEFAULT_CONFIG_PARITY - Parity
+
+// <0=> Excluded
+// <14=> Included
+
+#ifndef UART_DEFAULT_CONFIG_PARITY
+#define UART_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef UART_DEFAULT_CONFIG_BAUDRATE
+#define UART_DEFAULT_CONFIG_BAUDRATE 30801920
+#endif
+
+// UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA
+
+
+#ifndef UART0_CONFIG_USE_EASY_DMA
+#define UART0_CONFIG_USE_EASY_DMA 1
+#endif
+
+// UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA
+
+
+#ifndef UART_EASY_DMA_SUPPORT
+#define UART_EASY_DMA_SUPPORT 1
+#endif
+
+// UART_LEGACY_SUPPORT - Driver supporting Legacy mode
+
+
+#ifndef UART_LEGACY_SUPPORT
+#define UART_LEGACY_SUPPORT 1
+#endif
+
+#endif //UART_ENABLED
+//
+
+// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver
+//==========================================================
+#ifndef WDT_ENABLED
+#define WDT_ENABLED 0
+#endif
+#if WDT_ENABLED
+// WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode
+
+// <1=> Run in SLEEP, Pause in HALT
+// <8=> Pause in SLEEP, Run in HALT
+// <9=> Run in SLEEP and HALT
+// <0=> Pause in SLEEP and HALT
+
+#ifndef WDT_CONFIG_BEHAVIOUR
+#define WDT_CONFIG_BEHAVIOUR 1
+#endif
+
+// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295>
+
+
+#ifndef WDT_CONFIG_RELOAD_VALUE
+#define WDT_CONFIG_RELOAD_VALUE 2000
+#endif
+
+// WDT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef WDT_CONFIG_IRQ_PRIORITY
+#define WDT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //WDT_ENABLED
+//
+
+//
+//==========================================================
+
+// nRF_Libraries
+
+//==========================================================
+// APP_FIFO_ENABLED - app_fifo - Software FIFO implementation
+
+
+#ifndef APP_FIFO_ENABLED
+#define APP_FIFO_ENABLED 1
+#endif
+
+// APP_MAILBOX_ENABLED - app_mailbox - Thread safe mailbox
+
+
+#ifndef APP_MAILBOX_ENABLED
+#define APP_MAILBOX_ENABLED 0
+#endif
+
+// APP_PWM_ENABLED - app_pwm - PWM functionality
+
+
+#ifndef APP_PWM_ENABLED
+#define APP_PWM_ENABLED 0
+#endif
+
+// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
+//==========================================================
+#ifndef APP_SCHEDULER_ENABLED
+#define APP_SCHEDULER_ENABLED 1
+#endif
+#if APP_SCHEDULER_ENABLED
+// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature
+
+
+#ifndef APP_SCHEDULER_WITH_PAUSE
+#define APP_SCHEDULER_WITH_PAUSE 0
+#endif
+
+// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling
+
+
+#ifndef APP_SCHEDULER_WITH_PROFILER
+#define APP_SCHEDULER_WITH_PROFILER 0
+#endif
+
+#endif //APP_SCHEDULER_ENABLED
+//
+
+// APP_TIMER_ENABLED - app_timer - Application timer functionality
+//==========================================================
+#ifndef APP_TIMER_ENABLED
+#define APP_TIMER_ENABLED 1
+#endif
+#if APP_TIMER_ENABLED
+// APP_TIMER_WITH_PROFILER - Enable app_timer profiling
+
+
+#ifndef APP_TIMER_WITH_PROFILER
+#define APP_TIMER_WITH_PROFILER 0
+#endif
+
+// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on
+
+
+// If option is enabled RTC is kept running even if there is no active timers.
+// This option can be used when app_timer is used for timestamping.
+
+#ifndef APP_TIMER_KEEPS_RTC_ACTIVE
+#define APP_TIMER_KEEPS_RTC_ACTIVE 0
+#endif
+
+#endif //APP_TIMER_ENABLED
+//
+
+// APP_TWI_ENABLED - app_twi - TWI transaction manager
+
+
+#ifndef APP_TWI_ENABLED
+#define APP_TWI_ENABLED 0
+#endif
+
+// APP_UART_ENABLED - app_uart - UART driver
+//==========================================================
+#ifndef APP_UART_ENABLED
+#define APP_UART_ENABLED 1
+#endif
+#if APP_UART_ENABLED
+// APP_UART_DRIVER_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef APP_UART_DRIVER_INSTANCE
+#define APP_UART_DRIVER_INSTANCE 0
+#endif
+
+#endif //APP_UART_ENABLED
+//
+
+// BUTTON_ENABLED - app_button - buttons handling module
+
+
+#ifndef BUTTON_ENABLED
+#define BUTTON_ENABLED 1
+#endif
+
+// CRC16_ENABLED - crc16 - CRC16 calculation routines
+
+
+#ifndef CRC16_ENABLED
+#define CRC16_ENABLED 1
+#endif
+
+// CRC32_ENABLED - crc32 - CRC32 calculation routines
+
+
+#ifndef CRC32_ENABLED
+#define CRC32_ENABLED 1
+#endif
+
+// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library
+
+
+#ifndef ECC_ENABLED
+#define ECC_ENABLED 0
+#endif
+
+// FDS_ENABLED - fds - Flash data storage module
+//==========================================================
+#ifndef FDS_ENABLED
+#define FDS_ENABLED 1
+#endif
+#if FDS_ENABLED
+// FDS_OP_QUEUE_SIZE - Size of the internal queue.
+#ifndef FDS_OP_QUEUE_SIZE
+#define FDS_OP_QUEUE_SIZE 4
+#endif
+
+// FDS_CHUNK_QUEUE_SIZE - Determines how many @ref fds_record_chunk_t structures can be buffered at any time.
+#ifndef FDS_CHUNK_QUEUE_SIZE
+#define FDS_CHUNK_QUEUE_SIZE 8
+#endif
+
+// FDS_MAX_USERS - Maximum number of callbacks that can be registered.
+#ifndef FDS_MAX_USERS
+#define FDS_MAX_USERS 8
+#endif
+
+// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use.
+// One of the virtual pages is reserved by the system for garbage collection.
+// Therefore, the minimum is two virtual pages: one page to store data and
+// one page to be used by the system for garbage collection. The total amount
+// of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES
+// @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes.
+
+#ifndef FDS_VIRTUAL_PAGES
+#define FDS_VIRTUAL_PAGES 3
+#endif
+
+// FDS_VIRTUAL_PAGE_SIZE - The size of a virtual page of flash memory, expressed in number of 4-byte words.
+
+
+// By default, a virtual page is the same size as a physical page.
+// The size of a virtual page must be a multiple of the size of a physical page.
+// <1024=> 1024
+// <2048=> 2048
+
+#ifndef FDS_VIRTUAL_PAGE_SIZE
+#define FDS_VIRTUAL_PAGE_SIZE 1024
+#endif
+
+#endif //FDS_ENABLED
+//
+
+// FSTORAGE_ENABLED - fstorage - Flash storage module
+//==========================================================
+#ifndef FSTORAGE_ENABLED
+#define FSTORAGE_ENABLED 1
+#endif
+#if FSTORAGE_ENABLED
+// FS_QUEUE_SIZE - Configures the size of the internal queue.
+// Increase this if there are many users, or if it is likely that many
+// operation will be queued at once without waiting for the previous operations
+// to complete. In general, increase the queue size if you frequently receive
+// @ref FS_ERR_QUEUE_FULL errors when calling @ref fs_store or @ref fs_erase.
+
+#ifndef FS_QUEUE_SIZE
+#define FS_QUEUE_SIZE 4
+#endif
+
+// FS_OP_MAX_RETRIES - Number attempts to execute an operation if the SoftDevice fails.
+// Increase this value if events return the @ref FS_ERR_OPERATION_TIMEOUT
+// error often. The SoftDevice may fail to schedule flash access due to high BLE activity.
+
+#ifndef FS_OP_MAX_RETRIES
+#define FS_OP_MAX_RETRIES 3
+#endif
+
+// FS_MAX_WRITE_SIZE_WORDS - Maximum number of words to be written to flash in a single operation.
+// Tweaking this value can increase the chances of the SoftDevice being
+// able to fit flash operations in between radio activity. This value is bound by the
+// maximum number of words which the SoftDevice can write to flash in a single call to
+// @ref sd_flash_write, which is 256 words for nRF51 ICs and 1024 words for nRF52 ICs.
+
+#ifndef FS_MAX_WRITE_SIZE_WORDS
+#define FS_MAX_WRITE_SIZE_WORDS 1024
+#endif
+
+#endif //FSTORAGE_ENABLED
+//
+
+// HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release
+
+
+#ifndef HARDFAULT_HANDLER_ENABLED
+#define HARDFAULT_HANDLER_ENABLED 0
+#endif
+
+// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI
+//==========================================================
+#ifndef HCI_MEM_POOL_ENABLED
+#define HCI_MEM_POOL_ENABLED 0
+#endif
+#if HCI_MEM_POOL_ENABLED
+// HCI_TX_BUF_SIZE - TX buffer size in bytes.
+#ifndef HCI_TX_BUF_SIZE
+#define HCI_TX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_SIZE - RX buffer size in bytes.
+#ifndef HCI_RX_BUF_SIZE
+#define HCI_RX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size.
+#ifndef HCI_RX_BUF_QUEUE_SIZE
+#define HCI_RX_BUF_QUEUE_SIZE 4
+#endif
+
+#endif //HCI_MEM_POOL_ENABLED
+//
+
+// HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI
+//==========================================================
+#ifndef HCI_SLIP_ENABLED
+#define HCI_SLIP_ENABLED 0
+#endif
+#if HCI_SLIP_ENABLED
+// HCI_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef HCI_UART_BAUDRATE
+#define HCI_UART_BAUDRATE 30801920
+#endif
+
+// HCI_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef HCI_UART_FLOW_CONTROL
+#define HCI_UART_FLOW_CONTROL 0
+#endif
+
+// HCI_UART_RX_PIN - UART RX pin
+#ifndef HCI_UART_RX_PIN
+#define HCI_UART_RX_PIN 8
+#endif
+
+// HCI_UART_TX_PIN - UART TX pin
+#ifndef HCI_UART_TX_PIN
+#define HCI_UART_TX_PIN 6
+#endif
+
+// HCI_UART_RTS_PIN - UART RTS pin
+#ifndef HCI_UART_RTS_PIN
+#define HCI_UART_RTS_PIN 5
+#endif
+
+// HCI_UART_CTS_PIN - UART CTS pin
+#ifndef HCI_UART_CTS_PIN
+#define HCI_UART_CTS_PIN 7
+#endif
+
+#endif //HCI_SLIP_ENABLED
+//
+
+// HCI_TRANSPORT_ENABLED - hci_transport - HCI transport
+//==========================================================
+#ifndef HCI_TRANSPORT_ENABLED
+#define HCI_TRANSPORT_ENABLED 0
+#endif
+#if HCI_TRANSPORT_ENABLED
+// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits.
+#ifndef HCI_MAX_PACKET_SIZE_IN_BITS
+#define HCI_MAX_PACKET_SIZE_IN_BITS 8000
+#endif
+
+#endif //HCI_TRANSPORT_ENABLED
+//
+
+// LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module
+
+
+#ifndef LED_SOFTBLINK_ENABLED
+#define LED_SOFTBLINK_ENABLED 0
+#endif
+
+// LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module
+
+
+#ifndef LOW_POWER_PWM_ENABLED
+#define LOW_POWER_PWM_ENABLED 0
+#endif
+
+// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator
+//==========================================================
+#ifndef MEM_MANAGER_ENABLED
+#define MEM_MANAGER_ENABLED 0
+#endif
+#if MEM_MANAGER_ENABLED
+// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1
+#endif
+
+// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block.
+// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT
+#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block.
+// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE
+#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block.
+// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256
+#endif
+
+// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module.
+
+
+#ifndef MEM_MANAGER_ENABLE_LOGS
+#define MEM_MANAGER_ENABLE_LOGS 0
+#endif
+
+// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module.
+
+
+#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK
+#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0
+#endif
+
+#endif //MEM_MANAGER_ENABLED
+//
+
+// NRF_CSENSE_ENABLED - nrf_csense - nrf_csense module
+//==========================================================
+#ifndef NRF_CSENSE_ENABLED
+#define NRF_CSENSE_ENABLED 0
+#endif
+#if NRF_CSENSE_ENABLED
+// NRF_CSENSE_PAD_HYSTERESIS - Minimal value of change to decide that pad was touched.
+#ifndef NRF_CSENSE_PAD_HYSTERESIS
+#define NRF_CSENSE_PAD_HYSTERESIS 15
+#endif
+
+// NRF_CSENSE_PAD_DEVIATION - Minimal value measured on pad to take its value while calculating step.
+#ifndef NRF_CSENSE_PAD_DEVIATION
+#define NRF_CSENSE_PAD_DEVIATION 70
+#endif
+
+// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on pad to take its value into account.
+#ifndef NRF_CSENSE_MIN_PAD_VALUE
+#define NRF_CSENSE_MIN_PAD_VALUE 20
+#endif
+
+// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance.
+#ifndef NRF_CSENSE_MAX_PADS_NUMBER
+#define NRF_CSENSE_MAX_PADS_NUMBER 20
+#endif
+
+// NRF_CSENSE_MAX_VALUE - Maximum normalized value got from measurement.
+#ifndef NRF_CSENSE_MAX_VALUE
+#define NRF_CSENSE_MAX_VALUE 1000
+#endif
+
+// NRF_CSENSE_OUTPUT_PIN - Output pin used by lower module.
+// This is only used when running on NRF51.
+
+#ifndef NRF_CSENSE_OUTPUT_PIN
+#define NRF_CSENSE_OUTPUT_PIN 30
+#endif
+
+#endif //NRF_CSENSE_ENABLED
+//
+
+// NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor module
+//==========================================================
+#ifndef NRF_DRV_CSENSE_ENABLED
+#define NRF_DRV_CSENSE_ENABLED 0
+#endif
+#if NRF_DRV_CSENSE_ENABLED
+// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (except nRF51)
+#ifndef TIMER0_FOR_CSENSE
+#define TIMER0_FOR_CSENSE 1
+#endif
+
+// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (except nRF51)
+#ifndef TIMER1_FOR_CSENSE
+#define TIMER1_FOR_CSENSE 2
+#endif
+
+// MEASUREMENT_PERIOD - Single measurement period.
+// Time of single measurement can be calculated as T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). I_SOURCE, VUP and VDOWN are values used to initialize COMP and C is capacitance of used pad.
+
+#ifndef MEASUREMENT_PERIOD
+#define MEASUREMENT_PERIOD 20
+#endif
+
+#endif //NRF_DRV_CSENSE_ENABLED
+//
+
+// SLIP_ENABLED - slip - SLIP encoding decoding
+
+
+#ifndef SLIP_ENABLED
+#define SLIP_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_Log
+
+//==========================================================
+// NRF_LOG_ENABLED - nrf_log - Logging
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 0
+#endif
+#if NRF_LOG_ENABLED
+// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string
+//==========================================================
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+#if NRF_LOG_USES_COLORS
+// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+// NRF_LOG_ERROR_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_ERROR_COLOR
+#define NRF_LOG_ERROR_COLOR 0
+#endif
+
+// NRF_LOG_WARNING_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_WARNING_COLOR
+#define NRF_LOG_WARNING_COLOR 0
+#endif
+
+#endif //NRF_LOG_USES_COLORS
+//
+
+// NRF_LOG_DEFAULT_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 3
+#endif
+
+// NRF_LOG_DEFERRED - Enable deffered logger.
+
+// Log data is buffered and can be processed in idle.
+//==========================================================
+#ifndef NRF_LOG_DEFERRED
+#define NRF_LOG_DEFERRED 1
+#endif
+#if NRF_LOG_DEFERRED
+// NRF_LOG_DEFERRED_BUFSIZE - Size of the buffer for logs in words.
+// Must be power of 2
+
+#ifndef NRF_LOG_DEFERRED_BUFSIZE
+#define NRF_LOG_DEFERRED_BUFSIZE 256
+#endif
+
+#endif //NRF_LOG_DEFERRED
+//
+
+// NRF_LOG_USES_TIMESTAMP - Enable timestamping
+
+
+// Function for getting the timestamp is provided by the user
+
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+
+#endif //NRF_LOG_ENABLED
+//
+
+// nrf_log_backend - Logging sink
+
+//==========================================================
+// NRF_LOG_BACKEND_MAX_STRING_LENGTH - Buffer for storing single output string
+// Logger backend RAM usage is determined by this value.
+
+#ifndef NRF_LOG_BACKEND_MAX_STRING_LENGTH
+#define NRF_LOG_BACKEND_MAX_STRING_LENGTH 256
+#endif
+
+// NRF_LOG_TIMESTAMP_DIGITS - Number of digits for timestamp
+// If higher resolution timestamp source is used it might be needed to increase that
+
+#ifndef NRF_LOG_TIMESTAMP_DIGITS
+#define NRF_LOG_TIMESTAMP_DIGITS 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_USES_UART - If enabled data is printed over UART
+//==========================================================
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_UART
+#define NRF_LOG_BACKEND_SERIAL_USES_UART 1
+#endif
+#if NRF_LOG_BACKEND_SERIAL_USES_UART
+// NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE
+#define NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE 30801920
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_TX_PIN - UART TX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_TX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_TX_PIN 6
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RX_PIN - UART RX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RX_PIN 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN - UART RTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN 5
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN - UART CTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN 7
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL
+#define NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL 0
+#endif
+
+// NRF_LOG_BACKEND_UART_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef NRF_LOG_BACKEND_UART_INSTANCE
+#define NRF_LOG_BACKEND_UART_INSTANCE 0
+#endif
+
+#endif //NRF_LOG_BACKEND_SERIAL_USES_UART
+//
+
+// NRF_LOG_BACKEND_SERIAL_USES_RTT - If enabled data is printed using RTT
+
+
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_RTT
+#define NRF_LOG_BACKEND_SERIAL_USES_RTT 0
+#endif
+
+//
+//==========================================================
+
+//
+//==========================================================
+
+// <<< end of configuration section >>>
+#endif //SDK_CONFIG_H
+
diff --git a/ARM/Nordic/nRF51/exemples/Blinky/.cproject b/ARM/Nordic/nRF51/exemples/Blinky/.cproject
index a2fa04f9..0563a673 100755
--- a/ARM/Nordic/nRF51/exemples/Blinky/.cproject
+++ b/ARM/Nordic/nRF51/exemples/Blinky/.cproject
@@ -72,11 +72,12 @@
+
-
-
+
+
@@ -222,11 +223,12 @@
+
-
-
+
+
@@ -373,11 +375,12 @@
+
-
-
+
+
diff --git a/ARM/Nordic/nRF51/exemples/Blinky/src/main.c b/ARM/Nordic/nRF51/exemples/Blinky/src/main.c
index 72b6bf47..1cb0ad09 100755
--- a/ARM/Nordic/nRF51/exemples/Blinky/src/main.c
+++ b/ARM/Nordic/nRF51/exemples/Blinky/src/main.c
@@ -10,24 +10,24 @@
int main(void)
{
- IOPinConfig(0, BLUEIO_LED_BLUE, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
- IOPinSet(0, BLUEIO_LED_BLUE);
- IOPinConfig(0, BLUEIO_LED_GREEN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
- IOPinSet(0, BLUEIO_LED_GREEN);
- IOPinConfig(0, BLUEIO_LED_RED, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
- IOPinSet(0, BLUEIO_LED_RED);
+ IOPinConfig(0, BLUEIO_LED_BLUE_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
+ IOPinSet(0, BLUEIO_LED_BLUE_PIN);
+ IOPinConfig(0, BLUEIO_LED_GREEN_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
+ IOPinSet(0, BLUEIO_LED_GREEN_PIN);
+ IOPinConfig(0, BLUEIO_LED_RED_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
+ IOPinSet(0, BLUEIO_LED_RED_PIN);
while(true)
{
- IOPinClear(0, BLUEIO_LED_BLUE);
+ IOPinClear(0, BLUEIO_LED_BLUE_PIN);
usDelay(1000000);
- IOPinSet(0, BLUEIO_LED_BLUE);
- IOPinClear(0, BLUEIO_LED_GREEN);
+ IOPinSet(0, BLUEIO_LED_BLUE_PIN);
+ IOPinClear(0, BLUEIO_LED_GREEN_PIN);
usDelay(1000000);
- IOPinSet(0, BLUEIO_LED_GREEN);
- IOPinClear(0, BLUEIO_LED_RED);
+ IOPinSet(0, BLUEIO_LED_GREEN_PIN);
+ IOPinClear(0, BLUEIO_LED_RED_PIN);
usDelay(1000000);
- IOPinSet(0, BLUEIO_LED_RED);
+ IOPinSet(0, BLUEIO_LED_RED_PIN);
usDelay(1000000);
}
}
diff --git a/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/.cproject b/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/.cproject
index 6db531ad..a36facfb 100755
--- a/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/.cproject
+++ b/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/.cproject
@@ -292,4 +292,5 @@
+
diff --git a/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/src/LMXDisplayDemo.cpp b/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/src/LMXDisplayDemo.cpp
index 38ad25c5..9ca515bc 100755
--- a/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/src/LMXDisplayDemo.cpp
+++ b/ARM/Nordic/nRF51/exemples/LMXDisplayDemo/src/LMXDisplayDemo.cpp
@@ -9,8 +9,6 @@
#include "idelay.h"
#include "ledmxio.h"
-using namespace std;
-
// I/O pins connection
LEDMXIOCFG g_IOCfg = {
LMXBLUE_WR_PIN, // WR pin
@@ -60,7 +58,7 @@ main()
g_LmxDev.Init(g_Cfg);
g_LmxDev.PrintLeft("Hello!");
- //nrf_delay(5000);
+ usDelay(5000);
g_LmxDev.PrintRight("Ola!");
return 0;
diff --git a/ARM/Nordic/nRF51/exemples/Uart/.cproject b/ARM/Nordic/nRF51/exemples/Uart/.cproject
index 643d3cde..4c64dc56 100755
--- a/ARM/Nordic/nRF51/exemples/Uart/.cproject
+++ b/ARM/Nordic/nRF51/exemples/Uart/.cproject
@@ -105,7 +105,7 @@
-
+
@@ -120,7 +120,7 @@
-
+
@@ -140,6 +140,9 @@
+
+
+
@@ -251,7 +254,7 @@
-
+
@@ -266,7 +269,7 @@
-
+
@@ -314,4 +317,5 @@
+
diff --git a/ARM/Nordic/nRF51/exemples/Uart/.project b/ARM/Nordic/nRF51/exemples/Uart/.project
index 281f2df8..a46fa16c 100755
--- a/ARM/Nordic/nRF51/exemples/Uart/.project
+++ b/ARM/Nordic/nRF51/exemples/Uart/.project
@@ -30,40 +30,5 @@
1
PARENT-2-PROJECT_LOC/src/Vectors_nRF51.c
-
- src/drivers_nrf
- 2
- virtual:/virtual
-
-
- src/drivers_nrf/common
- 2
- virtual:/virtual
-
-
- src/drivers_nrf/gpiote
- 2
- virtual:/virtual
-
-
- src/drivers_nrf/uart
- 2
- virtual:/virtual
-
-
- src/drivers_nrf/common/nrf_drv_common.c
- 1
- PARENT-2-PROJECT_LOC/nrf51_sdk/components/drivers_nrf/common/nrf_drv_common.c
-
-
- src/drivers_nrf/gpiote/nrf_drv_gpiote.c
- 1
- PARENT-2-PROJECT_LOC/nrf51_sdk/components/drivers_nrf/gpiote/nrf_drv_gpiote.c
-
-
- src/drivers_nrf/uart/app_uart.c
- 1
- PARENT-2-PROJECT_LOC/nrf51_sdk/components/drivers_nrf/uart/app_uart.c
-
diff --git a/ARM/Nordic/nRF51/exemples/Uart/src/main.cpp b/ARM/Nordic/nRF51/exemples/Uart/src/main.cpp
index 5045eb17..9d68967a 100755
--- a/ARM/Nordic/nRF51/exemples/Uart/src/main.cpp
+++ b/ARM/Nordic/nRF51/exemples/Uart/src/main.cpp
@@ -35,11 +35,6 @@ Modified by Date Description
----------------------------------------------------------------------------*/
#include
-extern "C" {
-#include "app_util_platform.h"
-#include "nrf_drv_gpiote.h"
-//#include "app_uart.h"
-}
#include "iopincfg.h"
#include "nrf5x_uart.h"
diff --git a/ARM/Nordic/nRF51/exemples/Uart/src/nrf_drv_config.h b/ARM/Nordic/nRF51/exemples/Uart/src/nrf_drv_config.h
deleted file mode 100755
index 204723c5..00000000
--- a/ARM/Nordic/nRF51/exemples/Uart/src/nrf_drv_config.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef NRF_DRV_CONFIG_H
-#define NRF_DRV_CONFIG_H
-
-/* CLOCK */
-#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_16MHz
-#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LF_SRC_Xtal
-#define CLOCK_CONFIG_LF_RC_CAL_INTERVAL RC_2000MS_CALIBRATION_INTERVAL
-#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-/* GPIOTE */
-#define GPIOTE_ENABLED 1
-
-#if (GPIOTE_ENABLED == 1)
-#define GPIOTE_CONFIG_USE_SWI_EGU false
-#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
-#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
-#endif
-
-/* TIMER */
-#define TIMER0_ENABLED 0
-
-#if (TIMER0_ENABLED == 1)
-#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
-#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
-#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
-#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER0_INSTANCE_INDEX 0
-#endif
-
-#define TIMER1_ENABLED 0
-
-#if (TIMER1_ENABLED == 1)
-#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
-#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
-#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
-#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
-#endif
-
-#define TIMER2_ENABLED 0
-
-#if (TIMER2_ENABLED == 1)
-#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
-#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
-#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
-#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
-#endif
-
-#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED)
-
-/* RTC */
-#define RTC0_ENABLED 0
-
-#if (RTC0_ENABLED == 1)
-#define RTC0_CONFIG_FREQUENCY 32678
-#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC0_CONFIG_RELIABLE false
-
-#define RTC0_INSTANCE_INDEX 0
-#endif
-
-#define RTC1_ENABLED 0
-
-#if (RTC1_ENABLED == 1)
-#define RTC1_CONFIG_FREQUENCY 32768
-#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC1_CONFIG_RELIABLE false
-
-#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
-#endif
-
-#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED)
-
-#define NRF_MAXIMUM_LATENCY_US 2000
-
-/* RNG */
-#define RNG_ENABLED 0
-
-#if (RNG_ENABLED == 1)
-#define RNG_CONFIG_ERROR_CORRECTION true
-#define RNG_CONFIG_POOL_SIZE 8
-#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#endif
-
-/* TWI */
-#define TWI0_ENABLED 0
-
-#if (TWI0_ENABLED == 1)
-#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
-#define TWI0_CONFIG_SCL 0
-#define TWI0_CONFIG_SDA 1
-#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
-
-#define TWI0_INSTANCE_INDEX 0
-#endif
-
-#define TWI1_ENABLED 1
-
-#if (TWI1_ENABLED == 1)
-#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_250K
-#define TWI1_CONFIG_SCL 0
-#define TWI1_CONFIG_SDA 1
-#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
-#endif
-
-#define TWI_COUNT (TWI0_ENABLED+TWI1_ENABLED)
-
-/* QDEC */
-#define QDEC_ENABLED 0
-
-#if (QDEC_ENABLED == 1)
-#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
-#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
-#define QDEC_CONFIG_PIO_A 1
-#define QDEC_CONFIG_PIO_B 2
-#define QDEC_CONFIG_PIO_LED 3
-#define QDEC_CONFIG_LEDPRE 511
-#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
-#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define QDEC_CONFIG_DBFEN false
-#define QDEC_CONFIG_SAMPLE_INTEN false
-#endif
-
-/* LPCOMP */
-#define LPCOMP_ENABLED 0
-
-#if (LPCOMP_ENABLED == 1)
-#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT
-#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
-#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
-#endif
-
-/* WDT */
-#define WDT_ENABLED 0
-
-#if (WDT_ENABLED == 1)
-#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
-#define WDT_CONFIG_RELOAD_VALUE 2000
-#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
-#endif
-
-#endif // NRF_DRV_CONFIG_H
diff --git a/ARM/Nordic/nRF51/exemples/UartPrbsTest/.cproject b/ARM/Nordic/nRF51/exemples/UartPrbsTest/.cproject
index 56982cf4..8d8b4b74 100644
--- a/ARM/Nordic/nRF51/exemples/UartPrbsTest/.cproject
+++ b/ARM/Nordic/nRF51/exemples/UartPrbsTest/.cproject
@@ -14,7 +14,7 @@
-
+
diff --git a/ARM/Nordic/nRF51/exemples/UartPrbsTest/.gitignore b/ARM/Nordic/nRF51/exemples/UartPrbsTest/.gitignore
index 3df573fe..ac01e665 100644
--- a/ARM/Nordic/nRF51/exemples/UartPrbsTest/.gitignore
+++ b/ARM/Nordic/nRF51/exemples/UartPrbsTest/.gitignore
@@ -1 +1,2 @@
/Debug/
+/Release/
diff --git a/ARM/Nordic/nRF51/exemples/UartPrbsTest/.project b/ARM/Nordic/nRF51/exemples/UartPrbsTest/.project
index 04e1e8db..f1da0a6d 100644
--- a/ARM/Nordic/nRF51/exemples/UartPrbsTest/.project
+++ b/ARM/Nordic/nRF51/exemples/UartPrbsTest/.project
@@ -24,4 +24,11 @@
org.eclipse.cdt.managedbuilder.core.managedBuildNature
org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+ src/uart_prbs_tx.cpp
+ 1
+ PARENT-5-PROJECT_LOC/exemples/uart/uart_prbs_tx.cpp
+
+
diff --git a/ARM/Nordic/nRF51/exemples/UartPrbsTest/src/board.h b/ARM/Nordic/nRF51/exemples/UartPrbsTest/src/board.h
new file mode 100644
index 00000000..92601e7a
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/UartPrbsTest/src/board.h
@@ -0,0 +1,37 @@
+/*
+ * board.h
+ *
+ * Created on: Nov 15, 2016
+ * Author: hoan
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include "blueio_board.h"
+
+//#define NORDIC_DK
+
+#ifdef NORDIC_DK
+#define UART_TX_PIN 9//7
+#define UART_RX_PIN 11//8
+#define UART_RTS_PIN 8//11
+#define UART_CTS_PIN 10//12
+#else
+#define UART_RX_PORT BLUEIO_UART_RX_PORT
+#define UART_RX_PIN BLUEIO_UART_RX_PIN
+#define UART_RX_PINOP BLUEIO_UART_RX_PINOP
+#define UART_TX_PORT BLUEIO_UART_TX_PORT
+#define UART_TX_PIN BLUEIO_UART_TX_PIN
+#define UART_TX_PINOP BLUEIO_UART_TX_PINOP
+#define UART_CTS_PORT BLUEIO_UART_CTS_PORT
+#define UART_CTS_PIN BLUEIO_UART_CTS_PIN
+#define UART_CTS_PINOP BLUEIO_UART_CTS_PINOP
+#define UART_RTS_PORT BLUEIO_UART_RTS_PORT
+#define UART_RTS_PIN BLUEIO_UART_RTS_PIN
+#define UART_RTS_PINOP BLUEIO_UART_RTS_PINOP
+#endif
+
+
+#endif // __BOARD_H__
+
diff --git a/ARM/Nordic/nRF51/exemples/UartPrbsTest/src/main.cpp b/ARM/Nordic/nRF51/exemples/UartPrbsTest/src/main.cpp
deleted file mode 100644
index 981dd2aa..00000000
--- a/ARM/Nordic/nRF51/exemples/UartPrbsTest/src/main.cpp
+++ /dev/null
@@ -1,163 +0,0 @@
-/*--------------------------------------------------------------------------
-File : main.cpp
-
-Author : Hoang Nguyen Hoan Aug. 31, 2016
-
-Desc : UART PRBS test
- Demo code using EHAL library to do PRBS transmit test using UART
-
-Copyright (c) 2016, I-SYST inc., all rights reserved
-
-Permission to use, copy, modify, and distribute this software for any purpose
-with or without fee is hereby granted, provided that the above copyright
-notice and this permission notice appear in all copies, and none of the
-names : I-SYST or its contributors may be used to endorse or
-promote products derived from this software without specific prior written
-permission.
-
-For info or contributing contact : hnhoan at i-syst dot com
-
-THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-----------------------------------------------------------------------------
-Modified by Date Description
-
-----------------------------------------------------------------------------*/
-
-#include
-
-#include "iopincfg.h"
-#include "uart.h"
-#include "blueio_board.h"
-#include "prbs.h"
-
-//#define NORDIC_DK
-
-#ifdef NORDIC_DK
-#define UART_TX_PIN 9//7
-#define UART_RX_PIN 11//8
-#define UART_RTS_PIN 8//11
-#define UART_CTS_PIN 10//12
-#else
-#define UART_TX_PIN BLUEIO_UART_TX
-#define UART_RX_PIN BLUEIO_UART_RX
-#define UART_RTS_PIN BLUEIO_UART_RTS
-#define UART_CTS_PIN BLUEIO_UART_CTS
-#endif
-
-int nRFUartEvthandler(UARTDEV *pDev, UART_EVT EvtId, uint8_t *pBuffer, int BufferLen);
-
-#define CFIFOMEMSIZE (256)
-
-uint8_t g_RxBuff[CFIFOMEMSIZE];
-uint8_t g_TxBuff[CFIFOMEMSIZE];
-
-static const IOPINCFG s_UartPin[] = {
- {0, UART_RX_PIN, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RX
- {0, UART_TX_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // TX
- {0, UART_CTS_PIN, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // CTS
- {0, UART_RTS_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RTS
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // DCD
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // DTE
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // DTR
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RI
-};
-
-// UART configuration data
-const UARTCFG g_UartCfg = {
- 0,
- &s_UartPin,
- sizeof(s_UartPin)/sizeof(IOPINCFG),
- 1000000, // Rate
- 8,
- UART_PARITY_NONE,
- 1, // Stop bit
- UART_FLWCTRL_NONE,
- true,
- 1, // use APP_IRQ_PRIORITY_LOW with Softdevice
- nRFUartEvthandler,
- CFIFOMEMSIZE,
- g_RxBuff,
- CFIFOMEMSIZE,
- g_TxBuff,
-};
-
-#ifdef DEMO_C
-// For C
-UARTDEV g_UartDev;
-#else
-// For C++
-// UART object instance
-UART g_Uart;
-#endif
-
-int nRFUartEvthandler(UARTDEV *pDev, UART_EVT EvtId, uint8_t *pBuffer, int BufferLen)
-{
- int cnt = 0;
- uint8_t buff[20];
-
- switch (EvtId)
- {
- case UART_EVT_RXTIMEOUT:
- case UART_EVT_RXDATA:
-
- break;
- case UART_EVT_TXREADY:
- break;
- case UART_EVT_LINESTATE:
- break;
- }
-
- return cnt;
-}
-
-
-
-//
-// Print a greeting message on standard output and exit.
-//
-// On embedded platforms this might require semi-hosting or similar.g
-//
-// For example, for toolchains derived from GNU Tools for Embedded,
-// to enable semi-hosting, the following was added to the linker:
-//
-// --specs=rdimon.specs -Wl,--start-group -lgcc -lc -lc -lm -lrdimon -Wl,--end-group
-//
-// Adjust it for other toolchains.
-//
-
-int main()
-{
- bool res;
-
-#ifdef DEMO_C
- res = UARTInit(&g_UartDev, &g_UartCfg);
-#else
- res = g_Uart.Init(g_UartCfg);
-#endif
-
- uint8_t d = 0xff;
-
- while(1)
- {
-#ifdef DEMO_C
- if (UARTTx(&g_UartDev, &d, 1) > 0)
-#else
- if (g_Uart.Tx(&d, 1) > 0)
-#endif
- {
- // If success send next code
- d = Prbs8(d);
- }
- }
- return 0;
-}
diff --git a/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.cproject b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.cproject
new file mode 100644
index 00000000..a28bb650
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.cproject
@@ -0,0 +1,276 @@
+
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diff --git a/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.gitignore b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.gitignore
new file mode 100644
index 00000000..ac01e665
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.gitignore
@@ -0,0 +1,2 @@
+/Debug/
+/Release/
diff --git a/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.project b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.project
new file mode 100644
index 00000000..e92d0755
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/.project
@@ -0,0 +1,34 @@
+
+
+ UartRetargetDemo
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.core.ccnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ src/uart_retarget_demo.cpp
+ 1
+ PARENT-5-PROJECT_LOC/exemples/uart/uart_retarget_demo.cpp
+
+
+
diff --git a/ARM/Nordic/nRF51/exemples/UartRetargetDemo/src/board.h b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/src/board.h
new file mode 100644
index 00000000..92601e7a
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/UartRetargetDemo/src/board.h
@@ -0,0 +1,37 @@
+/*
+ * board.h
+ *
+ * Created on: Nov 15, 2016
+ * Author: hoan
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include "blueio_board.h"
+
+//#define NORDIC_DK
+
+#ifdef NORDIC_DK
+#define UART_TX_PIN 9//7
+#define UART_RX_PIN 11//8
+#define UART_RTS_PIN 8//11
+#define UART_CTS_PIN 10//12
+#else
+#define UART_RX_PORT BLUEIO_UART_RX_PORT
+#define UART_RX_PIN BLUEIO_UART_RX_PIN
+#define UART_RX_PINOP BLUEIO_UART_RX_PINOP
+#define UART_TX_PORT BLUEIO_UART_TX_PORT
+#define UART_TX_PIN BLUEIO_UART_TX_PIN
+#define UART_TX_PINOP BLUEIO_UART_TX_PINOP
+#define UART_CTS_PORT BLUEIO_UART_CTS_PORT
+#define UART_CTS_PIN BLUEIO_UART_CTS_PIN
+#define UART_CTS_PINOP BLUEIO_UART_CTS_PINOP
+#define UART_RTS_PORT BLUEIO_UART_RTS_PORT
+#define UART_RTS_PIN BLUEIO_UART_RTS_PIN
+#define UART_RTS_PINOP BLUEIO_UART_RTS_PINOP
+#endif
+
+
+#endif // __BOARD_H__
+
diff --git a/ARM/Nordic/nRF51/exemples/Uart_Ble/.cproject b/ARM/Nordic/nRF51/exemples/Uart_Ble/.cproject
index 3af2740f..03578ba4 100755
--- a/ARM/Nordic/nRF51/exemples/Uart_Ble/.cproject
+++ b/ARM/Nordic/nRF51/exemples/Uart_Ble/.cproject
@@ -54,32 +54,32 @@
-
-
-
-
-
-
-
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-
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+
+
@@ -98,31 +98,32 @@
-
-
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-
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+
+
@@ -243,32 +244,32 @@
-
-
-
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-
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+
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+
+
@@ -287,31 +288,32 @@
-
-
-
-
-
-
-
-
-
-
-
-
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-
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+
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+
+
+
+
@@ -400,4 +402,5 @@
+
diff --git a/ARM/Nordic/nRF51/exemples/Uart_Ble/.project b/ARM/Nordic/nRF51/exemples/Uart_Ble/.project
index 1928132a..053a758a 100755
--- a/ARM/Nordic/nRF51/exemples/Uart_Ble/.project
+++ b/ARM/Nordic/nRF51/exemples/Uart_Ble/.project
@@ -123,7 +123,7 @@
src/nrf51_sdk/ble/ble_advertising/ble_advertising.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_advertising/ble_advertising.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/ble_advertising/ble_advertising.c
src/nrf51_sdk/ble/ble_services/ble_bas
@@ -138,132 +138,132 @@
src/nrf51_sdk/ble/common/ble_advdata.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_advdata.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/common/ble_advdata.c
src/nrf51_sdk/ble/common/ble_conn_params.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_conn_params.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/common/ble_conn_params.c
src/nrf51_sdk/ble/common/ble_conn_state.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_conn_state.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/common/ble_conn_state.c
src/nrf51_sdk/ble/common/ble_srv_common.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_srv_common.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/common/ble_srv_common.c
src/nrf51_sdk/ble/peer_manager/gatt_cache_manager.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/gatt_cache_manager.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/gatt_cache_manager.c
src/nrf51_sdk/ble/peer_manager/gatts_cache_manager.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/gatts_cache_manager.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/gatts_cache_manager.c
src/nrf51_sdk/ble/peer_manager/id_manager.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/id_manager.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/id_manager.c
src/nrf51_sdk/ble/peer_manager/peer_data.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_data.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/peer_data.c
src/nrf51_sdk/ble/peer_manager/peer_data_storage.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_data_storage.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/peer_data_storage.c
src/nrf51_sdk/ble/peer_manager/peer_id.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_id.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/peer_id.c
src/nrf51_sdk/ble/peer_manager/peer_manager.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_manager.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/peer_manager.c
src/nrf51_sdk/ble/peer_manager/pm_buffer.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/pm_buffer.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/pm_buffer.c
src/nrf51_sdk/ble/peer_manager/security_dispatcher.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/security_dispatcher.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/security_dispatcher.c
src/nrf51_sdk/ble/peer_manager/security_manager.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/security_manager.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/peer_manager/security_manager.c
src/nrf51_sdk/drivers_nrf/clock/nrf_drv_clock.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/clock/nrf_drv_clock.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/drivers_nrf/clock/nrf_drv_clock.c
src/nrf51_sdk/drivers_nrf/common/nrf_drv_common.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/common/nrf_drv_common.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/drivers_nrf/common/nrf_drv_common.c
src/nrf51_sdk/drivers_nrf/uart/nrf_drv_uart.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/uart/nrf_drv_uart.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/drivers_nrf/uart/nrf_drv_uart.c
src/nrf51_sdk/libraries/fds/fds.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fds/fds.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/fds/fds.c
src/nrf51_sdk/libraries/fifo/app_fifo.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fifo/app_fifo.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/fifo/app_fifo.c
src/nrf51_sdk/libraries/fstorage/fstorage.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fstorage/fstorage.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/fstorage/fstorage.c
src/nrf51_sdk/libraries/timer/app_timer.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/timer/app_timer.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/timer/app_timer.c
src/nrf51_sdk/libraries/uart/app_uart_fifo.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/uart/app_uart_fifo.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/uart/app_uart_fifo.c
src/nrf51_sdk/libraries/util/app_error.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_error.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/app_error.c
src/nrf51_sdk/libraries/util/app_error_weak.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_error_weak.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/app_error_weak.c
src/nrf51_sdk/libraries/util/app_util_platform.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_util_platform.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/app_util_platform.c
src/nrf51_sdk/libraries/util/sdk_mapped_flags.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/sdk_mapped_flags.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/sdk_mapped_flags.c
src/nrf51_sdk/softdevice/common/softdevice_handler
@@ -273,17 +273,17 @@
src/nrf51_sdk/ble/ble_services/ble_bas/ble_bas.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_services/ble_bas/ble_bas.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/ble_services/ble_bas/ble_bas.c
src/nrf51_sdk/ble/ble_services/ble_nus/ble_nus.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_services/ble_nus/ble_nus.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/ble_services/ble_nus/ble_nus.c
src/nrf51_sdk/softdevice/common/softdevice_handler/softdevice_handler.c
1
- PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/softdevice/common/softdevice_handler/softdevice_handler.c
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/softdevice/common/softdevice_handler/softdevice_handler.c
diff --git a/ARM/Nordic/nRF51/exemples/Uart_ble/src/main.cpp b/ARM/Nordic/nRF51/exemples/Uart_ble/src/main.cpp
index 47a2a1bc..1451f3a5 100755
--- a/ARM/Nordic/nRF51/exemples/Uart_ble/src/main.cpp
+++ b/ARM/Nordic/nRF51/exemples/Uart_ble/src/main.cpp
@@ -39,10 +39,10 @@
//#include "bsp.h"
//#include "bsp_btn_ble.h"
-#define RX_PIN_NUMBER BLUEIO_UART_RX
-#define TX_PIN_NUMBER BLUEIO_UART_TX
-#define RTS_PIN_NUMBER BLUEIO_UART_RTS
-#define CTS_PIN_NUMBER BLUEIO_UART_CTS
+#define RX_PIN_NUMBER BLUEIO_UART_RX_PIN
+#define TX_PIN_NUMBER BLUEIO_UART_TX_PIN
+#define RTS_PIN_NUMBER BLUEIO_UART_RTS_PIN
+#define CTS_PIN_NUMBER BLUEIO_UART_CTS_PIN
#define IS_SRVC_CHANGED_CHARACT_PRESENT 0 /**< Include the service_changed characteristic. If not enabled, the server's database cannot be changed for the lifetime of the device. */
diff --git a/ARM/Nordic/nRF51/exemples/dfu/.cproject b/ARM/Nordic/nRF51/exemples/dfu/.cproject
new file mode 100644
index 00000000..ae462990
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/.cproject
@@ -0,0 +1,324 @@
+
+
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diff --git a/ARM/Nordic/nRF51/exemples/dfu/.gitignore b/ARM/Nordic/nRF51/exemples/dfu/.gitignore
new file mode 100644
index 00000000..ac01e665
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/.gitignore
@@ -0,0 +1,2 @@
+/Debug/
+/Release/
diff --git a/ARM/Nordic/nRF51/exemples/dfu/.project b/ARM/Nordic/nRF51/exemples/dfu/.project
new file mode 100644
index 00000000..3d71d926
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/.project
@@ -0,0 +1,348 @@
+
+
+ dfu
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ src/nRF5_SDK_12
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/ble
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/boards
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/drivers_nrf
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/micro-ecc
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/nano-pb
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/softdevice
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/ble/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/boards/boards.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/boards/boards.c
+
+
+ src/nRF5_SDK_12/drivers_nrf/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/drivers_nrf/hal
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/drivers_nrf/rng
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/bootloader
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/crc32
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/crypto
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/ecc
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/fstorage
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/hci
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/queue
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/scheduler
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/sha256
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/timer
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/util
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/micro-ecc/micro-ecc
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/nano-pb/pb_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/external/nano-pb/pb_common.c
+
+
+ src/nRF5_SDK_12/nano-pb/pb_decode.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/external/nano-pb/pb_decode.c
+
+
+ src/nRF5_SDK_12/softdevice/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/ble/common/ble_advdata.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/common/ble_advdata.c
+
+
+ src/nRF5_SDK_12/ble/common/ble_conn_params.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/common/ble_conn_params.c
+
+
+ src/nRF5_SDK_12/ble/common/ble_srv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/ble/common/ble_srv_common.c
+
+
+ src/nRF5_SDK_12/drivers_nrf/common/nrf_drv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/drivers_nrf/common/nrf_drv_common.c
+
+
+ src/nRF5_SDK_12/drivers_nrf/hal/nrf_nvmc.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/drivers_nrf/hal/nrf_nvmc.c
+
+
+ src/nRF5_SDK_12/drivers_nrf/rng/nrf_drv_rng.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/drivers_nrf/rng/nrf_drv_rng.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/ble_dfu
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/bootloader/dfu
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/bootloader/nrf_bootloader.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/nrf_bootloader.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/nrf_bootloader_app_start.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/nrf_bootloader_app_start.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/nrf_bootloader_info.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/nrf_bootloader_info.c
+
+
+ src/nRF5_SDK_12/libraries/crc32/crc32.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/crc32/crc32.c
+
+
+ src/nRF5_SDK_12/libraries/crypto/nrf_crypto.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/crypto/nrf_crypto.c
+
+
+ src/nRF5_SDK_12/libraries/ecc/ecc.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/ecc/ecc.c
+
+
+ src/nRF5_SDK_12/libraries/fstorage/fstorage.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/fstorage/fstorage.c
+
+
+ src/nRF5_SDK_12/libraries/hci/hci_mem_pool.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/hci/hci_mem_pool.c
+
+
+ src/nRF5_SDK_12/libraries/queue/nrf_queue.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/queue/nrf_queue.c
+
+
+ src/nRF5_SDK_12/libraries/scheduler/app_scheduler.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/scheduler/app_scheduler.c
+
+
+ src/nRF5_SDK_12/libraries/sha256/sha256.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/sha256/sha256.c
+
+
+ src/nRF5_SDK_12/libraries/timer/app_timer.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/timer/app_timer.c
+
+
+ src/nRF5_SDK_12/libraries/timer/app_timer_appsh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/timer/app_timer_appsh.c
+
+
+ src/nRF5_SDK_12/libraries/util/app_error_weak.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/app_error_weak.c
+
+
+ src/nRF5_SDK_12/libraries/util/app_util_platform.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/app_util_platform.c
+
+
+ src/nRF5_SDK_12/libraries/util/nrf_assert.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/nrf_assert.c
+
+
+ src/nRF5_SDK_12/libraries/util/sdk_errors.h
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/util/sdk_errors.h
+
+
+ src/nRF5_SDK_12/micro-ecc/micro-ecc/uECC.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/external/micro-ecc/micro-ecc/uECC.c
+
+
+ src/nRF5_SDK_12/softdevice/common/softdevice_handler
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK_12/libraries/bootloader/ble_dfu/nrf_ble_dfu.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/ble_dfu/nrf_ble_dfu.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/dfu/nrf_dfu.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/dfu/nrf_dfu.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/dfu/nrf_dfu_flash.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/dfu/nrf_dfu_flash.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/dfu/nrf_dfu_mbr.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/dfu/nrf_dfu_mbr.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/dfu/nrf_dfu_settings.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/dfu/nrf_dfu_settings.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/dfu/nrf_dfu_transport.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/dfu/nrf_dfu_transport.c
+
+
+ src/nRF5_SDK_12/libraries/bootloader/dfu/nrf_dfu_utils.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/libraries/bootloader/dfu/nrf_dfu_utils.c
+
+
+ src/nRF5_SDK_12/softdevice/common/softdevice_handler/softdevice_handler.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/softdevice/common/softdevice_handler/softdevice_handler.c
+
+
+ src/nRF5_SDK_12/softdevice/common/softdevice_handler/softdevice_handler_appsh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK_12/components/softdevice/common/softdevice_handler/softdevice_handler_appsh.c
+
+
+
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.options b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.options
new file mode 100755
index 00000000..4eb1814a
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.options
@@ -0,0 +1,3 @@
+dfu.Hash.hash max_size:32
+dfu.SignedCommand.signature max_size:64
+dfu.InitCommand.sd_req max_count:4
\ No newline at end of file
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.pb.c b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.pb.c
new file mode 100755
index 00000000..7c2eb2da
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.pb.c
@@ -0,0 +1,83 @@
+/* Automatically generated nanopb constant definitions */
+/* Generated by nanopb-0.3.6-dev at Thu Jul 28 13:34:59 2016. */
+
+#include "dfu-cc.pb.h"
+
+/* @@protoc_insertion_point(includes) */
+#if PB_PROTO_HEADER_VERSION != 30
+#error Regenerate this file with the current version of nanopb generator.
+#endif
+
+const bool dfu_init_command_is_debug_default = false;
+
+
+const pb_field_t dfu_hash_fields[3] = {
+ PB_FIELD( 1, UENUM , REQUIRED, STATIC , FIRST, dfu_hash_t, hash_type, hash_type, 0),
+ PB_FIELD( 2, BYTES , REQUIRED, STATIC , OTHER, dfu_hash_t, hash, hash_type, 0),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_init_command_fields[10] = {
+ PB_FIELD( 1, UINT32 , OPTIONAL, STATIC , FIRST, dfu_init_command_t, fw_version, fw_version, 0),
+ PB_FIELD( 2, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, hw_version, fw_version, 0),
+ PB_FIELD( 3, UINT32 , REPEATED, STATIC , OTHER, dfu_init_command_t, sd_req, hw_version, 0),
+ PB_FIELD( 4, UENUM , OPTIONAL, STATIC , OTHER, dfu_init_command_t, type, sd_req, 0),
+ PB_FIELD( 5, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, sd_size, type, 0),
+ PB_FIELD( 6, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, bl_size, sd_size, 0),
+ PB_FIELD( 7, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, app_size, bl_size, 0),
+ PB_FIELD( 8, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_init_command_t, hash, app_size, &dfu_hash_fields),
+ PB_FIELD( 9, BOOL , OPTIONAL, STATIC , OTHER, dfu_init_command_t, is_debug, hash, &dfu_init_command_is_debug_default),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_reset_command_fields[2] = {
+ PB_FIELD( 1, UINT32 , REQUIRED, STATIC , FIRST, dfu_reset_command_t, timeout, timeout, 0),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_command_fields[4] = {
+ PB_FIELD( 1, UENUM , OPTIONAL, STATIC , FIRST, dfu_command_t, op_code, op_code, 0),
+ PB_FIELD( 2, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_command_t, init, op_code, &dfu_init_command_fields),
+ PB_FIELD( 3, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_command_t, reset, init, &dfu_reset_command_fields),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_signed_command_fields[4] = {
+ PB_FIELD( 1, MESSAGE , REQUIRED, STATIC , FIRST, dfu_signed_command_t, command, command, &dfu_command_fields),
+ PB_FIELD( 2, UENUM , REQUIRED, STATIC , OTHER, dfu_signed_command_t, signature_type, command, 0),
+ PB_FIELD( 3, BYTES , REQUIRED, STATIC , OTHER, dfu_signed_command_t, signature, signature_type, 0),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_packet_fields[3] = {
+ PB_FIELD( 1, MESSAGE , OPTIONAL, STATIC , FIRST, dfu_packet_t, command, command, &dfu_command_fields),
+ PB_FIELD( 2, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_packet_t, signed_command, command, &dfu_signed_command_fields),
+ PB_LAST_FIELD
+};
+
+
+/* Check that field information fits in pb_field_t */
+#if !defined(PB_FIELD_32BIT)
+/* If you get an error here, it means that you need to define PB_FIELD_32BIT
+ * compile-time option. You can do that in pb.h or on compiler command line.
+ *
+ * The reason you need to do this is that some of your messages contain tag
+ * numbers or field sizes that are larger than what can fit in 8 or 16 bit
+ * field descriptors.
+ */
+PB_STATIC_ASSERT((pb_membersize(dfu_init_command_t, hash) < 65536 && pb_membersize(dfu_command_t, init) < 65536 && pb_membersize(dfu_command_t, reset) < 65536 && pb_membersize(dfu_signed_command_t, command) < 65536 && pb_membersize(dfu_packet_t, command) < 65536 && pb_membersize(dfu_packet_t, signed_command) < 65536), YOU_MUST_DEFINE_PB_FIELD_32BIT_FOR_MESSAGES_dfu_hash_dfu_init_command_dfu_reset_command_dfu_command_dfu_signed_command_dfu_packet)
+#endif
+
+#if !defined(PB_FIELD_16BIT) && !defined(PB_FIELD_32BIT)
+/* If you get an error here, it means that you need to define PB_FIELD_16BIT
+ * compile-time option. You can do that in pb.h or on compiler command line.
+ *
+ * The reason you need to do this is that some of your messages contain tag
+ * numbers or field sizes that are larger than what can fit in the default
+ * 8 bit descriptors.
+ */
+PB_STATIC_ASSERT((pb_membersize(dfu_init_command_t, hash) < 256 && pb_membersize(dfu_command_t, init) < 256 && pb_membersize(dfu_command_t, reset) < 256 && pb_membersize(dfu_signed_command_t, command) < 256 && pb_membersize(dfu_packet_t, command) < 256 && pb_membersize(dfu_packet_t, signed_command) < 256), YOU_MUST_DEFINE_PB_FIELD_16BIT_FOR_MESSAGES_dfu_hash_dfu_init_command_dfu_reset_command_dfu_command_dfu_signed_command_dfu_packet)
+#endif
+
+
+/* @@protoc_insertion_point(eof) */
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.pb.h b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.pb.h
new file mode 100755
index 00000000..d089142e
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.pb.h
@@ -0,0 +1,188 @@
+/* Automatically generated nanopb header */
+/* Generated by nanopb-0.3.6-dev at Thu Jul 28 13:34:59 2016. */
+
+#ifndef PB_DFU_CC_PB_H_INCLUDED
+#define PB_DFU_CC_PB_H_INCLUDED
+#include
+
+/* @@protoc_insertion_point(includes) */
+#if PB_PROTO_HEADER_VERSION != 30
+#error Regenerate this file with the current version of nanopb generator.
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Enum definitions */
+typedef enum
+{
+ DFU_OP_CODE_RESET = 0,
+ DFU_OP_CODE_INIT = 1
+} dfu_op_code_t;
+#define DFU_OP_CODE_MIN DFU_OP_CODE_RESET
+#define DFU_OP_CODE_MAX DFU_OP_CODE_INIT
+#define DFU_OP_CODE_ARRAYSIZE ((dfu_op_code_t)(DFU_OP_CODE_INIT+1))
+
+typedef enum
+{
+ DFU_FW_TYPE_APPLICATION = 0,
+ DFU_FW_TYPE_SOFTDEVICE = 1,
+ DFU_FW_TYPE_BOOTLOADER = 2,
+ DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER = 3
+} dfu_fw_type_t;
+#define DFU_FW_TYPE_MIN DFU_FW_TYPE_APPLICATION
+#define DFU_FW_TYPE_MAX DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER
+#define DFU_FW_TYPE_ARRAYSIZE ((dfu_fw_type_t)(DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER+1))
+
+typedef enum
+{
+ DFU_HASH_TYPE_NO_HASH = 0,
+ DFU_HASH_TYPE_CRC = 1,
+ DFU_HASH_TYPE_SHA128 = 2,
+ DFU_HASH_TYPE_SHA256 = 3,
+ DFU_HASH_TYPE_SHA512 = 4
+} dfu_hash_type_t;
+#define DFU_HASH_TYPE_MIN DFU_HASH_TYPE_NO_HASH
+#define DFU_HASH_TYPE_MAX DFU_HASH_TYPE_SHA512
+#define DFU_HASH_TYPE_ARRAYSIZE ((dfu_hash_type_t)(DFU_HASH_TYPE_SHA512+1))
+
+typedef enum
+{
+ DFU_SIGNATURE_TYPE_ECDSA_P256_SHA256 = 0,
+ DFU_SIGNATURE_TYPE_ED25519 = 1
+} dfu_signature_type_t;
+#define DFU_SIGNATURE_TYPE_MIN DFU_SIGNATURE_TYPE_ECDSA_P256_SHA256
+#define DFU_SIGNATURE_TYPE_MAX DFU_SIGNATURE_TYPE_ED25519
+#define DFU_SIGNATURE_TYPE_ARRAYSIZE ((dfu_signature_type_t)(DFU_SIGNATURE_TYPE_ED25519+1))
+
+/* Struct definitions */
+typedef PB_BYTES_ARRAY_T(32) dfu_hash_hash_t;
+typedef struct {
+ dfu_hash_type_t hash_type;
+ dfu_hash_hash_t hash;
+/* @@protoc_insertion_point(struct:dfu_hash_t) */
+} dfu_hash_t;
+
+typedef struct {
+ uint32_t timeout;
+/* @@protoc_insertion_point(struct:dfu_reset_command_t) */
+} dfu_reset_command_t;
+
+typedef struct {
+ bool has_fw_version;
+ uint32_t fw_version;
+ bool has_hw_version;
+ uint32_t hw_version;
+ pb_size_t sd_req_count;
+ uint32_t sd_req[4];
+ bool has_type;
+ dfu_fw_type_t type;
+ bool has_sd_size;
+ uint32_t sd_size;
+ bool has_bl_size;
+ uint32_t bl_size;
+ bool has_app_size;
+ uint32_t app_size;
+ bool has_hash;
+ dfu_hash_t hash;
+ bool has_is_debug;
+ bool is_debug;
+/* @@protoc_insertion_point(struct:dfu_init_command_t) */
+} dfu_init_command_t;
+
+typedef struct {
+ bool has_op_code;
+ dfu_op_code_t op_code;
+ bool has_init;
+ dfu_init_command_t init;
+ bool has_reset;
+ dfu_reset_command_t reset;
+/* @@protoc_insertion_point(struct:dfu_command_t) */
+} dfu_command_t;
+
+typedef PB_BYTES_ARRAY_T(64) dfu_signed_command_signature_t;
+typedef struct {
+ dfu_command_t command;
+ dfu_signature_type_t signature_type;
+ dfu_signed_command_signature_t signature;
+/* @@protoc_insertion_point(struct:dfu_signed_command_t) */
+} dfu_signed_command_t;
+
+typedef struct {
+ bool has_command;
+ dfu_command_t command;
+ bool has_signed_command;
+ dfu_signed_command_t signed_command;
+/* @@protoc_insertion_point(struct:dfu_packet_t) */
+} dfu_packet_t;
+
+/* Default values for struct fields */
+extern const bool dfu_init_command_is_debug_default;
+
+/* Initializer values for message structs */
+#define DFU_HASH_INIT_DEFAULT {(dfu_hash_type_t)0, {0, {0}}}
+#define DFU_INIT_COMMAND_INIT_DEFAULT {false, 0, false, 0, 0, {0, 0, 0, 0}, false, (dfu_fw_type_t)0, false, 0, false, 0, false, 0, false, DFU_HASH_INIT_DEFAULT, false, false}
+#define DFU_RESET_COMMAND_INIT_DEFAULT {0}
+#define DFU_COMMAND_INIT_DEFAULT {false, (dfu_op_code_t)0, false, DFU_INIT_COMMAND_INIT_DEFAULT, false, DFU_RESET_COMMAND_INIT_DEFAULT}
+#define DFU_SIGNED_COMMAND_INIT_DEFAULT {DFU_COMMAND_INIT_DEFAULT, (dfu_signature_type_t)0, {0, {0}}}
+#define DFU_PACKET_INIT_DEFAULT {false, DFU_COMMAND_INIT_DEFAULT, false, DFU_SIGNED_COMMAND_INIT_DEFAULT}
+#define DFU_HASH_INIT_ZERO {(dfu_hash_type_t)0, {0, {0}}}
+#define DFU_INIT_COMMAND_INIT_ZERO {false, 0, false, 0, 0, {0, 0, 0, 0}, false, (dfu_fw_type_t)0, false, 0, false, 0, false, 0, false, DFU_HASH_INIT_ZERO, false, 0}
+#define DFU_RESET_COMMAND_INIT_ZERO {0}
+#define DFU_COMMAND_INIT_ZERO {false, (dfu_op_code_t)0, false, DFU_INIT_COMMAND_INIT_ZERO, false, DFU_RESET_COMMAND_INIT_ZERO}
+#define DFU_SIGNED_COMMAND_INIT_ZERO {DFU_COMMAND_INIT_ZERO, (dfu_signature_type_t)0, {0, {0}}}
+#define DFU_PACKET_INIT_ZERO {false, DFU_COMMAND_INIT_ZERO, false, DFU_SIGNED_COMMAND_INIT_ZERO}
+
+/* Field tags (for use in manual encoding/decoding) */
+#define DFU_HASH_HASH_TYPE_TAG 1
+#define DFU_HASH_HASH_TAG 2
+#define DFU_RESET_COMMAND_TIMEOUT_TAG 1
+#define DFU_INIT_COMMAND_FW_VERSION_TAG 1
+#define DFU_INIT_COMMAND_HW_VERSION_TAG 2
+#define DFU_INIT_COMMAND_SD_REQ_TAG 3
+#define DFU_INIT_COMMAND_TYPE_TAG 4
+#define DFU_INIT_COMMAND_SD_SIZE_TAG 5
+#define DFU_INIT_COMMAND_BL_SIZE_TAG 6
+#define DFU_INIT_COMMAND_APP_SIZE_TAG 7
+#define DFU_INIT_COMMAND_HASH_TAG 8
+#define DFU_INIT_COMMAND_IS_DEBUG_TAG 9
+#define DFU_COMMAND_OP_CODE_TAG 1
+#define DFU_COMMAND_INIT_TAG 2
+#define DFU_COMMAND_RESET_TAG 3
+#define DFU_SIGNED_COMMAND_COMMAND_TAG 1
+#define DFU_SIGNED_COMMAND_SIGNATURE_TYPE_TAG 2
+#define DFU_SIGNED_COMMAND_SIGNATURE_TAG 3
+#define DFU_PACKET_COMMAND_TAG 1
+#define DFU_PACKET_SIGNED_COMMAND_TAG 2
+
+/* Struct field encoding specification for nanopb */
+extern const pb_field_t dfu_hash_fields[3];
+extern const pb_field_t dfu_init_command_fields[10];
+extern const pb_field_t dfu_reset_command_fields[2];
+extern const pb_field_t dfu_command_fields[4];
+extern const pb_field_t dfu_signed_command_fields[4];
+extern const pb_field_t dfu_packet_fields[3];
+
+/* Maximum encoded size of messages (where known) */
+#define DFU_HASH_SIZE 36
+#define DFU_INIT_COMMAND_SIZE 96
+#define DFU_RESET_COMMAND_SIZE 6
+#define DFU_COMMAND_SIZE 108
+#define DFU_SIGNED_COMMAND_SIZE 178
+#define DFU_PACKET_SIZE 291
+
+/* Message IDs (where set with "msgid" option) */
+#ifdef PB_MSGID
+
+#define DFU_CC_MESSAGES \
+
+
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+/* @@protoc_insertion_point(eof) */
+
+#endif
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.proto b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.proto
new file mode 100755
index 00000000..5130fdfe
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/dfu-cc.proto
@@ -0,0 +1,76 @@
+package dfu;
+
+// Version 0.1
+
+// Definition of enums and types
+enum OpCode {
+ RESET = 0;
+ INIT = 1;
+}
+
+enum FwType {
+ APPLICATION = 0; // default, compatible with proto3
+ SOFTDEVICE = 1;
+ BOOTLOADER = 2;
+ SOFTDEVICE_BOOTLOADER = 3;
+}
+
+enum HashType {
+ NO_HASH = 0;
+ CRC = 1;
+ SHA128 = 2;
+ SHA256 = 3;
+ SHA512 = 4;
+}
+
+message Hash
+{
+ required HashType hash_type = 1;
+ required bytes hash = 2;
+}
+
+// Commands data
+message InitCommand {
+ optional uint32 fw_version = 1;
+ optional uint32 hw_version = 2;
+ repeated uint32 sd_req = 3 [packed = true]; // packed option is default in proto3
+ optional FwType type = 4;
+
+ optional uint32 sd_size = 5;
+ optional uint32 bl_size = 6;
+ optional uint32 app_size = 7;
+
+ optional Hash hash = 8;
+
+ optional bool is_debug = 9 [default = false];
+}
+
+message ResetCommand
+{
+ required uint32 timeout = 1;
+}
+
+// Command type
+message Command {
+ optional OpCode op_code = 1;
+ optional InitCommand init = 2;
+ optional ResetCommand reset = 3;
+}
+
+// Signed command types
+enum SignatureType {
+ ECDSA_P256_SHA256 = 0;
+ ED25519 = 1;
+}
+
+message SignedCommand {
+ required Command command = 1;
+ required SignatureType signature_type = 2;
+ required bytes signature = 3;
+}
+
+// Parent packet type
+message Packet {
+ optional Command command = 1;
+ optional SignedCommand signed_command = 2;
+}
\ No newline at end of file
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/dfu_public_key.c b/ARM/Nordic/nRF51/exemples/dfu/src/dfu_public_key.c
new file mode 100755
index 00000000..02fb1511
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/dfu_public_key.c
@@ -0,0 +1,27 @@
+
+/* This file was automatically generated by nrfutil on 2016-11-28 (YY-MM-DD) at 21:41:16 */
+
+#include "stdint.h"
+#include "compiler_abstraction.h"
+
+/* This file was generated with a throwaway private key, that is only inteded for a debug version of the DFU project.
+ Please see https://github.com/NordicSemiconductor/pc-nrfutil/blob/master/README.md to generate a valid public key. */
+
+#ifdef NRF_DFU_DEBUG_VERSION
+
+/** @brief Public key used to verify DFU images */
+__ALIGN(4) const uint8_t pk[64] =
+{
+ 0x9a, 0x58, 0xc0, 0xff, 0xeb, 0x7f, 0x4b, 0x89, 0x41, 0xc2, 0x05, 0xfc, 0x9c, 0xca, 0x3e, 0xe5, 0x66, 0x4f, 0xf8, 0x80, 0x1b, 0xe9, 0x56, 0x1d, 0xa3, 0x72, 0x82, 0x55, 0xb7, 0x4f, 0x47, 0xd0,
+ 0x24, 0x3c, 0x0d, 0x82, 0xa3, 0x44, 0x16, 0x94, 0xb8, 0x98, 0x5c, 0xc8, 0x35, 0x8c, 0x73, 0x6c, 0x39, 0x0f, 0x7f, 0x69, 0x40, 0xc0, 0x25, 0x3a, 0xb1, 0xf3, 0x9f, 0x2a, 0x0e, 0x10, 0x95, 0x13
+};
+
+#else
+//#error "Debug public key not valid for production. Please see https://github.com/NordicSemiconductor/pc-nrfutil/blob/master/README.md to generate it"
+__ALIGN(4) const uint8_t pk[64] =
+{
+ 0x9a, 0x58, 0xc0, 0xff, 0xeb, 0x7f, 0x4b, 0x89, 0x41, 0xc2, 0x05, 0xfc, 0x9c, 0xca, 0x3e, 0xe5, 0x66, 0x4f, 0xf8, 0x80, 0x1b, 0xe9, 0x56, 0x1d, 0xa3, 0x72, 0x82, 0x55, 0xb7, 0x4f, 0x47, 0xd0,
+ 0x24, 0x3c, 0x0d, 0x82, 0xa3, 0x44, 0x16, 0x94, 0xb8, 0x98, 0x5c, 0xc8, 0x35, 0x8c, 0x73, 0x6c, 0x39, 0x0f, 0x7f, 0x69, 0x40, 0xc0, 0x25, 0x3a, 0xb1, 0xf3, 0x9f, 0x2a, 0x0e, 0x10, 0x95, 0x13
+};
+#endif
+
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/dfu_req_handling.c b/ARM/Nordic/nRF51/exemples/dfu/src/dfu_req_handling.c
new file mode 100755
index 00000000..63a312a7
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/dfu_req_handling.c
@@ -0,0 +1,1046 @@
+/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+#include "nrf_dfu_req_handler.h"
+
+#include
+#include
+#include "dfu_req_handling.h"
+#include "nrf_dfu.h"
+#include "nrf_dfu_types.h"
+#include "nrf_dfu_settings.h"
+#include "nrf_dfu_transport.h"
+#include "nrf_dfu_utils.h"
+#include "nrf_dfu_flash.h"
+#include "nrf_ble_dfu.h"
+#include "nrf_bootloader_info.h"
+#include "pb.h"
+#include "pb_common.h"
+#include "pb_decode.h"
+#include "dfu-cc.pb.h"
+#include "crc32.h"
+#include "nrf_log.h"
+#include "app_util.h"
+#include "nrf_sdm.h"
+#include "sdk_macros.h"
+#include "nrf_crypto.h"
+
+STATIC_ASSERT(DFU_SIGNED_COMMAND_SIZE <= INIT_COMMAND_MAX_SIZE);
+
+
+/** @brief Macro for the hardware version of the kit used for requirement-match
+ *
+ * @note If not set, this will default to 51 or 52 according to the architecture
+ */
+#if defined ( NRF51 ) && !defined(NRF_DFU_HW_VERSION)
+ #define NRF_DFU_HW_VERSION (51)
+#elif defined ( NRF52 ) && !defined(NRF_DFU_HW_VERSION)
+ #define NRF_DFU_HW_VERSION (52)
+#else
+ #error No target set for HW version.
+#endif
+
+/** @brief Cyclic buffers for storing data that is to be written to flash.
+ * This is because the RAM copy must be kept alive until copying is
+ * done and the DFU process must be able to progress while waiting for flash.
+ *
+ */
+#define FLASH_BUFFER_CHUNK_LENGTH 256 //< Length of a flash buffer chunk. must be a power of 4.
+#define FLASH_BUFFER_CHUNK_COUNT 4 //< Number of flash buffer chunks. Must be a power of 2.
+#define FLASH_BUFFER_SWAP() do \
+ {m_current_data_buffer = (m_current_data_buffer + 1) & 0x03; m_data_buf_pos = 0;} \
+ while (0)
+
+__ALIGN(4) static uint8_t m_data_buf[FLASH_BUFFER_CHUNK_COUNT][FLASH_BUFFER_CHUNK_LENGTH];
+
+static uint16_t m_data_buf_pos; /**< The number of bytes written in the current buffer. */
+static uint8_t m_current_data_buffer; /**< Index of the current data buffer. Must be between 0 and FLASH_BUFFER_CHUNK_COUNT - 1. */
+static uint32_t m_flash_operations_pending; /**< A counter holding the number of pending flash operations. This will prevent flooding of the buffers. */
+
+static uint32_t m_firmware_start_addr; /**< Start address of the current firmware image. */
+static uint32_t m_firmware_size_req; /**< The size of the entire firmware image. Defined by the init command. */
+
+static bool m_valid_init_packet_present; /**< Global variable holding the current flags indicating the state of the DFU process. */
+
+
+
+
+static const nrf_crypto_key_t crypto_key_pk =
+{
+ .p_le_data = (uint8_t *) pk,
+ .len = sizeof(pk)
+};
+
+static nrf_crypto_key_t crypto_sig;
+__ALIGN(4) static uint8_t hash[32];
+static nrf_crypto_key_t hash_data;
+
+__ALIGN(4) static uint8_t sig[64];
+
+dfu_hash_type_t m_image_hash_type;
+
+static dfu_packet_t packet = DFU_PACKET_INIT_DEFAULT;
+
+static pb_istream_t stream;
+
+
+static void on_dfu_complete(fs_evt_t const * const evt, fs_ret_t result)
+{
+ NRF_LOG_INFO("Resetting device. \r\n");
+ (void)nrf_dfu_transports_close();
+ NVIC_SystemReset();
+ return;
+}
+
+
+static void dfu_data_write_handler(fs_evt_t const * const evt, fs_ret_t result)
+{
+ --m_flash_operations_pending;
+}
+
+
+static void pb_decoding_callback(pb_istream_t *str, uint32_t tag, pb_wire_type_t wire_type, void *iter)
+{
+ pb_field_iter_t* p_iter = (pb_field_iter_t *) iter;
+
+ // match the beginning of the init command
+ if(p_iter->pos->ptr == &dfu_init_command_fields[0])
+ {
+ uint8_t *ptr = (uint8_t *) str->state;
+ uint32_t size = str->bytes_left;
+
+ // remove tag byte
+ ptr++;
+ size--;
+
+ // store the info in hash_data
+ hash_data.p_le_data = ptr;
+ hash_data.len = size;
+
+ NRF_LOG_INFO("PB: Init data len: %d\r\n", hash_data.len);
+ }
+}
+
+
+static nrf_dfu_res_code_t dfu_handle_prevalidate(dfu_signed_command_t const * p_command, pb_istream_t * p_stream, uint8_t * p_init_cmd, uint32_t init_cmd_len)
+{
+ dfu_init_command_t const * p_init = &p_command->command.init;
+ uint32_t err_code;
+ uint32_t hw_version = NRF_DFU_HW_VERSION;
+ uint32_t fw_version = 0;
+
+ // check for init command found during decoding
+ if(!p_init_cmd || !init_cmd_len)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+#ifndef NRF_DFU_DEBUG_VERSION
+ if(p_init->has_is_debug && p_init->is_debug == true)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+#endif
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ if (p_init->has_is_debug == false || p_init->is_debug == false)
+ {
+#endif
+ if (p_init->has_hw_version == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Check of init command HW version
+ if(p_init->hw_version != hw_version)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Precheck the SoftDevice version
+ bool found_sd_ver = false;
+ for(int i = 0; i < p_init->sd_req_count; i++)
+ {
+ if (p_init->sd_req[i] == SD_FWID_GET(MBR_SIZE))
+ {
+ found_sd_ver = true;
+ break;
+ }
+ }
+ if (!found_sd_ver)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Get the fw version
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ if (p_init->has_fw_version == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ // Get the application FW version
+ fw_version = s_dfu_settings.app_version;
+ break;
+
+ case DFU_FW_TYPE_SOFTDEVICE:
+ // not loaded
+ break;
+
+ case DFU_FW_TYPE_BOOTLOADER: // fall through
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ if (p_init->has_fw_version == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ fw_version = s_dfu_settings.bootloader_version;
+ break;
+
+ default:
+ NRF_LOG_INFO("Unknown FW update type\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ NRF_LOG_INFO("Req version: %d, Present: %d\r\n", p_init->fw_version, fw_version);
+
+ // Check of init command FW version
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ if (p_init->fw_version < fw_version)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ break;
+
+ case DFU_FW_TYPE_BOOTLOADER: // fall through
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ // updating the bootloader is stricter. There must be an increase in version number
+ if (p_init->fw_version <= fw_version)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ break;
+
+ default:
+ // do not care about fw_version in the case of a softdevice transfer
+ break;
+ }
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ }
+#endif
+
+ // Check the signature
+ switch (p_command->signature_type)
+ {
+ case DFU_SIGNATURE_TYPE_ECDSA_P256_SHA256:
+ {
+ // prepare the actual hash destination.
+ hash_data.p_le_data = &hash[0];
+ hash_data.len = sizeof(hash);
+
+ NRF_LOG_INFO("Init command:\r\n");
+ NRF_LOG_HEXDUMP_INFO(&s_dfu_settings.init_command[0], s_dfu_settings.progress.command_size);
+ NRF_LOG_INFO("\r\n");
+
+ NRF_LOG_INFO("p_Init command:\r\n");
+ NRF_LOG_HEXDUMP_INFO(&p_init_cmd[0], init_cmd_len);
+ NRF_LOG_INFO("\r\n");
+
+ err_code = nrf_crypto_hash_compute(NRF_CRYPTO_HASH_ALG_SHA256, p_init_cmd, init_cmd_len, &hash_data);
+ if (err_code != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // prepare the signature received over the air.
+ memcpy(&sig[0], p_command->signature.bytes, p_command->signature.size);
+
+ NRF_LOG_INFO("Signature\r\n");
+ NRF_LOG_HEXDUMP_INFO(&p_command->signature.bytes[0], p_command->signature.size);
+ NRF_LOG_INFO("\r\n");
+
+ crypto_sig.p_le_data = sig;
+ crypto_sig.len = p_command->signature.size;
+
+ NRF_LOG_INFO("signature len: %d\r\n", p_command->signature.size);
+
+ // calculate the signature
+ err_code = nrf_crypto_verify(NRF_CRYPTO_CURVE_SECP256R1, &crypto_key_pk, &hash_data, &crypto_sig);
+ if (err_code != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ NRF_LOG_INFO("Image verified\r\n");
+ }
+ break;
+
+ default:
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Get the update size
+ m_firmware_size_req = 0;
+
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ if (p_init->has_app_size == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->app_size;
+ break;
+
+ case DFU_FW_TYPE_BOOTLOADER:
+ if (p_init->has_bl_size == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->bl_size;
+ // check that the size of the bootloader is not larger than the present one.
+#if defined ( NRF51 )
+ if (p_init->bl_size > BOOTLOADER_SETTINGS_ADDRESS - BOOTLOADER_START_ADDR)
+#elif defined ( NRF52 )
+ if (p_init->bl_size > NRF_MBR_PARAMS_PAGE_ADDRESS - BOOTLOADER_START_ADDR)
+#endif
+ {
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+ break;
+
+ case DFU_FW_TYPE_SOFTDEVICE:
+ if (p_init->has_sd_size == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->sd_size;
+ break;
+
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ if (p_init->has_bl_size == false || p_init->has_sd_size == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->sd_size + p_init->bl_size;
+ if (p_init->sd_size == 0 || p_init->bl_size == 0)
+ {
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // check that the size of the bootloader is not larger than the present one.
+#if defined ( NRF51 )
+ if (p_init->bl_size > BOOTLOADER_SETTINGS_ADDRESS - BOOTLOADER_START_ADDR)
+#elif defined ( NRF52 )
+ if (p_init->bl_size > NRF_MBR_PARAMS_PAGE_ADDRESS - BOOTLOADER_START_ADDR)
+#endif
+ {
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+ break;
+
+ default:
+ NRF_LOG_INFO("Unknown FW update type\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // SHA256 is the only supported hash
+ memcpy(&hash[0], &p_init->hash.hash.bytes[0], 32);
+
+ // Instead of checking each type with has-check, check the result of the size_req to
+ // Validate its content.
+ if (m_firmware_size_req == 0)
+ {
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // Find the location to place the DFU updates
+ err_code = nrf_dfu_find_cache(m_firmware_size_req, false, &m_firmware_start_addr);
+ if (err_code != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ NRF_LOG_INFO("Write address set to 0x%08x\r\n", m_firmware_start_addr);
+
+ NRF_LOG_INFO("DFU prevalidate SUCCESSFUL!\r\n");
+
+ return NRF_DFU_RES_CODE_SUCCESS;
+}
+
+
+/** @brief Function for validating the received image after all objects have been received and executed.
+ *
+ */
+static nrf_dfu_res_code_t nrf_dfu_postvalidate(dfu_init_command_t * p_init)
+{
+ uint32_t err_code;
+ nrf_dfu_res_code_t res_code = NRF_DFU_RES_CODE_SUCCESS;
+ nrf_dfu_bank_t * p_bank;
+
+ switch (p_init->hash.hash_type)
+ {
+ case DFU_HASH_TYPE_SHA256:
+ hash_data.p_le_data = &hash[0];
+ hash_data.len = sizeof(hash);
+ err_code = nrf_crypto_hash_compute(NRF_CRYPTO_HASH_ALG_SHA256, (uint8_t*)m_firmware_start_addr, m_firmware_size_req, &hash_data);
+ if (err_code != NRF_SUCCESS)
+ {
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ if (memcmp(&hash_data.p_le_data[0], &p_init->hash.hash.bytes[0], 32) != 0)
+ {
+ NRF_LOG_INFO("Hash failure\r\n");
+
+ res_code = NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+ break;
+
+ default:
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ break;
+ }
+
+ if (s_dfu_settings.bank_current == NRF_DFU_CURRENT_BANK_0)
+ {
+ NRF_LOG_INFO("Current bank is bank 0\r\n");
+ p_bank = &s_dfu_settings.bank_0;
+ }
+ else if (s_dfu_settings.bank_current == NRF_DFU_CURRENT_BANK_1)
+ {
+ NRF_LOG_INFO("Current bank is bank 1\r\n");
+ p_bank = &s_dfu_settings.bank_1;
+ }
+ else
+ {
+ NRF_LOG_INFO("Internal error, invalid current bank\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ if (res_code == NRF_DFU_RES_CODE_SUCCESS)
+ {
+ NRF_LOG_INFO("Successfully run the postvalidation check!\r\n");
+
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_APP;
+ break;
+ case DFU_FW_TYPE_SOFTDEVICE:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_SD;
+ s_dfu_settings.sd_size = p_init->sd_size;
+ break;
+ case DFU_FW_TYPE_BOOTLOADER:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_BL;
+ break;
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_SD_BL;
+ s_dfu_settings.sd_size = p_init->sd_size;
+ break;
+ default:
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ break;
+ }
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ if (p_init->has_is_debug == false || p_init->is_debug == false)
+ {
+#endif
+
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ s_dfu_settings.app_version = p_init->fw_version;
+ break;
+ case DFU_FW_TYPE_BOOTLOADER:
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ s_dfu_settings.bootloader_version = p_init->fw_version;
+ break;
+ default:
+ // no implementation
+ break;
+ }
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ }
+#endif
+ // Calculate CRC32 for image
+ p_bank->image_crc = s_dfu_settings.progress.firmware_image_crc;
+ p_bank->image_size = m_firmware_size_req;
+ }
+ else
+ {
+ p_bank->bank_code = NRF_DFU_BANK_INVALID;
+
+ // Calculate CRC32 for image
+ p_bank->image_crc = 0;
+ p_bank->image_size = 0;
+ }
+
+ // Set the progress to zero and remove the last command
+ memset(&s_dfu_settings.progress, 0, sizeof(dfu_progress_t));
+ memset(s_dfu_settings.init_command, 0xFF, DFU_SIGNED_COMMAND_SIZE);
+ s_dfu_settings.write_offset = 0;
+
+ // Store the settings to flash and reset after that
+ if( nrf_dfu_settings_write(on_dfu_complete) != NRF_SUCCESS)
+ {
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ return res_code;
+}
+
+
+/** @brief Function to handle signed command
+ *
+ * @param[in] p_command Signed
+ */
+static nrf_dfu_res_code_t dfu_handle_signed_command(dfu_signed_command_t const * p_command, pb_istream_t * p_stream)
+{
+ nrf_dfu_res_code_t ret_val = NRF_DFU_RES_CODE_SUCCESS;
+
+ // Currently only init-packet is signed
+ if (p_command->command.has_init != true)
+ {
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ ret_val = dfu_handle_prevalidate(p_command, p_stream, hash_data.p_le_data, hash_data.len);
+ if(ret_val == NRF_DFU_RES_CODE_SUCCESS)
+ {
+ NRF_LOG_INFO("Prevalidate OK.\r\n");
+
+ // This saves the init command to flash
+ NRF_LOG_INFO("Saving init command...\r\n");
+ if (nrf_dfu_settings_write(NULL) != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ }
+ else
+ {
+ NRF_LOG_INFO("Prevalidate FAILED!\r\n");
+ }
+ return ret_val;
+}
+
+
+static nrf_dfu_res_code_t dfu_handle_command(dfu_command_t const * p_command)
+{
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+}
+
+
+static uint32_t dfu_decode_commmand(void)
+{
+ stream = pb_istream_from_buffer(s_dfu_settings.init_command, s_dfu_settings.progress.command_size);
+
+ // Attach our callback to follow the field decoding
+ stream.decoding_callback = pb_decoding_callback;
+ // reset the variable where the init pointer and length will be stored.
+ hash_data.p_le_data = NULL;
+ hash_data.len = 0;
+
+ if (!pb_decode(&stream, dfu_packet_fields, &packet))
+ {
+ NRF_LOG_INFO("Handler: Invalid protocol buffer stream\r\n");
+ return 0;
+ }
+
+ return 1;
+}
+
+
+/** @brief Function handling command requests from the transport layer.
+ *
+ * @param p_context[in,out] Pointer to structure holding context-specific data
+ * @param p_req[in] Pointer to the structure holding the DFU request.
+ * @param p_res[out] Pointer to the structure holding the DFU response.
+ *
+ * @retval NRF_SUCCESS If the command request was executed successfully.
+ * Any other error code indicates that the data request
+ * could not be handled.
+ */
+static nrf_dfu_res_code_t nrf_dfu_command_req(void * p_context, nrf_dfu_req_t * p_req, nrf_dfu_res_t * p_res)
+{
+ nrf_dfu_res_code_t ret_val = NRF_DFU_RES_CODE_SUCCESS;
+
+ switch (p_req->req_type)
+ {
+ case NRF_DFU_OBJECT_OP_CREATE:
+ NRF_LOG_INFO("Before OP create command\r\n");
+ if(p_req->object_size == 0)
+ {
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ if (p_req->object_size > INIT_COMMAND_MAX_SIZE)
+ {
+ // It is impossible to handle the command because the size is too large
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ NRF_LOG_INFO("Valid Command Create\r\n");
+
+ // Setting DFU to uninitialized.
+ m_valid_init_packet_present = false;
+
+ // Reset all progress to zero.
+ memset(&s_dfu_settings.progress, 0, sizeof(dfu_progress_t));
+ s_dfu_settings.write_offset = 0;
+
+ // Set the init command size.
+ s_dfu_settings.progress.command_size = p_req->object_size;
+ break;
+
+ case NRF_DFU_OBJECT_OP_CRC:
+ NRF_LOG_INFO("Valid Command CRC\r\n");
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->crc = s_dfu_settings.progress.command_crc;
+ break;
+
+ case NRF_DFU_OBJECT_OP_WRITE:
+ NRF_LOG_INFO("Before OP write command\r\n");
+
+ if ((p_req->req_len + s_dfu_settings.progress.command_offset) > s_dfu_settings.progress.command_size)
+
+ {
+ // Too large for the command that was requested
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->crc = s_dfu_settings.progress.command_crc;
+ NRF_LOG_INFO("Error. Init command larger than expected. \r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // Copy the received data to RAM, updating offset and calculating CRC.
+ memcpy(&s_dfu_settings.init_command[s_dfu_settings.progress.command_offset], p_req->p_req, p_req->req_len);
+ s_dfu_settings.progress.command_offset += p_req->req_len;
+ s_dfu_settings.progress.command_crc = crc32_compute(p_req->p_req, p_req->req_len, &s_dfu_settings.progress.command_crc);
+
+ // Set output values.
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->crc = s_dfu_settings.progress.command_crc;
+
+ break;
+
+ case NRF_DFU_OBJECT_OP_EXECUTE:
+ NRF_LOG_INFO("Before OP execute command\r\n");
+ if (s_dfu_settings.progress.command_offset != s_dfu_settings.progress.command_size)
+ {
+ // The object wasn't the right (requested) size
+ NRF_LOG_INFO("Execute with faulty offset\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ NRF_LOG_INFO("Valid command execute\r\n");
+
+ if (m_valid_init_packet_present)
+ {
+ // Init command already executed
+ return NRF_DFU_RES_CODE_SUCCESS;
+ }
+
+ NRF_LOG_HEXDUMP_INFO(&s_dfu_settings.init_command[0], s_dfu_settings.progress.command_size);
+
+ NRF_LOG_INFO("\r\n");
+
+ if (dfu_decode_commmand() != true)
+ {
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ // We have a valid DFU packet
+ if (packet.has_signed_command)
+ {
+ NRF_LOG_INFO("Handling signed command\r\n");
+ ret_val = dfu_handle_signed_command(&packet.signed_command, &stream);
+ }
+ else if (packet.has_command)
+ {
+ NRF_LOG_INFO("Handling unsigned command\r\n");
+ ret_val = dfu_handle_command(&packet.command);
+ }
+ else
+ {
+ // We had no regular or signed command.
+ NRF_LOG_INFO("Decoded command but it has no content!!\r\n");
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ if (ret_val == NRF_DFU_RES_CODE_SUCCESS)
+ {
+ // Setting DFU to initialized
+ NRF_LOG_INFO("Setting DFU flag to initialized\r\n");
+ m_valid_init_packet_present = true;
+ }
+ break;
+
+ case NRF_DFU_OBJECT_OP_SELECT:
+ NRF_LOG_INFO("Valid Command: NRF_DFU_OBJECT_OP_SELECT\r\n");
+ p_res->crc = s_dfu_settings.progress.command_crc;
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->max_size = INIT_COMMAND_MAX_SIZE;
+ break;
+
+ default:
+ NRF_LOG_INFO("Invalid Command Operation\r\n");
+ ret_val = NRF_DFU_RES_CODE_OP_CODE_NOT_SUPPORTED;
+ break;
+ }
+
+ return ret_val;
+}
+
+
+static nrf_dfu_res_code_t nrf_dfu_data_req(void * p_context, nrf_dfu_req_t * p_req, nrf_dfu_res_t * p_res)
+{
+ uint32_t const * p_write_addr;
+ nrf_dfu_res_code_t ret_val = NRF_DFU_RES_CODE_SUCCESS;
+
+#ifndef NRF51
+ if(p_req == NULL)
+ {
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+#endif
+
+ switch (p_req->req_type)
+ {
+ case NRF_DFU_OBJECT_OP_CREATE:
+ NRF_LOG_INFO("Before OP create\r\n");
+
+ if (p_req->object_size == 0)
+ {
+ // Empty object is not possible
+ //NRF_LOG_INFO("Trying to create data object of size 0\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ if ( (p_req->object_size & (CODE_PAGE_SIZE - 1)) != 0 &&
+ (s_dfu_settings.progress.firmware_image_offset_last + p_req->object_size != m_firmware_size_req) )
+ {
+ NRF_LOG_ERROR("Trying to create an object with a size that is not page aligned\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ if (p_req->object_size > DATA_OBJECT_MAX_SIZE)
+ {
+ // It is impossible to handle the command because the size is too large
+ NRF_LOG_INFO("Invalid size for object (too large)\r\n");
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ if (m_valid_init_packet_present == false)
+ {
+ // Can't accept data because DFU isn't initialized by init command.
+ NRF_LOG_INFO("Trying to create data object without valid init command\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ if ((s_dfu_settings.progress.firmware_image_offset_last + p_req->object_size) > m_firmware_size_req)
+ {
+ NRF_LOG_INFO("Trying to create an object of size %d, when offset is 0x%08x and firmware size is 0x%08x\r\n", p_req->object_size, s_dfu_settings.progress.firmware_image_offset_last, m_firmware_size_req);
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ NRF_LOG_INFO("Valid Data Create\r\n");
+
+ s_dfu_settings.progress.firmware_image_crc = s_dfu_settings.progress.firmware_image_crc_last;
+ s_dfu_settings.progress.data_object_size = p_req->object_size;
+ s_dfu_settings.progress.firmware_image_offset = s_dfu_settings.progress.firmware_image_offset_last;
+ s_dfu_settings.write_offset = s_dfu_settings.progress.firmware_image_offset_last;
+
+ FLASH_BUFFER_SWAP();
+
+ // Erase the page we're at.
+ m_flash_operations_pending++;
+ if (nrf_dfu_flash_erase((uint32_t*)(m_firmware_start_addr + s_dfu_settings.progress.firmware_image_offset), CEIL_DIV(p_req->object_size, CODE_PAGE_SIZE), dfu_data_write_handler) != FS_SUCCESS)
+ {
+ m_flash_operations_pending--;
+ NRF_LOG_INFO("Erase operation failed\r\n");
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ NRF_LOG_INFO("Creating object with size: %d. Offset: 0x%08x, CRC: 0x%08x\r\n", s_dfu_settings.progress.data_object_size, s_dfu_settings.progress.firmware_image_offset, s_dfu_settings.progress.firmware_image_crc);
+
+ break;
+
+ case NRF_DFU_OBJECT_OP_WRITE:
+
+ // Setting to ensure we are not sending faulty information in case of an early return.
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+
+ if (m_valid_init_packet_present == false)
+ {
+ // Can't accept data because DFU isn't initialized by init command.
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+ if (p_req->req_len > FLASH_BUFFER_CHUNK_LENGTH)
+ {
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ if ((p_req->req_len + s_dfu_settings.progress.firmware_image_offset - s_dfu_settings.progress.firmware_image_offset_last) > s_dfu_settings.progress.data_object_size)
+ {
+ // Can't accept data because too much data has been received.
+ NRF_LOG_INFO("Write request too long\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // Update the CRC of the firmware image.
+ s_dfu_settings.progress.firmware_image_crc = crc32_compute(p_req->p_req, p_req->req_len, &s_dfu_settings.progress.firmware_image_crc);
+ s_dfu_settings.progress.firmware_image_offset += p_req->req_len;
+
+ // Update the return values
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+
+ if (m_data_buf_pos + p_req->req_len < FLASH_BUFFER_CHUNK_LENGTH)
+ {
+ //If there is enough space in the current buffer, store the received data.
+ memcpy(&m_data_buf[m_current_data_buffer][m_data_buf_pos],
+ p_req->p_req, p_req->req_len);
+ m_data_buf_pos += p_req->req_len;
+ }
+ else
+ {
+ // If there is not enough space in the current buffer, utilize what is left in the buffer, write it to flash and start using a new buffer.
+
+ // Fill the remaining part of the current buffer
+ uint16_t first_segment_length = FLASH_BUFFER_CHUNK_LENGTH - m_data_buf_pos;
+ memcpy(&m_data_buf[m_current_data_buffer][m_data_buf_pos],
+ p_req->p_req,
+ first_segment_length);
+
+ m_data_buf_pos += first_segment_length;
+
+ // Keep only the remaining part which should be put in the next buffer.
+ p_req->req_len -= first_segment_length;
+ p_req->p_req += first_segment_length;
+
+ // Write to flash.
+ p_write_addr = (uint32_t const *)(m_firmware_start_addr + s_dfu_settings.write_offset);
+ ++m_flash_operations_pending;
+ if (nrf_dfu_flash_store(p_write_addr, (uint32_t*)&m_data_buf[m_current_data_buffer][0], CEIL_DIV(m_data_buf_pos,4), dfu_data_write_handler) == FS_SUCCESS)
+ {
+ NRF_LOG_INFO("Storing %d B at: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ // Pre-calculate Offset + CRC assuming flash operation went OK
+ s_dfu_settings.write_offset += m_data_buf_pos;
+ }
+ else
+ {
+ --m_flash_operations_pending;
+ NRF_LOG_INFO("!!! Failed storing %d B at address: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ // Previous flash operation failed. Revert CRC and offset.
+ s_dfu_settings.progress.firmware_image_crc = s_dfu_settings.progress.firmware_image_crc_last;
+ s_dfu_settings.progress.firmware_image_offset = s_dfu_settings.progress.firmware_image_offset_last;
+
+ // Update the return values
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset_last;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc_last;
+ }
+
+ FLASH_BUFFER_SWAP();
+
+ //Copy the remaining segment of the request into the next buffer.
+ if (p_req->req_len)
+ {
+ memcpy(&m_data_buf[m_current_data_buffer][m_data_buf_pos],
+ p_req->p_req, p_req->req_len);
+ m_data_buf_pos += p_req->req_len;
+ }
+ }
+
+ if ((m_data_buf_pos) &&
+ ( s_dfu_settings.write_offset -
+ s_dfu_settings.progress.firmware_image_offset_last +
+ m_data_buf_pos >=
+ s_dfu_settings.progress.data_object_size)
+ )
+ {
+ //End of an object and there is still data in the write buffer. Flush the write buffer.
+ p_write_addr = (uint32_t const *)(m_firmware_start_addr + s_dfu_settings.write_offset);
+ ++m_flash_operations_pending;
+ if (nrf_dfu_flash_store(p_write_addr, (uint32_t*)&m_data_buf[m_current_data_buffer][0], CEIL_DIV(m_data_buf_pos,4), dfu_data_write_handler) == FS_SUCCESS)
+ {
+ NRF_LOG_INFO("Storing %d B at: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ s_dfu_settings.write_offset += m_data_buf_pos;
+ }
+ else
+ {
+ --m_flash_operations_pending;
+ NRF_LOG_INFO("!!! Failed storing %d B at address: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ // Previous flash operation failed. Revert CRC and offset.
+ s_dfu_settings.progress.firmware_image_crc = s_dfu_settings.progress.firmware_image_crc_last;
+ s_dfu_settings.progress.firmware_image_offset = s_dfu_settings.progress.firmware_image_offset_last;
+
+ // Update the return values
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset_last;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc_last;
+ }
+
+ // Swap buffers.
+ FLASH_BUFFER_SWAP();
+ }
+
+ break;
+
+ case NRF_DFU_OBJECT_OP_CRC:
+ NRF_LOG_INFO("Before OP crc\r\n");
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+ break;
+
+ case NRF_DFU_OBJECT_OP_EXECUTE:
+ NRF_LOG_INFO("Before OP execute\r\n");
+ if (s_dfu_settings.progress.data_object_size !=
+ s_dfu_settings.progress.firmware_image_offset -
+ s_dfu_settings.progress.firmware_image_offset_last)
+ {
+ // The size of the written object was not as expected.
+ NRF_LOG_INFO("Invalid data here: exp: %d, got: %d\r\n", s_dfu_settings.progress.data_object_size, s_dfu_settings.progress.firmware_image_offset - s_dfu_settings.progress.firmware_image_offset_last);
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ NRF_LOG_INFO("Valid Data Execute\r\n");
+
+ // Update the offset and crc values for the last object written.
+ s_dfu_settings.progress.data_object_size = 0;
+ s_dfu_settings.progress.firmware_image_offset_last = s_dfu_settings.progress.firmware_image_offset;
+ s_dfu_settings.progress.firmware_image_crc_last = s_dfu_settings.progress.firmware_image_crc;
+ if (nrf_dfu_settings_write(NULL) != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ if (s_dfu_settings.progress.firmware_image_offset == m_firmware_size_req)
+ {
+ NRF_LOG_INFO("Waiting for %d pending flash operations before doing postvalidate.\r\n", m_flash_operations_pending);
+ while(m_flash_operations_pending)
+ {
+ nrf_dfu_wait();
+ }
+ // Received the whole image. Doing postvalidate.
+ NRF_LOG_INFO("Doing postvalidate\r\n");
+ ret_val = nrf_dfu_postvalidate(&packet.signed_command.command.init);
+ }
+ break;
+
+ case NRF_DFU_OBJECT_OP_SELECT:
+ NRF_LOG_INFO("Valid Data Read info\r\n");
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->max_size = DATA_OBJECT_MAX_SIZE;
+ break;
+
+ default:
+ NRF_LOG_INFO("Invalid Data Operation\r\n");
+ ret_val = NRF_DFU_RES_CODE_OP_CODE_NOT_SUPPORTED;
+ break;
+ }
+
+ return ret_val;
+}
+
+
+uint32_t nrf_dfu_req_handler_init(void)
+{
+#ifdef SOFTDEVICE_PRESENT
+ uint32_t ret_val = nrf_dfu_flash_init(true);
+#else
+ uint32_t ret_val = nrf_dfu_flash_init(false);
+#endif
+
+ VERIFY_SUCCESS(ret_val);
+
+ m_flash_operations_pending = 0;
+
+ // If the command is stored to flash, init command was valid.
+ if (s_dfu_settings.progress.command_size != 0 && dfu_decode_commmand())
+ {
+ // Get the previously stored firmware size
+ if (s_dfu_settings.bank_0.bank_code == NRF_DFU_BANK_INVALID && s_dfu_settings.bank_0.image_size != 0)
+ {
+ m_firmware_size_req = s_dfu_settings.bank_0.image_size;
+ }
+ else if (s_dfu_settings.bank_1.bank_code == NRF_DFU_BANK_INVALID && s_dfu_settings.bank_0.image_size != 0)
+ {
+ m_firmware_size_req = s_dfu_settings.bank_1.image_size;
+ }
+ else
+ {
+ return NRF_SUCCESS;
+ }
+
+ // Location should still be valid, expecting result of find-cache to be true
+ (void)nrf_dfu_find_cache(m_firmware_size_req, false, &m_firmware_start_addr);
+
+ // Setting valid init command to true to
+ m_valid_init_packet_present = true;
+ }
+
+ return NRF_SUCCESS;
+}
+
+
+nrf_dfu_res_code_t nrf_dfu_req_handler_on_req(void * p_context, nrf_dfu_req_t * p_req, nrf_dfu_res_t * p_res)
+{
+ nrf_dfu_res_code_t ret_val;
+
+ static nrf_dfu_obj_type_t cur_obj_type = NRF_DFU_OBJ_TYPE_COMMAND;
+ switch (p_req->req_type)
+ {
+ case NRF_DFU_OBJECT_OP_CREATE:
+ case NRF_DFU_OBJECT_OP_SELECT:
+ if ((nrf_dfu_obj_type_t)p_req->obj_type == NRF_DFU_OBJ_TYPE_COMMAND)
+ {
+ cur_obj_type = NRF_DFU_OBJ_TYPE_COMMAND;
+ }
+ else if ((nrf_dfu_obj_type_t)p_req->obj_type == NRF_DFU_OBJ_TYPE_DATA)
+ {
+ cur_obj_type = NRF_DFU_OBJ_TYPE_DATA;
+ }
+ else
+ {
+ return NRF_DFU_RES_CODE_UNSUPPORTED_TYPE;
+ }
+ break;
+ default:
+ // no implementation
+ break;
+ }
+
+ switch (cur_obj_type)
+ {
+ case NRF_DFU_OBJ_TYPE_COMMAND:
+ ret_val = nrf_dfu_command_req(p_context, p_req, p_res);
+ break;
+
+ case NRF_DFU_OBJ_TYPE_DATA:
+ ret_val = nrf_dfu_data_req(p_context, p_req, p_res);
+ break;
+
+ default:
+ NRF_LOG_INFO("Invalid request type\r\n");
+ ret_val = NRF_DFU_RES_CODE_INVALID_OBJECT;
+ break;
+ }
+
+ return ret_val;
+}
+
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/dfu_req_handling.h b/ARM/Nordic/nRF51/exemples/dfu/src/dfu_req_handling.h
new file mode 100755
index 00000000..a38cf3a3
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/dfu_req_handling.h
@@ -0,0 +1,21 @@
+/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+#ifndef DFU_REQ_HANDLING_H__
+#define DFU_REQ_HANDLING_H__
+
+#include "compiler_abstraction.h"
+
+__ALIGN(4) extern const uint8_t pk[64];
+
+
+#endif // #ifndef DFU_REQ_HANDLING_H__
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/license.txt b/ARM/Nordic/nRF51/exemples/dfu/src/license.txt
new file mode 100755
index 00000000..2ffb212c
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/license.txt
@@ -0,0 +1,117 @@
+This text contains two licenses (License #1, License #2).
+License #1 applies to the whole SDK, except i) files including Dynastream copyright notices and ii) source files including BSD 3-clause license texts.
+License #2 applies only to files including Dynastream copyright notices.
+All must be read and accepted before proceeding.
+
+
+License #1
+
+License Agreement
+Nordic Semiconductor ASA (“Nordic”)
+Software Development Kit
+
+
+You (“You” or “Licensee”) must carefully and thoroughly read this License Agreement (“Agreement”), and accept to adhere to this Agreement before downloading, installing and/or using any software or content in the Software Development Kit (“SDK”) provided herewith.
+
+YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SDK, IN THIS CASE YOU AGREE THAT THE USE OF THE SDK CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS.
+
+IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SDK OR RELATED CONTENT.
+
+
+1. Grant of License
+Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license (“License”): (a) to use the SDK as a development platform solely in connection with a Nordic Integrated Circuit (“nRF IC”), (b) to modify any source code contained in the SDK solely as necessary to implement products developed by Licensee that incorporate an nRF IC (“Licensee Product”), and (c) to distribute the SDK solely as implemented in Licensee Product. Licensee shall not use the SDK for any purpose other than specifically authorized herein.
+
+2. Title
+As between the parties, Nordic retains full rights, title, and ownership of the SDK and any and all patents, copyrights, trade secrets, trade names, trademarks, and other intellectual property rights in and to the SDK.
+
+3. No Modifications or Reverse Engineering
+Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code parts of the SDK including, but not limited to pre-compiled binaries and object code.
+
+4. Distribution Restrictions
+Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SDK to any third party. Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SDK as proscribed herein. Licensee also agrees that use of and access to the SDK will be strictly limited to the employees and subcontractors of the Licensee necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making such employees and subcontractors agree on complying with the obligations concerning use and non-disclosure of the SDK.
+
+5. No Other Rights
+Licensee shall use the SDK only in compliance with this Agreement and shall refrain from using the SDK in any way that may be contrary to this Agreement.
+
+
+6. Fees
+Nordic grants the License to the Licensee free of charge provided that the Licensee undertakes the obligations in the Agreement and warrants to comply with the Agreement.
+
+
+7. DISCLAIMER OF WARRANTY
+THE SDK IS PROVIDED “AS IS" WITHOUT WARRANTY OF ANY KIND EXPRESS OR IMPLIED AND NEITHER NORDIC, ITS LICENSORS OR AFFILIATES NOR THE COPYRIGHT HOLDERS MAKE ANY REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR THAT THE SDK WILL NOT INFRINGE ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS. THERE IS NO WARRANTY BY NORDIC OR BY ANY OTHER PARTY THAT THE FUNCTIONS CONTAINED IN THE SDK WILL MEET THE REQUIREMENTS OF LICENSEE OR THAT THE OPERATION OF THE SDK WILL BE UNINTERRUPTED OR ERROR-FREE. LICENSEE ASSUMES ALL RESPONSIBILITY AND RISK FOR THE SELECTION OF THE SDK TO ACHIEVE LICENSEE’S INTENDED RESULTS AND FOR THE INSTALLATION, USE AND RESULTS OBTAINED FROM IT.
+
+8. No Support
+Nordic is not obligated to furnish or make available to Licensee any further information, software, technical information, know-how, show-how, bug-fixes or support. Nordic reserves the right to make changes to the SDK without further notice.
+
+9. Limitation of Liability
+In no event shall Nordic, its employees or suppliers or affiliates be liable for any lost profits, revenue, sales, data or costs of procurement of substitute goods or services, property damage, personal injury, interruption of business, loss of business information or for any special, direct, indirect, incidental, economic, punitive, special or consequential damages, however caused and whether arising under contract, tort, negligence, or other theory of liability arising out of the use of or inability to use the SDK, even if Nordic or its employees or suppliers or affiliates are advised of the possibility of such damages. Because some countries/states/ jurisdictions do not allow the exclusion or limitation of liability, but may allow liability to be limited, in such cases, Nordic, its employees or licensors or affiliates’ liability shall be limited to USD 50.
+
+10. Breach of Contract
+Upon a breach of contract by the Licensee, Nordic is entitled to damages in respect of any direct loss which can be reasonably attributed to the breach by the Licensee. If the Licensee has acted with gross negligence or willful misconduct, the Licensee shall cover both direct and indirect costs for Nordic.
+
+11. Indemnity
+
+Licensee undertakes to indemnify, hold harmless and defend Nordic and its directors, officers, affiliates, shareholders, employees and agents from and against any claims or lawsuits, including attorney's fees, that arise or result of the Licensee’s execution of the License and which is not due to causes for which Nordic is responsible.
+
+12. Governing Law
+This Agreement shall be construed according to the laws of Norway, and hereby submits to the exclusive jurisdiction of the Oslo tingrett.
+
+13. Assignment
+Licensee shall not assign this Agreement or any rights or obligations hereunder without the prior written consent of Nordic.
+
+14. Termination
+Without prejudice to any other rights, Nordic may cancel this Agreement if Licensee does not abide by the terms and conditions of this Agreement. Upon termination Licensee must promptly cease the use of the License and destroy all copies of the Licensed Technology and any other material provided by Nordic or its affiliate, or produced by the Licensee in connection with the Agreement or the Licensed Technology.
+
+
+License #2
+
+This software is subject to the ANT+ Shared Source License
+www.thisisant.com/swlicenses
+Copyright (c) Dynastream Innovations, Inc. 2015
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or
+without modification, are permitted provided that the following
+conditions are met:
+
+ 1) Redistributions of source code must retain the above
+ copyright notice,this list of conditions and the following
+ disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials
+ provided with the distribution.
+
+ 3) Neither the name of Dynastream nor the names of its
+ contributors may be used to endorse or promote products
+ derived from this software without specific prior
+ written permission.
+
+The following actions are prohibited:
+
+ 1) Redistribution of source code containing the ANT+ Network
+ Key. The ANT+ Network Key is available to ANT+ Adopters.
+ Please refer to http://thisisant.com to become an ANT+
+ Adopter and access the key.
+
+ 2) Reverse engineering, decompilation, and/or disassembly of
+ software provided in binary form under this license.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW
+THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE
+ABOVE LIMITATIONS MAY NOT APPLY TO YOU.
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/main.c b/ARM/Nordic/nRF51/exemples/dfu/src/main.c
new file mode 100755
index 00000000..0fc37e03
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/main.c
@@ -0,0 +1,94 @@
+/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+/** @file
+ *
+ * @defgroup bootloader_secure main.c
+ * @{
+ * @ingroup dfu_bootloader_api
+ * @brief Bootloader project main file for secure DFU.
+ *
+ */
+
+#include
+#include "boards.h"
+#include "nrf_mbr.h"
+#include "nrf_bootloader.h"
+#include "nrf_bootloader_app_start.h"
+#include "nrf_dfu.h"
+#include "nrf_log.h"
+#include "nrf_log_ctrl.h"
+#include "app_error.h"
+#include "app_error_weak.h"
+#include "nrf_bootloader_info.h"
+
+void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info)
+{
+ NRF_LOG_ERROR("received a fault! id: 0x%08x, pc: 0x&08x\r\n", id, pc);
+ NVIC_SystemReset();
+}
+
+void app_error_handler_bare(uint32_t error_code)
+{
+ (void)error_code;
+ NRF_LOG_ERROR("received an error: 0x%08x!\r\n", error_code);
+ NVIC_SystemReset();
+}
+
+
+/**@brief Function for initialization of LEDs.
+ */
+static void leds_init(void)
+{
+ bsp_board_leds_init();
+ bsp_board_led_on(BSP_BOARD_LED_2);
+}
+
+
+/**@brief Function for initializing the button module.
+ */
+static void buttons_init(void)
+{
+ nrf_gpio_cfg_sense_input(BOOTLOADER_BUTTON,
+ BUTTON_PULL,
+ NRF_GPIO_PIN_SENSE_LOW);
+}
+
+
+/**@brief Function for application main entry.
+ */
+int main(void)
+{
+ uint32_t ret_val;
+
+ (void) NRF_LOG_INIT(NULL);
+
+ NRF_LOG_INFO("Inside main\r\n");
+
+ leds_init();
+ buttons_init();
+
+ ret_val = nrf_bootloader_init();
+ APP_ERROR_CHECK(ret_val);
+
+ // Either there was no DFU functionality enabled in this project or the DFU module detected
+ // no ongoing DFU operation and found a valid main application.
+ // Boot the main application.
+ nrf_bootloader_app_start(MAIN_APPLICATION_START_ADDR);
+
+ // Should never be reached.
+ NRF_LOG_INFO("After main\r\n");
+}
+
+/**
+ * @}
+ */
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/readme.txt b/ARM/Nordic/nRF51/exemples/dfu/src/readme.txt
new file mode 100755
index 00000000..41ad9382
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/readme.txt
@@ -0,0 +1,34 @@
+Usage:
+1. If proto file changes:
+
+You will need to download the protoc compiler from:
+https://developers.google.com/protocol-buffers/docs/downloads
+
+ A. From examples\dfu\bootloader_secure\, run:
+
+ protoc.exe -odfu-cc.pb dfu-cc.proto
+
+ This generates a 'dfu-cc.pb' file, which will be used by the Python script
+
+ B. From examples\dfu\bootloader_secure\, run python script:
+
+ python ..\..\..\external\nano-pb\generator\nanopb_generator.py dfu-cc.pb -f dfu-cc.options
+
+ This produces 2 files: dfu-cc.pb.c and dfu-cc.pb.h, which will overwrite the old ones if present.
+
+2. File:
+
+ - pb.h
+
+ Should be used to use PB.
+
+3. Additionally, the following may be used to decode/encode messages:
+
+ - pb_common.h
+ - pb_common.c
+ (to decode:)
+ - pb_decode.h
+ - pb_decode.c
+ (to encode:)
+ - pb_encode.h
+ - pb_endode.c
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/sdk_config.h b/ARM/Nordic/nRF51/exemples/dfu/src/sdk_config.h
new file mode 100755
index 00000000..eae793d1
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/sdk_config.h
@@ -0,0 +1,509 @@
+
+
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#ifdef USE_APP_CONFIG
+#include "app_config.h"
+#endif
+// nRF_Drivers
+
+//==========================================================
+// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef CLOCK_ENABLED
+#define CLOCK_ENABLED 0
+#endif
+#if CLOCK_ENABLED
+// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
+
+// <0=> Default (64 MHz)
+// <255=> Default (16 MHz)
+// <0=> 32 MHz
+
+#ifndef CLOCK_CONFIG_XTAL_FREQ
+#define CLOCK_CONFIG_XTAL_FREQ 255
+#endif
+
+// CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 3
+#endif
+
+// CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef CLOCK_CONFIG_LOG_ENABLED
+#define CLOCK_CONFIG_LOG_ENABLED 0
+#endif
+#if CLOCK_CONFIG_LOG_ENABLED
+// CLOCK_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef CLOCK_CONFIG_LOG_LEVEL
+#define CLOCK_CONFIG_LOG_LEVEL 3
+#endif
+
+// CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef CLOCK_CONFIG_INFO_COLOR
+#define CLOCK_CONFIG_INFO_COLOR 0
+#endif
+
+// CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef CLOCK_CONFIG_DEBUG_COLOR
+#define CLOCK_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //CLOCK_CONFIG_LOG_ENABLED
+//
+
+#endif //CLOCK_ENABLED
+//
+
+// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module
+//==========================================================
+#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
+#endif
+#if PERIPHERAL_RESOURCE_SHARING_ENABLED
+// COMMON_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef COMMON_CONFIG_LOG_ENABLED
+#define COMMON_CONFIG_LOG_ENABLED 0
+#endif
+#if COMMON_CONFIG_LOG_ENABLED
+// COMMON_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef COMMON_CONFIG_LOG_LEVEL
+#define COMMON_CONFIG_LOG_LEVEL 3
+#endif
+
+// COMMON_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMMON_CONFIG_INFO_COLOR
+#define COMMON_CONFIG_INFO_COLOR 0
+#endif
+
+// COMMON_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMMON_CONFIG_DEBUG_COLOR
+#define COMMON_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //COMMON_CONFIG_LOG_ENABLED
+//
+
+#endif //PERIPHERAL_RESOURCE_SHARING_ENABLED
+//
+
+// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver
+//==========================================================
+#ifndef RNG_ENABLED
+#define RNG_ENABLED 1
+#endif
+#if RNG_ENABLED
+// RNG_CONFIG_ERROR_CORRECTION - Error correction
+
+
+#ifndef RNG_CONFIG_ERROR_CORRECTION
+#define RNG_CONFIG_ERROR_CORRECTION 0
+#endif
+
+// RNG_CONFIG_POOL_SIZE - Pool size
+#ifndef RNG_CONFIG_POOL_SIZE
+#define RNG_CONFIG_POOL_SIZE 32
+#endif
+
+// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+
+#ifndef RNG_CONFIG_IRQ_PRIORITY
+#define RNG_CONFIG_IRQ_PRIORITY 3
+#endif
+
+// RNG_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef RNG_CONFIG_LOG_ENABLED
+#define RNG_CONFIG_LOG_ENABLED 0
+#endif
+#if RNG_CONFIG_LOG_ENABLED
+// RNG_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef RNG_CONFIG_LOG_LEVEL
+#define RNG_CONFIG_LOG_LEVEL 3
+#endif
+
+// RNG_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RNG_CONFIG_INFO_COLOR
+#define RNG_CONFIG_INFO_COLOR 0
+#endif
+
+// RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RNG_CONFIG_DEBUG_COLOR
+#define RNG_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //RNG_CONFIG_LOG_ENABLED
+//
+
+#endif //RNG_ENABLED
+//
+
+//
+//==========================================================
+
+// nRF_Libraries
+
+//==========================================================
+// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
+//==========================================================
+#ifndef APP_SCHEDULER_ENABLED
+#define APP_SCHEDULER_ENABLED 1
+#endif
+#if APP_SCHEDULER_ENABLED
+// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature
+
+
+#ifndef APP_SCHEDULER_WITH_PAUSE
+#define APP_SCHEDULER_WITH_PAUSE 0
+#endif
+
+// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling
+
+
+#ifndef APP_SCHEDULER_WITH_PROFILER
+#define APP_SCHEDULER_WITH_PROFILER 0
+#endif
+
+#endif //APP_SCHEDULER_ENABLED
+//
+
+// APP_TIMER_ENABLED - app_timer - Application timer functionality
+//==========================================================
+#ifndef APP_TIMER_ENABLED
+#define APP_TIMER_ENABLED 1
+#endif
+#if APP_TIMER_ENABLED
+// APP_TIMER_WITH_PROFILER - Enable app_timer profiling
+
+
+#ifndef APP_TIMER_WITH_PROFILER
+#define APP_TIMER_WITH_PROFILER 0
+#endif
+
+// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on
+
+
+// If option is enabled RTC is kept running even if there is no active timers.
+// This option can be used when app_timer is used for timestamping.
+
+#ifndef APP_TIMER_KEEPS_RTC_ACTIVE
+#define APP_TIMER_KEEPS_RTC_ACTIVE 0
+#endif
+
+#endif //APP_TIMER_ENABLED
+//
+
+// CRC32_ENABLED - crc32 - CRC32 calculation routines
+
+
+#ifndef CRC32_ENABLED
+#define CRC32_ENABLED 1
+#endif
+
+// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library
+
+
+#ifndef ECC_ENABLED
+#define ECC_ENABLED 0
+#endif
+
+// FSTORAGE_ENABLED - fstorage - Flash storage module
+//==========================================================
+#ifndef FSTORAGE_ENABLED
+#define FSTORAGE_ENABLED 1
+#endif
+#if FSTORAGE_ENABLED
+// FS_QUEUE_SIZE - Configures the size of the internal queue.
+// Increase this if there are many users, or if it is likely that many
+// operation will be queued at once without waiting for the previous operations
+// to complete. In general, increase the queue size if you frequently receive
+// @ref FS_ERR_QUEUE_FULL errors when calling @ref fs_store or @ref fs_erase.
+
+#ifndef FS_QUEUE_SIZE
+#define FS_QUEUE_SIZE 4
+#endif
+
+// FS_OP_MAX_RETRIES - Number attempts to execute an operation if the SoftDevice fails.
+// Increase this value if events return the @ref FS_ERR_OPERATION_TIMEOUT
+// error often. The SoftDevice may fail to schedule flash access due to high BLE activity.
+
+#ifndef FS_OP_MAX_RETRIES
+#define FS_OP_MAX_RETRIES 3
+#endif
+
+// FS_MAX_WRITE_SIZE_WORDS - Maximum number of words to be written to flash in a single operation.
+// Tweaking this value can increase the chances of the SoftDevice being
+// able to fit flash operations in between radio activity. This value is bound by the
+// maximum number of words which the SoftDevice can write to flash in a single call to
+// @ref sd_flash_write, which is 256 words for nRF51 ICs and 1024 words for nRF52 ICs.
+
+#ifndef FS_MAX_WRITE_SIZE_WORDS
+#define FS_MAX_WRITE_SIZE_WORDS 256
+#endif
+
+#endif //FSTORAGE_ENABLED
+//
+
+// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI
+//==========================================================
+#ifndef HCI_MEM_POOL_ENABLED
+#define HCI_MEM_POOL_ENABLED 1
+#endif
+#if HCI_MEM_POOL_ENABLED
+// HCI_TX_BUF_SIZE - TX buffer size in bytes.
+#ifndef HCI_TX_BUF_SIZE
+#define HCI_TX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_SIZE - RX buffer size in bytes.
+#ifndef HCI_RX_BUF_SIZE
+#define HCI_RX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size.
+#ifndef HCI_RX_BUF_QUEUE_SIZE
+#define HCI_RX_BUF_QUEUE_SIZE 4
+#endif
+
+#endif //HCI_MEM_POOL_ENABLED
+//
+
+// NRF_QUEUE_ENABLED - nrf_queue - Queue module
+
+
+#ifndef NRF_QUEUE_ENABLED
+#define NRF_QUEUE_ENABLED 1
+#endif
+
+//
+//==========================================================
+
+// nRF_Log
+
+//==========================================================
+// NRF_LOG_ENABLED - nrf_log - Logging
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 0
+#endif
+#if NRF_LOG_ENABLED
+// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string
+//==========================================================
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+#if NRF_LOG_USES_COLORS
+// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+// NRF_LOG_ERROR_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_ERROR_COLOR
+#define NRF_LOG_ERROR_COLOR 0
+#endif
+
+// NRF_LOG_WARNING_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_WARNING_COLOR
+#define NRF_LOG_WARNING_COLOR 0
+#endif
+
+#endif //NRF_LOG_USES_COLORS
+//
+
+// NRF_LOG_DEFAULT_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 3
+#endif
+
+// NRF_LOG_DEFERRED - Enable deffered logger.
+
+// Log data is buffered and can be processed in idle.
+//==========================================================
+#ifndef NRF_LOG_DEFERRED
+#define NRF_LOG_DEFERRED 1
+#endif
+#if NRF_LOG_DEFERRED
+// NRF_LOG_DEFERRED_BUFSIZE - Size of the buffer for logs in words.
+// Must be power of 2
+
+#ifndef NRF_LOG_DEFERRED_BUFSIZE
+#define NRF_LOG_DEFERRED_BUFSIZE 256
+#endif
+
+#endif //NRF_LOG_DEFERRED
+//
+
+// NRF_LOG_USES_TIMESTAMP - Enable timestamping
+
+
+// Function for getting the timestamp is provided by the user
+
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+
+#endif //NRF_LOG_ENABLED
+//
+
+//
+//==========================================================
+
+// <<< end of configuration section >>>
+#endif //SDK_CONFIG_H
+
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/secure_dfu_gcc_nrf51.ld b/ARM/Nordic/nRF51/exemples/dfu/src/secure_dfu_gcc_nrf51.ld
new file mode 100755
index 00000000..93f61491
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/secure_dfu_gcc_nrf51.ld
@@ -0,0 +1,82 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+SEARCH_DIR(../../../../../src)
+GROUP(-lgcc -lc -lnosys -lCMSIS)
+
+MEMORY
+{
+ /** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
+ * MBR to init the bootloader when starting the system. This value must correspond to
+ * BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
+ * those values do not match. The check is performed in main.c, see
+ * APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
+ */
+ FLASH (rx) : ORIGIN = 0x3A800, LENGTH = 0x5400
+
+ /** RAM Region for bootloader. This setting is suitable when used with s110, s120, s130, s310. */
+ RAM (rwx) : ORIGIN = 0x20002C00, LENGTH = 0x5380
+
+ /** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
+ * from application to bootloader when using buttonluss DFU OTA.
+ */
+ NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
+
+ /** Location of bootloader setting in at the last flash page. */
+ BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0003FC00, LENGTH = 0x0400
+
+ /** Location in UICR where bootloader start address is stored. */
+ UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
+}
+
+SECTIONS
+{
+ /* Ensures the bootloader settings are placed at the last flash page. */
+ .bootloaderSettings(NOLOAD) :
+ {
+
+ } > BOOTLOADER_SETTINGS
+
+ /* Ensures the Bootloader start address in flash is written to UICR when flashing the image. */
+ .uicrBootStartAddress :
+ {
+ KEEP(*(.uicrBootStartAddress))
+ } > UICR_BOOTLOADER
+
+ /* No init RAM section in bootloader. Used for bond information exchange. */
+ .noinit(NOLOAD) :
+ {
+
+ } > NOINIT
+ /* other placements follow here... */
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM AT > FLASH
+
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM AT > FLASH
+
+ . = ALIGN(4);
+ .dfu_trans :
+ {
+ PROVIDE(__start_dfu_trans = .);
+ KEEP(*(.dfu_trans))
+ PROVIDE(__stop_dfu_trans = .);
+ } > RAM AT > FLASH
+
+} INSERT AFTER .data
+
+INCLUDE "gcc_arm_flash.ld"
diff --git a/ARM/Nordic/nRF51/exemples/dfu/src/secure_dfu_gcc_nrf51_debug.ld b/ARM/Nordic/nRF51/exemples/dfu/src/secure_dfu_gcc_nrf51_debug.ld
new file mode 100755
index 00000000..6aefa79e
--- /dev/null
+++ b/ARM/Nordic/nRF51/exemples/dfu/src/secure_dfu_gcc_nrf51_debug.ld
@@ -0,0 +1,82 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+SEARCH_DIR(../../../../../src)
+GROUP(-lgcc -lc -lnosys -lCMSIS)
+
+MEMORY
+{
+ /** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
+ * MBR to init the bootloader when starting the system. This value must correspond to
+ * BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
+ * those values do not match. The check is performed in main.c, see
+ * APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
+ */
+ FLASH (rx) : ORIGIN = 0x35C00, LENGTH = 0xA000
+
+ /** RAM Region for bootloader. This setting is suitable when used with s110, s120, s130, s310. */
+ RAM (rwx) : ORIGIN = 0x20002C00, LENGTH = 0x5380
+
+ /** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
+ * from application to bootloader when using buttonluss DFU OTA.
+ */
+ NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
+
+ /** Location of bootloader setting in at the last flash page. */
+ BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0003FC00, LENGTH = 0x0400
+
+ /** Location in UICR where bootloader start address is stored. */
+ UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
+}
+
+SECTIONS
+{
+ /* Ensures the bootloader settings are placed at the last flash page. */
+ .bootloaderSettings(NOLOAD) :
+ {
+
+ } > BOOTLOADER_SETTINGS
+
+ /* Ensures the Bootloader start address in flash is written to UICR when flashing the image. */
+ .uicrBootStartAddress :
+ {
+ KEEP(*(.uicrBootStartAddress))
+ } > UICR_BOOTLOADER
+
+ /* No init RAM section in bootloader. Used for bond information exchange. */
+ .noinit(NOLOAD) :
+ {
+
+ } > NOINIT
+ /* other placements follow here... */
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM
+
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM
+
+ . = ALIGN(4);
+ .dfu_trans :
+ {
+ PROVIDE(__start_dfu_trans = .);
+ KEEP(*(.dfu_trans))
+ PROVIDE(__stop_dfu_trans = .);
+ } > RAM
+
+} INSERT AFTER .data
+
+INCLUDE "gcc_arm_flash.ld"
diff --git a/ARM/Nordic/nRF52/CMSIS/.cproject b/ARM/Nordic/nRF52/CMSIS/.cproject
index ca9aae06..1fd7d678 100755
--- a/ARM/Nordic/nRF52/CMSIS/.cproject
+++ b/ARM/Nordic/nRF52/CMSIS/.cproject
@@ -68,6 +68,20 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -171,6 +185,20 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -276,6 +304,20 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -381,6 +423,20 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -432,4 +488,5 @@
+
diff --git a/ARM/Nordic/nRF52/EHAL/.cproject b/ARM/Nordic/nRF52/EHAL/.cproject
index 26c1b030..71fca789 100755
--- a/ARM/Nordic/nRF52/EHAL/.cproject
+++ b/ARM/Nordic/nRF52/EHAL/.cproject
@@ -71,6 +71,7 @@
+
@@ -78,13 +79,33 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -92,10 +113,19 @@
+
+
+
+
+
+
+
+
+
@@ -103,11 +133,23 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -210,6 +252,7 @@
+
@@ -217,13 +260,33 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -231,10 +294,19 @@
+
+
+
+
+
+
+
+
+
@@ -242,11 +314,23 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -351,6 +435,7 @@
+
@@ -358,13 +443,33 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -372,10 +477,19 @@
+
+
+
+
+
+
+
+
+
@@ -383,11 +497,23 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -492,6 +618,7 @@
+
@@ -499,13 +626,33 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -513,10 +660,19 @@
+
+
+
+
+
+
+
+
+
@@ -524,11 +680,23 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -595,4 +763,5 @@
+
diff --git a/ARM/Nordic/nRF52/EHAL/.project b/ARM/Nordic/nRF52/EHAL/.project
index 3236107c..6a709e6a 100755
--- a/ARM/Nordic/nRF52/EHAL/.project
+++ b/ARM/Nordic/nRF52/EHAL/.project
@@ -36,14 +36,19 @@
PARENT-4-PROJECT_LOC/include/base64.h
- include/blueio_board.h
+ include/ble_periph_app.h
1
- PARENT-2-PROJECT_LOC/include/blueio_board.h
+ PARENT-2-PROJECT_LOC/include/ble_periph_app.h
+
+
+ include/blueio_blesrvc.h
+ 1
+ PARENT-2-PROJECT_LOC/include/blueio_blesrvc.h
- include/blueio_svc.h
+ include/blueio_board.h
1
- PARENT-2-PROJECT_LOC/include/blueio_svc.h
+ PARENT-2-PROJECT_LOC/include/blueio_board.h
include/cfifo.h
@@ -60,6 +65,11 @@
1
PARENT-4-PROJECT_LOC/include/crc.h
+
+ include/custom_board.h
+ 1
+ PARENT-2-PROJECT_LOC/include/custom_board.h
+
include/dirent.h
1
@@ -100,11 +110,6 @@
1
PARENT-4-PROJECT_LOC/include/iopincfg.h
-
- include/iopinctrl.h
- 1
- PARENT-2-PROJECT_LOC/include/iopinctrl.h
-
include/istddef.h
1
@@ -206,19 +211,19 @@
PARENT-4-PROJECT_LOC/src/CppRuntimeOverload.cpp
- src/atomic.c
+ src/base64.c
1
- PARENT-2-PROJECT_LOC/src/atomic.c
+ PARENT-4-PROJECT_LOC/src/base64.c
- src/base64.c
+ src/ble_periph_app.cpp
1
- PARENT-4-PROJECT_LOC/src/base64.c
+ PARENT-2-PROJECT_LOC/src/ble_periph_app.cpp
- src/blueio_svc.c
+ src/blueio_blesrvc.c
1
- PARENT-2-PROJECT_LOC/src/blueio_svc.c
+ PARENT-2-PROJECT_LOC/src/blueio_blesrvc.c
src/cfifo.c
@@ -230,6 +235,11 @@
1
PARENT-4-PROJECT_LOC/src/crc.c
+
+ src/diskio_flash.cpp
+ 1
+ PARENT-4-PROJECT_LOC/src/diskio_flash.cpp
+
src/diskio_impl.cpp
1
@@ -255,11 +265,21 @@
1
PARENT-4-PROJECT_LOC/src/ledmx.c
+
+ src/ledmxfont.c
+ 1
+ PARENT-4-PROJECT_LOC/src/ledmxfont.c
+
src/ledmxio_nrf5x.c
1
PARENT-2-PROJECT_LOC/src/ledmxio_nrf5x.c
+
+ src/nRF5_SDK
+ 2
+ virtual:/virtual
+
src/prbs.c
1
@@ -275,11 +295,6 @@
1
PARENT-4-PROJECT_LOC/src/sdcard_impl.cpp
-
- src/seep.c
- 1
- PARENT-4-PROJECT_LOC/src/seep.c
-
src/seep_impl.cpp
1
@@ -335,5 +350,25 @@
1
PARENT-4-PROJECT_LOC/src/utf8cvt.cpp
+
+ src/nRF5_SDK/ble
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services/ble_dis
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services/ble_dis/ble_dis.c
+ 1
+ PARENT-5-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_services/ble_dis/ble_dis.c
+
diff --git a/ARM/Nordic/nRF52/EHAL/include/iopinctrl.h b/ARM/Nordic/nRF52/EHAL/include/iopinctrl.h
new file mode 100755
index 00000000..73baf87f
--- /dev/null
+++ b/ARM/Nordic/nRF52/EHAL/include/iopinctrl.h
@@ -0,0 +1,82 @@
+/*--------------------------------------------------------------------------
+File : iopinctrl.h
+
+Author : Hoang Nguyen Hoan June. 2, 2014
+
+Desc : General I/O pin control implementation specific
+ This file must be named iopinctrl.h no matter which target
+
+ This is nRF52 implementation
+
+Copyright (c) 2014, I-SYST inc., all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+For info or contributing contact : hnhoan at i-syst dot com
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+
+----------------------------------------------------------------------------*/
+#ifndef __IOPINCTRL_H__
+#define __IOPINCTRL_H__
+
+#include
+#include "nrf52.h"
+#include "iopincfg.h"
+
+static inline void IOPinSetDir(int PortNo, int PinNo, IOPINDIR Dir)
+{
+ if (Dir == IOPINDIR_OUTPUT)
+ NRF_P0->DIRSET = (1 << PinNo);
+ else if (Dir == IOPINDIR_INPUT)
+ NRF_P0->DIRCLR = (1 << PinNo);
+}
+
+static inline int IOPinRead(int PortNo, int PinNo)
+{
+ return (NRF_P0->IN >> PinNo) & 1;
+}
+
+static inline void IOPinSet(int PortNo, int PinNo)
+{
+ NRF_P0->OUTSET = (1 << PinNo);
+}
+
+static inline void IOPinClear(int PortNo, int PinNo)
+{
+ NRF_P0->OUTCLR = (1 << PinNo);
+}
+
+static inline void IOPinToggle(int PortNo, int PinNo)
+{
+ NRF_P0->OUT = NRF_P0->OUT ^ (1 << PinNo);
+}
+
+static inline uint32_t IOPinReadPort(int PortNo)
+{
+ return NRF_P0->IN;
+}
+
+static inline void IOPinWritePort(int PortNo, uint32_t Data)
+{
+ NRF_P0->OUT = Data;
+}
+
+#endif // __IOPINCTRL_H__
diff --git a/ARM/Nordic/nRF52/EHAL/src/sdk_config.h b/ARM/Nordic/nRF52/EHAL/src/sdk_config.h
new file mode 100644
index 00000000..e15b22db
--- /dev/null
+++ b/ARM/Nordic/nRF52/EHAL/src/sdk_config.h
@@ -0,0 +1,2388 @@
+
+
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#ifdef USE_APP_CONFIG
+#include "app_config.h"
+#endif
+// nRF_BLE
+
+//==========================================================
+// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module
+
+
+#ifndef BLE_ADVERTISING_ENABLED
+#define BLE_ADVERTISING_ENABLED 1
+#endif
+
+// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands
+
+
+#ifndef BLE_DTM_ENABLED
+#define BLE_DTM_ENABLED 0
+#endif
+
+// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library
+
+
+#ifndef BLE_RACP_ENABLED
+#define BLE_RACP_ENABLED 1
+#endif
+
+// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write)
+
+
+#ifndef NRF_BLE_QWR_ENABLED
+#define NRF_BLE_QWR_ENABLED 0
+#endif
+
+// PEER_MANAGER_ENABLED - peer_manager - Peer Manager
+
+
+#ifndef PEER_MANAGER_ENABLED
+#define PEER_MANAGER_ENABLED 1
+#endif
+
+//
+//==========================================================
+
+// nRF_BLE_Services
+
+//==========================================================
+// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client
+
+
+#ifndef BLE_ANCS_C_ENABLED
+#define BLE_ANCS_C_ENABLED 0
+#endif
+
+// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client
+
+
+#ifndef BLE_ANS_C_ENABLED
+#define BLE_ANS_C_ENABLED 0
+#endif
+
+// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client
+
+
+#ifndef BLE_BAS_C_ENABLED
+#define BLE_BAS_C_ENABLED 0
+#endif
+
+// BLE_BAS_ENABLED - ble_bas - Battery Service
+
+
+#ifndef BLE_BAS_ENABLED
+#define BLE_BAS_ENABLED 1
+#endif
+
+// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service
+
+
+#ifndef BLE_CSCS_ENABLED
+#define BLE_CSCS_ENABLED 0
+#endif
+
+// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client
+
+
+#ifndef BLE_CTS_C_ENABLED
+#define BLE_CTS_C_ENABLED 0
+#endif
+
+// BLE_DIS_ENABLED - ble_dis - Device Information Service
+
+
+#ifndef BLE_DIS_ENABLED
+#define BLE_DIS_ENABLED 1
+#endif
+
+// BLE_GLS_ENABLED - ble_gls - Glucose Service
+
+
+#ifndef BLE_GLS_ENABLED
+#define BLE_GLS_ENABLED 1
+#endif
+
+// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service
+
+
+#ifndef BLE_HIDS_ENABLED
+#define BLE_HIDS_ENABLED 0
+#endif
+
+// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client
+
+
+#ifndef BLE_HRS_C_ENABLED
+#define BLE_HRS_C_ENABLED 0
+#endif
+
+// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service
+
+
+#ifndef BLE_HRS_ENABLED
+#define BLE_HRS_ENABLED 0
+#endif
+
+// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service
+
+
+#ifndef BLE_HTS_ENABLED
+#define BLE_HTS_ENABLED 0
+#endif
+
+// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client
+
+
+#ifndef BLE_IAS_C_ENABLED
+#define BLE_IAS_C_ENABLED 0
+#endif
+
+// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service
+
+
+#ifndef BLE_IAS_ENABLED
+#define BLE_IAS_ENABLED 0
+#endif
+
+// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client
+
+
+#ifndef BLE_LBS_C_ENABLED
+#define BLE_LBS_C_ENABLED 0
+#endif
+
+// BLE_LBS_ENABLED - ble_lbs - LED Button Service
+
+
+#ifndef BLE_LBS_ENABLED
+#define BLE_LBS_ENABLED 0
+#endif
+
+// BLE_LLS_ENABLED - ble_lls - Link Loss Service
+
+
+#ifndef BLE_LLS_ENABLED
+#define BLE_LLS_ENABLED 0
+#endif
+
+// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service
+
+
+#ifndef BLE_NUS_C_ENABLED
+#define BLE_NUS_C_ENABLED 0
+#endif
+
+// BLE_NUS_ENABLED - ble_nus - Nordic UART Service
+
+
+#ifndef BLE_NUS_ENABLED
+#define BLE_NUS_ENABLED 0
+#endif
+
+// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client
+
+
+#ifndef BLE_RSCS_C_ENABLED
+#define BLE_RSCS_C_ENABLED 0
+#endif
+
+// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service
+
+
+#ifndef BLE_RSCS_ENABLED
+#define BLE_RSCS_ENABLED 0
+#endif
+
+// BLE_TPS_ENABLED - ble_tps - TX Power Service
+
+
+#ifndef BLE_TPS_ENABLED
+#define BLE_TPS_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_Drivers
+
+//==========================================================
+// ADC_ENABLED - nrf_drv_adc - Driver for ADC peripheral (nRF51)
+//==========================================================
+#ifndef ADC_ENABLED
+#define ADC_ENABLED 0
+#endif
+#if ADC_ENABLED
+// ADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef ADC_CONFIG_IRQ_PRIORITY
+#define ADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //ADC_ENABLED
+//
+
+// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef CLOCK_ENABLED
+#define CLOCK_ENABLED 1
+#endif
+#if CLOCK_ENABLED
+// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
+
+// <0=> Default (64 MHz)
+
+#ifndef CLOCK_CONFIG_XTAL_FREQ
+#define CLOCK_CONFIG_XTAL_FREQ 0
+#endif
+
+// CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //CLOCK_ENABLED
+//
+
+// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver
+//==========================================================
+#ifndef COMP_ENABLED
+#define COMP_ENABLED 0
+#endif
+#if COMP_ENABLED
+// COMP_CONFIG_REF - Reference voltage
+
+// <0=> Internal 1.2V
+// <1=> Internal 1.8V
+// <2=> Internal 2.4V
+// <4=> VDD
+// <7=> ARef
+
+#ifndef COMP_CONFIG_REF
+#define COMP_CONFIG_REF 1
+#endif
+
+// COMP_CONFIG_MAIN_MODE - Main mode
+
+// <0=> Single ended
+// <1=> Differential
+
+#ifndef COMP_CONFIG_MAIN_MODE
+#define COMP_CONFIG_MAIN_MODE 0
+#endif
+
+// COMP_CONFIG_SPEED_MODE - Speed mode
+
+// <0=> Low power
+// <1=> Normal
+// <2=> High speed
+
+#ifndef COMP_CONFIG_SPEED_MODE
+#define COMP_CONFIG_SPEED_MODE 2
+#endif
+
+// COMP_CONFIG_HYST - Hystheresis
+
+// <0=> No
+// <1=> 50mV
+
+#ifndef COMP_CONFIG_HYST
+#define COMP_CONFIG_HYST 0
+#endif
+
+// COMP_CONFIG_ISOURCE - Current Source
+
+// <0=> Off
+// <1=> 2.5 uA
+// <2=> 5 uA
+// <3=> 10 uA
+
+#ifndef COMP_CONFIG_ISOURCE
+#define COMP_CONFIG_ISOURCE 0
+#endif
+
+// COMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_INPUT
+#define COMP_CONFIG_INPUT 0
+#endif
+
+// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_IRQ_PRIORITY
+#define COMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //COMP_ENABLED
+//
+
+// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver
+
+
+#ifndef EGU_ENABLED
+#define EGU_ENABLED 0
+#endif
+
+// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver
+//==========================================================
+#ifndef GPIOTE_ENABLED
+#define GPIOTE_ENABLED 1
+#endif
+#if GPIOTE_ENABLED
+// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
+#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4
+#endif
+
+// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef GPIOTE_CONFIG_IRQ_PRIORITY
+#define GPIOTE_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //GPIOTE_ENABLED
+//
+
+// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver
+//==========================================================
+#ifndef I2S_ENABLED
+#define I2S_ENABLED 0
+#endif
+#if I2S_ENABLED
+// I2S_CONFIG_SCK_PIN - SCK pin <0-31>
+
+
+#ifndef I2S_CONFIG_SCK_PIN
+#define I2S_CONFIG_SCK_PIN 31
+#endif
+
+// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31>
+
+
+#ifndef I2S_CONFIG_LRCK_PIN
+#define I2S_CONFIG_LRCK_PIN 30
+#endif
+
+// I2S_CONFIG_MCK_PIN - MCK pin
+#ifndef I2S_CONFIG_MCK_PIN
+#define I2S_CONFIG_MCK_PIN 255
+#endif
+
+// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDOUT_PIN
+#define I2S_CONFIG_SDOUT_PIN 29
+#endif
+
+// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDIN_PIN
+#define I2S_CONFIG_SDIN_PIN 28
+#endif
+
+// I2S_CONFIG_MASTER - Mode
+
+// <0=> Master
+// <1=> Slave
+
+#ifndef I2S_CONFIG_MASTER
+#define I2S_CONFIG_MASTER 0
+#endif
+
+// I2S_CONFIG_FORMAT - Format
+
+// <0=> I2S
+// <1=> Aligned
+
+#ifndef I2S_CONFIG_FORMAT
+#define I2S_CONFIG_FORMAT 0
+#endif
+
+// I2S_CONFIG_ALIGN - Alignment
+
+// <0=> Left
+// <1=> Right
+
+#ifndef I2S_CONFIG_ALIGN
+#define I2S_CONFIG_ALIGN 0
+#endif
+
+// I2S_CONFIG_SWIDTH - Sample width (bits)
+
+// <0=> 8
+// <1=> 16
+// <2=> 24
+
+#ifndef I2S_CONFIG_SWIDTH
+#define I2S_CONFIG_SWIDTH 1
+#endif
+
+// I2S_CONFIG_CHANNELS - Channels
+
+// <0=> Stereo
+// <1=> Left
+// <2=> Right
+
+#ifndef I2S_CONFIG_CHANNELS
+#define I2S_CONFIG_CHANNELS 1
+#endif
+
+// I2S_CONFIG_MCK_SETUP - MCK behavior
+
+// <0=> Disabled
+// <2147483648=> 32MHz/2
+// <1342177280=> 32MHz/3
+// <1073741824=> 32MHz/4
+// <805306368=> 32MHz/5
+// <671088640=> 32MHz/6
+// <536870912=> 32MHz/8
+// <402653184=> 32MHz/10
+// <369098752=> 32MHz/11
+// <285212672=> 32MHz/15
+// <268435456=> 32MHz/16
+// <201326592=> 32MHz/21
+// <184549376=> 32MHz/23
+// <142606336=> 32MHz/30
+// <138412032=> 32MHz/31
+// <134217728=> 32MHz/32
+// <100663296=> 32MHz/42
+// <68157440=> 32MHz/63
+// <34340864=> 32MHz/125
+
+#ifndef I2S_CONFIG_MCK_SETUP
+#define I2S_CONFIG_MCK_SETUP 536870912
+#endif
+
+// I2S_CONFIG_RATIO - MCK/LRCK ratio
+
+// <0=> 32x
+// <1=> 48x
+// <2=> 64x
+// <3=> 96x
+// <4=> 128x
+// <5=> 192x
+// <6=> 256x
+// <7=> 384x
+// <8=> 512x
+
+#ifndef I2S_CONFIG_RATIO
+#define I2S_CONFIG_RATIO 2000
+#endif
+
+// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef I2S_CONFIG_IRQ_PRIORITY
+#define I2S_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //I2S_ENABLED
+//
+
+// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver
+//==========================================================
+#ifndef LPCOMP_ENABLED
+#define LPCOMP_ENABLED 0
+#endif
+#if LPCOMP_ENABLED
+// LPCOMP_CONFIG_REFERENCE - Reference voltage
+
+// <0=> Supply 1/8
+// <1=> Supply 2/8
+// <2=> Supply 3/8
+// <3=> Supply 4/8
+// <4=> Supply 5/8
+// <5=> Supply 6/8
+// <6=> Supply 7/8
+// <8=> Supply 1/16 (nRF52)
+// <9=> Supply 3/16 (nRF52)
+// <10=> Supply 5/16 (nRF52)
+// <11=> Supply 7/16 (nRF52)
+// <12=> Supply 9/16 (nRF52)
+// <13=> Supply 11/16 (nRF52)
+// <14=> Supply 13/16 (nRF52)
+// <15=> Supply 15/16 (nRF52)
+// <7=> External Ref 0
+// <65543=> External Ref 1
+
+#ifndef LPCOMP_CONFIG_REFERENCE
+#define LPCOMP_CONFIG_REFERENCE 3
+#endif
+
+// LPCOMP_CONFIG_DETECTION - Detection
+
+// <0=> Crossing
+// <1=> Up
+// <2=> Down
+
+#ifndef LPCOMP_CONFIG_DETECTION
+#define LPCOMP_CONFIG_DETECTION 2
+#endif
+
+// LPCOMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_INPUT
+#define LPCOMP_CONFIG_INPUT 0
+#endif
+
+// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_IRQ_PRIORITY
+#define LPCOMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //LPCOMP_ENABLED
+//
+
+// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver
+//==========================================================
+#ifndef PDM_ENABLED
+#define PDM_ENABLED 0
+#endif
+#if PDM_ENABLED
+// PDM_CONFIG_MODE - Mode
+
+// <0=> Stereo
+// <1=> Mono
+
+#ifndef PDM_CONFIG_MODE
+#define PDM_CONFIG_MODE 1
+#endif
+
+// PDM_CONFIG_EDGE - Edge
+
+// <0=> Left falling
+// <1=> Left rising
+
+#ifndef PDM_CONFIG_EDGE
+#define PDM_CONFIG_EDGE 0
+#endif
+
+// PDM_CONFIG_CLOCK_FREQ - Clock frequency
+
+// <134217728=> 1000k
+// <138412032=> 1032k (default)
+// <142606336=> 1067k
+
+#ifndef PDM_CONFIG_CLOCK_FREQ
+#define PDM_CONFIG_CLOCK_FREQ 138412032
+#endif
+
+// PDM_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PDM_CONFIG_IRQ_PRIORITY
+#define PDM_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //PDM_ENABLED
+//
+
+// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module
+
+
+#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
+#endif
+
+// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver
+
+
+#ifndef PPI_ENABLED
+#define PPI_ENABLED 0
+#endif
+
+// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver
+//==========================================================
+#ifndef PWM_ENABLED
+#define PWM_ENABLED 0
+#endif
+#if PWM_ENABLED
+// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN
+#define PWM_DEFAULT_CONFIG_OUT0_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN
+#define PWM_DEFAULT_CONFIG_OUT1_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN
+#define PWM_DEFAULT_CONFIG_OUT2_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN
+#define PWM_DEFAULT_CONFIG_OUT3_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 MHz
+
+#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define PWM_DEFAULT_CONFIG_BASE_CLOCK 4
+#endif
+
+// PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode
+
+// <0=> Up
+// <1=> Up and Down
+
+#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE
+#define PWM_DEFAULT_CONFIG_COUNT_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value
+#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE
+#define PWM_DEFAULT_CONFIG_TOP_VALUE 1000
+#endif
+
+// PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode
+
+// <0=> Common
+// <1=> Grouped
+// <2=> Individual
+// <3=> Waveform
+
+#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE
+#define PWM_DEFAULT_CONFIG_LOAD_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_STEP_MODE - Step mode
+
+// <0=> Auto
+// <1=> Triggered
+
+#ifndef PWM_DEFAULT_CONFIG_STEP_MODE
+#define PWM_DEFAULT_CONFIG_STEP_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// PWM0_ENABLED - Enable PWM0 instance
+
+
+#ifndef PWM0_ENABLED
+#define PWM0_ENABLED 0
+#endif
+
+// PWM1_ENABLED - Enable PWM1 instance
+
+
+#ifndef PWM1_ENABLED
+#define PWM1_ENABLED 0
+#endif
+
+// PWM2_ENABLED - Enable PWM2 instance
+
+
+#ifndef PWM2_ENABLED
+#define PWM2_ENABLED 0
+#endif
+
+#endif //PWM_ENABLED
+//
+
+// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver
+//==========================================================
+#ifndef QDEC_ENABLED
+#define QDEC_ENABLED 0
+#endif
+#if QDEC_ENABLED
+// QDEC_CONFIG_REPORTPER - Report period
+
+// <0=> 10 Samples
+// <1=> 40 Samples
+// <2=> 80 Samples
+// <3=> 120 Samples
+// <4=> 160 Samples
+// <5=> 200 Samples
+// <6=> 240 Samples
+// <7=> 280 Samples
+
+#ifndef QDEC_CONFIG_REPORTPER
+#define QDEC_CONFIG_REPORTPER 0
+#endif
+
+// QDEC_CONFIG_SAMPLEPER - Sample period
+
+// <0=> 128 us
+// <1=> 256 us
+// <2=> 512 us
+// <3=> 1024 us
+// <4=> 2048 us
+// <5=> 4096 us
+// <6=> 8192 us
+// <7=> 16384 us
+
+#ifndef QDEC_CONFIG_SAMPLEPER
+#define QDEC_CONFIG_SAMPLEPER 7
+#endif
+
+// QDEC_CONFIG_PIO_A - A pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_A
+#define QDEC_CONFIG_PIO_A 31
+#endif
+
+// QDEC_CONFIG_PIO_B - B pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_B
+#define QDEC_CONFIG_PIO_B 31
+#endif
+
+// QDEC_CONFIG_PIO_LED - LED pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_LED
+#define QDEC_CONFIG_PIO_LED 31
+#endif
+
+// QDEC_CONFIG_LEDPRE - LED pre
+#ifndef QDEC_CONFIG_LEDPRE
+#define QDEC_CONFIG_LEDPRE 511
+#endif
+
+// QDEC_CONFIG_LEDPOL - LED polarity
+
+// <0=> Active low
+// <1=> Active high
+
+#ifndef QDEC_CONFIG_LEDPOL
+#define QDEC_CONFIG_LEDPOL 1
+#endif
+
+// QDEC_CONFIG_DBFEN - Debouncing enable
+
+
+#ifndef QDEC_CONFIG_DBFEN
+#define QDEC_CONFIG_DBFEN 0
+#endif
+
+// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable
+
+
+#ifndef QDEC_CONFIG_SAMPLE_INTEN
+#define QDEC_CONFIG_SAMPLE_INTEN 0
+#endif
+
+// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef QDEC_CONFIG_IRQ_PRIORITY
+#define QDEC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //QDEC_ENABLED
+//
+
+// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver
+//==========================================================
+#ifndef RNG_ENABLED
+#define RNG_ENABLED 0
+#endif
+#if RNG_ENABLED
+// RNG_CONFIG_ERROR_CORRECTION - Error correction
+
+
+#ifndef RNG_CONFIG_ERROR_CORRECTION
+#define RNG_CONFIG_ERROR_CORRECTION 0
+#endif
+
+// RNG_CONFIG_POOL_SIZE - Pool size
+#ifndef RNG_CONFIG_POOL_SIZE
+#define RNG_CONFIG_POOL_SIZE 8
+#endif
+
+// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RNG_CONFIG_IRQ_PRIORITY
+#define RNG_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //RNG_ENABLED
+//
+
+// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver
+//==========================================================
+#ifndef RTC_ENABLED
+#define RTC_ENABLED 1
+#endif
+#if RTC_ENABLED
+// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
+
+
+#ifndef RTC_DEFAULT_CONFIG_FREQUENCY
+#define RTC_DEFAULT_CONFIG_FREQUENCY 32768
+#endif
+
+// RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering
+
+
+#ifndef RTC_DEFAULT_CONFIG_RELIABLE
+#define RTC_DEFAULT_CONFIG_RELIABLE 0
+#endif
+
+// RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// RTC0_ENABLED - Enable RTC0 instance
+
+
+#ifndef RTC0_ENABLED
+#define RTC0_ENABLED 1
+#endif
+
+// RTC1_ENABLED - Enable RTC1 instance
+
+
+#ifndef RTC1_ENABLED
+#define RTC1_ENABLED 0
+#endif
+
+// RTC2_ENABLED - Enable RTC2 instance
+
+
+#ifndef RTC2_ENABLED
+#define RTC2_ENABLED 0
+#endif
+
+// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt
+#ifndef NRF_MAXIMUM_LATENCY_US
+#define NRF_MAXIMUM_LATENCY_US 2000
+#endif
+
+#endif //RTC_ENABLED
+//
+
+// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver
+//==========================================================
+#ifndef SAADC_ENABLED
+#define SAADC_ENABLED 1
+#endif
+#if SAADC_ENABLED
+// SAADC_CONFIG_RESOLUTION - Resolution
+
+// <0=> 8 bit
+// <1=> 10 bit
+// <2=> 12 bit
+// <3=> 14 bit
+
+#ifndef SAADC_CONFIG_RESOLUTION
+#define SAADC_CONFIG_RESOLUTION 1
+#endif
+
+// SAADC_CONFIG_OVERSAMPLE - Sample period
+
+// <0=> Disabled
+// <1=> 2x
+// <2=> 4x
+// <3=> 8x
+// <4=> 16x
+// <5=> 32x
+// <6=> 64x
+// <7=> 128x
+// <8=> 256x
+
+#ifndef SAADC_CONFIG_OVERSAMPLE
+#define SAADC_CONFIG_OVERSAMPLE 0
+#endif
+
+// SAADC_CONFIG_LP_MODE - Enabling low power mode
+
+
+#ifndef SAADC_CONFIG_LP_MODE
+#define SAADC_CONFIG_LP_MODE 0
+#endif
+
+// SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SAADC_CONFIG_IRQ_PRIORITY
+#define SAADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //SAADC_ENABLED
+//
+
+// SPIS_ENABLED - nrf_drv_spis - SPI Slave driver
+//==========================================================
+#ifndef SPIS_ENABLED
+#define SPIS_ENABLED 0
+#endif
+#if SPIS_ENABLED
+// SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// SPIS_DEFAULT_MODE - Mode
+
+// <0=> MODE_0
+// <1=> MODE_1
+// <2=> MODE_2
+// <3=> MODE_3
+
+#ifndef SPIS_DEFAULT_MODE
+#define SPIS_DEFAULT_MODE 0
+#endif
+
+// SPIS_DEFAULT_BIT_ORDER - SPIS default bit order
+
+// <0=> MSB first
+// <1=> LSB first
+
+#ifndef SPIS_DEFAULT_BIT_ORDER
+#define SPIS_DEFAULT_BIT_ORDER 0
+#endif
+
+// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
+
+
+#ifndef SPIS_DEFAULT_DEF
+#define SPIS_DEFAULT_DEF 255
+#endif
+
+// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
+
+
+#ifndef SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_ORC 255
+#endif
+
+// SPIS0_ENABLED - Enable SPIS0 instance
+
+
+#ifndef SPIS0_ENABLED
+#define SPIS0_ENABLED 0
+#endif
+
+// SPIS1_ENABLED - Enable SPIS1 instance
+
+
+#ifndef SPIS1_ENABLED
+#define SPIS1_ENABLED 0
+#endif
+
+// SPIS2_ENABLED - Enable SPIS2 instance
+
+
+#ifndef SPIS2_ENABLED
+#define SPIS2_ENABLED 0
+#endif
+
+#endif //SPIS_ENABLED
+//
+
+// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver
+//==========================================================
+#ifndef SPI_ENABLED
+#define SPI_ENABLED 0
+#endif
+#if SPI_ENABLED
+// SPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SPI_CONFIG_LOG_ENABLED
+#define SPI_CONFIG_LOG_ENABLED 0
+#endif
+#if SPI_CONFIG_LOG_ENABLED
+// SPI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef SPI_CONFIG_LOG_LEVEL
+#define SPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_INFO_COLOR
+#define SPI_CONFIG_INFO_COLOR 0
+#endif
+
+// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_DEBUG_COLOR
+#define SPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //SPI_CONFIG_LOG_ENABLED
+//
+
+// SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// SPI0_ENABLED - Enable SPI0 instance
+//==========================================================
+#ifndef SPI0_ENABLED
+#define SPI0_ENABLED 0
+#endif
+#if SPI0_ENABLED
+// SPI0_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI0_USE_EASY_DMA
+#define SPI0_USE_EASY_DMA 1
+#endif
+
+#endif //SPI0_ENABLED
+//
+
+// SPI1_ENABLED - Enable SPI1 instance
+//==========================================================
+#ifndef SPI1_ENABLED
+#define SPI1_ENABLED 0
+#endif
+#if SPI1_ENABLED
+// SPI1_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI1_USE_EASY_DMA
+#define SPI1_USE_EASY_DMA 1
+#endif
+
+#endif //SPI1_ENABLED
+//
+
+// SPI2_ENABLED - Enable SPI2 instance
+//==========================================================
+#ifndef SPI2_ENABLED
+#define SPI2_ENABLED 0
+#endif
+#if SPI2_ENABLED
+// SPI2_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI2_USE_EASY_DMA
+#define SPI2_USE_EASY_DMA 1
+#endif
+
+#endif //SPI2_ENABLED
+//
+
+#endif //SPI_ENABLED
+//
+
+// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver
+//==========================================================
+#ifndef TIMER_ENABLED
+#define TIMER_ENABLED 0
+#endif
+#if TIMER_ENABLED
+// TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 kHz
+// <8=> 62.5 kHz
+// <9=> 31.25 kHz
+
+#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY
+#define TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
+
+// <0=> Timer
+// <1=> Counter
+
+#ifndef TIMER_DEFAULT_CONFIG_MODE
+#define TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
+
+// <0=> 16 bit
+// <1=> 8 bit
+// <2=> 24 bit
+// <3=> 32 bit
+
+#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TIMER0_ENABLED - Enable TIMER0 instance
+
+
+#ifndef TIMER0_ENABLED
+#define TIMER0_ENABLED 0
+#endif
+
+// TIMER1_ENABLED - Enable TIMER1 instance
+
+
+#ifndef TIMER1_ENABLED
+#define TIMER1_ENABLED 0
+#endif
+
+// TIMER2_ENABLED - Enable TIMER2 instance
+
+
+#ifndef TIMER2_ENABLED
+#define TIMER2_ENABLED 0
+#endif
+
+// TIMER3_ENABLED - Enable TIMER3 instance
+
+
+#ifndef TIMER3_ENABLED
+#define TIMER3_ENABLED 0
+#endif
+
+// TIMER4_ENABLED - Enable TIMER4 instance
+
+
+#ifndef TIMER4_ENABLED
+#define TIMER4_ENABLED 0
+#endif
+
+#endif //TIMER_ENABLED
+//
+
+// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver
+//==========================================================
+#ifndef TWIS_ENABLED
+#define TWIS_ENABLED 0
+#endif
+#if TWIS_ENABLED
+// TWIS_DEFAULT_CONFIG_ADDR0 - Address0
+#ifndef TWIS_DEFAULT_CONFIG_ADDR0
+#define TWIS_DEFAULT_CONFIG_ADDR0 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_ADDR1 - Address1
+#ifndef TWIS_DEFAULT_CONFIG_ADDR1
+#define TWIS_DEFAULT_CONFIG_ADDR1 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL
+#define TWIS_DEFAULT_CONFIG_SCL_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL
+#define TWIS_DEFAULT_CONFIG_SDA_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TWIS0_ENABLED - Enable TWIS0 instance
+
+
+#ifndef TWIS0_ENABLED
+#define TWIS0_ENABLED 0
+#endif
+
+// TWIS1_ENABLED - Enable TWIS1 instance
+
+
+#ifndef TWIS1_ENABLED
+#define TWIS1_ENABLED 0
+#endif
+
+// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once
+
+
+// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
+
+#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+#endif
+
+// TWIS_NO_SYNC_MODE - Remove support for synchronous mode
+
+
+// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
+
+#ifndef TWIS_NO_SYNC_MODE
+#define TWIS_NO_SYNC_MODE 0
+#endif
+
+#endif //TWIS_ENABLED
+//
+
+// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver
+//==========================================================
+#ifndef TWI_ENABLED
+#define TWI_ENABLED 0
+#endif
+#if TWI_ENABLED
+// TWI_DEFAULT_CONFIG_FREQUENCY - Frequency
+
+// <26738688=> 100k
+// <67108864=> 250k
+// <104857600=> 400k
+
+#ifndef TWI_DEFAULT_CONFIG_FREQUENCY
+#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init
+
+
+#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT
+#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit
+
+
+#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TWI0_ENABLED - Enable TWI0 instance
+//==========================================================
+#ifndef TWI0_ENABLED
+#define TWI0_ENABLED 0
+#endif
+#if TWI0_ENABLED
+// TWI0_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI0_USE_EASY_DMA
+#define TWI0_USE_EASY_DMA 0
+#endif
+
+#endif //TWI0_ENABLED
+//
+
+// TWI1_ENABLED - Enable TWI1 instance
+//==========================================================
+#ifndef TWI1_ENABLED
+#define TWI1_ENABLED 0
+#endif
+#if TWI1_ENABLED
+// TWI1_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI1_USE_EASY_DMA
+#define TWI1_USE_EASY_DMA 0
+#endif
+
+#endif //TWI1_ENABLED
+//
+
+#endif //TWI_ENABLED
+//
+
+// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver
+//==========================================================
+#ifndef UART_ENABLED
+#define UART_ENABLED 1
+#endif
+#if UART_ENABLED
+// UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef UART_DEFAULT_CONFIG_HWFC
+#define UART_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// UART_DEFAULT_CONFIG_PARITY - Parity
+
+// <0=> Excluded
+// <14=> Included
+
+#ifndef UART_DEFAULT_CONFIG_PARITY
+#define UART_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef UART_DEFAULT_CONFIG_BAUDRATE
+#define UART_DEFAULT_CONFIG_BAUDRATE 30801920
+#endif
+
+// UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA
+
+
+#ifndef UART0_CONFIG_USE_EASY_DMA
+#define UART0_CONFIG_USE_EASY_DMA 1
+#endif
+
+// UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA
+
+
+#ifndef UART_EASY_DMA_SUPPORT
+#define UART_EASY_DMA_SUPPORT 1
+#endif
+
+// UART_LEGACY_SUPPORT - Driver supporting Legacy mode
+
+
+#ifndef UART_LEGACY_SUPPORT
+#define UART_LEGACY_SUPPORT 1
+#endif
+
+#endif //UART_ENABLED
+//
+
+// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver
+//==========================================================
+#ifndef WDT_ENABLED
+#define WDT_ENABLED 0
+#endif
+#if WDT_ENABLED
+// WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode
+
+// <1=> Run in SLEEP, Pause in HALT
+// <8=> Pause in SLEEP, Run in HALT
+// <9=> Run in SLEEP and HALT
+// <0=> Pause in SLEEP and HALT
+
+#ifndef WDT_CONFIG_BEHAVIOUR
+#define WDT_CONFIG_BEHAVIOUR 1
+#endif
+
+// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295>
+
+
+#ifndef WDT_CONFIG_RELOAD_VALUE
+#define WDT_CONFIG_RELOAD_VALUE 2000
+#endif
+
+// WDT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef WDT_CONFIG_IRQ_PRIORITY
+#define WDT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //WDT_ENABLED
+//
+
+//
+//==========================================================
+
+// nRF_Libraries
+
+//==========================================================
+// APP_FIFO_ENABLED - app_fifo - Software FIFO implementation
+
+
+#ifndef APP_FIFO_ENABLED
+#define APP_FIFO_ENABLED 1
+#endif
+
+// APP_MAILBOX_ENABLED - app_mailbox - Thread safe mailbox
+
+
+#ifndef APP_MAILBOX_ENABLED
+#define APP_MAILBOX_ENABLED 0
+#endif
+
+// APP_PWM_ENABLED - app_pwm - PWM functionality
+
+
+#ifndef APP_PWM_ENABLED
+#define APP_PWM_ENABLED 0
+#endif
+
+// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
+//==========================================================
+#ifndef APP_SCHEDULER_ENABLED
+#define APP_SCHEDULER_ENABLED 1
+#endif
+#if APP_SCHEDULER_ENABLED
+// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature
+
+
+#ifndef APP_SCHEDULER_WITH_PAUSE
+#define APP_SCHEDULER_WITH_PAUSE 0
+#endif
+
+// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling
+
+
+#ifndef APP_SCHEDULER_WITH_PROFILER
+#define APP_SCHEDULER_WITH_PROFILER 0
+#endif
+
+#endif //APP_SCHEDULER_ENABLED
+//
+
+// APP_TIMER_ENABLED - app_timer - Application timer functionality
+//==========================================================
+#ifndef APP_TIMER_ENABLED
+#define APP_TIMER_ENABLED 1
+#endif
+#if APP_TIMER_ENABLED
+// APP_TIMER_WITH_PROFILER - Enable app_timer profiling
+
+
+#ifndef APP_TIMER_WITH_PROFILER
+#define APP_TIMER_WITH_PROFILER 0
+#endif
+
+// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on
+
+
+// If option is enabled RTC is kept running even if there is no active timers.
+// This option can be used when app_timer is used for timestamping.
+
+#ifndef APP_TIMER_KEEPS_RTC_ACTIVE
+#define APP_TIMER_KEEPS_RTC_ACTIVE 0
+#endif
+
+#endif //APP_TIMER_ENABLED
+//
+
+// APP_TWI_ENABLED - app_twi - TWI transaction manager
+
+
+#ifndef APP_TWI_ENABLED
+#define APP_TWI_ENABLED 0
+#endif
+
+// APP_UART_ENABLED - app_uart - UART driver
+//==========================================================
+#ifndef APP_UART_ENABLED
+#define APP_UART_ENABLED 1
+#endif
+#if APP_UART_ENABLED
+// APP_UART_DRIVER_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef APP_UART_DRIVER_INSTANCE
+#define APP_UART_DRIVER_INSTANCE 0
+#endif
+
+#endif //APP_UART_ENABLED
+//
+
+// BUTTON_ENABLED - app_button - buttons handling module
+
+
+#ifndef BUTTON_ENABLED
+#define BUTTON_ENABLED 1
+#endif
+
+// CRC16_ENABLED - crc16 - CRC16 calculation routines
+
+
+#ifndef CRC16_ENABLED
+#define CRC16_ENABLED 1
+#endif
+
+// CRC32_ENABLED - crc32 - CRC32 calculation routines
+
+
+#ifndef CRC32_ENABLED
+#define CRC32_ENABLED 1
+#endif
+
+// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library
+
+
+#ifndef ECC_ENABLED
+#define ECC_ENABLED 0
+#endif
+
+// FDS_ENABLED - fds - Flash data storage module
+//==========================================================
+#ifndef FDS_ENABLED
+#define FDS_ENABLED 1
+#endif
+#if FDS_ENABLED
+// FDS_OP_QUEUE_SIZE - Size of the internal queue.
+#ifndef FDS_OP_QUEUE_SIZE
+#define FDS_OP_QUEUE_SIZE 4
+#endif
+
+// FDS_CHUNK_QUEUE_SIZE - Determines how many @ref fds_record_chunk_t structures can be buffered at any time.
+#ifndef FDS_CHUNK_QUEUE_SIZE
+#define FDS_CHUNK_QUEUE_SIZE 8
+#endif
+
+// FDS_MAX_USERS - Maximum number of callbacks that can be registered.
+#ifndef FDS_MAX_USERS
+#define FDS_MAX_USERS 8
+#endif
+
+// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use.
+// One of the virtual pages is reserved by the system for garbage collection.
+// Therefore, the minimum is two virtual pages: one page to store data and
+// one page to be used by the system for garbage collection. The total amount
+// of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES
+// @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes.
+
+#ifndef FDS_VIRTUAL_PAGES
+#define FDS_VIRTUAL_PAGES 3
+#endif
+
+// FDS_VIRTUAL_PAGE_SIZE - The size of a virtual page of flash memory, expressed in number of 4-byte words.
+
+
+// By default, a virtual page is the same size as a physical page.
+// The size of a virtual page must be a multiple of the size of a physical page.
+// <1024=> 1024
+// <2048=> 2048
+
+#ifndef FDS_VIRTUAL_PAGE_SIZE
+#define FDS_VIRTUAL_PAGE_SIZE 1024
+#endif
+
+#endif //FDS_ENABLED
+//
+
+// FSTORAGE_ENABLED - fstorage - Flash storage module
+//==========================================================
+#ifndef FSTORAGE_ENABLED
+#define FSTORAGE_ENABLED 1
+#endif
+#if FSTORAGE_ENABLED
+// FS_QUEUE_SIZE - Configures the size of the internal queue.
+// Increase this if there are many users, or if it is likely that many
+// operation will be queued at once without waiting for the previous operations
+// to complete. In general, increase the queue size if you frequently receive
+// @ref FS_ERR_QUEUE_FULL errors when calling @ref fs_store or @ref fs_erase.
+
+#ifndef FS_QUEUE_SIZE
+#define FS_QUEUE_SIZE 4
+#endif
+
+// FS_OP_MAX_RETRIES - Number attempts to execute an operation if the SoftDevice fails.
+// Increase this value if events return the @ref FS_ERR_OPERATION_TIMEOUT
+// error often. The SoftDevice may fail to schedule flash access due to high BLE activity.
+
+#ifndef FS_OP_MAX_RETRIES
+#define FS_OP_MAX_RETRIES 3
+#endif
+
+// FS_MAX_WRITE_SIZE_WORDS - Maximum number of words to be written to flash in a single operation.
+// Tweaking this value can increase the chances of the SoftDevice being
+// able to fit flash operations in between radio activity. This value is bound by the
+// maximum number of words which the SoftDevice can write to flash in a single call to
+// @ref sd_flash_write, which is 256 words for nRF51 ICs and 1024 words for nRF52 ICs.
+
+#ifndef FS_MAX_WRITE_SIZE_WORDS
+#define FS_MAX_WRITE_SIZE_WORDS 1024
+#endif
+
+#endif //FSTORAGE_ENABLED
+//
+
+// HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release
+
+
+#ifndef HARDFAULT_HANDLER_ENABLED
+#define HARDFAULT_HANDLER_ENABLED 0
+#endif
+
+// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI
+//==========================================================
+#ifndef HCI_MEM_POOL_ENABLED
+#define HCI_MEM_POOL_ENABLED 0
+#endif
+#if HCI_MEM_POOL_ENABLED
+// HCI_TX_BUF_SIZE - TX buffer size in bytes.
+#ifndef HCI_TX_BUF_SIZE
+#define HCI_TX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_SIZE - RX buffer size in bytes.
+#ifndef HCI_RX_BUF_SIZE
+#define HCI_RX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size.
+#ifndef HCI_RX_BUF_QUEUE_SIZE
+#define HCI_RX_BUF_QUEUE_SIZE 4
+#endif
+
+#endif //HCI_MEM_POOL_ENABLED
+//
+
+// HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI
+//==========================================================
+#ifndef HCI_SLIP_ENABLED
+#define HCI_SLIP_ENABLED 0
+#endif
+#if HCI_SLIP_ENABLED
+// HCI_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef HCI_UART_BAUDRATE
+#define HCI_UART_BAUDRATE 30801920
+#endif
+
+// HCI_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef HCI_UART_FLOW_CONTROL
+#define HCI_UART_FLOW_CONTROL 0
+#endif
+
+// HCI_UART_RX_PIN - UART RX pin
+#ifndef HCI_UART_RX_PIN
+#define HCI_UART_RX_PIN 8
+#endif
+
+// HCI_UART_TX_PIN - UART TX pin
+#ifndef HCI_UART_TX_PIN
+#define HCI_UART_TX_PIN 6
+#endif
+
+// HCI_UART_RTS_PIN - UART RTS pin
+#ifndef HCI_UART_RTS_PIN
+#define HCI_UART_RTS_PIN 5
+#endif
+
+// HCI_UART_CTS_PIN - UART CTS pin
+#ifndef HCI_UART_CTS_PIN
+#define HCI_UART_CTS_PIN 7
+#endif
+
+#endif //HCI_SLIP_ENABLED
+//
+
+// HCI_TRANSPORT_ENABLED - hci_transport - HCI transport
+//==========================================================
+#ifndef HCI_TRANSPORT_ENABLED
+#define HCI_TRANSPORT_ENABLED 0
+#endif
+#if HCI_TRANSPORT_ENABLED
+// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits.
+#ifndef HCI_MAX_PACKET_SIZE_IN_BITS
+#define HCI_MAX_PACKET_SIZE_IN_BITS 8000
+#endif
+
+#endif //HCI_TRANSPORT_ENABLED
+//
+
+// LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module
+
+
+#ifndef LED_SOFTBLINK_ENABLED
+#define LED_SOFTBLINK_ENABLED 0
+#endif
+
+// LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module
+
+
+#ifndef LOW_POWER_PWM_ENABLED
+#define LOW_POWER_PWM_ENABLED 0
+#endif
+
+// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator
+//==========================================================
+#ifndef MEM_MANAGER_ENABLED
+#define MEM_MANAGER_ENABLED 0
+#endif
+#if MEM_MANAGER_ENABLED
+// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1
+#endif
+
+// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block.
+// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT
+#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block.
+// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE
+#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block.
+// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256
+#endif
+
+// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module.
+
+
+#ifndef MEM_MANAGER_ENABLE_LOGS
+#define MEM_MANAGER_ENABLE_LOGS 0
+#endif
+
+// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module.
+
+
+#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK
+#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0
+#endif
+
+#endif //MEM_MANAGER_ENABLED
+//
+
+// NRF_CSENSE_ENABLED - nrf_csense - nrf_csense module
+//==========================================================
+#ifndef NRF_CSENSE_ENABLED
+#define NRF_CSENSE_ENABLED 0
+#endif
+#if NRF_CSENSE_ENABLED
+// NRF_CSENSE_PAD_HYSTERESIS - Minimal value of change to decide that pad was touched.
+#ifndef NRF_CSENSE_PAD_HYSTERESIS
+#define NRF_CSENSE_PAD_HYSTERESIS 15
+#endif
+
+// NRF_CSENSE_PAD_DEVIATION - Minimal value measured on pad to take its value while calculating step.
+#ifndef NRF_CSENSE_PAD_DEVIATION
+#define NRF_CSENSE_PAD_DEVIATION 70
+#endif
+
+// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on pad to take its value into account.
+#ifndef NRF_CSENSE_MIN_PAD_VALUE
+#define NRF_CSENSE_MIN_PAD_VALUE 20
+#endif
+
+// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance.
+#ifndef NRF_CSENSE_MAX_PADS_NUMBER
+#define NRF_CSENSE_MAX_PADS_NUMBER 20
+#endif
+
+// NRF_CSENSE_MAX_VALUE - Maximum normalized value got from measurement.
+#ifndef NRF_CSENSE_MAX_VALUE
+#define NRF_CSENSE_MAX_VALUE 1000
+#endif
+
+// NRF_CSENSE_OUTPUT_PIN - Output pin used by lower module.
+// This is only used when running on NRF51.
+
+#ifndef NRF_CSENSE_OUTPUT_PIN
+#define NRF_CSENSE_OUTPUT_PIN 30
+#endif
+
+#endif //NRF_CSENSE_ENABLED
+//
+
+// NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor module
+//==========================================================
+#ifndef NRF_DRV_CSENSE_ENABLED
+#define NRF_DRV_CSENSE_ENABLED 0
+#endif
+#if NRF_DRV_CSENSE_ENABLED
+// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (except nRF51)
+#ifndef TIMER0_FOR_CSENSE
+#define TIMER0_FOR_CSENSE 1
+#endif
+
+// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (except nRF51)
+#ifndef TIMER1_FOR_CSENSE
+#define TIMER1_FOR_CSENSE 2
+#endif
+
+// MEASUREMENT_PERIOD - Single measurement period.
+// Time of single measurement can be calculated as T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). I_SOURCE, VUP and VDOWN are values used to initialize COMP and C is capacitance of used pad.
+
+#ifndef MEASUREMENT_PERIOD
+#define MEASUREMENT_PERIOD 20
+#endif
+
+#endif //NRF_DRV_CSENSE_ENABLED
+//
+
+// SLIP_ENABLED - slip - SLIP encoding decoding
+
+
+#ifndef SLIP_ENABLED
+#define SLIP_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_Log
+
+//==========================================================
+// NRF_LOG_ENABLED - nrf_log - Logging
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 0
+#endif
+#if NRF_LOG_ENABLED
+// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string
+//==========================================================
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+#if NRF_LOG_USES_COLORS
+// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+// NRF_LOG_ERROR_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_ERROR_COLOR
+#define NRF_LOG_ERROR_COLOR 0
+#endif
+
+// NRF_LOG_WARNING_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_WARNING_COLOR
+#define NRF_LOG_WARNING_COLOR 0
+#endif
+
+#endif //NRF_LOG_USES_COLORS
+//
+
+// NRF_LOG_DEFAULT_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 3
+#endif
+
+// NRF_LOG_DEFERRED - Enable deffered logger.
+
+// Log data is buffered and can be processed in idle.
+//==========================================================
+#ifndef NRF_LOG_DEFERRED
+#define NRF_LOG_DEFERRED 1
+#endif
+#if NRF_LOG_DEFERRED
+// NRF_LOG_DEFERRED_BUFSIZE - Size of the buffer for logs in words.
+// Must be power of 2
+
+#ifndef NRF_LOG_DEFERRED_BUFSIZE
+#define NRF_LOG_DEFERRED_BUFSIZE 256
+#endif
+
+#endif //NRF_LOG_DEFERRED
+//
+
+// NRF_LOG_USES_TIMESTAMP - Enable timestamping
+
+
+// Function for getting the timestamp is provided by the user
+
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+
+#endif //NRF_LOG_ENABLED
+//
+
+// nrf_log_backend - Logging sink
+
+//==========================================================
+// NRF_LOG_BACKEND_MAX_STRING_LENGTH - Buffer for storing single output string
+// Logger backend RAM usage is determined by this value.
+
+#ifndef NRF_LOG_BACKEND_MAX_STRING_LENGTH
+#define NRF_LOG_BACKEND_MAX_STRING_LENGTH 256
+#endif
+
+// NRF_LOG_TIMESTAMP_DIGITS - Number of digits for timestamp
+// If higher resolution timestamp source is used it might be needed to increase that
+
+#ifndef NRF_LOG_TIMESTAMP_DIGITS
+#define NRF_LOG_TIMESTAMP_DIGITS 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_USES_UART - If enabled data is printed over UART
+//==========================================================
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_UART
+#define NRF_LOG_BACKEND_SERIAL_USES_UART 1
+#endif
+#if NRF_LOG_BACKEND_SERIAL_USES_UART
+// NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE
+#define NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE 30801920
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_TX_PIN - UART TX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_TX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_TX_PIN 6
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RX_PIN - UART RX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RX_PIN 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN - UART RTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN 5
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN - UART CTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN 7
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL
+#define NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL 0
+#endif
+
+// NRF_LOG_BACKEND_UART_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef NRF_LOG_BACKEND_UART_INSTANCE
+#define NRF_LOG_BACKEND_UART_INSTANCE 0
+#endif
+
+#endif //NRF_LOG_BACKEND_SERIAL_USES_UART
+//
+
+// NRF_LOG_BACKEND_SERIAL_USES_RTT - If enabled data is printed using RTT
+
+
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_RTT
+#define NRF_LOG_BACKEND_SERIAL_USES_RTT 0
+#endif
+
+//
+//==========================================================
+
+//
+//==========================================================
+
+// <<< end of configuration section >>>
+#endif //SDK_CONFIG_H
+
diff --git a/ARM/Nordic/nRF52/exemples/Blinky/.cproject b/ARM/Nordic/nRF52/exemples/Blinky/.cproject
index f6c906bc..c3603493 100755
--- a/ARM/Nordic/nRF52/exemples/Blinky/.cproject
+++ b/ARM/Nordic/nRF52/exemples/Blinky/.cproject
@@ -81,7 +81,7 @@
-
+
@@ -289,4 +289,5 @@
+
diff --git a/ARM/Nordic/nRF52/exemples/Blinky/src/main.c b/ARM/Nordic/nRF52/exemples/Blinky/src/main.c
index 72b6bf47..1cb0ad09 100755
--- a/ARM/Nordic/nRF52/exemples/Blinky/src/main.c
+++ b/ARM/Nordic/nRF52/exemples/Blinky/src/main.c
@@ -10,24 +10,24 @@
int main(void)
{
- IOPinConfig(0, BLUEIO_LED_BLUE, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
- IOPinSet(0, BLUEIO_LED_BLUE);
- IOPinConfig(0, BLUEIO_LED_GREEN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
- IOPinSet(0, BLUEIO_LED_GREEN);
- IOPinConfig(0, BLUEIO_LED_RED, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
- IOPinSet(0, BLUEIO_LED_RED);
+ IOPinConfig(0, BLUEIO_LED_BLUE_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
+ IOPinSet(0, BLUEIO_LED_BLUE_PIN);
+ IOPinConfig(0, BLUEIO_LED_GREEN_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
+ IOPinSet(0, BLUEIO_LED_GREEN_PIN);
+ IOPinConfig(0, BLUEIO_LED_RED_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
+ IOPinSet(0, BLUEIO_LED_RED_PIN);
while(true)
{
- IOPinClear(0, BLUEIO_LED_BLUE);
+ IOPinClear(0, BLUEIO_LED_BLUE_PIN);
usDelay(1000000);
- IOPinSet(0, BLUEIO_LED_BLUE);
- IOPinClear(0, BLUEIO_LED_GREEN);
+ IOPinSet(0, BLUEIO_LED_BLUE_PIN);
+ IOPinClear(0, BLUEIO_LED_GREEN_PIN);
usDelay(1000000);
- IOPinSet(0, BLUEIO_LED_GREEN);
- IOPinClear(0, BLUEIO_LED_RED);
+ IOPinSet(0, BLUEIO_LED_GREEN_PIN);
+ IOPinClear(0, BLUEIO_LED_RED_PIN);
usDelay(1000000);
- IOPinSet(0, BLUEIO_LED_RED);
+ IOPinSet(0, BLUEIO_LED_RED_PIN);
usDelay(1000000);
}
}
diff --git a/ARM/Nordic/nRF52/exemples/LmxBlue/.cproject b/ARM/Nordic/nRF52/exemples/LmxBlue/.cproject
new file mode 100644
index 00000000..276b3fc0
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/LmxBlue/.cproject
@@ -0,0 +1,435 @@
+
+
+
+
+
+
+
+
+
+
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+
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+
+
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+
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diff --git a/ARM/Nordic/nRF52/exemples/LmxBlue/.gitignore b/ARM/Nordic/nRF52/exemples/LmxBlue/.gitignore
new file mode 100644
index 00000000..ac01e665
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/LmxBlue/.gitignore
@@ -0,0 +1,2 @@
+/Debug/
+/Release/
diff --git a/ARM/Nordic/nRF52/exemples/LmxBlue/.project b/ARM/Nordic/nRF52/exemples/LmxBlue/.project
new file mode 100644
index 00000000..f4b5f3b1
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/LmxBlue/.project
@@ -0,0 +1,329 @@
+
+
+ LmxBlue
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.core.ccnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ src/nRF5_SDK
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/softdevice
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_advertising
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/nrf_ble_gatt
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/peer_manager
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/clock
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/hal
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/bootloader
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/crc32
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/fds
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/fstorage
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/scheduler
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/timer
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/util
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/softdevice/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_advertising/ble_advertising.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_advertising/ble_advertising.c
+
+
+ src/nRF5_SDK/ble/ble_services/ble_dis
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/common/ble_advdata.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_advdata.c
+
+
+ src/nRF5_SDK/ble/common/ble_conn_params.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_conn_params.c
+
+
+ src/nRF5_SDK/ble/common/ble_conn_state.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_conn_state.c
+
+
+ src/nRF5_SDK/ble/common/ble_srv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_srv_common.c
+
+
+ src/nRF5_SDK/ble/nrf_ble_gatt/nrf_ble_gatt.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/nrf_ble_gatt/nrf_ble_gatt.c
+
+
+ src/nRF5_SDK/ble/peer_manager/gatt_cache_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/gatt_cache_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/gatts_cache_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/gatts_cache_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/id_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/id_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_data.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_data.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_data_storage.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_data_storage.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_database.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_database.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_id.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_id.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/pm_buffer.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/pm_buffer.c
+
+
+ src/nRF5_SDK/ble/peer_manager/pm_mutex.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/pm_mutex.c
+
+
+ src/nRF5_SDK/ble/peer_manager/security_dispatcher.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/security_dispatcher.c
+
+
+ src/nRF5_SDK/ble/peer_manager/security_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/security_manager.c
+
+
+ src/nRF5_SDK/drivers_nrf/clock/nrf_drv_clock.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/clock/nrf_drv_clock.c
+
+
+ src/nRF5_SDK/drivers_nrf/common/nrf_drv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/common/nrf_drv_common.c
+
+
+ src/nRF5_SDK/drivers_nrf/hal/nrf_nvmc.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/hal/nrf_nvmc.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/crc32/crc32.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crc32/crc32.c
+
+
+ src/nRF5_SDK/libraries/fds/fds.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fds/fds.c
+
+
+ src/nRF5_SDK/libraries/fstorage/fstorage.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fstorage/fstorage.c
+
+
+ src/nRF5_SDK/libraries/scheduler/app_scheduler.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/scheduler/app_scheduler.c
+
+
+ src/nRF5_SDK/libraries/timer/app_timer.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/timer/app_timer.c
+
+
+ src/nRF5_SDK/libraries/timer/app_timer_appsh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/timer/app_timer_appsh.c
+
+
+ src/nRF5_SDK/libraries/util/app_error.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_error.c
+
+
+ src/nRF5_SDK/libraries/util/app_error_weak.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_error_weak.c
+
+
+ src/nRF5_SDK/libraries/util/app_util_platform.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_util_platform.c
+
+
+ src/nRF5_SDK/libraries/util/sdk_mapped_flags.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/sdk_mapped_flags.c
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services/ble_dis/ble_dis.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_services/ble_dis/ble_dis.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu_flash.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu_flash.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu_settings.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu_settings.c
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler/softdevice_handler.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/softdevice/common/softdevice_handler/softdevice_handler.c
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler/softdevice_handler_appsh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/softdevice/common/softdevice_handler/softdevice_handler_appsh.c
+
+
+
diff --git a/ARM/Nordic/nRF52/exemples/LmxBlue/src/lmx_blueio.h b/ARM/Nordic/nRF52/exemples/LmxBlue/src/lmx_blueio.h
new file mode 100644
index 00000000..39d972be
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/LmxBlue/src/lmx_blueio.h
@@ -0,0 +1,41 @@
+/*
+ * lmx_blueio.h
+ *
+ * Created on: Jan 7, 2017
+ * Author: hoan
+ */
+
+#ifndef __LMX_BLUEIO_H__
+#define __LMX_BLUEIO_H__
+
+// Base UUID : 00000000-4070-11e4-84d0-0002a5d5c51b
+#define LMXBLUE_UUID_BASE { 0x1b, 0xc5, 0xd5, 0xa5, 0x02, 0x00, 0xd0, 0x84, \
+ 0xe4, 0x11, 0x70, 0x40, 0x00, 0x00, 0x00, 0x00 }
+#define LMXBLUE_UUID_SERVICE 0x1
+#define LMXBLUE_UUID_RDCHAR 0x2
+#define LMXBLUE_UUID_WRCHAR 0x3
+
+typedef enum {
+
+} LMX;
+
+#pragma pack(push, 1)
+
+typedef struct {
+ uint32_t Value;
+ union {
+ uint32_t Code:8;
+ uint32_t Resv:8;
+ uint32_t Module:12;
+ uint32_t Type:4;
+ };
+} BLUEIO_PKTHDR;
+
+typedef struct {
+ BLUEIO_PKTHDR Hdr;
+ uint8_t Data[1];
+} BLUEIO_PKT;
+
+#pragma pop()
+
+#endif /* LMX_BLUEIO_H_ */
diff --git a/ARM/Nordic/nRF52/exemples/LmxBlue/src/main.cpp b/ARM/Nordic/nRF52/exemples/LmxBlue/src/main.cpp
new file mode 100644
index 00000000..03dbd6ab
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/LmxBlue/src/main.cpp
@@ -0,0 +1,172 @@
+//============================================================================
+// Name : main.cpp
+// Author : Nguyen Hoan Hoang
+// Version :
+// Copyright : Copyright (c) 2017, I-SYST
+// Description : Hello World in C++
+//============================================================================
+#include
+#include
+
+#include "softdevice_handler.h"
+#include "app_scheduler.h"
+#include "app_timer_appsh.h"
+#include "nrf_dfu_settings.h"
+#include "ble_dis.h"
+
+#include "istddef.h"
+#include "iopincfg.h"
+#include "iopinctrl.h"
+#include "stddev.h"
+#include "custom_board.h"
+#include "lmx_blueio.h"
+#include "blueio_blesrvc.h"
+#include "ledmxio.h"
+#include "ble_periph_app.h"
+
+#define DEVICE_NAME "LmxBLue" /**< Name of device. Will be included in the advertising data. */
+
+#define MANUFACTURER_NAME "I-SYST inc." /**< Manufacturer. Will be passed to Device Information Service. */
+#define MODEL_NUM "LMX_DISPLAY" /**< Model number. Will be passed to Device Information Service. */
+#define MANUFACTURER_ID ISYST_BLUETOOTH_ID /**< Manufacturer ID, part of System ID. Will be passed to Device Information Service. */
+#define ORG_UNIQUE_ID ISYST_BLUETOOTH_ID /**< Organizational Unique ID, part of System ID. Will be passed to Device Information Service. */
+
+#define APP_ADV_INTERVAL MSEC_TO_UNITS(64, UNIT_0_625_MS) /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */
+#define APP_ADV_TIMEOUT_IN_SECONDS 180 /**< The advertising timeout (in units of seconds). */
+
+void LmxBlueSrvcWrCallback(BLUEIOSRVC *pBlueIOSvc, uint8_t *pData, int Offset, int Len);
+
+static const IOPINCFG s_GpioPins[] = {
+ {BLUEIO_CONNECT_LED_PORT, BLUEIO_CONNECT_LED_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // BLE connect
+};
+
+static const int s_NbGpioPins = sizeof(s_GpioPins) / sizeof(IOPINCFG);
+
+static const ble_uuid_t s_AdvUuids[] = {
+ {LMXBLUE_UUID_SERVICE, BLE_UUID_TYPE_VENDOR_BEGIN}
+};
+
+static const char s_RdCharDescString[] = {
+ "LmxBlue data characteristic",
+};
+
+static const char s_WdCharDescString[] = {
+ "LmxBlue write characteristic",
+};
+
+uint8_t g_ManData[8];
+
+
+const BLUEIOSRVC_CFG s_LmxBlueSrvcCfg = {
+ BLUEIOSRVC_SECTYPE_NONE,
+ LMXBLUE_UUID_BASE,
+ LMXBLUE_UUID_SERVICE,
+ LMXBLUE_UUID_RDCHAR,
+ 20, BLUEIOSVC_CHAR_PROP_READ | BLUEIOSVC_CHAR_PROP_NOTIFY,
+ s_RdCharDescString,
+ LMXBLUE_UUID_WRCHAR,
+ 20, BLUEIOSVC_CHAR_PROP_WRITEWORESP,
+ s_WdCharDescString,
+ LmxBlueSrvcWrCallback
+};
+
+BLUEIOSRVC g_LmxBleSrvc;
+
+const BLEAPP_CFG s_BleAppCfg = {
+ BLEAPP_MODE_APPSCHED,
+ "LMXBLUE",
+ "IBB-LMXBLUE",
+ "I-SYST inc.",
+ ISYST_BLUETOOTH_ID,
+ g_ManData,
+ sizeof(g_ManData),
+ BLEAPP_SECTYPE_NONE,
+ BLEAPP_SECEXCHG_NONE,
+ s_AdvUuids,
+ sizeof(s_AdvUuids) / sizeof(ble_uuid_t),
+ APP_ADV_INTERVAL,
+ APP_ADV_TIMEOUT_IN_SECONDS,
+ BLUEIO_CONNECT_LED_PORT,
+ BLUEIO_CONNECT_LED_PIN
+};
+
+// I/O pins connection
+LEDMXIOCFG g_IOCfg = {
+ LMXBLUE_WR_PIN, // WR pin
+ LMXBLUE_RD_PIN, // RD pin
+ LMXBLUE_DATA_PIN, // Data pin
+ LMXBLUE_EN_PIN, // En pin
+ { LMXBLUE_AD0_PIN, LMXBLUE_AD1_PIN, LMXBLUE_AD2_PIN, LMXBLUE_AD3_PIN,}, // CS pins
+ 4, // Number of CS pins
+ LMXBLUE_CSTYPE
+};
+
+// Display board configuration
+LEDMXCFG g_LmxCfg = {
+ &g_IOCfg,
+ 8, // Number of display board in daisy chain, only one in this case
+ {0, 1, 2, 3, 4, 5, 6, 7}, // display board ordering
+};
+
+LEDMXDEV g_LmxDev = {0,};
+
+void LmxBlueSrvcWrCallback(BLUEIOSRVC *pBlueIOSvc, uint8_t *pData, int Offset, int Len)
+{
+
+}
+
+void BlePeriphAppEvtDispatch(ble_evt_t * p_ble_evt)
+{
+ BlueIOBleSvcEvtHandler(&g_LmxBleSrvc, p_ble_evt);
+}
+
+void BlePeriphAppInitUserStorage()
+{
+}
+
+void BlePeriphAppInitServices()
+{
+ uint32_t err_code;
+
+ err_code = BlueIOBleSrvcInit(&g_LmxBleSrvc, &s_LmxBlueSrvcCfg);
+ APP_ERROR_CHECK(err_code);
+}
+
+void HardwareInit()
+{
+ // config Bluetooth connection state LED
+ IOPinCfg(s_GpioPins, s_NbGpioPins);
+
+ // Initialize IDM-LMX3208 series displays
+ LedMxInit(&g_LmxDev, &g_LmxCfg);
+
+ LedMxPrintLeft(&g_LmxDev, "IBB-LMXBLUE Blutooth LED matrix demo");
+}
+
+//
+// Print a greeting message on standard output and exit.
+//
+// On embedded platforms this might require semi-hosting or similar.
+//
+// For example, for toolchains derived from GNU Tools for Embedded,
+// to enable semi-hosting, the following was added to the linker:
+//
+// --specs=rdimon.specs -Wl,--start-group -lgcc -lc -lc -lm -lrdimon -Wl,--end-group
+//
+// Adjust it for other toolchains.
+//
+
+int main()
+{
+ HardwareInit();
+
+ BlePeriphAppInit(&s_BleAppCfg, true);
+
+ // This function will not return
+ BlePeriphAppRun();
+
+ return 0;
+}
+
+
+
diff --git a/ARM/Nordic/nRF52/exemples/LmxBlue/src/sdk_config.h b/ARM/Nordic/nRF52/exemples/LmxBlue/src/sdk_config.h
new file mode 100644
index 00000000..e15b22db
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/LmxBlue/src/sdk_config.h
@@ -0,0 +1,2388 @@
+
+
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#ifdef USE_APP_CONFIG
+#include "app_config.h"
+#endif
+// nRF_BLE
+
+//==========================================================
+// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module
+
+
+#ifndef BLE_ADVERTISING_ENABLED
+#define BLE_ADVERTISING_ENABLED 1
+#endif
+
+// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands
+
+
+#ifndef BLE_DTM_ENABLED
+#define BLE_DTM_ENABLED 0
+#endif
+
+// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library
+
+
+#ifndef BLE_RACP_ENABLED
+#define BLE_RACP_ENABLED 1
+#endif
+
+// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write)
+
+
+#ifndef NRF_BLE_QWR_ENABLED
+#define NRF_BLE_QWR_ENABLED 0
+#endif
+
+// PEER_MANAGER_ENABLED - peer_manager - Peer Manager
+
+
+#ifndef PEER_MANAGER_ENABLED
+#define PEER_MANAGER_ENABLED 1
+#endif
+
+//
+//==========================================================
+
+// nRF_BLE_Services
+
+//==========================================================
+// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client
+
+
+#ifndef BLE_ANCS_C_ENABLED
+#define BLE_ANCS_C_ENABLED 0
+#endif
+
+// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client
+
+
+#ifndef BLE_ANS_C_ENABLED
+#define BLE_ANS_C_ENABLED 0
+#endif
+
+// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client
+
+
+#ifndef BLE_BAS_C_ENABLED
+#define BLE_BAS_C_ENABLED 0
+#endif
+
+// BLE_BAS_ENABLED - ble_bas - Battery Service
+
+
+#ifndef BLE_BAS_ENABLED
+#define BLE_BAS_ENABLED 1
+#endif
+
+// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service
+
+
+#ifndef BLE_CSCS_ENABLED
+#define BLE_CSCS_ENABLED 0
+#endif
+
+// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client
+
+
+#ifndef BLE_CTS_C_ENABLED
+#define BLE_CTS_C_ENABLED 0
+#endif
+
+// BLE_DIS_ENABLED - ble_dis - Device Information Service
+
+
+#ifndef BLE_DIS_ENABLED
+#define BLE_DIS_ENABLED 1
+#endif
+
+// BLE_GLS_ENABLED - ble_gls - Glucose Service
+
+
+#ifndef BLE_GLS_ENABLED
+#define BLE_GLS_ENABLED 1
+#endif
+
+// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service
+
+
+#ifndef BLE_HIDS_ENABLED
+#define BLE_HIDS_ENABLED 0
+#endif
+
+// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client
+
+
+#ifndef BLE_HRS_C_ENABLED
+#define BLE_HRS_C_ENABLED 0
+#endif
+
+// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service
+
+
+#ifndef BLE_HRS_ENABLED
+#define BLE_HRS_ENABLED 0
+#endif
+
+// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service
+
+
+#ifndef BLE_HTS_ENABLED
+#define BLE_HTS_ENABLED 0
+#endif
+
+// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client
+
+
+#ifndef BLE_IAS_C_ENABLED
+#define BLE_IAS_C_ENABLED 0
+#endif
+
+// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service
+
+
+#ifndef BLE_IAS_ENABLED
+#define BLE_IAS_ENABLED 0
+#endif
+
+// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client
+
+
+#ifndef BLE_LBS_C_ENABLED
+#define BLE_LBS_C_ENABLED 0
+#endif
+
+// BLE_LBS_ENABLED - ble_lbs - LED Button Service
+
+
+#ifndef BLE_LBS_ENABLED
+#define BLE_LBS_ENABLED 0
+#endif
+
+// BLE_LLS_ENABLED - ble_lls - Link Loss Service
+
+
+#ifndef BLE_LLS_ENABLED
+#define BLE_LLS_ENABLED 0
+#endif
+
+// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service
+
+
+#ifndef BLE_NUS_C_ENABLED
+#define BLE_NUS_C_ENABLED 0
+#endif
+
+// BLE_NUS_ENABLED - ble_nus - Nordic UART Service
+
+
+#ifndef BLE_NUS_ENABLED
+#define BLE_NUS_ENABLED 0
+#endif
+
+// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client
+
+
+#ifndef BLE_RSCS_C_ENABLED
+#define BLE_RSCS_C_ENABLED 0
+#endif
+
+// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service
+
+
+#ifndef BLE_RSCS_ENABLED
+#define BLE_RSCS_ENABLED 0
+#endif
+
+// BLE_TPS_ENABLED - ble_tps - TX Power Service
+
+
+#ifndef BLE_TPS_ENABLED
+#define BLE_TPS_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_Drivers
+
+//==========================================================
+// ADC_ENABLED - nrf_drv_adc - Driver for ADC peripheral (nRF51)
+//==========================================================
+#ifndef ADC_ENABLED
+#define ADC_ENABLED 0
+#endif
+#if ADC_ENABLED
+// ADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef ADC_CONFIG_IRQ_PRIORITY
+#define ADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //ADC_ENABLED
+//
+
+// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef CLOCK_ENABLED
+#define CLOCK_ENABLED 1
+#endif
+#if CLOCK_ENABLED
+// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
+
+// <0=> Default (64 MHz)
+
+#ifndef CLOCK_CONFIG_XTAL_FREQ
+#define CLOCK_CONFIG_XTAL_FREQ 0
+#endif
+
+// CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //CLOCK_ENABLED
+//
+
+// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver
+//==========================================================
+#ifndef COMP_ENABLED
+#define COMP_ENABLED 0
+#endif
+#if COMP_ENABLED
+// COMP_CONFIG_REF - Reference voltage
+
+// <0=> Internal 1.2V
+// <1=> Internal 1.8V
+// <2=> Internal 2.4V
+// <4=> VDD
+// <7=> ARef
+
+#ifndef COMP_CONFIG_REF
+#define COMP_CONFIG_REF 1
+#endif
+
+// COMP_CONFIG_MAIN_MODE - Main mode
+
+// <0=> Single ended
+// <1=> Differential
+
+#ifndef COMP_CONFIG_MAIN_MODE
+#define COMP_CONFIG_MAIN_MODE 0
+#endif
+
+// COMP_CONFIG_SPEED_MODE - Speed mode
+
+// <0=> Low power
+// <1=> Normal
+// <2=> High speed
+
+#ifndef COMP_CONFIG_SPEED_MODE
+#define COMP_CONFIG_SPEED_MODE 2
+#endif
+
+// COMP_CONFIG_HYST - Hystheresis
+
+// <0=> No
+// <1=> 50mV
+
+#ifndef COMP_CONFIG_HYST
+#define COMP_CONFIG_HYST 0
+#endif
+
+// COMP_CONFIG_ISOURCE - Current Source
+
+// <0=> Off
+// <1=> 2.5 uA
+// <2=> 5 uA
+// <3=> 10 uA
+
+#ifndef COMP_CONFIG_ISOURCE
+#define COMP_CONFIG_ISOURCE 0
+#endif
+
+// COMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_INPUT
+#define COMP_CONFIG_INPUT 0
+#endif
+
+// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_IRQ_PRIORITY
+#define COMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //COMP_ENABLED
+//
+
+// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver
+
+
+#ifndef EGU_ENABLED
+#define EGU_ENABLED 0
+#endif
+
+// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver
+//==========================================================
+#ifndef GPIOTE_ENABLED
+#define GPIOTE_ENABLED 1
+#endif
+#if GPIOTE_ENABLED
+// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
+#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4
+#endif
+
+// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef GPIOTE_CONFIG_IRQ_PRIORITY
+#define GPIOTE_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //GPIOTE_ENABLED
+//
+
+// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver
+//==========================================================
+#ifndef I2S_ENABLED
+#define I2S_ENABLED 0
+#endif
+#if I2S_ENABLED
+// I2S_CONFIG_SCK_PIN - SCK pin <0-31>
+
+
+#ifndef I2S_CONFIG_SCK_PIN
+#define I2S_CONFIG_SCK_PIN 31
+#endif
+
+// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31>
+
+
+#ifndef I2S_CONFIG_LRCK_PIN
+#define I2S_CONFIG_LRCK_PIN 30
+#endif
+
+// I2S_CONFIG_MCK_PIN - MCK pin
+#ifndef I2S_CONFIG_MCK_PIN
+#define I2S_CONFIG_MCK_PIN 255
+#endif
+
+// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDOUT_PIN
+#define I2S_CONFIG_SDOUT_PIN 29
+#endif
+
+// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDIN_PIN
+#define I2S_CONFIG_SDIN_PIN 28
+#endif
+
+// I2S_CONFIG_MASTER - Mode
+
+// <0=> Master
+// <1=> Slave
+
+#ifndef I2S_CONFIG_MASTER
+#define I2S_CONFIG_MASTER 0
+#endif
+
+// I2S_CONFIG_FORMAT - Format
+
+// <0=> I2S
+// <1=> Aligned
+
+#ifndef I2S_CONFIG_FORMAT
+#define I2S_CONFIG_FORMAT 0
+#endif
+
+// I2S_CONFIG_ALIGN - Alignment
+
+// <0=> Left
+// <1=> Right
+
+#ifndef I2S_CONFIG_ALIGN
+#define I2S_CONFIG_ALIGN 0
+#endif
+
+// I2S_CONFIG_SWIDTH - Sample width (bits)
+
+// <0=> 8
+// <1=> 16
+// <2=> 24
+
+#ifndef I2S_CONFIG_SWIDTH
+#define I2S_CONFIG_SWIDTH 1
+#endif
+
+// I2S_CONFIG_CHANNELS - Channels
+
+// <0=> Stereo
+// <1=> Left
+// <2=> Right
+
+#ifndef I2S_CONFIG_CHANNELS
+#define I2S_CONFIG_CHANNELS 1
+#endif
+
+// I2S_CONFIG_MCK_SETUP - MCK behavior
+
+// <0=> Disabled
+// <2147483648=> 32MHz/2
+// <1342177280=> 32MHz/3
+// <1073741824=> 32MHz/4
+// <805306368=> 32MHz/5
+// <671088640=> 32MHz/6
+// <536870912=> 32MHz/8
+// <402653184=> 32MHz/10
+// <369098752=> 32MHz/11
+// <285212672=> 32MHz/15
+// <268435456=> 32MHz/16
+// <201326592=> 32MHz/21
+// <184549376=> 32MHz/23
+// <142606336=> 32MHz/30
+// <138412032=> 32MHz/31
+// <134217728=> 32MHz/32
+// <100663296=> 32MHz/42
+// <68157440=> 32MHz/63
+// <34340864=> 32MHz/125
+
+#ifndef I2S_CONFIG_MCK_SETUP
+#define I2S_CONFIG_MCK_SETUP 536870912
+#endif
+
+// I2S_CONFIG_RATIO - MCK/LRCK ratio
+
+// <0=> 32x
+// <1=> 48x
+// <2=> 64x
+// <3=> 96x
+// <4=> 128x
+// <5=> 192x
+// <6=> 256x
+// <7=> 384x
+// <8=> 512x
+
+#ifndef I2S_CONFIG_RATIO
+#define I2S_CONFIG_RATIO 2000
+#endif
+
+// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef I2S_CONFIG_IRQ_PRIORITY
+#define I2S_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //I2S_ENABLED
+//
+
+// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver
+//==========================================================
+#ifndef LPCOMP_ENABLED
+#define LPCOMP_ENABLED 0
+#endif
+#if LPCOMP_ENABLED
+// LPCOMP_CONFIG_REFERENCE - Reference voltage
+
+// <0=> Supply 1/8
+// <1=> Supply 2/8
+// <2=> Supply 3/8
+// <3=> Supply 4/8
+// <4=> Supply 5/8
+// <5=> Supply 6/8
+// <6=> Supply 7/8
+// <8=> Supply 1/16 (nRF52)
+// <9=> Supply 3/16 (nRF52)
+// <10=> Supply 5/16 (nRF52)
+// <11=> Supply 7/16 (nRF52)
+// <12=> Supply 9/16 (nRF52)
+// <13=> Supply 11/16 (nRF52)
+// <14=> Supply 13/16 (nRF52)
+// <15=> Supply 15/16 (nRF52)
+// <7=> External Ref 0
+// <65543=> External Ref 1
+
+#ifndef LPCOMP_CONFIG_REFERENCE
+#define LPCOMP_CONFIG_REFERENCE 3
+#endif
+
+// LPCOMP_CONFIG_DETECTION - Detection
+
+// <0=> Crossing
+// <1=> Up
+// <2=> Down
+
+#ifndef LPCOMP_CONFIG_DETECTION
+#define LPCOMP_CONFIG_DETECTION 2
+#endif
+
+// LPCOMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_INPUT
+#define LPCOMP_CONFIG_INPUT 0
+#endif
+
+// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_IRQ_PRIORITY
+#define LPCOMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //LPCOMP_ENABLED
+//
+
+// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver
+//==========================================================
+#ifndef PDM_ENABLED
+#define PDM_ENABLED 0
+#endif
+#if PDM_ENABLED
+// PDM_CONFIG_MODE - Mode
+
+// <0=> Stereo
+// <1=> Mono
+
+#ifndef PDM_CONFIG_MODE
+#define PDM_CONFIG_MODE 1
+#endif
+
+// PDM_CONFIG_EDGE - Edge
+
+// <0=> Left falling
+// <1=> Left rising
+
+#ifndef PDM_CONFIG_EDGE
+#define PDM_CONFIG_EDGE 0
+#endif
+
+// PDM_CONFIG_CLOCK_FREQ - Clock frequency
+
+// <134217728=> 1000k
+// <138412032=> 1032k (default)
+// <142606336=> 1067k
+
+#ifndef PDM_CONFIG_CLOCK_FREQ
+#define PDM_CONFIG_CLOCK_FREQ 138412032
+#endif
+
+// PDM_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PDM_CONFIG_IRQ_PRIORITY
+#define PDM_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //PDM_ENABLED
+//
+
+// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module
+
+
+#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
+#endif
+
+// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver
+
+
+#ifndef PPI_ENABLED
+#define PPI_ENABLED 0
+#endif
+
+// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver
+//==========================================================
+#ifndef PWM_ENABLED
+#define PWM_ENABLED 0
+#endif
+#if PWM_ENABLED
+// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN
+#define PWM_DEFAULT_CONFIG_OUT0_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN
+#define PWM_DEFAULT_CONFIG_OUT1_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN
+#define PWM_DEFAULT_CONFIG_OUT2_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN
+#define PWM_DEFAULT_CONFIG_OUT3_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 MHz
+
+#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define PWM_DEFAULT_CONFIG_BASE_CLOCK 4
+#endif
+
+// PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode
+
+// <0=> Up
+// <1=> Up and Down
+
+#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE
+#define PWM_DEFAULT_CONFIG_COUNT_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value
+#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE
+#define PWM_DEFAULT_CONFIG_TOP_VALUE 1000
+#endif
+
+// PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode
+
+// <0=> Common
+// <1=> Grouped
+// <2=> Individual
+// <3=> Waveform
+
+#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE
+#define PWM_DEFAULT_CONFIG_LOAD_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_STEP_MODE - Step mode
+
+// <0=> Auto
+// <1=> Triggered
+
+#ifndef PWM_DEFAULT_CONFIG_STEP_MODE
+#define PWM_DEFAULT_CONFIG_STEP_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// PWM0_ENABLED - Enable PWM0 instance
+
+
+#ifndef PWM0_ENABLED
+#define PWM0_ENABLED 0
+#endif
+
+// PWM1_ENABLED - Enable PWM1 instance
+
+
+#ifndef PWM1_ENABLED
+#define PWM1_ENABLED 0
+#endif
+
+// PWM2_ENABLED - Enable PWM2 instance
+
+
+#ifndef PWM2_ENABLED
+#define PWM2_ENABLED 0
+#endif
+
+#endif //PWM_ENABLED
+//
+
+// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver
+//==========================================================
+#ifndef QDEC_ENABLED
+#define QDEC_ENABLED 0
+#endif
+#if QDEC_ENABLED
+// QDEC_CONFIG_REPORTPER - Report period
+
+// <0=> 10 Samples
+// <1=> 40 Samples
+// <2=> 80 Samples
+// <3=> 120 Samples
+// <4=> 160 Samples
+// <5=> 200 Samples
+// <6=> 240 Samples
+// <7=> 280 Samples
+
+#ifndef QDEC_CONFIG_REPORTPER
+#define QDEC_CONFIG_REPORTPER 0
+#endif
+
+// QDEC_CONFIG_SAMPLEPER - Sample period
+
+// <0=> 128 us
+// <1=> 256 us
+// <2=> 512 us
+// <3=> 1024 us
+// <4=> 2048 us
+// <5=> 4096 us
+// <6=> 8192 us
+// <7=> 16384 us
+
+#ifndef QDEC_CONFIG_SAMPLEPER
+#define QDEC_CONFIG_SAMPLEPER 7
+#endif
+
+// QDEC_CONFIG_PIO_A - A pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_A
+#define QDEC_CONFIG_PIO_A 31
+#endif
+
+// QDEC_CONFIG_PIO_B - B pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_B
+#define QDEC_CONFIG_PIO_B 31
+#endif
+
+// QDEC_CONFIG_PIO_LED - LED pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_LED
+#define QDEC_CONFIG_PIO_LED 31
+#endif
+
+// QDEC_CONFIG_LEDPRE - LED pre
+#ifndef QDEC_CONFIG_LEDPRE
+#define QDEC_CONFIG_LEDPRE 511
+#endif
+
+// QDEC_CONFIG_LEDPOL - LED polarity
+
+// <0=> Active low
+// <1=> Active high
+
+#ifndef QDEC_CONFIG_LEDPOL
+#define QDEC_CONFIG_LEDPOL 1
+#endif
+
+// QDEC_CONFIG_DBFEN - Debouncing enable
+
+
+#ifndef QDEC_CONFIG_DBFEN
+#define QDEC_CONFIG_DBFEN 0
+#endif
+
+// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable
+
+
+#ifndef QDEC_CONFIG_SAMPLE_INTEN
+#define QDEC_CONFIG_SAMPLE_INTEN 0
+#endif
+
+// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef QDEC_CONFIG_IRQ_PRIORITY
+#define QDEC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //QDEC_ENABLED
+//
+
+// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver
+//==========================================================
+#ifndef RNG_ENABLED
+#define RNG_ENABLED 0
+#endif
+#if RNG_ENABLED
+// RNG_CONFIG_ERROR_CORRECTION - Error correction
+
+
+#ifndef RNG_CONFIG_ERROR_CORRECTION
+#define RNG_CONFIG_ERROR_CORRECTION 0
+#endif
+
+// RNG_CONFIG_POOL_SIZE - Pool size
+#ifndef RNG_CONFIG_POOL_SIZE
+#define RNG_CONFIG_POOL_SIZE 8
+#endif
+
+// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RNG_CONFIG_IRQ_PRIORITY
+#define RNG_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //RNG_ENABLED
+//
+
+// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver
+//==========================================================
+#ifndef RTC_ENABLED
+#define RTC_ENABLED 1
+#endif
+#if RTC_ENABLED
+// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
+
+
+#ifndef RTC_DEFAULT_CONFIG_FREQUENCY
+#define RTC_DEFAULT_CONFIG_FREQUENCY 32768
+#endif
+
+// RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering
+
+
+#ifndef RTC_DEFAULT_CONFIG_RELIABLE
+#define RTC_DEFAULT_CONFIG_RELIABLE 0
+#endif
+
+// RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// RTC0_ENABLED - Enable RTC0 instance
+
+
+#ifndef RTC0_ENABLED
+#define RTC0_ENABLED 1
+#endif
+
+// RTC1_ENABLED - Enable RTC1 instance
+
+
+#ifndef RTC1_ENABLED
+#define RTC1_ENABLED 0
+#endif
+
+// RTC2_ENABLED - Enable RTC2 instance
+
+
+#ifndef RTC2_ENABLED
+#define RTC2_ENABLED 0
+#endif
+
+// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt
+#ifndef NRF_MAXIMUM_LATENCY_US
+#define NRF_MAXIMUM_LATENCY_US 2000
+#endif
+
+#endif //RTC_ENABLED
+//
+
+// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver
+//==========================================================
+#ifndef SAADC_ENABLED
+#define SAADC_ENABLED 1
+#endif
+#if SAADC_ENABLED
+// SAADC_CONFIG_RESOLUTION - Resolution
+
+// <0=> 8 bit
+// <1=> 10 bit
+// <2=> 12 bit
+// <3=> 14 bit
+
+#ifndef SAADC_CONFIG_RESOLUTION
+#define SAADC_CONFIG_RESOLUTION 1
+#endif
+
+// SAADC_CONFIG_OVERSAMPLE - Sample period
+
+// <0=> Disabled
+// <1=> 2x
+// <2=> 4x
+// <3=> 8x
+// <4=> 16x
+// <5=> 32x
+// <6=> 64x
+// <7=> 128x
+// <8=> 256x
+
+#ifndef SAADC_CONFIG_OVERSAMPLE
+#define SAADC_CONFIG_OVERSAMPLE 0
+#endif
+
+// SAADC_CONFIG_LP_MODE - Enabling low power mode
+
+
+#ifndef SAADC_CONFIG_LP_MODE
+#define SAADC_CONFIG_LP_MODE 0
+#endif
+
+// SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SAADC_CONFIG_IRQ_PRIORITY
+#define SAADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //SAADC_ENABLED
+//
+
+// SPIS_ENABLED - nrf_drv_spis - SPI Slave driver
+//==========================================================
+#ifndef SPIS_ENABLED
+#define SPIS_ENABLED 0
+#endif
+#if SPIS_ENABLED
+// SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// SPIS_DEFAULT_MODE - Mode
+
+// <0=> MODE_0
+// <1=> MODE_1
+// <2=> MODE_2
+// <3=> MODE_3
+
+#ifndef SPIS_DEFAULT_MODE
+#define SPIS_DEFAULT_MODE 0
+#endif
+
+// SPIS_DEFAULT_BIT_ORDER - SPIS default bit order
+
+// <0=> MSB first
+// <1=> LSB first
+
+#ifndef SPIS_DEFAULT_BIT_ORDER
+#define SPIS_DEFAULT_BIT_ORDER 0
+#endif
+
+// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
+
+
+#ifndef SPIS_DEFAULT_DEF
+#define SPIS_DEFAULT_DEF 255
+#endif
+
+// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
+
+
+#ifndef SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_ORC 255
+#endif
+
+// SPIS0_ENABLED - Enable SPIS0 instance
+
+
+#ifndef SPIS0_ENABLED
+#define SPIS0_ENABLED 0
+#endif
+
+// SPIS1_ENABLED - Enable SPIS1 instance
+
+
+#ifndef SPIS1_ENABLED
+#define SPIS1_ENABLED 0
+#endif
+
+// SPIS2_ENABLED - Enable SPIS2 instance
+
+
+#ifndef SPIS2_ENABLED
+#define SPIS2_ENABLED 0
+#endif
+
+#endif //SPIS_ENABLED
+//
+
+// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver
+//==========================================================
+#ifndef SPI_ENABLED
+#define SPI_ENABLED 0
+#endif
+#if SPI_ENABLED
+// SPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SPI_CONFIG_LOG_ENABLED
+#define SPI_CONFIG_LOG_ENABLED 0
+#endif
+#if SPI_CONFIG_LOG_ENABLED
+// SPI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef SPI_CONFIG_LOG_LEVEL
+#define SPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_INFO_COLOR
+#define SPI_CONFIG_INFO_COLOR 0
+#endif
+
+// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_DEBUG_COLOR
+#define SPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //SPI_CONFIG_LOG_ENABLED
+//
+
+// SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// SPI0_ENABLED - Enable SPI0 instance
+//==========================================================
+#ifndef SPI0_ENABLED
+#define SPI0_ENABLED 0
+#endif
+#if SPI0_ENABLED
+// SPI0_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI0_USE_EASY_DMA
+#define SPI0_USE_EASY_DMA 1
+#endif
+
+#endif //SPI0_ENABLED
+//
+
+// SPI1_ENABLED - Enable SPI1 instance
+//==========================================================
+#ifndef SPI1_ENABLED
+#define SPI1_ENABLED 0
+#endif
+#if SPI1_ENABLED
+// SPI1_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI1_USE_EASY_DMA
+#define SPI1_USE_EASY_DMA 1
+#endif
+
+#endif //SPI1_ENABLED
+//
+
+// SPI2_ENABLED - Enable SPI2 instance
+//==========================================================
+#ifndef SPI2_ENABLED
+#define SPI2_ENABLED 0
+#endif
+#if SPI2_ENABLED
+// SPI2_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI2_USE_EASY_DMA
+#define SPI2_USE_EASY_DMA 1
+#endif
+
+#endif //SPI2_ENABLED
+//
+
+#endif //SPI_ENABLED
+//
+
+// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver
+//==========================================================
+#ifndef TIMER_ENABLED
+#define TIMER_ENABLED 0
+#endif
+#if TIMER_ENABLED
+// TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 kHz
+// <8=> 62.5 kHz
+// <9=> 31.25 kHz
+
+#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY
+#define TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
+
+// <0=> Timer
+// <1=> Counter
+
+#ifndef TIMER_DEFAULT_CONFIG_MODE
+#define TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
+
+// <0=> 16 bit
+// <1=> 8 bit
+// <2=> 24 bit
+// <3=> 32 bit
+
+#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TIMER0_ENABLED - Enable TIMER0 instance
+
+
+#ifndef TIMER0_ENABLED
+#define TIMER0_ENABLED 0
+#endif
+
+// TIMER1_ENABLED - Enable TIMER1 instance
+
+
+#ifndef TIMER1_ENABLED
+#define TIMER1_ENABLED 0
+#endif
+
+// TIMER2_ENABLED - Enable TIMER2 instance
+
+
+#ifndef TIMER2_ENABLED
+#define TIMER2_ENABLED 0
+#endif
+
+// TIMER3_ENABLED - Enable TIMER3 instance
+
+
+#ifndef TIMER3_ENABLED
+#define TIMER3_ENABLED 0
+#endif
+
+// TIMER4_ENABLED - Enable TIMER4 instance
+
+
+#ifndef TIMER4_ENABLED
+#define TIMER4_ENABLED 0
+#endif
+
+#endif //TIMER_ENABLED
+//
+
+// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver
+//==========================================================
+#ifndef TWIS_ENABLED
+#define TWIS_ENABLED 0
+#endif
+#if TWIS_ENABLED
+// TWIS_DEFAULT_CONFIG_ADDR0 - Address0
+#ifndef TWIS_DEFAULT_CONFIG_ADDR0
+#define TWIS_DEFAULT_CONFIG_ADDR0 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_ADDR1 - Address1
+#ifndef TWIS_DEFAULT_CONFIG_ADDR1
+#define TWIS_DEFAULT_CONFIG_ADDR1 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL
+#define TWIS_DEFAULT_CONFIG_SCL_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL
+#define TWIS_DEFAULT_CONFIG_SDA_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TWIS0_ENABLED - Enable TWIS0 instance
+
+
+#ifndef TWIS0_ENABLED
+#define TWIS0_ENABLED 0
+#endif
+
+// TWIS1_ENABLED - Enable TWIS1 instance
+
+
+#ifndef TWIS1_ENABLED
+#define TWIS1_ENABLED 0
+#endif
+
+// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once
+
+
+// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
+
+#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+#endif
+
+// TWIS_NO_SYNC_MODE - Remove support for synchronous mode
+
+
+// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
+
+#ifndef TWIS_NO_SYNC_MODE
+#define TWIS_NO_SYNC_MODE 0
+#endif
+
+#endif //TWIS_ENABLED
+//
+
+// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver
+//==========================================================
+#ifndef TWI_ENABLED
+#define TWI_ENABLED 0
+#endif
+#if TWI_ENABLED
+// TWI_DEFAULT_CONFIG_FREQUENCY - Frequency
+
+// <26738688=> 100k
+// <67108864=> 250k
+// <104857600=> 400k
+
+#ifndef TWI_DEFAULT_CONFIG_FREQUENCY
+#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init
+
+
+#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT
+#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit
+
+
+#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// TWI0_ENABLED - Enable TWI0 instance
+//==========================================================
+#ifndef TWI0_ENABLED
+#define TWI0_ENABLED 0
+#endif
+#if TWI0_ENABLED
+// TWI0_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI0_USE_EASY_DMA
+#define TWI0_USE_EASY_DMA 0
+#endif
+
+#endif //TWI0_ENABLED
+//
+
+// TWI1_ENABLED - Enable TWI1 instance
+//==========================================================
+#ifndef TWI1_ENABLED
+#define TWI1_ENABLED 0
+#endif
+#if TWI1_ENABLED
+// TWI1_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI1_USE_EASY_DMA
+#define TWI1_USE_EASY_DMA 0
+#endif
+
+#endif //TWI1_ENABLED
+//
+
+#endif //TWI_ENABLED
+//
+
+// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver
+//==========================================================
+#ifndef UART_ENABLED
+#define UART_ENABLED 1
+#endif
+#if UART_ENABLED
+// UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef UART_DEFAULT_CONFIG_HWFC
+#define UART_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// UART_DEFAULT_CONFIG_PARITY - Parity
+
+// <0=> Excluded
+// <14=> Included
+
+#ifndef UART_DEFAULT_CONFIG_PARITY
+#define UART_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef UART_DEFAULT_CONFIG_BAUDRATE
+#define UART_DEFAULT_CONFIG_BAUDRATE 30801920
+#endif
+
+// UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA
+
+
+#ifndef UART0_CONFIG_USE_EASY_DMA
+#define UART0_CONFIG_USE_EASY_DMA 1
+#endif
+
+// UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA
+
+
+#ifndef UART_EASY_DMA_SUPPORT
+#define UART_EASY_DMA_SUPPORT 1
+#endif
+
+// UART_LEGACY_SUPPORT - Driver supporting Legacy mode
+
+
+#ifndef UART_LEGACY_SUPPORT
+#define UART_LEGACY_SUPPORT 1
+#endif
+
+#endif //UART_ENABLED
+//
+
+// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver
+//==========================================================
+#ifndef WDT_ENABLED
+#define WDT_ENABLED 0
+#endif
+#if WDT_ENABLED
+// WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode
+
+// <1=> Run in SLEEP, Pause in HALT
+// <8=> Pause in SLEEP, Run in HALT
+// <9=> Run in SLEEP and HALT
+// <0=> Pause in SLEEP and HALT
+
+#ifndef WDT_CONFIG_BEHAVIOUR
+#define WDT_CONFIG_BEHAVIOUR 1
+#endif
+
+// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295>
+
+
+#ifndef WDT_CONFIG_RELOAD_VALUE
+#define WDT_CONFIG_RELOAD_VALUE 2000
+#endif
+
+// WDT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef WDT_CONFIG_IRQ_PRIORITY
+#define WDT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+#endif //WDT_ENABLED
+//
+
+//
+//==========================================================
+
+// nRF_Libraries
+
+//==========================================================
+// APP_FIFO_ENABLED - app_fifo - Software FIFO implementation
+
+
+#ifndef APP_FIFO_ENABLED
+#define APP_FIFO_ENABLED 1
+#endif
+
+// APP_MAILBOX_ENABLED - app_mailbox - Thread safe mailbox
+
+
+#ifndef APP_MAILBOX_ENABLED
+#define APP_MAILBOX_ENABLED 0
+#endif
+
+// APP_PWM_ENABLED - app_pwm - PWM functionality
+
+
+#ifndef APP_PWM_ENABLED
+#define APP_PWM_ENABLED 0
+#endif
+
+// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
+//==========================================================
+#ifndef APP_SCHEDULER_ENABLED
+#define APP_SCHEDULER_ENABLED 1
+#endif
+#if APP_SCHEDULER_ENABLED
+// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature
+
+
+#ifndef APP_SCHEDULER_WITH_PAUSE
+#define APP_SCHEDULER_WITH_PAUSE 0
+#endif
+
+// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling
+
+
+#ifndef APP_SCHEDULER_WITH_PROFILER
+#define APP_SCHEDULER_WITH_PROFILER 0
+#endif
+
+#endif //APP_SCHEDULER_ENABLED
+//
+
+// APP_TIMER_ENABLED - app_timer - Application timer functionality
+//==========================================================
+#ifndef APP_TIMER_ENABLED
+#define APP_TIMER_ENABLED 1
+#endif
+#if APP_TIMER_ENABLED
+// APP_TIMER_WITH_PROFILER - Enable app_timer profiling
+
+
+#ifndef APP_TIMER_WITH_PROFILER
+#define APP_TIMER_WITH_PROFILER 0
+#endif
+
+// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on
+
+
+// If option is enabled RTC is kept running even if there is no active timers.
+// This option can be used when app_timer is used for timestamping.
+
+#ifndef APP_TIMER_KEEPS_RTC_ACTIVE
+#define APP_TIMER_KEEPS_RTC_ACTIVE 0
+#endif
+
+#endif //APP_TIMER_ENABLED
+//
+
+// APP_TWI_ENABLED - app_twi - TWI transaction manager
+
+
+#ifndef APP_TWI_ENABLED
+#define APP_TWI_ENABLED 0
+#endif
+
+// APP_UART_ENABLED - app_uart - UART driver
+//==========================================================
+#ifndef APP_UART_ENABLED
+#define APP_UART_ENABLED 1
+#endif
+#if APP_UART_ENABLED
+// APP_UART_DRIVER_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef APP_UART_DRIVER_INSTANCE
+#define APP_UART_DRIVER_INSTANCE 0
+#endif
+
+#endif //APP_UART_ENABLED
+//
+
+// BUTTON_ENABLED - app_button - buttons handling module
+
+
+#ifndef BUTTON_ENABLED
+#define BUTTON_ENABLED 1
+#endif
+
+// CRC16_ENABLED - crc16 - CRC16 calculation routines
+
+
+#ifndef CRC16_ENABLED
+#define CRC16_ENABLED 1
+#endif
+
+// CRC32_ENABLED - crc32 - CRC32 calculation routines
+
+
+#ifndef CRC32_ENABLED
+#define CRC32_ENABLED 1
+#endif
+
+// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library
+
+
+#ifndef ECC_ENABLED
+#define ECC_ENABLED 0
+#endif
+
+// FDS_ENABLED - fds - Flash data storage module
+//==========================================================
+#ifndef FDS_ENABLED
+#define FDS_ENABLED 1
+#endif
+#if FDS_ENABLED
+// FDS_OP_QUEUE_SIZE - Size of the internal queue.
+#ifndef FDS_OP_QUEUE_SIZE
+#define FDS_OP_QUEUE_SIZE 4
+#endif
+
+// FDS_CHUNK_QUEUE_SIZE - Determines how many @ref fds_record_chunk_t structures can be buffered at any time.
+#ifndef FDS_CHUNK_QUEUE_SIZE
+#define FDS_CHUNK_QUEUE_SIZE 8
+#endif
+
+// FDS_MAX_USERS - Maximum number of callbacks that can be registered.
+#ifndef FDS_MAX_USERS
+#define FDS_MAX_USERS 8
+#endif
+
+// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use.
+// One of the virtual pages is reserved by the system for garbage collection.
+// Therefore, the minimum is two virtual pages: one page to store data and
+// one page to be used by the system for garbage collection. The total amount
+// of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES
+// @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes.
+
+#ifndef FDS_VIRTUAL_PAGES
+#define FDS_VIRTUAL_PAGES 3
+#endif
+
+// FDS_VIRTUAL_PAGE_SIZE - The size of a virtual page of flash memory, expressed in number of 4-byte words.
+
+
+// By default, a virtual page is the same size as a physical page.
+// The size of a virtual page must be a multiple of the size of a physical page.
+// <1024=> 1024
+// <2048=> 2048
+
+#ifndef FDS_VIRTUAL_PAGE_SIZE
+#define FDS_VIRTUAL_PAGE_SIZE 1024
+#endif
+
+#endif //FDS_ENABLED
+//
+
+// FSTORAGE_ENABLED - fstorage - Flash storage module
+//==========================================================
+#ifndef FSTORAGE_ENABLED
+#define FSTORAGE_ENABLED 1
+#endif
+#if FSTORAGE_ENABLED
+// FS_QUEUE_SIZE - Configures the size of the internal queue.
+// Increase this if there are many users, or if it is likely that many
+// operation will be queued at once without waiting for the previous operations
+// to complete. In general, increase the queue size if you frequently receive
+// @ref FS_ERR_QUEUE_FULL errors when calling @ref fs_store or @ref fs_erase.
+
+#ifndef FS_QUEUE_SIZE
+#define FS_QUEUE_SIZE 4
+#endif
+
+// FS_OP_MAX_RETRIES - Number attempts to execute an operation if the SoftDevice fails.
+// Increase this value if events return the @ref FS_ERR_OPERATION_TIMEOUT
+// error often. The SoftDevice may fail to schedule flash access due to high BLE activity.
+
+#ifndef FS_OP_MAX_RETRIES
+#define FS_OP_MAX_RETRIES 3
+#endif
+
+// FS_MAX_WRITE_SIZE_WORDS - Maximum number of words to be written to flash in a single operation.
+// Tweaking this value can increase the chances of the SoftDevice being
+// able to fit flash operations in between radio activity. This value is bound by the
+// maximum number of words which the SoftDevice can write to flash in a single call to
+// @ref sd_flash_write, which is 256 words for nRF51 ICs and 1024 words for nRF52 ICs.
+
+#ifndef FS_MAX_WRITE_SIZE_WORDS
+#define FS_MAX_WRITE_SIZE_WORDS 1024
+#endif
+
+#endif //FSTORAGE_ENABLED
+//
+
+// HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release
+
+
+#ifndef HARDFAULT_HANDLER_ENABLED
+#define HARDFAULT_HANDLER_ENABLED 0
+#endif
+
+// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI
+//==========================================================
+#ifndef HCI_MEM_POOL_ENABLED
+#define HCI_MEM_POOL_ENABLED 0
+#endif
+#if HCI_MEM_POOL_ENABLED
+// HCI_TX_BUF_SIZE - TX buffer size in bytes.
+#ifndef HCI_TX_BUF_SIZE
+#define HCI_TX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_SIZE - RX buffer size in bytes.
+#ifndef HCI_RX_BUF_SIZE
+#define HCI_RX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size.
+#ifndef HCI_RX_BUF_QUEUE_SIZE
+#define HCI_RX_BUF_QUEUE_SIZE 4
+#endif
+
+#endif //HCI_MEM_POOL_ENABLED
+//
+
+// HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI
+//==========================================================
+#ifndef HCI_SLIP_ENABLED
+#define HCI_SLIP_ENABLED 0
+#endif
+#if HCI_SLIP_ENABLED
+// HCI_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef HCI_UART_BAUDRATE
+#define HCI_UART_BAUDRATE 30801920
+#endif
+
+// HCI_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef HCI_UART_FLOW_CONTROL
+#define HCI_UART_FLOW_CONTROL 0
+#endif
+
+// HCI_UART_RX_PIN - UART RX pin
+#ifndef HCI_UART_RX_PIN
+#define HCI_UART_RX_PIN 8
+#endif
+
+// HCI_UART_TX_PIN - UART TX pin
+#ifndef HCI_UART_TX_PIN
+#define HCI_UART_TX_PIN 6
+#endif
+
+// HCI_UART_RTS_PIN - UART RTS pin
+#ifndef HCI_UART_RTS_PIN
+#define HCI_UART_RTS_PIN 5
+#endif
+
+// HCI_UART_CTS_PIN - UART CTS pin
+#ifndef HCI_UART_CTS_PIN
+#define HCI_UART_CTS_PIN 7
+#endif
+
+#endif //HCI_SLIP_ENABLED
+//
+
+// HCI_TRANSPORT_ENABLED - hci_transport - HCI transport
+//==========================================================
+#ifndef HCI_TRANSPORT_ENABLED
+#define HCI_TRANSPORT_ENABLED 0
+#endif
+#if HCI_TRANSPORT_ENABLED
+// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits.
+#ifndef HCI_MAX_PACKET_SIZE_IN_BITS
+#define HCI_MAX_PACKET_SIZE_IN_BITS 8000
+#endif
+
+#endif //HCI_TRANSPORT_ENABLED
+//
+
+// LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module
+
+
+#ifndef LED_SOFTBLINK_ENABLED
+#define LED_SOFTBLINK_ENABLED 0
+#endif
+
+// LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module
+
+
+#ifndef LOW_POWER_PWM_ENABLED
+#define LOW_POWER_PWM_ENABLED 0
+#endif
+
+// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator
+//==========================================================
+#ifndef MEM_MANAGER_ENABLED
+#define MEM_MANAGER_ENABLED 0
+#endif
+#if MEM_MANAGER_ENABLED
+// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1
+#endif
+
+// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block.
+// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT
+#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block.
+// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE
+#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block.
+// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256
+#endif
+
+// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module.
+
+
+#ifndef MEM_MANAGER_ENABLE_LOGS
+#define MEM_MANAGER_ENABLE_LOGS 0
+#endif
+
+// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module.
+
+
+#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK
+#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0
+#endif
+
+#endif //MEM_MANAGER_ENABLED
+//
+
+// NRF_CSENSE_ENABLED - nrf_csense - nrf_csense module
+//==========================================================
+#ifndef NRF_CSENSE_ENABLED
+#define NRF_CSENSE_ENABLED 0
+#endif
+#if NRF_CSENSE_ENABLED
+// NRF_CSENSE_PAD_HYSTERESIS - Minimal value of change to decide that pad was touched.
+#ifndef NRF_CSENSE_PAD_HYSTERESIS
+#define NRF_CSENSE_PAD_HYSTERESIS 15
+#endif
+
+// NRF_CSENSE_PAD_DEVIATION - Minimal value measured on pad to take its value while calculating step.
+#ifndef NRF_CSENSE_PAD_DEVIATION
+#define NRF_CSENSE_PAD_DEVIATION 70
+#endif
+
+// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on pad to take its value into account.
+#ifndef NRF_CSENSE_MIN_PAD_VALUE
+#define NRF_CSENSE_MIN_PAD_VALUE 20
+#endif
+
+// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance.
+#ifndef NRF_CSENSE_MAX_PADS_NUMBER
+#define NRF_CSENSE_MAX_PADS_NUMBER 20
+#endif
+
+// NRF_CSENSE_MAX_VALUE - Maximum normalized value got from measurement.
+#ifndef NRF_CSENSE_MAX_VALUE
+#define NRF_CSENSE_MAX_VALUE 1000
+#endif
+
+// NRF_CSENSE_OUTPUT_PIN - Output pin used by lower module.
+// This is only used when running on NRF51.
+
+#ifndef NRF_CSENSE_OUTPUT_PIN
+#define NRF_CSENSE_OUTPUT_PIN 30
+#endif
+
+#endif //NRF_CSENSE_ENABLED
+//
+
+// NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor module
+//==========================================================
+#ifndef NRF_DRV_CSENSE_ENABLED
+#define NRF_DRV_CSENSE_ENABLED 0
+#endif
+#if NRF_DRV_CSENSE_ENABLED
+// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (except nRF51)
+#ifndef TIMER0_FOR_CSENSE
+#define TIMER0_FOR_CSENSE 1
+#endif
+
+// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (except nRF51)
+#ifndef TIMER1_FOR_CSENSE
+#define TIMER1_FOR_CSENSE 2
+#endif
+
+// MEASUREMENT_PERIOD - Single measurement period.
+// Time of single measurement can be calculated as T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). I_SOURCE, VUP and VDOWN are values used to initialize COMP and C is capacitance of used pad.
+
+#ifndef MEASUREMENT_PERIOD
+#define MEASUREMENT_PERIOD 20
+#endif
+
+#endif //NRF_DRV_CSENSE_ENABLED
+//
+
+// SLIP_ENABLED - slip - SLIP encoding decoding
+
+
+#ifndef SLIP_ENABLED
+#define SLIP_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_Log
+
+//==========================================================
+// NRF_LOG_ENABLED - nrf_log - Logging
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 0
+#endif
+#if NRF_LOG_ENABLED
+// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string
+//==========================================================
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+#if NRF_LOG_USES_COLORS
+// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+// NRF_LOG_ERROR_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_ERROR_COLOR
+#define NRF_LOG_ERROR_COLOR 0
+#endif
+
+// NRF_LOG_WARNING_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_WARNING_COLOR
+#define NRF_LOG_WARNING_COLOR 0
+#endif
+
+#endif //NRF_LOG_USES_COLORS
+//
+
+// NRF_LOG_DEFAULT_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 3
+#endif
+
+// NRF_LOG_DEFERRED - Enable deffered logger.
+
+// Log data is buffered and can be processed in idle.
+//==========================================================
+#ifndef NRF_LOG_DEFERRED
+#define NRF_LOG_DEFERRED 1
+#endif
+#if NRF_LOG_DEFERRED
+// NRF_LOG_DEFERRED_BUFSIZE - Size of the buffer for logs in words.
+// Must be power of 2
+
+#ifndef NRF_LOG_DEFERRED_BUFSIZE
+#define NRF_LOG_DEFERRED_BUFSIZE 256
+#endif
+
+#endif //NRF_LOG_DEFERRED
+//
+
+// NRF_LOG_USES_TIMESTAMP - Enable timestamping
+
+
+// Function for getting the timestamp is provided by the user
+
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+
+#endif //NRF_LOG_ENABLED
+//
+
+// nrf_log_backend - Logging sink
+
+//==========================================================
+// NRF_LOG_BACKEND_MAX_STRING_LENGTH - Buffer for storing single output string
+// Logger backend RAM usage is determined by this value.
+
+#ifndef NRF_LOG_BACKEND_MAX_STRING_LENGTH
+#define NRF_LOG_BACKEND_MAX_STRING_LENGTH 256
+#endif
+
+// NRF_LOG_TIMESTAMP_DIGITS - Number of digits for timestamp
+// If higher resolution timestamp source is used it might be needed to increase that
+
+#ifndef NRF_LOG_TIMESTAMP_DIGITS
+#define NRF_LOG_TIMESTAMP_DIGITS 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_USES_UART - If enabled data is printed over UART
+//==========================================================
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_UART
+#define NRF_LOG_BACKEND_SERIAL_USES_UART 1
+#endif
+#if NRF_LOG_BACKEND_SERIAL_USES_UART
+// NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE
+#define NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE 30801920
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_TX_PIN - UART TX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_TX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_TX_PIN 6
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RX_PIN - UART RX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RX_PIN 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN - UART RTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN 5
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN - UART CTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN 7
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL
+#define NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL 0
+#endif
+
+// NRF_LOG_BACKEND_UART_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef NRF_LOG_BACKEND_UART_INSTANCE
+#define NRF_LOG_BACKEND_UART_INSTANCE 0
+#endif
+
+#endif //NRF_LOG_BACKEND_SERIAL_USES_UART
+//
+
+// NRF_LOG_BACKEND_SERIAL_USES_RTT - If enabled data is printed using RTT
+
+
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_RTT
+#define NRF_LOG_BACKEND_SERIAL_USES_RTT 0
+#endif
+
+//
+//==========================================================
+
+//
+//==========================================================
+
+// <<< end of configuration section >>>
+#endif //SDK_CONFIG_H
+
diff --git a/ARM/Nordic/nRF52/exemples/UartPrbsTest/.project b/ARM/Nordic/nRF52/exemples/UartPrbsTest/.project
index 04e1e8db..f1da0a6d 100644
--- a/ARM/Nordic/nRF52/exemples/UartPrbsTest/.project
+++ b/ARM/Nordic/nRF52/exemples/UartPrbsTest/.project
@@ -24,4 +24,11 @@
org.eclipse.cdt.managedbuilder.core.managedBuildNature
org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+ src/uart_prbs_tx.cpp
+ 1
+ PARENT-5-PROJECT_LOC/exemples/uart/uart_prbs_tx.cpp
+
+
diff --git a/ARM/Nordic/nRF52/exemples/UartPrbsTest/src/board.h b/ARM/Nordic/nRF52/exemples/UartPrbsTest/src/board.h
new file mode 100644
index 00000000..92601e7a
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/UartPrbsTest/src/board.h
@@ -0,0 +1,37 @@
+/*
+ * board.h
+ *
+ * Created on: Nov 15, 2016
+ * Author: hoan
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include "blueio_board.h"
+
+//#define NORDIC_DK
+
+#ifdef NORDIC_DK
+#define UART_TX_PIN 9//7
+#define UART_RX_PIN 11//8
+#define UART_RTS_PIN 8//11
+#define UART_CTS_PIN 10//12
+#else
+#define UART_RX_PORT BLUEIO_UART_RX_PORT
+#define UART_RX_PIN BLUEIO_UART_RX_PIN
+#define UART_RX_PINOP BLUEIO_UART_RX_PINOP
+#define UART_TX_PORT BLUEIO_UART_TX_PORT
+#define UART_TX_PIN BLUEIO_UART_TX_PIN
+#define UART_TX_PINOP BLUEIO_UART_TX_PINOP
+#define UART_CTS_PORT BLUEIO_UART_CTS_PORT
+#define UART_CTS_PIN BLUEIO_UART_CTS_PIN
+#define UART_CTS_PINOP BLUEIO_UART_CTS_PINOP
+#define UART_RTS_PORT BLUEIO_UART_RTS_PORT
+#define UART_RTS_PIN BLUEIO_UART_RTS_PIN
+#define UART_RTS_PINOP BLUEIO_UART_RTS_PINOP
+#endif
+
+
+#endif // __BOARD_H__
+
diff --git a/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.cproject b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.cproject
new file mode 100644
index 00000000..adc1b291
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.cproject
@@ -0,0 +1,278 @@
+
+
+
+
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diff --git a/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.gitignore b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.gitignore
new file mode 100644
index 00000000..ac01e665
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.gitignore
@@ -0,0 +1,2 @@
+/Debug/
+/Release/
diff --git a/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.project b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.project
new file mode 100644
index 00000000..e92d0755
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/.project
@@ -0,0 +1,34 @@
+
+
+ UartRetargetDemo
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.core.ccnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ src/uart_retarget_demo.cpp
+ 1
+ PARENT-5-PROJECT_LOC/exemples/uart/uart_retarget_demo.cpp
+
+
+
diff --git a/ARM/Nordic/nRF52/exemples/UartRetargetDemo/src/board.h b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/src/board.h
new file mode 100644
index 00000000..92601e7a
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/UartRetargetDemo/src/board.h
@@ -0,0 +1,37 @@
+/*
+ * board.h
+ *
+ * Created on: Nov 15, 2016
+ * Author: hoan
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include "blueio_board.h"
+
+//#define NORDIC_DK
+
+#ifdef NORDIC_DK
+#define UART_TX_PIN 9//7
+#define UART_RX_PIN 11//8
+#define UART_RTS_PIN 8//11
+#define UART_CTS_PIN 10//12
+#else
+#define UART_RX_PORT BLUEIO_UART_RX_PORT
+#define UART_RX_PIN BLUEIO_UART_RX_PIN
+#define UART_RX_PINOP BLUEIO_UART_RX_PINOP
+#define UART_TX_PORT BLUEIO_UART_TX_PORT
+#define UART_TX_PIN BLUEIO_UART_TX_PIN
+#define UART_TX_PINOP BLUEIO_UART_TX_PINOP
+#define UART_CTS_PORT BLUEIO_UART_CTS_PORT
+#define UART_CTS_PIN BLUEIO_UART_CTS_PIN
+#define UART_CTS_PINOP BLUEIO_UART_CTS_PINOP
+#define UART_RTS_PORT BLUEIO_UART_RTS_PORT
+#define UART_RTS_PIN BLUEIO_UART_RTS_PIN
+#define UART_RTS_PINOP BLUEIO_UART_RTS_PINOP
+#endif
+
+
+#endif // __BOARD_H__
+
diff --git a/ARM/Nordic/nRF52/exemples/Uart_Ble/.cproject b/ARM/Nordic/nRF52/exemples/Uart_Ble/.cproject
new file mode 100755
index 00000000..37b5d556
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/Uart_Ble/.cproject
@@ -0,0 +1,416 @@
+
+
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diff --git a/ARM/Nordic/nRF52/exemples/Uart_Ble/.gitignore b/ARM/Nordic/nRF52/exemples/Uart_Ble/.gitignore
new file mode 100755
index 00000000..3df573fe
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/Uart_Ble/.gitignore
@@ -0,0 +1 @@
+/Debug/
diff --git a/ARM/Nordic/nRF52/exemples/Uart_Ble/.project b/ARM/Nordic/nRF52/exemples/Uart_Ble/.project
new file mode 100755
index 00000000..15a20791
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/Uart_Ble/.project
@@ -0,0 +1,289 @@
+
+
+ Uart_ble
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.core.ccnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ src/nRF5_SDK
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/softdevice
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_advertising
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/peer_manager
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/clock
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/uart
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/fds
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/fifo
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/fstorage
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/timer
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/uart
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/util
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/softdevice/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_advertising/ble_advertising.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_advertising/ble_advertising.c
+
+
+ src/nRF5_SDK/ble/ble_services/ble_bas
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services/ble_nus
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/common/ble_advdata.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_advdata.c
+
+
+ src/nRF5_SDK/ble/common/ble_conn_params.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_conn_params.c
+
+
+ src/nRF5_SDK/ble/common/ble_conn_state.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_conn_state.c
+
+
+ src/nRF5_SDK/ble/common/ble_srv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_srv_common.c
+
+
+ src/nRF5_SDK/ble/peer_manager/gatt_cache_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/gatt_cache_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/gatts_cache_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/gatts_cache_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/id_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/id_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_data.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_data.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_data_storage.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_data_storage.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_id.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_id.c
+
+
+ src/nRF5_SDK/ble/peer_manager/peer_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/peer_manager.c
+
+
+ src/nRF5_SDK/ble/peer_manager/pm_buffer.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/pm_buffer.c
+
+
+ src/nRF5_SDK/ble/peer_manager/security_dispatcher.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/security_dispatcher.c
+
+
+ src/nRF5_SDK/ble/peer_manager/security_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/peer_manager/security_manager.c
+
+
+ src/nRF5_SDK/drivers_nrf/clock/nrf_drv_clock.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/clock/nrf_drv_clock.c
+
+
+ src/nRF5_SDK/drivers_nrf/common/nrf_drv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/common/nrf_drv_common.c
+
+
+ src/nRF5_SDK/drivers_nrf/uart/nrf_drv_uart.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/uart/nrf_drv_uart.c
+
+
+ src/nRF5_SDK/libraries/fds/fds.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fds/fds.c
+
+
+ src/nRF5_SDK/libraries/fifo/app_fifo.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fifo/app_fifo.c
+
+
+ src/nRF5_SDK/libraries/fstorage/fstorage.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fstorage/fstorage.c
+
+
+ src/nRF5_SDK/libraries/timer/app_timer.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/timer/app_timer.c
+
+
+ src/nRF5_SDK/libraries/uart/app_uart_fifo.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/uart/app_uart_fifo.c
+
+
+ src/nRF5_SDK/libraries/util/app_error.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_error.c
+
+
+ src/nRF5_SDK/libraries/util/app_error_weak.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_error_weak.c
+
+
+ src/nRF5_SDK/libraries/util/app_util_platform.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_util_platform.c
+
+
+ src/nRF5_SDK/libraries/util/sdk_mapped_flags.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/sdk_mapped_flags.c
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_services/ble_bas/ble_bas.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_services/ble_bas/ble_bas.c
+
+
+ src/nRF5_SDK/ble/ble_services/ble_nus/ble_nus.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_services/ble_nus/ble_nus.c
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler/softdevice_handler.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/softdevice/common/softdevice_handler/softdevice_handler.c
+
+
+
diff --git a/ARM/Nordic/nRF52/exemples/Uart_Ble/src/main.cpp b/ARM/Nordic/nRF52/exemples/Uart_Ble/src/main.cpp
new file mode 100755
index 00000000..840537c3
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/Uart_Ble/src/main.cpp
@@ -0,0 +1,633 @@
+/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+/** @file
+ *
+ * @defgroup ble_sdk_uart_over_ble_main main.c
+ * @{
+ * @ingroup ble_sdk_app_nus_eval
+ * @brief UART over BLE application main file.
+ *
+ * This file contains the source code for a sample application that uses the Nordic UART service.
+ * This application uses the @ref srvlib_conn_params module.
+ */
+
+#include
+#include
+#include "nordic_common.h"
+#include "nrf.h"
+#include "ble_hci.h"
+#include "ble_advdata.h"
+#include "ble_advertising.h"
+#include "ble_conn_params.h"
+#include "softdevice_handler.h"
+#include "app_timer.h"
+#include "app_button.h"
+#include "ble_nus.h"
+#include "app_uart.h"
+#include "app_util_platform.h"
+#include "nrf_peripherals.h"
+#include "custom_board.h"
+//#include "bsp.h"
+//#include "bsp_btn_ble.h"
+
+#define RX_PIN_NUMBER BLUEIO_UART_RX_PIN
+#define TX_PIN_NUMBER BLUEIO_UART_TX_PIN
+#define RTS_PIN_NUMBER BLUEIO_UART_RTS_PIN
+#define CTS_PIN_NUMBER BLUEIO_UART_CTS_PIN
+
+
+#define IS_SRVC_CHANGED_CHARACT_PRESENT 0 /**< Include the service_changed characteristic. If not enabled, the server's database cannot be changed for the lifetime of the device. */
+
+#if (NRF_SD_BLE_API_VERSION == 3)
+#define NRF_BLE_MAX_MTU_SIZE GATT_MTU_SIZE_DEFAULT /**< MTU size used in the softdevice enabling and to reply to a BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. */
+#endif
+
+#define APP_FEATURE_NOT_SUPPORTED BLE_GATT_STATUS_ATTERR_APP_BEGIN + 2 /**< Reply when unsupported features are requested. */
+
+#define CENTRAL_LINK_COUNT 0 /**< Number of central links used by the application. When changing this number remember to adjust the RAM settings*/
+#define PERIPHERAL_LINK_COUNT 1 /**< Number of peripheral links used by the application. When changing this number remember to adjust the RAM settings*/
+
+#define DEVICE_NAME "Nordic_UART" /**< Name of device. Will be included in the advertising data. */
+#define NUS_SERVICE_UUID_TYPE BLE_UUID_TYPE_VENDOR_BEGIN /**< UUID type for the Nordic UART Service (vendor specific). */
+
+#define APP_ADV_INTERVAL 64 /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */
+#define APP_ADV_TIMEOUT_IN_SECONDS 180 /**< The advertising timeout (in units of seconds). */
+
+#define APP_TIMER_PRESCALER 0 /**< Value of the RTC1 PRESCALER register. */
+#define APP_TIMER_OP_QUEUE_SIZE 4 /**< Size of timer operation queues. */
+
+#define MIN_CONN_INTERVAL MSEC_TO_UNITS(20, UNIT_1_25_MS) /**< Minimum acceptable connection interval (20 ms), Connection interval uses 1.25 ms units. */
+#define MAX_CONN_INTERVAL MSEC_TO_UNITS(75, UNIT_1_25_MS) /**< Maximum acceptable connection interval (75 ms), Connection interval uses 1.25 ms units. */
+#define SLAVE_LATENCY 0 /**< Slave latency. */
+#define CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS) /**< Connection supervisory timeout (4 seconds), Supervision Timeout uses 10 ms units. */
+#define FIRST_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(5000, APP_TIMER_PRESCALER) /**< Time from initiating event (connect or start of notification) to first time sd_ble_gap_conn_param_update is called (5 seconds). */
+#define NEXT_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(30000, APP_TIMER_PRESCALER) /**< Time between each call to sd_ble_gap_conn_param_update after the first call (30 seconds). */
+#define MAX_CONN_PARAMS_UPDATE_COUNT 3 /**< Number of attempts before giving up the connection parameter negotiation. */
+
+#define DEAD_BEEF 0xDEADBEEF /**< Value used as error code on stack dump, can be used to identify stack location on stack unwind. */
+
+#define UART_TX_BUF_SIZE 256 /**< UART TX buffer size. */
+#define UART_RX_BUF_SIZE 256 /**< UART RX buffer size. */
+
+static ble_nus_t m_nus; /**< Structure to identify the Nordic UART Service. */
+static uint16_t m_conn_handle = BLE_CONN_HANDLE_INVALID; /**< Handle of the current connection. */
+
+static ble_uuid_t m_adv_uuids[] = {{BLE_UUID_NUS_SERVICE, NUS_SERVICE_UUID_TYPE}}; /**< Universally unique service identifier. */
+
+/*#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_RC, \
+ .rc_ctiv = 1, \
+ .rc_temp_ctiv = 1, \
+ .xtal_accuracy = 0 }//NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
+*/
+
+/**@brief Function for assert macro callback.
+ *
+ * @details This function will be called in case of an assert in the SoftDevice.
+ *
+ * @warning This handler is an example only and does not fit a final product. You need to analyse
+ * how your product is supposed to react in case of Assert.
+ * @warning On assert from the SoftDevice, the system can only recover on reset.
+ *
+ * @param[in] line_num Line number of the failing ASSERT call.
+ * @param[in] p_file_name File name of the failing ASSERT call.
+ */
+void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
+{
+ app_error_handler(DEAD_BEEF, line_num, p_file_name);
+}
+
+
+/**@brief Function for the GAP initialization.
+ *
+ * @details This function will set up all the necessary GAP (Generic Access Profile) parameters of
+ * the device. It also sets the permissions and appearance.
+ */
+static void gap_params_init(void)
+{
+ uint32_t err_code;
+ ble_gap_conn_params_t gap_conn_params;
+ ble_gap_conn_sec_mode_t sec_mode;
+
+ BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode);
+
+ err_code = sd_ble_gap_device_name_set(&sec_mode,
+ (const uint8_t *) DEVICE_NAME,
+ strlen(DEVICE_NAME));
+ APP_ERROR_CHECK(err_code);
+
+ memset(&gap_conn_params, 0, sizeof(gap_conn_params));
+
+ gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL;
+ gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL;
+ gap_conn_params.slave_latency = SLAVE_LATENCY;
+ gap_conn_params.conn_sup_timeout = CONN_SUP_TIMEOUT;
+
+ err_code = sd_ble_gap_ppcp_set(&gap_conn_params);
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for handling the data from the Nordic UART Service.
+ *
+ * @details This function will process the data received from the Nordic UART BLE Service and send
+ * it to the UART module.
+ *
+ * @param[in] p_nus Nordic UART Service structure.
+ * @param[in] p_data Data to be send to UART module.
+ * @param[in] length Length of the data.
+ */
+/**@snippet [Handling the data received over BLE] */
+static void nus_data_handler(ble_nus_t * p_nus, uint8_t * p_data, uint16_t length)
+{
+ for (uint32_t i = 0; i < length; i++)
+ {
+ while (app_uart_put(p_data[i]) != NRF_SUCCESS);
+ }
+ while (app_uart_put('\r') != NRF_SUCCESS);
+ while (app_uart_put('\n') != NRF_SUCCESS);
+}
+/**@snippet [Handling the data received over BLE] */
+
+
+/**@brief Function for initializing services that will be used by the application.
+ */
+static void services_init(void)
+{
+ uint32_t err_code;
+ ble_nus_init_t nus_init;
+
+ memset(&nus_init, 0, sizeof(nus_init));
+
+ nus_init.data_handler = nus_data_handler;
+
+ err_code = ble_nus_init(&m_nus, &nus_init);
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for handling an event from the Connection Parameters Module.
+ *
+ * @details This function will be called for all events in the Connection Parameters Module
+ * which are passed to the application.
+ *
+ * @note All this function does is to disconnect. This could have been done by simply setting
+ * the disconnect_on_fail config parameter, but instead we use the event handler
+ * mechanism to demonstrate its use.
+ *
+ * @param[in] p_evt Event received from the Connection Parameters Module.
+ */
+static void on_conn_params_evt(ble_conn_params_evt_t * p_evt)
+{
+ uint32_t err_code;
+
+ if (p_evt->evt_type == BLE_CONN_PARAMS_EVT_FAILED)
+ {
+ err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_CONN_INTERVAL_UNACCEPTABLE);
+ APP_ERROR_CHECK(err_code);
+ }
+}
+
+
+/**@brief Function for handling errors from the Connection Parameters module.
+ *
+ * @param[in] nrf_error Error code containing information about what went wrong.
+ */
+static void conn_params_error_handler(uint32_t nrf_error)
+{
+ APP_ERROR_HANDLER(nrf_error);
+}
+
+
+/**@brief Function for initializing the Connection Parameters module.
+ */
+static void conn_params_init(void)
+{
+ uint32_t err_code;
+ ble_conn_params_init_t cp_init;
+
+ memset(&cp_init, 0, sizeof(cp_init));
+
+ cp_init.p_conn_params = NULL;
+ cp_init.first_conn_params_update_delay = FIRST_CONN_PARAMS_UPDATE_DELAY;
+ cp_init.next_conn_params_update_delay = NEXT_CONN_PARAMS_UPDATE_DELAY;
+ cp_init.max_conn_params_update_count = MAX_CONN_PARAMS_UPDATE_COUNT;
+ cp_init.start_on_notify_cccd_handle = BLE_GATT_HANDLE_INVALID;
+ cp_init.disconnect_on_fail = false;
+ cp_init.evt_handler = on_conn_params_evt;
+ cp_init.error_handler = conn_params_error_handler;
+
+ err_code = ble_conn_params_init(&cp_init);
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for putting the chip into sleep mode.
+ *
+ * @note This function will not return.
+ */
+static void sleep_mode_enter(void)
+{
+ uint32_t err_code;// = bsp_indication_set(BSP_INDICATE_IDLE);
+ //APP_ERROR_CHECK(err_code);
+
+ // Prepare wakeup buttons.
+ //err_code = bsp_btn_ble_sleep_mode_prepare();
+ //APP_ERROR_CHECK(err_code);
+
+ // Go to system-off mode (this function will not return; wakeup will cause a reset).
+ err_code = sd_power_system_off();
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for handling advertising events.
+ *
+ * @details This function will be called for advertising events which are passed to the application.
+ *
+ * @param[in] ble_adv_evt Advertising event.
+ */
+static void on_adv_evt(ble_adv_evt_t ble_adv_evt)
+{
+ uint32_t err_code;
+
+ switch (ble_adv_evt)
+ {
+ case BLE_ADV_EVT_FAST:
+ // err_code = bsp_indication_set(BSP_INDICATE_ADVERTISING);
+ // APP_ERROR_CHECK(err_code);
+ break;
+ case BLE_ADV_EVT_IDLE:
+ sleep_mode_enter();
+ break;
+ default:
+ break;
+ }
+}
+
+
+/**@brief Function for the application's SoftDevice event handler.
+ *
+ * @param[in] p_ble_evt SoftDevice event.
+ */
+static void on_ble_evt(ble_evt_t * p_ble_evt)
+{
+ uint32_t err_code;
+
+ switch (p_ble_evt->header.evt_id)
+ {
+ case BLE_GAP_EVT_CONNECTED:
+ //err_code = bsp_indication_set(BSP_INDICATE_CONNECTED);
+ //APP_ERROR_CHECK(err_code);
+ m_conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
+ break; // BLE_GAP_EVT_CONNECTED
+
+ case BLE_GAP_EVT_DISCONNECTED:
+ // err_code = bsp_indication_set(BSP_INDICATE_IDLE);
+ //APP_ERROR_CHECK(err_code);
+ m_conn_handle = BLE_CONN_HANDLE_INVALID;
+ break; // BLE_GAP_EVT_DISCONNECTED
+
+ case BLE_GAP_EVT_SEC_PARAMS_REQUEST:
+ // Pairing not supported
+ err_code = sd_ble_gap_sec_params_reply(m_conn_handle, BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, NULL, NULL);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GAP_EVT_SEC_PARAMS_REQUEST
+
+ case BLE_GATTS_EVT_SYS_ATTR_MISSING:
+ // No system attributes have been stored.
+ err_code = sd_ble_gatts_sys_attr_set(m_conn_handle, NULL, 0, 0);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTS_EVT_SYS_ATTR_MISSING
+
+ case BLE_GATTC_EVT_TIMEOUT:
+ // Disconnect on GATT Client timeout event.
+ err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gattc_evt.conn_handle,
+ BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTC_EVT_TIMEOUT
+
+ case BLE_GATTS_EVT_TIMEOUT:
+ // Disconnect on GATT Server timeout event.
+ err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gatts_evt.conn_handle,
+ BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTS_EVT_TIMEOUT
+
+ case BLE_EVT_USER_MEM_REQUEST:
+ err_code = sd_ble_user_mem_reply(p_ble_evt->evt.gattc_evt.conn_handle, NULL);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_EVT_USER_MEM_REQUEST
+
+ case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST:
+ {
+ ble_gatts_evt_rw_authorize_request_t req;
+ ble_gatts_rw_authorize_reply_params_t auth_reply;
+
+ req = p_ble_evt->evt.gatts_evt.params.authorize_request;
+
+ if (req.type != BLE_GATTS_AUTHORIZE_TYPE_INVALID)
+ {
+ if ((req.request.write.op == BLE_GATTS_OP_PREP_WRITE_REQ) ||
+ (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_NOW) ||
+ (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL))
+ {
+ if (req.type == BLE_GATTS_AUTHORIZE_TYPE_WRITE)
+ {
+ auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_WRITE;
+ }
+ else
+ {
+ auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_READ;
+ }
+ auth_reply.params.write.gatt_status = APP_FEATURE_NOT_SUPPORTED;
+ err_code = sd_ble_gatts_rw_authorize_reply(p_ble_evt->evt.gatts_evt.conn_handle,
+ &auth_reply);
+ APP_ERROR_CHECK(err_code);
+ }
+ }
+ } break; // BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST
+
+#if (NRF_SD_BLE_API_VERSION == 3)
+ case BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST:
+ err_code = sd_ble_gatts_exchange_mtu_reply(p_ble_evt->evt.gatts_evt.conn_handle,
+ NRF_BLE_MAX_MTU_SIZE);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST
+#endif
+
+ default:
+ // No implementation needed.
+ break;
+ }
+}
+
+
+/**@brief Function for dispatching a SoftDevice event to all modules with a SoftDevice
+ * event handler.
+ *
+ * @details This function is called from the SoftDevice event interrupt handler after a
+ * SoftDevice event has been received.
+ *
+ * @param[in] p_ble_evt SoftDevice event.
+ */
+static void ble_evt_dispatch(ble_evt_t * p_ble_evt)
+{
+ ble_conn_params_on_ble_evt(p_ble_evt);
+ ble_nus_on_ble_evt(&m_nus, p_ble_evt);
+ on_ble_evt(p_ble_evt);
+ ble_advertising_on_ble_evt(p_ble_evt);
+ // bsp_btn_ble_on_ble_evt(p_ble_evt);
+
+}
+
+
+/**@brief Function for the SoftDevice initialization.
+ *
+ * @details This function initializes the SoftDevice and the BLE event interrupt.
+ */
+static void ble_stack_init(void)
+{
+ uint32_t err_code;
+
+ nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC;
+
+ // Initialize SoftDevice.
+ SOFTDEVICE_HANDLER_INIT(&clock_lf_cfg, NULL);
+
+ ble_enable_params_t ble_enable_params;
+ err_code = softdevice_enable_get_default_config(CENTRAL_LINK_COUNT,
+ PERIPHERAL_LINK_COUNT,
+ &ble_enable_params);
+ APP_ERROR_CHECK(err_code);
+
+ //Check the ram settings against the used number of links
+ CHECK_RAM_START_ADDR(CENTRAL_LINK_COUNT,PERIPHERAL_LINK_COUNT);
+
+ // Enable BLE stack.
+#if (NRF_SD_BLE_API_VERSION == 3)
+ ble_enable_params.gatt_enable_params.att_mtu = NRF_BLE_MAX_MTU_SIZE;
+#endif
+ err_code = softdevice_enable(&ble_enable_params);
+ APP_ERROR_CHECK(err_code);
+
+ // Subscribe for BLE events.
+ err_code = softdevice_ble_evt_handler_set(ble_evt_dispatch);
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for handling events from the BSP module.
+ *
+ * @param[in] event Event generated by button press.
+ */
+/*
+void bsp_event_handler(bsp_event_t event)
+{
+ uint32_t err_code;
+ switch (event)
+ {
+ case BSP_EVENT_SLEEP:
+ sleep_mode_enter();
+ break;
+
+ case BSP_EVENT_DISCONNECT:
+ err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+ if (err_code != NRF_ERROR_INVALID_STATE)
+ {
+ APP_ERROR_CHECK(err_code);
+ }
+ break;
+
+ case BSP_EVENT_WHITELIST_OFF:
+ if (m_conn_handle == BLE_CONN_HANDLE_INVALID)
+ {
+ err_code = ble_advertising_restart_without_whitelist();
+ if (err_code != NRF_ERROR_INVALID_STATE)
+ {
+ APP_ERROR_CHECK(err_code);
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+}
+*/
+
+/**@brief Function for handling app_uart events.
+ *
+ * @details This function will receive a single character from the app_uart module and append it to
+ * a string. The string will be be sent over BLE when the last character received was a
+ * 'new line' i.e '\r\n' (hex 0x0D) or if the string has reached a length of
+ * @ref NUS_MAX_DATA_LENGTH.
+ */
+/**@snippet [Handling the data received over UART] */
+void uart_event_handle(app_uart_evt_t * p_event)
+{
+ static uint8_t data_array[BLE_NUS_MAX_DATA_LEN];
+ static uint8_t index = 0;
+ uint32_t err_code;
+
+ switch (p_event->evt_type)
+ {
+ case APP_UART_DATA_READY:
+ UNUSED_VARIABLE(app_uart_get(&data_array[index]));
+ index++;
+
+ if ((data_array[index - 1] == '\n') || (index >= (BLE_NUS_MAX_DATA_LEN)))
+ {
+ err_code = ble_nus_string_send(&m_nus, data_array, index);
+ if (err_code != NRF_ERROR_INVALID_STATE)
+ {
+ APP_ERROR_CHECK(err_code);
+ }
+
+ index = 0;
+ }
+ break;
+
+ case APP_UART_COMMUNICATION_ERROR:
+ APP_ERROR_HANDLER(p_event->data.error_communication);
+ break;
+
+ case APP_UART_FIFO_ERROR:
+ APP_ERROR_HANDLER(p_event->data.error_code);
+ break;
+
+ default:
+ break;
+ }
+}
+/**@snippet [Handling the data received over UART] */
+
+
+/**@brief Function for initializing the UART module.
+ */
+/**@snippet [UART Initialization] */
+static void uart_init(void)
+{
+ uint32_t err_code;
+ const app_uart_comm_params_t comm_params =
+ {
+ RX_PIN_NUMBER,
+ TX_PIN_NUMBER,
+ RTS_PIN_NUMBER,
+ CTS_PIN_NUMBER,
+ APP_UART_FLOW_CONTROL_DISABLED,
+ false,
+ UART_BAUDRATE_BAUDRATE_Baud115200
+ };
+
+ APP_UART_FIFO_INIT( &comm_params,
+ UART_RX_BUF_SIZE,
+ UART_TX_BUF_SIZE,
+ uart_event_handle,
+ APP_IRQ_PRIORITY_LOW,
+ err_code);
+ APP_ERROR_CHECK(err_code);
+}
+/**@snippet [UART Initialization] */
+
+
+/**@brief Function for initializing the Advertising functionality.
+ */
+static void advertising_init(void)
+{
+ uint32_t err_code;
+ ble_advdata_t advdata;
+ ble_advdata_t scanrsp;
+ ble_adv_modes_config_t options;
+
+ // Build advertising data struct to pass into @ref ble_advertising_init.
+ memset(&advdata, 0, sizeof(advdata));
+ advdata.name_type = BLE_ADVDATA_FULL_NAME;
+ advdata.include_appearance = false;
+ advdata.flags = BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE;
+
+ memset(&scanrsp, 0, sizeof(scanrsp));
+ scanrsp.uuids_complete.uuid_cnt = sizeof(m_adv_uuids) / sizeof(m_adv_uuids[0]);
+ scanrsp.uuids_complete.p_uuids = m_adv_uuids;
+
+ memset(&options, 0, sizeof(options));
+ options.ble_adv_fast_enabled = true;
+ options.ble_adv_fast_interval = APP_ADV_INTERVAL;
+ options.ble_adv_fast_timeout = APP_ADV_TIMEOUT_IN_SECONDS;
+
+ err_code = ble_advertising_init(&advdata, &scanrsp, &options, on_adv_evt, NULL);
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for initializing buttons and leds.
+ *
+ * @param[out] p_erase_bonds Will be true if the clear bonding button was pressed to wake the application up.
+ */
+static void buttons_leds_init(bool * p_erase_bonds)
+{
+/* bsp_event_t startup_event;
+
+ uint32_t err_code = bsp_init(BSP_INIT_LED | BSP_INIT_BUTTONS,
+ APP_TIMER_TICKS(100, APP_TIMER_PRESCALER),
+ bsp_event_handler);
+ APP_ERROR_CHECK(err_code);
+
+ err_code = bsp_btn_ble_init(NULL, &startup_event);
+ APP_ERROR_CHECK(err_code);
+
+ *p_erase_bonds = (startup_event == BSP_EVENT_CLEAR_BONDING_DATA);*/
+}
+
+
+/**@brief Function for placing the application in low power state while waiting for events.
+ */
+static void power_manage(void)
+{
+ uint32_t err_code = sd_app_evt_wait();
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Application main function.
+ */
+int main(void)
+{
+ uint32_t err_code;
+ bool erase_bonds;
+
+ // Initialize.
+ APP_TIMER_INIT(APP_TIMER_PRESCALER, APP_TIMER_OP_QUEUE_SIZE, false);
+ uart_init();
+
+ buttons_leds_init(&erase_bonds);
+ ble_stack_init();
+ gap_params_init();
+ services_init();
+ advertising_init();
+ conn_params_init();
+
+ printf("\r\nUART Start!\r\n");
+ err_code = ble_advertising_start(BLE_ADV_MODE_FAST);
+ APP_ERROR_CHECK(err_code);
+
+ // Enter main loop.
+ for (;;)
+ {
+ power_manage();
+ }
+}
+
+
+/**
+ * @}
+ */
diff --git a/ARM/Nordic/nRF52/exemples/Uart_Ble/src/sdk_config.h b/ARM/Nordic/nRF52/exemples/Uart_Ble/src/sdk_config.h
new file mode 100644
index 00000000..43d5993e
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/Uart_Ble/src/sdk_config.h
@@ -0,0 +1,3767 @@
+
+
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#ifdef USE_APP_CONFIG
+#include "app_config.h"
+#endif
+// nRF_BLE
+
+//==========================================================
+// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module
+
+
+#ifndef BLE_ADVERTISING_ENABLED
+#define BLE_ADVERTISING_ENABLED 1
+#endif
+
+// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands
+
+
+#ifndef BLE_DTM_ENABLED
+#define BLE_DTM_ENABLED 0
+#endif
+
+// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library
+
+
+#ifndef BLE_RACP_ENABLED
+#define BLE_RACP_ENABLED 0
+#endif
+
+// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write)
+
+
+#ifndef NRF_BLE_QWR_ENABLED
+#define NRF_BLE_QWR_ENABLED 0
+#endif
+
+// PEER_MANAGER_ENABLED - peer_manager - Peer Manager
+
+
+#ifndef PEER_MANAGER_ENABLED
+#define PEER_MANAGER_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_BLE_Services
+
+//==========================================================
+// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client
+
+
+#ifndef BLE_ANCS_C_ENABLED
+#define BLE_ANCS_C_ENABLED 0
+#endif
+
+// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client
+
+
+#ifndef BLE_ANS_C_ENABLED
+#define BLE_ANS_C_ENABLED 0
+#endif
+
+// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client
+
+
+#ifndef BLE_BAS_C_ENABLED
+#define BLE_BAS_C_ENABLED 0
+#endif
+
+// BLE_BAS_ENABLED - ble_bas - Battery Service
+
+
+#ifndef BLE_BAS_ENABLED
+#define BLE_BAS_ENABLED 0
+#endif
+
+// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service
+
+
+#ifndef BLE_CSCS_ENABLED
+#define BLE_CSCS_ENABLED 0
+#endif
+
+// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client
+
+
+#ifndef BLE_CTS_C_ENABLED
+#define BLE_CTS_C_ENABLED 0
+#endif
+
+// BLE_DIS_ENABLED - ble_dis - Device Information Service
+
+
+#ifndef BLE_DIS_ENABLED
+#define BLE_DIS_ENABLED 0
+#endif
+
+// BLE_GLS_ENABLED - ble_gls - Glucose Service
+
+
+#ifndef BLE_GLS_ENABLED
+#define BLE_GLS_ENABLED 0
+#endif
+
+// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service
+
+
+#ifndef BLE_HIDS_ENABLED
+#define BLE_HIDS_ENABLED 0
+#endif
+
+// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client
+//==========================================================
+#ifndef BLE_HRS_C_ENABLED
+#define BLE_HRS_C_ENABLED 0
+#endif
+#if BLE_HRS_C_ENABLED
+// BLE_HRS_C_RR_INTERVALS_MAX_CNT - Maximum number of RR_INTERVALS per notification to be decoded
+#ifndef BLE_HRS_C_RR_INTERVALS_MAX_CNT
+#define BLE_HRS_C_RR_INTERVALS_MAX_CNT 30
+#endif
+
+#endif //BLE_HRS_C_ENABLED
+//
+
+// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service
+
+
+#ifndef BLE_HRS_ENABLED
+#define BLE_HRS_ENABLED 0
+#endif
+
+// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service
+
+
+#ifndef BLE_HTS_ENABLED
+#define BLE_HTS_ENABLED 0
+#endif
+
+// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client
+
+
+#ifndef BLE_IAS_C_ENABLED
+#define BLE_IAS_C_ENABLED 0
+#endif
+
+// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service
+
+
+#ifndef BLE_IAS_ENABLED
+#define BLE_IAS_ENABLED 0
+#endif
+
+// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client
+
+
+#ifndef BLE_LBS_C_ENABLED
+#define BLE_LBS_C_ENABLED 0
+#endif
+
+// BLE_LBS_ENABLED - ble_lbs - LED Button Service
+
+
+#ifndef BLE_LBS_ENABLED
+#define BLE_LBS_ENABLED 0
+#endif
+
+// BLE_LLS_ENABLED - ble_lls - Link Loss Service
+
+
+#ifndef BLE_LLS_ENABLED
+#define BLE_LLS_ENABLED 0
+#endif
+
+// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service
+
+
+#ifndef BLE_NUS_C_ENABLED
+#define BLE_NUS_C_ENABLED 0
+#endif
+
+// BLE_NUS_ENABLED - ble_nus - Nordic UART Service
+
+
+#ifndef BLE_NUS_ENABLED
+#define BLE_NUS_ENABLED 1
+#endif
+
+// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client
+
+
+#ifndef BLE_RSCS_C_ENABLED
+#define BLE_RSCS_C_ENABLED 0
+#endif
+
+// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service
+
+
+#ifndef BLE_RSCS_ENABLED
+#define BLE_RSCS_ENABLED 0
+#endif
+
+// BLE_TPS_ENABLED - ble_tps - TX Power Service
+
+
+#ifndef BLE_TPS_ENABLED
+#define BLE_TPS_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// nRF_Drivers
+
+//==========================================================
+// APP_USBD_ENABLED - app_usbd - USB Device library
+//==========================================================
+#ifndef APP_USBD_ENABLED
+#define APP_USBD_ENABLED 0
+#endif
+#if APP_USBD_ENABLED
+// APP_USBD_VID - Vendor ID <0x0000-0xFFFF>
+
+
+// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/
+
+#ifndef APP_USBD_VID
+#define APP_USBD_VID 0
+#endif
+
+// APP_USBD_PID - Product ID <0x0000-0xFFFF>
+
+
+// Selected Product ID
+
+#ifndef APP_USBD_PID
+#define APP_USBD_PID 0
+#endif
+
+// APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99>
+
+
+// Device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_MAJOR
+#define APP_USBD_DEVICE_VER_MAJOR 1
+#endif
+
+// APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99>
+
+
+// Device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_MINOR
+#define APP_USBD_DEVICE_VER_MINOR 0
+#endif
+
+#endif //APP_USBD_ENABLED
+//
+
+// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef CLOCK_ENABLED
+#define CLOCK_ENABLED 1
+#endif
+#if CLOCK_ENABLED
+// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
+
+// <0=> Default (64 MHz)
+
+#ifndef CLOCK_CONFIG_XTAL_FREQ
+#define CLOCK_CONFIG_XTAL_FREQ 0
+#endif
+
+// CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef CLOCK_CONFIG_LOG_ENABLED
+#define CLOCK_CONFIG_LOG_ENABLED 0
+#endif
+#if CLOCK_CONFIG_LOG_ENABLED
+// CLOCK_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef CLOCK_CONFIG_LOG_LEVEL
+#define CLOCK_CONFIG_LOG_LEVEL 3
+#endif
+
+// CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef CLOCK_CONFIG_INFO_COLOR
+#define CLOCK_CONFIG_INFO_COLOR 0
+#endif
+
+// CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef CLOCK_CONFIG_DEBUG_COLOR
+#define CLOCK_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //CLOCK_CONFIG_LOG_ENABLED
+//
+
+#endif //CLOCK_ENABLED
+//
+
+// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver
+//==========================================================
+#ifndef COMP_ENABLED
+#define COMP_ENABLED 0
+#endif
+#if COMP_ENABLED
+// COMP_CONFIG_REF - Reference voltage
+
+// <0=> Internal 1.2V
+// <1=> Internal 1.8V
+// <2=> Internal 2.4V
+// <4=> VDD
+// <7=> ARef
+
+#ifndef COMP_CONFIG_REF
+#define COMP_CONFIG_REF 1
+#endif
+
+// COMP_CONFIG_MAIN_MODE - Main mode
+
+// <0=> Single ended
+// <1=> Differential
+
+#ifndef COMP_CONFIG_MAIN_MODE
+#define COMP_CONFIG_MAIN_MODE 0
+#endif
+
+// COMP_CONFIG_SPEED_MODE - Speed mode
+
+// <0=> Low power
+// <1=> Normal
+// <2=> High speed
+
+#ifndef COMP_CONFIG_SPEED_MODE
+#define COMP_CONFIG_SPEED_MODE 2
+#endif
+
+// COMP_CONFIG_HYST - Hystheresis
+
+// <0=> No
+// <1=> 50mV
+
+#ifndef COMP_CONFIG_HYST
+#define COMP_CONFIG_HYST 0
+#endif
+
+// COMP_CONFIG_ISOURCE - Current Source
+
+// <0=> Off
+// <1=> 2.5 uA
+// <2=> 5 uA
+// <3=> 10 uA
+
+#ifndef COMP_CONFIG_ISOURCE
+#define COMP_CONFIG_ISOURCE 0
+#endif
+
+// COMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_INPUT
+#define COMP_CONFIG_INPUT 0
+#endif
+
+// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef COMP_CONFIG_IRQ_PRIORITY
+#define COMP_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// COMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef COMP_CONFIG_LOG_ENABLED
+#define COMP_CONFIG_LOG_ENABLED 0
+#endif
+#if COMP_CONFIG_LOG_ENABLED
+// COMP_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef COMP_CONFIG_LOG_LEVEL
+#define COMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// COMP_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMP_CONFIG_INFO_COLOR
+#define COMP_CONFIG_INFO_COLOR 0
+#endif
+
+// COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMP_CONFIG_DEBUG_COLOR
+#define COMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //COMP_CONFIG_LOG_ENABLED
+//
+
+#endif //COMP_ENABLED
+//
+
+// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver
+//==========================================================
+#ifndef EGU_ENABLED
+#define EGU_ENABLED 0
+#endif
+#if EGU_ENABLED
+// SWI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SWI_CONFIG_LOG_ENABLED
+#define SWI_CONFIG_LOG_ENABLED 0
+#endif
+#if SWI_CONFIG_LOG_ENABLED
+// SWI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef SWI_CONFIG_LOG_LEVEL
+#define SWI_CONFIG_LOG_LEVEL 3
+#endif
+
+// SWI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SWI_CONFIG_INFO_COLOR
+#define SWI_CONFIG_INFO_COLOR 0
+#endif
+
+// SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SWI_CONFIG_DEBUG_COLOR
+#define SWI_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //SWI_CONFIG_LOG_ENABLED
+//
+
+#endif //EGU_ENABLED
+//
+
+// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver
+//==========================================================
+#ifndef GPIOTE_ENABLED
+#define GPIOTE_ENABLED 1
+#endif
+#if GPIOTE_ENABLED
+// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
+#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4
+#endif
+
+// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef GPIOTE_CONFIG_IRQ_PRIORITY
+#define GPIOTE_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef GPIOTE_CONFIG_LOG_ENABLED
+#define GPIOTE_CONFIG_LOG_ENABLED 0
+#endif
+#if GPIOTE_CONFIG_LOG_ENABLED
+// GPIOTE_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef GPIOTE_CONFIG_LOG_LEVEL
+#define GPIOTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef GPIOTE_CONFIG_INFO_COLOR
+#define GPIOTE_CONFIG_INFO_COLOR 0
+#endif
+
+// GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef GPIOTE_CONFIG_DEBUG_COLOR
+#define GPIOTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //GPIOTE_CONFIG_LOG_ENABLED
+//
+
+#endif //GPIOTE_ENABLED
+//
+
+// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver
+//==========================================================
+#ifndef I2S_ENABLED
+#define I2S_ENABLED 0
+#endif
+#if I2S_ENABLED
+// I2S_CONFIG_SCK_PIN - SCK pin <0-31>
+
+
+#ifndef I2S_CONFIG_SCK_PIN
+#define I2S_CONFIG_SCK_PIN 31
+#endif
+
+// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31>
+
+
+#ifndef I2S_CONFIG_LRCK_PIN
+#define I2S_CONFIG_LRCK_PIN 30
+#endif
+
+// I2S_CONFIG_MCK_PIN - MCK pin
+#ifndef I2S_CONFIG_MCK_PIN
+#define I2S_CONFIG_MCK_PIN 255
+#endif
+
+// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDOUT_PIN
+#define I2S_CONFIG_SDOUT_PIN 29
+#endif
+
+// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31>
+
+
+#ifndef I2S_CONFIG_SDIN_PIN
+#define I2S_CONFIG_SDIN_PIN 28
+#endif
+
+// I2S_CONFIG_MASTER - Mode
+
+// <0=> Master
+// <1=> Slave
+
+#ifndef I2S_CONFIG_MASTER
+#define I2S_CONFIG_MASTER 0
+#endif
+
+// I2S_CONFIG_FORMAT - Format
+
+// <0=> I2S
+// <1=> Aligned
+
+#ifndef I2S_CONFIG_FORMAT
+#define I2S_CONFIG_FORMAT 0
+#endif
+
+// I2S_CONFIG_ALIGN - Alignment
+
+// <0=> Left
+// <1=> Right
+
+#ifndef I2S_CONFIG_ALIGN
+#define I2S_CONFIG_ALIGN 0
+#endif
+
+// I2S_CONFIG_SWIDTH - Sample width (bits)
+
+// <0=> 8
+// <1=> 16
+// <2=> 24
+
+#ifndef I2S_CONFIG_SWIDTH
+#define I2S_CONFIG_SWIDTH 1
+#endif
+
+// I2S_CONFIG_CHANNELS - Channels
+
+// <0=> Stereo
+// <1=> Left
+// <2=> Right
+
+#ifndef I2S_CONFIG_CHANNELS
+#define I2S_CONFIG_CHANNELS 1
+#endif
+
+// I2S_CONFIG_MCK_SETUP - MCK behavior
+
+// <0=> Disabled
+// <2147483648=> 32MHz/2
+// <1342177280=> 32MHz/3
+// <1073741824=> 32MHz/4
+// <805306368=> 32MHz/5
+// <671088640=> 32MHz/6
+// <536870912=> 32MHz/8
+// <402653184=> 32MHz/10
+// <369098752=> 32MHz/11
+// <285212672=> 32MHz/15
+// <268435456=> 32MHz/16
+// <201326592=> 32MHz/21
+// <184549376=> 32MHz/23
+// <142606336=> 32MHz/30
+// <138412032=> 32MHz/31
+// <134217728=> 32MHz/32
+// <100663296=> 32MHz/42
+// <68157440=> 32MHz/63
+// <34340864=> 32MHz/125
+
+#ifndef I2S_CONFIG_MCK_SETUP
+#define I2S_CONFIG_MCK_SETUP 536870912
+#endif
+
+// I2S_CONFIG_RATIO - MCK/LRCK ratio
+
+// <0=> 32x
+// <1=> 48x
+// <2=> 64x
+// <3=> 96x
+// <4=> 128x
+// <5=> 192x
+// <6=> 256x
+// <7=> 384x
+// <8=> 512x
+
+#ifndef I2S_CONFIG_RATIO
+#define I2S_CONFIG_RATIO 2000
+#endif
+
+// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef I2S_CONFIG_IRQ_PRIORITY
+#define I2S_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// I2S_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef I2S_CONFIG_LOG_ENABLED
+#define I2S_CONFIG_LOG_ENABLED 0
+#endif
+#if I2S_CONFIG_LOG_ENABLED
+// I2S_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef I2S_CONFIG_LOG_LEVEL
+#define I2S_CONFIG_LOG_LEVEL 3
+#endif
+
+// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef I2S_CONFIG_INFO_COLOR
+#define I2S_CONFIG_INFO_COLOR 0
+#endif
+
+// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef I2S_CONFIG_DEBUG_COLOR
+#define I2S_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //I2S_CONFIG_LOG_ENABLED
+//
+
+#endif //I2S_ENABLED
+//
+
+// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver
+//==========================================================
+#ifndef LPCOMP_ENABLED
+#define LPCOMP_ENABLED 0
+#endif
+#if LPCOMP_ENABLED
+// LPCOMP_CONFIG_REFERENCE - Reference voltage
+
+// <0=> Supply 1/8
+// <1=> Supply 2/8
+// <2=> Supply 3/8
+// <3=> Supply 4/8
+// <4=> Supply 5/8
+// <5=> Supply 6/8
+// <6=> Supply 7/8
+// <8=> Supply 1/16 (nRF52)
+// <9=> Supply 3/16 (nRF52)
+// <10=> Supply 5/16 (nRF52)
+// <11=> Supply 7/16 (nRF52)
+// <12=> Supply 9/16 (nRF52)
+// <13=> Supply 11/16 (nRF52)
+// <14=> Supply 13/16 (nRF52)
+// <15=> Supply 15/16 (nRF52)
+// <7=> External Ref 0
+// <65543=> External Ref 1
+
+#ifndef LPCOMP_CONFIG_REFERENCE
+#define LPCOMP_CONFIG_REFERENCE 3
+#endif
+
+// LPCOMP_CONFIG_DETECTION - Detection
+
+// <0=> Crossing
+// <1=> Up
+// <2=> Down
+
+#ifndef LPCOMP_CONFIG_DETECTION
+#define LPCOMP_CONFIG_DETECTION 2
+#endif
+
+// LPCOMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_INPUT
+#define LPCOMP_CONFIG_INPUT 0
+#endif
+
+// LPCOMP_CONFIG_HYST - Hysteresis
+
+
+#ifndef LPCOMP_CONFIG_HYST
+#define LPCOMP_CONFIG_HYST 0
+#endif
+
+// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef LPCOMP_CONFIG_IRQ_PRIORITY
+#define LPCOMP_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef LPCOMP_CONFIG_LOG_ENABLED
+#define LPCOMP_CONFIG_LOG_ENABLED 0
+#endif
+#if LPCOMP_CONFIG_LOG_ENABLED
+// LPCOMP_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef LPCOMP_CONFIG_LOG_LEVEL
+#define LPCOMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef LPCOMP_CONFIG_INFO_COLOR
+#define LPCOMP_CONFIG_INFO_COLOR 0
+#endif
+
+// LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef LPCOMP_CONFIG_DEBUG_COLOR
+#define LPCOMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //LPCOMP_CONFIG_LOG_ENABLED
+//
+
+#endif //LPCOMP_ENABLED
+//
+
+// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver
+//==========================================================
+#ifndef PDM_ENABLED
+#define PDM_ENABLED 0
+#endif
+#if PDM_ENABLED
+// PDM_CONFIG_MODE - Mode
+
+// <0=> Stereo
+// <1=> Mono
+
+#ifndef PDM_CONFIG_MODE
+#define PDM_CONFIG_MODE 1
+#endif
+
+// PDM_CONFIG_EDGE - Edge
+
+// <0=> Left falling
+// <1=> Left rising
+
+#ifndef PDM_CONFIG_EDGE
+#define PDM_CONFIG_EDGE 0
+#endif
+
+// PDM_CONFIG_CLOCK_FREQ - Clock frequency
+
+// <134217728=> 1000k
+// <138412032=> 1032k (default)
+// <142606336=> 1067k
+
+#ifndef PDM_CONFIG_CLOCK_FREQ
+#define PDM_CONFIG_CLOCK_FREQ 138412032
+#endif
+
+// PDM_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PDM_CONFIG_IRQ_PRIORITY
+#define PDM_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// PDM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef PDM_CONFIG_LOG_ENABLED
+#define PDM_CONFIG_LOG_ENABLED 0
+#endif
+#if PDM_CONFIG_LOG_ENABLED
+// PDM_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef PDM_CONFIG_LOG_LEVEL
+#define PDM_CONFIG_LOG_LEVEL 3
+#endif
+
+// PDM_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef PDM_CONFIG_INFO_COLOR
+#define PDM_CONFIG_INFO_COLOR 0
+#endif
+
+// PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef PDM_CONFIG_DEBUG_COLOR
+#define PDM_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //PDM_CONFIG_LOG_ENABLED
+//
+
+#endif //PDM_ENABLED
+//
+
+// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module
+//==========================================================
+#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
+#endif
+#if PERIPHERAL_RESOURCE_SHARING_ENABLED
+// COMMON_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef COMMON_CONFIG_LOG_ENABLED
+#define COMMON_CONFIG_LOG_ENABLED 0
+#endif
+#if COMMON_CONFIG_LOG_ENABLED
+// COMMON_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef COMMON_CONFIG_LOG_LEVEL
+#define COMMON_CONFIG_LOG_LEVEL 3
+#endif
+
+// COMMON_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMMON_CONFIG_INFO_COLOR
+#define COMMON_CONFIG_INFO_COLOR 0
+#endif
+
+// COMMON_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMMON_CONFIG_DEBUG_COLOR
+#define COMMON_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //COMMON_CONFIG_LOG_ENABLED
+//
+
+#endif //PERIPHERAL_RESOURCE_SHARING_ENABLED
+//
+
+// POWER_ENABLED - nrf_drv_power - POWER peripheral driver
+//==========================================================
+#ifndef POWER_ENABLED
+#define POWER_ENABLED 0
+#endif
+#if POWER_ENABLED
+// POWER_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef POWER_CONFIG_IRQ_PRIORITY
+#define POWER_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator
+
+
+// This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef POWER_CONFIG_DEFAULT_DCDCEN
+#define POWER_CONFIG_DEFAULT_DCDCEN 0
+#endif
+
+// POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator
+
+
+// This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef POWER_CONFIG_DEFAULT_DCDCENHV
+#define POWER_CONFIG_DEFAULT_DCDCENHV 0
+#endif
+
+#endif //POWER_ENABLED
+//
+
+// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver
+//==========================================================
+#ifndef PPI_ENABLED
+#define PPI_ENABLED 0
+#endif
+#if PPI_ENABLED
+// PPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef PPI_CONFIG_LOG_ENABLED
+#define PPI_CONFIG_LOG_ENABLED 0
+#endif
+#if PPI_CONFIG_LOG_ENABLED
+// PPI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef PPI_CONFIG_LOG_LEVEL
+#define PPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// PPI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef PPI_CONFIG_INFO_COLOR
+#define PPI_CONFIG_INFO_COLOR 0
+#endif
+
+// PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef PPI_CONFIG_DEBUG_COLOR
+#define PPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //PPI_CONFIG_LOG_ENABLED
+//
+
+#endif //PPI_ENABLED
+//
+
+// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver
+//==========================================================
+#ifndef PWM_ENABLED
+#define PWM_ENABLED 0
+#endif
+#if PWM_ENABLED
+// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN
+#define PWM_DEFAULT_CONFIG_OUT0_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN
+#define PWM_DEFAULT_CONFIG_OUT1_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN
+#define PWM_DEFAULT_CONFIG_OUT2_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31>
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN
+#define PWM_DEFAULT_CONFIG_OUT3_PIN 31
+#endif
+
+// PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 MHz
+
+#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define PWM_DEFAULT_CONFIG_BASE_CLOCK 4
+#endif
+
+// PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode
+
+// <0=> Up
+// <1=> Up and Down
+
+#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE
+#define PWM_DEFAULT_CONFIG_COUNT_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value
+#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE
+#define PWM_DEFAULT_CONFIG_TOP_VALUE 1000
+#endif
+
+// PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode
+
+// <0=> Common
+// <1=> Grouped
+// <2=> Individual
+// <3=> Waveform
+
+#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE
+#define PWM_DEFAULT_CONFIG_LOAD_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_STEP_MODE - Step mode
+
+// <0=> Auto
+// <1=> Triggered
+
+#ifndef PWM_DEFAULT_CONFIG_STEP_MODE
+#define PWM_DEFAULT_CONFIG_STEP_MODE 0
+#endif
+
+// PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// PWM0_ENABLED - Enable PWM0 instance
+
+
+#ifndef PWM0_ENABLED
+#define PWM0_ENABLED 0
+#endif
+
+// PWM1_ENABLED - Enable PWM1 instance
+
+
+#ifndef PWM1_ENABLED
+#define PWM1_ENABLED 0
+#endif
+
+// PWM2_ENABLED - Enable PWM2 instance
+
+
+#ifndef PWM2_ENABLED
+#define PWM2_ENABLED 0
+#endif
+
+// PWM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef PWM_CONFIG_LOG_ENABLED
+#define PWM_CONFIG_LOG_ENABLED 0
+#endif
+#if PWM_CONFIG_LOG_ENABLED
+// PWM_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef PWM_CONFIG_LOG_LEVEL
+#define PWM_CONFIG_LOG_LEVEL 3
+#endif
+
+// PWM_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef PWM_CONFIG_INFO_COLOR
+#define PWM_CONFIG_INFO_COLOR 0
+#endif
+
+// PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef PWM_CONFIG_DEBUG_COLOR
+#define PWM_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //PWM_CONFIG_LOG_ENABLED
+//
+
+#endif //PWM_ENABLED
+//
+
+// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver
+//==========================================================
+#ifndef QDEC_ENABLED
+#define QDEC_ENABLED 0
+#endif
+#if QDEC_ENABLED
+// QDEC_CONFIG_REPORTPER - Report period
+
+// <0=> 10 Samples
+// <1=> 40 Samples
+// <2=> 80 Samples
+// <3=> 120 Samples
+// <4=> 160 Samples
+// <5=> 200 Samples
+// <6=> 240 Samples
+// <7=> 280 Samples
+
+#ifndef QDEC_CONFIG_REPORTPER
+#define QDEC_CONFIG_REPORTPER 0
+#endif
+
+// QDEC_CONFIG_SAMPLEPER - Sample period
+
+// <0=> 128 us
+// <1=> 256 us
+// <2=> 512 us
+// <3=> 1024 us
+// <4=> 2048 us
+// <5=> 4096 us
+// <6=> 8192 us
+// <7=> 16384 us
+
+#ifndef QDEC_CONFIG_SAMPLEPER
+#define QDEC_CONFIG_SAMPLEPER 7
+#endif
+
+// QDEC_CONFIG_PIO_A - A pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_A
+#define QDEC_CONFIG_PIO_A 31
+#endif
+
+// QDEC_CONFIG_PIO_B - B pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_B
+#define QDEC_CONFIG_PIO_B 31
+#endif
+
+// QDEC_CONFIG_PIO_LED - LED pin <0-31>
+
+
+#ifndef QDEC_CONFIG_PIO_LED
+#define QDEC_CONFIG_PIO_LED 31
+#endif
+
+// QDEC_CONFIG_LEDPRE - LED pre
+#ifndef QDEC_CONFIG_LEDPRE
+#define QDEC_CONFIG_LEDPRE 511
+#endif
+
+// QDEC_CONFIG_LEDPOL - LED polarity
+
+// <0=> Active low
+// <1=> Active high
+
+#ifndef QDEC_CONFIG_LEDPOL
+#define QDEC_CONFIG_LEDPOL 1
+#endif
+
+// QDEC_CONFIG_DBFEN - Debouncing enable
+
+
+#ifndef QDEC_CONFIG_DBFEN
+#define QDEC_CONFIG_DBFEN 0
+#endif
+
+// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable
+
+
+#ifndef QDEC_CONFIG_SAMPLE_INTEN
+#define QDEC_CONFIG_SAMPLE_INTEN 0
+#endif
+
+// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef QDEC_CONFIG_IRQ_PRIORITY
+#define QDEC_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// QDEC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef QDEC_CONFIG_LOG_ENABLED
+#define QDEC_CONFIG_LOG_ENABLED 0
+#endif
+#if QDEC_CONFIG_LOG_ENABLED
+// QDEC_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef QDEC_CONFIG_LOG_LEVEL
+#define QDEC_CONFIG_LOG_LEVEL 3
+#endif
+
+// QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef QDEC_CONFIG_INFO_COLOR
+#define QDEC_CONFIG_INFO_COLOR 0
+#endif
+
+// QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef QDEC_CONFIG_DEBUG_COLOR
+#define QDEC_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //QDEC_CONFIG_LOG_ENABLED
+//
+
+#endif //QDEC_ENABLED
+//
+
+// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver
+//==========================================================
+#ifndef RNG_ENABLED
+#define RNG_ENABLED 0
+#endif
+#if RNG_ENABLED
+// RNG_CONFIG_ERROR_CORRECTION - Error correction
+
+
+#ifndef RNG_CONFIG_ERROR_CORRECTION
+#define RNG_CONFIG_ERROR_CORRECTION 0
+#endif
+
+// RNG_CONFIG_POOL_SIZE - Pool size
+#ifndef RNG_CONFIG_POOL_SIZE
+#define RNG_CONFIG_POOL_SIZE 32
+#endif
+
+// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RNG_CONFIG_IRQ_PRIORITY
+#define RNG_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// RNG_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef RNG_CONFIG_LOG_ENABLED
+#define RNG_CONFIG_LOG_ENABLED 0
+#endif
+#if RNG_CONFIG_LOG_ENABLED
+// RNG_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef RNG_CONFIG_LOG_LEVEL
+#define RNG_CONFIG_LOG_LEVEL 3
+#endif
+
+// RNG_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RNG_CONFIG_INFO_COLOR
+#define RNG_CONFIG_INFO_COLOR 0
+#endif
+
+// RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RNG_CONFIG_DEBUG_COLOR
+#define RNG_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //RNG_CONFIG_LOG_ENABLED
+//
+
+#endif //RNG_ENABLED
+//
+
+// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver
+//==========================================================
+#ifndef RTC_ENABLED
+#define RTC_ENABLED 0
+#endif
+#if RTC_ENABLED
+// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
+
+
+#ifndef RTC_DEFAULT_CONFIG_FREQUENCY
+#define RTC_DEFAULT_CONFIG_FREQUENCY 32768
+#endif
+
+// RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering
+
+
+#ifndef RTC_DEFAULT_CONFIG_RELIABLE
+#define RTC_DEFAULT_CONFIG_RELIABLE 0
+#endif
+
+// RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// RTC0_ENABLED - Enable RTC0 instance
+
+
+#ifndef RTC0_ENABLED
+#define RTC0_ENABLED 0
+#endif
+
+// RTC1_ENABLED - Enable RTC1 instance
+
+
+#ifndef RTC1_ENABLED
+#define RTC1_ENABLED 0
+#endif
+
+// RTC2_ENABLED - Enable RTC2 instance
+
+
+#ifndef RTC2_ENABLED
+#define RTC2_ENABLED 0
+#endif
+
+// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt
+#ifndef NRF_MAXIMUM_LATENCY_US
+#define NRF_MAXIMUM_LATENCY_US 2000
+#endif
+
+// RTC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef RTC_CONFIG_LOG_ENABLED
+#define RTC_CONFIG_LOG_ENABLED 0
+#endif
+#if RTC_CONFIG_LOG_ENABLED
+// RTC_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef RTC_CONFIG_LOG_LEVEL
+#define RTC_CONFIG_LOG_LEVEL 3
+#endif
+
+// RTC_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RTC_CONFIG_INFO_COLOR
+#define RTC_CONFIG_INFO_COLOR 0
+#endif
+
+// RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RTC_CONFIG_DEBUG_COLOR
+#define RTC_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //RTC_CONFIG_LOG_ENABLED
+//
+
+#endif //RTC_ENABLED
+//
+
+// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver
+//==========================================================
+#ifndef SAADC_ENABLED
+#define SAADC_ENABLED 0
+#endif
+#if SAADC_ENABLED
+// SAADC_CONFIG_RESOLUTION - Resolution
+
+// <0=> 8 bit
+// <1=> 10 bit
+// <2=> 12 bit
+// <3=> 14 bit
+
+#ifndef SAADC_CONFIG_RESOLUTION
+#define SAADC_CONFIG_RESOLUTION 1
+#endif
+
+// SAADC_CONFIG_OVERSAMPLE - Sample period
+
+// <0=> Disabled
+// <1=> 2x
+// <2=> 4x
+// <3=> 8x
+// <4=> 16x
+// <5=> 32x
+// <6=> 64x
+// <7=> 128x
+// <8=> 256x
+
+#ifndef SAADC_CONFIG_OVERSAMPLE
+#define SAADC_CONFIG_OVERSAMPLE 0
+#endif
+
+// SAADC_CONFIG_LP_MODE - Enabling low power mode
+
+
+#ifndef SAADC_CONFIG_LP_MODE
+#define SAADC_CONFIG_LP_MODE 0
+#endif
+
+// SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SAADC_CONFIG_IRQ_PRIORITY
+#define SAADC_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// SAADC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SAADC_CONFIG_LOG_ENABLED
+#define SAADC_CONFIG_LOG_ENABLED 0
+#endif
+#if SAADC_CONFIG_LOG_ENABLED
+// SAADC_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef SAADC_CONFIG_LOG_LEVEL
+#define SAADC_CONFIG_LOG_LEVEL 3
+#endif
+
+// SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SAADC_CONFIG_INFO_COLOR
+#define SAADC_CONFIG_INFO_COLOR 0
+#endif
+
+// SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SAADC_CONFIG_DEBUG_COLOR
+#define SAADC_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //SAADC_CONFIG_LOG_ENABLED
+//
+
+#endif //SAADC_ENABLED
+//
+
+// SPIS_ENABLED - nrf_drv_spis - SPI Slave driver
+//==========================================================
+#ifndef SPIS_ENABLED
+#define SPIS_ENABLED 0
+#endif
+#if SPIS_ENABLED
+// SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// SPIS_DEFAULT_MODE - Mode
+
+// <0=> MODE_0
+// <1=> MODE_1
+// <2=> MODE_2
+// <3=> MODE_3
+
+#ifndef SPIS_DEFAULT_MODE
+#define SPIS_DEFAULT_MODE 0
+#endif
+
+// SPIS_DEFAULT_BIT_ORDER - SPIS default bit order
+
+// <0=> MSB first
+// <1=> LSB first
+
+#ifndef SPIS_DEFAULT_BIT_ORDER
+#define SPIS_DEFAULT_BIT_ORDER 0
+#endif
+
+// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
+
+
+#ifndef SPIS_DEFAULT_DEF
+#define SPIS_DEFAULT_DEF 255
+#endif
+
+// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
+
+
+#ifndef SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_ORC 255
+#endif
+
+// SPIS0_ENABLED - Enable SPIS0 instance
+
+
+#ifndef SPIS0_ENABLED
+#define SPIS0_ENABLED 0
+#endif
+
+// SPIS1_ENABLED - Enable SPIS1 instance
+
+
+#ifndef SPIS1_ENABLED
+#define SPIS1_ENABLED 0
+#endif
+
+// SPIS2_ENABLED - Enable SPIS2 instance
+
+
+#ifndef SPIS2_ENABLED
+#define SPIS2_ENABLED 0
+#endif
+
+// SPIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SPIS_CONFIG_LOG_ENABLED
+#define SPIS_CONFIG_LOG_ENABLED 0
+#endif
+#if SPIS_CONFIG_LOG_ENABLED
+// SPIS_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef SPIS_CONFIG_LOG_LEVEL
+#define SPIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPIS_CONFIG_INFO_COLOR
+#define SPIS_CONFIG_INFO_COLOR 0
+#endif
+
+// SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPIS_CONFIG_DEBUG_COLOR
+#define SPIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //SPIS_CONFIG_LOG_ENABLED
+//
+
+#endif //SPIS_ENABLED
+//
+
+// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver
+//==========================================================
+#ifndef SPI_ENABLED
+#define SPI_ENABLED 0
+#endif
+#if SPI_ENABLED
+// SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// SPI0_ENABLED - Enable SPI0 instance
+//==========================================================
+#ifndef SPI0_ENABLED
+#define SPI0_ENABLED 0
+#endif
+#if SPI0_ENABLED
+// SPI0_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI0_USE_EASY_DMA
+#define SPI0_USE_EASY_DMA 1
+#endif
+
+// SPI0_DEFAULT_FREQUENCY - SPI frequency
+
+// <33554432=> 125 kHz
+// <67108864=> 250 kHz
+// <134217728=> 500 kHz
+// <268435456=> 1 MHz
+// <536870912=> 2 MHz
+// <1073741824=> 4 MHz
+// <2147483648=> 8 MHz
+
+#ifndef SPI0_DEFAULT_FREQUENCY
+#define SPI0_DEFAULT_FREQUENCY 1073741824
+#endif
+
+#endif //SPI0_ENABLED
+//
+
+// SPI1_ENABLED - Enable SPI1 instance
+//==========================================================
+#ifndef SPI1_ENABLED
+#define SPI1_ENABLED 0
+#endif
+#if SPI1_ENABLED
+// SPI1_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI1_USE_EASY_DMA
+#define SPI1_USE_EASY_DMA 1
+#endif
+
+// SPI1_DEFAULT_FREQUENCY - SPI frequency
+
+// <33554432=> 125 kHz
+// <67108864=> 250 kHz
+// <134217728=> 500 kHz
+// <268435456=> 1 MHz
+// <536870912=> 2 MHz
+// <1073741824=> 4 MHz
+// <2147483648=> 8 MHz
+
+#ifndef SPI1_DEFAULT_FREQUENCY
+#define SPI1_DEFAULT_FREQUENCY 1073741824
+#endif
+
+#endif //SPI1_ENABLED
+//
+
+// SPI2_ENABLED - Enable SPI2 instance
+//==========================================================
+#ifndef SPI2_ENABLED
+#define SPI2_ENABLED 0
+#endif
+#if SPI2_ENABLED
+// SPI2_USE_EASY_DMA - Use EasyDMA
+
+
+#ifndef SPI2_USE_EASY_DMA
+#define SPI2_USE_EASY_DMA 1
+#endif
+
+// SPI2_DEFAULT_FREQUENCY - Use EasyDMA
+
+
+#ifndef SPI2_DEFAULT_FREQUENCY
+#define SPI2_DEFAULT_FREQUENCY 1
+#endif
+
+#endif //SPI2_ENABLED
+//
+
+// SPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SPI_CONFIG_LOG_ENABLED
+#define SPI_CONFIG_LOG_ENABLED 0
+#endif
+#if SPI_CONFIG_LOG_ENABLED
+// SPI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef SPI_CONFIG_LOG_LEVEL
+#define SPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_INFO_COLOR
+#define SPI_CONFIG_INFO_COLOR 0
+#endif
+
+// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef SPI_CONFIG_DEBUG_COLOR
+#define SPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //SPI_CONFIG_LOG_ENABLED
+//
+
+#endif //SPI_ENABLED
+//
+
+// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver
+//==========================================================
+#ifndef TIMER_ENABLED
+#define TIMER_ENABLED 0
+#endif
+#if TIMER_ENABLED
+// TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 kHz
+// <8=> 62.5 kHz
+// <9=> 31.25 kHz
+
+#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY
+#define TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
+
+// <0=> Timer
+// <1=> Counter
+
+#ifndef TIMER_DEFAULT_CONFIG_MODE
+#define TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
+
+// <0=> 16 bit
+// <1=> 8 bit
+// <2=> 24 bit
+// <3=> 32 bit
+
+#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// TIMER0_ENABLED - Enable TIMER0 instance
+
+
+#ifndef TIMER0_ENABLED
+#define TIMER0_ENABLED 0
+#endif
+
+// TIMER1_ENABLED - Enable TIMER1 instance
+
+
+#ifndef TIMER1_ENABLED
+#define TIMER1_ENABLED 0
+#endif
+
+// TIMER2_ENABLED - Enable TIMER2 instance
+
+
+#ifndef TIMER2_ENABLED
+#define TIMER2_ENABLED 0
+#endif
+
+// TIMER3_ENABLED - Enable TIMER3 instance
+
+
+#ifndef TIMER3_ENABLED
+#define TIMER3_ENABLED 0
+#endif
+
+// TIMER4_ENABLED - Enable TIMER4 instance
+
+
+#ifndef TIMER4_ENABLED
+#define TIMER4_ENABLED 0
+#endif
+
+// TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef TIMER_CONFIG_LOG_ENABLED
+#define TIMER_CONFIG_LOG_ENABLED 0
+#endif
+#if TIMER_CONFIG_LOG_ENABLED
+// TIMER_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef TIMER_CONFIG_LOG_LEVEL
+#define TIMER_CONFIG_LOG_LEVEL 3
+#endif
+
+// TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef TIMER_CONFIG_INFO_COLOR
+#define TIMER_CONFIG_INFO_COLOR 0
+#endif
+
+// TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef TIMER_CONFIG_DEBUG_COLOR
+#define TIMER_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //TIMER_CONFIG_LOG_ENABLED
+//
+
+#endif //TIMER_ENABLED
+//
+
+// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver
+//==========================================================
+#ifndef TWIS_ENABLED
+#define TWIS_ENABLED 0
+#endif
+#if TWIS_ENABLED
+// TWIS_DEFAULT_CONFIG_ADDR0 - Address0
+#ifndef TWIS_DEFAULT_CONFIG_ADDR0
+#define TWIS_DEFAULT_CONFIG_ADDR0 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_ADDR1 - Address1
+#ifndef TWIS_DEFAULT_CONFIG_ADDR1
+#define TWIS_DEFAULT_CONFIG_ADDR1 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL
+#define TWIS_DEFAULT_CONFIG_SCL_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL
+#define TWIS_DEFAULT_CONFIG_SDA_PULL 0
+#endif
+
+// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// TWIS0_ENABLED - Enable TWIS0 instance
+
+
+#ifndef TWIS0_ENABLED
+#define TWIS0_ENABLED 0
+#endif
+
+// TWIS1_ENABLED - Enable TWIS1 instance
+
+
+#ifndef TWIS1_ENABLED
+#define TWIS1_ENABLED 0
+#endif
+
+// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once
+
+
+// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
+
+#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+#endif
+
+// TWIS_NO_SYNC_MODE - Remove support for synchronous mode
+
+
+// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
+
+#ifndef TWIS_NO_SYNC_MODE
+#define TWIS_NO_SYNC_MODE 0
+#endif
+
+// TWIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef TWIS_CONFIG_LOG_ENABLED
+#define TWIS_CONFIG_LOG_ENABLED 0
+#endif
+#if TWIS_CONFIG_LOG_ENABLED
+// TWIS_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef TWIS_CONFIG_LOG_LEVEL
+#define TWIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef TWIS_CONFIG_INFO_COLOR
+#define TWIS_CONFIG_INFO_COLOR 0
+#endif
+
+// TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef TWIS_CONFIG_DEBUG_COLOR
+#define TWIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //TWIS_CONFIG_LOG_ENABLED
+//
+
+#endif //TWIS_ENABLED
+//
+
+// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver
+//==========================================================
+#ifndef TWI_ENABLED
+#define TWI_ENABLED 0
+#endif
+#if TWI_ENABLED
+// TWI_DEFAULT_CONFIG_FREQUENCY - Frequency
+
+// <26738688=> 100k
+// <67108864=> 250k
+// <104857600=> 400k
+
+#ifndef TWI_DEFAULT_CONFIG_FREQUENCY
+#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init
+
+
+#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT
+#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit
+
+
+#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// TWI0_ENABLED - Enable TWI0 instance
+//==========================================================
+#ifndef TWI0_ENABLED
+#define TWI0_ENABLED 0
+#endif
+#if TWI0_ENABLED
+// TWI0_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI0_USE_EASY_DMA
+#define TWI0_USE_EASY_DMA 0
+#endif
+
+#endif //TWI0_ENABLED
+//
+
+// TWI1_ENABLED - Enable TWI1 instance
+//==========================================================
+#ifndef TWI1_ENABLED
+#define TWI1_ENABLED 0
+#endif
+#if TWI1_ENABLED
+// TWI1_USE_EASY_DMA - Use EasyDMA (if present)
+
+
+#ifndef TWI1_USE_EASY_DMA
+#define TWI1_USE_EASY_DMA 0
+#endif
+
+#endif //TWI1_ENABLED
+//
+
+// TWI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef TWI_CONFIG_LOG_ENABLED
+#define TWI_CONFIG_LOG_ENABLED 0
+#endif
+#if TWI_CONFIG_LOG_ENABLED
+// TWI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef TWI_CONFIG_LOG_LEVEL
+#define TWI_CONFIG_LOG_LEVEL 3
+#endif
+
+// TWI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef TWI_CONFIG_INFO_COLOR
+#define TWI_CONFIG_INFO_COLOR 0
+#endif
+
+// TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef TWI_CONFIG_DEBUG_COLOR
+#define TWI_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //TWI_CONFIG_LOG_ENABLED
+//
+
+#endif //TWI_ENABLED
+//
+
+// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver
+//==========================================================
+#ifndef UART_ENABLED
+#define UART_ENABLED 1
+#endif
+#if UART_ENABLED
+// UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef UART_DEFAULT_CONFIG_HWFC
+#define UART_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// UART_DEFAULT_CONFIG_PARITY - Parity
+
+// <0=> Excluded
+// <14=> Included
+
+#ifndef UART_DEFAULT_CONFIG_PARITY
+#define UART_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef UART_DEFAULT_CONFIG_BAUDRATE
+#define UART_DEFAULT_CONFIG_BAUDRATE 30801920
+#endif
+
+// UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA
+
+
+#ifndef UART_EASY_DMA_SUPPORT
+#define UART_EASY_DMA_SUPPORT 1
+#endif
+
+// UART_LEGACY_SUPPORT - Driver supporting Legacy mode
+
+
+#ifndef UART_LEGACY_SUPPORT
+#define UART_LEGACY_SUPPORT 1
+#endif
+
+// UART0_ENABLED - Enable UART0 instance
+//==========================================================
+#ifndef UART0_ENABLED
+#define UART0_ENABLED 1
+#endif
+#if UART0_ENABLED
+// UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA
+
+
+#ifndef UART0_CONFIG_USE_EASY_DMA
+#define UART0_CONFIG_USE_EASY_DMA 1
+#endif
+
+#endif //UART0_ENABLED
+//
+
+// UART_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef UART_CONFIG_LOG_ENABLED
+#define UART_CONFIG_LOG_ENABLED 0
+#endif
+#if UART_CONFIG_LOG_ENABLED
+// UART_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef UART_CONFIG_LOG_LEVEL
+#define UART_CONFIG_LOG_LEVEL 3
+#endif
+
+// UART_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef UART_CONFIG_INFO_COLOR
+#define UART_CONFIG_INFO_COLOR 0
+#endif
+
+// UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef UART_CONFIG_DEBUG_COLOR
+#define UART_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //UART_CONFIG_LOG_ENABLED
+//
+
+#endif //UART_ENABLED
+//
+
+// USBD_ENABLED - nrf_drv_usbd - USB driver
+//==========================================================
+#ifndef USBD_ENABLED
+#define USBD_ENABLED 0
+#endif
+#if USBD_ENABLED
+// USBD_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef USBD_CONFIG_IRQ_PRIORITY
+#define USBD_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// NRF_DRV_USBD_DMASCHEDULER_MODE - USBD SMA scheduler working scheme
+
+// <0=> Prioritized access
+// <1=> Round Robin
+
+#ifndef NRF_DRV_USBD_DMASCHEDULER_MODE
+#define NRF_DRV_USBD_DMASCHEDULER_MODE 0
+#endif
+
+// NRF_USBD_DRV_LOG_ENABLED - Enable logging.
+
+
+#ifndef NRF_USBD_DRV_LOG_ENABLED
+#define NRF_USBD_DRV_LOG_ENABLED 0
+#endif
+
+#endif //USBD_ENABLED
+//
+
+// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver
+//==========================================================
+#ifndef WDT_ENABLED
+#define WDT_ENABLED 0
+#endif
+#if WDT_ENABLED
+// WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode
+
+// <1=> Run in SLEEP, Pause in HALT
+// <8=> Pause in SLEEP, Run in HALT
+// <9=> Run in SLEEP and HALT
+// <0=> Pause in SLEEP and HALT
+
+#ifndef WDT_CONFIG_BEHAVIOUR
+#define WDT_CONFIG_BEHAVIOUR 1
+#endif
+
+// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295>
+
+
+#ifndef WDT_CONFIG_RELOAD_VALUE
+#define WDT_CONFIG_RELOAD_VALUE 2000
+#endif
+
+// WDT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef WDT_CONFIG_IRQ_PRIORITY
+#define WDT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// WDT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef WDT_CONFIG_LOG_ENABLED
+#define WDT_CONFIG_LOG_ENABLED 0
+#endif
+#if WDT_CONFIG_LOG_ENABLED
+// WDT_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef WDT_CONFIG_LOG_LEVEL
+#define WDT_CONFIG_LOG_LEVEL 3
+#endif
+
+// WDT_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef WDT_CONFIG_INFO_COLOR
+#define WDT_CONFIG_INFO_COLOR 0
+#endif
+
+// WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef WDT_CONFIG_DEBUG_COLOR
+#define WDT_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //WDT_CONFIG_LOG_ENABLED
+//
+
+#endif //WDT_ENABLED
+//
+
+//
+//==========================================================
+
+// nRF_Libraries
+
+//==========================================================
+// APP_FIFO_ENABLED - app_fifo - Software FIFO implementation
+
+
+#ifndef APP_FIFO_ENABLED
+#define APP_FIFO_ENABLED 1
+#endif
+
+// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher
+
+
+#ifndef APP_GPIOTE_ENABLED
+#define APP_GPIOTE_ENABLED 0
+#endif
+
+// APP_PWM_ENABLED - app_pwm - PWM functionality
+
+
+#ifndef APP_PWM_ENABLED
+#define APP_PWM_ENABLED 0
+#endif
+
+// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
+//==========================================================
+#ifndef APP_SCHEDULER_ENABLED
+#define APP_SCHEDULER_ENABLED 0
+#endif
+#if APP_SCHEDULER_ENABLED
+// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature
+
+
+#ifndef APP_SCHEDULER_WITH_PAUSE
+#define APP_SCHEDULER_WITH_PAUSE 0
+#endif
+
+// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling
+
+
+#ifndef APP_SCHEDULER_WITH_PROFILER
+#define APP_SCHEDULER_WITH_PROFILER 0
+#endif
+
+#endif //APP_SCHEDULER_ENABLED
+//
+
+// APP_TIMER_ENABLED - app_timer - Application timer functionality
+//==========================================================
+#ifndef APP_TIMER_ENABLED
+#define APP_TIMER_ENABLED 1
+#endif
+#if APP_TIMER_ENABLED
+// APP_TIMER_WITH_PROFILER - Enable app_timer profiling
+
+
+#ifndef APP_TIMER_WITH_PROFILER
+#define APP_TIMER_WITH_PROFILER 0
+#endif
+
+// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on
+
+
+// If option is enabled RTC is kept running even if there is no active timers.
+// This option can be used when app_timer is used for timestamping.
+
+#ifndef APP_TIMER_KEEPS_RTC_ACTIVE
+#define APP_TIMER_KEEPS_RTC_ACTIVE 0
+#endif
+
+#endif //APP_TIMER_ENABLED
+//
+
+// APP_TWI_ENABLED - app_twi - TWI transaction manager
+
+
+#ifndef APP_TWI_ENABLED
+#define APP_TWI_ENABLED 0
+#endif
+
+// APP_UART_ENABLED - app_uart - UART driver
+//==========================================================
+#ifndef APP_UART_ENABLED
+#define APP_UART_ENABLED 1
+#endif
+#if APP_UART_ENABLED
+// APP_UART_DRIVER_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef APP_UART_DRIVER_INSTANCE
+#define APP_UART_DRIVER_INSTANCE 0
+#endif
+
+#endif //APP_UART_ENABLED
+//
+
+// APP_USBD_CLASS_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class
+
+
+#ifndef APP_USBD_CLASS_AUDIO_ENABLED
+#define APP_USBD_CLASS_AUDIO_ENABLED 0
+#endif
+
+// APP_USBD_CLASS_HID_ENABLED - app_usbd_hid - USB HID class
+
+
+#ifndef APP_USBD_CLASS_HID_ENABLED
+#define APP_USBD_CLASS_HID_ENABLED 0
+#endif
+
+// APP_USBD_HID_GENERIC_ENABLED - app_usbd_hid_generic - USB HID generic
+
+
+#ifndef APP_USBD_HID_GENERIC_ENABLED
+#define APP_USBD_HID_GENERIC_ENABLED 0
+#endif
+
+// APP_USBD_HID_KBD_ENABLED - app_usbd_hid_kbd - USB HID keyboard
+
+
+#ifndef APP_USBD_HID_KBD_ENABLED
+#define APP_USBD_HID_KBD_ENABLED 0
+#endif
+
+// APP_USBD_HID_MOUSE_ENABLED - app_usbd_hid_mouse - USB HID mouse
+
+
+#ifndef APP_USBD_HID_MOUSE_ENABLED
+#define APP_USBD_HID_MOUSE_ENABLED 0
+#endif
+
+// BUTTON_ENABLED - app_button - buttons handling module
+
+
+#ifndef BUTTON_ENABLED
+#define BUTTON_ENABLED 1
+#endif
+
+// CRC16_ENABLED - crc16 - CRC16 calculation routines
+
+
+#ifndef CRC16_ENABLED
+#define CRC16_ENABLED 0
+#endif
+
+// CRC32_ENABLED - crc32 - CRC32 calculation routines
+
+
+#ifndef CRC32_ENABLED
+#define CRC32_ENABLED 0
+#endif
+
+// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library
+
+
+#ifndef ECC_ENABLED
+#define ECC_ENABLED 0
+#endif
+
+// FDS_ENABLED - fds - Flash data storage module
+//==========================================================
+#ifndef FDS_ENABLED
+#define FDS_ENABLED 0
+#endif
+#if FDS_ENABLED
+// FDS_OP_QUEUE_SIZE - Size of the internal queue.
+#ifndef FDS_OP_QUEUE_SIZE
+#define FDS_OP_QUEUE_SIZE 4
+#endif
+
+// FDS_CHUNK_QUEUE_SIZE - Determines how many @ref fds_record_chunk_t structures can be buffered at any time.
+#ifndef FDS_CHUNK_QUEUE_SIZE
+#define FDS_CHUNK_QUEUE_SIZE 8
+#endif
+
+// FDS_MAX_USERS - Maximum number of callbacks that can be registered.
+#ifndef FDS_MAX_USERS
+#define FDS_MAX_USERS 8
+#endif
+
+// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use.
+// One of the virtual pages is reserved by the system for garbage collection.
+// Therefore, the minimum is two virtual pages: one page to store data and
+// one page to be used by the system for garbage collection. The total amount
+// of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES
+// @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes.
+
+#ifndef FDS_VIRTUAL_PAGES
+#define FDS_VIRTUAL_PAGES 3
+#endif
+
+// FDS_VIRTUAL_PAGE_SIZE - The size of a virtual page of flash memory, expressed in number of 4-byte words.
+
+
+// By default, a virtual page is the same size as a physical page.
+// The size of a virtual page must be a multiple of the size of a physical page.
+// <1024=> 1024
+// <2048=> 2048
+
+#ifndef FDS_VIRTUAL_PAGE_SIZE
+#define FDS_VIRTUAL_PAGE_SIZE 1024
+#endif
+
+#endif //FDS_ENABLED
+//
+
+// FSTORAGE_ENABLED - fstorage - Flash storage module
+//==========================================================
+#ifndef FSTORAGE_ENABLED
+#define FSTORAGE_ENABLED 1
+#endif
+#if FSTORAGE_ENABLED
+// FS_QUEUE_SIZE - Configures the size of the internal queue.
+// Increase this if there are many users, or if it is likely that many
+// operation will be queued at once without waiting for the previous operations
+// to complete. In general, increase the queue size if you frequently receive
+// @ref FS_ERR_QUEUE_FULL errors when calling @ref fs_store or @ref fs_erase.
+
+#ifndef FS_QUEUE_SIZE
+#define FS_QUEUE_SIZE 4
+#endif
+
+// FS_OP_MAX_RETRIES - Number attempts to execute an operation if the SoftDevice fails.
+// Increase this value if events return the @ref FS_ERR_OPERATION_TIMEOUT
+// error often. The SoftDevice may fail to schedule flash access due to high BLE activity.
+
+#ifndef FS_OP_MAX_RETRIES
+#define FS_OP_MAX_RETRIES 3
+#endif
+
+// FS_MAX_WRITE_SIZE_WORDS - Maximum number of words to be written to flash in a single operation.
+// Tweaking this value can increase the chances of the SoftDevice being
+// able to fit flash operations in between radio activity. This value is bound by the
+// maximum number of words which the SoftDevice can write to flash in a single call to
+// @ref sd_flash_write, which is 256 words for nRF51 ICs and 1024 words for nRF52 ICs.
+
+#ifndef FS_MAX_WRITE_SIZE_WORDS
+#define FS_MAX_WRITE_SIZE_WORDS 1024
+#endif
+
+#endif //FSTORAGE_ENABLED
+//
+
+// HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release
+
+
+#ifndef HARDFAULT_HANDLER_ENABLED
+#define HARDFAULT_HANDLER_ENABLED 0
+#endif
+
+// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI
+//==========================================================
+#ifndef HCI_MEM_POOL_ENABLED
+#define HCI_MEM_POOL_ENABLED 0
+#endif
+#if HCI_MEM_POOL_ENABLED
+// HCI_TX_BUF_SIZE - TX buffer size in bytes.
+#ifndef HCI_TX_BUF_SIZE
+#define HCI_TX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_SIZE - RX buffer size in bytes.
+#ifndef HCI_RX_BUF_SIZE
+#define HCI_RX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size.
+#ifndef HCI_RX_BUF_QUEUE_SIZE
+#define HCI_RX_BUF_QUEUE_SIZE 4
+#endif
+
+#endif //HCI_MEM_POOL_ENABLED
+//
+
+// HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI
+//==========================================================
+#ifndef HCI_SLIP_ENABLED
+#define HCI_SLIP_ENABLED 0
+#endif
+#if HCI_SLIP_ENABLED
+// HCI_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef HCI_UART_BAUDRATE
+#define HCI_UART_BAUDRATE 30801920
+#endif
+
+// HCI_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef HCI_UART_FLOW_CONTROL
+#define HCI_UART_FLOW_CONTROL 0
+#endif
+
+// HCI_UART_RX_PIN - UART RX pin
+#ifndef HCI_UART_RX_PIN
+#define HCI_UART_RX_PIN 8
+#endif
+
+// HCI_UART_TX_PIN - UART TX pin
+#ifndef HCI_UART_TX_PIN
+#define HCI_UART_TX_PIN 6
+#endif
+
+// HCI_UART_RTS_PIN - UART RTS pin
+#ifndef HCI_UART_RTS_PIN
+#define HCI_UART_RTS_PIN 5
+#endif
+
+// HCI_UART_CTS_PIN - UART CTS pin
+#ifndef HCI_UART_CTS_PIN
+#define HCI_UART_CTS_PIN 7
+#endif
+
+#endif //HCI_SLIP_ENABLED
+//
+
+// HCI_TRANSPORT_ENABLED - hci_transport - HCI transport
+//==========================================================
+#ifndef HCI_TRANSPORT_ENABLED
+#define HCI_TRANSPORT_ENABLED 0
+#endif
+#if HCI_TRANSPORT_ENABLED
+// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits.
+#ifndef HCI_MAX_PACKET_SIZE_IN_BITS
+#define HCI_MAX_PACKET_SIZE_IN_BITS 8000
+#endif
+
+#endif //HCI_TRANSPORT_ENABLED
+//
+
+// LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module
+
+
+#ifndef LED_SOFTBLINK_ENABLED
+#define LED_SOFTBLINK_ENABLED 0
+#endif
+
+// LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module
+
+
+#ifndef LOW_POWER_PWM_ENABLED
+#define LOW_POWER_PWM_ENABLED 0
+#endif
+
+// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator
+//==========================================================
+#ifndef MEM_MANAGER_ENABLED
+#define MEM_MANAGER_ENABLED 0
+#endif
+#if MEM_MANAGER_ENABLED
+// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1
+#endif
+
+// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block.
+// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT
+#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block.
+// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE
+#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block.
+// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256
+#endif
+
+// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module.
+
+
+#ifndef MEM_MANAGER_ENABLE_LOGS
+#define MEM_MANAGER_ENABLE_LOGS 0
+#endif
+
+// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module.
+
+
+#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK
+#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0
+#endif
+
+#endif //MEM_MANAGER_ENABLED
+//
+
+// NRF_CSENSE_ENABLED - nrf_csense - nrf_csense module
+//==========================================================
+#ifndef NRF_CSENSE_ENABLED
+#define NRF_CSENSE_ENABLED 0
+#endif
+#if NRF_CSENSE_ENABLED
+// NRF_CSENSE_PAD_HYSTERESIS - Minimal value of change to decide that pad was touched.
+#ifndef NRF_CSENSE_PAD_HYSTERESIS
+#define NRF_CSENSE_PAD_HYSTERESIS 15
+#endif
+
+// NRF_CSENSE_PAD_DEVIATION - Minimal value measured on pad to take its value while calculating step.
+#ifndef NRF_CSENSE_PAD_DEVIATION
+#define NRF_CSENSE_PAD_DEVIATION 70
+#endif
+
+// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on pad to take its value into account.
+#ifndef NRF_CSENSE_MIN_PAD_VALUE
+#define NRF_CSENSE_MIN_PAD_VALUE 20
+#endif
+
+// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance.
+#ifndef NRF_CSENSE_MAX_PADS_NUMBER
+#define NRF_CSENSE_MAX_PADS_NUMBER 20
+#endif
+
+// NRF_CSENSE_MAX_VALUE - Maximum normalized value got from measurement.
+#ifndef NRF_CSENSE_MAX_VALUE
+#define NRF_CSENSE_MAX_VALUE 1000
+#endif
+
+// NRF_CSENSE_OUTPUT_PIN - Output pin used by lower module.
+// This is only used when running on NRF51.
+
+#ifndef NRF_CSENSE_OUTPUT_PIN
+#define NRF_CSENSE_OUTPUT_PIN 30
+#endif
+
+#endif //NRF_CSENSE_ENABLED
+//
+
+// NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor module
+//==========================================================
+#ifndef NRF_DRV_CSENSE_ENABLED
+#define NRF_DRV_CSENSE_ENABLED 0
+#endif
+#if NRF_DRV_CSENSE_ENABLED
+// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (except nRF51)
+#ifndef TIMER0_FOR_CSENSE
+#define TIMER0_FOR_CSENSE 1
+#endif
+
+// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (except nRF51)
+#ifndef TIMER1_FOR_CSENSE
+#define TIMER1_FOR_CSENSE 2
+#endif
+
+// MEASUREMENT_PERIOD - Single measurement period.
+// Time of single measurement can be calculated as T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). I_SOURCE, VUP and VDOWN are values used to initialize COMP and C is capacitance of used pad.
+
+#ifndef MEASUREMENT_PERIOD
+#define MEASUREMENT_PERIOD 20
+#endif
+
+#endif //NRF_DRV_CSENSE_ENABLED
+//
+
+// NRF_QUEUE_ENABLED - nrf_queue - Queue module
+
+
+#ifndef NRF_QUEUE_ENABLED
+#define NRF_QUEUE_ENABLED 0
+#endif
+
+// RETARGET_ENABLED - retarget - Retargeting stdio functions
+
+
+#ifndef RETARGET_ENABLED
+#define RETARGET_ENABLED 1
+#endif
+
+// SLIP_ENABLED - slip - SLIP encoding decoding
+
+
+#ifndef SLIP_ENABLED
+#define SLIP_ENABLED 0
+#endif
+
+// app_usbd_cdc_acm - USB CDC ACM class
+
+//==========================================================
+// APP_USBD_CLASS_CDC_ACM_ENABLED - Enabling USBD CDC ACM Class library
+
+
+#ifndef APP_USBD_CLASS_CDC_ACM_ENABLED
+#define APP_USBD_CLASS_CDC_ACM_ENABLED 0
+#endif
+
+// APP_USBD_CDC_ACM_LOG_ENABLED - Enables logging in the module.
+
+
+#ifndef APP_USBD_CDC_ACM_LOG_ENABLED
+#define APP_USBD_CDC_ACM_LOG_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+// app_usbd_msc - USB MSC class
+
+//==========================================================
+// APP_USBD_CLASS_MSC_ENABLED - Enabling USBD MSC Class library
+
+
+#ifndef APP_USBD_CLASS_MSC_ENABLED
+#define APP_USBD_CLASS_MSC_ENABLED 0
+#endif
+
+// APP_USBD_MSC_CLASS_LOG_ENABLED - Enables logging in the module.
+
+
+#ifndef APP_USBD_MSC_CLASS_LOG_ENABLED
+#define APP_USBD_MSC_CLASS_LOG_ENABLED 0
+#endif
+
+//
+//==========================================================
+
+//
+//==========================================================
+
+// nRF_Log
+
+//==========================================================
+// NRF_LOG_ENABLED - nrf_log - Logging
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 0
+#endif
+#if NRF_LOG_ENABLED
+// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string
+//==========================================================
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+#if NRF_LOG_USES_COLORS
+// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+// NRF_LOG_ERROR_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_ERROR_COLOR
+#define NRF_LOG_ERROR_COLOR 0
+#endif
+
+// NRF_LOG_WARNING_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_WARNING_COLOR
+#define NRF_LOG_WARNING_COLOR 0
+#endif
+
+#endif //NRF_LOG_USES_COLORS
+//
+
+// NRF_LOG_DEFAULT_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 3
+#endif
+
+// NRF_LOG_DEFERRED - Enable deffered logger.
+
+// Log data is buffered and can be processed in idle.
+//==========================================================
+#ifndef NRF_LOG_DEFERRED
+#define NRF_LOG_DEFERRED 1
+#endif
+#if NRF_LOG_DEFERRED
+// NRF_LOG_DEFERRED_BUFSIZE - Size of the buffer for logs in words.
+// Must be power of 2
+
+#ifndef NRF_LOG_DEFERRED_BUFSIZE
+#define NRF_LOG_DEFERRED_BUFSIZE 256
+#endif
+
+#endif //NRF_LOG_DEFERRED
+//
+
+// NRF_LOG_USES_TIMESTAMP - Enable timestamping
+
+
+// Function for getting the timestamp is provided by the user
+
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+
+#endif //NRF_LOG_ENABLED
+//
+
+// nrf_log_backend - Logging sink
+
+//==========================================================
+// NRF_LOG_BACKEND_MAX_STRING_LENGTH - Buffer for storing single output string
+// Logger backend RAM usage is determined by this value.
+
+#ifndef NRF_LOG_BACKEND_MAX_STRING_LENGTH
+#define NRF_LOG_BACKEND_MAX_STRING_LENGTH 256
+#endif
+
+// NRF_LOG_TIMESTAMP_DIGITS - Number of digits for timestamp
+// If higher resolution timestamp source is used it might be needed to increase that
+
+#ifndef NRF_LOG_TIMESTAMP_DIGITS
+#define NRF_LOG_TIMESTAMP_DIGITS 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_USES_UART - If enabled data is printed over UART
+//==========================================================
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_UART
+#define NRF_LOG_BACKEND_SERIAL_USES_UART 1
+#endif
+#if NRF_LOG_BACKEND_SERIAL_USES_UART
+// NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <10289152=> 38400 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 57600 baud
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE
+#define NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE 30801920
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_TX_PIN - UART TX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_TX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_TX_PIN 6
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RX_PIN - UART RX pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RX_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RX_PIN 8
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN - UART RTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN 5
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN - UART CTS pin
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN
+#define NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN 7
+#endif
+
+// NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL
+#define NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL 0
+#endif
+
+// NRF_LOG_BACKEND_UART_INSTANCE - UART instance used
+
+// <0=> 0
+
+#ifndef NRF_LOG_BACKEND_UART_INSTANCE
+#define NRF_LOG_BACKEND_UART_INSTANCE 0
+#endif
+
+#endif //NRF_LOG_BACKEND_SERIAL_USES_UART
+//
+
+// NRF_LOG_BACKEND_SERIAL_USES_RTT - If enabled data is printed using RTT
+//==========================================================
+#ifndef NRF_LOG_BACKEND_SERIAL_USES_RTT
+#define NRF_LOG_BACKEND_SERIAL_USES_RTT 0
+#endif
+#if NRF_LOG_BACKEND_SERIAL_USES_RTT
+// NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE - RTT output buffer size.
+// Should be equal or bigger than \ref NRF_LOG_BACKEND_MAX_STRING_LENGTH.
+// This value is used in Segger RTT configuration to set the buffer size
+// if it is bigger than default RTT buffer size.
+
+#ifndef NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE
+#define NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE 512
+#endif
+
+#endif //NRF_LOG_BACKEND_SERIAL_USES_RTT
+//
+
+//
+//==========================================================
+
+//
+//==========================================================
+
+// nRF_Segger_RTT
+
+//==========================================================
+// segger_rtt - SEGGER RTT
+
+//==========================================================
+// SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer.
+// Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE
+// or this value is actually used. It depends on which one is bigger.
+
+#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP
+#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 64
+#endif
+
+// SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer.
+#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS
+#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2
+#endif
+
+// SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer.
+#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN
+#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16
+#endif
+
+// SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer.
+#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS
+#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2
+#endif
+
+// SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full.
+
+
+// The following modes are supported:
+// - SKIP - Do not block, output nothing.
+// - TRIM - Do not block, output as much as fits.
+// - BLOCK - Wait until there is space in the buffer.
+// <0=> SKIP
+// <1=> TRIM
+// <2=> BLOCK_IF_FIFO_FULL
+
+#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE
+#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0
+#endif
+
+//
+//==========================================================
+
+//
+//==========================================================
+
+// <<< end of configuration section >>>
+#endif //SDK_CONFIG_H
+
diff --git a/ARM/Nordic/nRF52/exemples/dfu/.cproject b/ARM/Nordic/nRF52/exemples/dfu/.cproject
new file mode 100644
index 00000000..71dbdb6e
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/.cproject
@@ -0,0 +1,331 @@
+
+
+
+
+
+
+
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diff --git a/ARM/Nordic/nRF52/exemples/dfu/.gitignore b/ARM/Nordic/nRF52/exemples/dfu/.gitignore
new file mode 100644
index 00000000..ac01e665
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/.gitignore
@@ -0,0 +1,2 @@
+/Debug/
+/Release/
diff --git a/ARM/Nordic/nRF52/exemples/dfu/.project b/ARM/Nordic/nRF52/exemples/dfu/.project
new file mode 100644
index 00000000..cbff6e48
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/.project
@@ -0,0 +1,438 @@
+
+
+ dfu
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ src/nRF5_SDK
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/boards
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/micro-ecc
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/nano-pb
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/softdevice
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_advertising
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/boards/boards.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/boards/boards.c
+
+
+ src/nRF5_SDK/drivers_nrf/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/hal
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/drivers_nrf/rng
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/bootloader
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/crc32
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/crypto
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/fstorage
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/hci
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/mem_manager
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/queue
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/scheduler
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/sha256
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/timer
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/util
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/micro-ecc/uECC.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/external/micro-ecc/micro-ecc/uECC.c
+
+
+ src/nRF5_SDK/nano-pb/pb_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/external/nano-pb/pb_common.c
+
+
+ src/nRF5_SDK/nano-pb/pb_decode.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/external/nano-pb/pb_decode.c
+
+
+ src/nRF5_SDK/nano-pb/pb_encode.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/external/nano-pb/pb_encode.c
+
+
+ src/nRF5_SDK/softdevice/common
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/ble/ble_advertising/ble_advertising.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/ble_advertising/ble_advertising.c
+
+
+ src/nRF5_SDK/ble/common/ble_advdata.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_advdata.c
+
+
+ src/nRF5_SDK/ble/common/ble_conn_params.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_conn_params.c
+
+
+ src/nRF5_SDK/ble/common/ble_srv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/ble/common/ble_srv_common.c
+
+
+ src/nRF5_SDK/drivers_nrf/common/nrf_drv_common.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/common/nrf_drv_common.c
+
+
+ src/nRF5_SDK/drivers_nrf/hal/nrf_nvmc.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/hal/nrf_nvmc.c
+
+
+ src/nRF5_SDK/drivers_nrf/rng/nrf_drv_rng.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/drivers_nrf/rng/nrf_drv_rng.c
+
+
+ src/nRF5_SDK/libraries/bootloader/ble_dfu
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/bootloader/nrf_bootloader.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/nrf_bootloader.c
+
+
+ src/nRF5_SDK/libraries/bootloader/nrf_bootloader_app_start.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/nrf_bootloader_app_start.c
+
+
+ src/nRF5_SDK/libraries/bootloader/nrf_bootloader_info.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/nrf_bootloader_info.c
+
+
+ src/nRF5_SDK/libraries/crc32/crc32.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crc32/crc32.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/crypto/nrf_crypto_ecdh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/nrf_crypto_ecdh.c
+
+
+ src/nRF5_SDK/libraries/crypto/nrf_crypto_ecdsa.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/nrf_crypto_ecdsa.c
+
+
+ src/nRF5_SDK/libraries/crypto/nrf_crypto_hash.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/nrf_crypto_hash.c
+
+
+ src/nRF5_SDK/libraries/crypto/nrf_crypto_init.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/nrf_crypto_init.c
+
+
+ src/nRF5_SDK/libraries/crypto/nrf_crypto_keys.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/nrf_crypto_keys.c
+
+
+ src/nRF5_SDK/libraries/crypto/nrf_crypto_mem.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/nrf_crypto_mem.c
+
+
+ src/nRF5_SDK/libraries/crypto/nrf_crypto_rng.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/nrf_crypto_rng.c
+
+
+ src/nRF5_SDK/libraries/fstorage/fstorage.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/fstorage/fstorage.c
+
+
+ src/nRF5_SDK/libraries/hci/hci_mem_pool.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/hci/hci_mem_pool.c
+
+
+ src/nRF5_SDK/libraries/mem_manager/mem_manager.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/mem_manager/mem_manager.c
+
+
+ src/nRF5_SDK/libraries/queue/nrf_queue.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/queue/nrf_queue.c
+
+
+ src/nRF5_SDK/libraries/scheduler/app_scheduler.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/scheduler/app_scheduler.c
+
+
+ src/nRF5_SDK/libraries/sha256/sha256.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/sha256/sha256.c
+
+
+ src/nRF5_SDK/libraries/timer/app_timer.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/timer/app_timer.c
+
+
+ src/nRF5_SDK/libraries/timer/app_timer_appsh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/timer/app_timer_appsh.c
+
+
+ src/nRF5_SDK/libraries/util/app_error_weak.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_error_weak.c
+
+
+ src/nRF5_SDK/libraries/util/app_util_platform.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/app_util_platform.c
+
+
+ src/nRF5_SDK/libraries/util/nrf_assert.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/nrf_assert.c
+
+
+ src/nRF5_SDK/libraries/util/sdk_errors.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/util/sdk_errors.c
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/bootloader/ble_dfu/nrf_ble_dfu.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/ble_dfu/nrf_ble_dfu.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu_flash.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu_flash.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu_mbr.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu_mbr.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu_settings.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu_settings.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu_transport.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu_transport.c
+
+
+ src/nRF5_SDK/libraries/bootloader/dfu/nrf_dfu_utils.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/bootloader/dfu/nrf_dfu_utils.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/micro_ecc
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/libraries/crypto/backend/nrf_crypto_sw
+ 2
+ virtual:/virtual
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler/softdevice_handler.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/softdevice/common/softdevice_handler/softdevice_handler.c
+
+
+ src/nRF5_SDK/softdevice/common/softdevice_handler/softdevice_handler_appsh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/softdevice/common/softdevice_handler/softdevice_handler_appsh.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/micro_ecc/micro_ecc_lib_ecdh.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/backend/micro_ecc/micro_ecc_lib_ecdh.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/micro_ecc/micro_ecc_lib_ecdsa.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/backend/micro_ecc/micro_ecc_lib_ecdsa.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/micro_ecc/micro_ecc_lib_init.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/backend/micro_ecc/micro_ecc_lib_init.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/micro_ecc/micro_ecc_lib_keys.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/backend/micro_ecc/micro_ecc_lib_keys.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/micro_ecc/micro_ecc_lib_shared.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/backend/micro_ecc/micro_ecc_lib_shared.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/nrf_crypto_sw/nrf_crypto_sw_hash.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/backend/nrf_crypto_sw/nrf_crypto_sw_hash.c
+
+
+ src/nRF5_SDK/libraries/crypto/backend/nrf_crypto_sw/nrf_crypto_sw_rng.c
+ 1
+ PARENT-6-PROJECT_LOC/external/nRF5_SDK/components/libraries/crypto/backend/nrf_crypto_sw/nrf_crypto_sw_rng.c
+
+
+
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.options b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.options
new file mode 100755
index 00000000..4eb1814a
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.options
@@ -0,0 +1,3 @@
+dfu.Hash.hash max_size:32
+dfu.SignedCommand.signature max_size:64
+dfu.InitCommand.sd_req max_count:4
\ No newline at end of file
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.pb.c b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.pb.c
new file mode 100755
index 00000000..7c2eb2da
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.pb.c
@@ -0,0 +1,83 @@
+/* Automatically generated nanopb constant definitions */
+/* Generated by nanopb-0.3.6-dev at Thu Jul 28 13:34:59 2016. */
+
+#include "dfu-cc.pb.h"
+
+/* @@protoc_insertion_point(includes) */
+#if PB_PROTO_HEADER_VERSION != 30
+#error Regenerate this file with the current version of nanopb generator.
+#endif
+
+const bool dfu_init_command_is_debug_default = false;
+
+
+const pb_field_t dfu_hash_fields[3] = {
+ PB_FIELD( 1, UENUM , REQUIRED, STATIC , FIRST, dfu_hash_t, hash_type, hash_type, 0),
+ PB_FIELD( 2, BYTES , REQUIRED, STATIC , OTHER, dfu_hash_t, hash, hash_type, 0),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_init_command_fields[10] = {
+ PB_FIELD( 1, UINT32 , OPTIONAL, STATIC , FIRST, dfu_init_command_t, fw_version, fw_version, 0),
+ PB_FIELD( 2, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, hw_version, fw_version, 0),
+ PB_FIELD( 3, UINT32 , REPEATED, STATIC , OTHER, dfu_init_command_t, sd_req, hw_version, 0),
+ PB_FIELD( 4, UENUM , OPTIONAL, STATIC , OTHER, dfu_init_command_t, type, sd_req, 0),
+ PB_FIELD( 5, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, sd_size, type, 0),
+ PB_FIELD( 6, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, bl_size, sd_size, 0),
+ PB_FIELD( 7, UINT32 , OPTIONAL, STATIC , OTHER, dfu_init_command_t, app_size, bl_size, 0),
+ PB_FIELD( 8, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_init_command_t, hash, app_size, &dfu_hash_fields),
+ PB_FIELD( 9, BOOL , OPTIONAL, STATIC , OTHER, dfu_init_command_t, is_debug, hash, &dfu_init_command_is_debug_default),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_reset_command_fields[2] = {
+ PB_FIELD( 1, UINT32 , REQUIRED, STATIC , FIRST, dfu_reset_command_t, timeout, timeout, 0),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_command_fields[4] = {
+ PB_FIELD( 1, UENUM , OPTIONAL, STATIC , FIRST, dfu_command_t, op_code, op_code, 0),
+ PB_FIELD( 2, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_command_t, init, op_code, &dfu_init_command_fields),
+ PB_FIELD( 3, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_command_t, reset, init, &dfu_reset_command_fields),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_signed_command_fields[4] = {
+ PB_FIELD( 1, MESSAGE , REQUIRED, STATIC , FIRST, dfu_signed_command_t, command, command, &dfu_command_fields),
+ PB_FIELD( 2, UENUM , REQUIRED, STATIC , OTHER, dfu_signed_command_t, signature_type, command, 0),
+ PB_FIELD( 3, BYTES , REQUIRED, STATIC , OTHER, dfu_signed_command_t, signature, signature_type, 0),
+ PB_LAST_FIELD
+};
+
+const pb_field_t dfu_packet_fields[3] = {
+ PB_FIELD( 1, MESSAGE , OPTIONAL, STATIC , FIRST, dfu_packet_t, command, command, &dfu_command_fields),
+ PB_FIELD( 2, MESSAGE , OPTIONAL, STATIC , OTHER, dfu_packet_t, signed_command, command, &dfu_signed_command_fields),
+ PB_LAST_FIELD
+};
+
+
+/* Check that field information fits in pb_field_t */
+#if !defined(PB_FIELD_32BIT)
+/* If you get an error here, it means that you need to define PB_FIELD_32BIT
+ * compile-time option. You can do that in pb.h or on compiler command line.
+ *
+ * The reason you need to do this is that some of your messages contain tag
+ * numbers or field sizes that are larger than what can fit in 8 or 16 bit
+ * field descriptors.
+ */
+PB_STATIC_ASSERT((pb_membersize(dfu_init_command_t, hash) < 65536 && pb_membersize(dfu_command_t, init) < 65536 && pb_membersize(dfu_command_t, reset) < 65536 && pb_membersize(dfu_signed_command_t, command) < 65536 && pb_membersize(dfu_packet_t, command) < 65536 && pb_membersize(dfu_packet_t, signed_command) < 65536), YOU_MUST_DEFINE_PB_FIELD_32BIT_FOR_MESSAGES_dfu_hash_dfu_init_command_dfu_reset_command_dfu_command_dfu_signed_command_dfu_packet)
+#endif
+
+#if !defined(PB_FIELD_16BIT) && !defined(PB_FIELD_32BIT)
+/* If you get an error here, it means that you need to define PB_FIELD_16BIT
+ * compile-time option. You can do that in pb.h or on compiler command line.
+ *
+ * The reason you need to do this is that some of your messages contain tag
+ * numbers or field sizes that are larger than what can fit in the default
+ * 8 bit descriptors.
+ */
+PB_STATIC_ASSERT((pb_membersize(dfu_init_command_t, hash) < 256 && pb_membersize(dfu_command_t, init) < 256 && pb_membersize(dfu_command_t, reset) < 256 && pb_membersize(dfu_signed_command_t, command) < 256 && pb_membersize(dfu_packet_t, command) < 256 && pb_membersize(dfu_packet_t, signed_command) < 256), YOU_MUST_DEFINE_PB_FIELD_16BIT_FOR_MESSAGES_dfu_hash_dfu_init_command_dfu_reset_command_dfu_command_dfu_signed_command_dfu_packet)
+#endif
+
+
+/* @@protoc_insertion_point(eof) */
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.pb.h b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.pb.h
new file mode 100755
index 00000000..d089142e
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.pb.h
@@ -0,0 +1,188 @@
+/* Automatically generated nanopb header */
+/* Generated by nanopb-0.3.6-dev at Thu Jul 28 13:34:59 2016. */
+
+#ifndef PB_DFU_CC_PB_H_INCLUDED
+#define PB_DFU_CC_PB_H_INCLUDED
+#include
+
+/* @@protoc_insertion_point(includes) */
+#if PB_PROTO_HEADER_VERSION != 30
+#error Regenerate this file with the current version of nanopb generator.
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Enum definitions */
+typedef enum
+{
+ DFU_OP_CODE_RESET = 0,
+ DFU_OP_CODE_INIT = 1
+} dfu_op_code_t;
+#define DFU_OP_CODE_MIN DFU_OP_CODE_RESET
+#define DFU_OP_CODE_MAX DFU_OP_CODE_INIT
+#define DFU_OP_CODE_ARRAYSIZE ((dfu_op_code_t)(DFU_OP_CODE_INIT+1))
+
+typedef enum
+{
+ DFU_FW_TYPE_APPLICATION = 0,
+ DFU_FW_TYPE_SOFTDEVICE = 1,
+ DFU_FW_TYPE_BOOTLOADER = 2,
+ DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER = 3
+} dfu_fw_type_t;
+#define DFU_FW_TYPE_MIN DFU_FW_TYPE_APPLICATION
+#define DFU_FW_TYPE_MAX DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER
+#define DFU_FW_TYPE_ARRAYSIZE ((dfu_fw_type_t)(DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER+1))
+
+typedef enum
+{
+ DFU_HASH_TYPE_NO_HASH = 0,
+ DFU_HASH_TYPE_CRC = 1,
+ DFU_HASH_TYPE_SHA128 = 2,
+ DFU_HASH_TYPE_SHA256 = 3,
+ DFU_HASH_TYPE_SHA512 = 4
+} dfu_hash_type_t;
+#define DFU_HASH_TYPE_MIN DFU_HASH_TYPE_NO_HASH
+#define DFU_HASH_TYPE_MAX DFU_HASH_TYPE_SHA512
+#define DFU_HASH_TYPE_ARRAYSIZE ((dfu_hash_type_t)(DFU_HASH_TYPE_SHA512+1))
+
+typedef enum
+{
+ DFU_SIGNATURE_TYPE_ECDSA_P256_SHA256 = 0,
+ DFU_SIGNATURE_TYPE_ED25519 = 1
+} dfu_signature_type_t;
+#define DFU_SIGNATURE_TYPE_MIN DFU_SIGNATURE_TYPE_ECDSA_P256_SHA256
+#define DFU_SIGNATURE_TYPE_MAX DFU_SIGNATURE_TYPE_ED25519
+#define DFU_SIGNATURE_TYPE_ARRAYSIZE ((dfu_signature_type_t)(DFU_SIGNATURE_TYPE_ED25519+1))
+
+/* Struct definitions */
+typedef PB_BYTES_ARRAY_T(32) dfu_hash_hash_t;
+typedef struct {
+ dfu_hash_type_t hash_type;
+ dfu_hash_hash_t hash;
+/* @@protoc_insertion_point(struct:dfu_hash_t) */
+} dfu_hash_t;
+
+typedef struct {
+ uint32_t timeout;
+/* @@protoc_insertion_point(struct:dfu_reset_command_t) */
+} dfu_reset_command_t;
+
+typedef struct {
+ bool has_fw_version;
+ uint32_t fw_version;
+ bool has_hw_version;
+ uint32_t hw_version;
+ pb_size_t sd_req_count;
+ uint32_t sd_req[4];
+ bool has_type;
+ dfu_fw_type_t type;
+ bool has_sd_size;
+ uint32_t sd_size;
+ bool has_bl_size;
+ uint32_t bl_size;
+ bool has_app_size;
+ uint32_t app_size;
+ bool has_hash;
+ dfu_hash_t hash;
+ bool has_is_debug;
+ bool is_debug;
+/* @@protoc_insertion_point(struct:dfu_init_command_t) */
+} dfu_init_command_t;
+
+typedef struct {
+ bool has_op_code;
+ dfu_op_code_t op_code;
+ bool has_init;
+ dfu_init_command_t init;
+ bool has_reset;
+ dfu_reset_command_t reset;
+/* @@protoc_insertion_point(struct:dfu_command_t) */
+} dfu_command_t;
+
+typedef PB_BYTES_ARRAY_T(64) dfu_signed_command_signature_t;
+typedef struct {
+ dfu_command_t command;
+ dfu_signature_type_t signature_type;
+ dfu_signed_command_signature_t signature;
+/* @@protoc_insertion_point(struct:dfu_signed_command_t) */
+} dfu_signed_command_t;
+
+typedef struct {
+ bool has_command;
+ dfu_command_t command;
+ bool has_signed_command;
+ dfu_signed_command_t signed_command;
+/* @@protoc_insertion_point(struct:dfu_packet_t) */
+} dfu_packet_t;
+
+/* Default values for struct fields */
+extern const bool dfu_init_command_is_debug_default;
+
+/* Initializer values for message structs */
+#define DFU_HASH_INIT_DEFAULT {(dfu_hash_type_t)0, {0, {0}}}
+#define DFU_INIT_COMMAND_INIT_DEFAULT {false, 0, false, 0, 0, {0, 0, 0, 0}, false, (dfu_fw_type_t)0, false, 0, false, 0, false, 0, false, DFU_HASH_INIT_DEFAULT, false, false}
+#define DFU_RESET_COMMAND_INIT_DEFAULT {0}
+#define DFU_COMMAND_INIT_DEFAULT {false, (dfu_op_code_t)0, false, DFU_INIT_COMMAND_INIT_DEFAULT, false, DFU_RESET_COMMAND_INIT_DEFAULT}
+#define DFU_SIGNED_COMMAND_INIT_DEFAULT {DFU_COMMAND_INIT_DEFAULT, (dfu_signature_type_t)0, {0, {0}}}
+#define DFU_PACKET_INIT_DEFAULT {false, DFU_COMMAND_INIT_DEFAULT, false, DFU_SIGNED_COMMAND_INIT_DEFAULT}
+#define DFU_HASH_INIT_ZERO {(dfu_hash_type_t)0, {0, {0}}}
+#define DFU_INIT_COMMAND_INIT_ZERO {false, 0, false, 0, 0, {0, 0, 0, 0}, false, (dfu_fw_type_t)0, false, 0, false, 0, false, 0, false, DFU_HASH_INIT_ZERO, false, 0}
+#define DFU_RESET_COMMAND_INIT_ZERO {0}
+#define DFU_COMMAND_INIT_ZERO {false, (dfu_op_code_t)0, false, DFU_INIT_COMMAND_INIT_ZERO, false, DFU_RESET_COMMAND_INIT_ZERO}
+#define DFU_SIGNED_COMMAND_INIT_ZERO {DFU_COMMAND_INIT_ZERO, (dfu_signature_type_t)0, {0, {0}}}
+#define DFU_PACKET_INIT_ZERO {false, DFU_COMMAND_INIT_ZERO, false, DFU_SIGNED_COMMAND_INIT_ZERO}
+
+/* Field tags (for use in manual encoding/decoding) */
+#define DFU_HASH_HASH_TYPE_TAG 1
+#define DFU_HASH_HASH_TAG 2
+#define DFU_RESET_COMMAND_TIMEOUT_TAG 1
+#define DFU_INIT_COMMAND_FW_VERSION_TAG 1
+#define DFU_INIT_COMMAND_HW_VERSION_TAG 2
+#define DFU_INIT_COMMAND_SD_REQ_TAG 3
+#define DFU_INIT_COMMAND_TYPE_TAG 4
+#define DFU_INIT_COMMAND_SD_SIZE_TAG 5
+#define DFU_INIT_COMMAND_BL_SIZE_TAG 6
+#define DFU_INIT_COMMAND_APP_SIZE_TAG 7
+#define DFU_INIT_COMMAND_HASH_TAG 8
+#define DFU_INIT_COMMAND_IS_DEBUG_TAG 9
+#define DFU_COMMAND_OP_CODE_TAG 1
+#define DFU_COMMAND_INIT_TAG 2
+#define DFU_COMMAND_RESET_TAG 3
+#define DFU_SIGNED_COMMAND_COMMAND_TAG 1
+#define DFU_SIGNED_COMMAND_SIGNATURE_TYPE_TAG 2
+#define DFU_SIGNED_COMMAND_SIGNATURE_TAG 3
+#define DFU_PACKET_COMMAND_TAG 1
+#define DFU_PACKET_SIGNED_COMMAND_TAG 2
+
+/* Struct field encoding specification for nanopb */
+extern const pb_field_t dfu_hash_fields[3];
+extern const pb_field_t dfu_init_command_fields[10];
+extern const pb_field_t dfu_reset_command_fields[2];
+extern const pb_field_t dfu_command_fields[4];
+extern const pb_field_t dfu_signed_command_fields[4];
+extern const pb_field_t dfu_packet_fields[3];
+
+/* Maximum encoded size of messages (where known) */
+#define DFU_HASH_SIZE 36
+#define DFU_INIT_COMMAND_SIZE 96
+#define DFU_RESET_COMMAND_SIZE 6
+#define DFU_COMMAND_SIZE 108
+#define DFU_SIGNED_COMMAND_SIZE 178
+#define DFU_PACKET_SIZE 291
+
+/* Message IDs (where set with "msgid" option) */
+#ifdef PB_MSGID
+
+#define DFU_CC_MESSAGES \
+
+
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+/* @@protoc_insertion_point(eof) */
+
+#endif
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.proto b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.proto
new file mode 100755
index 00000000..5130fdfe
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/dfu-cc.proto
@@ -0,0 +1,76 @@
+package dfu;
+
+// Version 0.1
+
+// Definition of enums and types
+enum OpCode {
+ RESET = 0;
+ INIT = 1;
+}
+
+enum FwType {
+ APPLICATION = 0; // default, compatible with proto3
+ SOFTDEVICE = 1;
+ BOOTLOADER = 2;
+ SOFTDEVICE_BOOTLOADER = 3;
+}
+
+enum HashType {
+ NO_HASH = 0;
+ CRC = 1;
+ SHA128 = 2;
+ SHA256 = 3;
+ SHA512 = 4;
+}
+
+message Hash
+{
+ required HashType hash_type = 1;
+ required bytes hash = 2;
+}
+
+// Commands data
+message InitCommand {
+ optional uint32 fw_version = 1;
+ optional uint32 hw_version = 2;
+ repeated uint32 sd_req = 3 [packed = true]; // packed option is default in proto3
+ optional FwType type = 4;
+
+ optional uint32 sd_size = 5;
+ optional uint32 bl_size = 6;
+ optional uint32 app_size = 7;
+
+ optional Hash hash = 8;
+
+ optional bool is_debug = 9 [default = false];
+}
+
+message ResetCommand
+{
+ required uint32 timeout = 1;
+}
+
+// Command type
+message Command {
+ optional OpCode op_code = 1;
+ optional InitCommand init = 2;
+ optional ResetCommand reset = 3;
+}
+
+// Signed command types
+enum SignatureType {
+ ECDSA_P256_SHA256 = 0;
+ ED25519 = 1;
+}
+
+message SignedCommand {
+ required Command command = 1;
+ required SignatureType signature_type = 2;
+ required bytes signature = 3;
+}
+
+// Parent packet type
+message Packet {
+ optional Command command = 1;
+ optional SignedCommand signed_command = 2;
+}
\ No newline at end of file
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/dfu_public_key.c b/ARM/Nordic/nRF52/exemples/dfu/src/dfu_public_key.c
new file mode 100755
index 00000000..16e6db76
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/dfu_public_key.c
@@ -0,0 +1,21 @@
+
+/* This file was automatically generated by nrfutil on 2016-12-09 (YY-MM-DD) at 10:25:52 */
+
+#include "stdint.h"
+#include "compiler_abstraction.h"
+
+/* This file was generated with a throwaway private key, that is only inteded for a debug version of the DFU project.
+ Please see https://github.com/NordicSemiconductor/pc-nrfutil/blob/master/README.md to generate a valid public key. */
+
+#ifdef NRF_DFU_DEBUG_VERSION
+
+/** @brief Public key used to verify DFU images */
+__ALIGN(4) const uint8_t pk[64] =
+{
+ 0xe7, 0xea, 0x85, 0xfc, 0x97, 0xf3, 0x38, 0xb8, 0x33, 0x57, 0x7e, 0xab, 0xe7, 0xff, 0xc8, 0xc5, 0xd8, 0xd4, 0xdb, 0xa8, 0x2c, 0x5d, 0xaa, 0x10, 0x83, 0x6e, 0xc2, 0xc5, 0xaf, 0xe4, 0x1f, 0xdb,
+ 0xf7, 0x57, 0x7a, 0x81, 0xd3, 0xe5, 0x74, 0x3d, 0xb8, 0xc4, 0x6c, 0x02, 0x2f, 0x7c, 0xd7, 0x13, 0x00, 0x0d, 0xb2, 0xb1, 0x2c, 0x4d, 0xd1, 0xc9, 0x31, 0xe8, 0x15, 0xb6, 0xf4, 0xa0, 0x8f, 0x9c
+};
+
+#else
+#error "Debug public key not valid for production. Please see https://github.com/NordicSemiconductor/pc-nrfutil/blob/master/README.md to generate it"
+#endif
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/dfu_req_handling.c b/ARM/Nordic/nRF52/exemples/dfu/src/dfu_req_handling.c
new file mode 100755
index 00000000..65118c67
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/dfu_req_handling.c
@@ -0,0 +1,1083 @@
+/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+#include "nrf_dfu_req_handler.h"
+
+#include
+#include
+#include "dfu_req_handling.h"
+#include "nrf_dfu.h"
+#include "nrf_dfu_types.h"
+#include "nrf_dfu_settings.h"
+#include "nrf_dfu_transport.h"
+#include "nrf_dfu_utils.h"
+#include "nrf_dfu_flash.h"
+#include "nrf_ble_dfu.h"
+#include "nrf_bootloader_info.h"
+#include "pb.h"
+#include "pb_common.h"
+#include "pb_decode.h"
+#include "dfu-cc.pb.h"
+#include "crc32.h"
+#include "nrf_log.h"
+#include "app_util.h"
+#include "nrf_sdm.h"
+#include "sdk_macros.h"
+#include "nrf_crypto.h"
+
+STATIC_ASSERT(DFU_SIGNED_COMMAND_SIZE <= INIT_COMMAND_MAX_SIZE);
+
+
+/** @brief Macro for the hardware version of the kit used for requirement-match
+ *
+ * @note If not set, this will default to 51 or 52 according to the architecture
+ */
+#if defined ( NRF51 ) && !defined(NRF_DFU_HW_VERSION)
+ #define NRF_DFU_HW_VERSION (51)
+#elif defined( NRF52_SERIES )
+ #define NRF_DFU_HW_VERSION (52)
+#else
+ #error No target set for HW version.
+#endif
+
+/** @brief Cyclic buffers for storing data that is to be written to flash.
+ * This is because the RAM copy must be kept alive until copying is
+ * done and the DFU process must be able to progress while waiting for flash.
+ *
+ */
+#define FLASH_BUFFER_CHUNK_LENGTH 256 //< Length of a flash buffer chunk. must be a power of 4.
+#define FLASH_BUFFER_CHUNK_COUNT 4 //< Number of flash buffer chunks. Must be a power of 2.
+#define FLASH_BUFFER_SWAP() do \
+ {m_current_data_buffer = (m_current_data_buffer + 1) & 0x03; m_data_buf_pos = 0;} \
+ while (0)
+
+__ALIGN(4) static uint8_t m_data_buf[FLASH_BUFFER_CHUNK_COUNT][FLASH_BUFFER_CHUNK_LENGTH];
+
+static uint16_t m_data_buf_pos; /**< The number of bytes written in the current buffer. */
+static uint8_t m_current_data_buffer; /**< Index of the current data buffer. Must be between 0 and FLASH_BUFFER_CHUNK_COUNT - 1. */
+static uint32_t m_flash_operations_pending; /**< A counter holding the number of pending flash operations. This will prevent flooding of the buffers. */
+
+static uint32_t m_firmware_start_addr; /**< Start address of the current firmware image. */
+static uint32_t m_firmware_size_req; /**< The size of the entire firmware image. Defined by the init command. */
+
+static bool m_valid_init_packet_present; /**< Global variable holding the current flags indicating the state of the DFU process. */
+
+static dfu_packet_t packet = DFU_PACKET_INIT_DEFAULT;
+
+static pb_istream_t stream;
+
+/** @brief Value length structure holding the public key.
+ *
+ * @details The pk value pointed to is the public key present in dfu_public_key.c
+ */
+NRF_CRYPTO_ECC_PUBLIC_KEY_RAW_CREATE_FROM_ARRAY(crypto_key_pk, SECP256R1, pk);
+
+/** @brief Value length structure to hold a signature
+ */
+NRF_CRYPTO_ECDSA_SIGNATURE_CREATE(crypto_sig, SECP256R1);
+
+/** @brief Value length structure to hold the hash for the init packet
+ */
+NRF_CRYPTO_HASH_CREATE(init_packet_hash, SHA256);
+
+/** @brief Value length structure to hold the hash for the firmware image
+ */
+NRF_CRYPTO_HASH_CREATE(fw_hash, SHA256);
+
+static nrf_value_length_t init_packet_data = {0};
+
+const nrf_crypto_hash_info_t hash_info_sha256 =
+{
+ .hash_type = NRF_CRYPTO_HASH_TYPE_SHA256,
+ .endian_type = NRF_CRYPTO_ENDIAN_LE
+};
+
+const nrf_crypto_signature_info_t sig_info_p256 =
+{
+ .curve_type = NRF_CRYPTO_CURVE_SECP256R1,
+ .hash_type = NRF_CRYPTO_HASH_TYPE_SHA256,
+ .endian_type = NRF_CRYPTO_ENDIAN_LE
+};
+
+static void on_dfu_complete(fs_evt_t const * const evt, fs_ret_t result)
+{
+ NRF_LOG_INFO("Resetting device. \r\n");
+ (void)nrf_dfu_transports_close();
+ NVIC_SystemReset();
+ return;
+}
+
+
+static void dfu_data_write_handler(fs_evt_t const * const evt, fs_ret_t result)
+{
+ --m_flash_operations_pending;
+}
+
+
+static void pb_decoding_callback(pb_istream_t *str, uint32_t tag, pb_wire_type_t wire_type, void *iter)
+{
+ pb_field_iter_t* p_iter = (pb_field_iter_t *) iter;
+
+ // match the beginning of the init command
+ if(p_iter->pos->ptr == &dfu_init_command_fields[0])
+ {
+
+ uint8_t *ptr = (uint8_t *) str->state;
+ uint32_t size = str->bytes_left;
+
+ // remove tag byte
+ ptr++;
+ size--;
+
+ // store the info in init_packet_data
+ init_packet_data.p_value = ptr;
+ init_packet_data.length = size;
+
+ NRF_LOG_INFO("PB: Init packet data len: %d\r\n", size);
+ }
+}
+
+
+static nrf_dfu_res_code_t dfu_handle_prevalidate(dfu_signed_command_t const * p_command, pb_istream_t * p_stream, uint8_t * p_init_cmd, uint32_t init_cmd_len)
+{
+ dfu_init_command_t const * p_init = &p_command->command.init;
+ uint32_t err_code;
+ uint32_t hw_version = NRF_DFU_HW_VERSION;
+ uint32_t fw_version = 0;
+
+ // check for init command found during decoding
+ if(!p_init_cmd || !init_cmd_len)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+#ifndef NRF_DFU_DEBUG_VERSION
+ if(p_init->has_is_debug && p_init->is_debug == true)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+#endif
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ if (p_init->has_is_debug == false || p_init->is_debug == false)
+ {
+#endif
+ if (p_init->has_hw_version == false)
+ {
+ NRF_LOG_ERROR("No HW version\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Check of init command HW version
+ if(p_init->hw_version != hw_version)
+ {
+ NRF_LOG_ERROR("Faulty HW version\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Precheck the SoftDevice version
+ bool found_sd_ver = false;
+ for(int i = 0; i < p_init->sd_req_count; i++)
+ {
+ if (p_init->sd_req[i] == SD_FWID_GET(MBR_SIZE))
+ {
+ found_sd_ver = true;
+ break;
+ }
+ }
+ if (!found_sd_ver)
+ {
+ NRF_LOG_ERROR("SD req not met\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Get the fw version
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ if (p_init->has_fw_version == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ // Get the application FW version
+ fw_version = s_dfu_settings.app_version;
+ break;
+
+ case DFU_FW_TYPE_SOFTDEVICE:
+ // not loaded
+ break;
+
+ case DFU_FW_TYPE_BOOTLOADER: // fall through
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ if (p_init->has_fw_version == false)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ fw_version = s_dfu_settings.bootloader_version;
+ break;
+
+ default:
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ NRF_LOG_INFO("Req version: %d, Expected: %d\r\n", p_init->fw_version, fw_version);
+
+ // Check of init command FW version
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ if (p_init->fw_version < fw_version)
+ {
+ NRF_LOG_ERROR("FW version too low\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ break;
+
+ case DFU_FW_TYPE_BOOTLOADER: // fall through
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ // updating the bootloader is stricter. There must be an increase in version number
+ if (p_init->fw_version <= fw_version)
+ {
+ NRF_LOG_ERROR("BL FW version too low\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ break;
+
+ default:
+ // do not care about fw_version in the case of a softdevice transfer
+ break;
+ }
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ }
+#endif
+
+ // Check the signature
+ switch (p_command->signature_type)
+ {
+ case DFU_SIGNATURE_TYPE_ECDSA_P256_SHA256:
+ {
+ #if 0
+ NRF_LOG_INFO("Init command:\r\n");
+ NRF_LOG_HEXDUMP_INFO(&s_dfu_settings.init_command[0], s_dfu_settings.progress.command_size);
+ NRF_LOG_INFO("\r\n");
+
+ NRF_LOG_INFO("Init command (raw data to be hashed):\r\n");
+ NRF_LOG_HEXDUMP_INFO(&p_init_cmd[0], init_cmd_len);
+ NRF_LOG_INFO("\r\n");
+ #endif
+
+
+ NRF_LOG_INFO("Calculating init packet hash\r\n");
+ err_code = nrf_crypto_hash_compute(hash_info_sha256, p_init_cmd, init_cmd_len, &init_packet_hash);
+ if (err_code != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ if (crypto_sig.length != p_command->signature.size)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Prepare the signature received over the air.
+ memcpy(crypto_sig.p_value, p_command->signature.bytes, p_command->signature.size);
+
+ #if 0
+ NRF_LOG_INFO("Signature\r\n");
+ NRF_LOG_HEXDUMP_INFO(&p_command->signature.bytes[0], p_command->signature.size);
+ NRF_LOG_INFO("\r\n");
+ #endif
+
+ //NRF_LOG_INFO("signature len: %d\r\n", p_command->signature.size);
+
+ // calculate the signature
+ NRF_LOG_INFO("Verify signature\r\n");
+ err_code = nrf_crypto_ecdsa_verify_hash(sig_info_p256, &crypto_key_pk, &init_packet_hash, &crypto_sig);
+ if (err_code != NRF_SUCCESS)
+ {
+ NRF_LOG_ERROR("Signature failed\r\n");
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ NRF_LOG_INFO("Image verified\r\n");
+ }
+ break;
+
+ default:
+ NRF_LOG_INFO("Invalid signature type\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ // Get the update size
+ m_firmware_size_req = 0;
+
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ if (p_init->has_app_size == false)
+ {
+ NRF_LOG_ERROR("No app image size\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->app_size;
+ break;
+
+ case DFU_FW_TYPE_BOOTLOADER:
+ if (p_init->has_bl_size == false)
+ {
+ NRF_LOG_ERROR("No bl image size\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->bl_size;
+ // check that the size of the bootloader is not larger than the present one.
+#if defined ( NRF51 )
+ if (p_init->bl_size > BOOTLOADER_SETTINGS_ADDRESS - BOOTLOADER_START_ADDR)
+#elif defined( NRF52_SERIES )
+ if (p_init->bl_size > NRF_MBR_PARAMS_PAGE_ADDRESS - BOOTLOADER_START_ADDR)
+#endif
+ {
+ NRF_LOG_ERROR("BL too large\r\n");
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+ break;
+
+ case DFU_FW_TYPE_SOFTDEVICE:
+ if (p_init->has_sd_size == false)
+ {
+ NRF_LOG_ERROR("No SD image size\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->sd_size;
+ break;
+
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ if (p_init->has_bl_size == false || p_init->has_sd_size == false)
+ {
+ NRF_LOG_ERROR("NO BL/SD size\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ m_firmware_size_req += p_init->sd_size + p_init->bl_size;
+ if (p_init->sd_size == 0 || p_init->bl_size == 0)
+ {
+ NRF_LOG_ERROR("BL+SD size 0\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // check that the size of the bootloader is not larger than the present one.
+#if defined ( NRF51 )
+ if (p_init->bl_size > BOOTLOADER_SETTINGS_ADDRESS - BOOTLOADER_START_ADDR)
+#elif defined ( NRF52_SERIES )
+ if (p_init->bl_size > NRF_MBR_PARAMS_PAGE_ADDRESS - BOOTLOADER_START_ADDR)
+#endif
+ {
+ NRF_LOG_ERROR("BL too large (SD+BL)\r\n");
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+ break;
+
+ default:
+ NRF_LOG_ERROR("Unknown FW update type\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ NRF_LOG_INFO("Running hash check\r\n");
+ // SHA256 is the only supported hash
+ memcpy(fw_hash.p_value, &p_init->hash.hash.bytes[0], NRF_CRYPTO_HASH_SIZE_SHA256);
+
+ // Instead of checking each type with has-check, check the result of the size_req to
+ // Validate its content.
+ if (m_firmware_size_req == 0)
+ {
+ NRF_LOG_ERROR("No FW size\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // Find the location to place the DFU updates
+ err_code = nrf_dfu_find_cache(m_firmware_size_req, false, &m_firmware_start_addr);
+ if (err_code != NRF_SUCCESS)
+ {
+ NRF_LOG_ERROR("Can't find room for update\r\n");
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ NRF_LOG_INFO("Write address set to 0x%08x\r\n", m_firmware_start_addr);
+
+ NRF_LOG_INFO("DFU prevalidate SUCCESSFUL!\r\n");
+
+ return NRF_DFU_RES_CODE_SUCCESS;
+}
+
+
+/** @brief Function for validating the received image after all objects have been received and executed.
+ *
+ */
+static nrf_dfu_res_code_t nrf_dfu_postvalidate(dfu_init_command_t * p_init)
+{
+ uint32_t err_code;
+ nrf_dfu_res_code_t res_code = NRF_DFU_RES_CODE_SUCCESS;
+ nrf_dfu_bank_t * p_bank;
+
+ switch (p_init->hash.hash_type)
+ {
+ case DFU_HASH_TYPE_SHA256:
+ err_code = nrf_crypto_hash_compute(hash_info_sha256, (uint8_t*)m_firmware_start_addr, m_firmware_size_req, &fw_hash);
+ if (err_code != NRF_SUCCESS)
+ {
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ if (memcmp(fw_hash.p_value, p_init->hash.hash.bytes, NRF_CRYPTO_HASH_SIZE_SHA256) != 0)
+ {
+ NRF_LOG_ERROR("Hash failure\r\n");
+
+ res_code = NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+ break;
+
+ default:
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ break;
+ }
+
+ if (s_dfu_settings.bank_current == NRF_DFU_CURRENT_BANK_0)
+ {
+ NRF_LOG_INFO("Current bank is bank 0\r\n");
+ p_bank = &s_dfu_settings.bank_0;
+ }
+ else if (s_dfu_settings.bank_current == NRF_DFU_CURRENT_BANK_1)
+ {
+ NRF_LOG_INFO("Current bank is bank 1\r\n");
+ p_bank = &s_dfu_settings.bank_1;
+ }
+ else
+ {
+ NRF_LOG_ERROR("Internal error, invalid current bank\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ if (res_code == NRF_DFU_RES_CODE_SUCCESS)
+ {
+ NRF_LOG_INFO("Successfully run the postvalidation check!\r\n");
+
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_APP;
+ break;
+ case DFU_FW_TYPE_SOFTDEVICE:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_SD;
+ s_dfu_settings.sd_size = p_init->sd_size;
+ break;
+ case DFU_FW_TYPE_BOOTLOADER:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_BL;
+ break;
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ p_bank->bank_code = NRF_DFU_BANK_VALID_SD_BL;
+ s_dfu_settings.sd_size = p_init->sd_size;
+ break;
+ default:
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ break;
+ }
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ if (p_init->has_is_debug == false || p_init->is_debug == false)
+ {
+#endif
+
+ switch (p_init->type)
+ {
+ case DFU_FW_TYPE_APPLICATION:
+ s_dfu_settings.app_version = p_init->fw_version;
+ break;
+ case DFU_FW_TYPE_BOOTLOADER:
+ case DFU_FW_TYPE_SOFTDEVICE_BOOTLOADER:
+ s_dfu_settings.bootloader_version = p_init->fw_version;
+ break;
+ default:
+ // no implementation
+ break;
+ }
+
+#ifdef NRF_DFU_DEBUG_VERSION
+ }
+#endif
+ // Calculate CRC32 for image
+ p_bank->image_crc = s_dfu_settings.progress.firmware_image_crc;
+ p_bank->image_size = m_firmware_size_req;
+ }
+ else
+ {
+ p_bank->bank_code = NRF_DFU_BANK_INVALID;
+
+ // Calculate CRC32 for image
+ p_bank->image_crc = 0;
+ p_bank->image_size = 0;
+ }
+
+ // Set the progress to zero and remove the last command
+ memset(&s_dfu_settings.progress, 0, sizeof(dfu_progress_t));
+ memset(s_dfu_settings.init_command, 0xFF, DFU_SIGNED_COMMAND_SIZE);
+ s_dfu_settings.write_offset = 0;
+
+ // Store the settings to flash and reset after that
+ if( nrf_dfu_settings_write(on_dfu_complete) != NRF_SUCCESS)
+ {
+ res_code = NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ return res_code;
+}
+
+
+/** @brief Function to handle signed command
+ *
+ * @param[in] p_command Signed
+ */
+static nrf_dfu_res_code_t dfu_handle_signed_command(dfu_signed_command_t const * p_command, pb_istream_t * p_stream)
+{
+ nrf_dfu_res_code_t ret_val = NRF_DFU_RES_CODE_SUCCESS;
+
+ // Currently only init-packet is signed
+ if (p_command->command.has_init != true)
+ {
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ ret_val = dfu_handle_prevalidate(p_command, p_stream, init_packet_data.p_value, init_packet_data.length);
+ if(ret_val == NRF_DFU_RES_CODE_SUCCESS)
+ {
+ NRF_LOG_INFO("Prevalidate OK.\r\n");
+
+ // This saves the init command to flash
+ NRF_LOG_INFO("Saving init command...\r\n");
+ if (nrf_dfu_settings_write(NULL) != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+ }
+ else
+ {
+ NRF_LOG_ERROR("Prevalidate FAILED!\r\n");
+ }
+ return ret_val;
+}
+
+
+static nrf_dfu_res_code_t dfu_handle_command(dfu_command_t const * p_command)
+{
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+}
+
+
+static uint32_t dfu_decode_commmand(void)
+{
+ stream = pb_istream_from_buffer(s_dfu_settings.init_command, s_dfu_settings.progress.command_size);
+
+ // Attach our callback to follow the field decoding
+ stream.decoding_callback = pb_decoding_callback;
+ // reset the variable where the init pointer and length will be stored.
+ init_packet_data.p_value = NULL;
+ init_packet_data.length = 0;
+
+ if (!pb_decode(&stream, dfu_packet_fields, &packet))
+ {
+ NRF_LOG_ERROR("Handler: Invalid protocol buffer stream\r\n");
+ return 0;
+ }
+
+ return 1;
+}
+
+
+/** @brief Function handling command requests from the transport layer.
+ *
+ * @param p_context[in,out] Pointer to structure holding context-specific data
+ * @param p_req[in] Pointer to the structure holding the DFU request.
+ * @param p_res[out] Pointer to the structure holding the DFU response.
+ *
+ * @retval NRF_SUCCESS If the command request was executed successfully.
+ * Any other error code indicates that the data request
+ * could not be handled.
+ */
+static nrf_dfu_res_code_t nrf_dfu_command_req(void * p_context, nrf_dfu_req_t * p_req, nrf_dfu_res_t * p_res)
+{
+ nrf_dfu_res_code_t ret_val = NRF_DFU_RES_CODE_SUCCESS;
+
+ switch (p_req->req_type)
+ {
+ case NRF_DFU_OBJECT_OP_CREATE:
+ NRF_LOG_INFO("Before OP create command\r\n");
+ if(p_req->object_size == 0)
+ {
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ if (p_req->object_size > INIT_COMMAND_MAX_SIZE)
+ {
+ // It is impossible to handle the command because the size is too large
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ NRF_LOG_INFO("Valid Command Create\r\n");
+
+ // Setting DFU to uninitialized.
+ m_valid_init_packet_present = false;
+
+ // Reset all progress to zero.
+ memset(&s_dfu_settings.progress, 0, sizeof(dfu_progress_t));
+ s_dfu_settings.write_offset = 0;
+
+ // Set the init command size.
+ s_dfu_settings.progress.command_size = p_req->object_size;
+ break;
+
+ case NRF_DFU_OBJECT_OP_CRC:
+ NRF_LOG_INFO("Valid Command CRC\r\n");
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->crc = s_dfu_settings.progress.command_crc;
+ break;
+
+ case NRF_DFU_OBJECT_OP_WRITE:
+ NRF_LOG_INFO("Before OP write command\r\n");
+
+ if ((p_req->req_len + s_dfu_settings.progress.command_offset) > s_dfu_settings.progress.command_size)
+
+ {
+ // Too large for the command that was requested
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->crc = s_dfu_settings.progress.command_crc;
+ NRF_LOG_ERROR("Error. Init command larger than expected. \r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // Copy the received data to RAM, updating offset and calculating CRC.
+ memcpy(&s_dfu_settings.init_command[s_dfu_settings.progress.command_offset], p_req->p_req, p_req->req_len);
+ s_dfu_settings.progress.command_offset += p_req->req_len;
+ s_dfu_settings.progress.command_crc = crc32_compute(p_req->p_req, p_req->req_len, &s_dfu_settings.progress.command_crc);
+
+ // Set output values.
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->crc = s_dfu_settings.progress.command_crc;
+
+ break;
+
+ case NRF_DFU_OBJECT_OP_EXECUTE:
+ NRF_LOG_INFO("Before OP execute command\r\n");
+ if (s_dfu_settings.progress.command_offset != s_dfu_settings.progress.command_size)
+ {
+ // The object wasn't the right (requested) size
+ NRF_LOG_ERROR("Execute with faulty offset\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ NRF_LOG_INFO("Valid command execute\r\n");
+
+ if (m_valid_init_packet_present)
+ {
+ // Init command already executed
+ return NRF_DFU_RES_CODE_SUCCESS;
+ }
+
+ #if 0
+ NRF_LOG_HEXDUMP_INFO(&s_dfu_settings.init_command[0], s_dfu_settings.progress.command_size);
+ #endif
+
+ NRF_LOG_INFO("\r\n");
+
+ if (dfu_decode_commmand() != true)
+ {
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ // We have a valid DFU packet
+ if (packet.has_signed_command)
+ {
+ NRF_LOG_INFO("Handling signed command\r\n");
+ ret_val = dfu_handle_signed_command(&packet.signed_command, &stream);
+ }
+ else if (packet.has_command)
+ {
+ NRF_LOG_INFO("Handling unsigned command\r\n");
+ ret_val = dfu_handle_command(&packet.command);
+ }
+ else
+ {
+ // We had no regular or signed command.
+ NRF_LOG_ERROR("Decoded command but it has no content!!\r\n");
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ if (ret_val == NRF_DFU_RES_CODE_SUCCESS)
+ {
+ // Setting DFU to initialized
+ NRF_LOG_INFO("Setting DFU flag to initialized\r\n");
+ m_valid_init_packet_present = true;
+ }
+ break;
+
+ case NRF_DFU_OBJECT_OP_SELECT:
+ NRF_LOG_INFO("Valid Command: NRF_DFU_OBJECT_OP_SELECT\r\n");
+ p_res->crc = s_dfu_settings.progress.command_crc;
+ p_res->offset = s_dfu_settings.progress.command_offset;
+ p_res->max_size = INIT_COMMAND_MAX_SIZE;
+ break;
+
+ default:
+ NRF_LOG_ERROR("Invalid Command Operation\r\n");
+ ret_val = NRF_DFU_RES_CODE_OP_CODE_NOT_SUPPORTED;
+ break;
+ }
+
+ return ret_val;
+}
+
+
+static nrf_dfu_res_code_t nrf_dfu_data_req(void * p_context, nrf_dfu_req_t * p_req, nrf_dfu_res_t * p_res)
+{
+ uint32_t const * p_write_addr;
+ nrf_dfu_res_code_t ret_val = NRF_DFU_RES_CODE_SUCCESS;
+
+#ifndef NRF51
+ if(p_req == NULL)
+ {
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+#endif
+
+ switch (p_req->req_type)
+ {
+ case NRF_DFU_OBJECT_OP_CREATE:
+ NRF_LOG_INFO("Before OP create\r\n");
+
+ if (p_req->object_size == 0)
+ {
+ // Empty object is not possible
+ //NRF_LOG_INFO("Trying to create data object of size 0\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ if ( (p_req->object_size & (CODE_PAGE_SIZE - 1)) != 0 &&
+ (s_dfu_settings.progress.firmware_image_offset_last + p_req->object_size != m_firmware_size_req) )
+ {
+ NRF_LOG_ERROR("Trying to create an object with a size that is not page aligned\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ if (p_req->object_size > DATA_OBJECT_MAX_SIZE)
+ {
+ // It is impossible to handle the command because the size is too large
+ NRF_LOG_ERROR("Invalid size for object (too large)\r\n");
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ if (m_valid_init_packet_present == false)
+ {
+ // Can't accept data because DFU isn't initialized by init command.
+ NRF_LOG_ERROR("Trying to create data object without valid init command\r\n");
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ if ((s_dfu_settings.progress.firmware_image_offset_last + p_req->object_size) > m_firmware_size_req)
+ {
+ NRF_LOG_ERROR("Trying to create an object of size %d, when offset is 0x%08x and firmware size is 0x%08x\r\n", p_req->object_size, s_dfu_settings.progress.firmware_image_offset_last, m_firmware_size_req);
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ NRF_LOG_INFO("Valid Data Create\r\n");
+
+ s_dfu_settings.progress.firmware_image_crc = s_dfu_settings.progress.firmware_image_crc_last;
+ s_dfu_settings.progress.data_object_size = p_req->object_size;
+ s_dfu_settings.progress.firmware_image_offset = s_dfu_settings.progress.firmware_image_offset_last;
+ s_dfu_settings.write_offset = s_dfu_settings.progress.firmware_image_offset_last;
+
+ FLASH_BUFFER_SWAP();
+
+ // Erase the page we're at.
+ m_flash_operations_pending++;
+ if (nrf_dfu_flash_erase((uint32_t*)(m_firmware_start_addr + s_dfu_settings.progress.firmware_image_offset), CEIL_DIV(p_req->object_size, CODE_PAGE_SIZE), dfu_data_write_handler) != FS_SUCCESS)
+ {
+ m_flash_operations_pending--;
+ NRF_LOG_ERROR("Erase operation failed\r\n");
+ return NRF_DFU_RES_CODE_INVALID_OBJECT;
+ }
+
+ NRF_LOG_INFO("Creating object with size: %d. Offset: 0x%08x, CRC: 0x%08x\r\n", s_dfu_settings.progress.data_object_size, s_dfu_settings.progress.firmware_image_offset, s_dfu_settings.progress.firmware_image_crc);
+
+ break;
+
+ case NRF_DFU_OBJECT_OP_WRITE:
+
+ // Setting to ensure we are not sending faulty information in case of an early return.
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+
+ if (m_valid_init_packet_present == false)
+ {
+ // Can't accept data because DFU isn't initialized by init command.
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+ if (p_req->req_len > FLASH_BUFFER_CHUNK_LENGTH)
+ {
+ return NRF_DFU_RES_CODE_INSUFFICIENT_RESOURCES;
+ }
+
+ if ((p_req->req_len + s_dfu_settings.progress.firmware_image_offset - s_dfu_settings.progress.firmware_image_offset_last) > s_dfu_settings.progress.data_object_size)
+ {
+ // Can't accept data because too much data has been received.
+ NRF_LOG_ERROR("Write request too long\r\n");
+ return NRF_DFU_RES_CODE_INVALID_PARAMETER;
+ }
+
+ // Update the CRC of the firmware image.
+ s_dfu_settings.progress.firmware_image_crc = crc32_compute(p_req->p_req, p_req->req_len, &s_dfu_settings.progress.firmware_image_crc);
+ s_dfu_settings.progress.firmware_image_offset += p_req->req_len;
+
+ // Update the return values
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+
+ if (m_data_buf_pos + p_req->req_len < FLASH_BUFFER_CHUNK_LENGTH)
+ {
+ //If there is enough space in the current buffer, store the received data.
+ memcpy(&m_data_buf[m_current_data_buffer][m_data_buf_pos],
+ p_req->p_req, p_req->req_len);
+ m_data_buf_pos += p_req->req_len;
+ }
+ else
+ {
+ // If there is not enough space in the current buffer, utilize what is left in the buffer, write it to flash and start using a new buffer.
+
+ // Fill the remaining part of the current buffer
+ uint16_t first_segment_length = FLASH_BUFFER_CHUNK_LENGTH - m_data_buf_pos;
+ memcpy(&m_data_buf[m_current_data_buffer][m_data_buf_pos],
+ p_req->p_req,
+ first_segment_length);
+
+ m_data_buf_pos += first_segment_length;
+
+ // Keep only the remaining part which should be put in the next buffer.
+ p_req->req_len -= first_segment_length;
+ p_req->p_req += first_segment_length;
+
+ // Write to flash.
+ p_write_addr = (uint32_t const *)(m_firmware_start_addr + s_dfu_settings.write_offset);
+ ++m_flash_operations_pending;
+ if (nrf_dfu_flash_store(p_write_addr, (uint32_t*)&m_data_buf[m_current_data_buffer][0], CEIL_DIV(m_data_buf_pos,4), dfu_data_write_handler) == FS_SUCCESS)
+ {
+ NRF_LOG_INFO("Storing %d B at: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ // Pre-calculate Offset + CRC assuming flash operation went OK
+ s_dfu_settings.write_offset += m_data_buf_pos;
+ }
+ else
+ {
+ --m_flash_operations_pending;
+ NRF_LOG_ERROR("!!! Failed storing %d B at address: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ // Previous flash operation failed. Revert CRC and offset.
+ s_dfu_settings.progress.firmware_image_crc = s_dfu_settings.progress.firmware_image_crc_last;
+ s_dfu_settings.progress.firmware_image_offset = s_dfu_settings.progress.firmware_image_offset_last;
+
+ // Update the return values
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset_last;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc_last;
+ }
+
+ FLASH_BUFFER_SWAP();
+
+ //Copy the remaining segment of the request into the next buffer.
+ if (p_req->req_len)
+ {
+ memcpy(&m_data_buf[m_current_data_buffer][m_data_buf_pos],
+ p_req->p_req, p_req->req_len);
+ m_data_buf_pos += p_req->req_len;
+ }
+ }
+
+ if ((m_data_buf_pos) &&
+ ( s_dfu_settings.write_offset -
+ s_dfu_settings.progress.firmware_image_offset_last +
+ m_data_buf_pos >=
+ s_dfu_settings.progress.data_object_size)
+ )
+ {
+ //End of an object and there is still data in the write buffer. Flush the write buffer.
+ p_write_addr = (uint32_t const *)(m_firmware_start_addr + s_dfu_settings.write_offset);
+ ++m_flash_operations_pending;
+ if (nrf_dfu_flash_store(p_write_addr, (uint32_t*)&m_data_buf[m_current_data_buffer][0], CEIL_DIV(m_data_buf_pos,4), dfu_data_write_handler) == FS_SUCCESS)
+ {
+ NRF_LOG_INFO("Storing %d B at: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ s_dfu_settings.write_offset += m_data_buf_pos;
+ }
+ else
+ {
+ --m_flash_operations_pending;
+ NRF_LOG_ERROR("!!! Failed storing %d B at address: 0x%08x\r\n", m_data_buf_pos, (uint32_t)p_write_addr);
+ // Previous flash operation failed. Revert CRC and offset.
+ s_dfu_settings.progress.firmware_image_crc = s_dfu_settings.progress.firmware_image_crc_last;
+ s_dfu_settings.progress.firmware_image_offset = s_dfu_settings.progress.firmware_image_offset_last;
+
+ // Update the return values
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset_last;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc_last;
+ }
+
+ // Swap buffers.
+ FLASH_BUFFER_SWAP();
+ }
+
+ break;
+
+ case NRF_DFU_OBJECT_OP_CRC:
+ NRF_LOG_INFO("Before OP crc\r\n");
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+ break;
+
+ case NRF_DFU_OBJECT_OP_EXECUTE:
+ NRF_LOG_INFO("Before OP execute\r\n");
+ if (s_dfu_settings.progress.data_object_size !=
+ s_dfu_settings.progress.firmware_image_offset -
+ s_dfu_settings.progress.firmware_image_offset_last)
+ {
+ // The size of the written object was not as expected.
+ NRF_LOG_ERROR("Invalid data here: exp: %d, got: %d\r\n", s_dfu_settings.progress.data_object_size, s_dfu_settings.progress.firmware_image_offset - s_dfu_settings.progress.firmware_image_offset_last);
+ return NRF_DFU_RES_CODE_OPERATION_NOT_PERMITTED;
+ }
+
+ NRF_LOG_INFO("Valid Data Execute\r\n");
+
+ // Update the offset and crc values for the last object written.
+ s_dfu_settings.progress.data_object_size = 0;
+ s_dfu_settings.progress.firmware_image_offset_last = s_dfu_settings.progress.firmware_image_offset;
+ s_dfu_settings.progress.firmware_image_crc_last = s_dfu_settings.progress.firmware_image_crc;
+ if (nrf_dfu_settings_write(NULL) != NRF_SUCCESS)
+ {
+ return NRF_DFU_RES_CODE_OPERATION_FAILED;
+ }
+
+ if (s_dfu_settings.progress.firmware_image_offset == m_firmware_size_req)
+ {
+ NRF_LOG_INFO("Waiting for %d pending flash operations before doing postvalidate.\r\n", m_flash_operations_pending);
+ while(m_flash_operations_pending)
+ {
+ nrf_dfu_wait();
+ }
+ // Received the whole image. Doing postvalidate.
+ NRF_LOG_INFO("Doing postvalidate\r\n");
+ ret_val = nrf_dfu_postvalidate(&packet.signed_command.command.init);
+ }
+ break;
+
+ case NRF_DFU_OBJECT_OP_SELECT:
+ NRF_LOG_INFO("Valid Data Read info\r\n");
+ p_res->crc = s_dfu_settings.progress.firmware_image_crc;
+ p_res->offset = s_dfu_settings.progress.firmware_image_offset;
+ p_res->max_size = DATA_OBJECT_MAX_SIZE;
+ break;
+
+ default:
+ NRF_LOG_ERROR("Invalid Data Operation\r\n");
+ ret_val = NRF_DFU_RES_CODE_OP_CODE_NOT_SUPPORTED;
+ break;
+ }
+
+ return ret_val;
+}
+
+
+uint32_t nrf_dfu_req_handler_init(void)
+{
+#ifdef SOFTDEVICE_PRESENT
+ uint32_t ret_val = nrf_dfu_flash_init(true);
+#else
+ uint32_t ret_val = nrf_dfu_flash_init(false);
+#endif
+
+ VERIFY_SUCCESS(ret_val);
+
+ m_flash_operations_pending = 0;
+
+ // If the command is stored to flash, init command was valid.
+ if (s_dfu_settings.progress.command_size != 0 && dfu_decode_commmand())
+ {
+ // Get the previously stored firmware size
+ if (s_dfu_settings.bank_0.bank_code == NRF_DFU_BANK_INVALID && s_dfu_settings.bank_0.image_size != 0)
+ {
+ m_firmware_size_req = s_dfu_settings.bank_0.image_size;
+ }
+ else if (s_dfu_settings.bank_1.bank_code == NRF_DFU_BANK_INVALID && s_dfu_settings.bank_0.image_size != 0)
+ {
+ m_firmware_size_req = s_dfu_settings.bank_1.image_size;
+ }
+ else
+ {
+ return NRF_SUCCESS;
+ }
+
+ // Location should still be valid, expecting result of find-cache to be true
+ (void)nrf_dfu_find_cache(m_firmware_size_req, false, &m_firmware_start_addr);
+
+ // Setting valid init command to true to
+ m_valid_init_packet_present = true;
+ }
+
+ return NRF_SUCCESS;
+}
+
+
+nrf_dfu_res_code_t nrf_dfu_req_handler_on_req(void * p_context, nrf_dfu_req_t * p_req, nrf_dfu_res_t * p_res)
+{
+ nrf_dfu_res_code_t ret_val;
+
+ static nrf_dfu_obj_type_t cur_obj_type = NRF_DFU_OBJ_TYPE_COMMAND;
+ switch (p_req->req_type)
+ {
+ case NRF_DFU_OBJECT_OP_CREATE:
+ case NRF_DFU_OBJECT_OP_SELECT:
+ if ((nrf_dfu_obj_type_t)p_req->obj_type == NRF_DFU_OBJ_TYPE_COMMAND)
+ {
+ cur_obj_type = NRF_DFU_OBJ_TYPE_COMMAND;
+ }
+ else if ((nrf_dfu_obj_type_t)p_req->obj_type == NRF_DFU_OBJ_TYPE_DATA)
+ {
+ cur_obj_type = NRF_DFU_OBJ_TYPE_DATA;
+ }
+ else
+ {
+ return NRF_DFU_RES_CODE_UNSUPPORTED_TYPE;
+ }
+ break;
+ default:
+ // no implementation
+ break;
+ }
+
+ switch (cur_obj_type)
+ {
+ case NRF_DFU_OBJ_TYPE_COMMAND:
+ ret_val = nrf_dfu_command_req(p_context, p_req, p_res);
+ break;
+
+ case NRF_DFU_OBJ_TYPE_DATA:
+ ret_val = nrf_dfu_data_req(p_context, p_req, p_res);
+ break;
+
+ default:
+ NRF_LOG_ERROR("Invalid request type\r\n");
+ ret_val = NRF_DFU_RES_CODE_INVALID_OBJECT;
+ break;
+ }
+
+ return ret_val;
+}
+
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/dfu_req_handling.h b/ARM/Nordic/nRF52/exemples/dfu/src/dfu_req_handling.h
new file mode 100755
index 00000000..a38cf3a3
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/dfu_req_handling.h
@@ -0,0 +1,21 @@
+/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+#ifndef DFU_REQ_HANDLING_H__
+#define DFU_REQ_HANDLING_H__
+
+#include "compiler_abstraction.h"
+
+__ALIGN(4) extern const uint8_t pk[64];
+
+
+#endif // #ifndef DFU_REQ_HANDLING_H__
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/license.txt b/ARM/Nordic/nRF52/exemples/dfu/src/license.txt
new file mode 100755
index 00000000..2ffb212c
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/license.txt
@@ -0,0 +1,117 @@
+This text contains two licenses (License #1, License #2).
+License #1 applies to the whole SDK, except i) files including Dynastream copyright notices and ii) source files including BSD 3-clause license texts.
+License #2 applies only to files including Dynastream copyright notices.
+All must be read and accepted before proceeding.
+
+
+License #1
+
+License Agreement
+Nordic Semiconductor ASA (“Nordic”)
+Software Development Kit
+
+
+You (“You” or “Licensee”) must carefully and thoroughly read this License Agreement (“Agreement”), and accept to adhere to this Agreement before downloading, installing and/or using any software or content in the Software Development Kit (“SDK”) provided herewith.
+
+YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SDK, IN THIS CASE YOU AGREE THAT THE USE OF THE SDK CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS.
+
+IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SDK OR RELATED CONTENT.
+
+
+1. Grant of License
+Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license (“License”): (a) to use the SDK as a development platform solely in connection with a Nordic Integrated Circuit (“nRF IC”), (b) to modify any source code contained in the SDK solely as necessary to implement products developed by Licensee that incorporate an nRF IC (“Licensee Product”), and (c) to distribute the SDK solely as implemented in Licensee Product. Licensee shall not use the SDK for any purpose other than specifically authorized herein.
+
+2. Title
+As between the parties, Nordic retains full rights, title, and ownership of the SDK and any and all patents, copyrights, trade secrets, trade names, trademarks, and other intellectual property rights in and to the SDK.
+
+3. No Modifications or Reverse Engineering
+Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code parts of the SDK including, but not limited to pre-compiled binaries and object code.
+
+4. Distribution Restrictions
+Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SDK to any third party. Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SDK as proscribed herein. Licensee also agrees that use of and access to the SDK will be strictly limited to the employees and subcontractors of the Licensee necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making such employees and subcontractors agree on complying with the obligations concerning use and non-disclosure of the SDK.
+
+5. No Other Rights
+Licensee shall use the SDK only in compliance with this Agreement and shall refrain from using the SDK in any way that may be contrary to this Agreement.
+
+
+6. Fees
+Nordic grants the License to the Licensee free of charge provided that the Licensee undertakes the obligations in the Agreement and warrants to comply with the Agreement.
+
+
+7. DISCLAIMER OF WARRANTY
+THE SDK IS PROVIDED “AS IS" WITHOUT WARRANTY OF ANY KIND EXPRESS OR IMPLIED AND NEITHER NORDIC, ITS LICENSORS OR AFFILIATES NOR THE COPYRIGHT HOLDERS MAKE ANY REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR THAT THE SDK WILL NOT INFRINGE ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS. THERE IS NO WARRANTY BY NORDIC OR BY ANY OTHER PARTY THAT THE FUNCTIONS CONTAINED IN THE SDK WILL MEET THE REQUIREMENTS OF LICENSEE OR THAT THE OPERATION OF THE SDK WILL BE UNINTERRUPTED OR ERROR-FREE. LICENSEE ASSUMES ALL RESPONSIBILITY AND RISK FOR THE SELECTION OF THE SDK TO ACHIEVE LICENSEE’S INTENDED RESULTS AND FOR THE INSTALLATION, USE AND RESULTS OBTAINED FROM IT.
+
+8. No Support
+Nordic is not obligated to furnish or make available to Licensee any further information, software, technical information, know-how, show-how, bug-fixes or support. Nordic reserves the right to make changes to the SDK without further notice.
+
+9. Limitation of Liability
+In no event shall Nordic, its employees or suppliers or affiliates be liable for any lost profits, revenue, sales, data or costs of procurement of substitute goods or services, property damage, personal injury, interruption of business, loss of business information or for any special, direct, indirect, incidental, economic, punitive, special or consequential damages, however caused and whether arising under contract, tort, negligence, or other theory of liability arising out of the use of or inability to use the SDK, even if Nordic or its employees or suppliers or affiliates are advised of the possibility of such damages. Because some countries/states/ jurisdictions do not allow the exclusion or limitation of liability, but may allow liability to be limited, in such cases, Nordic, its employees or licensors or affiliates’ liability shall be limited to USD 50.
+
+10. Breach of Contract
+Upon a breach of contract by the Licensee, Nordic is entitled to damages in respect of any direct loss which can be reasonably attributed to the breach by the Licensee. If the Licensee has acted with gross negligence or willful misconduct, the Licensee shall cover both direct and indirect costs for Nordic.
+
+11. Indemnity
+
+Licensee undertakes to indemnify, hold harmless and defend Nordic and its directors, officers, affiliates, shareholders, employees and agents from and against any claims or lawsuits, including attorney's fees, that arise or result of the Licensee’s execution of the License and which is not due to causes for which Nordic is responsible.
+
+12. Governing Law
+This Agreement shall be construed according to the laws of Norway, and hereby submits to the exclusive jurisdiction of the Oslo tingrett.
+
+13. Assignment
+Licensee shall not assign this Agreement or any rights or obligations hereunder without the prior written consent of Nordic.
+
+14. Termination
+Without prejudice to any other rights, Nordic may cancel this Agreement if Licensee does not abide by the terms and conditions of this Agreement. Upon termination Licensee must promptly cease the use of the License and destroy all copies of the Licensed Technology and any other material provided by Nordic or its affiliate, or produced by the Licensee in connection with the Agreement or the Licensed Technology.
+
+
+License #2
+
+This software is subject to the ANT+ Shared Source License
+www.thisisant.com/swlicenses
+Copyright (c) Dynastream Innovations, Inc. 2015
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or
+without modification, are permitted provided that the following
+conditions are met:
+
+ 1) Redistributions of source code must retain the above
+ copyright notice,this list of conditions and the following
+ disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials
+ provided with the distribution.
+
+ 3) Neither the name of Dynastream nor the names of its
+ contributors may be used to endorse or promote products
+ derived from this software without specific prior
+ written permission.
+
+The following actions are prohibited:
+
+ 1) Redistribution of source code containing the ANT+ Network
+ Key. The ANT+ Network Key is available to ANT+ Adopters.
+ Please refer to http://thisisant.com to become an ANT+
+ Adopter and access the key.
+
+ 2) Reverse engineering, decompilation, and/or disassembly of
+ software provided in binary form under this license.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW
+THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE
+ABOVE LIMITATIONS MAY NOT APPLY TO YOU.
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/main.c b/ARM/Nordic/nRF52/exemples/dfu/src/main.c
new file mode 100755
index 00000000..ce03eb33
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/main.c
@@ -0,0 +1,94 @@
+/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+/** @file
+ *
+ * @defgroup bootloader_secure main.c
+ * @{
+ * @ingroup dfu_bootloader_api
+ * @brief Bootloader project main file for secure DFU.
+ *
+ */
+
+#include
+#include "boards.h"
+#include "nrf_mbr.h"
+#include "nrf_bootloader.h"
+#include "nrf_bootloader_app_start.h"
+#include "nrf_dfu.h"
+#include "nrf_log.h"
+#include "nrf_log_ctrl.h"
+#include "app_error.h"
+#include "app_error_weak.h"
+#include "nrf_bootloader_info.h"
+
+void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info)
+{
+ NRF_LOG_ERROR("Received a fault! id: 0x%08x, pc: 0x&08x\r\n", id, pc);
+ NVIC_SystemReset();
+}
+
+void app_error_handler_bare(uint32_t error_code)
+{
+ (void)error_code;
+ NRF_LOG_ERROR("Received an error: 0x%08x!\r\n", error_code);
+ NVIC_SystemReset();
+}
+
+
+/**@brief Function for initialization of LEDs.
+ */
+static void leds_init(void)
+{
+ bsp_board_leds_init();
+ bsp_board_led_on(BSP_BOARD_LED_2);
+}
+
+
+/**@brief Function for initializing the button module.
+ */
+static void buttons_init(void)
+{
+ nrf_gpio_cfg_sense_input(BOOTLOADER_BUTTON,
+ BUTTON_PULL,
+ NRF_GPIO_PIN_SENSE_LOW);
+}
+
+
+/**@brief Function for application main entry.
+ */
+int main(void)
+{
+ uint32_t ret_val;
+
+ (void) NRF_LOG_INIT(NULL);
+
+ NRF_LOG_INFO("Inside main\r\n");
+
+ leds_init();
+ buttons_init();
+
+ ret_val = nrf_bootloader_init();
+ APP_ERROR_CHECK(ret_val);
+
+ // Either there was no DFU functionality enabled in this project or the DFU module detected
+ // no ongoing DFU operation and found a valid main application.
+ // Boot the main application.
+ nrf_bootloader_app_start(MAIN_APPLICATION_START_ADDR);
+
+ // Should never be reached.
+ NRF_LOG_INFO("After main\r\n");
+}
+
+/**
+ * @}
+ */
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/readme.txt b/ARM/Nordic/nRF52/exemples/dfu/src/readme.txt
new file mode 100755
index 00000000..41ad9382
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/readme.txt
@@ -0,0 +1,34 @@
+Usage:
+1. If proto file changes:
+
+You will need to download the protoc compiler from:
+https://developers.google.com/protocol-buffers/docs/downloads
+
+ A. From examples\dfu\bootloader_secure\, run:
+
+ protoc.exe -odfu-cc.pb dfu-cc.proto
+
+ This generates a 'dfu-cc.pb' file, which will be used by the Python script
+
+ B. From examples\dfu\bootloader_secure\, run python script:
+
+ python ..\..\..\external\nano-pb\generator\nanopb_generator.py dfu-cc.pb -f dfu-cc.options
+
+ This produces 2 files: dfu-cc.pb.c and dfu-cc.pb.h, which will overwrite the old ones if present.
+
+2. File:
+
+ - pb.h
+
+ Should be used to use PB.
+
+3. Additionally, the following may be used to decode/encode messages:
+
+ - pb_common.h
+ - pb_common.c
+ (to decode:)
+ - pb_decode.h
+ - pb_decode.c
+ (to encode:)
+ - pb_encode.h
+ - pb_endode.c
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/sdk_config.h b/ARM/Nordic/nRF52/exemples/dfu/src/sdk_config.h
new file mode 100644
index 00000000..e345df70
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/sdk_config.h
@@ -0,0 +1,626 @@
+
+
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#ifdef USE_APP_CONFIG
+#include "app_config.h"
+#endif
+// nRF_Drivers
+
+//==========================================================
+// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef CLOCK_ENABLED
+#define CLOCK_ENABLED 0
+#endif
+#if CLOCK_ENABLED
+// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
+
+// <0=> Default (64 MHz)
+
+#ifndef CLOCK_CONFIG_XTAL_FREQ
+#define CLOCK_CONFIG_XTAL_FREQ 0
+#endif
+
+// CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef CLOCK_CONFIG_LOG_ENABLED
+#define CLOCK_CONFIG_LOG_ENABLED 0
+#endif
+#if CLOCK_CONFIG_LOG_ENABLED
+// CLOCK_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef CLOCK_CONFIG_LOG_LEVEL
+#define CLOCK_CONFIG_LOG_LEVEL 3
+#endif
+
+// CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef CLOCK_CONFIG_INFO_COLOR
+#define CLOCK_CONFIG_INFO_COLOR 0
+#endif
+
+// CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef CLOCK_CONFIG_DEBUG_COLOR
+#define CLOCK_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //CLOCK_CONFIG_LOG_ENABLED
+//
+
+#endif //CLOCK_ENABLED
+//
+
+// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module
+//==========================================================
+#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
+#endif
+#if PERIPHERAL_RESOURCE_SHARING_ENABLED
+// COMMON_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef COMMON_CONFIG_LOG_ENABLED
+#define COMMON_CONFIG_LOG_ENABLED 0
+#endif
+#if COMMON_CONFIG_LOG_ENABLED
+// COMMON_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef COMMON_CONFIG_LOG_LEVEL
+#define COMMON_CONFIG_LOG_LEVEL 3
+#endif
+
+// COMMON_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMMON_CONFIG_INFO_COLOR
+#define COMMON_CONFIG_INFO_COLOR 0
+#endif
+
+// COMMON_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef COMMON_CONFIG_DEBUG_COLOR
+#define COMMON_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //COMMON_CONFIG_LOG_ENABLED
+//
+
+#endif //PERIPHERAL_RESOURCE_SHARING_ENABLED
+//
+
+// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver
+//==========================================================
+#ifndef RNG_ENABLED
+#define RNG_ENABLED 1
+#endif
+#if RNG_ENABLED
+// RNG_CONFIG_ERROR_CORRECTION - Error correction
+
+
+#ifndef RNG_CONFIG_ERROR_CORRECTION
+#define RNG_CONFIG_ERROR_CORRECTION 0
+#endif
+
+// RNG_CONFIG_POOL_SIZE - Pool size
+#ifndef RNG_CONFIG_POOL_SIZE
+#define RNG_CONFIG_POOL_SIZE 32
+#endif
+
+// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef RNG_CONFIG_IRQ_PRIORITY
+#define RNG_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// RNG_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef RNG_CONFIG_LOG_ENABLED
+#define RNG_CONFIG_LOG_ENABLED 0
+#endif
+#if RNG_CONFIG_LOG_ENABLED
+// RNG_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef RNG_CONFIG_LOG_LEVEL
+#define RNG_CONFIG_LOG_LEVEL 3
+#endif
+
+// RNG_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RNG_CONFIG_INFO_COLOR
+#define RNG_CONFIG_INFO_COLOR 0
+#endif
+
+// RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef RNG_CONFIG_DEBUG_COLOR
+#define RNG_CONFIG_DEBUG_COLOR 0
+#endif
+
+#endif //RNG_CONFIG_LOG_ENABLED
+//
+
+#endif //RNG_ENABLED
+//
+
+//
+//==========================================================
+
+// nRF_Libraries
+
+//==========================================================
+// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
+//==========================================================
+#ifndef APP_SCHEDULER_ENABLED
+#define APP_SCHEDULER_ENABLED 1
+#endif
+#if APP_SCHEDULER_ENABLED
+// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature
+
+
+#ifndef APP_SCHEDULER_WITH_PAUSE
+#define APP_SCHEDULER_WITH_PAUSE 0
+#endif
+
+// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling
+
+
+#ifndef APP_SCHEDULER_WITH_PROFILER
+#define APP_SCHEDULER_WITH_PROFILER 0
+#endif
+
+#endif //APP_SCHEDULER_ENABLED
+//
+
+// APP_TIMER_ENABLED - app_timer - Application timer functionality
+//==========================================================
+#ifndef APP_TIMER_ENABLED
+#define APP_TIMER_ENABLED 1
+#endif
+#if APP_TIMER_ENABLED
+// APP_TIMER_WITH_PROFILER - Enable app_timer profiling
+
+
+#ifndef APP_TIMER_WITH_PROFILER
+#define APP_TIMER_WITH_PROFILER 0
+#endif
+
+// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on
+
+
+// If option is enabled RTC is kept running even if there is no active timers.
+// This option can be used when app_timer is used for timestamping.
+
+#ifndef APP_TIMER_KEEPS_RTC_ACTIVE
+#define APP_TIMER_KEEPS_RTC_ACTIVE 0
+#endif
+
+#endif //APP_TIMER_ENABLED
+//
+
+// CRC32_ENABLED - crc32 - CRC32 calculation routines
+
+
+#ifndef CRC32_ENABLED
+#define CRC32_ENABLED 1
+#endif
+
+// FSTORAGE_ENABLED - fstorage - Flash storage module
+//==========================================================
+#ifndef FSTORAGE_ENABLED
+#define FSTORAGE_ENABLED 1
+#endif
+#if FSTORAGE_ENABLED
+// FS_QUEUE_SIZE - Configures the size of the internal queue.
+// Increase this if there are many users, or if it is likely that many
+// operation will be queued at once without waiting for the previous operations
+// to complete. In general, increase the queue size if you frequently receive
+// @ref FS_ERR_QUEUE_FULL errors when calling @ref fs_store or @ref fs_erase.
+
+#ifndef FS_QUEUE_SIZE
+#define FS_QUEUE_SIZE 4
+#endif
+
+// FS_OP_MAX_RETRIES - Number attempts to execute an operation if the SoftDevice fails.
+// Increase this value if events return the @ref FS_ERR_OPERATION_TIMEOUT
+// error often. The SoftDevice may fail to schedule flash access due to high BLE activity.
+
+#ifndef FS_OP_MAX_RETRIES
+#define FS_OP_MAX_RETRIES 3
+#endif
+
+// FS_MAX_WRITE_SIZE_WORDS - Maximum number of words to be written to flash in a single operation.
+// Tweaking this value can increase the chances of the SoftDevice being
+// able to fit flash operations in between radio activity. This value is bound by the
+// maximum number of words which the SoftDevice can write to flash in a single call to
+// @ref sd_flash_write, which is 256 words for nRF51 ICs and 1024 words for nRF52 ICs.
+
+#ifndef FS_MAX_WRITE_SIZE_WORDS
+#define FS_MAX_WRITE_SIZE_WORDS 1024
+#endif
+
+#endif //FSTORAGE_ENABLED
+//
+
+// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI
+//==========================================================
+#ifndef HCI_MEM_POOL_ENABLED
+#define HCI_MEM_POOL_ENABLED 1
+#endif
+#if HCI_MEM_POOL_ENABLED
+// HCI_TX_BUF_SIZE - TX buffer size in bytes.
+#ifndef HCI_TX_BUF_SIZE
+#define HCI_TX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_SIZE - RX buffer size in bytes.
+#ifndef HCI_RX_BUF_SIZE
+#define HCI_RX_BUF_SIZE 600
+#endif
+
+// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size.
+#ifndef HCI_RX_BUF_QUEUE_SIZE
+#define HCI_RX_BUF_QUEUE_SIZE 4
+#endif
+
+#endif //HCI_MEM_POOL_ENABLED
+//
+
+// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator
+//==========================================================
+#ifndef MEM_MANAGER_ENABLED
+#define MEM_MANAGER_ENABLED 1
+#endif
+#if MEM_MANAGER_ENABLED
+// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1
+#endif
+
+// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block.
+// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT
+#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block.
+// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE
+#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255>
+
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0
+#endif
+
+// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block.
+// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256
+#endif
+
+// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module.
+
+
+#ifndef MEM_MANAGER_ENABLE_LOGS
+#define MEM_MANAGER_ENABLE_LOGS 0
+#endif
+
+// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module.
+
+
+#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK
+#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0
+#endif
+
+#endif //MEM_MANAGER_ENABLED
+//
+
+// NRF_QUEUE_ENABLED - nrf_queue - Queue module
+
+
+#ifndef NRF_QUEUE_ENABLED
+#define NRF_QUEUE_ENABLED 1
+#endif
+
+//
+//==========================================================
+
+// nRF_Log
+
+//==========================================================
+// NRF_LOG_ENABLED - nrf_log - Logging
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 0
+#endif
+#if NRF_LOG_ENABLED
+// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string
+//==========================================================
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+#if NRF_LOG_USES_COLORS
+// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+// NRF_LOG_ERROR_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_ERROR_COLOR
+#define NRF_LOG_ERROR_COLOR 0
+#endif
+
+// NRF_LOG_WARNING_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRF_LOG_WARNING_COLOR
+#define NRF_LOG_WARNING_COLOR 0
+#endif
+
+#endif //NRF_LOG_USES_COLORS
+//
+
+// NRF_LOG_DEFAULT_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 3
+#endif
+
+// NRF_LOG_DEFERRED - Enable deffered logger.
+
+// Log data is buffered and can be processed in idle.
+//==========================================================
+#ifndef NRF_LOG_DEFERRED
+#define NRF_LOG_DEFERRED 1
+#endif
+#if NRF_LOG_DEFERRED
+// NRF_LOG_DEFERRED_BUFSIZE - Size of the buffer for logs in words.
+// Must be power of 2
+
+#ifndef NRF_LOG_DEFERRED_BUFSIZE
+#define NRF_LOG_DEFERRED_BUFSIZE 256
+#endif
+
+#endif //NRF_LOG_DEFERRED
+//
+
+// NRF_LOG_USES_TIMESTAMP - Enable timestamping
+
+
+// Function for getting the timestamp is provided by the user
+
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+
+#endif //NRF_LOG_ENABLED
+//
+
+//
+//==========================================================
+
+// nRF_crypto
+
+//==========================================================
+// NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library
+//==========================================================
+#ifndef NRF_CRYPTO_ENABLED
+#define NRF_CRYPTO_ENABLED 1
+#endif
+#if NRF_CRYPTO_ENABLED
+// NRF_CRYPTO_BACKEND_CC310_LIB - Enables the ARM Cryptocell CC310 backend
+
+
+// The hardware-accelerated cryptography backend is available only on nRF52840.
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_LIB
+#define NRF_CRYPTO_BACKEND_CC310_LIB 0
+#endif
+
+// NRF_CRYPTO_BACKEND_MICRO_ECC - Enables the micro-ecc software backend
+
+// The micro-ecc library provides a software implementation of ECC cryptography for nRF5 Series devices.
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC
+#define NRF_CRYPTO_BACKEND_MICRO_ECC 1
+#endif
+#if NRF_CRYPTO_BACKEND_MICRO_ECC
+// NRF_CRYPTO_BACKEND_SW - Enables hashing
+
+
+// If enabled, the cryptography library supports hashing (needed for signing).
+
+#ifndef NRF_CRYPTO_BACKEND_SW
+#define NRF_CRYPTO_BACKEND_SW 1
+#endif
+
+// NRF_CRYPTO_SUPPORTS_RNG - Enables RNG
+
+
+// If enabled, the cryptography library supports random number generation (needed for key generation).
+
+#ifndef NRF_CRYPTO_SUPPORTS_RNG
+#define NRF_CRYPTO_SUPPORTS_RNG 0
+#endif
+
+#endif //NRF_CRYPTO_BACKEND_MICRO_ECC
+//
+
+#endif //NRF_CRYPTO_ENABLED
+//
+
+//
+//==========================================================
+
+// <<< end of configuration section >>>
+#endif //SDK_CONFIG_H
+
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf51.ld b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf51.ld
new file mode 100755
index 00000000..51aa8c40
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf51.ld
@@ -0,0 +1,81 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ /** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
+ * MBR to init the bootloader when starting the system. This value must correspond to
+ * BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
+ * those values do not match. The check is performed in main.c, see
+ * APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
+ */
+ FLASH (rx) : ORIGIN = 0x3AC00, LENGTH = 0x5000
+
+ /** RAM Region for bootloader. This setting is suitable when used with s110, s120, s130, s310. */
+ RAM (rwx) : ORIGIN = 0x20002C00, LENGTH = 0x5380
+
+ /** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
+ * from application to bootloader when using buttonluss DFU OTA.
+ */
+ NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
+
+ /** Location of bootloader setting in at the last flash page. */
+ BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0003FC00, LENGTH = 0x0400
+
+ /** Location in UICR where bootloader start address is stored. */
+ UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
+}
+
+SECTIONS
+{
+ /* Ensures the bootloader settings are placed at the last flash page. */
+ .bootloaderSettings(NOLOAD) :
+ {
+
+ } > BOOTLOADER_SETTINGS
+
+ /* Ensures the Bootloader start address in flash is written to UICR when flashing the image. */
+ .uicrBootStartAddress :
+ {
+ KEEP(*(.uicrBootStartAddress))
+ } > UICR_BOOTLOADER
+
+ /* No init RAM section in bootloader. Used for bond information exchange. */
+ .noinit(NOLOAD) :
+ {
+
+ } > NOINIT
+ /* other placements follow here... */
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM
+
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM
+
+ . = ALIGN(4);
+ .dfu_trans :
+ {
+ PROVIDE(__start_dfu_trans = .);
+ KEEP(*(.dfu_trans))
+ PROVIDE(__stop_dfu_trans = .);
+ } > RAM
+
+} INSERT AFTER .data
+
+INCLUDE "gcc_arm_flash.ld"
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf51_debug.ld b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf51_debug.ld
new file mode 100755
index 00000000..6a17a7e7
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf51_debug.ld
@@ -0,0 +1,81 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ /** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
+ * MBR to init the bootloader when starting the system. This value must correspond to
+ * BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
+ * those values do not match. The check is performed in main.c, see
+ * APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
+ */
+ FLASH (rx) : ORIGIN = 0x35C00, LENGTH = 0xA000
+
+ /** RAM Region for bootloader. This setting is suitable when used with s110, s120, s130, s310. */
+ RAM (rwx) : ORIGIN = 0x20002C00, LENGTH = 0x5380
+
+ /** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
+ * from application to bootloader when using buttonluss DFU OTA.
+ */
+ NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
+
+ /** Location of bootloader setting in at the last flash page. */
+ BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0003FC00, LENGTH = 0x0400
+
+ /** Location in UICR where bootloader start address is stored. */
+ UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
+}
+
+SECTIONS
+{
+ /* Ensures the bootloader settings are placed at the last flash page. */
+ .bootloaderSettings(NOLOAD) :
+ {
+
+ } > BOOTLOADER_SETTINGS
+
+ /* Ensures the Bootloader start address in flash is written to UICR when flashing the image. */
+ .uicrBootStartAddress :
+ {
+ KEEP(*(.uicrBootStartAddress))
+ } > UICR_BOOTLOADER
+
+ /* No init RAM section in bootloader. Used for bond information exchange. */
+ .noinit(NOLOAD) :
+ {
+
+ } > NOINIT
+ /* other placements follow here... */
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM
+
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM
+
+ . = ALIGN(4);
+ .dfu_trans :
+ {
+ PROVIDE(__start_dfu_trans = .);
+ KEEP(*(.dfu_trans))
+ PROVIDE(__stop_dfu_trans = .);
+ } > RAM
+
+} INSERT AFTER .data
+
+INCLUDE "gcc_arm_flash.ld"
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf52.ld b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf52.ld
new file mode 100755
index 00000000..6e32c6e8
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf52.ld
@@ -0,0 +1,101 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+SEARCH_DIR(../src)
+SEARCH_DIR(../../../../../src)
+GROUP(-lgcc -lc -lnosys -lCMSIS)
+
+MEMORY
+{
+ /** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
+ * MBR to init the bootloader when starting the system. This value must correspond to
+ * BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
+ * those values do not match. The check is performed in main.c, see
+ * APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
+ */
+ FLASH (rx) : ORIGIN = 0x78000, LENGTH = 0x6000
+
+ /** RAM Region for bootloader. This setting is suitable when used with s132. */
+ RAM (rwx) : ORIGIN = 0x20002C00, LENGTH = 0x5380
+
+ /** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
+ * from application to bootloader when using buttonluss DFU OTA.
+ */
+ NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
+
+ /** Location of bootloader setting in flash. */
+ BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0007F000, LENGTH = 0x1000
+
+ /** Location in UICR where bootloader start address is stored. */
+ UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
+
+ /** Location of mbr params page in flash. */
+ MBR_PARAMS_PAGE (rw) : ORIGIN = 0x0007E000, LENGTH = 0x1000
+
+ /** Location in UICR where mbr params page address is stored. */
+ UICR_MBR_PARAM_PAGE(r) : ORIGIN = 0x10001018, LENGTH = 0x04
+}
+
+SECTIONS
+{
+ /* Place the bootloader settings page in flash. */
+ .bootloaderSettings(NOLOAD) :
+ {
+
+ } > BOOTLOADER_SETTINGS
+
+ /* Write the bootloader address in UICR. */
+ .uicrBootStartAddress :
+ {
+ KEEP(*(.uicrBootStartAddress))
+ } > UICR_BOOTLOADER
+
+ /* Place the mbr params page in flash. */
+ .mbrParamsPage(NOLOAD) :
+ {
+
+ } > MBR_PARAMS_PAGE
+
+ /* Write the bootloader address in UICR. */
+ .uicrMbrParamsPageAddress :
+ {
+ KEEP(*(.uicrMbrParamsPageAddress))
+ } > UICR_MBR_PARAM_PAGE
+
+ /* No init RAM section in bootloader. Used for bond information exchange. */
+ .noinit(NOLOAD) :
+ {
+
+ } > NOINIT
+ /* other placements follow here... */
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM AT > FLASH
+
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM AT > FLASH
+
+ . = ALIGN(4);
+ .dfu_trans :
+ {
+ PROVIDE(__start_dfu_trans = .);
+ KEEP(*(.dfu_trans))
+ PROVIDE(__stop_dfu_trans = .);
+ } > RAM AT > FLASH
+
+} INSERT AFTER .data
+
+INCLUDE "gcc_arm_flash.ld"
diff --git a/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf52_debug.ld b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf52_debug.ld
new file mode 100755
index 00000000..2b049531
--- /dev/null
+++ b/ARM/Nordic/nRF52/exemples/dfu/src/secure_dfu_gcc_nrf52_debug.ld
@@ -0,0 +1,101 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+SEARCH_DIR(../src)
+SEARCH_DIR(../../../../../src)
+GROUP(-lgcc -lc -lnosys -lCMSIS)
+
+MEMORY
+{
+ /** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
+ * MBR to init the bootloader when starting the system. This value must correspond to
+ * BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
+ * those values do not match. The check is performed in main.c, see
+ * APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
+ */
+ FLASH (rx) : ORIGIN = 0x77000, LENGTH = 0x7000
+
+ /** RAM Region for bootloader. This setting is suitable when used with s132. */
+ RAM (rwx) : ORIGIN = 0x20002C00, LENGTH = 0x5380
+
+ /** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
+ * from application to bootloader when using buttonluss DFU OTA.
+ */
+ NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
+
+ /** Location of bootloader setting in flash. */
+ BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0007F000, LENGTH = 0x1000
+
+ /** Location in UICR where bootloader start address is stored. */
+ UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
+
+ /** Location of mbr params page in flash. */
+ MBR_PARAMS_PAGE (rw) : ORIGIN = 0x0007E000, LENGTH = 0x1000
+
+ /** Location in UICR where mbr params page address is stored. */
+ UICR_MBR_PARAM_PAGE(r) : ORIGIN = 0x10001018, LENGTH = 0x04
+}
+
+SECTIONS
+{
+ /* Place the bootloader settings page in flash. */
+ .bootloaderSettings(NOLOAD) :
+ {
+
+ } > BOOTLOADER_SETTINGS
+
+ /* Write the bootloader address in UICR. */
+ .uicrBootStartAddress :
+ {
+ KEEP(*(.uicrBootStartAddress))
+ } > UICR_BOOTLOADER
+
+ /* Place the mbr params page in flash. */
+ .mbrParamsPage(NOLOAD) :
+ {
+
+ } > MBR_PARAMS_PAGE
+
+ /* Write the bootloader address in UICR. */
+ .uicrMbrParamsPageAddress :
+ {
+ KEEP(*(.uicrMbrParamsPageAddress))
+ } > UICR_MBR_PARAM_PAGE
+
+ /* No init RAM section in bootloader. Used for bond information exchange. */
+ .noinit(NOLOAD) :
+ {
+
+ } > NOINIT
+ /* other placements follow here... */
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM AT > FLASH
+
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM AT > FLASH
+
+ . = ALIGN(4);
+ .dfu_trans :
+ {
+ PROVIDE(__start_dfu_trans = .);
+ KEEP(*(.dfu_trans))
+ PROVIDE(__stop_dfu_trans = .);
+ } > RAM AT > FLASH
+
+} INSERT AFTER .data
+
+INCLUDE "gcc_arm_flash.ld"
diff --git a/ARM/Nordic/nRF52/src/gcc_nrf52_s132_xxaa.ld b/ARM/Nordic/nRF52/src/gcc_nrf52_s132_xxaa.ld
index 9cd4c723..546b884c 100755
--- a/ARM/Nordic/nRF52/src/gcc_nrf52_s132_xxaa.ld
+++ b/ARM/Nordic/nRF52/src/gcc_nrf52_s132_xxaa.ld
@@ -7,10 +7,43 @@ GROUP(-lgcc -lc -lnosys -lCMSIS)
MEMORY
{
- FLASH (rx) : ORIGIN = 0x1F000, LENGTH = 0x61000
+ FLASH (rx) : ORIGIN = 0x20000, LENGTH = 0x60000
RAM (rwx) : ORIGIN = 0x20002200, LENGTH = 0xde00
+ /** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
+ * from application to bootloader when using buttonluss DFU OTA.
+ */
+ NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
+
+ /** Location of bootloader setting in flash. */
+ BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0007F000, LENGTH = 0x1000
+}
+
+
+SECTIONS
+{
+ /* Place the bootloader settings page in flash. */
+ .bootloaderSettings(NOLOAD) :
+ {
+
+ } > BOOTLOADER_SETTINGS
+
+ /* No init RAM section in bootloader. Used for bond information exchange. */
+ .noinit(NOLOAD) :
+ {
+
+ } > NOINIT
}
+SECTIONS
+{
+ .pwr_mgmt_data :
+ {
+ PROVIDE(__start_pwr_mgmt_data = .);
+ KEEP(*(.pwr_mgmt_data))
+ PROVIDE(__stop_pwr_mgmt_data = .);
+ } > FLASH
+} INSERT AFTER .text
+
SECTIONS
{
.fs_data :
diff --git a/ARM/Nordic/src/ble_periph_app.cpp b/ARM/Nordic/src/ble_periph_app.cpp
new file mode 100644
index 00000000..a7b1a4a3
--- /dev/null
+++ b/ARM/Nordic/src/ble_periph_app.cpp
@@ -0,0 +1,811 @@
+/*--------------------------------------------------------------------------
+File : ble_periph_app.cpp
+
+Author : Hoang Nguyen Hoan Dec 26, 2016
+
+Desc : Nordic SDK based BLE peripheral application creation helper
+
+Copyright (c) 2016, I-SYST inc., all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+For info or contributing contact : hnhoan at i-syst dot com
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+
+----------------------------------------------------------------------------*/
+#include
+#include
+#include
+
+#include "nordic_common.h"
+#include "ble_hci.h"
+#include "nrf_error.h"
+#include "nrf_gpio.h"
+#include "ble_advdata.h"
+#include "ble_advertising.h"
+#include "ble_conn_params.h"
+#include "ble_conn_state.h"
+#include "ble_dis.h"
+#include "peer_manager.h"
+#include "softdevice_handler_appsh.h"
+#include "app_timer.h"
+#include "app_util_platform.h"
+#include "app_scheduler.h"
+#include "app_timer_appsh.h"
+#include "app_scheduler.h"
+#include "fds.h"
+#include "fstorage.h"
+#include "nrf_dfu_settings.h"
+#include "custom_board.h"
+//#include "blueio_blesrvc.h"
+#include "istddef.h"
+#include "uart.h"
+#include "custom_board.h"
+#include "iopincfg.h"
+#include "iopinctrl.h"
+#include "ble_periph_app.h"
+
+#define IS_SRVC_CHANGED_CHARACT_PRESENT 0 /**< Include the service_changed characteristic. If not enabled, the server's database cannot be changed for the lifetime of the device. */
+
+#if (NRF_SD_BLE_API_VERSION <= 3)
+ #define NRF_BLE_MAX_MTU_SIZE GATT_MTU_SIZE_DEFAULT /**< MTU size used in the softdevice enabling and to reply to a BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. */
+#else
+ #define NRF_BLE_MAX_MTU_SIZE BLE_GATT_MTU_SIZE_DEFAULT
+#endif
+
+#define APP_FEATURE_NOT_SUPPORTED BLE_GATT_STATUS_ATTERR_APP_BEGIN + 2 /**< Reply when unsupported features are requested. */
+
+#define CENTRAL_LINK_COUNT 0 /**< Number of central links used by the application. When changing this number remember to adjust the RAM settings*/
+#define PERIPHERAL_LINK_COUNT 1 /**< Number of peripheral links used by the application. When changing this number remember to adjust the RAM settings*/
+
+#define APP_ADV_INTERVAL MSEC_TO_UNITS(64, UNIT_0_625_MS) /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */
+#define APP_ADV_TIMEOUT_IN_SECONDS 180 /**< The advertising timeout (in units of seconds). */
+
+//#define APP_TIMER_PRESCALER 0 /**< Value of the RTC1 PRESCALER register. */
+#define APP_TIMER_OP_QUEUE_SIZE 10 /**< Size of timer operation queues. */
+
+#define SCHED_MAX_EVENT_DATA_SIZE sizeof(app_timer_event_t) /**< Maximum size of scheduler events. Note that scheduler BLE stack events do not contain any data, as the events are being pulled from the stack in the event handler. */
+#ifdef SVCALL_AS_NORMAL_FUNCTION
+#define SCHED_QUEUE_SIZE 20 /**< Maximum number of events in the scheduler queue. More is needed in case of Serialization. */
+#else
+#define SCHED_QUEUE_SIZE 10 /**< Maximum number of events in the scheduler queue. */
+#endif
+
+#define MIN_CONN_INTERVAL MSEC_TO_UNITS(20, UNIT_1_25_MS) /**< Minimum acceptable connection interval (20 ms), Connection interval uses 1.25 ms units. */
+#define MAX_CONN_INTERVAL MSEC_TO_UNITS(75, UNIT_1_25_MS) /**< Maximum acceptable connection interval (75 ms), Connection interval uses 1.25 ms units. */
+#define SLAVE_LATENCY 0 /**< Slave latency. */
+#define CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS) /**< Connection supervisory timeout (4 seconds), Supervision Timeout uses 10 ms units. */
+#define FIRST_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(5000, APP_TIMER_PRESCALER) /**< Time from initiating event (connect or start of notification) to first time sd_ble_gap_conn_param_update is called (5 seconds). */
+#define NEXT_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(30000, APP_TIMER_PRESCALER) /**< Time between each call to sd_ble_gap_conn_param_update after the first call (30 seconds). */
+#define MAX_CONN_PARAMS_UPDATE_COUNT 3 /**< Number of attempts before giving up the connection parameter negotiation. */
+
+#define SEC_PARAM_MIN_KEY_SIZE 7 /**< Minimum encryption key size. */
+#define SEC_PARAM_MAX_KEY_SIZE 16 /**< Maximum encryption key size. */
+
+#define DEAD_BEEF 0xDEADBEEF /**< Value used as error code on stack dump, can be used to identify stack location on stack unwind. */
+
+BLEAPP_DATA g_BleAppData = {
+ false, BLE_CONN_HANDLE_INVALID, -1, -1
+};
+
+pm_peer_id_t g_PeerMngrIdToDelete = PM_PEER_ID_INVALID;
+
+static inline void BleConnLedOff() {
+ if (g_BleAppData.ConnLedPort < 0 || g_BleAppData.ConnLedPin < 0)
+ return;
+
+ IOPinSet(g_BleAppData.ConnLedPort, g_BleAppData.ConnLedPin);
+}
+
+static inline void BleConnLedOn() {
+ if (g_BleAppData.ConnLedPort < 0 || g_BleAppData.ConnLedPin < 0)
+ return;
+
+ IOPinClear(g_BleAppData.ConnLedPort, g_BleAppData.ConnLedPin);
+}
+
+void BlePeriphAppDfuCallback(fs_evt_t const * const evt, fs_ret_t result)
+{
+ if (result == FS_SUCCESS)
+ {
+ NVIC_SystemReset();
+ }
+}
+
+void BlePeriphAppEnterDfu()
+{
+ uint32_t err_code = nrf_dfu_flash_init(true);
+
+ nrf_dfu_settings_init();
+
+ s_dfu_settings.enter_buttonless_dfu = true;
+
+ err_code = nrf_dfu_settings_write(BlePeriphAppDfuCallback);
+
+ if (err_code != NRF_SUCCESS)
+ {
+ }
+}
+
+/**@brief Function for assert macro callback.
+ *
+ * @details This function will be called in case of an assert in the SoftDevice.
+ *
+ * @warning This handler is an example only and does not fit a final product. You need to analyse
+ * how your product is supposed to react in case of Assert.
+ * @warning On assert from the SoftDevice, the system can only recover on reset.
+ *
+ * @param[in] line_num Line number of the failing ASSERT call.
+ * @param[in] p_file_name File name of the failing ASSERT call.
+ */
+void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
+{
+ app_error_handler(DEAD_BEEF, line_num, p_file_name);
+}
+
+/**@brief Function for the GAP initialization.
+ *
+ * @details This function will set up all the necessary GAP (Generic Access Profile) parameters of
+ * the device. It also sets the permissions and appearance.
+ */
+static void gap_params_init(const BLEAPP_CFG *pBleAppCfg)
+{
+ uint32_t err_code;
+ ble_gap_conn_params_t gap_conn_params;
+ ble_gap_conn_sec_mode_t sec_mode;
+
+ switch (pBleAppCfg->SecType)
+ {
+ case BLEAPP_SECTYPE_NONE:
+ BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode);
+ break;
+ case BLEAPP_SECTYPE_STATICKEY_NO_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(&sec_mode);
+ break;
+ case BLEAPP_SECTYPE_STATICKEY_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(&sec_mode);
+ break;
+ case BLEAPP_SECTYPE_LESC_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(&sec_mode);
+ break;
+ case BLEAPP_SECTYPE_SIGNED_NO_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(&sec_mode);
+ break;
+ case BLEAPP_SECTYPE_SIGNED_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(&sec_mode);
+ break;
+ }
+
+ err_code = sd_ble_gap_device_name_set(&sec_mode,
+ (const uint8_t *) pBleAppCfg->DevName,
+ strlen(pBleAppCfg->DevName));
+ APP_ERROR_CHECK(err_code);
+
+ memset(&gap_conn_params, 0, sizeof(gap_conn_params));
+
+ gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL;
+ gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL;
+ gap_conn_params.slave_latency = SLAVE_LATENCY;
+ gap_conn_params.conn_sup_timeout = CONN_SUP_TIMEOUT;
+
+ err_code = sd_ble_gap_ppcp_set(&gap_conn_params);
+ APP_ERROR_CHECK(err_code);
+}
+
+/**@brief Function for handling an event from the Connection Parameters Module.
+ *
+ * @details This function will be called for all events in the Connection Parameters Module
+ * which are passed to the application.
+ *
+ * @note All this function does is to disconnect. This could have been done by simply setting
+ * the disconnect_on_fail config parameter, but instead we use the event handler
+ * mechanism to demonstrate its use.
+ *
+ * @param[in] p_evt Event received from the Connection Parameters Module.
+ */
+static void on_conn_params_evt(ble_conn_params_evt_t * p_evt)
+{
+ uint32_t err_code;
+
+ if (p_evt->evt_type == BLE_CONN_PARAMS_EVT_FAILED)
+ {
+ err_code = sd_ble_gap_disconnect(g_BleAppData.ConnHdl, BLE_HCI_CONN_INTERVAL_UNACCEPTABLE);
+ APP_ERROR_CHECK(err_code);
+ }
+}
+
+
+/**@brief Function for handling errors from the Connection Parameters module.
+ *
+ * @param[in] nrf_error Error code containing information about what went wrong.
+ */
+static void conn_params_error_handler(uint32_t nrf_error)
+{
+ APP_ERROR_HANDLER(nrf_error);
+}
+
+
+/**@brief Function for initializing the Connection Parameters module.
+ */
+static void conn_params_init(void)
+{
+ uint32_t err_code;
+ ble_conn_params_init_t cp_init;
+
+ memset(&cp_init, 0, sizeof(cp_init));
+
+ cp_init.p_conn_params = NULL;
+ cp_init.first_conn_params_update_delay = FIRST_CONN_PARAMS_UPDATE_DELAY;
+ cp_init.next_conn_params_update_delay = NEXT_CONN_PARAMS_UPDATE_DELAY;
+ cp_init.max_conn_params_update_count = MAX_CONN_PARAMS_UPDATE_COUNT;
+ cp_init.start_on_notify_cccd_handle = BLE_GATT_HANDLE_INVALID;
+ cp_init.disconnect_on_fail = false;
+ cp_init.evt_handler = on_conn_params_evt;
+ cp_init.error_handler = conn_params_error_handler;
+
+ err_code = ble_conn_params_init(&cp_init);
+ APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for putting the chip into sleep mode.
+ *
+ * @note This function will not return.
+ */
+static void sleep_mode_enter(void)
+{
+ // Prepare wakeup buttons.
+// err_code = bsp_btn_ble_sleep_mode_prepare();
+// APP_ERROR_CHECK(err_code);
+
+ // Go to system-off mode (this function will not return; wakeup will cause a reset).
+ uint32_t err_code = sd_power_system_off();
+ APP_ERROR_CHECK(err_code);
+}
+
+/**@brief Function for handling advertising events.
+ *
+ * @details This function will be called for advertising events which are passed to the application.
+ *
+ * @param[in] ble_adv_evt Advertising event.
+ */
+static void on_adv_evt(ble_adv_evt_t ble_adv_evt)
+{
+ uint32_t err_code;
+
+ switch (ble_adv_evt)
+ {
+ case BLE_ADV_EVT_FAST:
+// err_code = bsp_indication_set(BSP_INDICATE_ADVERTISING);
+// APP_ERROR_CHECK(err_code);
+ break;
+ case BLE_ADV_EVT_IDLE:
+ // sleep_mode_enter();
+ break;
+ default:
+ break;
+ }
+}
+
+/**@brief Function for the application's SoftDevice event handler.
+ *
+ * @param[in] p_ble_evt SoftDevice event.
+ */
+static void on_ble_evt(ble_evt_t * p_ble_evt)
+{
+ uint32_t err_code;
+
+ switch (p_ble_evt->header.evt_id)
+ {
+ case BLE_GAP_EVT_CONNECTED:
+ BleConnLedOn();
+ g_BleAppData.ConnHdl = p_ble_evt->evt.gap_evt.conn_handle;
+ break;
+
+ case BLE_GAP_EVT_DISCONNECTED:
+ BleConnLedOff();
+ g_BleAppData.ConnHdl = BLE_CONN_HANDLE_INVALID;
+ break;
+
+ case BLE_GAP_EVT_PASSKEY_DISPLAY:
+ {
+ //char passkey[8 + 1];
+ //memcpy(passkey, p_ble_evt->evt.gap_evt.params.passkey_display.passkey, 8);
+ //passkey[8] = 0;
+ // Don't send delayed Security Request if security procedure is already in progress.
+ // err_code = app_timer_stop(m_sec_req_timer_id);
+ // APP_ERROR_CHECK(err_code);
+
+ //g_Uart.printf("Passkey: %s\r\n", passkey);
+ } break; // BLE_GAP_EVT_PASSKEY_DISPLAY
+
+ case BLE_GATTS_EVT_SYS_ATTR_MISSING:
+ // No system attributes have been stored.
+ //err_code = sd_ble_gatts_sys_attr_set(g_ConnHdl, NULL, 0, 0);
+ //APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTS_EVT_SYS_ATTR_MISSING
+
+ case BLE_GATTC_EVT_TIMEOUT:
+ // Disconnect on GATT Client timeout event.
+ err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gattc_evt.conn_handle,
+ BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTC_EVT_TIMEOUT
+
+ case BLE_GATTS_EVT_TIMEOUT:
+ // Disconnect on GATT Server timeout event.
+ err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gatts_evt.conn_handle,
+ BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTS_EVT_TIMEOUT
+
+ // case BLE_EVT_USER_MEM_REQUEST:
+ // err_code = sd_ble_user_mem_reply(p_ble_evt->evt.gattc_evt.conn_handle, NULL);
+ // APP_ERROR_CHECK(err_code);
+ // break; // BLE_EVT_USER_MEM_REQUEST
+
+ case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST:
+ {
+ ble_gatts_evt_rw_authorize_request_t req;
+ ble_gatts_rw_authorize_reply_params_t auth_reply;
+
+ req = p_ble_evt->evt.gatts_evt.params.authorize_request;
+
+ if (req.type != BLE_GATTS_AUTHORIZE_TYPE_INVALID)
+ {
+ if ((req.request.write.op == BLE_GATTS_OP_PREP_WRITE_REQ) ||
+ (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_NOW) ||
+ (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL))
+ {
+ if (req.type == BLE_GATTS_AUTHORIZE_TYPE_WRITE)
+ {
+ auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_WRITE;
+ }
+ else
+ {
+ auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_READ;
+ }
+ auth_reply.params.write.gatt_status = APP_FEATURE_NOT_SUPPORTED;
+ err_code = sd_ble_gatts_rw_authorize_reply(p_ble_evt->evt.gatts_evt.conn_handle,
+ &auth_reply);
+ APP_ERROR_CHECK(err_code);
+ }
+ }
+ } break; // BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST
+
+#if (NRF_SD_BLE_API_VERSION >= 3)
+ case BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST:
+ err_code = sd_ble_gatts_exchange_mtu_reply(p_ble_evt->evt.gatts_evt.conn_handle,
+ NRF_BLE_MAX_MTU_SIZE);
+ APP_ERROR_CHECK(err_code);
+ break; // BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST
+#endif
+
+ default:
+ // No implementation needed.
+ break;
+ }
+}
+
+/**@brief Function for handling Peer Manager events.
+ *
+ * @param[in] p_evt Peer Manager event.
+ */
+static void pm_evt_handler(pm_evt_t const * p_evt)
+{
+ ret_code_t err_code;
+
+ switch (p_evt->evt_id)
+ {
+ case PM_EVT_BONDED_PEER_CONNECTED:
+ {
+ // Start Security Request timer.
+ //err_code = app_timer_start(g_SecReqTimerId, SECURITY_REQUEST_DELAY, NULL);
+ //APP_ERROR_CHECK(err_code);
+ } break;
+
+ case PM_EVT_CONN_SEC_SUCCEEDED:
+ {
+ pm_conn_sec_status_t conn_sec_status;
+
+ // Check if the link is authenticated (meaning at least MITM).
+ err_code = pm_conn_sec_status_get(p_evt->conn_handle, &conn_sec_status);
+ APP_ERROR_CHECK(err_code);
+
+ if (conn_sec_status.mitm_protected)
+ {
+ }
+ else
+ {
+ // The peer did not use MITM, disconnect.
+ err_code = pm_peer_id_get(g_BleAppData.ConnHdl, &g_PeerMngrIdToDelete);
+ APP_ERROR_CHECK(err_code);
+ err_code = sd_ble_gap_disconnect(g_BleAppData.ConnHdl,
+ BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+ APP_ERROR_CHECK(err_code);
+ }
+ } break;
+
+ case PM_EVT_CONN_SEC_FAILED:
+ {
+ err_code = sd_ble_gap_disconnect(g_BleAppData.ConnHdl,
+ BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+ APP_ERROR_CHECK(err_code);
+ } break;
+
+ case PM_EVT_CONN_SEC_CONFIG_REQ:
+ {
+ // Reject pairing request from an already bonded peer.
+ pm_conn_sec_config_t conn_sec_config = {.allow_repairing = false};
+ pm_conn_sec_config_reply(p_evt->conn_handle, &conn_sec_config);
+ } break;
+
+ case PM_EVT_STORAGE_FULL:
+ {
+ // Run garbage collection on the flash.
+ err_code = fds_gc();
+ if (err_code == FDS_ERR_BUSY || err_code == FDS_ERR_NO_SPACE_IN_QUEUES)
+ {
+ // Retry.
+ }
+ else
+ {
+ APP_ERROR_CHECK(err_code);
+ }
+ } break;
+
+ case PM_EVT_PEERS_DELETE_SUCCEEDED:
+ {
+ ble_advertising_start(BLE_ADV_MODE_FAST);
+ } break;
+
+ case PM_EVT_LOCAL_DB_CACHE_APPLY_FAILED:
+ {
+ // The local database has likely changed, send service changed indications.
+ pm_local_database_has_changed();
+ } break;
+
+ case PM_EVT_PEER_DATA_UPDATE_FAILED:
+ {
+ // Assert.
+ APP_ERROR_CHECK(p_evt->params.peer_data_update_failed.error);
+ } break;
+
+ case PM_EVT_PEER_DELETE_FAILED:
+ {
+ // Assert.
+ APP_ERROR_CHECK(p_evt->params.peer_delete_failed.error);
+ } break;
+
+ case PM_EVT_PEERS_DELETE_FAILED:
+ {
+ // Assert.
+ APP_ERROR_CHECK(p_evt->params.peers_delete_failed_evt.error);
+ } break;
+
+ case PM_EVT_ERROR_UNEXPECTED:
+ {
+ // Assert.
+ APP_ERROR_CHECK(p_evt->params.error_unexpected.error);
+ } break;
+
+ case PM_EVT_CONN_SEC_START:
+ case PM_EVT_PEER_DATA_UPDATE_SUCCEEDED:
+ case PM_EVT_PEER_DELETE_SUCCEEDED:
+ case PM_EVT_LOCAL_DB_CACHE_APPLIED:
+ case PM_EVT_SERVICE_CHANGED_IND_SENT:
+ case PM_EVT_SERVICE_CHANGED_IND_CONFIRMED:
+ default:
+ break;
+ }
+}
+
+/**@brief Function for dispatching a SoftDevice event to all modules with a SoftDevice
+ * event handler.
+ *
+ * @details This function is called from the SoftDevice event interrupt handler after a
+ * SoftDevice event has been received.
+ *
+ * @param[in] p_ble_evt SoftDevice event.
+ */
+static void ble_evt_dispatch(ble_evt_t * p_ble_evt)
+{
+ ble_conn_state_on_ble_evt(p_ble_evt);
+ pm_on_ble_evt(p_ble_evt);
+ BlePeriphAppEvtDispatch(p_ble_evt);
+ ble_conn_params_on_ble_evt(p_ble_evt);
+ on_ble_evt(p_ble_evt);
+ ble_advertising_on_ble_evt(p_ble_evt);
+}
+
+/**@brief Function for dispatching a system event to interested modules.
+ *
+ * @details This function is called from the System event interrupt handler after a system
+ * event has been received.
+ *
+ * @param[in] sys_evt System stack event.
+ */
+static void sys_evt_dispatch(uint32_t sys_evt)
+{
+ // Dispatch the system event to the fstorage module, where it will be
+ // dispatched to the Flash Data Storage (FDS) module.
+ fs_sys_event_handler(sys_evt);
+
+ // Dispatch to the Advertising module last, since it will check if there are any
+ // pending flash operations in fstorage. Let fstorage process system events first,
+ // so that it can report correctly to the Advertising module.
+ ble_advertising_on_sys_evt(sys_evt);
+}
+
+
+
+/**@brief Function for the Peer Manager initialization.
+ *
+ * @param[in] erase_bonds Indicates whether bonding information should be cleared from
+ * persistent storage during initialization of the Peer Manager.
+ */
+static void BlePeriphAppPeerMngrInit(BLEAPP_SECTYPE SecType, uint8_t SecKeyExchg, bool bEraseBond)
+{
+ ble_gap_sec_params_t sec_param;
+ ret_code_t err_code;
+
+ err_code = pm_init();
+ APP_ERROR_CHECK(err_code);
+
+ if (bEraseBond)
+ {
+ err_code = pm_peers_delete();
+ APP_ERROR_CHECK(err_code);
+ }
+
+ memset(&sec_param, 0, sizeof(ble_gap_sec_params_t));
+
+ sec_param.bond = 1;
+ sec_param.min_key_size = SEC_PARAM_MIN_KEY_SIZE;
+ sec_param.max_key_size = SEC_PARAM_MAX_KEY_SIZE;
+ sec_param.kdist_own.enc = 1;
+ sec_param.kdist_own.id = 1;
+ sec_param.kdist_peer.enc = 1;
+ sec_param.kdist_peer.id = 1;
+
+ switch (SecType)
+ {
+ case BLEAPP_SECTYPE_NONE:
+ break;
+ case BLEAPP_SECTYPE_STATICKEY_NO_MITM:
+ break;
+ case BLEAPP_SECTYPE_STATICKEY_MITM:
+ break;
+ case BLEAPP_SECTYPE_LESC_MITM:
+ sec_param.mitm = 1;
+ sec_param.lesc = 1;
+ break;
+ case BLEAPP_SECTYPE_SIGNED_NO_MITM:
+ break;
+ case BLEAPP_SECTYPE_SIGNED_MITM:
+ break;
+ }
+
+ if (SecType == BLEAPP_SECTYPE_STATICKEY_MITM ||
+ SecType == BLEAPP_SECTYPE_LESC_MITM ||
+ SecType == BLEAPP_SECTYPE_SIGNED_MITM)
+ {
+ sec_param.mitm = 1;
+ }
+
+ int type = SecKeyExchg & (BLEAPP_SECEXCHG_KEYBOARD | BLEAPP_SECEXCHG_DISPLAY);
+ switch (type)
+ {
+ case BLEAPP_SECEXCHG_KEYBOARD:
+ sec_param.keypress = 1;
+ sec_param.io_caps = BLE_GAP_IO_CAPS_KEYBOARD_ONLY;
+ break;
+ case BLEAPP_SECEXCHG_DISPLAY:
+ sec_param.io_caps = BLE_GAP_IO_CAPS_DISPLAY_ONLY;
+ break;
+ case (BLEAPP_SECEXCHG_KEYBOARD | BLEAPP_SECEXCHG_DISPLAY):
+ sec_param.keypress = 1;
+ sec_param.io_caps = BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY;
+ break;
+ }
+
+ if (SecKeyExchg & BLEAPP_SECEXCHG_OOB)
+ {
+ sec_param.oob = 1;
+ }
+
+ err_code = pm_sec_params_set(&sec_param);
+ APP_ERROR_CHECK(err_code);
+
+ err_code = pm_register(pm_evt_handler);
+ APP_ERROR_CHECK(err_code);
+}
+
+/**@brief Function for handling the Security Request timer timeout.
+ *
+ * @details This function will be called each time the Security Request timer expires.
+ *
+ * @param[in] p_context Pointer used for passing some arbitrary information (context) from the
+ * app_start_timer() call to the timeout handler.
+ */
+static void sec_req_timeout_handler(void * p_context)
+{
+ uint32_t err_code;
+
+ if (g_BleAppData.ConnHdl != BLE_CONN_HANDLE_INVALID)
+ {
+ // Initiate bonding.
+ //NRF_LOG_DEBUG("Start encryption\r\n");
+ err_code = pm_conn_secure(g_BleAppData.ConnHdl, false);
+ if (err_code != NRF_ERROR_INVALID_STATE)
+ {
+ APP_ERROR_CHECK(err_code);
+ }
+ }
+}
+
+/**@brief Function for initializing the Advertising functionality.
+ */
+void BlePeriphAppAdvInit(const BLEAPP_CFG *pCfg)
+{
+ uint32_t err_code;
+ ble_advdata_t advdata;
+ ble_advdata_t scanrsp;
+ ble_adv_modes_config_t options;
+ ble_advdata_manuf_data_t mdata;
+
+ mdata.company_identifier = pCfg->CompanyID;
+ mdata.data.p_data = (uint8_t*)pCfg->pManData;
+ mdata.data.size = pCfg->ManDataLen;
+
+ // Build advertising data struct to pass into @ref ble_advertising_init.
+ memset(&advdata, 0, sizeof(advdata));
+ advdata.name_type = BLE_ADVDATA_FULL_NAME;
+ advdata.include_appearance = false;
+ advdata.flags = BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE;
+ advdata.p_manuf_specific_data = &mdata;
+
+ memset(&scanrsp, 0, sizeof(scanrsp));
+ scanrsp.uuids_complete.uuid_cnt = pCfg->NbAdvUuid;
+ scanrsp.uuids_complete.p_uuids = (ble_uuid_t*)pCfg->pAdvUuids;
+
+ memset(&options, 0, sizeof(options));
+ options.ble_adv_fast_enabled = true;
+ options.ble_adv_fast_interval = pCfg->AdvInterval;
+ options.ble_adv_fast_timeout = pCfg->AdvTimeout;
+
+ err_code = ble_advertising_init(&advdata, &scanrsp, &options, on_adv_evt, NULL);
+ APP_ERROR_CHECK(err_code);
+}
+
+/**@brief Function for the SoftDevice initialization.
+ *
+ * @details This function initializes the SoftDevice and the BLE event interrupt.
+ */
+void BlePeriphAppInit(const BLEAPP_CFG *pBleAppCfg, bool bEraseBond)
+{
+ uint32_t err_code;
+ nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC;
+
+
+ if (pBleAppCfg->ConnLedPort != -1 && pBleAppCfg->ConnLedPin != -1)
+ {
+ IOPinConfig(pBleAppCfg->ConnLedPort, pBleAppCfg->ConnLedPin, 0,
+ IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL);
+ }
+
+ switch (pBleAppCfg->AppMode)
+ {
+ case BLEAPP_MODE_LOOP:
+ g_BleAppData.bAppSched = false;
+
+ break;
+ case BLEAPP_MODE_APPSCHED:
+ g_BleAppData.bAppSched = true;
+
+ APP_SCHED_INIT(SCHED_MAX_EVENT_DATA_SIZE, SCHED_QUEUE_SIZE);
+ break;
+ case BLEAPP_MODE_RTOS:
+ g_BleAppData.bAppSched = false;
+
+ break;
+ }
+
+ APP_TIMER_APPSH_INIT(APP_TIMER_PRESCALER, APP_TIMER_OP_QUEUE_SIZE, g_BleAppData.bAppSched);
+ // Initialize SoftDevice.
+ SOFTDEVICE_HANDLER_APPSH_INIT(&clock_lf_cfg, g_BleAppData.bAppSched);
+
+ ble_enable_params_t ble_enable_params;
+ err_code = softdevice_enable_get_default_config(CENTRAL_LINK_COUNT,
+ PERIPHERAL_LINK_COUNT,
+ &ble_enable_params);
+ APP_ERROR_CHECK(err_code);
+
+ //Check the ram settings against the used number of links
+ CHECK_RAM_START_ADDR(CENTRAL_LINK_COUNT,PERIPHERAL_LINK_COUNT);
+
+ // Enable BLE stack.
+#if (NRF_SD_BLE_API_VERSION >= 3)
+ ble_enable_params.gatt_enable_params.att_mtu = NRF_BLE_MAX_MTU_SIZE;
+#endif
+ err_code = softdevice_enable(&ble_enable_params);
+ APP_ERROR_CHECK(err_code);
+
+ // Subscribe for BLE events.
+ err_code = softdevice_ble_evt_handler_set(ble_evt_dispatch);
+ APP_ERROR_CHECK(err_code);
+
+ err_code = softdevice_sys_evt_handler_set(sys_evt_dispatch);
+ APP_ERROR_CHECK(err_code);
+
+ BlePeriphAppPeerMngrInit(pBleAppCfg->SecType, pBleAppCfg->SecExchg, bEraseBond);
+
+ gap_params_init(pBleAppCfg);
+
+ BlePeriphAppInitServices();
+
+ ble_dis_init_t dis_init;
+ ble_dis_sys_id_t sys_id;
+
+ // Initialize Device Information Service.
+ memset(&dis_init, 0, sizeof(dis_init));
+
+ ble_srv_ascii_to_utf8(&dis_init.manufact_name_str, (char*)pBleAppCfg->ManName);
+ ble_srv_ascii_to_utf8(&dis_init.model_num_str, (char*)pBleAppCfg->ModelName);
+
+ sys_id.manufacturer_id = pBleAppCfg->CompanyID;
+ sys_id.organizationally_unique_id = pBleAppCfg->CompanyID;
+ dis_init.p_sys_id = &sys_id;
+
+ BLE_GAP_CONN_SEC_MODE_SET_OPEN(&dis_init.dis_attr_md.read_perm);
+ BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(&dis_init.dis_attr_md.write_perm);
+
+ err_code = ble_dis_init(&dis_init);
+ APP_ERROR_CHECK(err_code);
+
+ BlePeriphAppAdvInit(pBleAppCfg);
+
+ conn_params_init();
+
+
+
+}
+
+void BlePeriphAppRun()
+{
+ uint32_t err_code = ble_advertising_start(BLE_ADV_MODE_FAST);
+
+ APP_ERROR_CHECK(err_code);
+
+
+ while (1)
+ {
+ if (g_BleAppData.bAppSched == true)
+ {
+ app_sched_execute();
+ }
+ sd_app_evt_wait();
+ }
+}
+
+
+
+
diff --git a/ARM/Nordic/src/blueio_blesrvc.c b/ARM/Nordic/src/blueio_blesrvc.c
new file mode 100755
index 00000000..2ba2e778
--- /dev/null
+++ b/ARM/Nordic/src/blueio_blesrvc.c
@@ -0,0 +1,258 @@
+/*--------------------------------------------------------------------------
+File : blueio_blesrvc.c
+
+Author : Hoang Nguyen Hoan Mar. 25, 2014
+
+Desc : Implementation allow the creation of generic custom Bluetooth Smart
+ service with 2 characteristics.
+ Read characteristics
+ Write characteristics
+
+Copyright (c) 2014, I-SYST inc., all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+For info or contributing contact : hnhoan at i-syst dot com
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+
+----------------------------------------------------------------------------*/
+#include
+#include
+#include "nordic_common.h"
+
+#include "blueio_blesrvc.h"
+
+uint16_t BlueIOBleSrvcCharSend(BLUEIOSRVC *pSrvc, uint8_t *pData, uint16_t DataLen)
+{
+ ble_gatts_hvx_params_t params;
+
+ memset(¶ms, 0, sizeof(params));
+ params.type = BLE_GATT_HVX_NOTIFICATION;
+ params.handle = pSrvc->RdCharHdl.value_handle;
+ params.p_data = pData;
+ params.p_len = &DataLen;
+
+ if (sd_ble_gatts_hvx(pSrvc->ConnHdl, ¶ms) == NRF_SUCCESS)
+ return DataLen;
+
+ return 0;
+}
+
+
+void BlueIOBleSvcEvtHandler(BLUEIOSRVC *pSrvc, ble_evt_t *pBleEvt)
+{
+ switch (pBleEvt->header.evt_id)
+ {
+ case BLE_GAP_EVT_CONNECTED:
+ pSrvc->ConnHdl = pBleEvt->evt.gap_evt.conn_handle;
+ break;
+
+ case BLE_GAP_EVT_DISCONNECTED:
+ pSrvc->ConnHdl = BLE_CONN_HANDLE_INVALID;
+ break;
+
+ case BLE_GATTS_EVT_WRITE:
+ {
+ ble_gatts_evt_write_t * p_evt_write = &pBleEvt->evt.gatts_evt.params.write;
+
+ if ((p_evt_write->handle == pSrvc->RdCharHdl.cccd_handle) &&
+ (p_evt_write->len == 2))
+ {
+ if (ble_srv_is_notification_enabled(p_evt_write->data))
+ {
+ pSrvc->bNotify = true;
+ }
+ else
+ {
+ pSrvc->bNotify = false;
+ }
+ }
+ else if ((p_evt_write->handle == pSrvc->WrCharHdl.value_handle) &&
+ (pSrvc->WrCB != NULL))
+ {
+ pSrvc->WrCB(pSrvc, p_evt_write->data, 0, p_evt_write->len);
+ }
+ else
+ {
+ // Do Nothing. This event is not relevant for this service.
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+}
+
+static void BlueIOBleSrvcEncSec(ble_gap_conn_sec_mode_t *pSecMode, BLUEIOSRVC_SECTYPE SecType)
+{
+ switch (SecType)
+ {
+ case BLUEIOSRVC_SECTYPE_STATICKEY_NO_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(pSecMode);
+ break;
+ case BLUEIOSRVC_SECTYPE_STATICKEY_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(pSecMode);
+ break;
+ case BLUEIOSRVC_SECTYPE_LESC_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(pSecMode);
+ break;
+ case BLUEIOSRVC_SECTYPE_SIGNED_NO_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(pSecMode);
+ break;
+ case BLUEIOSRVC_SECTYPE_SIGNED_MITM:
+ BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(pSecMode);
+ break;
+ case BLUEIOSRVC_SECTYPE_NONE:
+ default:
+ BLE_GAP_CONN_SEC_MODE_SET_OPEN(pSecMode);
+ break;
+ }
+}
+
+/**@brief Add control characteristic.
+ *
+ * @param[in] p_blueios LEDButton Service structure.
+ * @param[in] p_iodata_init Information needed to initialize the service.
+ *
+ * @return NRF_SUCCESS on success, otherwise an error code.
+ */
+static uint32_t BlueIOBleSrvcCharAdd(BLUEIOSRVC *pSvc, uint16_t CharUuid,
+ int MaxDataLen, uint32_t CharProp, const char *pDesc,
+ ble_gatts_char_handles_t *pCharHdl, BLUEIOSRVC_SECTYPE SecType)
+{
+ ble_gatts_char_md_t char_md;
+ ble_gatts_attr_md_t cccd_md;
+ ble_gatts_attr_t attr_char_value;
+ ble_uuid_t ble_uuid;
+ ble_gatts_attr_md_t attr_md;
+
+ memset(&cccd_md, 0, sizeof(cccd_md));
+ memset(&attr_md, 0, sizeof(attr_md));
+ memset(&char_md, 0, sizeof(char_md));
+
+ cccd_md.vloc = BLE_GATTS_VLOC_STACK;
+
+ char_md.p_char_user_desc = (uint8_t*)pDesc;
+ if (pDesc != NULL)
+ char_md.char_user_desc_max_size = strlen(pDesc) + 1;
+ char_md.p_char_pf = NULL;
+ char_md.p_user_desc_md = NULL;
+ char_md.p_cccd_md = NULL;
+ char_md.p_sccd_md = NULL;
+
+ if (CharProp & BLUEIOSVC_CHAR_PROP_NOTIFY)
+ {
+ char_md.char_props.notify = 1;
+ BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.read_perm);
+ BlueIOBleSrvcEncSec(&cccd_md.write_perm, SecType);
+ BlueIOBleSrvcEncSec(&attr_md.read_perm, SecType);
+ char_md.p_cccd_md = &cccd_md;
+ }
+
+ if (CharProp & BLUEIOSVC_CHAR_PROP_READ)
+ {
+ char_md.char_props.read = 1;
+ BlueIOBleSrvcEncSec(&attr_md.read_perm, SecType);
+ BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(&attr_md.write_perm);
+ }
+
+ if (CharProp & BLUEIOSVC_CHAR_PROP_WRITE)
+ {
+ char_md.char_props.write = 1;
+ BlueIOBleSrvcEncSec(&attr_md.write_perm, SecType);
+ BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(&attr_md.read_perm);
+ }
+
+ if (CharProp & BLUEIOSVC_CHAR_PROP_WRITEWORESP)
+ {
+ char_md.char_props.write_wo_resp = 1;
+ BlueIOBleSrvcEncSec(&attr_md.write_perm, SecType);
+ BlueIOBleSrvcEncSec(&attr_md.read_perm, SecType);
+ }
+
+ ble_uuid.type = pSvc->UuidType;
+ ble_uuid.uuid = CharUuid;
+
+
+
+ attr_md.vloc = BLE_GATTS_VLOC_STACK;
+ attr_md.rd_auth = 0;
+ attr_md.wr_auth = 0;
+ attr_md.vlen = 1; // Variable length
+
+ memset(&attr_char_value, 0, sizeof(attr_char_value));
+
+ attr_char_value.p_uuid = &ble_uuid;
+ attr_char_value.p_attr_md = &attr_md;
+ attr_char_value.init_len = 0;
+ attr_char_value.init_offs = 0;
+ attr_char_value.max_len = MaxDataLen;
+ attr_char_value.p_value = NULL;
+
+ return sd_ble_gatts_characteristic_add(pSvc->SvcHdl, &char_md, &attr_char_value, pCharHdl);
+}
+
+uint32_t BlueIOBleSrvcInit(BLUEIOSRVC *pSvc, const BLUEIOSRVC_CFG *pCfg)
+{
+ uint32_t err;
+ ble_uuid_t ble_uuid;
+
+ // Initialize service structure
+ pSvc->ConnHdl = BLE_CONN_HANDLE_INVALID;
+ pSvc->WrCB = pCfg->WrCB;
+
+ // Add base UUID to softdevice's internal list.
+ err = sd_ble_uuid_vs_add(&pCfg->UuidBase, &pSvc->UuidType);
+ if (err != NRF_SUCCESS)
+ {
+ return err;
+ }
+
+ ble_uuid.type = pSvc->UuidType;
+ ble_uuid.uuid = pCfg->UuidSvc;
+
+ err = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY, &ble_uuid, &pSvc->SvcHdl);
+ if (err != NRF_SUCCESS)
+ {
+ return err;
+ }
+
+ err = BlueIOBleSrvcCharAdd(pSvc, pCfg->UuidWrChar, pCfg->WrCharMaxLen,
+ pCfg->WrCharProp, pCfg->pWrCharDesc,
+ &pSvc->WrCharHdl, pCfg->SecType);
+ if (err != NRF_SUCCESS)
+ {
+ return err;
+ }
+
+ err = BlueIOBleSrvcCharAdd(pSvc, pCfg->UuidRdChar, pCfg->RdCharMaxLen,
+ pCfg->RdCharProp, pCfg->pRdCharDesc,
+ &pSvc->RdCharHdl, pCfg->SecType);
+ if (err != NRF_SUCCESS)
+ {
+ return err;
+ }
+
+ return NRF_SUCCESS;
+}
+
+
diff --git a/ARM/Nordic/src/blueio_svc.c b/ARM/Nordic/src/blueio_svc.c
deleted file mode 100755
index cfa475cd..00000000
--- a/ARM/Nordic/src/blueio_svc.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/*--------------------------------------------------------------------------
-File : BlueIOBLEService.c
-
-Author : Hoang Nguyen Hoan Mar. 25, 2014
-
-Desc : Bluetooth Low Energy BlueIO Services implementation
-
-Copyright (c) 2014, I-SYST inc., all rights reserved
-
-Permission to use, copy, modify, and distribute this software for any purpose
-with or without fee is hereby granted, provided that the above copyright
-notice and this permission notice appear in all copies, and none of the
-names : I-SYST or its contributors may be used to endorse or
-promote products derived from this software without specific prior written
-permission.
-
-For info or contributing contact : hnhoan at i-syst dot com
-
-THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-----------------------------------------------------------------------------
-Modified by Date Description
-
-----------------------------------------------------------------------------*/
-#include
-#include
-#include "nordic_common.h"
-#include "nrf_gpio.h"
-
-#include "blueio_svc.h"
-
-
-//uint8_t g_GatWriteBuff[512];
-
-/**@brief Connect event handler.
- *
- * @param[in] p_blueios EkoCC Service structure.
- * @param[in] p_ble_evt Event received from the BLE stack.
- */
-/*static void on_connect(ble_blueios_t * p_blueios, ble_evt_t * p_ble_evt)
-{
- p_blueios->conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
-}*/
-
-
-/**@brief Disconnect event handler.
- *
- * @param[in] p_blueios LEDButton Service structure.
- * @param[in] p_ble_evt Event received from the BLE stack.
- */
-/*static void on_disconnect(ble_blueios_t * p_blueios, ble_evt_t * p_ble_evt)
-{
- UNUSED_PARAMETER(p_ble_evt);
- p_blueios->conn_handle = BLE_CONN_HANDLE_INVALID;
-}
-*/
-
-
-/*
-void ble_blueios_on_ble_evt(ble_blueios_t * p_blueios, ble_evt_t * p_ble_evt)
-{
- switch (p_ble_evt->header.evt_id)
- {
- case BLE_GAP_EVT_CONNECTED:
- on_connect(p_blueios, p_ble_evt);
- break;
-
- case BLE_GAP_EVT_DISCONNECTED:
- on_disconnect(p_blueios, p_ble_evt);
- break;
-
- case BLE_GATTS_EVT_WRITE:
- on_write(p_blueios, p_ble_evt);
- break;
-
- default:
- break;
- }
-}
-
-*/
-
-
-/**@brief Add control characteristic.
- *
- * @param[in] p_blueios LEDButton Service structure.
- * @param[in] p_iodata_init Information needed to initialize the service.
- *
- * @return NRF_SUCCESS on success, otherwise an error code.
- */
-static uint32_t BlueIOSvcCharAdd(BLUEIOSVC *pSvc, uint16_t CharUuid,
- int MaxDataLen, ble_gatts_char_md_t *pCharMd,
- ble_gatts_char_handles_t *pCharHdl)
-{
- ble_gatts_char_md_t char_md;
- ble_gatts_attr_md_t cccd_md;
- ble_gatts_attr_t attr_char_value;
- ble_uuid_t ble_uuid;
- ble_gatts_attr_md_t attr_md;
-
- memset(&cccd_md, 0, sizeof(cccd_md));
-
- BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.read_perm);
- BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.write_perm);
-
- cccd_md.vloc = BLE_GATTS_VLOC_STACK;
-
- memcpy(&char_md, pCharMd, sizeof(char_md));
-/*
- if (CharProp & BLUEIOSVC_CHAR_PROP_READ)
- char_md.char_props.read = 1;
- if (CharProp & BLUEIOSVC_CHAR_PROP_WRITE)
- char_md.char_props.write = 1;
- if (CharProp & BLUEIOSVC_CHAR_PROP_NOTIFY)
- char_md.char_props.notify = 1;
- if (CharProp & BLUEIOSVC_CHAR_PROP_WRITEWORESP)
- char_md.char_props.write_wo_resp = 1;
-
- char_md.p_char_user_desc = NULL;//"input report";
- char_md.p_char_pf = NULL;//"xxxx";
- char_md.p_user_desc_md = NULL;//&cccd_md;
-*/
- char_md.p_cccd_md = &cccd_md;
- char_md.p_sccd_md = NULL;
-
- ble_uuid.type = pSvc->UuidType;
- ble_uuid.uuid = CharUuid;
-
- memset(&attr_md, 0, sizeof(attr_md));
-
- BLE_GAP_CONN_SEC_MODE_SET_OPEN(&attr_md.read_perm);
- BLE_GAP_CONN_SEC_MODE_SET_OPEN(&attr_md.write_perm);
-
- attr_md.vloc = BLE_GATTS_VLOC_STACK;
- attr_md.rd_auth = 0;
- attr_md.wr_auth = 0;
- attr_md.vlen = 0;
-
- memset(&attr_char_value, 0, sizeof(attr_char_value));
-
- attr_char_value.p_uuid = &ble_uuid;
- attr_char_value.p_attr_md = &attr_md;
- attr_char_value.init_len = 0;
- attr_char_value.init_offs = 0;
- attr_char_value.max_len = MaxDataLen;
- attr_char_value.p_value = NULL;
-
- return sd_ble_gatts_characteristic_add(pSvc->SvcHdl, &char_md, &attr_char_value, pCharHdl);
-}
-/*
-static uint32_t DataCharAdd(BLUEIOSVC *pSvc, const BLUEIOSVC_CFG *pCfg)
-{
- ble_gatts_char_md_t char_md;
- ble_gatts_attr_md_t cccd_md;
- ble_gatts_attr_t attr_char_value;
- ble_uuid_t ble_uuid;
- ble_gatts_attr_md_t attr_md;
-
-
- memset(&cccd_md, 0, sizeof(cccd_md));
-
- BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.read_perm);
- BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.write_perm);
-
- cccd_md.vloc = BLE_GATTS_VLOC_STACK;
-
- memset(&char_md, 0, sizeof(char_md));
-
- char_md.char_props.read = 1;
- char_md.char_props.write = 0;
- char_md.char_props.notify = 1;
- char_md.char_props.write_wo_resp = 1;
- char_md.p_char_user_desc = NULL;//"input report";
- char_md.p_char_pf = NULL;//"xxxx";
- char_md.p_user_desc_md = NULL;//&cccd_md;
- char_md.p_cccd_md = &cccd_md;
- char_md.p_sccd_md = NULL;
-
- ble_uuid.type = pSvc->UuidType;
- ble_uuid.uuid = pCfg->UuidDataChar;
-
- memset(&attr_md, 0, sizeof(attr_md));
-
- BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(&attr_md.read_perm);
- BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(&attr_md.write_perm);
-
- attr_md.vloc = BLE_GATTS_VLOC_STACK;
- attr_md.rd_auth = 0;
- attr_md.wr_auth = 0;
- attr_md.vlen = 0;
-
- memset(&attr_char_value, 0, sizeof(attr_char_value));
-
- attr_char_value.p_uuid = &ble_uuid;
- attr_char_value.p_attr_md = &attr_md;
- attr_char_value.init_len = 0;
- attr_char_value.init_offs = 0;
- attr_char_value.max_len = 512;//sizeof(BLUEIO_IOPIN) * BLUEIO_IOPIN_MAX;
- attr_char_value.p_value = NULL;
-
- return sd_ble_gatts_characteristic_add(pSvc->SvcHdl, &char_md,
- &attr_char_value,
- &pSvc->DataCharHdl);
-}
-*/
-uint32_t BlueIOSvcInit(BLUEIOSVC *pSvc, const BLUEIOSVC_CFG *pCfg)
-{
- uint32_t err;
- ble_uuid_t ble_uuid;
-
- // Initialize service structure
- pSvc->ConnHdl = BLE_CONN_HANDLE_INVALID;
- pSvc->CtrlWrCB = pCfg->CtrlWrCB;
- pSvc->TxDataWrCB = pCfg->TxDataWrCB;
-
- // Add base UUID to softdevice's internal list.
- err = sd_ble_uuid_vs_add(&pCfg->UuidBase, &pSvc->UuidType);
- if (err != NRF_SUCCESS)
- {
- return err;
- }
-
- ble_uuid.type = pSvc->UuidType;
- ble_uuid.uuid = pCfg->UuidSvc;
-
- err = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY, &ble_uuid, &pSvc->SvcHdl);
- if (err != NRF_SUCCESS)
- {
- return err;
- }
-
- err = BlueIOSvcCharAdd(pSvc, pCfg->UuidCtrlChar, pCfg->CtrlCharMaxLen, (ble_gatts_char_md_t*)&pCfg->CtrlChar, &pSvc->CtrlCharHdl);
- if (err != NRF_SUCCESS)
- {
- return err;
- }
-
- err = BlueIOSvcCharAdd(pSvc, pCfg->UuidRxDataChar, pCfg->RxDataCharMaxLen, (ble_gatts_char_md_t*)&pCfg->RxDataChar, &pSvc->RxDataCharHdl);
- if (err != NRF_SUCCESS)
- {
- return err;
- }
-
- return NRF_SUCCESS;
-}
-/*
-uint32_t ble_blueios_on_data_change(ble_blueios_t * p_blueios)
-{
- ble_gatts_hvx_params_t params;
- uint8_t data;
- uint16_t len = sizeof(data);
-
- memset(¶ms, 0, sizeof(params));
- params.type = BLE_GATT_HVX_NOTIFICATION;
- params.handle = p_blueios->data_char_handles.value_handle;
- params.p_data = &data;
- params.p_len = &len;
-
- return sd_ble_gatts_hvx(p_blueios->conn_handle, ¶ms);
-}
-*/
-
-
-/**@brief Function for handling a Bond Manager error.
- *
- * @param[in] nrf_error Error code containing information about what went wrong.
- */
-//static void bond_manager_error_handler(uint32_t nrf_error)
-//{
-// APP_ERROR_HANDLER(nrf_error);
-//}
-
-
-/**@brief Function for handling the Bond Manager events.
- *
- * @param[in] p_evt Data associated to the bond manager event.
- */
-/*static void bond_evt_handler(ble_bondmngr_evt_t * p_evt)
-{
- g_LastConnectedCentral = p_evt->central_handle;
-}
-*/
-/**@brief Function for the Bond Manager initialization.
- */
-/*static void bond_manager_init(void)
-{
- uint32_t err_code;
- ble_bondmngr_init_t bondmngrcfg;
- //bool bonds_delete;
-
- // Initialize persistent storage module.
- err_code = pstorage_init();
- APP_ERROR_CHECK(err_code);
-
- // Clear all bonded centrals if the Bonds Delete button is pushed
- //err_code = app_button_is_pushed(BONDMNGR_DELETE_BUTTON_PIN_NO, &bonds_delete);
- //APP_ERROR_CHECK(err_code);
-
- // Initialize the Bond Manager
- bondmngrcfg.flash_page_num_bond = FLASH_PAGE_BOND;
- bondmngrcfg.flash_page_num_sys_attr = FLASH_PAGE_SYS_ATTR;
- bondmngrcfg.evt_handler = bond_evt_handler;
- bondmngrcfg.error_handler = bond_manager_error_handler;
- bondmngrcfg.bonds_delete = false;//bonds_delete;
-
- err_code = ble_bondmngr_init(&bondmngrcfg);
- APP_ERROR_CHECK(err_code);
-}
-*/
-
diff --git a/ARM/Nordic/src/iopincfg_nrf5x.c b/ARM/Nordic/src/iopincfg_nrf5x.c
index fd0071df..5aed0fd0 100755
--- a/ARM/Nordic/src/iopincfg_nrf5x.c
+++ b/ARM/Nordic/src/iopincfg_nrf5x.c
@@ -33,7 +33,14 @@ Modified by Date Description
----------------------------------------------------------------------------*/
#include
-#include "nrf_gpio.h"
+#ifdef NRF51
+#include "nrf51.h"
+#include "nrf51_bitfields.h"
+#else
+#include "nrf52.h"
+#include "nrf52_bitfields.h"
+#define NRF_GPIO NRF_P0
+#endif
#include "iopincfg.h"
/*
@@ -68,13 +75,13 @@ void IOPinConfig(int PortNo, int PinNo, int PinOp, IOPINDIR Dir, IOPINRES Resist
{
case IOPINRES_FOLLOW: // nRF51 does not have follow mode, use pullup
case IOPINRES_PULLUP:
- cnf |= (NRF_GPIO_PIN_PULLUP << GPIO_PIN_CNF_PULL_Pos);
+ cnf |= (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos);
break;
case IOPINRES_PULLDOWN:
- cnf |= (NRF_GPIO_PIN_PULLDOWN << GPIO_PIN_CNF_PULL_Pos);
+ cnf |= (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos);
break;
case IOPINRES_NONE:
- cnf |= (NRF_GPIO_PIN_NOPULL << GPIO_PIN_CNF_PULL_Pos);
+ cnf |= (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
break;
}
diff --git a/ARM/Nordic/src/ledmxio_nrf5x.c b/ARM/Nordic/src/ledmxio_nrf5x.c
index 77b53ee3..8f2c15d8 100755
--- a/ARM/Nordic/src/ledmxio_nrf5x.c
+++ b/ARM/Nordic/src/ledmxio_nrf5x.c
@@ -33,7 +33,7 @@ Modified by Date Description
----------------------------------------------------------------------------*/
-#include "nrf_gpio.h"
+#include "iopinctrl.h"
#include "ledmxio.h"
typedef struct {
@@ -56,27 +56,27 @@ void LedMxIOInit(LEDMXDEV *pLedMxDev, LEDMXCFG *pCfg)
pLedMxDev->pIODev = (void *)&g_LmxIODev;
pdev->WrPin = pcfg->WrPin;
- nrf_gpio_cfg_output(pcfg->WrPin);
- nrf_gpio_pin_set(pcfg->WrPin);
+ IOPinConfig(0, pdev->WrPin, 0, IOPINDIR_OUTPUT, IOPINRES_PULLUP, IOPINTYPE_NORMAL);
+ IOPinSet(0, pdev->WrPin);
pdev->RdPin = pcfg->RdPin;
- nrf_gpio_cfg_output(pcfg->RdPin);
- nrf_gpio_pin_set(pcfg->RdPin);
+ IOPinConfig(0, pdev->RdPin, 0, IOPINDIR_INPUT, IOPINRES_PULLUP, IOPINTYPE_NORMAL);
+ IOPinSet(0, pdev->RdPin);
pdev->DataPin = pcfg->DataPin;
- nrf_gpio_cfg_output(pcfg->DataPin);
+ IOPinConfig(0, pdev->DataPin, 0, IOPINDIR_OUTPUT, IOPINRES_FOLLOW, IOPINTYPE_NORMAL);
pdev->EnPin = pcfg->EnPin;
- nrf_gpio_cfg_output(pcfg->EnPin);
- nrf_gpio_pin_set(pcfg->EnPin);
+ IOPinConfig(0, pdev->EnPin, 0, IOPINDIR_OUTPUT, IOPINRES_PULLUP, IOPINTYPE_NORMAL);
+ IOPinSet(0, pdev->EnPin);
for (int i = 0; i < LEDMX_MAX_ADDRPIN; i++)
{
pdev->CsPins[i] = pcfg->CsPins[i];
if (pdev->CsPins[i] >= 0)
{
- nrf_gpio_cfg_output(pdev->CsPins[i]);
- nrf_gpio_pin_clear(pdev->CsPins[i]);
+ IOPinConfig(0, pdev->CsPins[i], 0, IOPINDIR_OUTPUT, IOPINRES_PULLDOWN, IOPINTYPE_NORMAL);
+ IOPinClear(0, pdev->CsPins[i]);
}
}
pdev->NbCsPins = pcfg->NbCsPins;
@@ -87,28 +87,28 @@ void LedMxStartTx(LEDMXDEV *pLedMxDev, int PanelAddr)
{
IODEV *pdev = (IODEV *)pLedMxDev->pIODev;
- nrf_gpio_pin_set(pdev->RdPin);
- nrf_gpio_pin_set(pdev->WrPin);
+ IOPinSet(0, pdev->RdPin);
+ IOPinSet(0, pdev->WrPin);
if (pdev->CsType == LEDMX_CSTYPE_BIN)
{
- nrf_gpio_pin_set(pdev->EnPin);
+ IOPinSet(0, pdev->EnPin);
for (int i = 0; i < pdev->NbCsPins; i++)
{
if (pdev->CsPins[i] >= 0)
{
if (PanelAddr & 1)
- nrf_gpio_pin_set(pdev->CsPins[i]);
+ IOPinSet(0, pdev->CsPins[i]);
else
- nrf_gpio_pin_clear(pdev->CsPins[i]);
+ IOPinClear(0, pdev->CsPins[i]);
}
PanelAddr >>= 1;
}
- nrf_gpio_pin_clear(pdev->EnPin);
+ IOPinClear(0, pdev->EnPin);
}
else
{
- nrf_gpio_pin_clear(pdev->CsPins[PanelAddr]);
+ IOPinClear(0, pdev->CsPins[PanelAddr]);
}
}
@@ -119,14 +119,14 @@ void LedMxTxData(LEDMXDEV *pLedMxDev, uint32_t Data, int NbBits)
while (mask)
{
- nrf_gpio_pin_clear(pdev->WrPin);
+ IOPinClear(0, pdev->WrPin);
if (Data & mask)
- nrf_gpio_pin_set(pdev->DataPin);
+ IOPinSet(0, pdev->DataPin);
else
- nrf_gpio_pin_clear(pdev->DataPin);
+ IOPinClear(0, pdev->DataPin);
__NOP();
- nrf_gpio_pin_set(pdev->WrPin);
+ IOPinSet(0, pdev->WrPin);
mask >>= 1;
}
@@ -137,17 +137,17 @@ void LedMxStopTx(LEDMXDEV *pLedMxDev, int PanelAddr)
{
IODEV *pdev = (IODEV *)pLedMxDev->pIODev;
- nrf_gpio_pin_set(pdev->WrPin);
+ IOPinSet(0, pdev->WrPin);
if (pdev->CsType == LEDMX_CSTYPE_BIN)
{
for (int i = 0; i < pdev->NbCsPins; i++)
{
if (pdev->CsPins[i] >= 0)
- nrf_gpio_pin_set(pdev->CsPins[i]);
+ IOPinSet(0, pdev->CsPins[i]);
}
- nrf_gpio_pin_set(pdev->EnPin);
+ IOPinSet(0, pdev->EnPin);
}
else
- nrf_gpio_pin_set(pdev->CsPins[PanelAddr]);
+ IOPinSet(0, pdev->CsPins[PanelAddr]);
}
diff --git a/ARM/Nordic/src/uart_nrf5x.c b/ARM/Nordic/src/uart_nrf5x.c
index 518a7bf4..e58eb31c 100755
--- a/ARM/Nordic/src/uart_nrf5x.c
+++ b/ARM/Nordic/src/uart_nrf5x.c
@@ -36,7 +36,16 @@ Modified by Date Description
#include
#include
-#include "nrf_gpio.h"
+#ifdef NRF51
+#include "nrf51.h"
+#include "nrf51_bitfields.h"
+#else
+#include "nrf52.h"
+#include "nrf52_bitfields.h"
+#define NRF_GPIO NRF_P0
+#define UART0_IRQn UARTE0_UART0_IRQn
+#define UART0_IRQHandler UARTE0_UART0_IRQHandler
+#endif
#include "istddef.h"
#include "uart_nrf5x.h"
@@ -306,38 +315,39 @@ int nRFUARTRxData(SERINTRFDEV *pDev, uint8_t *pBuff, int Bufflen)
int nRFUARTTxData(SERINTRFDEV *pDev, uint8_t *pData, int Datalen)
{
- NRFUARTDEV *dev = (NRFUARTDEV *)pDev->pDevData;
- int cnt = 0;
-
- uint32_t state = DisableInterrupt();
- while (Datalen > 0)
- {
- int l = Datalen;
- uint8_t *p = CFifoPutMultiple(dev->pUartDev->hTxFifo, &l);
- if (p == NULL)
- break;
- memcpy(p, pData, l);
- Datalen -= l;
- pData += l;
- cnt += l;
- }
- EnableInterrupt(state);
-
- if (dev->bTxReady)
- {
- //if (nRFUARTWaitForTxReady(dev, 1000))
- {
- dev->pReg->EVENTS_TXDRDY = 0;
- dev->bTxReady = true;
- uint8_t *p = CFifoGet(dev->pUartDev->hTxFifo);
- if (p)
- {
- dev->bTxReady = false;
- dev->pReg->TXD = *p;
- }
- }
- }
- return cnt;
+ NRFUARTDEV *dev = (NRFUARTDEV *)pDev->pDevData;
+ int cnt = 0;
+
+ uint32_t state = DisableInterrupt();
+
+ while (Datalen > 0)
+ {
+ int l = Datalen;
+ uint8_t *p = CFifoPutMultiple(dev->pUartDev->hTxFifo, &l);
+ if (p == NULL)
+ break;
+ memcpy(p, pData, l);
+ Datalen -= l;
+ pData += l;
+ cnt += l;
+ }
+ EnableInterrupt(state);
+
+ if (dev->bTxReady)
+ {
+ //if (nRFUARTWaitForTxReady(dev, 1000))
+ {
+ dev->pReg->EVENTS_TXDRDY = 0;
+ dev->bTxReady = true;
+ uint8_t *p = CFifoGet(dev->pUartDev->hTxFifo);
+ if (p)
+ {
+ dev->bTxReady = false;
+ dev->pReg->TXD = *p;
+ }
+ }
+ }
+ return cnt;
}
bool UARTInit(UARTDEV *pDev, const UARTCFG *pCfg)
@@ -352,20 +362,20 @@ bool UARTInit(UARTDEV *pDev, const UARTCFG *pCfg)
if (pCfg->pRxMem && pCfg->RxMemSize > 0)
{
- pDev->hRxFifo = CFifoInit(pCfg->pRxMem, pCfg->RxMemSize, 1);
+ pDev->hRxFifo = CFifoInit(pCfg->pRxMem, pCfg->RxMemSize, 1, pCfg->bFifoBlocking);
}
else
{
- pDev->hRxFifo = CFifoInit(s_nRFUARTRxFifoMem, NRFUART_CFIFO_SIZE, 1);
+ pDev->hRxFifo = CFifoInit(s_nRFUARTRxFifoMem, NRFUART_CFIFO_SIZE, 1, pCfg->bFifoBlocking);
}
if (pCfg->pTxMem && pCfg->TxMemSize > 0)
{
- pDev->hTxFifo = CFifoInit(pCfg->pTxMem, pCfg->TxMemSize, 1);
+ pDev->hTxFifo = CFifoInit(pCfg->pTxMem, pCfg->TxMemSize, 1, pCfg->bFifoBlocking);
}
else
{
- pDev->hTxFifo = CFifoInit(s_nRFUARTTxFifoMem, NRFUART_CFIFO_SIZE, 1);
+ pDev->hTxFifo = CFifoInit(s_nRFUARTTxFifoMem, NRFUART_CFIFO_SIZE, 1, pCfg->bFifoBlocking);
}
IOPINCFG *pincfg = (IOPINCFG*)pCfg->pIoMap;
@@ -508,7 +518,7 @@ void nRFUARTEnable(SERINTRFDEV *pDev)
void UARTSetCtrlLineState(UARTDEV *pDev, uint32_t LineState)
{
- NRFUARTDEV *dev = (NRFUARTDEV *)pDev->SerIntrf.pDevData;
+// NRFUARTDEV *dev = (NRFUARTDEV *)pDev->SerIntrf.pDevData;
}
diff --git a/ARM/src/gcc_arm_flash.ld b/ARM/src/gcc_arm_flash.ld
index b204be12..c8b0182e 100644
--- a/ARM/src/gcc_arm_flash.ld
+++ b/ARM/src/gcc_arm_flash.ld
@@ -57,7 +57,7 @@ SECTIONS {
.ivector : ALIGN(4)
{
__text_start__ = .;
-
+ __isr_vector = .;
/* At addr zero is the stack pointer */
/*LONG(__StackTop);*/
diff --git a/OSX/EHAL/EHAL.xcodeproj/project.pbxproj b/OSX/EHAL/EHAL.xcodeproj/project.pbxproj
index 43a4528e..59d5b0ba 100644
--- a/OSX/EHAL/EHAL.xcodeproj/project.pbxproj
+++ b/OSX/EHAL/EHAL.xcodeproj/project.pbxproj
@@ -20,7 +20,6 @@
401FBF9D1D9CAC96004A39FF /* utf8.c in Sources */ = {isa = PBXBuildFile; fileRef = 401FBF911D9CAC96004A39FF /* utf8.c */; };
401FBF9E1D9CAC96004A39FF /* utf8cvt.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 401FBF921D9CAC96004A39FF /* utf8cvt.cpp */; };
401FBFA11D9CAD53004A39FF /* uart_osx.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 401FBF9F1D9CAD53004A39FF /* uart_osx.cpp */; };
- 401FBFA21D9CAD53004A39FF /* usbhiddev_impl.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 401FBFA01D9CAD53004A39FF /* usbhiddev_impl.cpp */; };
401FBFEC1DA01F47004A39FF /* base64.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFDE1DA01F47004A39FF /* base64.h */; };
401FBFED1DA01F47004A39FF /* cfifo.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFDF1DA01F47004A39FF /* cfifo.h */; };
401FBFEE1DA01F47004A39FF /* convutil.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFE01DA01F47004A39FF /* convutil.h */; };
@@ -32,9 +31,10 @@
401FBFF41DA01F47004A39FF /* sha1.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFE61DA01F47004A39FF /* sha1.h */; };
401FBFF51DA01F47004A39FF /* sha256.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFE71DA01F47004A39FF /* sha256.h */; };
401FBFF61DA01F47004A39FF /* uart.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFE81DA01F47004A39FF /* uart.h */; };
- 401FBFF71DA01F47004A39FF /* usbhiddev.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFE91DA01F47004A39FF /* usbhiddev.h */; };
401FBFF81DA01F47004A39FF /* utf8.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFEA1DA01F47004A39FF /* utf8.h */; };
401FBFF91DA01F47004A39FF /* utf8cvt.h in Headers */ = {isa = PBXBuildFile; fileRef = 401FBFEB1DA01F47004A39FF /* utf8cvt.h */; };
+ 4047E3CE1DD8B9E8005634A1 /* usb_hidhost.h in Headers */ = {isa = PBXBuildFile; fileRef = 4047E3CD1DD8B9E8005634A1 /* usb_hidhost.h */; };
+ 4047E3D01DD8BA20005634A1 /* usb_hidhost_impl.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4047E3CF1DD8BA20005634A1 /* usb_hidhost_impl.cpp */; };
/* End PBXBuildFile section */
/* Begin PBXFileReference section */
@@ -52,7 +52,6 @@
401FBF911D9CAC96004A39FF /* utf8.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = utf8.c; path = ../../src/utf8.c; sourceTree = ""; };
401FBF921D9CAC96004A39FF /* utf8cvt.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = utf8cvt.cpp; path = ../../src/utf8cvt.cpp; sourceTree = ""; };
401FBF9F1D9CAD53004A39FF /* uart_osx.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = uart_osx.cpp; path = src/uart_osx.cpp; sourceTree = ""; };
- 401FBFA01D9CAD53004A39FF /* usbhiddev_impl.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = usbhiddev_impl.cpp; path = src/usbhiddev_impl.cpp; sourceTree = ""; };
401FBFDE1DA01F47004A39FF /* base64.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = base64.h; path = ../../include/base64.h; sourceTree = ""; };
401FBFDF1DA01F47004A39FF /* cfifo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = cfifo.h; path = ../../include/cfifo.h; sourceTree = ""; };
401FBFE01DA01F47004A39FF /* convutil.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = convutil.h; path = ../../include/convutil.h; sourceTree = ""; };
@@ -64,9 +63,10 @@
401FBFE61DA01F47004A39FF /* sha1.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = sha1.h; path = ../../include/sha1.h; sourceTree = ""; };
401FBFE71DA01F47004A39FF /* sha256.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = sha256.h; path = ../../include/sha256.h; sourceTree = ""; };
401FBFE81DA01F47004A39FF /* uart.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = uart.h; path = ../../include/uart.h; sourceTree = ""; };
- 401FBFE91DA01F47004A39FF /* usbhiddev.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = usbhiddev.h; path = ../../include/usbhiddev.h; sourceTree = ""; };
401FBFEA1DA01F47004A39FF /* utf8.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = utf8.h; path = ../../include/utf8.h; sourceTree = ""; };
401FBFEB1DA01F47004A39FF /* utf8cvt.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = utf8cvt.h; path = ../../include/utf8cvt.h; sourceTree = ""; };
+ 4047E3CD1DD8B9E8005634A1 /* usb_hidhost.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = usb_hidhost.h; path = ../../include/usb_hidhost.h; sourceTree = ""; };
+ 4047E3CF1DD8BA20005634A1 /* usb_hidhost_impl.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = usb_hidhost_impl.cpp; path = src/usb_hidhost_impl.cpp; sourceTree = ""; };
/* End PBXFileReference section */
/* Begin PBXFrameworksBuildPhase section */
@@ -83,6 +83,8 @@
401FBF771D9CAC42004A39FF = {
isa = PBXGroup;
children = (
+ 4047E3CF1DD8BA20005634A1 /* usb_hidhost_impl.cpp */,
+ 4047E3CD1DD8B9E8005634A1 /* usb_hidhost.h */,
401FBFDE1DA01F47004A39FF /* base64.h */,
401FBFDF1DA01F47004A39FF /* cfifo.h */,
401FBFE01DA01F47004A39FF /* convutil.h */,
@@ -94,11 +96,9 @@
401FBFE61DA01F47004A39FF /* sha1.h */,
401FBFE71DA01F47004A39FF /* sha256.h */,
401FBFE81DA01F47004A39FF /* uart.h */,
- 401FBFE91DA01F47004A39FF /* usbhiddev.h */,
401FBFEA1DA01F47004A39FF /* utf8.h */,
401FBFEB1DA01F47004A39FF /* utf8cvt.h */,
401FBF9F1D9CAD53004A39FF /* uart_osx.cpp */,
- 401FBFA01D9CAD53004A39FF /* usbhiddev_impl.cpp */,
401FBF871D9CAC96004A39FF /* base64.c */,
401FBF881D9CAC96004A39FF /* cfifo.c */,
401FBF891D9CAC96004A39FF /* crc.c */,
@@ -131,6 +131,7 @@
buildActionMask = 2147483647;
files = (
401FBFF81DA01F47004A39FF /* utf8.h in Headers */,
+ 4047E3CE1DD8B9E8005634A1 /* usb_hidhost.h in Headers */,
401FBFED1DA01F47004A39FF /* cfifo.h in Headers */,
401FBFEC1DA01F47004A39FF /* base64.h in Headers */,
401FBFF91DA01F47004A39FF /* utf8cvt.h in Headers */,
@@ -143,7 +144,6 @@
401FBFEF1DA01F47004A39FF /* crc.h in Headers */,
401FBFF31DA01F47004A39FF /* serialintrf.h in Headers */,
401FBFF01DA01F47004A39FF /* intelhex.h in Headers */,
- 401FBFF71DA01F47004A39FF /* usbhiddev.h in Headers */,
);
runOnlyForDeploymentPostprocessing = 0;
};
@@ -204,7 +204,6 @@
isa = PBXSourcesBuildPhase;
buildActionMask = 2147483647;
files = (
- 401FBFA21D9CAD53004A39FF /* usbhiddev_impl.cpp in Sources */,
401FBF9E1D9CAC96004A39FF /* utf8cvt.cpp in Sources */,
401FBF971D9CAC96004A39FF /* prbs.c in Sources */,
401FBF981D9CAC96004A39FF /* sbuffer.c in Sources */,
@@ -213,6 +212,7 @@
401FBF961D9CAC96004A39FF /* intelhex.c in Sources */,
401FBF9A1D9CAC96004A39FF /* sha1.c in Sources */,
401FBF9C1D9CAC96004A39FF /* uart.c in Sources */,
+ 4047E3D01DD8BA20005634A1 /* usb_hidhost_impl.cpp in Sources */,
401FBF951D9CAC96004A39FF /* crc.c in Sources */,
401FBF931D9CAC96004A39FF /* base64.c in Sources */,
401FBF9B1D9CAC96004A39FF /* sha256.c in Sources */,
diff --git a/OSX/EHAL/EHAL.xcodeproj/project.xcworkspace/xcuserdata/hoan.xcuserdatad/UserInterfaceState.xcuserstate b/OSX/EHAL/EHAL.xcodeproj/project.xcworkspace/xcuserdata/hoan.xcuserdatad/UserInterfaceState.xcuserstate
index c9801bdd..74a3d6e6 100644
Binary files a/OSX/EHAL/EHAL.xcodeproj/project.xcworkspace/xcuserdata/hoan.xcuserdatad/UserInterfaceState.xcuserstate and b/OSX/EHAL/EHAL.xcodeproj/project.xcworkspace/xcuserdata/hoan.xcuserdatad/UserInterfaceState.xcuserstate differ
diff --git a/OSX/EHAL/include/usbhiddev_impl.h b/OSX/EHAL/include/usb_hidhost_impl.h
similarity index 60%
rename from OSX/EHAL/include/usbhiddev_impl.h
rename to OSX/EHAL/include/usb_hidhost_impl.h
index e58689df..4eeccbc4 100755
--- a/OSX/EHAL/include/usbhiddev_impl.h
+++ b/OSX/EHAL/include/usb_hidhost_impl.h
@@ -1,21 +1,42 @@
-/*--------------------------------------------------------------------------
- File : usbhiddev_impl.h
+/*---------------------------------------------------------------------------
+ File : usb_hidhost_implt.h
Author : Hoang Nguyen Hoan July 9, 2009
- Desc : Implementation class for USB device on MAC OS X
+ Desc : Generic class of Host side USB HID device access
+ Implementation class for USB device on MAC OS X
+ Copyright (c) 2009-16, I-SYST, all rights reserved
Copyright (c) 2009, Ekomini Inc, all rights reserved
+
+ Permission to use, copy, modify, and distribute this software for any purpose
+ with or without fee is hereby granted, provided that the above copyright
+ notice and this permission notice appear in all copies, and none of the
+ names : I-SYST, TidalStream or its contributors may be used to endorse or
+ promote products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
----------------------------------------------------------------------------
- Modified by Date Description
+ Modified by Date Description
----------------------------------------------------------------------------*/
-#ifndef __USBHIDDEV_IMPL_H__
-#define __USBHIDDEV_IMPL_H__
+#ifndef __USB_HIDHOST_IMPL_H__
+#define __USB_HIDHOST_IMPL_H__
#include
#include
-#include "usbhiddev.h"
+#include "usb_hidhost.h"
typedef void (*HIDINTRPTINCB)(UsbHidDevice *pDev, char *pBuf, uint32_t DataLen);
@@ -61,4 +82,4 @@ class UsbHidDevice_Impl : public UsbHidDevice {
uint8_t *vpInRepData;
};
-#endif // __USBHIDDEV_IMPL_H__
+#endif // __USB_HIDHOST_IMPL_H__
diff --git a/OSX/EHAL/src/usbhiddev_impl.cpp b/OSX/EHAL/src/usb_hidhost_impl.cpp
similarity index 75%
rename from OSX/EHAL/src/usbhiddev_impl.cpp
rename to OSX/EHAL/src/usb_hidhost_impl.cpp
index 938ef4f6..1418d996 100755
--- a/OSX/EHAL/src/usbhiddev_impl.cpp
+++ b/OSX/EHAL/src/usb_hidhost_impl.cpp
@@ -1,15 +1,36 @@
-/*--------------------------------------------------------------------------
- File : usbhiddev_impl.h
+/*---------------------------------------------------------------------------
+ File : usb_hidhost_implt.cpp
Author : Hoang Nguyen Hoan July 9, 2009
- Desc : Implementation class for USB device on MAC OS X
-
+ Desc : Generic class of Host side USB HID device access
+ Implementation class for USB device on MAC OS X
+
+ Copyright (c) 2008-16, I-SYST, all rights reserved
Copyright (c) 2009, Ekomini Inc, all rights reserved
+
+ Permission to use, copy, modify, and distribute this software for any purpose
+ with or without fee is hereby granted, provided that the above copyright
+ notice and this permission notice appear in all copies, and none of the
+ names : I-SYST, TidalStream or its contributors may be used to endorse or
+ promote products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
----------------------------------------------------------------------------
- Modified by Date Description
+ Modified by Date Description
----------------------------------------------------------------------------*/
-#include "usbhiddev_impl.h"
+#include "usb_hidhost_impl.h"
void UsbHidDevice_Impl::IOHIDDeviceReportCallback(void *inContext, // context from IOHIDDeviceRegisterInputReportCallback
IOReturn inResult, // completion result for the input report operation
@@ -126,8 +147,8 @@ bool UsbHidDevice_Impl::WriteOutputReport(int RepNo, uint8_t *pBuf, uint32_t Buf
IOReturn res = IOHIDDeviceSetReport(vHidDev, kIOHIDReportTypeOutput, RepNo,
(const uint8_t *)pBuf, BufSize);
- if (res != kIOReturnSuccess)
- printf("WriteReport Error %x\n", res);
+ //if (res != kIOReturnSuccess)
+ // printf("WriteReport Error %x\n", res);
return res == kIOReturnSuccess;
}
diff --git a/Win/EHAL/EHAL.sln b/Win/EHAL/EHAL.sln
index d7553855..53caece6 100644
--- a/Win/EHAL/EHAL.sln
+++ b/Win/EHAL/EHAL.sln
@@ -1,22 +1,22 @@
-
-Microsoft Visual Studio Solution File, Format Version 12.00
-# Visual Studio Express 2013 for Windows Desktop
-VisualStudioVersion = 12.0.31101.0
-MinimumVisualStudioVersion = 10.0.40219.1
-Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "EHAL", "EHAL.vcxproj", "{D89EF789-E520-476E-A345-B12BE9310693}"
-EndProject
-Global
- GlobalSection(SolutionConfigurationPlatforms) = preSolution
- Debug|Win32 = Debug|Win32
- Release|Win32 = Release|Win32
- EndGlobalSection
- GlobalSection(ProjectConfigurationPlatforms) = postSolution
- {D89EF789-E520-476E-A345-B12BE9310693}.Debug|Win32.ActiveCfg = Debug|Win32
- {D89EF789-E520-476E-A345-B12BE9310693}.Debug|Win32.Build.0 = Debug|Win32
- {D89EF789-E520-476E-A345-B12BE9310693}.Release|Win32.ActiveCfg = Release|Win32
- {D89EF789-E520-476E-A345-B12BE9310693}.Release|Win32.Build.0 = Release|Win32
- EndGlobalSection
- GlobalSection(SolutionProperties) = preSolution
- HideSolutionNode = FALSE
- EndGlobalSection
-EndGlobal
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Visual Studio Express 2013 for Windows Desktop
+VisualStudioVersion = 12.0.31101.0
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "EHAL", "EHAL.vcxproj", "{DE882088-60C9-4753-AC1C-AE9763E2D453}"
+EndProject
+Global
+ GlobalSection(SolutionConfigurationPlatforms) = preSolution
+ Debug|Win32 = Debug|Win32
+ Release|Win32 = Release|Win32
+ EndGlobalSection
+ GlobalSection(ProjectConfigurationPlatforms) = postSolution
+ {DE882088-60C9-4753-AC1C-AE9763E2D453}.Debug|Win32.ActiveCfg = Debug|Win32
+ {DE882088-60C9-4753-AC1C-AE9763E2D453}.Debug|Win32.Build.0 = Debug|Win32
+ {DE882088-60C9-4753-AC1C-AE9763E2D453}.Release|Win32.ActiveCfg = Release|Win32
+ {DE882088-60C9-4753-AC1C-AE9763E2D453}.Release|Win32.Build.0 = Release|Win32
+ EndGlobalSection
+ GlobalSection(SolutionProperties) = preSolution
+ HideSolutionNode = FALSE
+ EndGlobalSection
+EndGlobal
diff --git a/Win/EHAL/EHAL.vcxproj b/Win/EHAL/EHAL.vcxproj
index 69ce812a..59357492 100644
--- a/Win/EHAL/EHAL.vcxproj
+++ b/Win/EHAL/EHAL.vcxproj
@@ -1,123 +1,123 @@
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- {D89EF789-E520-476E-A345-B12BE9310693}
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- OHAL
-
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- StaticLibrary
- true
- v120_xp
- Unicode
-
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- StaticLibrary
- false
- v120_xp
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- Unicode
-
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- Disabled
- WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions)
- include;../../include;C:\WinDDK\7600.16385.0\inc\api
- Sync
- MultiThreaded
- false
- false
- Cdecl
-
-
- Windows
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-
-
-
-
- Level3
-
-
- MaxSpeed
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- true
- WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions)
- include;../../include;C:\WinDDK\7600.16385.0\inc\api
- Sync
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- Cdecl
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+
+
+
+
+ Debug
+ Win32
+
+
+ Release
+ Win32
+
+
+
+ {DE882088-60C9-4753-AC1C-AE9763E2D453}
+ Win32Proj
+ OHAL
+
+
+
+ StaticLibrary
+ true
+ v120_xp
+ Unicode
+
+
+ StaticLibrary
+ false
+ v120_xp
+ true
+ Unicode
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Level3
+ Disabled
+ WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions)
+ include;../../include;C:\WinDDK\7600.16385.0\inc\api
+ Sync
+ MultiThreadedDebug
+ false
+ false
+ Cdecl
+
+
+ Windows
+ true
+
+
+
+
+ Level3
+
+
+ MaxSpeed
+ true
+ true
+ WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions)
+ include;../../include;C:\WinDDK\7600.16385.0\inc\api
+ Sync
+ MultiThreaded
+ false
+ false
+ Cdecl
+
+
+ Windows
+ true
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\ No newline at end of file
diff --git a/Win/EHAL/include/usb_hidhost_impl.h b/Win/EHAL/include/usb_hidhost_impl.h
new file mode 100644
index 00000000..5a0d01af
--- /dev/null
+++ b/Win/EHAL/include/usb_hidhost_impl.h
@@ -0,0 +1,87 @@
+/*---------------------------------------------------------------------------
+File : usb_hidhost_implt.h
+
+Author : Hoang Nguyen Hoan Oct 9, 2008
+
+Desc : Generic class of Host side USB HID device access
+ Implementation class for USB device on Windows
+
+Copyright (c) 2008-16, I-SYST, all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST, TidalStream or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+----------------------------------------------------------------------------*/
+#ifndef __USB_HIDHOST_IMPL_H__
+#define __USB_HIDHOST_IMPL_H__
+
+#include
+#include "Windows.h"
+#include
+
+extern "C" {
+#include "hidsdi.h"
+#include "hidpi.h"
+}
+
+#include "usb_hidhost.h"
+
+typedef struct {
+
+} HIDDEV_DATA;
+
+class UsbHidDevice_Impl : public UsbHidDevice {
+public:
+ UsbHidDevice_Impl();
+ virtual ~UsbHidDevice_Impl();
+
+ bool Init(HANDLE hDev);
+ bool RegisterWindowNotifications(HWND hWnd);
+ bool RegisterServiceNotifications(SERVICE_STATUS_HANDLE hService);
+ void GetDeviceCapabilities();
+ int ReadInputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize, bool CtrlTrans = true);
+ bool WriteOutputReport(int RepNo, uint8_t *pBuf, uint32_t Bufsize, bool CtrlTrans = true);
+ int ReadFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize);
+ bool WriteFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize);
+ bool WaitResponse(int TimeoutSec);
+ bool GetSerialNumber(std::wstring &sn);
+ bool GetSerialNumber(std::string &sn);
+ bool GetProductString(std::wstring &pd);
+ virtual bool ProcessInputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize) { return true; }
+
+protected:
+ virtual void ReadDeviceInfo() {}
+
+private:
+ HANDLE vhDevice;
+ HANDLE vhDevNotification;
+ HIDP_CAPS vCaps;
+ HANDLE vhEvent;
+ OVERLAPPED vRdOverlapped;
+ OVERLAPPED vWrOverlapped;
+ int vTempBufSize;
+ char *vpTempBuf;
+};
+
+typedef bool(*USBHIDFOUNDCB)(HANDLE HidDev);
+
+int UsbHidFindDevice(int VendId, int ProdId, USBHIDFOUNDCB Callback);
+
+#endif // __USB_HIDHOST_IMPL_H
diff --git a/Win/EHAL/include/usbhiddev_impl.h b/Win/EHAL/include/usbhiddev_impl.h
deleted file mode 100644
index 8ff30502..00000000
--- a/Win/EHAL/include/usbhiddev_impl.h
+++ /dev/null
@@ -1,54 +0,0 @@
-// Copyright (c) 2008, I-SYST, All rights reserved
-//---------------------------------------------------------------------------
-
-#ifndef __USBHIDDEV_IMPL_H__
-#define __USBHIDDEV_IMPL_H__
-
-#include
-#include "Windows.h"
-#include
-
-extern "C" {
-#include "hidsdi.h"
-#include "hidpi.h"
-}
-
-#include "UsbHidDev.h"
-
-typedef struct {
-
-} HIDDEV_DATA;
-
-class UsbHidDevice_Impl : public UsbHidDevice {
-public:
- UsbHidDevice_Impl();
- virtual ~UsbHidDevice_Impl();
-
- bool Init(HANDLE hDev);
- bool RegisterWindowNotifications(HWND hWnd);
- bool RegisterServiceNotifications(SERVICE_STATUS_HANDLE hService);
- void GetDeviceCapabilities();
- int ReadInputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize, bool CtrlTrans = true);
- bool WriteOutputReport(int RepNo, uint8_t *pBuf, uint32_t Bufsize, bool CtrlTrans = true);
- int ReadFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize);
- bool WriteFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize);
- bool WaitResponse(int TimeoutSec);
- bool GetSerialNumber(std::wstring &sn);
- bool GetSerialNumber(std::string &sn);
- bool GetProductString(std::wstring &pd);
- virtual bool ProcessInputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize) { return true; }
-
-protected:
- virtual void ReadDeviceInfo() {}
-
-private:
- HANDLE vhDevice;
- HANDLE vhDevNotification;
- HIDP_CAPS vCaps;
- HANDLE vhEvent;
- OVERLAPPED vRdOverlapped;
- OVERLAPPED vWrOverlapped;
- int vTempBufSize;
- char *vpTempBuf;
-};
-#endif
diff --git a/Win/EHAL/src/usbhiddev_impl.cpp b/Win/EHAL/src/usb_hidhost_impl.cpp
similarity index 64%
rename from Win/EHAL/src/usbhiddev_impl.cpp
rename to Win/EHAL/src/usb_hidhost_impl.cpp
index eb0249c4..348025c8 100644
--- a/Win/EHAL/src/usbhiddev_impl.cpp
+++ b/Win/EHAL/src/usb_hidhost_impl.cpp
@@ -1,364 +1,498 @@
-//
-// Copyright (c) 2009, Ekomini Inc., All rights reserved
-// Copyright (c) 2008, I-SYST, All rights reserved
-//---------------------------------------------------------------------------
-//#include
-
-#include
-#include
-#include
-
-#include
-#include
-//#include
-#include
-#pragma hdrstop
-#pragma comment (lib, "Setupapi.lib")
-#pragma comment (lib, "hid.lib")
-
-#include "usbhiddev_impl.h"
-
-using namespace std;
-//---------------------------------------------------------------------------
-
-//#pragma package(smart_init)
-
-UsbHidDevice_Impl::UsbHidDevice_Impl() :
- vhDevice(INVALID_HANDLE_VALUE),
- vhDevNotification(INVALID_HANDLE_VALUE),
- vhEvent(INVALID_HANDLE_VALUE),
- vpTempBuf(NULL),
- vTempBufSize(0)
-{
- memset(&vRdOverlapped, 0, sizeof(OVERLAPPED));
- memset(&vWrOverlapped, 0, sizeof(OVERLAPPED));
-}
-
-UsbHidDevice_Impl::~UsbHidDevice_Impl()
-{
- if (vhDevNotification != INVALID_HANDLE_VALUE)
- UnregisterDeviceNotification(vhDevNotification);
- if (vhDevice != INVALID_HANDLE_VALUE)
- CloseHandle(vhDevice);
- if (vhEvent != INVALID_HANDLE_VALUE)
- CloseHandle(vhEvent);
- if (vpTempBuf)
- delete[] vpTempBuf;
-}
-
-bool UsbHidDevice_Impl::Init(HANDLE hDev)
-{
- if (hDev == NULL || hDev == INVALID_HANDLE_VALUE)
- return false;
-
- vhDevice = hDev;
-
- PHIDP_PREPARSED_DATA PreparsedData;
-
- HidD_GetPreparsedData(vhDevice, &PreparsedData);
-
- HidP_GetCaps(PreparsedData, &vCaps);
-
- if (vpTempBuf)
- delete[] vpTempBuf;
- vTempBufSize = std::max(vCaps.InputReportByteLength, vCaps.OutputReportByteLength);
- vTempBufSize = std::max(vTempBufSize, vCaps.FeatureReportByteLength);
- vpTempBuf = new char[vTempBufSize];
-
- HidD_FreePreparsedData(PreparsedData);
-
- if (vRdOverlapped.hEvent == 0)
- {
- vRdOverlapped.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL);
- }
-
- if (vWrOverlapped.hEvent == 0)
- {
- vWrOverlapped.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL);
- }
-
- ReadDeviceInfo();
-
- return true;
-}
-
-bool UsbHidDevice_Impl::RegisterWindowNotifications(HWND hWnd)
-{
- DEV_BROADCAST_DEVICEINTERFACE DevBroadcastDeviceInterface;
-// HDEVNOTIFY DeviceNotificationHandle;
-
- DevBroadcastDeviceInterface.dbcc_size = sizeof(DevBroadcastDeviceInterface);
- DevBroadcastDeviceInterface.dbcc_devicetype = DBT_DEVTYP_DEVICEINTERFACE;
-// DevBroadcastDeviceInterface.dbcc_classguid = vHidGuid;
-
- vhDevNotification = RegisterDeviceNotification(hWnd,
- &DevBroadcastDeviceInterface,
- DEVICE_NOTIFY_WINDOW_HANDLE);
-
- return vhDevNotification != NULL;
-}
-
-bool UsbHidDevice_Impl::RegisterServiceNotifications(SERVICE_STATUS_HANDLE hService)
-{
- DEV_BROADCAST_DEVICEINTERFACE DevBroadcastDeviceInterface;
- HDEVNOTIFY DeviceNotificationHandle;
-
- DevBroadcastDeviceInterface.dbcc_size = sizeof(DevBroadcastDeviceInterface);
- DevBroadcastDeviceInterface.dbcc_devicetype = DBT_DEVTYP_DEVICEINTERFACE;
-// DevBroadcastDeviceInterface.dbcc_classguid = vHidGuid;
-
- vhDevNotification = RegisterDeviceNotification(hService,
- &DevBroadcastDeviceInterface,
- DEVICE_NOTIFY_SERVICE_HANDLE);
-
- return vhDevNotification != NULL;
-}
-
-void UsbHidDevice_Impl::GetDeviceCapabilities()
-{
- //Get the Capabilities structure for the device.
- if (vhDevice == NULL)
- return;
-
- PHIDP_PREPARSED_DATA PreparsedData;
-
- HidD_GetPreparsedData(vhDevice, &PreparsedData);
-
- HidP_GetCaps(PreparsedData, &vCaps);
-
- if (vpTempBuf)
- delete[] vpTempBuf;
- vTempBufSize = std::max(vCaps.InputReportByteLength, vCaps.OutputReportByteLength);
- vTempBufSize = std::max(vTempBufSize, vCaps.FeatureReportByteLength);
- vpTempBuf = new char[vTempBufSize];
-
- HidD_FreePreparsedData(PreparsedData);
-}
-
-int UsbHidDevice_Impl::ReadInputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize, bool CtrlTrans)
-{
- unsigned long retval = 0;
- DWORD res = FALSE;
-
- if (vhDevice == NULL || vhDevice == INVALID_HANDLE_VALUE)
- return 0;
-
- //The first byte is the report number.
- //memset(vpTempBuf, 0, vTempBufSize);
- vpTempBuf[0] = RepNo;
-
- if (CtrlTrans)
- {
- //Read a report from the device using a control transfer.
- res = HidD_GetInputReport(vhDevice, vpTempBuf, vCaps.InputReportByteLength);
- if (res)
- {
- memcpy(pBuf, vpTempBuf + 1, std::min(BufSize, vTempBufSize));
- retval = vCaps.InputReportByteLength - 1;
- }
- }
- else
- {
- res = ReadFile(vhDevice, vpTempBuf, vCaps.InputReportByteLength,
- &retval, (LPOVERLAPPED)&vRdOverlapped);
-
- res = WaitForSingleObject(vRdOverlapped.hEvent, 6000);
-
- switch (res)
- {
- case WAIT_OBJECT_0:
- res = GetOverlappedResult(vhDevice, &vRdOverlapped, &retval, true);
-
- //memcpy(pBuf, vpTempBuf + 1, std::min(BufSize, vTempBufSize));
- ProcessInputReport(RepNo, (uint8_t*)vpTempBuf + 1, std::min(BufSize, vTempBufSize));
- break;
- case WAIT_TIMEOUT:
-
- res = CancelIo(vhDevice);
-
- break;
- default:
- ;
- }
-
- //ResetEvent(vhEvent);
-
- }
-
- return retval;
-}
-
-bool UsbHidDevice_Impl::WriteOutputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize, bool CtrlTrans)
-{
- //Send a report to the device.
-
- DWORD BytesWritten = 0;
- INT Index =0;
- ULONG res;
- bool retval = false;
-
- if (vhDevice == NULL || vhDevice == INVALID_HANDLE_VALUE)
- return false;
-
- //The first byte is the report number.
- vpTempBuf[0] = RepNo;
- int len = BufSize;//std::min(BufSize, vCaps.OutputReportByteLength);
- memcpy(vpTempBuf + 1, pBuf, len);
-
- if (CtrlTrans)
- {
- // Send a control report to the device.
- res = HidD_SetOutputReport(vhDevice, vpTempBuf, vCaps.OutputReportByteLength);
- if (res)
- {
- retval = true;
- }
- }
- else
- {
- res = WriteFile(vhDevice, vpTempBuf, vCaps.OutputReportByteLength,
- &BytesWritten, (LPOVERLAPPED)&vWrOverlapped);
- res = WaitForSingleObject(vWrOverlapped.hEvent, 6000);
-
- switch (res)
- {
- case WAIT_OBJECT_0:
- retval = true;
- break;
- case WAIT_TIMEOUT:
- res = CancelIo(vhDevice);
-
- break;
- default:
- ;
- }
- //ResetEvent(vhEvent);
-
- }
-
- return retval;
-}
-
-int UsbHidDevice_Impl::ReadFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize)
-{
- // Read a Feature report from the device.
- bool res = false;
- int retval = 0;
-
- //The first byte is the report number.
- memset(vpTempBuf, 0, vTempBufSize);
- vpTempBuf[0] = RepNo;
-
- //Read a report from the device.
-
- /*
- HidD_GetFeature
- Returns:
- True on success
- Requires:
- A device handle returned by CreateFile.
- A buffer to hold the report.
- The report length returned by HidP_GetCaps in Capabilities.InputReportByteLength.
- */
-
- if (vhDevice != INVALID_HANDLE_VALUE)
- res = HidD_GetFeature(vhDevice, vpTempBuf, vCaps.FeatureReportByteLength);
- if (res)
- {
- memcpy(pBuf, vpTempBuf + 1, min(vCaps.FeatureReportByteLength, (unsigned short)BufSize));
- retval = vCaps.FeatureReportByteLength;
- }
- else
- {
- //The read attempt failed, so close the handles, display a message,
- //and set MyDeviceDetected to FALSE so the next attempt will look for the device.
-
- }
-
- return retval;
-}
-
-bool UsbHidDevice_Impl::WriteFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize)
-{
- //Send a report to the device.
- DWORD BytesWritten = 0;
- INT Index =0;
- ULONG res = 0;
-
- //The first byte is the report number.
- memset(vpTempBuf, 0, vTempBufSize);
- vpTempBuf[0] = RepNo;
-
- memcpy(&vpTempBuf[1], pBuf, min(BufSize, (uint32_t)vCaps.FeatureReportByteLength));
-
- //Send a report to the device.
-
- /*
- HidD_SetFeature
- Sends a report to the device.
- Returns: success or failure.
- Requires:
- A device handle returned by CreateFile.
- A buffer that holds the report.
- The Output Report length returned by HidP_GetCaps,
- */
-
- if (vhDevice != INVALID_HANDLE_VALUE)
- res = HidD_SetFeature(vhDevice, vpTempBuf, vCaps.FeatureReportByteLength);
-
- if (!res)
- {
- //The write attempt failed, so close the handles, display a message,
- //and set MyDeviceDetected to FALSE so the next attempt will look for the device.
-
- }
- else
- {
- }
-
- return res;
-}
-
-bool UsbHidDevice_Impl::WaitResponse(int TimeoutSec)
-{
- return true;
-}
-
-bool UsbHidDevice_Impl::GetSerialNumber(std::wstring &sn)
-{
- wchar_t buf[256];
- bool retval = HidD_GetSerialNumberString(vhDevice, buf, 255*2);
- if (retval)
- {
- sn = buf;
- }
-
- return retval;
-}
-
-bool UsbHidDevice_Impl::GetSerialNumber(std::string &sn)
-{
- wchar_t buf[256];
- bool retval = HidD_GetSerialNumberString(vhDevice, buf, 255*2);
- if (retval)
- {
- sn.assign(&buf[0], &buf[wcslen(buf)]);
- }
-
- return retval;
-}
-
-bool UsbHidDevice_Impl::GetProductString(std::wstring &pd)
-{
- wchar_t buf[256];
- bool retval = HidD_GetProductString(vhDevice, buf, 255*2);
- if (retval)
- {
- pd = buf;
- }
-
- return retval;
-}
-
-
-
+/*---------------------------------------------------------------------------
+File : usb_hidhost_implt.cpp
+
+Author : Hoang Nguyen Hoan Oct 9, 2008
+
+Desc : Generic class of Host side USB HID device access
+ Implementation class for USB device on Windows
+
+Copyright (c) 2008-16, I-SYST, all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST, TidalStream or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+----------------------------------------------------------------------------*/
+
+#include
+#include
+#include
+
+#include
+#include
+//#include
+#include
+#pragma hdrstop
+#pragma comment (lib, "Setupapi.lib")
+#pragma comment (lib, "hid.lib")
+
+#include "usb_hidhost_impl.h"
+
+using namespace std;
+//---------------------------------------------------------------------------
+
+//#pragma package(smart_init)
+
+UsbHidDevice_Impl::UsbHidDevice_Impl() :
+ vhDevice(INVALID_HANDLE_VALUE),
+ vhDevNotification(INVALID_HANDLE_VALUE),
+ vhEvent(INVALID_HANDLE_VALUE),
+ vpTempBuf(NULL),
+ vTempBufSize(0)
+{
+ memset(&vRdOverlapped, 0, sizeof(OVERLAPPED));
+ memset(&vWrOverlapped, 0, sizeof(OVERLAPPED));
+}
+
+UsbHidDevice_Impl::~UsbHidDevice_Impl()
+{
+ if (vhDevNotification != INVALID_HANDLE_VALUE)
+ UnregisterDeviceNotification(vhDevNotification);
+ if (vhDevice != INVALID_HANDLE_VALUE)
+ CloseHandle(vhDevice);
+ if (vhEvent != INVALID_HANDLE_VALUE)
+ CloseHandle(vhEvent);
+ if (vpTempBuf)
+ delete[] vpTempBuf;
+}
+
+bool UsbHidDevice_Impl::Init(HANDLE hDev)
+{
+ if (hDev == NULL || hDev == INVALID_HANDLE_VALUE)
+ return false;
+
+ vhDevice = hDev;
+
+ PHIDP_PREPARSED_DATA PreparsedData;
+
+ HidD_GetPreparsedData(vhDevice, &PreparsedData);
+
+ HidP_GetCaps(PreparsedData, &vCaps);
+
+ if (vpTempBuf)
+ delete[] vpTempBuf;
+ vTempBufSize = std::max(vCaps.InputReportByteLength, vCaps.OutputReportByteLength);
+ vTempBufSize = std::max(vTempBufSize, vCaps.FeatureReportByteLength);
+ vpTempBuf = new char[vTempBufSize];
+
+ HidD_FreePreparsedData(PreparsedData);
+
+ if (vRdOverlapped.hEvent == 0)
+ {
+ vRdOverlapped.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL);
+ }
+
+ if (vWrOverlapped.hEvent == 0)
+ {
+ vWrOverlapped.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL);
+ }
+
+ ReadDeviceInfo();
+
+ return true;
+}
+
+bool UsbHidDevice_Impl::RegisterWindowNotifications(HWND hWnd)
+{
+ DEV_BROADCAST_DEVICEINTERFACE DevBroadcastDeviceInterface;
+// HDEVNOTIFY DeviceNotificationHandle;
+
+ DevBroadcastDeviceInterface.dbcc_size = sizeof(DevBroadcastDeviceInterface);
+ DevBroadcastDeviceInterface.dbcc_devicetype = DBT_DEVTYP_DEVICEINTERFACE;
+// DevBroadcastDeviceInterface.dbcc_classguid = vHidGuid;
+
+ vhDevNotification = RegisterDeviceNotification(hWnd,
+ &DevBroadcastDeviceInterface,
+ DEVICE_NOTIFY_WINDOW_HANDLE);
+
+ return vhDevNotification != NULL;
+}
+
+bool UsbHidDevice_Impl::RegisterServiceNotifications(SERVICE_STATUS_HANDLE hService)
+{
+ DEV_BROADCAST_DEVICEINTERFACE DevBroadcastDeviceInterface;
+ HDEVNOTIFY DeviceNotificationHandle;
+
+ DevBroadcastDeviceInterface.dbcc_size = sizeof(DevBroadcastDeviceInterface);
+ DevBroadcastDeviceInterface.dbcc_devicetype = DBT_DEVTYP_DEVICEINTERFACE;
+// DevBroadcastDeviceInterface.dbcc_classguid = vHidGuid;
+
+ vhDevNotification = RegisterDeviceNotification(hService,
+ &DevBroadcastDeviceInterface,
+ DEVICE_NOTIFY_SERVICE_HANDLE);
+
+ return vhDevNotification != NULL;
+}
+
+void UsbHidDevice_Impl::GetDeviceCapabilities()
+{
+ //Get the Capabilities structure for the device.
+ if (vhDevice == NULL)
+ return;
+
+ PHIDP_PREPARSED_DATA PreparsedData;
+
+ HidD_GetPreparsedData(vhDevice, &PreparsedData);
+
+ HidP_GetCaps(PreparsedData, &vCaps);
+
+ if (vpTempBuf)
+ delete[] vpTempBuf;
+ vTempBufSize = std::max(vCaps.InputReportByteLength, vCaps.OutputReportByteLength);
+ vTempBufSize = std::max(vTempBufSize, vCaps.FeatureReportByteLength);
+ vpTempBuf = new char[vTempBufSize];
+
+ HidD_FreePreparsedData(PreparsedData);
+}
+
+int UsbHidDevice_Impl::ReadInputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize, bool CtrlTrans)
+{
+ unsigned long retval = 0;
+ DWORD res = FALSE;
+
+ if (vhDevice == NULL || vhDevice == INVALID_HANDLE_VALUE)
+ return 0;
+
+ //The first byte is the report number.
+ //memset(vpTempBuf, 0, vTempBufSize);
+ vpTempBuf[0] = RepNo;
+
+ if (CtrlTrans)
+ {
+ //Read a report from the device using a control transfer.
+ res = HidD_GetInputReport(vhDevice, vpTempBuf, vCaps.InputReportByteLength);
+ if (res)
+ {
+ memcpy(pBuf, vpTempBuf + 1, std::min(BufSize, vTempBufSize));
+ retval = vCaps.InputReportByteLength - 1;
+ }
+ }
+ else
+ {
+ res = ReadFile(vhDevice, vpTempBuf, vCaps.InputReportByteLength,
+ &retval, (LPOVERLAPPED)&vRdOverlapped);
+
+ res = WaitForSingleObject(vRdOverlapped.hEvent, 6000);
+
+ switch (res)
+ {
+ case WAIT_OBJECT_0:
+ res = GetOverlappedResult(vhDevice, &vRdOverlapped, &retval, true);
+
+ //memcpy(pBuf, vpTempBuf + 1, std::min(BufSize, vTempBufSize));
+ ProcessInputReport(RepNo, (uint8_t*)vpTempBuf + 1, std::min(BufSize, vTempBufSize));
+ break;
+ case WAIT_TIMEOUT:
+
+ res = CancelIo(vhDevice);
+
+ break;
+ default:
+ ;
+ }
+
+ //ResetEvent(vhEvent);
+
+ }
+
+ return retval;
+}
+
+bool UsbHidDevice_Impl::WriteOutputReport(int RepNo, uint8_t *pBuf, uint32_t BufSize, bool CtrlTrans)
+{
+ //Send a report to the device.
+
+ DWORD BytesWritten = 0;
+ INT Index =0;
+ ULONG res;
+ bool retval = false;
+
+ if (vhDevice == NULL || vhDevice == INVALID_HANDLE_VALUE)
+ return false;
+
+ //The first byte is the report number.
+ vpTempBuf[0] = RepNo;
+ int len = BufSize;//std::min(BufSize, vCaps.OutputReportByteLength);
+ memcpy(vpTempBuf + 1, pBuf, len);
+
+ if (CtrlTrans)
+ {
+ // Send a control report to the device.
+ res = HidD_SetOutputReport(vhDevice, vpTempBuf, vCaps.OutputReportByteLength);
+ if (res)
+ {
+ retval = true;
+ }
+ }
+ else
+ {
+ res = WriteFile(vhDevice, vpTempBuf, vCaps.OutputReportByteLength,
+ &BytesWritten, (LPOVERLAPPED)&vWrOverlapped);
+ res = WaitForSingleObject(vWrOverlapped.hEvent, 6000);
+
+ switch (res)
+ {
+ case WAIT_OBJECT_0:
+ retval = true;
+ break;
+ case WAIT_TIMEOUT:
+ res = CancelIo(vhDevice);
+
+ break;
+ default:
+ ;
+ }
+ //ResetEvent(vhEvent);
+
+ }
+
+ return retval;
+}
+
+int UsbHidDevice_Impl::ReadFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize)
+{
+ // Read a Feature report from the device.
+ bool res = false;
+ int retval = 0;
+
+ //The first byte is the report number.
+ memset(vpTempBuf, 0, vTempBufSize);
+ vpTempBuf[0] = RepNo;
+
+ //Read a report from the device.
+
+ /*
+ HidD_GetFeature
+ Returns:
+ True on success
+ Requires:
+ A device handle returned by CreateFile.
+ A buffer to hold the report.
+ The report length returned by HidP_GetCaps in Capabilities.InputReportByteLength.
+ */
+
+ if (vhDevice != INVALID_HANDLE_VALUE)
+ res = HidD_GetFeature(vhDevice, vpTempBuf, vCaps.FeatureReportByteLength);
+ if (res)
+ {
+ memcpy(pBuf, vpTempBuf + 1, min(vCaps.FeatureReportByteLength, (unsigned short)BufSize));
+ retval = vCaps.FeatureReportByteLength;
+ }
+ else
+ {
+ //The read attempt failed, so close the handles, display a message,
+ //and set MyDeviceDetected to FALSE so the next attempt will look for the device.
+
+ }
+
+ return retval;
+}
+
+bool UsbHidDevice_Impl::WriteFeatureReport(int RepNo, uint8_t *pBuf, uint32_t BufSize)
+{
+ //Send a report to the device.
+ DWORD BytesWritten = 0;
+ INT Index =0;
+ ULONG res = 0;
+
+ //The first byte is the report number.
+ memset(vpTempBuf, 0, vTempBufSize);
+ vpTempBuf[0] = RepNo;
+
+ memcpy(&vpTempBuf[1], pBuf, min(BufSize, (uint32_t)vCaps.FeatureReportByteLength));
+
+ //Send a report to the device.
+
+ /*
+ HidD_SetFeature
+ Sends a report to the device.
+ Returns: success or failure.
+ Requires:
+ A device handle returned by CreateFile.
+ A buffer that holds the report.
+ The Output Report length returned by HidP_GetCaps,
+ */
+
+ if (vhDevice != INVALID_HANDLE_VALUE)
+ res = HidD_SetFeature(vhDevice, vpTempBuf, vCaps.FeatureReportByteLength);
+
+ if (!res)
+ {
+ //The write attempt failed, so close the handles, display a message,
+ //and set MyDeviceDetected to FALSE so the next attempt will look for the device.
+
+ }
+ else
+ {
+ }
+
+ return res;
+}
+
+bool UsbHidDevice_Impl::WaitResponse(int TimeoutSec)
+{
+ return true;
+}
+
+bool UsbHidDevice_Impl::GetSerialNumber(std::wstring &sn)
+{
+ wchar_t buf[256];
+ bool retval = HidD_GetSerialNumberString(vhDevice, buf, 255*2);
+ if (retval)
+ {
+ sn = buf;
+ }
+
+ return retval;
+}
+
+bool UsbHidDevice_Impl::GetSerialNumber(std::string &sn)
+{
+ wchar_t buf[256];
+ bool retval = HidD_GetSerialNumberString(vhDevice, buf, 255*2);
+ if (retval)
+ {
+ sn.assign(&buf[0], &buf[wcslen(buf)]);
+ }
+
+ return retval;
+}
+
+bool UsbHidDevice_Impl::GetProductString(std::wstring &pd)
+{
+ wchar_t buf[256];
+ bool retval = HidD_GetProductString(vhDevice, buf, 255*2);
+ if (retval)
+ {
+ pd = buf;
+ }
+
+ return retval;
+}
+
+
+int UsbHidFindDevice(int VendId, int ProdId, USBHIDFOUNDCB Callback)
+{
+ bool retval = false;
+ HIDD_ATTRIBUTES hidatt;
+ DWORD DeviceUsage;
+ SP_DEVICE_INTERFACE_DATA devdata;
+ PSP_DEVICE_INTERFACE_DETAIL_DATA devdetaildata = NULL;
+ LONG res;
+ std::string UsageDescription;
+ GUID hidguid;
+ DWORD length = 0;
+ HANDLE hiddev = NULL;
+ int idx = 0;
+ int devcnt = 0;
+
+ HidD_GetHidGuid(&hidguid);
+
+ HDEVINFO hdevinfo = SetupDiGetClassDevs(&hidguid, NULL, NULL,
+ DIGCF_PRESENT | DIGCF_INTERFACEDEVICE);
+
+ devdata.cbSize = sizeof(devdata);
+
+ do
+ {
+ res = SetupDiEnumDeviceInterfaces(hdevinfo, 0, &hidguid, idx, &devdata);
+
+ if (res != 0)
+ {
+ // A device has been detected, so get more information about it.
+
+ // Get the Length value.
+ // The call will return with a "buffer too small" error which can be ignored.
+
+ res = SetupDiGetDeviceInterfaceDetail(hdevinfo, &devdata,
+ NULL, 0, &length, NULL);
+
+ // Allocate memory for the hDevInfo structure, using the returned Length.
+
+ devdetaildata = (SP_DEVICE_INTERFACE_DETAIL_DATA*) new char[length];
+
+ // Set cbSize in the detailData structure.
+
+ devdetaildata->cbSize = sizeof(SP_DEVICE_INTERFACE_DETAIL_DATA);
+
+ // Call the function again, this time passing it the returned buffer size.
+ ULONG Required;
+
+ res = SetupDiGetDeviceInterfaceDetail(hdevinfo, &devdata,
+ devdetaildata, length,
+ &Required, NULL);
+ if (devdetaildata->DevicePath)
+ // Open a handle to the device.
+ // To enable retrieving information about a system mouse or keyboard,
+ // don't request Read or Write access for this handle.
+
+ hiddev = CreateFile(devdetaildata->DevicePath, GENERIC_READ | GENERIC_WRITE,
+ FILE_SHARE_READ | FILE_SHARE_WRITE,
+ (LPSECURITY_ATTRIBUTES)NULL, OPEN_EXISTING,
+ FILE_FLAG_OVERLAPPED, NULL);
+
+ hidatt.Size = sizeof(hidatt);
+
+ HidD_GetAttributes(hiddev, &hidatt);
+
+ if (hidatt.VendorID == VendId && hidatt.ProductID == ProdId)
+ {
+ // Found our device
+ PHIDP_PREPARSED_DATA PreparsedData;
+ if (HidD_GetPreparsedData(hiddev, &PreparsedData))
+ {
+ //HIDP_CAPS caps;
+ //NTSTATUS res = HidP_GetCaps(PreparsedData, &caps);
+ //if (res == HIDP_STATUS_SUCCESS)
+ {
+ }
+ bool res = Callback(hiddev);
+ if (res == false)
+ {
+ // Rejected
+ CloseHandle(hiddev);
+ hiddev = NULL;
+ }
+ else
+ devcnt++;
+ }
+ else
+ {
+ // Not our device.
+ CloseHandle(hiddev);
+ hiddev = NULL;
+ }
+ }
+ else
+ {
+ // Not our device.
+ CloseHandle(hiddev);
+ hiddev = NULL;
+ }
+ delete devdetaildata;
+ }
+
+ idx++;
+ } while (res != 0);
+
+ SetupDiDestroyDeviceInfoList(hdevinfo);
+
+ return devcnt;
+}
+
diff --git a/ARM/NXP/LPC11xx/exemples/UartPrbsTest/src/main.cpp b/exemples/uart/uart_prbs_tx.cpp
similarity index 66%
rename from ARM/NXP/LPC11xx/exemples/UartPrbsTest/src/main.cpp
rename to exemples/uart/uart_prbs_tx.cpp
index 922ccf7b..7163add8 100644
--- a/ARM/NXP/LPC11xx/exemples/UartPrbsTest/src/main.cpp
+++ b/exemples/uart/uart_prbs_tx.cpp
@@ -1,9 +1,9 @@
/*--------------------------------------------------------------------------
-File : main.cpp
+File : uart_prbs_tx.cpp
Author : Hoang Nguyen Hoan Aug. 31, 2016
-Desc : UART PRBS test
+Desc : UART PRBS transmit test
Demo code using EHAL library to do PRBS transmit test using UART
Copyright (c) 2016, I-SYST inc., all rights reserved
@@ -39,59 +39,47 @@ Modified by Date Description
#include "uart.h"
#include "prbs.h"
-#define UART_RXD_PORT 0
-#define UART_RXD_PIN 18
-#define UART_RXD_PINOP 1
-#define UART_TXD_PORT 0
-#define UART_TXD_PIN 19
-#define UART_TXD_PINOP 1
-#define UART_CTS_PORT 0
-#define UART_CTS_PIN 7
-#define UART_CTS_PINOP 1
-#define UART_RTS_PORT 0
-#define UART_RTS_PIN 17
-#define UART_RTS_PINOP 1
+// This include contain i/o definition the board in use
+#include "board.h"
int nRFUartEvthandler(UARTDEV *pDev, UART_EVT EvtId, uint8_t *pBuffer, int BufferLen);
-#define CFIFOMEMSIZE (256)
+#define FIFOSIZE CFIFO_MEMSIZE(256)
-uint8_t g_RxBuff[CFIFOMEMSIZE];
-uint8_t g_TxBuff[CFIFOMEMSIZE];
+uint8_t g_TxBuff[FIFOSIZE];
-static const IOPINCFG s_UartPins[] = {
- {UART_RXD_PORT, UART_RXD_PIN, UART_RXD_PINOP, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RX
- {UART_TXD_PORT, UART_TXD_PIN, UART_TXD_PINOP, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // TX
-#ifdef FLOWCTRL
- {UART_CTS_PORT, UART_CTS_PIN, UART_CTS_PINOP, IOPINDIR_INPUT, IOPINRES_PULLDOWN, IOPINTYPE_NORMAL}, // CTS
- {UART_RTS_PORT, UART_RTS_PIN, UART_RTS_PINOP, IOPINDIR_OUTPUT, IOPINRES_FOLLOW, IOPINTYPE_NORMAL}, // RTS
-#endif
+static IOPINCFG s_UartPins[] = {
+ {UART_RX_PORT, UART_RX_PIN, UART_RX_PINOP, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RX
+ {UART_TX_PORT, UART_TX_PIN, UART_TX_PINOP, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // TX
+ {UART_CTS_PORT, UART_CTS_PIN, UART_CTS_PINOP, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // CTS
+ {UART_RTS_PORT, UART_RTS_PIN, UART_RTS_PINOP, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL},// RTS
};
// UART configuration data
const UARTCFG g_UartCfg = {
0,
- &s_UartPins,
- sizeof(s_UartPins)/sizeof(IOPINCFG),
- 1000000, // Rate
+ s_UartPins,
+ sizeof(s_UartPins) / sizeof(IOPINCFG),
+ 1000000, // Rate
8,
UART_PARITY_NONE,
- 1, // Stop bit
+ 1, // Stop bit
UART_FLWCTRL_NONE,
true,
- 1, // use APP_IRQ_PRIORITY_LOW with Softdevice
+ 1, // use APP_IRQ_PRIORITY_LOW with Softdevice
nRFUartEvthandler,
- CFIFOMEMSIZE,
- g_RxBuff,
- CFIFOMEMSIZE,
+ true, // fifo blocking mode
+ 0,
+ NULL,
+ FIFOSIZE,
g_TxBuff,
};
#ifdef DEMO_C
-// For C
+// For C programming
UARTDEV g_UartDev;
#else
-// For C++
+// For C++ object programming
// UART object instance
UART g_Uart;
#endif
@@ -116,21 +104,6 @@ int nRFUartEvthandler(UARTDEV *pDev, UART_EVT EvtId, uint8_t *pBuffer, int Buffe
return cnt;
}
-
-
-//
-// Print a greeting message on standard output and exit.
-//
-// On embedded platforms this might require semi-hosting or similar.g
-//
-// For example, for toolchains derived from GNU Tools for Embedded,
-// to enable semi-hosting, the following was added to the linker:
-//
-// --specs=rdimon.specs -Wl,--start-group -lgcc -lc -lc -lm -lrdimon -Wl,--end-group
-//
-// Adjust it for other toolchains.
-//
-
int main()
{
bool res;
diff --git a/ARM/Nordic/nRF52/exemples/UartPrbsTest/src/main.cpp b/exemples/uart/uart_retarget_demo.cpp
similarity index 55%
rename from ARM/Nordic/nRF52/exemples/UartPrbsTest/src/main.cpp
rename to exemples/uart/uart_retarget_demo.cpp
index 0ca16808..57446128 100644
--- a/ARM/Nordic/nRF52/exemples/UartPrbsTest/src/main.cpp
+++ b/exemples/uart/uart_retarget_demo.cpp
@@ -1,10 +1,12 @@
/*--------------------------------------------------------------------------
-File : main.cpp
+File : uart_retarget_demo.cpp
-Author : Hoang Nguyen Hoan Aug. 31, 2016
+Author : Hoang Nguyen Hoan Nov. 16, 2016
-Desc : UART PRBS test
- Demo code using EHAL library to do PRBS transmit test using UART
+Desc : UART retarget demo
+ Demo code using EHAL library to show how to remap stdio in/out
+ over UART. This is to allow using the standard printf/scanf
+ functionality through UART interface.
Copyright (c) 2016, I-SYST inc., all rights reserved
@@ -37,39 +39,22 @@ Modified by Date Description
#include "iopincfg.h"
#include "uart.h"
-#include "blueio_board.h"
-#include "prbs.h"
+#include "stddev.h"
-//#define NORDIC_DK
-
-#ifdef NORDIC_DK
-#define UART_TX_PIN 9//7
-#define UART_RX_PIN 11//8
-#define UART_RTS_PIN 8//11
-#define UART_CTS_PIN 10//12
-#else
-#define UART_TX_PIN BLUEIO_UART_TX
-#define UART_RX_PIN BLUEIO_UART_RX
-#define UART_RTS_PIN BLUEIO_UART_RTS
-#define UART_CTS_PIN BLUEIO_UART_CTS
-#endif
+// This include contain i/o definition the board in use
+#include "board.h"
int nRFUartEvthandler(UARTDEV *pDev, UART_EVT EvtId, uint8_t *pBuffer, int BufferLen);
-#define CFIFOMEMSIZE (256)
+#define FIFOSIZE CFIFO_MEMSIZE(256)
-uint8_t g_RxBuff[CFIFOMEMSIZE];
-uint8_t g_TxBuff[CFIFOMEMSIZE];
+uint8_t g_TxBuff[FIFOSIZE];
static IOPINCFG s_UartPins[] = {
- {0, UART_RX_PIN, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RX
- {0, UART_TX_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // TX
- {0, UART_CTS_PIN, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // CTS
- {0, UART_RTS_PIN, 0, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RTS
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // DCD
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // DTE
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // DTR
-// {-1, -1, 0, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RI
+ {UART_RX_PORT, UART_RX_PIN, UART_RX_PINOP, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // RX
+ {UART_TX_PORT, UART_TX_PIN, UART_TX_PINOP, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // TX
+ {UART_CTS_PORT, UART_CTS_PIN, UART_CTS_PINOP, IOPINDIR_INPUT, IOPINRES_NONE, IOPINTYPE_NORMAL}, // CTS
+ {UART_RTS_PORT, UART_RTS_PIN, UART_RTS_PINOP, IOPINDIR_OUTPUT, IOPINRES_NONE, IOPINTYPE_NORMAL},// RTS
};
// UART configuration data
@@ -77,25 +62,26 @@ const UARTCFG g_UartCfg = {
0,
s_UartPins,
sizeof(s_UartPins) / sizeof(IOPINCFG),
- 1000000, // Rate
+ 1000000, // Rate
8,
UART_PARITY_NONE,
- 1, // Stop bit
+ 1, // Stop bit
UART_FLWCTRL_NONE,
true,
- 1, // use APP_IRQ_PRIORITY_LOW with Softdevice
+ 1, // use APP_IRQ_PRIORITY_LOW with Softdevice
nRFUartEvthandler,
- CFIFOMEMSIZE,
- g_RxBuff,
- CFIFOMEMSIZE,
+ true, // fifo blocking mode
+ 0,
+ NULL,
+ FIFOSIZE,
g_TxBuff,
};
#ifdef DEMO_C
-// For C
+// For C programming
UARTDEV g_UartDev;
#else
-// For C++
+// For C++ object programming
// UART object instance
UART g_Uart;
#endif
@@ -120,44 +106,28 @@ int nRFUartEvthandler(UARTDEV *pDev, UART_EVT EvtId, uint8_t *pBuffer, int Buffe
return cnt;
}
-
-
-//
-// Print a greeting message on standard output and exit.
-//
-// On embedded platforms this might require semi-hosting or similar.g
-//
-// For example, for toolchains derived from GNU Tools for Embedded,
-// to enable semi-hosting, the following was added to the linker:
-//
-// --specs=rdimon.specs -Wl,--start-group -lgcc -lc -lc -lm -lrdimon -Wl,--end-group
-//
-// Adjust it for other toolchains.
-//
-
int main()
{
bool res;
#ifdef DEMO_C
res = UARTInit(&g_UartDev, &g_UartCfg);
+ UARTRetargetEnable(&g_UartDev, STDIN_FILENO);
+ UARTRetargetEnable(&g_UartDev, STDOUT_FILENO);
#else
res = g_Uart.Init(g_UartCfg);
+ UARTRetargetEnable(g_Uart, STDIN_FILENO);
+ UARTRetargetEnable(g_Uart, STDOUT_FILENO);
#endif
- uint8_t d = 0xff;
+ char buff[512];
+ printf("Hello, welcome to UART retarget demo\r\n");
while(1)
{
-#ifdef DEMO_C
- if (UARTTx(&g_UartDev, &d, 1) > 0)
-#else
- if (g_Uart.Tx(&d, 1) > 0)
-#endif
- {
- // If success send next code
- d = Prbs8(d);
- }
+ printf("Please type something then press enter\r\n");
+ scanf("%s", &buff);
+ printf("You typed : '%s'\r\n", buff);
}
return 0;
}
diff --git a/include/cfifo.h b/include/cfifo.h
index d6b5b11e..e64423a5 100755
--- a/include/cfifo.h
+++ b/include/cfifo.h
@@ -44,6 +44,8 @@ typedef struct {
volatile int32_t PutIdx; // Idx to start of empty data block
volatile int32_t GetIdx; // Idx to start of used data block
int32_t MaxIdxCnt; // Max block count
+ bool bBlocking; // False to push out when fifo is full (drop)
+ uint32_t DropCnt; // Count dropped block
uint32_t BlkSize; // Block size in bytes
uint32_t MemSize; // Total fifo memory size allocated
uint8_t *pMemStart; // Start of fifo data memory
@@ -65,10 +67,13 @@ extern "C" {
* @params pMemBlk : Pointer to memory block to be used for fifo
* TotalMemSize : Total memory size in byte
* BlkSize : Block size in bytes
- *
+ * bBlocking : Behavior when fifo is full.
+ * false - Old data will be pushed out to make place
+ * for new data
+ * true - New data will not be pushed in
* @return CFifo Handle
*/
-HCFIFO CFifoInit(uint8_t *pMemBlk, uint32_t TotalMemSize, uint32_t BlkSize);
+HCFIFO CFifoInit(uint8_t *pMemBlk, uint32_t TotalMemSize, uint32_t BlkSize, bool bDrop);
/*
* Retrieve FIFO data by returning pointer to data block
diff --git a/include/diskio.h b/include/diskio.h
index ba270c37..23dc6ebb 100755
--- a/include/diskio.h
+++ b/include/diskio.h
@@ -35,10 +35,11 @@ Modified by Date Description
#define __DISKIO_H__
#include
-#include
-#define DISKIO_SECT_SIZE 512
-#define DISKIO_CACHE_SECT_MAX 1
+#define DISKIO_SECT_SIZE 512 // Disk sector size in bytes
+#define DISKIO_CACHE_SECT_MAX 1 // Max number of cache sector
+#define DISKIO_CACHE_DIRTY_BIT (1<<31) // This bit is set in the UseCnt if there was
+ // write to the cache
#pragma pack(push, 1)
typedef struct _DiskPartition {
@@ -61,14 +62,12 @@ typedef struct _MasterBootRecord {
#pragma pack(push, 4)
-#define DISKIO_CACHE_DIRTY_BIT (1<<31) // This bit is set in the UseCnt if there was
- // write to the cache
-typedef struct _Sect_Desc {
- volatile int UseCnt; // semaphore
- uint32_t SectNo; // sector number of this cache
- uint8_t *pSectData; // sector data
-} SECTDESC;
+typedef struct _Cache_Desc {
+ volatile int UseCnt; // semaphore
+ uint32_t SectNo; // sector number of this cache
+ uint8_t SectData[DISKIO_SECT_SIZE]; // sector data
+} DISKIO_CACHE_DESC;
#pragma pack(pop)
@@ -77,12 +76,12 @@ class DiskIO {
DiskIO();
virtual int GetSectSize(void) { return DISKIO_SECT_SIZE; }
- virtual uint32_t GetNbSect(void) = 0;
+ virtual uint32_t GetNbSect(void) { return GetSize() / GetSectSize(); }
/**
*
- * @return total disk size in KB
+ * @return total disk size in BYTE
*/
- virtual uint32_t GetSize(void) = 0;
+ virtual uint64_t GetSize(void) = 0;
/**
* Read one sector from physical device
@@ -111,16 +110,15 @@ class DiskIO {
*/
virtual void Erase() {}
int GetCacheSect(uint32_t SectNo, bool bLock = false);
- void SetCache(uint8_t *pCacheBlk, uint32_t CacheSize);
+ void SetCache(DISKIO_CACHE_DESC *pCacheBlk, int NbCacheBlk);
void Flush();
protected:
private:
- int vLastIdx; // Last cache sector used
- int vNbCache;
- bool vExtCache;
- SECTDESC *vpCacheSect;//[DISKIO_CACHE_SECT_MAX];
+ int vLastIdx; // Last cache sector accessed
+ int vNbCache; // Number of cache sector
+ DISKIO_CACHE_DESC *vpCacheSect;
};
#ifdef __cplusplus
diff --git a/include/diskio_flash.h b/include/diskio_flash.h
index bd0bc154..3c55f6b9 100755
--- a/include/diskio_flash.h
+++ b/include/diskio_flash.h
@@ -4,6 +4,10 @@ File : diskio_flash.h
Author : Hoang Nguyen Hoan Aug. 30, 2016
Desc : Generic flash disk I/O driver class
+ NOTE : Most Flash devices work in MSB bit order
+ This implementation only support MSB.
+ Make sure that the Flash is configure
+ for MSB mode
Copyright (c) 2016, Motsai, all rights reserved
@@ -36,26 +40,81 @@ Modified by Date Description
#include
#include "diskio.h"
-
-
+#include "serialintrf.h"
+
+#define FLASH_CMD_READID 0x9F
+#define FLASH_CMD_WRITE 0x2
+#define FLASH_CMD_READ 0x3
+#define FLASH_CMD_WRDISABLE 0x4
+#define FLASH_CMD_READSTATUS 0x5
+#define FLASH_CMD_WRENABLE 0x6
+#define FLASH_CMD_BLOCK_ERASE 0xD8
+#define FLASH_CMD_BULK_ERASE 0xC7
+
+#define FLASH_STATUS_WIP (1<<0) // Write In Progress
+
+/**
+ * @brief FlashDiskIO callback function
+ * This a general callback function hook for special purpose
+ * defined in the FLASHDISKIO_CFG
+ *
+ * @param DevNo : Device number or address used by the interface
+ * @param pInterf : Interface used to access the flash (SPI, I2C or whatever
+ * @return true - Success
+ * false - Failed.
+ */
+typedef bool (*FLASHDISKIOCB)(int DevNo, SerialIntrf *pInterf);
+
+typedef struct {
+ int DevNo; // Device number or address for interface use
+ uint64_t TotalSize; // Total Flash size in bytes
+ uint32_t EraseSize; // Min erasable block size in byte
+ uint32_t WriteSize; // Writable page size in bytes
+ int AddrSize; // Address size in bytes
+ FLASHDISKIOCB pInitCB; // For custom initialization. Set to NULL if not used
+ FLASHDISKIOCB pWaitCB; // If provided, this is called when there are
+ // long delays, such as mass erase, to allow application
+ // to perform other tasks while waiting
+} FLASHDISKIO_CFG;
+
+/*
+ * NOTE : Most Flash devices work in MSB bit order. This implementation
+ * only supports MSB mode. Make sure that the Flash is configured
+ * for MSB mode.
+ *
+ */
class FlashDiskIO : public DiskIO {
public:
- FlashDiskIO() : DiskIO() {}
+ FlashDiskIO();
virtual ~FlashDiskIO() {}
- /**
+ bool Init(FLASHDISKIO_CFG &Cfg, SerialIntrf *pInterf,
+ DISKIO_CACHE_DESC *pCacheBlk = NULL, int NbChaceBlk = 0);
+
+ /**
+ *
+ * @return total disk size in BYTE
+ */
+ virtual uint64_t GetSize(void) { return vTotalSize; }
+
+ /**
* Device specific minimum erase size in bytes
*
* @return
*/
- virtual uint32_t GetMinEraseSize() = 0;
+ virtual uint32_t GetMinEraseSize() { return vEraseSize; }
/**
* Device specific minimum write size in bytes
*
* @return
*/
- virtual uint32_t GetMinWriteSize() { return 0;}
+ virtual uint32_t GetMinWriteSize() { return vWriteSize; }
+
+ /**
+ * Mass erase
+ */
+ virtual void Erase();
/**
* Erase Flash block.
@@ -63,8 +122,34 @@ class FlashDiskIO : public DiskIO {
* @param BlkNo : Starting block number to erase.
* NbBlk : Number of consecutive blocks to erase
*/
- virtual void EraseBlock(uint32_t BlkNo, int NbBlk) = 0;
- virtual bool EraseUptoAddress(uint64_t addr) { return false; }
+ virtual void EraseBlock(uint32_t BlkNo, int NbBlk);
+
+ /**
+ * Read one sector from physical device
+ */
+ virtual bool SectRead(uint32_t SectNo, uint8_t *pData);
+
+ /**
+ * Write one sector to physical device
+ */
+ virtual bool SectWrite(uint32_t SectNo, uint8_t *pData);
+
+ uint32_t ReadId();
+ uint8_t ReadStatus();
+
+protected:
+ void WriteDisable();
+ bool WriteEnable(uint32_t Timeout = 100000);
+ bool WaitReady(uint32_t Timeout = 100000, uint32_t usRtyDelay = 0);
+
+private:
+ uint32_t vEraseSize; // Min erasable block size in byte
+ uint32_t vWriteSize; // Min writable size in bytes
+ uint64_t vTotalSize; // Total Flash size in bytes
+ int vAddrSize; // Address size in bytes
+ int vDevNo;
+ SerialIntrf *vpInterf;
+ FLASHDISKIOCB vpWaitCB;
};
#ifdef __cplusplus
diff --git a/include/i2c.h b/include/i2c.h
index bd57424d..e062bd9f 100755
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -143,6 +143,7 @@ class I2C : public SerialIntrf {
I2C(I2C&); // Copy ctor not allowed
bool Init(I2CCFG &CfgData) { return I2CInit(&vDevData, &CfgData); }
+ operator SERINTRFDEV*() { return &vDevData.SerIntrf; }
operator I2CDEV& () { return vDevData; }; // Get config data
int Rate(int RateHz) { return SerialIntrfSetRate(&vDevData.SerIntrf, RateHz); }
int Rate(void) { return vDevData.Rate; }; // Get rate in Hz
diff --git a/include/istddef.h b/include/istddef.h
index 5107e1c6..5d961f0f 100644
--- a/include/istddef.h
+++ b/include/istddef.h
@@ -61,21 +61,33 @@ typedef bool Bool;
#endif
#pragma pack(push, 1)
+
+#define ISYST_BLUETOOTH_ID 0x0177 // I-SYST Bluetooth company identifier
+
typedef struct {
- char Name[16]; // Application signature
union { // Verison number
uint16_t Vers;
struct {
- uint32_t Minor:8;
- uint32_t Major:8;
+ unsigned Minor:8;
+ unsigned Major:8;
};
- uint16_t SubVers; // User specific subversion
};
+ uint16_t SubVers;
uint32_t Build; // Build number
- uint8_t Private[16]; // 16 bytes private data
} VERS;
#pragma pack(pop)
+#define APPINFO_NAMESIZE_MAX 16
+#define APPINFO_PRIVATESIZE_MAX 16
+
+#pragma pack(push, 4)
+typedef struct {
+ char Name[APPINFO_NAMESIZE_MAX]; // Application signature
+ VERS Vers;
+ uint8_t Private[APPINFO_PRIVATESIZE_MAX]; // APPINFO_PRIVATESIZE_MAX bytes private data
+} APP_INFO;
+#pragma pack(pop)
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -90,9 +102,6 @@ static inline int min(int x, int y) { return x > y ? y : x; }
static inline int max(int x, int y) { return x > y ? x : y; }
#endif
-//uint32_t DisableInterrupt();
-//void EnableInterrupt(uint32_t State);
-
#ifdef __cplusplus
}
#endif
diff --git a/include/sdcard.h b/include/sdcard.h
index 69e50034..31eb4475 100755
--- a/include/sdcard.h
+++ b/include/sdcard.h
@@ -78,7 +78,7 @@ class SDCard : public DiskIO {
SDCard();
virtual ~SDCard();
- virtual bool Init(SerialIntrf *pSerInterf, uint8_t *pCacheBlk = NULL, size_t CacheSize = 0);
+ virtual bool Init(SerialIntrf *pSerInterf, DISKIO_CACHE_DESC *pCacheBlk = NULL, int NbCacheBlk = 0);
int Cmd(uint8_t Cmd, uint32_t param);
int GetResponse(uint8_t *pBuff, int BuffLen);
int ReadData(uint8_t *pBuff, int BuffLen);
@@ -86,7 +86,7 @@ class SDCard : public DiskIO {
int GetSectSize(void);
uint32_t GetNbSect(void);
// @return size in KB
- uint32_t GetSize(void);
+ uint64_t GetSize(void);
int ReadSingleBlock(uint32_t Addr, uint8_t *pData, int Len);
int WriteSingleBlock(uint32_t Addr, uint8_t *pData, int Len);
bool SectRead(uint32_t SectNo, uint8_t *pData) {
diff --git a/include/seep.h b/include/seep.h
index 342f7419..9dd7529c 100755
--- a/include/seep.h
+++ b/include/seep.h
@@ -37,56 +37,148 @@ Modified by Date Description
#include
#include "serialintrf.h"
-
-#define SEEP_NB_IOPIN 2
+#include "iopincfg.h"
#pragma pack(push,4)
+/**
+ * @brief SEEP callback function
+ * This is a general callback function hook for special purpose
+ * defined in SEEP_CFG
+ *
+ * @param DevAddr : Device address
+ * pInterf : Pointer to physical interface connected to the device
+ */
+typedef bool (*SEEPCB)(int DevAddr, SERINTRFDEV *pInterf);
+
+typedef struct _Seep_Config {
+ uint8_t DevAddr; // Device address
+ uint8_t AddrLen; // Serial EEPROM memory address length in bytes
+ uint16_t PageSize; // Wrap around page size in bytes
+ uint32_t Size; // Total EEPROM size in bytes
+ IOPINCFG WrProtPin; // if Write protect pin is not used, set {-1, -1, }
+ // This pin is assumed active high,
+ // ie. Set to 1 to enable Write Protect
+ SEEPCB pInitCB; // For custom initialization. Set to NULL if not used
+ SEEPCB pWaitCB; // If provided, this is called when there are long delays
+ // for a device to complete its write cycle
+ // This is to allow application to perform other tasks
+ // while waiting. Set to NULL is not used
+} SEEP_CFG;
+
typedef struct {
- int DevAddr;
- int AddrLen;
- int PageSize;
- SERINTRFDEV *pSerIntrf;
+ uint8_t DevAddr; // Device address
+ uint8_t AddrLen; // Serial EEPROM memory address length in bytes
+ uint16_t PageSize; // Wrap around page size
+ uint32_t Size; // Total EEPROM size in bytes
+ IOPINCFG WrProtPin; // Write protect I/O pin
+ SERINTRFDEV *pInterf;
+ SEEPCB pWaitCB; // If provided, this is called when there are long delays
+ // for a device to complete its write cycle
+ // This is to allow application to perform other tasks
+ // while waiting. Set to NULL is not used
} SEEPDEV;
#pragma pack(pop)
#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize Serial EEPROM driver
+ *
+ * @param pDev : Pointer to driver data to be initialized
+ * pCfgData : Pointer to serial EEPROM configuration data
+ * pInterf : Pointer to the interface device on which the SEEPROM
+ * is connected to
+ *
+ * @return true - initialization successful
+ */
+bool SeepInit(SEEPDEV *pDev, SEEP_CFG *pCfgData, SERINTRFDEV *pInterf);
+
+/**
+ * @brief Get EEPROM size
+ *
+ * @param pDev : Pointer to driver data
+ *
+ * @return Total size in bytes
+ */
+static inline uint32_t SeepGetSize(SEEPDEV *pDev) {
+ return pDev ? pDev->Size : 0;
+}
+
+/**
+ * @brief Get EEPROM page size
+ *
+ * @param pDev : Pointer to driver data
+ *
+ * @return Page size in bytes
+ */
+static inline uint16_t SeepGetPageSize(SEEPDEV *pDev) {
+ return pDev? pDev->PageSize : 0;
+}
-#include
+/**
+ * @brief Read Serial EEPROM data
+ *
+ * @param pDev : Pointer to driver data
+ * Address : Memory address to read
+ * pBuff : Pointer to buffer to receive data
+ * Len : Size of the buffer in bytes
+ *
+ * @return Number of bytes read
+ */
+int SeepRead(SEEPDEV *pDev, int Addr, uint8_t *pBuff, int Len);
+
+/**
+ * @brief Write to data to Serial EEPROM
+ *
+ * @param pDev : Pointer to driver data
+ * Address : Memory address to write
+ * pData : Pointer to data to write
+ * Len : Number of bytes to write
+ *
+ * @return Number of bytes written
+ */
+int SeepWrite(SEEPDEV *pDev, int Addr, uint8_t *pData, int Len);
+
+/**
+ * @brief Set the write protect pin
+ *
+ * @param pDev : Pointer to driver data
+ * bVal : true - Enable write protect
+ * false - Disable write protect
+ */
+void SeepSetWriteProt(SEEPDEV *pDev, bool bVal);
+
+#ifdef __cplusplus
+}
class Seep {
public:
- Seep();
- virtual ~Seep();
- Seep(Seep&); // copy ctor not allowed
-
- virtual bool Init(int DevAddr, int PageSize, int AddrLen, SerialIntrf *pInterf);
- virtual void Set(int DevAddr, int PageSize, int AddrLen) {
- vDevAddr = DevAddr;
- vPageSize = PageSize;
- vAddrLen = AddrLen;
- }
- virtual int Read(int Addr, uint8_t *pData, int Len);
- virtual int Write(int Addr, uint8_t *pData, int Len);
+ Seep();
+ virtual ~Seep();
+ Seep(Seep&); // copy ctor not allowed
+
+ virtual bool Init(SEEP_CFG &Cfg, SerialIntrf *pInterf);
+
+/* virtual void Set(int DevAddr, int PageSize, int AddrLen) {
+ vDevData.DevAddr = DevAddr;
+ vDevData.PageSize = PageSize;
+ vDevData.AddrLen = AddrLen;
+ }*/
+ virtual int Read(int Addr, uint8_t *pBuff, int Len) { return SeepRead(&vDevData, Addr, pBuff, Len); }
+ virtual int Write(int Addr, uint8_t *pData, int Len) { return SeepWrite(&vDevData, Addr, pData, Len); }
+
+ uint32_t GetSize() { return vDevData.Size; }
+ uint16_t GetPageSize() { return vDevData.PageSize; }
+ operator SEEPDEV* () { return &vDevData; }
protected:
- //std::shared_ptr vpInterf;
- int vDevAddr; // SEEP I2C address
- int vPageSize;
- int vAddrLen;
- SerialIntrf *vpInterf;
+ SEEPDEV vDevData;
};
-extern "C" {
-#endif
-// C prototypes
-bool SeepInit(SEEPDEV *pDev, int DevAddr, int PageSize, int AddrLen, SERINTRFDEV *pIntrf);
-int SeepRead(SEEPDEV *pDev, int Addr, uint8_t *pData, int len);
-int SeepWrite(SEEPDEV *pDev, int Addr, uint8_t *pData, int len);
-
-#ifdef __cplusplus
-}
#endif
#endif // __SEEP_H__
diff --git a/include/serialintrf.h b/include/serialintrf.h
index 792ba5c9..5c9065ee 100755
--- a/include/serialintrf.h
+++ b/include/serialintrf.h
@@ -47,12 +47,16 @@ Modified by Date Description
* Serial interface event types
*/
typedef enum {
- SERINTRF_EVT_RX_TIMEOUT, // Rx timeout
- SERINTRF_EVT_RXDATA, // Data received
- SERINTRF_EVT_TX_TIMEOUT, // Tx timeout
- SERINTRF_EVT_TX_READY, // Ready to transmit
- SERINTRF_EVT_STATECHG, // State changed. State data is device dependent.
- // To be interpreted by implementation
+ SERINTRF_EVT_RX_TIMEOUT, // Rx timeout
+ SERINTRF_EVT_RX_DATA, // Data received
+ SERINTRF_EVT_RX_FIFO_FULL, // Receive fifo full, fifo will be pushed out
+ // if handler does not process fifo (returns 0)
+ SERINTRF_EVT_TX_TIMEOUT, // Tx timeout
+ SERINTRF_EVT_TX_READY, // Ready to transmit
+ SERINTRF_EVT_TX_FIFO_FULL, // Transmit fifo full, fifo will be pushed out
+ // if handler does not process fifo (returns 0)
+ SERINTRF_EVT_STATECHG, // State changed. State data is device dependent.
+ // To be interpreted by implementation
} SERINTRF_EVT;
/*
@@ -77,12 +81,13 @@ typedef struct _serialintrf_dev SERINTRFDEV;
* on SERINTRF_EVT_TX_READY, pBuffer contains data to be transmit with max length
* BufferLen. If driver implements CFIFO, this parameter is NULL and BufferLen
* indicates amount of data stored in fifo
- * on UART_EVT_STATECHG, pBuffer contains state data. This is implementation specific
+ * on SERINTRF_EVT_STATECHG, pBuffer contains state data. This is implementation specific
* for example UART implementation would contains line state info.
*
* BufferLen : Max buffer length. See above description
*
* @return number of bytes processed. Implementation specific
+ * in case of FIFO_FULL events, fifo will be pushed out if return value is zero
*/
typedef int (*SERINTRFEVCB)(SERINTRFDEV *pDev, SERINTRF_EVT EvtId, uint8_t *pBuffer, int BufferLen);
@@ -321,6 +326,7 @@ static inline void SerialIntrfStopTx(SERINTRFDEV *pDev) {
class SerialIntrf {
public:
virtual ~SerialIntrf() {}
+ virtual operator SERINTRFDEV* () = 0; // Get serial interface data
// Set data rate in bits/sec (Hz)
virtual int Rate(int DataRate) = 0;
// Get current data rate in bits/sec (Hz)
diff --git a/include/spi.h b/include/spi.h
index ca61aa07..b7a37520 100755
--- a/include/spi.h
+++ b/include/spi.h
@@ -74,6 +74,12 @@ typedef enum _SPI_Data_Bit_Order {
SPIDATABIT_LSB // Least significant bit first
} SPIDATABIT;
+typedef enum _SPI_Chip_Select {
+ SPICSEL_AUTO, // Select control by hardware
+ SPICSEL_MAN, // Select control by software
+ SPICSEL_EXT, // Select control externally by application
+} SPICSEL;
+
#define SPI_MAX_RETRY 5
#define SPI_MAX_NB_IOPIN 4
#define SPI_SCK_IOPIN_IDX 0
@@ -86,7 +92,7 @@ typedef enum _SPI_Data_Bit_Order {
// Configuration data used to initialize device
typedef struct _SPI_Config {
- int DevNo; // SPI interface number
+ int DevNo; // SPI interface number identify by chip select (CS0, CS1,..,CSn)
SPIMODE Mode; // Master/Slave mode
const IOPINCFG *pIOPinMap; // Define I/O pins used by SPI
int NbIOPins; // Total number of I/O pins
@@ -96,6 +102,7 @@ typedef struct _SPI_Config {
SPIDATABIT BitOrder; // Data bit ordering
SPIDATAPHASE DataPhase; // Data Out Phase.
SPICLKPOL ClkPol; // Clock Out Polarity.
+ SPICSEL ChipSel; // Chip select mode
int IntPrio; // Interrupt priority
SERINTRFEVCB EvtCB; // Event callback
} SPICFG;
@@ -147,6 +154,7 @@ class SPI : public SerialIntrf {
bool Init(const SPICFG &CfgData) { return SPIInit(&vDevData, &CfgData); }
+ operator SERINTRFDEV* () { return &vDevData.SerIntrf; }
operator SPIDEV& () { return vDevData; }; // Get config data
int Rate(int RateHz) { return vDevData.SerIntrf.SetRate(&vDevData.SerIntrf, RateHz); }
int Rate(void) { return vDevData.SerIntrf.GetRate(&vDevData.SerIntrf); } // Get rate in Hz
diff --git a/include/uart.h b/include/uart.h
index b3a28631..d0456374 100755
--- a/include/uart.h
+++ b/include/uart.h
@@ -126,7 +126,6 @@ typedef struct {
int DevNo; // UART device number
const void *pIoMap; // Pointer to IO mapping. This can be either IOPINCFG array or device path string
int IoMapLen; // Nb of elements in IOPINCFG array or string length of device path
- //IOPINCFG PinCfg[UART_NB_PINS]; // I/O pin to configure for UART
int Rate; // Baudrate, set to 0 for auto baudrate
int DataBits; // Number of data bits
UART_PARITY Parity; // Data parity
@@ -135,9 +134,10 @@ typedef struct {
bool bIntMode; // Interrupt mode support
int IntPrio; // Interrupt priority
UARTEVTCB EvtCallback; // UART event callback
- int RxMemSize;
- uint8_t *pRxMem; // Pointer to memory allocated for RX FIFO
- int TxMemSize;
+ bool bFifoBlocking; // CFIFO operating mode, false : drop when full
+ int RxMemSize; // Memory size in bytes for Rx CFIFO
+ uint8_t *pRxMem; // Pointer to memory allocated for RX CFIFO
+ int TxMemSize; // Memory size in bytes for Tx CFIFO
uint8_t *pTxMem; // Pointer to memory allocated for TX FIFO
bool bDMAMode; // DMA transfer support
bool bIrDAMode; // Enable IrDA
@@ -185,7 +185,7 @@ int UARTTx(UARTDEV *pDev, uint8_t *pData, int Datalen);
void UARTprintf(UARTDEV *pDev, const char *pFormat, ...);
void UARTvprintf(UARTDEV *pDev, const char *pFormat, va_list vl);
void UARTRetargetEnable(UARTDEV *pDev, int FileNo);
-void UartRetargetDisable(UARTDEV *pDev, int FileNo);
+void UARTRetargetDisable(UARTDEV *pDev, int FileNo);
#ifdef __cplusplus
}
@@ -205,6 +205,9 @@ class UART: public SerialIntrf {
virtual bool Init(const UARTCFG &CfgData) {
return UARTInit(&vDevData, &CfgData);
}
+
+ operator SERINTRFDEV* () { return &vDevData.SerIntrf; }
+
// ++ ** Require implementation
// Set data baudrate
virtual int Rate(int DataRate) { return UARTSetRate(&vDevData, DataRate); }
diff --git a/include/usbhiddev.h b/include/usb_hidhost.h
similarity index 99%
rename from include/usbhiddev.h
rename to include/usb_hidhost.h
index b56f40b3..b069e6dc 100644
--- a/include/usbhiddev.h
+++ b/include/usb_hidhost.h
@@ -1,5 +1,5 @@
/*---------------------------------------------------------------------------
-File : usbhiddev.h
+File : usb_hidhost.h
Author : Hoang Nguyen Hoan Jan. 16, 2009
diff --git a/src/cfifo.c b/src/cfifo.c
index baf14258..275e08fa 100644
--- a/src/cfifo.c
+++ b/src/cfifo.c
@@ -37,12 +37,14 @@ Modified by Date Description
#include "atomic.h"
#include "cfifo.h"
-HCFIFO CFifoInit(uint8_t *pMemBlk, uint32_t TotalMemSize, uint32_t BlkSize)
+HCFIFO CFifoInit(uint8_t *pMemBlk, uint32_t TotalMemSize, uint32_t BlkSize, bool bBlocking)
{
if (pMemBlk == NULL)
return NULL;
CFIFOHDR *hdr = (CFIFOHDR *)pMemBlk;
+ hdr->bBlocking = bBlocking;
+ hdr->DropCnt = 0;
hdr->PutIdx = 0;
hdr->GetIdx = -1;
hdr->BlkSize = BlkSize;
@@ -116,9 +118,20 @@ uint8_t *CFifoGetMultiple(HCFIFO pFifo, int *pCnt)
uint8_t *CFifoPut(HCFIFO pFifo)
{
- if (pFifo == NULL || pFifo->PutIdx == pFifo->GetIdx)
+ if (pFifo == NULL)
return NULL;
+ if (pFifo->PutIdx == pFifo->GetIdx)
+ {
+ if (pFifo->bBlocking == true)
+ return NULL;
+ // drop data
+ int32_t gidx = pFifo->GetIdx + 1;
+ if (gidx >= pFifo->MaxIdxCnt)
+ gidx = 0;
+ AtomicAssign((sig_atomic_t *)&pFifo->GetIdx, gidx);
+ pFifo->DropCnt++;
+ }
int32_t idx = pFifo->PutIdx;
int32_t putidx = idx + 1;
if (putidx >= pFifo->MaxIdxCnt)
@@ -137,12 +150,21 @@ uint8_t *CFifoPutMultiple(HCFIFO pFifo, int *pCnt)
if (pCnt == NULL)
return CFifoPut(pFifo);
- if (pFifo == NULL || pFifo->PutIdx == pFifo->GetIdx || *pCnt == 0)
+ if (pFifo == NULL || *pCnt == 0)
{
*pCnt = 0;
return NULL;
}
+ if (pFifo->PutIdx == pFifo->GetIdx)
+ {
+ if (pFifo->bBlocking == true)
+ return NULL;
+ // Drop
+ int l = *pCnt;
+ CFifoGetMultiple(pFifo, &l);
+ pFifo->DropCnt += l;
+ }
int32_t cnt = *pCnt;
int32_t idx = pFifo->PutIdx;
int32_t getidx = pFifo->GetIdx;
@@ -263,9 +285,18 @@ int CFifoRead(HCFIFO pFifo, uint8_t *pBuff, int BuffLen)
int CFifoWrite(HCFIFO pFifo, uint8_t *pData, int DataLen)
{
- if (pFifo == NULL || pFifo->PutIdx == pFifo->GetIdx || pData == NULL)
+ if (pFifo == NULL || pData == NULL)
return 0;
+ if (pFifo->PutIdx == pFifo->GetIdx)
+ {
+ if (pFifo->bBlocking == true)
+ return 0;
+ int l = DataLen;
+ CFifoGetMultiple(pFifo, &l);
+ pFifo->DropCnt += l;
+ }
+
int cnt = 0;
if (DataLen <= pFifo->BlkSize)
diff --git a/src/diskio_flash.cpp b/src/diskio_flash.cpp
new file mode 100644
index 00000000..b5b696dd
--- /dev/null
+++ b/src/diskio_flash.cpp
@@ -0,0 +1,277 @@
+/*--------------------------------------------------------------------------
+File : diskio_flash.cpp
+
+Author : Hoang Nguyen Hoan Aug. 30, 2016
+
+Desc : Generic flash disk I/O driver class
+
+Copyright (c) 2016, Motsai, all rights reserved
+
+Permission to use, copy, modify, and distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright
+notice and this permission notice appear in all copies, and none of the
+names : I-SYST or its contributors may be used to endorse or
+promote products derived from this software without specific prior written
+permission.
+
+For info or contributing contact : nh.hoang at motsai dot com
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+----------------------------------------------------------------------------
+Modified by Date Description
+
+----------------------------------------------------------------------------*/
+#include
+
+#include "diskio_flash.h"
+#include "idelay.h"
+
+FlashDiskIO::FlashDiskIO() : DiskIO()
+{
+ vpWaitCB = NULL;
+ vpInterf = NULL;
+}
+
+bool FlashDiskIO::Init(FLASHDISKIO_CFG &Cfg, SerialIntrf *pInterf,
+ DISKIO_CACHE_DESC *pCacheBlk, int NbCacheBlk)
+{
+ if (pInterf == NULL)
+ return false;
+
+ if (Cfg.pInitCB)
+ {
+ if (Cfg.pInitCB(Cfg.DevNo, pInterf) == false)
+ return false;
+ }
+
+ if (Cfg.pWaitCB)
+ vpWaitCB = Cfg.pWaitCB;
+
+ vDevNo = Cfg.DevNo;
+ vEraseSize = Cfg.EraseSize;
+ if (Cfg.WriteSize == 0)
+ vWriteSize = DISKIO_SECT_SIZE;
+ else
+ vWriteSize = Cfg.WriteSize;
+ vTotalSize = Cfg.TotalSize;
+ vAddrSize = Cfg.AddrSize;
+ vpInterf = pInterf;
+
+ uint32_t d = ReadId();
+
+ if (pCacheBlk && NbCacheBlk > 0)
+ {
+ SetCache(pCacheBlk, NbCacheBlk);
+ }
+
+ return true;
+}
+
+uint32_t FlashDiskIO::ReadId()
+{
+ uint32_t id = -1;
+ uint8_t cmd;
+
+ WaitReady();
+
+ cmd = FLASH_CMD_READID;
+
+ vpInterf->StartRx(vDevNo);
+ vpInterf->TxData(&cmd, 1);
+ vpInterf->RxData((uint8_t*)&id, 4);
+ vpInterf->StopRx();
+
+ return id;
+}
+
+uint8_t FlashDiskIO::ReadStatus()
+{
+ uint8_t d;
+
+ d = FLASH_CMD_READSTATUS;
+ vpInterf->StartRx(vDevNo);
+ vpInterf->TxData(&d, 1);
+ vpInterf->RxData(&d, 1);
+ vpInterf->StopRx();
+
+ return d;
+}
+
+bool FlashDiskIO::WaitReady(uint32_t Timeout, uint32_t usRtyDelay)
+{
+ uint8_t d;
+
+ do {
+ d = FLASH_CMD_READSTATUS;
+ vpInterf->StartRx(vDevNo);
+ vpInterf->TxData(&d, 1);
+ vpInterf->RxData(&d, 1);
+ vpInterf->StopRx();
+ if (!(d & FLASH_STATUS_WIP))
+ return true;
+
+ if (usRtyDelay > 0)
+ {
+ if (vpWaitCB)
+ vpWaitCB(vDevNo, vpInterf);
+ else
+ usDelay(usRtyDelay);
+ }
+
+ } while (Timeout-- > 0);
+
+ return false;
+}
+
+void FlashDiskIO::WriteDisable()
+{
+ uint8_t d = FLASH_CMD_WRDISABLE;
+ vpInterf->Tx(vDevNo, &d, 1);
+}
+
+bool FlashDiskIO::WriteEnable(uint32_t Timeout)
+{
+ uint8_t d;
+
+ WaitReady(Timeout);
+
+ d = FLASH_CMD_WRENABLE;
+ vpInterf->Tx(vDevNo, &d, 1);
+
+ return false;
+}
+
+void FlashDiskIO::Erase()
+{
+ uint8_t d;
+
+ WriteEnable();
+ WaitReady();
+
+ d = FLASH_CMD_BULK_ERASE;
+
+ vpInterf->Tx(vDevNo, &d, 1);
+
+ // This is a long wait polling at every second only
+ WaitReady(-1, 1000000);
+ WriteDisable();
+}
+
+/**
+ * Erase Flash block.
+ *
+ * @param BlkNo : Starting block number to erase.
+ * NbBlk : Number of consecutive blocks to erase
+ */
+void FlashDiskIO::EraseBlock(uint32_t BlkNo, int NbBlk)
+{
+ uint8_t d[8];
+
+ BlkNo *= vEraseSize;
+ uint8_t *p = (uint8_t*)BlkNo;
+
+
+ d[0] = FLASH_CMD_BLOCK_ERASE;
+
+ WriteEnable();
+
+ for (int i = 0; i < NbBlk; i++)
+ {
+ for (int i = 1; i <= vAddrSize; i++)
+ d[i] = p[vAddrSize - i];
+ WaitReady(-1, 10);
+ vpInterf->Tx(vDevNo, d, 4);
+ BlkNo += vEraseSize;
+ }
+ WriteDisable();
+}
+
+/**
+ * Read one sector from physical device
+ */
+bool FlashDiskIO::SectRead(uint32_t SectNo, uint8_t *pBuff)
+{
+ uint8_t d[9];
+ uint32_t addr = SectNo * DISKIO_SECT_SIZE;
+ uint8_t *p = (uint8_t*)&addr;
+ int cnt = DISKIO_SECT_SIZE;
+
+ // Makesure there is no write access pending
+ WaitReady(100000);
+
+ d[0] = FLASH_CMD_READ;
+
+ while (cnt > 0)
+ {
+ for (int i = 1; i <= vAddrSize; i++)
+ d[i] = p[vAddrSize - i];
+
+ vpInterf->StartRx(vDevNo);
+ vpInterf->TxData((uint8_t*)d, 4);
+ int l = vpInterf->RxData(pBuff, DISKIO_SECT_SIZE);
+ vpInterf->StopRx();
+ if (l <= 0)
+ return false;
+ cnt -= l;
+ addr += l;
+ pBuff += l;
+ }
+ //printf("RSect : %d 0x%02x 0x%02x 0x%02x 0x%02x\r\n", SectNo, pBuff[0], pBuff[1], pBuff[2], pBuff[3]);
+ return true;
+}
+
+/**
+ * Write one sector to physical device
+ */
+bool FlashDiskIO::SectWrite(uint32_t SectNo, uint8_t *pData)
+{
+ uint8_t d[9];
+ uint32_t addr = SectNo * DISKIO_SECT_SIZE;
+ uint8_t *p = (uint8_t*)&addr;
+
+ int cnt = 0;
+
+ // printf("Sect : %d 0x%02x 0x%02x 0x%02x 0x%02x\r\n", SectNo, pData[0], pData[1], pData[2], pData[3]);
+ d[0] = FLASH_CMD_WRITE;
+
+ cnt = DISKIO_SECT_SIZE;
+ while (cnt > 0)
+ {
+ for (int i = 1; i <= vAddrSize; i++)
+ d[i] = p[vAddrSize - i];
+
+ int l = min(cnt, vWriteSize);
+
+ WaitReady();
+
+ // Some Flash will reset write enable bit at completion
+ // when page size is less than 512 bytes.
+ // We need to set it again
+ WriteEnable();
+
+ vpInterf->StartTx(vDevNo);
+ vpInterf->TxData((uint8_t*)d, 4);
+ l = vpInterf->TxData(pData, l);
+ vpInterf->StopTx();
+ if (l <= 0)
+ return false;
+ cnt -= l;
+ pData += l;
+ addr += l;
+ }
+ WriteDisable();
+
+ return true;
+}
+
+
diff --git a/src/diskio_impl.cpp b/src/diskio_impl.cpp
index 62f8eb85..5c5bab2e 100755
--- a/src/diskio_impl.cpp
+++ b/src/diskio_impl.cpp
@@ -42,42 +42,23 @@ Modified by Date Description
using namespace std;
-DiskIO::DiskIO() : vLastIdx(1), vNbCache(1), vExtCache(false)
+DiskIO::DiskIO() : vLastIdx(1), vNbCache(0), vpCacheSect(NULL)
{
- vpCacheSect = new SECTDESC[vNbCache];
-
- for (int i = 0; i < vNbCache; i++)
- {
- vpCacheSect[i].UseCnt = 0;
- vpCacheSect[i].SectNo = -1;
- vpCacheSect[i].pSectData = new uint8_t[DISKIO_SECT_SIZE];
- }
}
-void DiskIO::SetCache(uint8_t *pCacheBlk, uint32_t CacheSize)
+void DiskIO::SetCache(DISKIO_CACHE_DESC *pCacheBlk, int NbCacheBlk)
{
- if (pCacheBlk == NULL || CacheSize < DISKIO_SECT_SIZE)
+ if (pCacheBlk == NULL || NbCacheBlk <= 0)
return;
- if (vExtCache == false)
- {
- for (int i = 0; i < vNbCache; i++)
- {
- delete[] vpCacheSect[i].pSectData;
- }
- }
-
- delete[] vpCacheSect;
+ vNbCache = NbCacheBlk;
- vNbCache = CacheSize / DISKIO_SECT_SIZE;
-
- vpCacheSect = new SECTDESC[vNbCache];
+ vpCacheSect = pCacheBlk;
for (int i = 0; i < vNbCache; i++)
{
vpCacheSect[i].UseCnt = 0;
vpCacheSect[i].SectNo = -1;
- vpCacheSect[i].pSectData = pCacheBlk + i * DISKIO_SECT_SIZE;
}
}
@@ -93,7 +74,7 @@ void DiskIO::Reset()
int DiskIO::GetCacheSect(uint32_t SectNo, bool bLock)
{
// Try to find sector in cache
- for (int i = 0; i < DISKIO_CACHE_SECT_MAX; i++)
+ for (int i = 0; i < vNbCache; i++)
{
// Grab first cache
vpCacheSect[i].UseCnt++;
@@ -104,13 +85,13 @@ int DiskIO::GetCacheSect(uint32_t SectNo, bool bLock)
}
// Not in cache, try to pick unused cache
- int i = DISKIO_CACHE_SECT_MAX;
+ int i = vNbCache;
- do
+ while (i > 0)
{
vLastIdx++;
- if (vLastIdx >= DISKIO_CACHE_SECT_MAX)
+ if (vLastIdx >= vNbCache)
vLastIdx = 0;
if ((vpCacheSect[vLastIdx].UseCnt & ~DISKIO_CACHE_DIRTY_BIT) == 0)
@@ -119,18 +100,18 @@ int DiskIO::GetCacheSect(uint32_t SectNo, bool bLock)
// Flush cache is dirty
if (vpCacheSect[vLastIdx].UseCnt & DISKIO_CACHE_DIRTY_BIT)
- SectWrite(vpCacheSect[vLastIdx].SectNo, vpCacheSect[vLastIdx].pSectData);
+ SectWrite(vpCacheSect[vLastIdx].SectNo, vpCacheSect[vLastIdx].SectData);
vpCacheSect[vLastIdx].UseCnt = 1;
// Fill cache
- SectRead(SectNo, vpCacheSect[vLastIdx].pSectData);
+ SectRead(SectNo, vpCacheSect[vLastIdx].SectData);
vpCacheSect[vLastIdx].SectNo = SectNo;
return vLastIdx;
}
- // Cache in use, release it
- } while (--i > 0);
+ i--;
+ }
// No Cache avail
return -1;
@@ -145,12 +126,20 @@ int DiskIO::Read(uint32_t SectNo, uint32_t SectOffset, uint8_t *pBuff, uint32_t
int idx = GetCacheSect(SectNo);
if (idx < 0)
- return -1;
-
- memcpy(pBuff, vpCacheSect[idx].pSectData + SectOffset, l);
+ {
+ // No cache, do physical read
+ uint8_t d[DISKIO_SECT_SIZE];
+ SectRead(SectNo, d);
+ memcpy(pBuff, d + SectOffset, l);
+ }
+ else
+ {
+ // Get it from cache
+ memcpy(pBuff, vpCacheSect[idx].SectData + SectOffset, l);
- // Done with cache sector, release it
- vpCacheSect[idx].UseCnt--;
+ // Done with cache sector, release it
+ vpCacheSect[idx].UseCnt--;
+ }
return l;
}
@@ -165,7 +154,7 @@ int DiskIO::Read(uint64_t Offset, uint8_t *pBuff, uint32_t Len)
while (Len > 0)
{
int l = Read(sectno, sectoff, pBuff, Len);
- if (l < 0)
+ if (l <= 0)
break;
pBuff += l;
Len -= l;
@@ -186,16 +175,22 @@ int DiskIO::Write(uint32_t SectNo, uint32_t SectOffset, uint8_t *pData, uint32_t
int idx = GetCacheSect(SectNo, true);
if (idx < 0)
- return -1;
-
- memcpy(vpCacheSect[idx].pSectData + SectOffset, pData, l);
-
- // Write sector to disk
-// SectWrite(SectNo, vpCacheSect[idx].pSect);
+ {
+ // No cache, do physical write
+ uint8_t d[DISKIO_SECT_SIZE];
+ SectRead(SectNo, d);
+ memcpy(d + SectOffset, pData, l);
+ SectWrite(SectNo, d);
+ }
+ else
+ {
+ // Write to cache
+ memcpy(vpCacheSect[idx].SectData + SectOffset, pData, l);
- // Done with cache sector, release it
- vpCacheSect[idx].UseCnt |= DISKIO_CACHE_DIRTY_BIT;
- vpCacheSect[idx].UseCnt--;
+ // Done with cache sector, release it
+ vpCacheSect[idx].UseCnt |= DISKIO_CACHE_DIRTY_BIT;
+ vpCacheSect[idx].UseCnt--;
+ }
return l;
}
@@ -224,11 +219,11 @@ int DiskIO::Write(uint64_t Offset, uint8_t *pData, uint32_t Len)
void DiskIO::Flush()
{
- for (int i = 0; i < DISKIO_CACHE_SECT_MAX; i++)
+ for (int i = 0; i < vNbCache; i++)
{
if (vpCacheSect[i].UseCnt & DISKIO_CACHE_DIRTY_BIT)
{
- SectWrite(vpCacheSect[i].SectNo, vpCacheSect[i].pSectData);
+ SectWrite(vpCacheSect[i].SectNo, vpCacheSect[i].SectData);
vpCacheSect[i].UseCnt &= ~DISKIO_CACHE_DIRTY_BIT;
}
}
diff --git a/src/sdcard_impl.cpp b/src/sdcard_impl.cpp
index 1f357743..08205095 100755
--- a/src/sdcard_impl.cpp
+++ b/src/sdcard_impl.cpp
@@ -49,7 +49,7 @@ SDCard::~SDCard()
}
-bool SDCard::Init(SerialIntrf *pSerInterf, uint8_t *pCacheBlk, size_t CacheSize)
+bool SDCard::Init(SerialIntrf *pSerInterf, DISKIO_CACHE_DESC *pCacheBlk, int NbCacheBlk)
{
uint8_t data[4];
uint16_t r = 0xffff;
@@ -121,9 +121,9 @@ bool SDCard::Init(SerialIntrf *pSerInterf, uint8_t *pCacheBlk, size_t CacheSize)
vDev.SectSize = 512; // Default always
vDev.TotalSect = GetSize() * 1024LL / vDev.SectSize;
- if (pCacheBlk && CacheSize > 0)
+ if (pCacheBlk && NbCacheBlk > 0)
{
- SetCache(pCacheBlk, CacheSize);
+ SetCache(pCacheBlk, NbCacheBlk);
}
return true;
}
@@ -270,8 +270,8 @@ uint32_t SDCard::GetNbSect(void)
return vDev.TotalSect;
}
-// @return size in KB
-uint32_t SDCard::GetSize(void)
+// @return size in BYTE
+uint64_t SDCard::GetSize(void)
{
uint8_t data[20];
uint32_t c_size, c_size_mult, read_bl_len;
diff --git a/src/seep.c b/src/seep.c
deleted file mode 100755
index dac8bc95..00000000
--- a/src/seep.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*--------------------------------------------------------------------------
-File : seep.c
-
-Author : Hoang Nguyen Hoan Sept. 16, 2011
-
-Desc : Serial EEPROM device implementation
-
-Copyright (c) 2011, I-SYST, all rights reserved
-
-Permission to use, copy, modify, and distribute this software for any purpose
-with or without fee is hereby granted, provided that the above copyright
-notice and this permission notice appear in all copies, and none of the
-names : I-SYST, I-SYST inc. or its contributors may be used to endorse or
-promote products derived from this software without specific prior written
-permission.
-
-For info or contributing contact : hnhoan at i-syst dot com
-
-THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-----------------------------------------------------------------------------
-Modified by Date Description
-
-----------------------------------------------------------------------------*/
-#include
-#include
-#include
-
-#include "istddef.h"
-#include "seep.h"
-
-bool SeepInit(SEEPDEV *pDev, int DevAddr, int PageSize, int AddrLen, SERINTRFDEV *pIntrf)
-{
- pDev->pSerIntrf = pIntrf;
- //vpInterf = pInterf;
- pDev->DevAddr = DevAddr;
- pDev->PageSize = PageSize;
- pDev->AddrLen = AddrLen;
-
- return true;
-}
-
-int SeepRead(SEEPDEV *pDev, int Addr, uint8_t *pData, int Len)
-{
- uint8_t ad[4];
- uint8_t *p = (uint8_t*)&Addr;
-
- for (int i = 0; i < pDev->AddrLen; i++)
- {
- ad[i] = p[pDev->AddrLen - i - 1];
- }
-
- if (SerialIntrfTx(pDev->pSerIntrf, pDev->DevAddr, (uint8_t*)ad, pDev->AddrLen))
- {
- return SerialIntrfRx(pDev->pSerIntrf, pDev->DevAddr, pData, Len);
- }
-
- return 0;
-}
-
-// Note: Sequential write is bound by page size boundary
-int SeepWrite(SEEPDEV *pDev, int Addr, uint8_t *pData, int Len)
-{
- int count = 0;
- uint8_t ad[4];
- uint8_t *p = (uint8_t*)&Addr;
-
- while (Len > 0)
- {
- int size = min(Len, pDev->PageSize - (Addr % pDev->PageSize));
- for (int i = 0; i < pDev->AddrLen; i++)
- {
- ad[i] = p[pDev->AddrLen - i - 1];
- }
-
- if (pDev->pSerIntrf->StartTx(pDev->pSerIntrf, pDev->DevAddr))
- {
- pDev->pSerIntrf->TxData(pDev->pSerIntrf, ad, pDev->AddrLen);
- count += pDev->pSerIntrf->TxData(pDev->pSerIntrf, pData, size);
- pDev->pSerIntrf->StopTx(pDev->pSerIntrf);
- }
- Addr += size;
- Len -= size;
- pData += size;
- }
- return count;
-}
-
diff --git a/src/seep_impl.cpp b/src/seep_impl.cpp
index f2a1ebb2..b2d21a58 100755
--- a/src/seep_impl.cpp
+++ b/src/seep_impl.cpp
@@ -37,26 +37,112 @@ Modified by Date Description
using namespace std;
#include "seep.h"
+#include "iopinctrl.h"
Seep::Seep()
{
+ memset(&vDevData, 0, sizeof(SEEPDEV));
}
Seep::~Seep()
{
}
-bool Seep::Init(int DevAddr, int PageSize, int AddrLen, SerialIntrf *pInterf)
+bool Seep::Init(SEEP_CFG &CfgData, SerialIntrf *pInterf)
{
- //vpInterf = shared_ptr(pInterf);
- vpInterf = pInterf;
- vDevAddr = DevAddr;
- vPageSize = PageSize;
- vAddrLen = AddrLen;
+ vDevData.pInterf = *pInterf;
+ vDevData.DevAddr = CfgData.DevAddr;
+ vDevData.PageSize = CfgData.PageSize;
+ vDevData.AddrLen = CfgData.AddrLen;
+ vDevData.pWaitCB = CfgData.pWaitCB;
+ if (CfgData.pInitCB)
+ return CfgData.pInitCB(vDevData.DevAddr, *pInterf);
return true;
}
+bool SeepInit(SEEPDEV *pDev, SEEP_CFG *pCfgData, SERINTRFDEV *pInterf)
+{
+ pDev->pInterf = pInterf;
+ pDev->DevAddr = pCfgData->DevAddr;
+ pDev->PageSize = pCfgData->PageSize;
+ pDev->AddrLen = pCfgData->AddrLen;
+ pDev->pWaitCB = pCfgData->pWaitCB;
+ pDev->WrProtPin = pCfgData->WrProtPin;
+
+ if (pCfgData->WrProtPin.PortNo >= 0 && pCfgData->WrProtPin.PinNo >= 0)
+ {
+ // Configure write protect pin
+ IOPinCfg(&pCfgData->WrProtPin, 1);
+ IOPinClear(pDev->WrProtPin.PortNo, pDev->WrProtPin.PinNo);
+ }
+
+ if (pCfgData->pInitCB)
+ pCfgData->pInitCB(pCfgData->DevAddr, pInterf);
+
+ return true;
+}
+
+int SeepRead(SEEPDEV *pDev, int Addr, uint8_t *pData, int Len)
+{
+ uint8_t ad[4];
+ uint8_t *p = (uint8_t*)&Addr;
+
+ for (int i = 0; i < pDev->AddrLen; i++)
+ {
+ ad[i] = p[pDev->AddrLen - i - 1];
+ }
+
+ if (SerialIntrfTx(pDev->pInterf, pDev->DevAddr, (uint8_t*)ad, pDev->AddrLen))
+ {
+ return SerialIntrfRx(pDev->pInterf, pDev->DevAddr, pData, Len);
+ }
+
+ return 0;
+}
+
+// Note: Sequential write is bound by page size boundary
+int SeepWrite(SEEPDEV *pDev, int Addr, uint8_t *pData, int Len)
+{
+ int count = 0;
+ uint8_t ad[4];
+ uint8_t *p = (uint8_t*)&Addr;
+
+ while (Len > 0)
+ {
+ int size = min(Len, pDev->PageSize - (Addr % pDev->PageSize));
+ for (int i = 0; i < pDev->AddrLen; i++)
+ {
+ ad[i] = p[pDev->AddrLen - i - 1];
+ }
+
+ if (SerialIntrfStartTx(pDev->pInterf, pDev->DevAddr))
+ {
+ pDev->pInterf->TxData(pDev->pInterf, ad, pDev->AddrLen);
+ count += pDev->pInterf->TxData(pDev->pInterf, pData, size);
+ SerialIntrfStopTx(pDev->pInterf);
+ if (pDev->pWaitCB)
+ pDev->pWaitCB(pDev->DevAddr, pDev->pInterf);
+ }
+ Addr += size;
+ Len -= size;
+ pData += size;
+ }
+ return count;
+}
+
+void SeepSetWriteProt(SEEPDEV *pDev, bool bVal)
+{
+ if (pDev->WrProtPin.PortNo < 0 || pDev->WrProtPin.PinNo < 0)
+ return;
+
+ if (bVal)
+ IOPinSet(pDev->WrProtPin.PortNo, pDev->WrProtPin.PinNo);
+ else
+ IOPinClear(pDev->WrProtPin.PortNo, pDev->WrProtPin.PinNo);
+}
+
+/*
int Seep::Read(int Addr, uint8_t *pData, int Len)
{
uint8_t ad[4];
@@ -98,6 +184,8 @@ int Seep::Write(int Addr, uint8_t *pData, int Len)
vpInterf->TxData((uint8_t*)ad, vAddrLen);
count += vpInterf->TxData(pData, size);
vpInterf->StopTx();
+ if (vpWaitCB)
+ vpWaitCB(vDevAddr, *vpInterf);
}
Addr += size;
Len -= size;
@@ -105,4 +193,4 @@ int Seep::Write(int Addr, uint8_t *pData, int Len)
}
return count;
}
-
+*/
diff --git a/src/uart_retarget.c b/src/uart_retarget.c
index 0e05e0f1..638a4788 100755
--- a/src/uart_retarget.c
+++ b/src/uart_retarget.c
@@ -76,17 +76,11 @@ void UARTRetargetEnable(UARTDEV *pDev, int FileNo)
{
case STDIN_FILENO:
// Enable input
- if (pDev->hStdIn >= 0)
- RemoveBlkDev(pDev->hStdIn);
-
pDev->hStdIn = InstallBlkDev(&g_UartStdDev, STDIN_FILENO);
break;
case STDOUT_FILENO:
case STDERR_FILENO:
// Enable output
- if (pDev->hStdIn >= 0)
- RemoveBlkDev(pDev->hStdOut);
-
pDev->hStdOut = InstallBlkDev(&g_UartStdDev, STDOUT_FILENO);
break;
}