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package.nls.de.json
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package.nls.de.json
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{
"digital-ide.property-json.generate.title": "property.json-Konfigurationsdatei generieren",
"digital-ide.property-json.overwrite.title": "Standard-property.json-Vorlagendatei ändern",
"digital-ide.hdlDoc.exportFile.title": "Dokument der aktuellen Datei exportieren",
"digital-ide.hdlDoc.exportProject.title": "Dokument des aktuellen Projekts exportieren",
"digital-ide.hdlDoc.showWebview.title": "Dokument in Webview anzeigen",
"digital-ide.tool.instance.title": "Instanziierungsvorlage für ausgewähltes Modul generieren",
"digital-ide.tool.testbench.title": "Testbench aus aktueller Datei generieren",
"digital-ide.tool.icarus.simulateFile.title": "Aktuelle Datei simulieren",
"digital-ide.treeView.arch.expand.title": "Alle Elemente in der Ansicht erweitern",
"digital-ide.treeView.arch.collapse.title": "Alle Elemente in der Ansicht reduzieren",
"digital-ide.treeView.arch.refresh.title": "Baumansicht aktualisieren",
"digital-ide.treeView.arch.openFile.title": "Entsprechende Datei in der Baumansicht öffnen",
"digital-ide.tool.clean.title": "Aktuelles Projekt bereinigen",
"digital-ide.soft.launch.title": "SDK-Entwicklungsunterstützung starten",
"digital-ide.soft.build.title": "SDK für aktuelles Projekt erstellen",
"digital-ide.soft.download.title": "Datei auf Gerät herunterladen",
"digital-ide.hard.launch.title": "FPGA-Entwicklungsunterstützung starten",
"digital-ide.hard.simulate.title": "Produktionssimulation starten",
"digital-ide.hard.simulate.cli.title": "CLI",
"digital-ide.hard.simulate.gui.title": "GUI",
"digital-ide.hard.refresh.title": "Aktuelle Projektdateien aktualisieren",
"digital-ide.hard.build.title": "FPGA-Build für aktuelles Projekt",
"digital-ide.hard.build.synth.title": "Synth für aktuelles Projekt",
"digital-ide.hard.build.impl.title": "Impl für aktuelles Projekt",
"digital-ide.hard.build.bitstream.title": "Einige Dateien generieren",
"digital-ide.hard.program.title": "Datei auf Gerät herunterladen",
"digital-ide.hard.gui.title": "Benutzeroberfläche öffnen",
"digital-ide.hard.exit.title": "Aktuelles Projekt beenden",
"digital-ide.pickLibrary.title": "Bibliotheksdatei auswählen",
"digital-ide.pl.setSrcTop.title": "Als Top-Datei für src festlegen",
"digital-ide.pl.setSimTop.title": "Als Top-Datei für sim festlegen",
"digital-ide.pl.addDevice.title": "Gerät hinzufügen",
"digital-ide.pl.delDevice.title": "Gerät löschen",
"digital-ide.pl.addFile.title": "Datei hinzufügen",
"digital-ide.pl.delFile.title": "Datei löschen",
"digital-ide.netlist.title": "Netzliste",
"digital-ide.fsm.title": "Endlicher Zustandsautomat",
"digital-ide.lsp.tool.insertTextToUri.title": "Text in URI einfügen",
"digital-ide.lsp.tool.transformOldPropertyFile.title": "Konfigurationsdatei von früherer Version in neue Version transformieren",
"digital-ide.vhdl2vlog.title": "VHDL-Code in Verilog-Code übersetzen",
"digital-ide.fsm.show.title": "FSM-Diagramm der aktuellen Datei anzeigen",
"digital-ide.netlist.show.title": "Netzliste der aktuellen Datei anzeigen",
"digital-ide.waveviewer.show.title": "Aktuelles vcd in dide viewer rendern",
"digital-ide.lsp.vlog.linter.pick.title": "Verilog-Diagnose auswählen",
"digital-ide.lsp.svlog.linter.pick.title": "System Verilog-Diagnose auswählen",
"digital-ide.lsp.vhdl.linter.pick.title": "VHDL-Diagnose auswählen",
"digital-ide.lsp.systemverilog.linter.pick.title": "SystemVerilog-Diagnose auswählen",
"digital-ide.tool.export-filelist.title": "Dateiliste exportieren",
"digital-ide.treeview": "Digital IDE: Modulbaum",
"digital-ide.digital-lsp.download.title": "Digital-Sprachserver herunterladen",
"digital-ide.welcome.show.title": "show the welcome text in Digital-IDE",
"digital-ide.dont-show-again.propose.issue.title": "show the welcome text in Digital-IDE",
"digital-ide.lib.custom.path.title": "path of the dictionary of \"custom\" in library",
"digital-ide.prj.file.structure.notice.title": "notice when change file structure",
"digital-ide.prj.vivado.install.path.title": "Set the xilinx install path. Ignore this setting if you add relative path to environment variable PATH \n e.g. : D:/APP/vivado_18_3/Vivado/2018.3/bin \n Default path is C:/Xilinx/Vivado/2018.3/bin",
"digital-ide.prj.modelsim.install.path.title": "set the modelsim install path. Ignore this setting if you add relative path to environment variable PATH \n Default path is C:/modeltech64_10.4/win64",
"digital-ide.prj.xilinx.IP.repo.path.title": "User-designed IP libraries from xilinx After configuring this property, the plugin will automatically add the path to the IP repo of vivado.",
"digital-ide.prj.xilinx.BD.repo.path.title": "User-defined placement path for xilinx block design files",
"digital-ide.prj.xsdk.install.path.title": "",
"digital-ide.function.doc.webview.backgroundImage.title": "url of the background image",
"digital-ide.function.doc.pdf.scale.title": "scale of the exported pdf",
"digital-ide.function.doc.pdf.printBackground.title": "whether print background",
"digital-ide.function.doc.pdf.landscape.title": "whether export pdf as a landscape style",
"digital-ide.function.doc.pdf.format.title": "format of pdf size",
"digital-ide.function.doc.pdf.displayHeaderFooter.title": "display header and footer in the exported pdf",
"digital-ide.function.doc.pdf.browserPath.title": "the absolute path of edge or chrome, we need browser to render pdf",
"digital-ide.function.doc.pdf.margin.top.title": "top margin of exported pdf, unit cm",
"digital-ide.function.doc.pdf.margin.right.title": "top margin of exported pdf, unit cm",
"digital-ide.function.doc.pdf.margin.bottom.title": "top margin of exported pdf, unit cm",
"digital-ide.function.doc.pdf.margin.left.title": "top margin of exported pdf, unit cm",
"digital-ide.function.doc.pdf.headerTemplate.title": "html template of header, if displayHeaderFooter is set to false, this setting will be ignored",
"digital-ide.function.doc.pdf.footerTemplate.title": "html template of footer, if displayHeaderFooter is set to false, this setting will be ignored",
"digital-ide.function.simulate.icarus.installPath.title": "Path of install path of iverilog components, if set to \"\", then iverilog and vvp in environment will be used for simulation. Otherwise, ones that in the install path will be used.",
"digital-ide.function.simulate.simulationHome.title": "Path of simulation folder, .vvp and other file during simulation will be generated here",
"digital-ide.function.simulate.gtkwavePath.title": "Absolute path of launch path of gtkwave software",
"digital-ide.function.simulate.xilinxLibPath.title": "Path of Xilinx library for simulation",
"digital-ide.function.simulate.runInTerminal.title": "run the simulation command in terminal instead of output",
"digital-ide.function.lsp.formatter.vlog.default.style.title": "Select the verilog and systemverilog formatter style.",
"digital-ide.function.lsp.formatter.vlog.default.args.title": "Add verilog formatter arguments here (like istyle).",
"digital-ide.function.lsp.formatter.vhdl.default.keyword-case.title": "Keyword case",
"digital-ide.function.lsp.formatter.vhdl.default.align-comments.title": "Align comments",
"digital-ide.function.lsp.formatter.vhdl.default.type-name-case.title": "Type name case",
"digital-ide.function.lsp.formatter.vhdl.default.indentation.title": "Indentation",
"digital-ide.function.lsp.completion.vlog.auto-add-include.title": "`include \"xxx.v\" will be added to the top of the file automatically",
"digital-ide.function.lsp.completion.vlog.auto-add-output-declaration.title": "complete everything invoking a module needs including paramters and ports",
"digital-ide.function.lsp.linter.vlog.diagnostor.title": "choose diagnostor to do linter in editing verilog",
"digital-ide.function.lsp.linter.svlog.diagnostor.title": "choose diagnostor to do linter in editing verilog",
"digital-ide.function.lsp.linter.vhdl.diagnostor.title": "choose diagnostor to do linter in editing vhdl",
"digital-ide.function.lsp.linter.systemverilog.diagnostor.title": "choose diagnostor to do linter in editing systemverilog",
"digital-ide.function.instantiation.addComment.title": "add comment like // ports, // input, // output when doing instantiation, including completion for module invoking",
"digital-ide.function.instantiation.autoNetOutputDeclaration.title": "auto declare output type nets in the scope when instantiation happens.",
"fpga-support.onTypeFormattingTriggerCharacters.title": "Trigger characters for onTypeFormatting",
"digital-ide.function.lsp.file-parse-maxsize.title": ""
}