Running circuit with classical condition can cause KeyError

[IlanIwumbwe]

Benny and I found this by running a randomly generated circuit through the compiler.

When preparing classical registers to pass to append_tk_command_to_qiskit, there's a check here that excludes scratch registers that are used to store results of reg_eq(creg_0, 3).

However, under certain conditions, this leads to a KeyError because regname is tk_SCRATCH_BIT.

Recreate with:

main_circ = Circuit(2, 2, "main_circ")

creg_0 = main_circ.add_c_register("creg_0",2)
# Applying gates 

main_circ.add_gate(OpType.CH,[0, 1], condition = reg_eq(creg_0, 3))

main_circ.measure_all()

backend = AerBackend()
no_pass_circ = backend.get_compiled_circuit(main_circ, optimisation_level=0)
counts = backend.run_circuit(no_pass_circ).get_counts()

Results in:

KeyError: 'tk_SCRATCH_BIT'

Running the circuit above or with OpType.CH replaced by OpType.CV results in the same error.

[IlanIwumbwe]

Another code snippet that leads to the same error:

U3_op = Op.create(OpType.U3, [-0.09, -0.39, -0.17])
Ry_op = Op.create(OpType.Ry, [0.1])
op_map = {(0,):U3_op, (1,):Ry_op}
multiplexor = MultiplexorBox(op_map)

main_circ = Circuit(0, 2, "main_circ")

qreg_0 = main_circ.add_q_register("qreg_0",3)
creg_3 = main_circ.add_c_register("creg_3",1)

main_circ.add_gate(multiplexor,[qreg_0[1], qreg_0[2]], condition = reg_eq(creg_3, 3))

backend = AerBackend()
no_pass_circ = backend.get_compiled_circuit(main_circ, optimisation_level=2)
counts = backend.run_circuit(no_pass_circ).get_counts()

[CalMacCQ]

I think this is a question of giving an appropriate error message when the circuit contains classical ops which are not supported by the AerBackend.

It may also be possible to run the circuits if we can convert the reg_eq check to an equivalent qiskit operation

[cqc-alec]

I think this is a question of giving an appropriate error message when the circuit contains classical ops which are not supported by the AerBackend.

It may also be possible to run the circuits if we can convert the reg_eq check to an equivalent qiskit operation

I think this is a real bug. We should really be able to convert this circuit and run it. But it is failing in tk_to_qiskit() for obscure reasons. I think there is a bug in the book-keeping of the set of active RangePredicates there.

[cqc-alec]

Minimal example:

from pytket.circuit import Bit, Circuit, OpType, Qubit
from pytket.unit_id import _TEMP_BIT_NAME
from pytket.extensions.qiskit import tk_to_qiskit


c = Circuit(1, 1)
treg = c.add_c_register(_TEMP_BIT_NAME, 1)
c.add_c_range_predicate(1, 1, [Bit(0)], treg[0])
c.add_gate(OpType.X, [Qubit(0)], condition_bits=[treg[0]], condition_value=1)
c.add_gate(OpType.Y, [Qubit(0)], condition_bits=[treg[0]], condition_value=1)
print(tk_to_qiskit(c))