From 54f63a51dee33b34c2d9c940f4eed41f51d57d4f Mon Sep 17 00:00:00 2001 From: Melf Date: Wed, 18 Dec 2024 15:49:17 +0000 Subject: [PATCH] fix mypy --- pytket/extensions/qiskit/qiskit_convert.py | 2 +- tests/qiskit_convert_test.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/pytket/extensions/qiskit/qiskit_convert.py b/pytket/extensions/qiskit/qiskit_convert.py index 31fad552..5e0f7b09 100644 --- a/pytket/extensions/qiskit/qiskit_convert.py +++ b/pytket/extensions/qiskit/qiskit_convert.py @@ -663,7 +663,7 @@ def append_tk_command_to_qiskit( qb = qregmap[qubit.reg_name][qubit.index[0]] b = cregmap[bit.reg_name][bit.index[0]] # If the bit is storing a range predicate it should be invalidated: - range_preds.pop(bit, None) + range_preds.pop(bit, None) # type: ignore return qcirc.measure(qb, b) if optype == OpType.Reset: diff --git a/tests/qiskit_convert_test.py b/tests/qiskit_convert_test.py index a90da2b4..254044f8 100644 --- a/tests/qiskit_convert_test.py +++ b/tests/qiskit_convert_test.py @@ -1193,7 +1193,7 @@ def test_nonregister_bits() -> None: tk_to_qiskit(c) -def test_range_preds_with_conditionals(): +def test_range_preds_with_conditionals() -> None: # https://github.com/CQCL/pytket-qiskit/issues/375 c = Circuit(1, 1) treg = c.add_c_register(_TEMP_BIT_NAME, 1)