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The fallback implementation ignores the provided Ordering and always locks and unlocks the lock with Acquire and Release operations. However, this may not be sufficient to provide sequential consistency when requested by the user.
should never print 2, because there should be a single total modification order of all SeqCst atomic writes that prevents one thread from seeing the write to a before the write to b, while the other sees the write to b before the write to a.
However, if Atomic<u128> uses the fallback implementation, each SeqCst operation will be replaced by an Acquire followed by a Release, as part of the spinlock code. I could be wrong, but I don't believe this is sufficient to prevent the program from printing 2. There is no happens-before relationship between the two stores, and I believe nothing else to enforce a globally consistent view across all threads. This wouldn't happen on x86 but it could potentially occur on certain weakly-ordered architectures like IBM Power.
Although it's unlikely many practical issues could come of this, I think it would be a good idea to use SeqCst orderings for the spinlocks whenever the ordering of the requested atomic operation is SeqCst. In such cases, I think it would be sufficient to use SeqCst only for the unlock operation; the lock operation could remain Acquire.
The text was updated successfully, but these errors were encountered:
However I believe you are correct: when the ordering is SeqCst then we need to insert a SeqCst fence before and after the atomic operation. Would you be willing to author a PR for this?
The fallback implementation ignores the provided
Ordering
and always locks and unlocks the lock withAcquire
andRelease
operations. However, this may not be sufficient to provide sequential consistency when requested by the user.For example, this code:
should never print
2
, because there should be a single total modification order of allSeqCst
atomic writes that prevents one thread from seeing the write toa
before the write tob
, while the other sees the write tob
before the write toa
.However, if
Atomic<u128>
uses the fallback implementation, eachSeqCst
operation will be replaced by anAcquire
followed by aRelease
, as part of the spinlock code. I could be wrong, but I don't believe this is sufficient to prevent the program from printing2
. There is no happens-before relationship between the two stores, and I believe nothing else to enforce a globally consistent view across all threads. This wouldn't happen on x86 but it could potentially occur on certain weakly-ordered architectures like IBM Power.Although it's unlikely many practical issues could come of this, I think it would be a good idea to use
SeqCst
orderings for the spinlocks whenever the ordering of the requested atomic operation isSeqCst
. In such cases, I think it would be sufficient to useSeqCst
only for the unlock operation; the lock operation could remainAcquire
.The text was updated successfully, but these errors were encountered: