The below table provides the following details
- SBSA Level at which test run.
- SBSA rules covered by a test.
- SystemReady band(SR) for which test is required.
- Runtime environment(UEFI, BareMetal and Linux) where test executes.
- Tests for which exerciser is required.
Test No | Test Description | Level | Rule ID | SR | UEFI | BareMetal* | Linux | Exerciser Required? |
---|---|---|---|---|---|---|---|---|
1 | Check PE Granule Support | L3 | S_L3PE_01 | Yes | Yes | Yes | No | No |
2 | Check for 16-bit ASID support | L3 | S_L3PE_02 | Yes | Yes | Yes | No | No |
3 | Check AARCH64 implementation | L3 | S_L3PE_03 | Yes | Yes | Yes | No | No |
4 | Check FEAT_LPA Requirements | L3 | S_L3PE_04 | Yes | Yes | Yes | No | No |
5 | Check for RAS extension | L4 | S_L4PE_01 | Yes | Yes | Yes | No | No |
6 | Check DC CVAP support | L4 | S_L4PE_02 | Yes | Yes | Yes | No | No |
7 | Check for 16-Bit VMID | L4 | S_L4PE_03 | Yes | Yes | Yes | No | No |
8 | Check for Virtual host extensions | L4 | S_L4PE_04 | Yes | Yes | Yes | No | No |
9 | Support Page table map size change | L5 | S_L5PE_01 | Yes | Yes | Yes | No | No |
10 | Check for addr and generic auth | L5 | S_L5PE_02 | Yes | Yes | Yes | No | No |
11 | Check Activity monitors extension | L5 | S_L5PE_04 | Yes | Yes | Yes | No | No |
12 | Check for SHA3 and SHA512 support | L5 | S_L5PE_05 | Yes | Yes | Yes | No | No |
13 | Stage 2 control of mem and cache | L5 | S_L5PE_06 | Yes | Yes | Yes | No | No |
14 | Check for nested virtualization | L5 | S_L5PE_07 | Yes | Yes | Yes | No | No |
15 | Check MPAM PE Requirements | L5 | S_MPAM_PE | Yes | Yes | Yes | No | No |
16 | Check MPAM LLC Requirements | L5 | S_MPAM_PE | Yes | Yes | Yes | No | No |
17 | Check SPE if implemented | L6 | B_PE_17 | Yes | Yes | Yes | No | No |
18 | Check Branch Target Support | L6 | S_L6PE_02 | Yes | Yes | Yes | No | No |
19 | Check Protect Against Timing Fault | L6 | S_L6PE_03 | Yes | Yes | Yes | No | No |
20 | Check PMU Version Support | L6 | S_L6PE_04 | Yes | Yes | Yes | No | No |
21 | Check AccessFlag DirtyState Update | L6 | S_L6PE_05 | Yes | Yes | Yes | No | No |
22 | Check Enhanced Virtualization Trap | L6 | S_L6PE_06 | Yes | Yes | Yes | No | No |
23 | Check Speculation Restriction | L6 | B_SEC_01 | Yes | Yes | Yes | No | No |
24 | Check Speculative Str Bypass Safe | L6 | B_SEC_02 | Yes | Yes | Yes | No | No |
25 | Check PEs Impl CSDB,SSBB,PSSBB | L6 | B_SEC_03 | Yes | Yes | Yes | No | No |
26 | Check PEs Implement SB Barrier | L6 | B_SEC_04 | Yes | Yes | Yes | No | No |
27 | Check PE Impl CFP,DVP,CPP RCTX | L6 | B_SEC_05 | Yes | Yes | Yes | No | No |
28 | Check Fine Grain Trap Support | L7 | S_L7PE_01 | Yes | Yes | Yes | No | No |
29 | Check for ECV support | L7 | S_L7PE_02 | Yes | Yes | Yes | No | No |
31 | Checks ASIMD Int8 matrix multiplc | L7 | S_L7PE_04 | Yes | Yes | Yes | No | No |
32 | Check for BFLOAT16 extension | L7 | S_L7PE_05 | Yes | Yes | Yes | No | No |
33 | Check PAuth2, FPAC & FPACCOMBINE | L7 | S_L7PE_06 | Yes | Yes | Yes | No | No |
34 | Check for SVE Int8 matrix multiplc | L7 | S_L7PE_07 | Yes | Yes | Yes | No | No |
37 | Check for enhanced PAN feature | FR | S_L8PE_04 | Yes | Yes | Yes | No | No |
38 | Check XS attribute functionality | FR | S_L8PE_01 | Yes | Yes | Yes | No | No |
39 | Check WFET and WFIT functionality | FR | S_L8PE_02 | Yes | Yes | Yes | No | No |
40 | Check atomic 64 byte store support | FR | S_L8PE_03 | Yes | Yes | Yes | No | No |
20 | Check PMU Version Support | FR | S_L8PE_05 | Yes | Yes | Yes | No | No |
41 | Check for FEAT_BRBE support | FR | S_L8PE_06 | Yes | Yes | Yes | No | No |
42 | Check for unsupported PBHA bits | FR | S_L8PE_07 | Yes | Yes | Yes | No | No |
101 | Check peripherals addr 64Kb apart | L3 | S_L3MM_01, S_L3MM_02 | Yes | Yes | Yes | No | No |
201 | Check GIC version | L3 | S_L3GI_01 | Yes | Yes | Yes | No | No |
202 | Check Reserved PPI Assignments | L5 | S_L5PP_01 | Yes | Yes | Yes | No | No |
301 | Check SMMU Compatibility | L4 | S_L4SM_01, S_L4SM_02 | Yes | Yes | Yes | No | No |
302 | Check SMMUv3.2 or higher | L5 | S_L5SM_01, S_L5SM_02 | Yes | Yes | Yes | No | No |
303 | Check S-EL2 & SMMU Stage1 support | L5 | B_SMMU_09 | Yes | Yes | Yes | No | No |
304 | Check S-EL2 & SMMU Stage2 Support | L5 | B_SMMU_20 | Yes | Yes | Yes | No | No |
305 | Check SMMU for MPAM support | L5 | B_SMMU_11, B_SMMU_22, S_L5SM_03 | Yes | Yes | Yes | No | No |
306 | Check SMMU HTTU Support | L6 | S_L6SM_02 | Yes | Yes | Yes | No | No |
307 | Check SMMU MSI Support | L6 | S_L6SM_03 | Yes | Yes | Yes | No | No |
308 | Check SMMU 16 Bit VMID Support | L6 | B_SMMU_23 | Yes | Yes | Yes | No | No |
309 | Check SMMU Large VA Support | L6 | B_SMMU_03 | Yes | Yes | Yes | No | No |
310 | Check TLB Range Invalidation | L6 | B_SMMU_04, B_SMMU_05 | Yes | Yes | Yes | No | No |
311 | Check SMMU 16 Bit ASID Support | L6 | B_SMMU_13 | Yes | Yes | Yes | No | No |
312 | Check SMMU Endianess Support | L6 | B_SMMU_14 | Yes | Yes | Yes | No | No |
313 | Check SMMU Coherent Access Support | L4 | S_L4SM_03 | Yes | Yes | Yes | No | No |
314 | Check SMMU PMU Extension | L7 | S_L7SM_03, S_L7SM_04 | Yes | Yes | Yes | No | No |
315 | Check if all DMA reqs behind SMMU | L7 | S_L7SM_01 | Yes | Yes | Yes | No | No |
316 | Check for SMMU/CATU in ETR Path | L7 | S_L7SM_02 | Yes | Yes# | Yes | Yes | No |
302 | Check SMMUv3.2 or higher | FR | S_L8SM_01 | Yes | Yes# | Yes | Yes | No |
317 | Check ATS and Page Req Support | FR | GPU_04 | Yes | Yes | Yes | No | No |
601 | Check EA Capability | L4 | S_L4PCI_2 | Yes | Yes | Yes | No | No |
701 | Check NS Watchdog Revision | L6 | S_L6WD_01 | Yes | Yes | Yes | No | No |
801 | Check ECAM Presence | L6 | PCI_IN_01 | Yes | Yes | Yes | No | No |
803 | Check ECAM Memory accessibility | L6 | PCI_IN_02 | Yes | Yes | Yes | No | No |
805 | PCIe Unaligned access, Norm mem | L6 | PCI_MM_01, PCI_MM_02, PCI_MM_03, RE_BAR_2, IE_BAR_2 | Yes | Yes# | Yes | Yes | No |
809 | Check all MSI=X vectors are LPIs | L3 | S_L3GI_02 | Yes | Yes# | Yes | Yes | No |
816 | NP type-1 pcie only support 32-bit | L6 | PCI_MM_04 | Yes | Yes | Yes | No | No |
820 | Check Type 0/1 common config rules | L6 | RE_REG_1, IE_REG_1, IE_REG_3 | Yes | Yes | Yes | No | No |
821 | Check Type 0 config header rules | L6 | RE_REG_1, IE_REG_1 | Yes | Yes | Yes | No | No |
822 | Check Type 1 config header rules | L6 | IE_REG_3 | Yes | Yes | Yes | No | No |
823 | Check PCIe capability rules | L6 | IE_REG_4 | Yes | Yes | Yes | No | No |
824 | Check Device capabilites reg rules | L6 | RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4 | Yes | Yes | Yes | No | No |
825 | Check Device Control register rule | L6 | RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4 | Yes | Yes | Yes | No | No |
826 | Check Device cap 2 register rules | L6 | RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4 | Yes | Yes | Yes | No | No |
827 | Check Device control 2 reg rules | L6 | RE_REG_3, RE_REC_1, IE_REG_2, IE_REG_4 | Yes | Yes | Yes | No | No |
828 | Check Power management cap rules | L6 | RE_REG_2, IE_REG_5 | Yes | Yes | Yes | No | No |
829 | Check Power management/status rule | L6 | RE_REG_2, IE_REG_5 | Yes | Yes | Yes | No | No |
830 | Check Cmd Reg memory space enable | L6 | RE_REG_1, IE_REG_1, IE_REG_3 | Yes | Yes | Yes | No | No |
831 | Check Type0/1 BIST Register rule | L6 | RE_REG_1, IE_REG_1, IE_REG_3 | Yes | Yes | Yes | No | No |
832 | Check HDR CapPtr Register rule | L6 | RE_REG_1, IE_REG_1, IE_REG_3 | Yes | Yes | Yes | No | No |
833 | Check Max payload size supported | L6 | RE_REC_1, IE_REG_2, IE_REG_4 | Yes | Yes | Yes | No | No |
834 | Check BAR memory space & Type rule | L6 | RE_BAR_3, IE_BAR_3 | Yes | Yes | Yes | No | No |
835 | Check Function level reset rule | L6 | RE_RST_1, IE_RST_1, PCI_SM_02 | Yes | Yes | Yes | No | No |
836 | Check ARI forwarding support rule | L6 | PCI_IN_17 | Yes | Yes | Yes | No | No |
837 | Check OBFF supported rule | L6 | IE_REG_2 | Yes | Yes | Yes | No | No |
838 | Check CTRS and CTDS rule | L6 | IE_REG_4 | Yes | Yes | Yes | No | No |
839 | Check i-EP atomicop rule | L6 |IE_REG_2 | Yes | Yes | Yes | No | No | |
840 | PCIe RC,PE - Same Inr Shareable Domain | L3 |PCI_IC_11 | Yes | Yes | Yes | No | No | |
841 | Check MSI and MSI-X support rule | L6 | RE_INT_1, IE_INT_1 | Yes | Yes | Yes | No | No |
842 | Check Power Management rules | L6 | RE_PWR_1, IE_PWR_1 | Yes | Yes | Yes | No | No |
843 | Check ARI forwarding enable rule | L6 | PCI_IN_17 | Yes | Yes | Yes | No | No |
844 | Check device under RP in same ECAM | L6 | PCI_IN_04 | Yes | Yes | Yes | No | No |
845 | Check all RP in HB is in same ECAM | L6 | PCI_IN_03 | Yes | Yes | Yes | No | No |
846 | Check RP Byte Enable Rules | L6 | PCI_IN_18 | Yes | Yes | Yes | No | No |
847 | Check Config Txn for RP in HB | L6 | PCI_IN_12 | Yes | Yes | Yes | No | No |
848 | Check RootPort NP Memory Access | L6 | PCI_IN_13 | No | Yes# | Yes | No | No |
849 | Check RootPort P Memory Access | L6 | PCI_IN_13 | No | Yes# | Yes | No | No |
850 | Check L-Intr SPI Level-Sensitive | L6 | PCI_LI_01, PCI_LI_03 | Yes | Yes | Yes | No | No |
851 | Check Sec Bus Reset For iEP_RP | L6 | IE_RST_2 | Yes | Yes | Yes | No | No |
852 | Check ATS Support Rule | L6 | IE_SMU_1, RE_SMU_2 | Yes | Yes | Yes | No | No |
856 | Check iEP-RootPort P2P Support | L6 | IE_ACS_2 | Yes | Yes | Yes | No | No |
857 | Check RCiEP, iEP_EP P2P Supp | L6 | IE_ACS_1, RE_ACS_1, RE_ACS_2 | Yes | Yes | Yes | No | No |
858 | Read and write to BAR reg | L6 | RE_BAR_1, IE_BAR_1 | Yes | Yes | Yes | No | No |
859 | Check RCEC Class code and Ext Cap | L6 | RE_PCI_2 | Yes | Yes | Yes | No | No |
860 | Check RCiEP Hdr type & link Cap | L6 | RE_PCI_1 | Yes | Yes | Yes | No | No |
861 | Check RootPort P&NP Memory Access | L7 | S_PCIe_02 | Yes | Yes | Yes | No | No |
863 | Slot Cap, Control and Status register rules | L6 | IE_REG_4 | Yes | Yes | Yes | No | No |
864 | Check ATS & Page Req for all RP | FR | GPU_04 | Yes | Yes | Yes | No | No |
865 | Check RP Extensions for DPC | FR | PCI_ER_09 | Yes | Yes | Yes | No | No |
866 | Steering Tag value properties | FR | S_PCIe_11 | Yes | Yes# | Yes | Yes | No |
867 | Check Supported Link Speed for iEPs | L6 | IE_REG_6, IE_REG_7, IE_REG_8, IE_REG_9 | Yes | Yes | Yes | Yes | No |
901 | Enhanced ECAM Memory access check | L3 | PCI_IN_01, PCI_IN_02 | No | Yes | Yes | No | Yes |
902 | PCIe Address translation check | L6 | RE_SMU_2 | No | Yes | Yes | No | Yes |
903 | ATS Functionality Check | L6 | RE_SMU_2 | No | Yes | Yes | No | Yes |
904 | Arrival order & Gathering Check | L6 | RE_ORD_1, RE_ORD_2, IE_ORD_1, IE_ORD_2 | No | Yes | Yes | No | Yes |
905 | PE 2/4/8B writes tp PCIe as 2/4/8B | L7 | S_PCIe_03 | No | Yes | Yes | No | Yes |
906 | RP's must support AER feature | L7 | PCI_ER_01, PCI_ER_04 | No | Yes | Yes | No | Yes |
907 | RP's must support DPC | L7 | PCI_ER_05, PCI_ER_06 | No | Yes | Yes | No | Yes |
908 | Check 2/4/8 Bytes targeted writes | L7 | S_PCIe_04 | No | Yes | Yes | No | Yes |
909 | Check Relaxed Ordering of writes | FR | S_PCIe_07, S_PCIe_08 | No | Yes | Yes | No | Yes |
910 | DPC trig when RP-PIO unimplemented | FR | PCI_ER_10 | No | Yes | Yes | No | Yes |
911 | RAS ERR record for poisoned data | FR | PCI_ER_08 | No | Yes | Yes | No | Yes |
912 | RAS ERR record for external abort | FR | PCI_ER_07 | No | Yes | Yes | No | Yes |
913 | Enable and disable STE.DCP bit | FR | S_PCIe_10 | No | Yes | Yes | No | Yes |
1001 | Check for MPAM extension | L7 | S_L7MP_01, S_L7MP_02 | Yes | Yes | Yes | No | No |
1002 | Check for MPAM LLC CSU | L7 | S_L7MP_03, S_L7MP_04 | Yes | Yes | Yes | No | No |
1003 | Check for MPAM MBWUs Monitor func | L7 | S_L7MP_05, S_L7MP_06 | Yes | Yes | Yes | No | No |
1004 | Check for MBWU counter size | L7 | S_L7MP_07 | Yes | Yes | Yes | No | No |
1005 | Check for MPAM MSC address overlap | L7 | S_L7MP_08 | Yes | Yes | Yes | No | No |
1006 | Check PMG storage by CPOR nodes | L7 | S_L7MP_03 | Yes | Yes | Yes | No | No |
1101 | Check PMU Overflow signal | L7 | PMU_PE_02 | Yes | Yes | Yes | No | No |
1102 | Check number of PMU counters | L7 | PMU_PE_03 | Yes | Yes | Yes | No | No |
1103 | Check for multi-threaded PMU ext | L7 | PMU_EV_11 | Yes | Yes | Yes | No | No |
1104 | Check memory bandwidth monitors | L7 | PMU_BM_1, PMU_SYS_1, PMU_SYS_2 | Yes | Yes | Yes | No | No |
1105 | Check memory latency monitors | L7 | PMU_MEM_1, PMU_SYS_1, PMU_SYS_2 | Yes | Yes | Yes | No | No |
1106 | Check for PMU SPE Requirements | L7 | PMU_SPE | Yes | Yes | Yes | No | No |
1107 | Check PCIe bandwidth monitors | L7 | PMU_BM_2, PMU_SYS_1, PMU_SYS_2 | Yes | Yes | Yes | No | No |
1109 | Check multiple types of traffic measurement | L7 | PMU_SYS_6 | Yes | Yes | Yes | No | No |
1201 | Check Error Counter | L7 | RAS_01 | Yes | Yes | Yes | No | No |
1202 | Check CFI, DUI, UI Controls | L7 | RAS_02 | Yes | Yes | Yes | No | No |
1203 | Check FHI in Error Record Group | L7 | RAS_03 | Yes | Yes | Yes | No | No |
1204 | Check ERI in Error Record Group | L7 | RAS_04 | Yes | Yes | Yes | No | No |
1205 | Check ERI/FHI Connected to GIC | L7 | RAS_06 | Yes | Yes | Yes | No | No |
1206 | RAS ERR<n>ADDR.AI bit status check | L7 | RAS_07 | Yes | Yes | Yes | No | No |
1207 | Check Error Group Status | L7 | RAS_08 | Yes | Yes | Yes | No | No |
1208 | Software Fault Error Check | L7 | RAS_11, RAS_12 | Yes | Yes | Yes | No | No |
1209 | Data abort on Containable err | L7 | S_L7RAS_1 | Yes | Yes | Yes | No | No |
1210 | Check for patrol scrubbing support | L7 | SYS_RAS_1 | Yes | Yes | Yes | No | No |
1211 | Check Poison Storage & Forwarding | L7 | SYS_RAS_2, SYS_RAS_3 | Yes | Yes | Yes | No | No |
1212 | Check Pseudo Fault Injection | L7 | SYS_RAS_2 | Yes | Yes | Yes | No | No |
1213 | Check RAS memory mapped view supp | FR | SYS_RAS_4 | Yes | Yes | Yes | No | No |
1214 | Check RAS SR Interface ERI/FHI are PPI | L6 | S_RAS_01 | Yes | Yes | Yes | No | No |
1301 | NIST Statistical Test Suite | L7 | S_L7ENT_1 | Yes | Yes | Yes | No | No |
1401 | Check for FEAT_ETE | FR | ETE_02 | Yes | Yes | Yes | No | No |
1402 | Check trace unit ETE supports | FR | ETE_03 | Yes | Yes | Yes | No | No |
1403 | Check ETE Trace Timestamp Source | FR | ETE_04, ETE_06 | Yes | Yes | Yes | No | No |
1404 | Check Trace Same Timestamp Source | FR | ETE_05 | Yes | Yes | Yes | No | No |
1405 | Check for FEAT_TRBE | FR | ETE_07 | Yes | Yes | Yes | No | No |
1406 | Check trace buffers flag updates | FR | ETE_08 | Yes | Yes | Yes | No | No |
1407 | Check TRBE trace buffers alignment | FR | ETE_09 | Yes | Yes | Yes | No | No |
1408 | Check GICC TRBE Interrupt field | FR | ETE_10 | Yes | Yes | Yes | No | No |
PMU app | IPC events | L7 | PMU_EV_01 | Yes | No | No | Yes | No |
PMU app | Cache effectiveness | L7 | PMU_EV_02 | Yes | No | No | Yes | No |
PMU app | TLB effectiveness | L7 | PMU_EV_03 | Yes | No | No | Yes | No |
PMU app | Cycle accounting | L7 | PMU_EV_05 | Yes | No | No | Yes | No |
PMU app | top down accounting | L7 | PMU_EV_06 | Yes | No | No | Yes | No |
PMU app | Workload events | L7 | PMU_EV_07 | Yes | No | No | Yes | No |
PMU app | Branch predictor effectiveness events | L7 | PMU_EV_08 | Yes | No | No | Yes | No |
PMU app | BR_RETIRED | L7 | PMU_EV_09 | Yes | No | No | Yes | No |
PMU app | Latency events | L7 | PMU_EV_10 | Yes | No | No | Yes | No |
For running tests on a bare-metal environment, integration of ACS with platform boot code is required. See arm SBSA Bare-metal User Guide