From be59026dd0ca6525ea33961b08da3354f28ed7f6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Matthias=20G=C3=B6rgens?= <matthias.goergens@gmail.com>
Date: Tue, 10 Dec 2024 09:19:07 +0800
Subject: [PATCH] Simplify SLTI tests (#710)

Extracted from https://github.com/scroll-tech/ceno/pull/667 to make that
PR smaller and easier to review.
---
 ceno_zkvm/src/instructions/riscv/slti.rs | 79 +++++++++++++-----------
 1 file changed, 42 insertions(+), 37 deletions(-)

diff --git a/ceno_zkvm/src/instructions/riscv/slti.rs b/ceno_zkvm/src/instructions/riscv/slti.rs
index d88f0336c..76894f7a0 100644
--- a/ceno_zkvm/src/instructions/riscv/slti.rs
+++ b/ceno_zkvm/src/instructions/riscv/slti.rs
@@ -150,29 +150,31 @@ mod test {
 
     #[test]
     fn test_sltiu_true() {
-        verify::<SltiuOp>("lt = true, 0 < 1", 0, 1, 1);
-        verify::<SltiuOp>("lt = true, 1 < 2", 1, 2, 1);
-        verify::<SltiuOp>("lt = true, 10 < 20", 10, 20, 1);
-        verify::<SltiuOp>("lt = true, 0 < imm upper boundary", 0, 2047, 1);
+        let verify = |name, a, imm| verify::<SltiuOp>(name, a, imm, true);
+        verify("lt = true, 0 < 1", 0, 1);
+        verify("lt = true, 1 < 2", 1, 2);
+        verify("lt = true, 10 < 20", 10, 20);
+        verify("lt = true, 0 < imm upper boundary", 0, 2047);
         // negative imm is treated as positive
-        verify::<SltiuOp>("lt = true, 0 < u32::MAX-1", 0, -1, 1);
-        verify::<SltiuOp>("lt = true, 1 < u32::MAX-1", 1, -1, 1);
-        verify::<SltiuOp>("lt = true, 0 < imm lower bondary", 0, -2048, 1);
+        verify("lt = true, 0 < u32::MAX-1", 0, -1);
+        verify("lt = true, 1 < u32::MAX-1", 1, -1);
+        verify("lt = true, 0 < imm lower bondary", 0, -2048);
     }
 
     #[test]
     fn test_sltiu_false() {
-        verify::<SltiuOp>("lt = false, 1 < 0", 1, 0, 0);
-        verify::<SltiuOp>("lt = false, 2 < 1", 2, 1, 0);
-        verify::<SltiuOp>("lt = false, 100 < 50", 100, 50, 0);
-        verify::<SltiuOp>("lt = false, 500 < 100", 500, 100, 0);
-        verify::<SltiuOp>("lt = false, 100000 < 2047", 100000, 2047, 0);
-        verify::<SltiuOp>("lt = false, 100000 < 0", 100000, 0, 0);
-        verify::<SltiuOp>("lt = false, 0 == 0", 0, 0, 0);
-        verify::<SltiuOp>("lt = false, 1 == 1", 1, 1, 0);
-        verify::<SltiuOp>("lt = false, imm upper bondary", u32::MAX, 2047, 0);
+        let verify = |name, a, imm| verify::<SltiuOp>(name, a, imm, false);
+        verify("lt = false, 1 < 0", 1, 0);
+        verify("lt = false, 2 < 1", 2, 1);
+        verify("lt = false, 100 < 50", 100, 50);
+        verify("lt = false, 500 < 100", 500, 100);
+        verify("lt = false, 100000 < 2047", 100000, 2047);
+        verify("lt = false, 100000 < 0", 100000, 0);
+        verify("lt = false, 0 == 0", 0, 0);
+        verify("lt = false, 1 == 1", 1, 1);
+        verify("lt = false, imm upper bondary", u32::MAX, 2047);
         // negative imm is treated as positive
-        verify::<SltiuOp>("lt = false, imm lower bondary", u32::MAX, -2048, 0);
+        verify("lt = false, imm lower bondary", u32::MAX, -2048);
     }
 
     #[test]
@@ -181,34 +183,36 @@ mod test {
         let a: u32 = rng.gen::<u32>();
         let b: i32 = rng.gen_range(-2048..2048);
         println!("random: {} <? {}", a, b); // For debugging, do not delete.
-        verify::<SltiuOp>("random unsigned comparison", a, b, (a < (b as u32)) as u32);
+        verify::<SltiuOp>("random unsigned comparison", a, b, a < (b as u32));
     }
 
     #[test]
     fn test_slti_true() {
-        verify::<SltiOp>("lt = true, 0 < 1", 0, 1, 1);
-        verify::<SltiOp>("lt = true, 1 < 2", 1, 2, 1);
-        verify::<SltiOp>("lt = true, -1 < 0", -1i32 as u32, 0, 1);
-        verify::<SltiOp>("lt = true, -1 < 1", -1i32 as u32, 1, 1);
-        verify::<SltiOp>("lt = true, -2 < -1", -2i32 as u32, -1, 1);
+        let verify = |name, a: i32, imm| verify::<SltiOp>(name, a as u32, imm, true);
+        verify("lt = true, 0 < 1", 0, 1);
+        verify("lt = true, 1 < 2", 1, 2);
+        verify("lt = true, -1 < 0", -1, 0);
+        verify("lt = true, -1 < 1", -1, 1);
+        verify("lt = true, -2 < -1", -2, -1);
         // -2048 <= imm <= 2047
-        verify::<SltiOp>("lt = true, imm upper bondary", i32::MIN as u32, 2047, 1);
-        verify::<SltiOp>("lt = true, imm lower bondary", i32::MIN as u32, -2048, 1);
+        verify("lt = true, imm upper bondary", i32::MIN, 2047);
+        verify("lt = true, imm lower bondary", i32::MIN, -2048);
     }
 
     #[test]
     fn test_slti_false() {
-        verify::<SltiOp>("lt = false, 1 < 0", 1, 0, 0);
-        verify::<SltiOp>("lt = false, 2 < 1", 2, 1, 0);
-        verify::<SltiOp>("lt = false, 0 < -1", 0, -1, 0);
-        verify::<SltiOp>("lt = false, 1 < -1", 1, -1, 0);
-        verify::<SltiOp>("lt = false, -1 < -2", -1i32 as u32, -2, 0);
-        verify::<SltiOp>("lt = false, 0 == 0", 0, 0, 0);
-        verify::<SltiOp>("lt = false, 1 == 1", 1, 1, 0);
-        verify::<SltiOp>("lt = false, -1 == -1", -1i32 as u32, -1, 0);
+        let verify = |name, a: i32, imm| verify::<SltiOp>(name, a as u32, imm, false);
+        verify("lt = false, 1 < 0", 1, 0);
+        verify("lt = false, 2 < 1", 2, 1);
+        verify("lt = false, 0 < -1", 0, -1);
+        verify("lt = false, 1 < -1", 1, -1);
+        verify("lt = false, -1 < -2", -1, -2);
+        verify("lt = false, 0 == 0", 0, 0);
+        verify("lt = false, 1 == 1", 1, 1);
+        verify("lt = false, -1 == -1", -1, -1);
         // -2048 <= imm <= 2047
-        verify::<SltiOp>("lt = false, imm upper bondary", i32::MAX as u32, 2047, 0);
-        verify::<SltiOp>("lt = false, imm lower bondary", i32::MAX as u32, -2048, 0);
+        verify("lt = false, imm upper bondary", i32::MAX, 2047);
+        verify("lt = false, imm lower bondary", i32::MAX, -2048);
     }
 
     #[test]
@@ -217,10 +221,11 @@ mod test {
         let a: i32 = rng.gen();
         let b: i32 = rng.gen_range(-2048..2048);
         println!("random: {} <? {}", a, b); // For debugging, do not delete.
-        verify::<SltiOp>("random 1", a as u32, b, (a < b) as u32);
+        verify::<SltiOp>("random 1", a as u32, b, a < b);
     }
 
-    fn verify<I: RIVInstruction>(name: &'static str, rs1_read: u32, imm: i32, expected_rd: u32) {
+    fn verify<I: RIVInstruction>(name: &'static str, rs1_read: u32, imm: i32, expected_rd: bool) {
+        let expected_rd = expected_rd as u32;
         let mut cs = ConstraintSystem::<GoldilocksExt2>::new(|| "riscv");
         let mut cb = CircuitBuilder::new(&mut cs);